Hi Marek,
On Fri, Aug 22, 2014 at 7:26 AM, Marek Vasut wrote:
> Thanks for clarification. Fabio, can you please document this with a big
> comment
> in the code ?
Yes, I can do that in v6.
Does the below version look good?
>From 782be534aa37ba3da2f8d0ed607b26b2dd71c7d7 Mon Sep 17 00:00:00 200
On Friday, August 22, 2014 at 05:02:37 AM, Li Ye-B37916 wrote:
> Hi Marek,
>
> On 8/22/2014 1:18 AM, Marek Vasut wrote:
> > On Thursday, August 21, 2014 at 07:10:32 PM, Fabio Estevam wrote:
> >> When testing the FEC driver on a mx6solox we noticed that the TDAR bit
> >> gets always cleared prior t
Hi Marek,
On 8/22/2014 1:18 AM, Marek Vasut wrote:
> On Thursday, August 21, 2014 at 07:10:32 PM, Fabio Estevam wrote:
>> When testing the FEC driver on a mx6solox we noticed that the TDAR bit gets
>> always cleared prior then the READY bit is set in the last BD, which causes
>> FEC transmission t
On Thursday, August 21, 2014 at 07:10:32 PM, Fabio Estevam wrote:
> When testing the FEC driver on a mx6solox we noticed that the TDAR bit gets
> always cleared prior then the READY bit is set in the last BD, which causes
> FEC transmission to fail.
>
> As explained by Ye Li:
>
> "The TDAR bit is
When testing the FEC driver on a mx6solox we noticed that the TDAR bit gets
always cleared prior then the READY bit is set in the last BD, which causes
FEC transmission to fail.
As explained by Ye Li:
"The TDAR bit is set when the descriptors are all out from TX ring, but the
descriptor properly
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