On 2/13/19 1:15 PM, Chee, Tien Fong wrote:
> On Wed, 2019-02-13 at 13:00 +0100, Marek Vasut wrote:
>> On 2/13/19 9:22 AM, Chee, Tien Fong wrote:
>>>
>>> On Fri, 2019-02-01 at 09:29 +0100, Marek Vasut wrote:
On 2/1/19 5:04 AM, Chee, Tien Fong wrote:
>
>
> On Thu, 2019-01-31 at
On Wed, 2019-02-13 at 13:00 +0100, Marek Vasut wrote:
> On 2/13/19 9:22 AM, Chee, Tien Fong wrote:
> >
> > On Fri, 2019-02-01 at 09:29 +0100, Marek Vasut wrote:
> > >
> > > On 2/1/19 5:04 AM, Chee, Tien Fong wrote:
> > > >
> > > >
> > > > On Thu, 2019-01-31 at 15:55 +0100, Marek Vasut wrote:
>
On 2/13/19 9:22 AM, Chee, Tien Fong wrote:
> On Fri, 2019-02-01 at 09:29 +0100, Marek Vasut wrote:
>> On 2/1/19 5:04 AM, Chee, Tien Fong wrote:
>>>
>>> On Thu, 2019-01-31 at 15:55 +0100, Marek Vasut wrote:
On 1/31/19 3:51 PM, tien.fong.c...@intel.com wrote:
>
>
> From: Tien
On Fri, 2019-02-01 at 09:29 +0100, Marek Vasut wrote:
> On 2/1/19 5:04 AM, Chee, Tien Fong wrote:
> >
> > On Thu, 2019-01-31 at 15:55 +0100, Marek Vasut wrote:
> > >
> > > On 1/31/19 3:51 PM, tien.fong.c...@intel.com wrote:
> > > >
> > > >
> > > > From: Tien Fong Chee
> > > >
> > > > Add
On Tue, 2019-02-05 at 09:41 +0100, Marek Vasut wrote:
> On 2/2/19 4:27 AM, Chee, Tien Fong wrote:
> >
> > On Fri, 2019-02-01 at 12:12 -0800, Dalon L Westergreen wrote:
> > >
> > > On Thu, 2019-01-31 at 22:51 +0800, tien.fong.c...@intel.com
> > > wrote:
> > > >
> > > >
> > > > From: Tien Fong
On 2/2/19 4:27 AM, Chee, Tien Fong wrote:
> On Fri, 2019-02-01 at 12:12 -0800, Dalon L Westergreen wrote:
>> On Thu, 2019-01-31 at 22:51 +0800, tien.fong.c...@intel.com wrote:
>>>
>>> From: Tien Fong Chee
>>>
>>> Add FPGA driver to support program FPGA with FPGA bitstream loading
>>> from
>>>
On Fri, 2019-02-01 at 12:12 -0800, Dalon L Westergreen wrote:
> On Thu, 2019-01-31 at 22:51 +0800, tien.fong.c...@intel.com wrote:
> >
> > From: Tien Fong Chee
> >
> > Add FPGA driver to support program FPGA with FPGA bitstream loading
> > from
> > filesystem. The driver are designed based on
On Thu, 2019-01-31 at 22:51 +0800, tien.fong.c...@intel.com wrote:
> From: Tien Fong Chee
>
> Add FPGA driver to support program FPGA with FPGA bitstream loading from
> filesystem. The driver are designed based on generic firmware loader
> framework. The driver can handle FPGA program operation
On Fri, 2019-02-01 at 09:29 +0100, Marek Vasut wrote:
> On 2/1/19 5:04 AM, Chee, Tien Fong wrote:
> >
> > On Thu, 2019-01-31 at 15:55 +0100, Marek Vasut wrote:
> > >
> > > On 1/31/19 3:51 PM, tien.fong.c...@intel.com wrote:
> > > >
> > > >
> > > > From: Tien Fong Chee
> > > >
> > > > Add
On 2/1/19 5:04 AM, Chee, Tien Fong wrote:
> On Thu, 2019-01-31 at 15:55 +0100, Marek Vasut wrote:
>> On 1/31/19 3:51 PM, tien.fong.c...@intel.com wrote:
>>>
>>> From: Tien Fong Chee
>>>
>>> Add FPGA driver to support program FPGA with FPGA bitstream loading
>>> from
>>> filesystem. The driver are
On Thu, 2019-01-31 at 15:55 +0100, Marek Vasut wrote:
> On 1/31/19 3:51 PM, tien.fong.c...@intel.com wrote:
> >
> > From: Tien Fong Chee
> >
> > Add FPGA driver to support program FPGA with FPGA bitstream loading
> > from
> > filesystem. The driver are designed based on generic firmware
> >
On 1/31/19 3:51 PM, tien.fong.c...@intel.com wrote:
> From: Tien Fong Chee
>
> Add FPGA driver to support program FPGA with FPGA bitstream loading from
> filesystem. The driver are designed based on generic firmware loader
> framework. The driver can handle FPGA program operation from loading
From: Tien Fong Chee
Add FPGA driver to support program FPGA with FPGA bitstream loading from
filesystem. The driver are designed based on generic firmware loader
framework. The driver can handle FPGA program operation from loading FPGA
bitstream in flash to memory and then to program FPGA.
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