[U-Boot] [PATCH] MUSB driver: Timeout is never detected as the while loop does not end
Timeout variable is decremented once more when while condition is not met. Following if does not detect correctly that timeout has occurred. Because of this bug the usb start command on AM335X-EVM board did not detect correctly that USB device was not attached. timeout = musb_cfg.timeout; while (timeout--) if (readb(musbr-devctl) MUSB_DEVCTL_HM) break; /* if musb core is not in host mode, then return */ if (!timeout) return -1; Signed-off-by: Matej Franceskin matej.frances...@comtrade.com CC: Marek Vasut ma...@denx.de? --- drivers/usb/musb/musb_hcd.c |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/usb/musb/musb_hcd.c b/drivers/usb/musb/musb_hcd.c index 2df52c1..8d44c46 100644 --- a/drivers/usb/musb/musb_hcd.c +++ b/drivers/usb/musb/musb_hcd.c @@ -1113,7 +1113,7 @@ int usb_lowlevel_init(void) * should be a usb device connected. */ timeout = musb_cfg.timeout; - while (timeout--) + while (--timeout) if (readb(musbr-devctl) MUSB_DEVCTL_HM) break; /* if musb core is not in host mode, then return */ if (!timeout) return -1; -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Please pull u-boot-staging/tr...@ti.com
Hi Tom,
On Sat, 18 Aug 2012 13:53:16 -0700, Tom Rini tr...@ti.com wrote:
On Sat, Aug 18, 2012 at 07:15:56AM -0700, Tom Rini wrote:
On Sat, Aug 18, 2012 at 08:28:55AM +0200, Albert ARIBAUD wrote:
Hi Tom,
On Fri, 17 Aug 2012 14:52:01 -0700, Tom Rini tr...@ti.com wrote:
Hello,
This replaces my previous pull-request and is new warning free
on MAKEALL -a arm for ELDK4.2/5.1/5.2.1.
The following changes since commit
4d3c95f5ea7c737a21cd6b9c59435ee693b3f127:
zfs: Add ZFS filesystem support (2012-08-09 23:42:20 +0200)
are available in the git repository at:
git://git.denx.de/u-boot-staging tr...@ti.com
for you to fetch changes up to
5d26e4de33fab7b132e8a8036ac54176f537d79f:
ARM: add Raspberry Pi model B board, using BCM2835 SoC
(2012-08-15 09:43:47 -0700)
John Rigby (1):
u8500: Separating mmc config parameters from driver
Mathieu J. Poirier (10):
snowball: Add support for ux500 based snowball board
u8500: Moving prcmu to cpu directory
snowball: Adding architecture dependent initialisation
snowball: Adding CPU clock initialisation
snowball: Moving to ux500.v2 addess scheme for PRCMU
access snowball: applying power to LAN and GBF controllers
u8500: Moving processor-specific functions to cpu area.
u8500: Enabling power to MMC device on AB8500 V2
armv7: Adding cpu specific cache managmenent
snowball: Adding board specific cache cleanup routine
Stephen Warren (4):
README: fix references to config_cmd_default.h
ARM: arm1176: enable instruction cache in arch_cpu_init()
ARM: add basic support for the Broadcom BCM2835 SoC
ARM: add Raspberry Pi model B board, using BCM2835 SoC
MAINTAINERS|8 +
README |4 +-
arch/arm/cpu/arm1176/bcm2835/Makefile | 37 +
arch/arm/cpu/arm1176/bcm2835/config.mk | 19 +
arch/arm/cpu/arm1176/bcm2835/lowlevel_init.S | 19 +
arch/arm/cpu/arm1176/bcm2835/reset.c | 35 +
arch/arm/cpu/arm1176/bcm2835/timer.c | 55 ++
arch/arm/cpu/arm1176/cpu.c |7 +
arch/arm/cpu/armv7/cpu.c |8 +
arch/arm/cpu/armv7/u8500/Makefile |2 +-
arch/arm/cpu/armv7/u8500/clock.c | 34 +
arch/arm/cpu/armv7/u8500/cpu.c | 192 +
.../arm/cpu/armv7}/u8500/prcmu.c | 128 +++-
arch/arm/include/asm/arch-bcm2835/gpio.h | 66 ++
arch/arm/include/asm/arch-bcm2835/timer.h | 37 +
arch/arm/include/asm/arch-bcm2835/wdog.h | 36 +
arch/arm/include/asm/arch-u8500/clock.h|5 +-
arch/arm/include/asm/arch-u8500/db8500_gpio.h | 42 ++
arch/arm/include/asm/arch-u8500/db8500_pincfg.h| 170 +
arch/arm/include/asm/arch-u8500/hardware.h | 33 +-
.../arm/include/asm/arch-u8500/prcmu.h | 35 +-
arch/arm/include/asm/arch-u8500/sys_proto.h|1 +
board/armltd/vexpress/ca9x4_ct_vxp.c | 21 +-
board/raspberrypi/rpi_b/Makefile | 34 +
board/raspberrypi/rpi_b/rpi_b.c| 34 +
board/st-ericsson/snowball/Makefile| 49 ++
board/st-ericsson/snowball/db8500_pins.h | 745
board/st-ericsson/snowball/snowball.c | 348
+ board/st-ericsson/u8500/Makefile
|2 +- board/st-ericsson/u8500/u8500_href.c |
100 +-- boards.cfg |
2 + drivers/gpio/Makefile |2 +
drivers/gpio/bcm2835_gpio.c| 89 +++
drivers/gpio/db8500_gpio.c | 221 ++
drivers/mmc/arm_pl180_mmci.c | 131 ++--
drivers/mmc/arm_pl180_mmci.h | 27 +-
drivers/serial/serial_pl01x.c |2 +
include/configs/rpi_b.h| 104 +++
include/configs/snowball.h | 266
+++ 39 files changed, 2937 insertions(+), 213 deletions(-)
create mode 100644 arch/arm/cpu/arm1176/bcm2835/Makefile create
mode 100644 arch/arm/cpu/arm1176/bcm2835/config.mk create mode
100644 arch/arm/cpu/arm1176/bcm2835/lowlevel_init.S create mode
100644 arch/arm/cpu/arm1176/bcm2835/reset.c create mode 100644
arch/arm/cpu/arm1176/bcm2835/timer.c create mode 100644
arch/arm/cpu/armv7/u8500/cpu.c rename {board/st-ericsson =
Re: [U-Boot] [PATCH v10 00/16] split tegra20 arm7 code into separate SPL
Hi Tom, On Wed, 29 Aug 2012 14:10:19 -0700, Tom Warren twar...@nvidia.com wrote: Lucas, -Original Message- From: Lucas Stach [mailto:d...@lynxeye.de] Sent: Wednesday, August 29, 2012 1:54 PM To: Tom Warren Cc: Allen Martin; swar...@wwwdotorg.org; s...@chromium.org; thierry.red...@avionic-design.de; u-boot@lists.denx.de Subject: Re: [PATCH v10 00/16] split tegra20 arm7 code into separate SPL Hello Tom, Am Mittwoch, den 29.08.2012, 09:55 -0700 schrieb Tom Warren: Allen/Albert, -Original Message- From: Allen Martin [mailto:amar...@nvidia.com] Sent: Tuesday, August 28, 2012 5:08 PM To: Tom Warren; swar...@wwwdotorg.org; s...@chromium.org; thierry.red...@avionic-design.de; d...@lynxeye.de Cc: u-boot@lists.denx.de; Allen Martin Subject: [PATCH v10 00/16] split tegra20 arm7 code into separate SPL This patch series fixes a long standing problem with the tegra20 u-boot build. Tegra20 contains an ARM7TDMI boot processor and a Cortex A9 main processor. Prior to this patch series this was accomplished by #ifdefing out any armv7 code from the early boot sequence and creating a single binary that runs on both both the ARM7TDMI and A9. This was very fragile as changes to compiler options or any additions or rearranging of the early boot code could add additional armv7 specific code causing it to fail on the ARM7TDMI. This patch series pulls all the armv4t code out into a separate SPL that does nothing more than initialize the A9 and transfer control to it. The resultint SPL and armv7 u-boot are concatenated together into a single image. This patch series is also available from: git://github.com/arm000/u-boot.git branch: tegra-spl-v10 Changes: v10: - added fix to MAKEALL script so that it correctly parses new boards.cfg I applied this to u-boot-tegra/master and pushed the new code upstream. The pull request remains the same (except for the inclusion of the MAKEALL patch, of course). I can send a new one if required - please let me know. Currently running a ./MAKEALL arm - I assume it'll complete w/o errors (except for the ohci-hcd.c warnings I mentioned previously that are not due to this patch series). Are you going to refresh the next branch anytime soon or are you planing on doing this once the master branch is merged to arm/master? I can refresh u-boot-tegra/next with Allen's V10 SPL patches and re-push it, but if the pull of the SPL code from u-boot-tegra/master is going to go into ARM/master anytime soon, I'd rather wait and just do it one final time. Albert - any idea of an ETA on pulling u-boot-tegra/master into ARM/master? If I'm not mistaken, the current u-boot-tegra/master branch has issues with ./MAKEALL arm, not building everything it should. I'd rather not pull it unless Allen's fix is added (or even better, unless the master branch is force-updated to fix the original commit which introduced the issue, if you and Allen are willing to go this far). Tom Thanks, Lucas Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Problems with a P2020 board
Hi. We have a new board which we are suing with U-boot. The CPU is a P2020. I am having a few minor problems, and I was hoping to get some help. - Boot Count. We are keen to use the boot counter feature, but I am struggling to find a suitable register in the P2020. The file arch/powerpc/lib/bootcount.c list a few locations that work with other PowerPC chips, but I can't find any of those registers in the P2020 documentation. - SPI Flash seems very slow. The SPI flash accesses all seem to be very slow. I can increase the SPI clock (to 40 MHz) and this helps, but the real problem is the code in drivers/spi/fsl_espi.c. Here there is an 80us delay after each 32-bit value is written to the TX FIFO. I don't understand why this delay is there? If I reduce it to 2 usec everything still works, and SPI Flash accesses are much faster. I can easily produce a patch to remove or reduce this delay, but I'd rather know why it was there in the first place? - Timer Interrupts seem to stop. Once U-boot has started the timer interrupts seem to stop. I have added a test command that prints out the timestamp variable (from arch/powerpc/lib/interrupts.c). I can see that when we enter the interactive loop this variable stops incrementing. I can add boot scripts that output this value, and it is incrementing until the console becomes interactive. Has anyone else seen a problem like this? Many thanks for any help you can offer us. Mark Marshall. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Problems with a P2020 board
Hi. We have a new board which we are suing with U-boot. The CPU is a P2020. I am having a few minor problems, and I was hoping to get some help. - Boot Count. We are keen to use the boot counter feature, but I am struggling to find a suitable register in the P2020. The file arch/powerpc/lib/bootcount.c list a few locations that work with other PowerPC chips, but I can't find any of those registers in the P2020 documentation. Me too on finding such a register. - SPI Flash seems very slow. The SPI flash accesses all seem to be very slow. I can increase the SPI clock (to 40 MHz) and this helps, but the real problem is the code in drivers/spi/fsl_espi.c. Here there is an 80us delay after each 32-bit value is written to the TX FIFO. I don't understand why this delay is there? If I reduce it to 2 usec everything still works, and SPI Flash accesses are much faster. I can easily produce a patch to remove or reduce this delay, but I'd rather know why it was there in the first place? - Timer Interrupts seem to stop. Once U-boot has started the timer interrupts seem to stop. I have added a test command that prints out the timestamp variable (from arch/powerpc/lib/interrupts.c). I can see that when we enter the interactive loop this variable stops incrementing. I can add boot scripts that output this value, and it is incrementing until the console becomes interactive. Has anyone else seen a problem like this? I have but only when running from our BDI2000/BDI3000 emulator. We figured it was something with the emulator settings but I was never convinced. If you find out why, please let me know. Oh, we have a P2010 though. Jocke ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Problems with a P2020 board
On 08/30/2012 03:12 PM, Joakim Tjernlund wrote: - Boot Count. We are keen to use the boot counter feature, but I am struggling to find a suitable register in the P2020. The file arch/powerpc/lib/bootcount.c list a few locations that work with other PowerPC chips, but I can't find any of those registers in the P2020 documentation. Me too on finding such a register. If you don't have such registers, a bit of reserved SDRAM might be a solution. That already implemented for some boards. See bootcount_store() and bootcount_load() in: board/keymile/km_arm/km_arm.c This RAM bootcount driver will be moved to a common location by the bootcount consolidation patches that are pending. Thanks, Stefan ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] OMAP Reset fails when kernel governor 'ondemand' is active
Hi, hope somebody here might help: I have tried with many combinations of u-boot: 2011.09 / 2011.07 kernel 3.2.19 / 3.5 / 3.6rc3 gumstix OveroWater (TI OMAP 3530) / OveroFireStorm (TI DM3730)) All tested combinations share the same bug: As soon as I activate governor 'ondemand' and try to restart the machine - either by 'shutdown -r' or by pressing reset - all next boots (from MMC) fail before or during kernel uncompress. The only way out is powering off and on again. Help appreciated :) Andreas ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] usb: ehci: don't print debug output
This is clearly some sort of debug output and should not be printed during normal operation. Signed-off-by: Lucas Stach d...@lynxeye.de --- drivers/usb/host/ehci-hcd.c | 2 +- 1 Datei geändert, 1 Zeile hinzugefügt(+), 1 Zeile entfernt(-) diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c index 2f4fa5e..eb9e323 100644 --- a/drivers/usb/host/ehci-hcd.c +++ b/drivers/usb/host/ehci-hcd.c @@ -863,7 +863,7 @@ int usb_lowlevel_init(void) reg = ehci_readl(hccr-cr_hcsparams); descriptor.hub.bNbrPorts = HCS_N_PORTS(reg); - printf(Register %x NbrPorts %d\n, reg, descriptor.hub.bNbrPorts); + debug(Register %x NbrPorts %d\n, reg, descriptor.hub.bNbrPorts); /* Port Indicators */ if (HCS_INDICATOR(reg)) descriptor.hub.wHubCharacteristics |= 0x80; -- 1.7.11.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] usb: remove unnecessary packed attributes
We don't actually need to pack those structs, as they
are not used to do actual hardware access.
This avoids some unaligned accesses and therefore makes
the EHCI stack work on ARMv7 without compiler workarounds.
Signed-off-by: Lucas Stach d...@lynxeye.de
---
drivers/usb/host/ehci-hcd.c | 2 +-
include/usb.h | 2 +-
2 Dateien geändert, 2 Zeilen hinzugefügt(+), 2 Zeilen entfernt(-)
diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
index 18b4bc6..2f4fa5e 100644
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -45,7 +45,7 @@ static struct descriptor {
struct usb_linux_config_descriptor config;
struct usb_linux_interface_descriptor interface;
struct usb_endpoint_descriptor endpoint;
-} __attribute__ ((packed)) descriptor = {
+} descriptor = {
{
0x8,/* bDescLength */
0x29, /* bDescriptorType: hub descriptor */
diff --git a/include/usb.h b/include/usb.h
index ba3d169..63730ee 100644
--- a/include/usb.h
+++ b/include/usb.h
@@ -369,7 +369,7 @@ struct usb_hub_descriptor {
unsigned char PortPowerCtrlMask[(USB_MAXCHILDREN+1+7)/8];
/* DeviceRemovable and PortPwrCtrlMask want to be variable-length
bitmaps that hold max 255 entries. (bit0 is ignored) */
-} __attribute__ ((packed));
+};
struct usb_hub_device {
--
1.7.11.4
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[U-Boot] trouble with mmc on origen
Jaehoon, I get timeouts on multiblock mmc reads with v2012.07 u-boot. I did a bisect and found that it is broken back to 442d55685e1e2310d546044a6519ae73e4ba348a mmc: support the sdhci instead of s5p_mmc for samsung-soc and 236bfecff8091356d81e79da3281b9e4af967468 mmc: add the quirk to use the sdhci for samsung-soc That second commit seems to adds two new quirks SDHCI_QUIRK_NO_HISPD_BIT and SDHCI_QUIRK_BROKEN_VOLTAGE but I don't see any board using these so perhaps these need to be enabled for origen? Thanks, --john ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v10 00/16] split tegra20 arm7 code into separate SPL
Albert, -Original Message- From: Albert ARIBAUD [mailto:albert.u.b...@aribaud.net] Sent: Thursday, August 30, 2012 1:41 AM To: Tom Warren Cc: Lucas Stach; Allen Martin; swar...@wwwdotorg.org; s...@chromium.org; thierry.red...@avionic-design.de; u-boot@lists.denx.de Subject: Re: [PATCH v10 00/16] split tegra20 arm7 code into separate SPL Hi Tom, On Wed, 29 Aug 2012 14:10:19 -0700, Tom Warren twar...@nvidia.com wrote: Lucas, -Original Message- From: Lucas Stach [mailto:d...@lynxeye.de] Sent: Wednesday, August 29, 2012 1:54 PM To: Tom Warren Cc: Allen Martin; swar...@wwwdotorg.org; s...@chromium.org; thierry.red...@avionic-design.de; u-boot@lists.denx.de Subject: Re: [PATCH v10 00/16] split tegra20 arm7 code into separate SPL Hello Tom, Am Mittwoch, den 29.08.2012, 09:55 -0700 schrieb Tom Warren: Allen/Albert, -Original Message- From: Allen Martin [mailto:amar...@nvidia.com] Sent: Tuesday, August 28, 2012 5:08 PM To: Tom Warren; swar...@wwwdotorg.org; s...@chromium.org; thierry.red...@avionic-design.de; d...@lynxeye.de Cc: u-boot@lists.denx.de; Allen Martin Subject: [PATCH v10 00/16] split tegra20 arm7 code into separate SPL This patch series fixes a long standing problem with the tegra20 u-boot build. Tegra20 contains an ARM7TDMI boot processor and a Cortex A9 main processor. Prior to this patch series this was accomplished by #ifdefing out any armv7 code from the early boot sequence and creating a single binary that runs on both both the ARM7TDMI and A9. This was very fragile as changes to compiler options or any additions or rearranging of the early boot code could add additional armv7 specific code causing it to fail on the ARM7TDMI. This patch series pulls all the armv4t code out into a separate SPL that does nothing more than initialize the A9 and transfer control to it. The resultint SPL and armv7 u-boot are concatenated together into a single image. This patch series is also available from: git://github.com/arm000/u-boot.git branch: tegra-spl-v10 Changes: v10: - added fix to MAKEALL script so that it correctly parses new boards.cfg I applied this to u-boot-tegra/master and pushed the new code upstream. The pull request remains the same (except for the inclusion of the MAKEALL patch, of course). I can send a new one if required - please let me know. Currently running a ./MAKEALL arm - I assume it'll complete w/o errors (except for the ohci-hcd.c warnings I mentioned previously that are not due to this patch series). Are you going to refresh the next branch anytime soon or are you planing on doing this once the master branch is merged to arm/master? I can refresh u-boot-tegra/next with Allen's V10 SPL patches and re-push it, but if the pull of the SPL code from u-boot-tegra/master is going to go into ARM/master anytime soon, I'd rather wait and just do it one final time. Albert - any idea of an ETA on pulling u-boot-tegra/master into ARM/master? If I'm not mistaken, the current u-boot-tegra/master branch has issues with ./MAKEALL arm, not building everything it should. I'd rather not pull it unless Allen's fix is added (or even better, unless the master branch is force-updated to fix the original commit which introduced the issue, if you and Allen are willing to go this far). I stated above (although not directly to you) that I'd applied Allen's v10 SPL patchset, which includes a MAKEALL arm fix, and pushed to u-boot-tegra/master. I can generate a new pull request if necessary, although the only change will be the addition of the MAKEALL patch. Please let me know if you need a new pull request. Allen has also done a separate patchset (v2) for MAKEALL to correct some problems it had for both ARM and powerpc with duplicated builds, etc. I don't think it's necessary for Tegra specifically - my run of ./MAKEALL arm on current u-boot-tegra/master completed w/316 boards built, include the tegra20 boards. Tom Tom Thanks, Lucas Amicalement, -- Albert. -- nvpublic ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] usb: ehci: don't print debug output
Dear Lucas Stach, This is clearly some sort of debug output and should not be printed during normal operation. Signed-off-by: Lucas Stach d...@lynxeye.de I think we should apply this ... yet it's been in uboot for so long, so I'd like to hear other people opinion :) --- drivers/usb/host/ehci-hcd.c | 2 +- 1 Datei geändert, 1 Zeile hinzugefügt(+), 1 Zeile entfernt(-) diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c index 2f4fa5e..eb9e323 100644 --- a/drivers/usb/host/ehci-hcd.c +++ b/drivers/usb/host/ehci-hcd.c @@ -863,7 +863,7 @@ int usb_lowlevel_init(void) reg = ehci_readl(hccr-cr_hcsparams); descriptor.hub.bNbrPorts = HCS_N_PORTS(reg); - printf(Register %x NbrPorts %d\n, reg, descriptor.hub.bNbrPorts); + debug(Register %x NbrPorts %d\n, reg, descriptor.hub.bNbrPorts); /* Port Indicators */ if (HCS_INDICATOR(reg)) descriptor.hub.wHubCharacteristics |= 0x80; Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] usb: remove unnecessary packed attributes
Dear Lucas Stach,
We don't actually need to pack those structs, as they
are not used to do actual hardware access.
This avoids some unaligned accesses and therefore makes
the EHCI stack work on ARMv7 without compiler workarounds.
Signed-off-by: Lucas Stach d...@lynxeye.de
I need to review this properly, will get back to it soon.
Until then, CCing other good fellows.
---
drivers/usb/host/ehci-hcd.c | 2 +-
include/usb.h | 2 +-
2 Dateien geändert, 2 Zeilen hinzugefügt(+), 2 Zeilen entfernt(-)
diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
index 18b4bc6..2f4fa5e 100644
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -45,7 +45,7 @@ static struct descriptor {
struct usb_linux_config_descriptor config;
struct usb_linux_interface_descriptor interface;
struct usb_endpoint_descriptor endpoint;
-} __attribute__ ((packed)) descriptor = {
+} descriptor = {
{
0x8,/* bDescLength */
0x29, /* bDescriptorType: hub descriptor */
diff --git a/include/usb.h b/include/usb.h
index ba3d169..63730ee 100644
--- a/include/usb.h
+++ b/include/usb.h
@@ -369,7 +369,7 @@ struct usb_hub_descriptor {
unsigned char PortPowerCtrlMask[(USB_MAXCHILDREN+1+7)/8];
/* DeviceRemovable and PortPwrCtrlMask want to be variable-length
bitmaps that hold max 255 entries. (bit0 is ignored) */
-} __attribute__ ((packed));
+};
struct usb_hub_device {
Best regards,
Marek Vasut
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Re: [U-Boot] Please pull u-boot-staging/tr...@ti.com
On Thu, Aug 30, 2012 at 09:44:54AM +0200, Albert ARIBAUD wrote: Hi Tom, On Sat, 18 Aug 2012 13:53:16 -0700, Tom Rini tr...@ti.com wrote: On Sat, Aug 18, 2012 at 07:15:56AM -0700, Tom Rini wrote: On Sat, Aug 18, 2012 at 08:28:55AM +0200, Albert ARIBAUD wrote: Hi Tom, On Fri, 17 Aug 2012 14:52:01 -0700, Tom Rini tr...@ti.com wrote: Hello, This replaces my previous pull-request and is new warning free on MAKEALL -a arm for ELDK4.2/5.1/5.2.1. The following changes since commit 4d3c95f5ea7c737a21cd6b9c59435ee693b3f127: zfs: Add ZFS filesystem support (2012-08-09 23:42:20 +0200) are available in the git repository at: git://git.denx.de/u-boot-staging tr...@ti.com for you to fetch changes up to 5d26e4de33fab7b132e8a8036ac54176f537d79f: ARM: add Raspberry Pi model B board, using BCM2835 SoC (2012-08-15 09:43:47 -0700) John Rigby (1): u8500: Separating mmc config parameters from driver Mathieu J. Poirier (10): snowball: Add support for ux500 based snowball board u8500: Moving prcmu to cpu directory snowball: Adding architecture dependent initialisation snowball: Adding CPU clock initialisation snowball: Moving to ux500.v2 addess scheme for PRCMU access snowball: applying power to LAN and GBF controllers u8500: Moving processor-specific functions to cpu area. u8500: Enabling power to MMC device on AB8500 V2 armv7: Adding cpu specific cache managmenent snowball: Adding board specific cache cleanup routine Stephen Warren (4): README: fix references to config_cmd_default.h ARM: arm1176: enable instruction cache in arch_cpu_init() ARM: add basic support for the Broadcom BCM2835 SoC ARM: add Raspberry Pi model B board, using BCM2835 SoC MAINTAINERS|8 + README |4 +- arch/arm/cpu/arm1176/bcm2835/Makefile | 37 + arch/arm/cpu/arm1176/bcm2835/config.mk | 19 + arch/arm/cpu/arm1176/bcm2835/lowlevel_init.S | 19 + arch/arm/cpu/arm1176/bcm2835/reset.c | 35 + arch/arm/cpu/arm1176/bcm2835/timer.c | 55 ++ arch/arm/cpu/arm1176/cpu.c |7 + arch/arm/cpu/armv7/cpu.c |8 + arch/arm/cpu/armv7/u8500/Makefile |2 +- arch/arm/cpu/armv7/u8500/clock.c | 34 + arch/arm/cpu/armv7/u8500/cpu.c | 192 + .../arm/cpu/armv7}/u8500/prcmu.c | 128 +++- arch/arm/include/asm/arch-bcm2835/gpio.h | 66 ++ arch/arm/include/asm/arch-bcm2835/timer.h | 37 + arch/arm/include/asm/arch-bcm2835/wdog.h | 36 + arch/arm/include/asm/arch-u8500/clock.h|5 +- arch/arm/include/asm/arch-u8500/db8500_gpio.h | 42 ++ arch/arm/include/asm/arch-u8500/db8500_pincfg.h| 170 + arch/arm/include/asm/arch-u8500/hardware.h | 33 +- .../arm/include/asm/arch-u8500/prcmu.h | 35 +- arch/arm/include/asm/arch-u8500/sys_proto.h|1 + board/armltd/vexpress/ca9x4_ct_vxp.c | 21 +- board/raspberrypi/rpi_b/Makefile | 34 + board/raspberrypi/rpi_b/rpi_b.c| 34 + board/st-ericsson/snowball/Makefile| 49 ++ board/st-ericsson/snowball/db8500_pins.h | 745 board/st-ericsson/snowball/snowball.c | 348 + board/st-ericsson/u8500/Makefile |2 +- board/st-ericsson/u8500/u8500_href.c | 100 +-- boards.cfg | 2 + drivers/gpio/Makefile |2 + drivers/gpio/bcm2835_gpio.c| 89 +++ drivers/gpio/db8500_gpio.c | 221 ++ drivers/mmc/arm_pl180_mmci.c | 131 ++-- drivers/mmc/arm_pl180_mmci.h | 27 +- drivers/serial/serial_pl01x.c |2 + include/configs/rpi_b.h| 104 +++ include/configs/snowball.h | 266 +++ 39 files changed, 2937 insertions(+), 213 deletions(-) create mode 100644 arch/arm/cpu/arm1176/bcm2835/Makefile create mode 100644 arch/arm/cpu/arm1176/bcm2835/config.mk create mode 100644 arch/arm/cpu/arm1176/bcm2835/lowlevel_init.S create mode 100644 arch/arm/cpu/arm1176/bcm2835/reset.c create mode
Re: [U-Boot] [PATCH] MX5: efikamx: substitutes GPIO_NUMBER with IMX_GPIO_NR
That's odd, I thought I fixed that.
+#define EFIKAMX_USB_HUB_RESET IMX_GPIO_NR(1, 5)
+#define EFIKAMX_USB_PHY_RESET IMX_GPIO_NR(2, 9)
I copied the above two lines from my patch to the ML.. what happened here? :(
--
Matt Sealey m...@genesi-usa.com
Product Development Analyst, Genesi USA, Inc.
On Tue, Aug 28, 2012 at 8:10 AM, Stefano Babic sba...@denx.de wrote:
The macro to get the gpio number id was renamed to
IMX_GPIO_NR as in kernel. Fix the wrong name in efika.
Signed-off-by: Stefano Babic sba...@denx.de
CC: Matt Sealey m...@genesi-usa.com
---
board/genesi/mx51_efikamx/efikamx.c | 48
+--
1 file changed, 24 insertions(+), 24 deletions(-)
diff --git a/board/genesi/mx51_efikamx/efikamx.c
b/board/genesi/mx51_efikamx/efikamx.c
index 18ab8d9..3968040 100644
--- a/board/genesi/mx51_efikamx/efikamx.c
+++ b/board/genesi/mx51_efikamx/efikamx.c
@@ -81,14 +81,14 @@ static u32 get_mx_rev(void)
*/
/* set to 1 in order to get correct value on board rev 1.1 */
- gpio_direction_output(GPIO_NUMBER(3, 16), 1);
- gpio_direction_input(GPIO_NUMBER(3, 11));
- gpio_direction_input(GPIO_NUMBER(3, 16));
- gpio_direction_input(GPIO_NUMBER(3, 17));
+ gpio_direction_output(IMX_GPIO_NR(3, 16), 1);
+ gpio_direction_input(IMX_GPIO_NR(3, 11));
+ gpio_direction_input(IMX_GPIO_NR(3, 16));
+ gpio_direction_input(IMX_GPIO_NR(3, 17));
- rev |= (!!gpio_get_value(GPIO_NUMBER(3, 16))) 0;
- rev |= (!!gpio_get_value(GPIO_NUMBER(3, 17))) 1;
- rev |= (!!gpio_get_value(GPIO_NUMBER(3, 11))) 2;
+ rev |= (!!gpio_get_value(IMX_GPIO_NR(3, 16))) 0;
+ rev |= (!!gpio_get_value(IMX_GPIO_NR(3, 17))) 1;
+ rev |= (!!gpio_get_value(IMX_GPIO_NR(3, 11))) 2;
return (~rev 0x7) + 1;
}
@@ -104,11 +104,11 @@ static inline u32 get_sb_rev(void)
imx_iomux_v3_setup_multiple_pads(efikasb_revision_pads,
ARRAY_SIZE(efikasb_revision_pads));
- gpio_direction_input(GPIO_NUMBER(2, 28));
- gpio_direction_input(GPIO_NUMBER(2, 29));
+ gpio_direction_input(IMX_GPIO_NR(2, 28));
+ gpio_direction_input(IMX_GPIO_NR(2, 29));
- rev |= (!!gpio_get_value(GPIO_NUMBER(2, 28))) 0;
- rev |= (!!gpio_get_value(GPIO_NUMBER(2, 29))) 1;
+ rev |= (!!gpio_get_value(IMX_GPIO_NR(2, 28))) 0;
+ rev |= (!!gpio_get_value(IMX_GPIO_NR(2, 29))) 1;
return rev;
}
@@ -159,9 +159,9 @@ static iomux_v3_cfg_t efikamx_spi_pads[] = {
MX51_PAD_GPIO1_6__GPIO1_6,
};
-#define EFIKAMX_SPI_SS0GPIO_NUMBER(4, 24)
-#define EFIKAMX_SPI_SS1GPIO_NUMBER(4, 25)
-#define EFIKAMX_PMIC_IRQ GPIO_NUMBER(1, 6)
+#define EFIKAMX_SPI_SS0IMX_GPIO_NR(4, 24)
+#define EFIKAMX_SPI_SS1IMX_GPIO_NR(4, 25)
+#define EFIKAMX_PMIC_IRQ IMX_GPIO_NR(1, 6)
/*
* PMIC configuration
@@ -282,15 +282,15 @@ static iomux_v3_cfg_t efikamx_sdhc1_pads[] = {
MX51_PAD_GPIO1_1__SD1_WP,
};
-#define EFIKAMX_SDHC1_WP GPIO_NUMBER(1, 1)
+#define EFIKAMX_SDHC1_WP IMX_GPIO_NR(1, 1)
static iomux_v3_cfg_t efikamx_sdhc1_cd_pads[] = {
MX51_PAD_GPIO1_0__SD1_CD,
MX51_PAD_EIM_CS2__SD1_CD,
};
-#define EFIKAMX_SDHC1_CD GPIO_NUMBER(1, 0)
-#define EFIKASB_SDHC1_CD GPIO_NUMBER(2, 27)
+#define EFIKAMX_SDHC1_CD IMX_GPIO_NR(1, 0)
+#define EFIKASB_SDHC1_CD IMX_GPIO_NR(2, 27)
static iomux_v3_cfg_t efikasb_sdhc2_pads[] = {
MX51_PAD_SD2_CMD__SD2_CMD,
@@ -303,8 +303,8 @@ static iomux_v3_cfg_t efikasb_sdhc2_pads[] = {
MX51_PAD_GPIO1_8__SD2_CD,
};
-#define EFIKASB_SDHC2_CD GPIO_NUMBER(1, 8)
-#define EFIKASB_SDHC2_WP GPIO_NUMBER(1, 7)
+#define EFIKASB_SDHC2_CD IMX_GPIO_NR(1, 8)
+#define EFIKASB_SDHC2_WP IMX_GPIO_NR(1, 7)
static inline uint32_t efikamx_mmc_getcd(u32 base)
{
@@ -415,17 +415,17 @@ static inline void setup_iomux_usb(void) { }
* Smarttop LED pad config is done in the DCD
*
*/
-#define EFIKAMX_LED_BLUE GPIO_NUMBER(3, 13)
-#define EFIKAMX_LED_GREEN GPIO_NUMBER(3, 14)
-#define EFIKAMX_LED_REDGPIO_NUMBER(3, 15)
+#define EFIKAMX_LED_BLUE IMX_GPIO_NR(3, 13)
+#define EFIKAMX_LED_GREEN IMX_GPIO_NR(3, 14)
+#define EFIKAMX_LED_REDIMX_GPIO_NR(3, 15)
static iomux_v3_cfg_t efikasb_led_pads[] = {
MX51_PAD_GPIO1_3__GPIO1_3,
MX51_PAD_EIM_CS0__GPIO2_25,
};
-#define EFIKASB_CAPSLOCK_LED GPIO_NUMBER(2, 25)
-#define EFIKASB_MESSAGE_LEDGPIO_NUMBER(1, 3) /* Note: active low */
+#define EFIKASB_CAPSLOCK_LED IMX_GPIO_NR(2, 25)
+#define EFIKASB_MESSAGE_LEDIMX_GPIO_NR(1, 3) /* Note: active low */
/*
* Board initialization
--
1.7.9.5
___
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U-Boot@lists.denx.de
[U-Boot] [PATCH 0/4] USB multi controller
Hi all, this is a follow up on the patch USB: EHCI: Initialize multiple USB controllers at once from Jim Lin. It takes some of the code but has undergone some heavy reworking. When we remove the ifdef horror from the above mentioned patch it's mostly a big interface change to the usb subsystem. As this creates a lot of churn I've split this up into a series. Every patch is self contained so it doesn't break compiles and *should* not regress any functionality on it's own. At least the series is bisectable in case anything goes wrong. I've compile tested all the ARM configs. Both the lowlevel usb and ehci interface change are backward compatible, so implementations that only use one controller can choose to ignore the new interface. All implementations are updated to work with the new function prototypes. For Tegra I've included a patch to actually use the new ehci interface. Patches are based on a Tegra tree with some relevant changes from u-boot-usb picked over, so they should apply to u-boot-usb/master. Patch 4 also includes some cosmetic changes, to make the output of the usb commands more readable. On my Colibri T20, with a total of 3 usb controllers of which 2 are enabled in the device tree, output now looks like this: Tegra20 (Colibri) # usb start (Re)start USB... USB0: USB EHCI 1.00 scanning bus 0 for devices... 2 USB Device(s) found USB1: USB EHCI 1.00 scanning bus 1 for devices... 2 USB Device(s) found USB2: lowlevel init failed scanning usb for storage devices... 1 Storage Device(s) found scanning usb for ethernet devices... 1 Ethernet Device(s) found Tegra20 (Colibri) # usb tree USB device tree: 1 Hub (480 Mb/s, 0mA) | u-boot EHCI Host Controller | +-2 Mass Storage (480 Mb/s, 200mA) SanDisk U3 Titanium 2845221DC342AE8F 3 Hub (480 Mb/s, 0mA) | u-boot EHCI Host Controller | +-4 Vendor specific (480 Mb/s, 4mA) ASIX Elec. Corp. AX88772B 01 Lucas Stach (4): usb: lowlevel interface change to support multiple controllers usb: ehci: rework to take advantage of new lowlevel interface tegra20: port to new ehci interface usb: add support for multiple usb controllers arch/arm/cpu/arm920t/s3c24x0/usb_ohci.c | 4 +- arch/arm/cpu/armv7/tegra20/usb.c | 15 +--- arch/arm/include/asm/arch-tegra20/usb.h | 4 +- arch/arm/include/asm/ehci-omap.h | 10 ++- arch/mips/cpu/mips32/au1x00/au1x00_usb_ohci.c | 4 +- arch/powerpc/cpu/mpc5xxx/usb_ohci.c | 4 +- arch/powerpc/cpu/ppc4xx/usb_ohci.c| 4 +- arch/sparc/cpu/leon3/usb_uhci.c | 4 +- arch/sparc/lib/bootm.c| 2 +- board/htkw/mcx/mcx.c | 6 +- board/mpl/common/usb_uhci.c | 4 +- board/technexion/twister/twister.c| 6 +- board/teejet/mt_ventoux/mt_ventoux.c | 6 +- board/ti/beagle/beagle.c | 6 +- board/ti/panda/panda.c| 6 +- common/cmd_usb.c | 16 +++- common/usb.c | 106 +++--- common/usb_hub.c | 2 +- common/usb_storage.c | 2 +- drivers/usb/eth/usb_ether.c | 2 +- drivers/usb/host/ehci-armada100.c | 15 ++-- drivers/usb/host/ehci-atmel.c | 11 ++- drivers/usb/host/ehci-core.h | 29 -- drivers/usb/host/ehci-exynos.c| 15 ++-- drivers/usb/host/ehci-fsl.c | 11 ++- drivers/usb/host/ehci-hcd.c | 124 ++ drivers/usb/host/ehci-ixp4xx.c| 15 ++-- drivers/usb/host/ehci-marvell.c | 15 ++-- drivers/usb/host/ehci-mpc512x.c | 25 ++ drivers/usb/host/ehci-mx5.c | 11 ++- drivers/usb/host/ehci-mx6.c | 11 ++- drivers/usb/host/ehci-mxc.c | 11 ++- drivers/usb/host/ehci-mxs.c | 28 +++--- drivers/usb/host/ehci-omap.c | 10 ++- drivers/usb/host/ehci-pci.c | 15 ++-- drivers/usb/host/ehci-ppc4xx.c| 11 ++- drivers/usb/host/ehci-tegra.c | 14 ++- drivers/usb/host/ehci-vct.c | 9 +- drivers/usb/host/ehci.h | 4 +- drivers/usb/host/isp116x-hcd.c| 4 +- drivers/usb/host/ohci-hcd.c | 4 +- drivers/usb/host/r8a66597-hcd.c | 4 +- drivers/usb/host/sl811-hcd.c | 4 +- drivers/usb/musb/musb_hcd.c | 4 +- include/usb.h | 10 ++- include/usb/mv_udc.h | 2 +- 46 Dateien geändert, 309 Zeilen hinzugefügt(+), 320 Zeilen entfernt(-) delete mode 100644 drivers/usb/host/ehci-core.h -- 1.7.11.4
[U-Boot] [PATCH 1/4] usb: lowlevel interface change to support multiple controllers
Carry an index in the lowlevel usb functions to make specify the
respective usb controller.
Also pass through an controller struct from lowlevel_init to the
creation of the root usb device of this controller.
Signed-off-by: Lucas Stach d...@lynxeye.de
---
arch/arm/cpu/arm920t/s3c24x0/usb_ohci.c | 4 ++--
arch/mips/cpu/mips32/au1x00/au1x00_usb_ohci.c | 4 ++--
arch/powerpc/cpu/mpc5xxx/usb_ohci.c | 4 ++--
arch/powerpc/cpu/ppc4xx/usb_ohci.c| 4 ++--
arch/sparc/cpu/leon3/usb_uhci.c | 4 ++--
arch/sparc/lib/bootm.c| 2 +-
board/mpl/common/usb_uhci.c | 4 ++--
common/usb.c | 10 ++
common/usb_hub.c | 2 +-
drivers/usb/host/ehci-hcd.c | 4 ++--
drivers/usb/host/isp116x-hcd.c| 4 ++--
drivers/usb/host/ohci-hcd.c | 4 ++--
drivers/usb/host/r8a66597-hcd.c | 4 ++--
drivers/usb/host/sl811-hcd.c | 4 ++--
drivers/usb/musb/musb_hcd.c | 4 ++--
include/usb.h | 10 +++---
include/usb/mv_udc.h | 2 +-
17 Dateien geändert, 40 Zeilen hinzugefügt(+), 34 Zeilen entfernt(-)
diff --git a/arch/arm/cpu/arm920t/s3c24x0/usb_ohci.c
b/arch/arm/cpu/arm920t/s3c24x0/usb_ohci.c
index cf0335c..944bb32 100644
--- a/arch/arm/cpu/arm920t/s3c24x0/usb_ohci.c
+++ b/arch/arm/cpu/arm920t/s3c24x0/usb_ohci.c
@@ -1659,7 +1659,7 @@ static void hc_release_ohci(struct ohci *ohci)
*/
static char ohci_inited = 0;
-int usb_lowlevel_init(void)
+int usb_lowlevel_init(int index, void **controller)
{
struct s3c24x0_clock_power *clk_power = s3c24x0_get_base_clock_power();
struct s3c24x0_gpio *gpio = s3c24x0_get_base_gpio();
@@ -1738,7 +1738,7 @@ int usb_lowlevel_init(void)
return 0;
}
-int usb_lowlevel_stop(void)
+int usb_lowlevel_stop(int index)
{
struct s3c24x0_clock_power *clk_power = s3c24x0_get_base_clock_power();
diff --git a/arch/mips/cpu/mips32/au1x00/au1x00_usb_ohci.c
b/arch/mips/cpu/mips32/au1x00/au1x00_usb_ohci.c
index 7647e11..c747767 100644
--- a/arch/mips/cpu/mips32/au1x00/au1x00_usb_ohci.c
+++ b/arch/mips/cpu/mips32/au1x00/au1x00_usb_ohci.c
@@ -1565,7 +1565,7 @@ static void hc_release_ohci (ohci_t *ohci)
*/
static char ohci_inited = 0;
-int usb_lowlevel_init(void)
+int usb_lowlevel_init(int index, void **controller)
{
u32 pin_func;
u32 sys_freqctrl, sys_clksrc;
@@ -1707,7 +1707,7 @@ int usb_lowlevel_init(void)
return -1;
}
-int usb_lowlevel_stop(void)
+int usb_lowlevel_stop(int index)
{
/* this gets called really early - before the controller has */
/* even been initialized! */
diff --git a/arch/powerpc/cpu/mpc5xxx/usb_ohci.c
b/arch/powerpc/cpu/mpc5xxx/usb_ohci.c
index 6d91525..607034b 100644
--- a/arch/powerpc/cpu/mpc5xxx/usb_ohci.c
+++ b/arch/powerpc/cpu/mpc5xxx/usb_ohci.c
@@ -1561,7 +1561,7 @@ static void hc_release_ohci (ohci_t *ohci)
*/
static char ohci_inited = 0;
-int usb_lowlevel_init(void)
+int usb_lowlevel_init(int index, void **controller)
{
/* Set the USB Clock */
@@ -1629,7 +1629,7 @@ int usb_lowlevel_init(void)
return 0;
}
-int usb_lowlevel_stop(void)
+int usb_lowlevel_stop(int index)
{
/* this gets called really early - before the controller has */
/* even been initialized! */
diff --git a/arch/powerpc/cpu/ppc4xx/usb_ohci.c
b/arch/powerpc/cpu/ppc4xx/usb_ohci.c
index 14c6a28..4ce2726 100644
--- a/arch/powerpc/cpu/ppc4xx/usb_ohci.c
+++ b/arch/powerpc/cpu/ppc4xx/usb_ohci.c
@@ -1566,7 +1566,7 @@ static void hc_release_ohci (ohci_t *ohci)
*/
static char ohci_inited = 0;
-int usb_lowlevel_init(void)
+int usb_lowlevel_init(int index, void **controller)
{
memset (gohci, 0, sizeof (ohci_t));
memset (urb_priv, 0, sizeof (urb_priv_t));
@@ -1624,7 +1624,7 @@ int usb_lowlevel_init(void)
return 0;
}
-int usb_lowlevel_stop(void)
+int usb_lowlevel_stop(int index)
{
/* this gets called really early - before the controller has */
/* even been initialized! */
diff --git a/arch/sparc/cpu/leon3/usb_uhci.c b/arch/sparc/cpu/leon3/usb_uhci.c
index 62cc25d..b3b8a4d 100644
--- a/arch/sparc/cpu/leon3/usb_uhci.c
+++ b/arch/sparc/cpu/leon3/usb_uhci.c
@@ -706,7 +706,7 @@ void handle_usb_interrupt(void)
/* init uhci
*/
-int usb_lowlevel_init(void)
+int usb_lowlevel_init(int index, void **controller)
{
unsigned char temp;
ambapp_ahbdev ahbdev;
@@ -745,7 +745,7 @@ int usb_lowlevel_init(void)
/* stop uhci
*/
-int usb_lowlevel_stop(void)
+int usb_lowlevel_stop(int index)
{
if (grusb_irq == -1)
return 1;
diff --git a/arch/sparc/lib/bootm.c b/arch/sparc/lib/bootm.c
index e5b933d..bcc6358 100644
--- a/arch/sparc/lib/bootm.c
+++
[U-Boot] [PATCH 4/4] usb: add support for multiple usb controllers
Allows to initialize more than one USB controller at once.
Signed-off-by: Lucas Stach d...@lynxeye.de
---
common/cmd_usb.c| 16 +--
common/usb.c| 104 +++-
common/usb_storage.c| 2 +-
drivers/usb/eth/usb_ether.c | 2 +-
4 Dateien geändert, 68 Zeilen hinzugefügt(+), 56 Zeilen entfernt(-)
diff --git a/common/cmd_usb.c b/common/cmd_usb.c
index a8e3ae5..6cefc0c 100644
--- a/common/cmd_usb.c
+++ b/common/cmd_usb.c
@@ -517,8 +517,7 @@ int do_usb(cmd_tbl_t *cmdtp, int flag, int argc, char *
const argv[])
bootstage_mark_name(BOOTSTAGE_ID_USB_START, usb_start);
usb_stop();
printf((Re)start USB...\n);
- i = usb_init();
- if (i = 0) {
+ if (usb_init() = 0) {
#ifdef CONFIG_USB_STORAGE
/* try to recognize storage devices immediately */
usb_stor_curr_dev = usb_stor_scan(1);
@@ -527,6 +526,9 @@ int do_usb(cmd_tbl_t *cmdtp, int flag, int argc, char *
const argv[])
/* try to recognize ethernet devices immediately */
usb_ether_curr_dev = usb_host_eth_scan(1);
#endif
+#ifdef CONFIG_USB_KEYBOARD
+ drv_usb_kbd_init();
+#endif
}
return 0;
}
@@ -553,8 +555,14 @@ int do_usb(cmd_tbl_t *cmdtp, int flag, int argc, char *
const argv[])
return 1;
}
if (strncmp(argv[1], tree, 4) == 0) {
- printf(\nDevice Tree:\n);
- usb_show_tree(usb_get_dev_index(0));
+ puts(USB device tree:\n);
+ for (i = 0; i USB_MAX_DEVICE; i++) {
+ dev = usb_get_dev_index(i);
+ if (dev == NULL)
+ break;
+ if (dev-parent == NULL)
+ usb_show_tree(dev);
+ }
return 0;
}
if (strncmp(argv[1], inf, 3) == 0) {
diff --git a/common/usb.c b/common/usb.c
index e58b6f4..78a410d 100644
--- a/common/usb.c
+++ b/common/usb.c
@@ -72,45 +72,72 @@
static struct usb_device usb_dev[USB_MAX_DEVICE];
static int dev_index;
-static int running;
static int asynch_allowed;
char usb_started; /* flag for the started/stopped USB status */
-void *ctrl; /* goes away in a following commit, but don't break bisect */
-/**
- * some forward declerations...
- */
-static void usb_scan_devices(void);
+#ifndef CONFIG_USB_MAX_CONTROLLER_COUNT
+#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
+#endif
/***
* Init USB Device
*/
-
int usb_init(void)
{
- int result;
+ void *ctrl;
+ struct usb_device *dev;
+ int i, start_index = 0;
- running = 0;
dev_index = 0;
asynch_allowed = 1;
usb_hub_reset();
+
+ /* first make all devices unknown */
+ for (i = 0; i USB_MAX_DEVICE; i++) {
+ memset(usb_dev[i], 0, sizeof(struct usb_device));
+ usb_dev[i].devnum = -1;
+ }
+
/* init low_level USB */
- printf(USB: );
- result = usb_lowlevel_init(0, ctrl);
- /* if lowlevel init is OK, scan the bus for devices
-* i.e. search HUBs and configure them */
- if (result == 0) {
- printf(scanning bus for devices... );
- running = 1;
- usb_scan_devices();
+ for (i = 0; i CONFIG_USB_MAX_CONTROLLER_COUNT; i++) {
+ /* init low_level USB */
+ printf(USB%d: , i);
+ if (usb_lowlevel_init(i, ctrl)) {
+ puts(lowlevel init failed\n);
+ continue;
+ }
+ /*
+* lowlevel init is OK, now scan the bus for devices
+* i.e. search HUBs and configure them
+*/
+ start_index = dev_index;
+ printf(scanning bus %d for devices... , i);
+ dev = usb_alloc_new_device(ctrl);
+ /*
+* device 0 is always present
+* (root hub, so let it analyze)
+*/
+ if (dev)
+ usb_new_device(dev);
+
+ if (start_index == dev_index)
+ puts(No USB Device found\n);
+ else
+ printf(%d USB Device(s) found\n,
+ dev_index - start_index);
+
usb_started = 1;
- return 0;
- } else {
- printf(Error, couldn't init Lowlevel part\n);
- usb_started = 0;
+ }
+
+ USB_PRINTF(scan end\n);
+ /* if we were not able to find at least one working bus, bail out */
+ if (!usb_started) {
+
[U-Boot] [PATCH 2/4] usb: ehci: rework to take advantage of new lowlevel interface
Kill off ehci-core.h
It was used to specify some static controller data. To support more than
one controller being active at any time we have to carry the controller
data ourselfes. Change the ehci interface accordingly.
NOTE: OMAP implemented the ehci stuff a bit backwards and should be fixed
to do the same thing as other platforms. But the change for now is at least
compile clean.
Signed-off-by: Lucas Stach d...@lynxeye.de
---
arch/arm/include/asm/ehci-omap.h | 10 ++-
board/htkw/mcx/mcx.c | 6 +-
board/technexion/twister/twister.c | 6 +-
board/teejet/mt_ventoux/mt_ventoux.c | 6 +-
board/ti/beagle/beagle.c | 6 +-
board/ti/panda/panda.c | 6 +-
drivers/usb/host/ehci-armada100.c| 15 ++---
drivers/usb/host/ehci-atmel.c| 11 ++--
drivers/usb/host/ehci-core.h | 29 -
drivers/usb/host/ehci-exynos.c | 15 ++---
drivers/usb/host/ehci-fsl.c | 11 ++--
drivers/usb/host/ehci-hcd.c | 120 +++
drivers/usb/host/ehci-ixp4xx.c | 15 ++---
drivers/usb/host/ehci-marvell.c | 15 ++---
drivers/usb/host/ehci-mpc512x.c | 25 +++-
drivers/usb/host/ehci-mx5.c | 11 ++--
drivers/usb/host/ehci-mx6.c | 11 ++--
drivers/usb/host/ehci-mxc.c | 11 ++--
drivers/usb/host/ehci-mxs.c | 28
drivers/usb/host/ehci-omap.c | 10 +--
drivers/usb/host/ehci-pci.c | 15 ++---
drivers/usb/host/ehci-ppc4xx.c | 11 ++--
drivers/usb/host/ehci-tegra.c| 9 ++-
drivers/usb/host/ehci-vct.c | 9 ++-
drivers/usb/host/ehci.h | 4 +-
25 Dateien geändert, 197 Zeilen hinzugefügt(+), 218 Zeilen entfernt(-)
delete mode 100644 drivers/usb/host/ehci-core.h
diff --git a/arch/arm/include/asm/ehci-omap.h b/arch/arm/include/asm/ehci-omap.h
index e72c5df..77e8170 100644
--- a/arch/arm/include/asm/ehci-omap.h
+++ b/arch/arm/include/asm/ehci-omap.h
@@ -136,7 +136,15 @@ struct omap_ehci {
u32 insreg08; /* 0xb0 */
};
-int omap_ehci_hcd_init(struct omap_usbhs_board_data *usbhs_pdata);
+/*
+ * FIXME: forward declaration of this structs needed because omap got the
+ * ehci implementation backwards. move out ehci_hcd_x from board files
+ */
+struct ehci_hccr;
+struct ehci_hcor;
+
+int omap_ehci_hcd_init(struct omap_usbhs_board_data *usbhs_pdata,
+ struct ehci_hccr **hccr, struct ehci_hcor **hcor);
int omap_ehci_hcd_stop(void);
#endif /* _OMAP_COMMON_EHCI_H_ */
diff --git a/board/htkw/mcx/mcx.c b/board/htkw/mcx/mcx.c
index 454ff0a..7c9d34a 100644
--- a/board/htkw/mcx/mcx.c
+++ b/board/htkw/mcx/mcx.c
@@ -46,12 +46,12 @@ static struct omap_usbhs_board_data usbhs_bdata = {
.port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
};
-int ehci_hcd_init(void)
+int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor)
{
- return omap_ehci_hcd_init(usbhs_bdata);
+ return omap_ehci_hcd_init(usbhs_bdata, hccr, hcor);
}
-int ehci_hcd_stop(void)
+int ehci_hcd_stop(int index)
{
return omap_ehci_hcd_stop();
}
diff --git a/board/technexion/twister/twister.c
b/board/technexion/twister/twister.c
index c2b10ac..69b1cc2 100644
--- a/board/technexion/twister/twister.c
+++ b/board/technexion/twister/twister.c
@@ -67,12 +67,12 @@ static struct omap_usbhs_board_data usbhs_bdata = {
.port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
};
-int ehci_hcd_init(void)
+int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor)
{
- return omap_ehci_hcd_init(usbhs_bdata);
+ return omap_ehci_hcd_init(usbhs_bdata, hccr, hcor);
}
-int ehci_hcd_stop(void)
+int ehci_hcd_stop(int index)
{
return omap_ehci_hcd_stop();
}
diff --git a/board/teejet/mt_ventoux/mt_ventoux.c
b/board/teejet/mt_ventoux/mt_ventoux.c
index 9fbaedd..7bbd536 100644
--- a/board/teejet/mt_ventoux/mt_ventoux.c
+++ b/board/teejet/mt_ventoux/mt_ventoux.c
@@ -67,12 +67,12 @@ static struct omap_usbhs_board_data usbhs_bdata = {
.port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
};
-int ehci_hcd_init(void)
+int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor)
{
- return omap_ehci_hcd_init(usbhs_bdata);
+ return omap_ehci_hcd_init(usbhs_bdata, hccr, hcor);
}
-int ehci_hcd_stop(void)
+int ehci_hcd_stop(int index)
{
return omap_ehci_hcd_stop();
}
diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c
index 99f833f..59b9924 100644
--- a/board/ti/beagle/beagle.c
+++ b/board/ti/beagle/beagle.c
@@ -502,12 +502,12 @@ static struct omap_usbhs_board_data usbhs_bdata = {
.port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED
};
-int ehci_hcd_init(void)
+int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor)
{
- return omap_ehci_hcd_init(usbhs_bdata);
+ return omap_ehci_hcd_init(usbhs_bdata, hccr, hcor);
}
-int ehci_hcd_stop(void)
+int
[U-Boot] [PATCH 3/4] tegra20: port to new ehci interface
EHCI interface now supports more than one controller. Wire up our usb functions
to use this new interface.
Signed-off-by: Lucas Stach d...@lynxeye.de
---
arch/arm/cpu/armv7/tegra20/usb.c| 15 ---
arch/arm/include/asm/arch-tegra20/usb.h | 4 ++--
drivers/usb/host/ehci-tegra.c | 5 ++---
3 Dateien geändert, 8 Zeilen hinzugefügt(+), 16 Zeilen entfernt(-)
diff --git a/arch/arm/cpu/armv7/tegra20/usb.c b/arch/arm/cpu/armv7/tegra20/usb.c
index 4a3ec7c..219f9c2 100644
--- a/arch/arm/cpu/armv7/tegra20/usb.c
+++ b/arch/arm/cpu/armv7/tegra20/usb.c
@@ -87,7 +87,6 @@ struct fdt_usb {
static struct fdt_usb port[USB_PORTS_MAX]; /* List of valid USB ports */
static unsigned port_count;/* Number of available ports */
-static int port_current; /* Current port (-1 = none) */
/*
* This table has USB timing parameters for each Oscillator frequency we
@@ -453,30 +452,25 @@ static int add_port(struct fdt_usb *config, const u32
timing[])
return 0;
}
-int tegrausb_start_port(unsigned portnum, u32 *hccr, u32 *hcor)
+int tegrausb_start_port(int portnum, u32 *hccr, u32 *hcor)
{
struct usb_ctlr *usbctlr;
if (portnum = port_count)
return -1;
- tegrausb_stop_port();
set_host_mode(port[portnum]);
usbctlr = port[portnum].reg;
*hccr = (u32)usbctlr-cap_length;
*hcor = (u32)usbctlr-usb_cmd;
- port_current = portnum;
return 0;
}
-int tegrausb_stop_port(void)
+int tegrausb_stop_port(int portnum)
{
struct usb_ctlr *usbctlr;
- if (port_current == -1)
- return -1;
-
- usbctlr = port[port_current].reg;
+ usbctlr = port[portnum].reg;
/* Stop controller */
writel(0, usbctlr-usb_cmd);
@@ -485,7 +479,7 @@ int tegrausb_stop_port(void)
/* Initiate controller reset */
writel(2, usbctlr-usb_cmd);
udelay(1000);
- port_current = -1;
+
return 0;
}
@@ -565,7 +559,6 @@ int board_usb_init(const void *blob)
return -1;
set_host_mode(config);
}
- port_current = -1;
return 0;
}
diff --git a/arch/arm/include/asm/arch-tegra20/usb.h
b/arch/arm/include/asm/arch-tegra20/usb.h
index bd89d66..fdbd127 100644
--- a/arch/arm/include/asm/arch-tegra20/usb.h
+++ b/arch/arm/include/asm/arch-tegra20/usb.h
@@ -259,13 +259,13 @@ int board_usb_init(const void *blob);
* @param hcor returns start address of EHCI HCOR registers
* @return 0 if ok, -1 on error (generally invalid port number)
*/
-int tegrausb_start_port(unsigned portnum, u32 *hccr, u32 *hcor);
+int tegrausb_start_port(int portnum, u32 *hccr, u32 *hcor);
/**
* Stop the current port
*
* @return 0 if ok, -1 if no port was active
*/
-int tegrausb_stop_port(void);
+int tegrausb_stop_port(int portnum);
#endif /* _TEGRA_USB_H_ */
diff --git a/drivers/usb/host/ehci-tegra.c b/drivers/usb/host/ehci-tegra.c
index bb5a68e..a1c43f8 100644
--- a/drivers/usb/host/ehci-tegra.c
+++ b/drivers/usb/host/ehci-tegra.c
@@ -57,7 +57,7 @@ int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct
ehci_hcor **hcor)
* Select the first port, as we don't have a way of selecting others
* yet
*/
- if (tegrausb_start_port(0, our_hccr, our_hcor))
+ if (tegrausb_start_port(index, our_hccr, our_hcor))
return -1;
*hccr = (struct ehci_hccr *)our_hccr;
@@ -72,6 +72,5 @@ int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct
ehci_hcor **hcor)
*/
int ehci_hcd_stop(int index)
{
- tegrausb_stop_port();
- return 0;
+ return tegrausb_stop_port(index);
}
--
1.7.11.4
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Re: [U-Boot] [PATCH v10 00/16] split tegra20 arm7 code into separate SPL
On Thu, Aug 30, 2012 at 01:41:02AM -0700, Albert ARIBAUD wrote: Hi Tom, On Wed, 29 Aug 2012 14:10:19 -0700, Tom Warren twar...@nvidia.com wrote: Lucas, -Original Message- From: Lucas Stach [mailto:d...@lynxeye.de] Sent: Wednesday, August 29, 2012 1:54 PM To: Tom Warren Cc: Allen Martin; swar...@wwwdotorg.org; s...@chromium.org; thierry.red...@avionic-design.de; u-boot@lists.denx.de Subject: Re: [PATCH v10 00/16] split tegra20 arm7 code into separate SPL Hello Tom, Am Mittwoch, den 29.08.2012, 09:55 -0700 schrieb Tom Warren: Allen/Albert, -Original Message- From: Allen Martin [mailto:amar...@nvidia.com] Sent: Tuesday, August 28, 2012 5:08 PM To: Tom Warren; swar...@wwwdotorg.org; s...@chromium.org; thierry.red...@avionic-design.de; d...@lynxeye.de Cc: u-boot@lists.denx.de; Allen Martin Subject: [PATCH v10 00/16] split tegra20 arm7 code into separate SPL This patch series fixes a long standing problem with the tegra20 u-boot build. Tegra20 contains an ARM7TDMI boot processor and a Cortex A9 main processor. Prior to this patch series this was accomplished by #ifdefing out any armv7 code from the early boot sequence and creating a single binary that runs on both both the ARM7TDMI and A9. This was very fragile as changes to compiler options or any additions or rearranging of the early boot code could add additional armv7 specific code causing it to fail on the ARM7TDMI. This patch series pulls all the armv4t code out into a separate SPL that does nothing more than initialize the A9 and transfer control to it. The resultint SPL and armv7 u-boot are concatenated together into a single image. This patch series is also available from: git://github.com/arm000/u-boot.git branch: tegra-spl-v10 Changes: v10: - added fix to MAKEALL script so that it correctly parses new boards.cfg I applied this to u-boot-tegra/master and pushed the new code upstream. The pull request remains the same (except for the inclusion of the MAKEALL patch, of course). I can send a new one if required - please let me know. Currently running a ./MAKEALL arm - I assume it'll complete w/o errors (except for the ohci-hcd.c warnings I mentioned previously that are not due to this patch series). Are you going to refresh the next branch anytime soon or are you planing on doing this once the master branch is merged to arm/master? I can refresh u-boot-tegra/next with Allen's V10 SPL patches and re-push it, but if the pull of the SPL code from u-boot-tegra/master is going to go into ARM/master anytime soon, I'd rather wait and just do it one final time. Albert - any idea of an ETA on pulling u-boot-tegra/master into ARM/master? If I'm not mistaken, the current u-boot-tegra/master branch has issues with ./MAKEALL arm, not building everything it should. I'd rather not pull it unless Allen's fix is added (or even better, unless the master branch is force-updated to fix the original commit which introduced the issue, if you and Allen are willing to go this far). The issue was introduced in my SPL series with: tegra20: enable SPL for tegra20 boards In v10 of my SPL series I added: MAKEALL: update to work with new boards.cfg syntax prior to enabling SPL. Tom already re-applied v10 of the SPL patches to u-boot-tegra/master so you should be able to merge it now and it will be git bisect clean with no regressions to MAKEALL. My other change to MAKEALL will fix the difference between MAKEALL arm and MAKEALL -a arm and has nothing to do with tegra or the SPL series. Until that gets applied just make sure you use MAKEALL -a arm as MAKEALL arm is buggy. -Allen -- nvpublic ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V2] MMC: DWMMC: Add DWMMC driver
On Thu, Jun 14, 2012 at 6:36 AM, Jaehoon Chung jh80.ch...@samsung.com wrote:
Hi Rajeshwari,
This patch has too many dependence with other patches.
(Pinmux and PeripID, patches for MSHCI setting).
And as i mentioned, designWare controller isn't exynos specific.
I think good that separate two files. (dw_mmc.c and exynos_dw_mmc.c)
Like this...dw_mmc.c is generic code and exynos_dw_mmc.c is samsung specific
code..
If you want, I will send to you patch that related with them. (based-on your
patch)
And Added some comment
[...]
Everyone, please remove any unnecessary context when you reply to
patches (or any email). When I attempt to read your review comments in
patchworks, I have to scroll for pages, carefully, to find them. Just
quote enough of the patch so everyone can understand what code your
comments are about.
+static int dw_mci_send_command(struct mmc *mmc, struct mmc_cmd *cmd,
+ struct mmc_data *data)
+{
+ struct dw_mci_host *host = mmc-priv;
mmc-priv's type is void type. I think good that use (struct dw_mci_host
*)mmc-priv;
Casting a void * is unnecessary, and pollutes the code with redundant
information. The purpose of requiring explicit casts is to make sure
one doesn't make an unintended implicit cast between two different
types. But a void * is intentionally typeless, and the explicit cast
provides no extra checking.
Andy
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Re: [U-Boot] [PATCHv1] ARM: Add Altera SOCFPGA Cyclone5
Hi!
I took oportunity to cleanup whitespace in
arch/arm/cpu/armv7/omap-common/u-boot-spl.lds. Perhaps someone can
merge that...
Argh ... what about using git send-email for the patch submission please?
I'm not supposed to submit patches here, these are just requests for
review ;-).
NOTE: I really have a great deal of respect for Pavel, so i do have trouble
stepping on him properly during the patch review ;-)
;-).
+ ldr r0, =CONFIG_SYS_INIT_RAM_ADDR
+ ldr r1, =CONFIG_SYS_INIT_RAM_SIZE
+ add r0, r0, r1
Won't the preprocessor compute (CONFIG_SYS_INIT_RAM_ADDR +
CONFIG_SYS_INIT_RAM_SIZE) for you? Then you'd only have to do one LDR and no
ADD
instruction, saving two ticks of CPU :-)
:-). And opportunity for me to try my luck at arm assembly. Does this
look correct?
ldr r0, =(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE)
ldr r1, =IRQ_STACK_START_IN
str r0, [r1]
bx lr
+static const struct socfpga_reset_manager *reset_manager_base =
+ (void *)SOCFPGA_RSTMGR_ADDRESS;
+
+/*
+ * Write the reset manager register to cause reset
+ */
You might want to add __attribute__((noreturn)) to this function :-)
Hmm... I guess that should go to the central header file? No need to
sprinkle it all through the C files. (Done).
+ writel(TIMER_LOAD_VAL, timer_base-load_val);
+ writel(TIMER_LOAD_VAL, timer_base-curr_val);
+ writel((readl((timer_base-ctrl)) | 0x3),
I think you should stick to programming in C here, not LISP, so try
cutting down on the ((braces)) :-)
Some braces have been harmed by creation of this patch.
btw. what's this 0x3 magic constant ?
Dinh has to help here :-(.
+static inline void delay(unsigned long loops)
+{
+ __asm__ volatile (1:\n
+ subs %0, %1, #1\n
+ bne 1b : =r (loops) : 0 (loops));
+}
Am I flat blind or is this not used here?
Killed, thanks. Lets see what the compiler thinks.
Pavel
--
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures)
http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
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Re: [U-Boot] [PATCH] Loop block device for sandbox
On Thursday 30 of August 2012 00:18:18 Marek Vasut wrote:
...snip...
+extern block_dev_desc_t sata_dev_desc[];
+
+int init_sata(int dev)
+{
+ block_dev_desc_t *pdev = (sata_dev_desc[dev]);
Superfluous braces ... Actually, I think sata_dev_desc as it would work very
well too.
Straight copy from dwc_ahsata.c, makes it more readable thought, as the order
of operation is not very intuitive IMHO.
+lbaint_t sata_read(int dev, lbaint_t start, lbaint_t blkcnt, void
*buffer)
+{
+ block_dev_desc_t *pdev = (sata_dev_desc[dev]);
+ int fd = (long) pdev-priv;
If pdev is NULL, this will crash
well, it isn't, at least not from the command - thats why you define the number
of ports in advance, you get dev already range-checked
+ lbaint_t retval;
+
+ os_lseek(fd, start*ATA_SECT_SIZE, OS_SEEK_SET);
+ retval = os_read(fd, buffer, ATA_SECT_SIZE * blkcnt);
+
+ return retval/ATA_SECT_SIZE;
+}
+
+lbaint_t sata_write(int dev, lbaint_t start, lbaint_t blkcnt, void
*buffer) +{
+ block_dev_desc_t *pdev = (sata_dev_desc[dev]);
+ int fd = (long) pdev-priv;
+ lbaint_t retval;
+
+ os_lseek(fd, start*ATA_SECT_SIZE, OS_SEEK_SET);
Besides, lseek can fail, can it not?
If you open a pipe (or nothing), yes
in the first case, you shouldn't, in the second, the I/O op will harmlessly
fail as well
+ if (namelen 20)
+ namelen = 20;
Why do you trim down the string, won't simple strdup() work?
nah, the destination is char[21], as it is the exact length of corresponding
field in ATA identify response (one more for a 0 at the end)
+ memcpy(pdev-product, filenames[dev], namelen);
+ pdev-product[20] = 0;
+
+ if (fd != -1) {
And if fd is -1 ?
then all defaults to an invalid device, because you failed to open the file,
for whatever the reason.
agreed to the other comments
Best Regards
Pavel Herrmann
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Re: [U-Boot] [PATCHv1] ARM: Add Altera SOCFPGA Cyclone5
Hi!
I think once you get the answers you should be able to re-post the
series cleanly and depend on my v5 (or v6) branch. Thanks!
Ok, figuring the .lds might be tricky. But... that's mostly additional
(safety) feature. Would it be possible to merge it without that and
add it later?
Port to v5 of the patch should not be a problem.
For the record and review, current version of patch is here.
A few small comments. No need to re-post intermediate patches, just
address in the next full go-round. Thanks!
They were mostly for synchronization with Dinh. Sorry for the noise.
+void spl_board_init(void)
[snip]
+ puts(SPL Boot\n);
Sure you want to keep that line? We already have a general U-Boot SPL
... line being printed.
Killed.
+ * miscellaneous platform dependent initialisations
+ */
+int misc_init_r(void)
+{
+ /* Set to n for not verifying the uImage */
+ setenv(verify, n);
+ return 0;
+}
Not good to enforce policy like this. Just don't set it in the config
file by default and let users do as they need.
Hmm. I moved it to CONFIG_EXTRA_ENV_SETTINGS as done by for eample
u8500_href.h. Is that ok?
[snip]
diff --git a/common/spl/spl.c b/common/spl/spl.c
index eaea1c8..5adbf0e 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -78,6 +78,7 @@ void spl_parse_image_header(const struct image_header
*header)
u32 header_size = sizeof(struct image_header);
if (__be32_to_cpu(header-ih_magic) == IH_MAGIC) {
+ /* Valid image. Extract information out of header */
spl_image.size = __be32_to_cpu(header-ih_size) + header_size;
spl_image.entry_point = __be32_to_cpu(header-ih_load);
/* Load including the header */
Just an extra comment, drop please. Or split out if you feel it's
really helpful. No strong opinion here other than not in the same patch
as the rest.
Ok, I'll drop it, and the omap cleanup also. Not worth the merge
effort.
spl_ram_load_image... will I need to create some kind of #ifdef? Or
would #ifdef BOOT_DEVICE_RAM do the trick?
[snip]
diff --git a/include/common.h b/include/common.h
index 55025c0..469a3af 100644
--- a/include/common.h
+++ b/include/common.h
@@ -704,7 +704,9 @@ voidexternal_interrupt (struct pt_regs *);
void irq_install_handler(int, interrupt_handler_t *, void *);
void irq_free_handler (int);
void reset_timer(void);
-ulong get_timer (ulong base);
+ulong get_timer(ulong base);
+void reset_timer_count(void);
+ulong get_timer_count(ulong base);
void enable_interrupts (void);
intdisable_interrupts (void);
Make the new declarations match the old, spacing wise please.
Ok, but checkpatch will complain. ... hmm. Why do I have feeling
that they are not needed at all? Removed, and things still work. Good.
Rest was fixed in obvious way. Thanks for comments!
Pavel
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Re: [U-Boot] [PATCHv1] ARM: Add Altera SOCFPGA Cyclone5
On Wed 2012-08-29 17:03:22, Tom Rini wrote:
On 08/29/2012 04:34 PM, Pavel Machek wrote:
On Wed 2012-08-29 11:26:45, Tom Rini wrote:
On Wed, Aug 29, 2012 at 03:41:54PM +0200, Pavel Machek wrote:
Hi!
diff --git a/arch/arm/cpu/armv7/socfpga/u-boot-spl.lds
b/arch/arm/cpu/armv7/socfpga/u-boot-spl.lds
You should setup MEMORY declarations like the other u-boot-spl linker
scripts do so we get build-time confirmation that we haven't exceeded
our size limitations.
Hmm, I tried, but I don't know socfpga memory layout by heart.
Dinh, can you help here?
I think once you get the answers you should be able to re-post the
series cleanly and depend on my v5 (or v6) branch. Thanks!
Porting it to your v5 was easy :-). Newer patch for review is attached.
I took oportunity to cleanup whitespace in
arch/arm/cpu/armv7/omap-common/u-boot-spl.lds. Perhaps someone can
merge that...
Split it out and I'll grab it for v6. Thanks! Comments sent to the
other part of the thread just now.
Here you go. Thanks!
Pavel
--
Fix whitespace in omap-common/u-boot-spl.lds.
Signed-off-by: Pavel Machek pa...@denx.de
diff --git a/arch/arm/cpu/armv7/omap-common/u-boot-spl.lds
b/arch/arm/cpu/armv7/omap-common/u-boot-spl.lds
index 8867e06..1d8efb2 100644
--- a/arch/arm/cpu/armv7/omap-common/u-boot-spl.lds
+++ b/arch/arm/cpu/armv7/omap-common/u-boot-spl.lds
@@ -37,9 +37,9 @@ SECTIONS
{
.text :
{
- __start = .;
- arch/arm/cpu/armv7/start.o(.text)
- *(.text*)
+ __start = .;
+ arch/arm/cpu/armv7/start.o (.text)
+ *(.text*)
} .sram
. = ALIGN(4);
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Re: [U-Boot] [PATCHv1] ARM: Add Altera SOCFPGA Cyclone5
On 08/30/2012 10:18 AM, Pavel Machek wrote:
+ * miscellaneous platform dependent initialisations
+ */
+int misc_init_r(void)
+{
+ /* Set to n for not verifying the uImage */
+ setenv(verify, n);
+ return 0;
+}
Not good to enforce policy like this. Just don't set it in the config
file by default and let users do as they need.
Hmm. I moved it to CONFIG_EXTRA_ENV_SETTINGS as done by for eample
u8500_href.h. Is that ok?
It defaults to no, I believe is the thing (so yes, there's a few bad
examples out there including, urk, one that I own).
[snip]
diff --git a/common/spl/spl.c b/common/spl/spl.c
index eaea1c8..5adbf0e 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -78,6 +78,7 @@ void spl_parse_image_header(const struct image_header
*header)
u32 header_size = sizeof(struct image_header);
if (__be32_to_cpu(header-ih_magic) == IH_MAGIC) {
+ /* Valid image. Extract information out of header */
spl_image.size = __be32_to_cpu(header-ih_size) + header_size;
spl_image.entry_point = __be32_to_cpu(header-ih_load);
/* Load including the header */
Just an extra comment, drop please. Or split out if you feel it's
really helpful. No strong opinion here other than not in the same patch
as the rest.
Ok, I'll drop it, and the omap cleanup also. Not worth the merge
effort.
spl_ram_load_image... will I need to create some kind of #ifdef? Or
would #ifdef BOOT_DEVICE_RAM do the trick?
Good point, yes, we should add CONFIG_SPL_RAM_DEVICE and document it in
docs/README.SPL and the toplevel README.
--
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Re: [U-Boot] [PATCHv1] ARM: Add Altera SOCFPGA Cyclone5
On 08/30/2012 10:34 AM, Tom Rini wrote:
On 08/30/2012 10:18 AM, Pavel Machek wrote:
+ * miscellaneous platform dependent initialisations
+ */
+int misc_init_r(void)
+{
+ /* Set to n for not verifying the uImage */
+ setenv(verify, n);
+ return 0;
+}
Not good to enforce policy like this. Just don't set it in the config
file by default and let users do as they need.
Hmm. I moved it to CONFIG_EXTRA_ENV_SETTINGS as done by for eample
u8500_href.h. Is that ok?
It defaults to no, I believe is the thing (so yes, there's a few bad
examples out there including, urk, one that I own).
I take it back, yes is the default, so yes, doing
CONFIG_EXTRA_ENV_SETTINGS with verify=no is correct.
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Re: [U-Boot] [PATCHv1] ARM: Add Altera SOCFPGA Cyclone5
Dear Pavel Machek,
Hi!
I took oportunity to cleanup whitespace in
arch/arm/cpu/armv7/omap-common/u-boot-spl.lds. Perhaps someone can
merge that...
Argh ... what about using git send-email for the patch submission please?
I'm not supposed to submit patches here, these are just requests for
review ;-).
NOTE: I really have a great deal of respect for Pavel, so i do have
trouble stepping on him properly during the patch review ;-)
;-).
+ ldr r0, =CONFIG_SYS_INIT_RAM_ADDR
+ ldr r1, =CONFIG_SYS_INIT_RAM_SIZE
+ add r0, r0, r1
Won't the preprocessor compute (CONFIG_SYS_INIT_RAM_ADDR +
CONFIG_SYS_INIT_RAM_SIZE) for you? Then you'd only have to do one LDR and
no ADD instruction, saving two ticks of CPU :-)
:
:-). And opportunity for me to try my luck at arm assembly. Does this
look correct?
ldr r0, =(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE)
ldr r1, =IRQ_STACK_START_IN
str r0, [r1]
bx lr
Yes
+static const struct socfpga_reset_manager *reset_manager_base =
+ (void *)SOCFPGA_RSTMGR_ADDRESS;
+
+/*
+ * Write the reset manager register to cause reset
+ */
You might want to add __attribute__((noreturn)) to this function :-)
Hmm... I guess that should go to the central header file? No need to
sprinkle it all through the C files. (Done).
+ writel(TIMER_LOAD_VAL, timer_base-load_val);
+ writel(TIMER_LOAD_VAL, timer_base-curr_val);
+ writel((readl((timer_base-ctrl)) | 0x3),
I think you should stick to programming in C here, not LISP, so
try cutting down on the ((braces)) :-)
Some braces have been harmed by creation of this patch.
At least one more pair must be killed on the above statement :)
btw. what's this 0x3 magic constant ?
Dinh has to help here :-(.
Also, use setbits_le32() there instead anyway.
+static inline void delay(unsigned long loops)
+{
+ __asm__ volatile (1:\n
+ subs %0, %1, #1\n
+ bne 1b : =r (loops) : 0 (loops));
+}
Am I flat blind or is this not used here?
Killed, thanks. Lets see what the compiler thinks.
Pavel
Best regards,
Marek Vasut
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Re: [U-Boot] [PATCHv1] ARM: Add Altera SOCFPGA Cyclone5
Hi!
diff --git a/common/spl/spl.c b/common/spl/spl.c
index eaea1c8..5adbf0e 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -78,6 +78,7 @@ void spl_parse_image_header(const struct image_header
*header)
u32 header_size = sizeof(struct image_header);
if (__be32_to_cpu(header-ih_magic) == IH_MAGIC) {
+ /* Valid image. Extract information out of header */
spl_image.size = __be32_to_cpu(header-ih_size) + header_size;
spl_image.entry_point = __be32_to_cpu(header-ih_load);
/* Load including the header */
Just an extra comment, drop please. Or split out if you feel it's
really helpful. No strong opinion here other than not in the same patch
as the rest.
Ok, I'll drop it, and the omap cleanup also. Not worth the merge
effort.
spl_ram_load_image... will I need to create some kind of #ifdef? Or
would #ifdef BOOT_DEVICE_RAM do the trick?
Good point, yes, we should add CONFIG_SPL_RAM_DEVICE and document it in
docs/README.SPL and the toplevel README.
Ok, something like this? Posting separately, maybe it makes sense to
merge to your PATCH v6...?
[And mental note that HEAP_SIZE needs to be cleaned up in socfpga].
Thanks,
Pavel
commit 644da18450edd725263f3bf4a721654707a700af
Author: Pavel pa...@ucw.cz
Date: Thu Aug 30 20:03:42 2012 +0200
Introduce CONFIG_SPL_RAM_DEVICE, as suggested by Tom.
Signed-off-by: Pavel Machek pa...@denx.de
diff --git a/README b/README
index ddbeb1b..e782cce 100644
--- a/README
+++ b/README
@@ -2636,6 +2636,9 @@ FIT uImage format:
CONFIG_SPL_SPI_SUPPORT
Support for drivers/spi/libspi.o in SPL binary
+ CONFIG_SPL_RAM_DEVICE
+ Support for running image already present in ram, in SPL binary
+
CONFIG_SPL_LIBGENERIC_SUPPORT
Support for lib/libgeneric.o in SPL binary
diff --git a/common/spl/spl.c b/common/spl/spl.c
index 229fd01..fb96a75 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -115,6 +115,7 @@ static void __noreturn jump_to_image_no_args(void)
image_entry((u32 *)boot_params_ptr_addr);
}
+#ifdef CONFIG_SPL_RAM_DEVICE
static void spl_ram_load_image(void)
{
const struct image_header *header;
@@ -128,6 +129,7 @@ static void spl_ram_load_image(void)
spl_parse_image_header(header);
}
+#endif
void board_init_r(gd_t *dummy1, ulong dummy2)
{
@@ -146,9 +148,11 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
boot_device = spl_boot_device();
debug(boot device - %d\n, boot_device);
switch (boot_device) {
+#ifdef CONFIG_SPL_RAM_DEVICE
case BOOT_DEVICE_RAM:
spl_ram_load_image();
break;
+#endif
#ifdef CONFIG_SPL_MMC_SUPPORT
case BOOT_DEVICE_MMC1:
case BOOT_DEVICE_MMC2:
diff --git a/doc/README.SPL b/doc/README.SPL
index e4a5ac3..2acafba 100644
--- a/doc/README.SPL
+++ b/doc/README.SPL
@@ -66,6 +66,7 @@ CONFIG_SPL_DMA_SUPPORT (drivers/dma/libdma.o)
CONFIG_SPL_POST_MEM_SUPPORT (post/drivers/memory.o)
CONFIG_SPL_NAND_LOAD (drivers/mtd/nand/nand_spl_load.o)
CONFIG_SPL_SPI_LOAD (drivers/mtd/spi/spi_spl_load.o)
+CONFIG_SPL_RAM_DEVICE (common/spl/spl.c)
Normally CPU is assumed to be the same between the SPL and normal
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Re: [U-Boot] [PATCH v2] MAKEALL: fix per arch board lists
On Wed, Aug 29, 2012 at 02:08:59PM -0700, Allen Martin wrote: The LIST_arm rule included the Atmel boards twice (by virtue of including both LIST_at91 and LIST_ARM9) and was missing all the arm720t, arm946es, and arm1176 boards. Change this list to use boards_by_arch() which is less error prone. After this change ./MAKEALL arm and ./MAKEALL -a arm build the same boards. Also fix up some missing and duplicate boards to arm, mips, and m68k. Signed-off-by: Allen Martin amar...@nvidia.com Thanks! Acked-by: Tom Rini tr...@ti.com -- Tom ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCHv1] ARM: Add Altera SOCFPGA Cyclone5
Hi!
+ writel(TIMER_LOAD_VAL, timer_base-load_val);
+ writel(TIMER_LOAD_VAL, timer_base-curr_val);
+ writel((readl((timer_base-ctrl)) | 0x3),
I think you should stick to programming in C here, not LISP, so
try cutting down on the ((braces)) :-)
Some braces have been harmed by creation of this patch.
At least one more pair must be killed on the above statement :)
I removed two pairs but failed to post the patch ;-). Be sure you'll
never see them again.
btw. what's this 0x3 magic constant ?
Dinh has to help here :-(.
Also, use setbits_le32() there instead anyway.
Uff, setbits_le32 looks seriously strange. Should I do this?
Thanks for review,
Pavel
diff --git a/arch/arm/cpu/armv7/socfpga/timer.c
b/arch/arm/cpu/armv7/socfpga/timer.c
index 79fa081..1ceb6e9 100644
--- a/arch/arm/cpu/armv7/socfpga/timer.c
+++ b/arch/arm/cpu/armv7/socfpga/timer.c
@@ -30,7 +30,7 @@ int timer_init(void)
{
writel(TIMER_LOAD_VAL, timer_base-load_val);
writel(TIMER_LOAD_VAL, timer_base-curr_val);
- writel(readl(timer_base-ctrl) | 0x3, timer_base-ctrl);
+ setbits_le32(timer_base-ctrl, 0x3);
return 0;
}
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Re: [U-Boot] [PATCHv1] ARM: Add Altera SOCFPGA Cyclone5
Dear Pavel Machek,
Hi!
+ writel(TIMER_LOAD_VAL, timer_base-load_val);
+ writel(TIMER_LOAD_VAL, timer_base-curr_val);
+ writel((readl((timer_base-ctrl)) | 0x3),
I think you should stick to programming in C here, not LISP,
so try cutting down on the ((braces)) :-)
Some braces have been harmed by creation of this patch.
At least one more pair must be killed on the above statement :)
I removed two pairs but failed to post the patch ;-). Be sure you'll
never see them again.
btw. what's this 0x3 magic constant ?
Dinh has to help here :-(.
Also, use setbits_le32() there instead anyway.
Uff, setbits_le32 looks seriously strange. Should I do this?
Yes please, that's the suggested way:
Instead of:
ret = readl()
ret |= 1 BIT;
writel(ret, )
You do:
setbits_le32()
Thanks for review,
Pavel
diff --git a/arch/arm/cpu/armv7/socfpga/timer.c
b/arch/arm/cpu/armv7/socfpga/timer.c index 79fa081..1ceb6e9 100644
--- a/arch/arm/cpu/armv7/socfpga/timer.c
+++ b/arch/arm/cpu/armv7/socfpga/timer.c
@@ -30,7 +30,7 @@ int timer_init(void)
{
writel(TIMER_LOAD_VAL, timer_base-load_val);
writel(TIMER_LOAD_VAL, timer_base-curr_val);
- writel(readl(timer_base-ctrl) | 0x3, timer_base-ctrl);
+ setbits_le32(timer_base-ctrl, 0x3);
return 0;
}
Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH] MUSB driver: Timeout is never detected as the while loop does not end
On Thu, Aug 30, 2012 at 09:24:39AM +0200, Matej Fran?e?kin wrote: Timeout variable is decremented once more when while condition is not met. Following if does not detect correctly that timeout has occurred. Because of this bug the usb start command on AM335X-EVM board did not detect correctly that USB device was not attached. timeout = musb_cfg.timeout; while (timeout--) if (readb(musbr-devctl) MUSB_DEVCTL_HM) break; /* if musb core is not in host mode, then return */ if (!timeout) return -1; Signed-off-by: Matej Franceskin matej.frances...@comtrade.com CC: Marek Vasut ma...@denx.de? Acked-by: Tom Rini tr...@ti.com -- Tom ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCHv1] ARM: Add Altera SOCFPGA Cyclone5
On 08/30/2012 11:05 AM, Pavel Machek wrote:
Hi!
diff --git a/common/spl/spl.c b/common/spl/spl.c
index eaea1c8..5adbf0e 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -78,6 +78,7 @@ void spl_parse_image_header(const struct image_header
*header)
u32 header_size = sizeof(struct image_header);
if (__be32_to_cpu(header-ih_magic) == IH_MAGIC) {
+ /* Valid image. Extract information out of header */
spl_image.size = __be32_to_cpu(header-ih_size) + header_size;
spl_image.entry_point = __be32_to_cpu(header-ih_load);
/* Load including the header */
Just an extra comment, drop please. Or split out if you feel it's
really helpful. No strong opinion here other than not in the same patch
as the rest.
Ok, I'll drop it, and the omap cleanup also. Not worth the merge
effort.
spl_ram_load_image... will I need to create some kind of #ifdef? Or
would #ifdef BOOT_DEVICE_RAM do the trick?
Good point, yes, we should add CONFIG_SPL_RAM_DEVICE and document it in
docs/README.SPL and the toplevel README.
Ok, something like this? Posting separately, maybe it makes sense to
merge to your PATCH v6...?
Sure, just include the actual spl_ram_load_image bits as well and I'll
pick it up.
--
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Re: [U-Boot] [PATCH] MUSB driver: Timeout is never detected as the while loop does not end
Dear Matej Frančeškin, Timeout variable is decremented once more when while condition is not met. Following if does not detect correctly that timeout has occurred. Because of this bug the usb start command on AM335X-EVM board did not detect correctly that USB device was not attached. timeout = musb_cfg.timeout; while (timeout--) if (readb(musbr-devctl) MUSB_DEVCTL_HM) break; /* if musb core is not in host mode, then return */ if (!timeout) return -1; Signed-off-by: Matej Franceskin matej.frances...@comtrade.com CC: Marek Vasut ma...@denx.de? Applied, thanks Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] Loop block device for sandbox
Dear Pavel Herrmann,
On Thursday 30 of August 2012 00:18:18 Marek Vasut wrote:
...snip...
+extern block_dev_desc_t sata_dev_desc[];
+
+int init_sata(int dev)
+{
+ block_dev_desc_t *pdev = (sata_dev_desc[dev]);
Superfluous braces ... Actually, I think sata_dev_desc as it would work
very well too.
Straight copy from dwc_ahsata.c, makes it more readable thought, as the
order of operation is not very intuitive IMHO.
sata_dev_desc + dev ?
+lbaint_t sata_read(int dev, lbaint_t start, lbaint_t blkcnt, void
*buffer)
+{
+ block_dev_desc_t *pdev = (sata_dev_desc[dev]);
+ int fd = (long) pdev-priv;
If pdev is NULL, this will crash
well, it isn't, at least not from the command - thats why you define the
number of ports in advance, you get dev already range-checked
Range check is fine, but will pdev be inited? It's a pointer from some array.
+ lbaint_t retval;
+
+ os_lseek(fd, start*ATA_SECT_SIZE, OS_SEEK_SET);
+ retval = os_read(fd, buffer, ATA_SECT_SIZE * blkcnt);
+
+ return retval/ATA_SECT_SIZE;
+}
+
+lbaint_t sata_write(int dev, lbaint_t start, lbaint_t blkcnt, void
*buffer) +{
+ block_dev_desc_t *pdev = (sata_dev_desc[dev]);
+ int fd = (long) pdev-priv;
+ lbaint_t retval;
+
+ os_lseek(fd, start*ATA_SECT_SIZE, OS_SEEK_SET);
Besides, lseek can fail, can it not?
If you open a pipe (or nothing), yes
in the first case, you shouldn't
Shouldn't ... what? Sorry, I cannot parse this.
in the second, the I/O op will harmlessly
fail as well
How so?
+ if (namelen 20)
+ namelen = 20;
Why do you trim down the string, won't simple strdup() work?
nah, the destination is char[21], as it is the exact length of
corresponding field in ATA identify response (one more for a 0 at the end)
I see, is it a full path ? If so, it might be a better idea to use the filename
itself instead of the whole path. So you'd prevent names like
~/../foo/../.././bar.img .
+ memcpy(pdev-product, filenames[dev], namelen);
+ pdev-product[20] = 0;
+
+ if (fd != -1) {
And if fd is -1 ?
then all defaults to an invalid device, because you failed to open the
file, for whatever the reason.
At least the printf below will choke, since pdev-lba is uninited
agreed to the other comments
Best Regards
Pavel Herrmann
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Re: [U-Boot] [PATCH] Loop block device for sandbox
On Thursday 30 of August 2012 20:45:13 Marek Vasut wrote:
Dear Pavel Herrmann,
On Thursday 30 of August 2012 00:18:18 Marek Vasut wrote:
...snip...
+extern block_dev_desc_t sata_dev_desc[];
+
+int init_sata(int dev)
+{
+ block_dev_desc_t *pdev = (sata_dev_desc[dev]);
Superfluous braces ... Actually, I think sata_dev_desc as it would work
very well too.
Straight copy from dwc_ahsata.c, makes it more readable thought, as the
order of operation is not very intuitive IMHO.
sata_dev_desc + dev ?
even less intuitive
+lbaint_t sata_read(int dev, lbaint_t start, lbaint_t blkcnt, void
*buffer)
+{
+ block_dev_desc_t *pdev = (sata_dev_desc[dev]);
+ int fd = (long) pdev-priv;
If pdev is NULL, this will crash
well, it isn't, at least not from the command - thats why you define the
number of ports in advance, you get dev already range-checked
Range check is fine, but will pdev be inited? It's a pointer from some
array.
init_sata is called first, so pdev is inited (see cmd_sata.c)
+ lbaint_t retval;
+
+ os_lseek(fd, start*ATA_SECT_SIZE, OS_SEEK_SET);
+ retval = os_read(fd, buffer, ATA_SECT_SIZE * blkcnt);
+
+ return retval/ATA_SECT_SIZE;
+}
+
+lbaint_t sata_write(int dev, lbaint_t start, lbaint_t blkcnt, void
*buffer) +{
+ block_dev_desc_t *pdev = (sata_dev_desc[dev]);
+ int fd = (long) pdev-priv;
+ lbaint_t retval;
+
+ os_lseek(fd, start*ATA_SECT_SIZE, OS_SEEK_SET);
Besides, lseek can fail, can it not?
If you open a pipe (or nothing), yes
in the first case, you shouldn't
Shouldn't ... what? Sorry, I cannot parse this.
shouldn't do that - means i agree there should be a check in case you are
actively trying to break things, and use pipes/sockets as loop blocks
in the second, the I/O op will harmlessly
fail as well
How so?
because then the fd is -1, and read/write will do the right thing there
(nothing, return -1 and set errno to EBADF)
+ if (namelen 20)
+ namelen = 20;
Why do you trim down the string, won't simple strdup() work?
nah, the destination is char[21], as it is the exact length of
corresponding field in ATA identify response (one more for a 0 at the end)
I see, is it a full path ? If so, it might be a better idea to use the
filename itself instead of the whole path. So you'd prevent names like
~/../foo/../.././bar.img .
yes, i was thinking about ...${last 17 bytes of the name} if the name was
longer, but this proved significantly simpler for demonstrating the general
idea.
+ memcpy(pdev-product, filenames[dev], namelen);
+ pdev-product[20] = 0;
+
+ if (fd != -1) {
And if fd is -1 ?
then all defaults to an invalid device, because you failed to open the
file, for whatever the reason.
At least the printf below will choke, since pdev-lba is uninited
not the case. sata_dev_desc is inited in cmd_sata.c, and therefore by not
doing anything we get an empty device
Best Regards
Pavel Herrmann
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Re: [U-Boot] [PATCH 0/2] PXA25x: USB ethernet driver
Dear Łukasz Dałek, I've moved cpu revision detection to arch/arm/cpu/pxa as you suggest. Cleaned ethernet driver. Soon I would also send patches for drivers/usb/gadget/ether.c to work correctly with this pxa driver. Łukasz Dałek (2): pxa: Add some stuff to examine cpu model and rev pxa25x: Add USB ethernet gadget arch/arm/cpu/pxa/cpuinfo.c | 11 +- arch/arm/include/asm/arch-pxa/pxa.h | 13 + drivers/usb/gadget/Makefile |1 + drivers/usb/gadget/pxa25x_udc.c | 2059 +++ drivers/usb/gadget/pxa25x_udc.h | 168 +++ 5 files changed, 2250 insertions(+), 2 deletions(-) create mode 100644 drivers/usb/gadget/pxa25x_udc.c create mode 100644 drivers/usb/gadget/pxa25x_udc.h Just a dumb question -- do we have any actual user for this stuff? Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] patman doesn't send patches
On Wed, Aug 29, 2012 at 9:23 PM, Ilya Yanok ilya.ya...@cogentembedded.com wrote: Hi Stefan, Stefan Roese sr at denx.de writes: Or does patman not even try to send, once checkpatch warning/errors are detected? That's it. Normally you don't want to send patches that are not chackpatch-clean. If you are sure that problems are irrelevant use -i switch to ignore them. Regards, Ilya. Thanks Ilya - yes that's the idea. - Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCHv1] ARM: Add Altera SOCFPGA Cyclone5
Hi!
spl_ram_load_image... will I need to create some kind of #ifdef? Or
would #ifdef BOOT_DEVICE_RAM do the trick?
Good point, yes, we should add CONFIG_SPL_RAM_DEVICE and document it in
docs/README.SPL and the toplevel README.
Ok, something like this? Posting separately, maybe it makes sense to
merge to your PATCH v6...?
Sure, just include the actual spl_ram_load_image bits as well and I'll
pick it up.
Here you go.
--
Add support for loading image from ram in SPL.
Signed-off-by: Pavel Machek pa...@denx.de
diff --git a/README b/README
index ddbeb1b..e782cce 100644
--- a/README
+++ b/README
@@ -2636,6 +2636,9 @@ FIT uImage format:
CONFIG_SPL_SPI_SUPPORT
Support for drivers/spi/libspi.o in SPL binary
+ CONFIG_SPL_RAM_DEVICE
+ Support for running image already present in ram, in SPL binary
+
CONFIG_SPL_LIBGENERIC_SUPPORT
Support for lib/libgeneric.o in SPL binary
diff --git a/common/spl/spl.c b/common/spl/spl.c
index eaea1c8..fb96a75 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -115,6 +115,22 @@ static void __noreturn jump_to_image_no_args(void)
image_entry((u32 *)boot_params_ptr_addr);
}
+#ifdef CONFIG_SPL_RAM_DEVICE
+static void spl_ram_load_image(void)
+{
+ const struct image_header *header;
+
+ /* get the header */
+ /* it will point to a address defined by handoff which
+ will tell where the image located inside the flash. For now,
+ it will temporary fixed to address pointed by U-Boot */
+ header = (struct image_header *)
+ (CONFIG_SYS_TEXT_BASE - sizeof(struct image_header));
+
+ spl_parse_image_header(header);
+}
+#endif
+
void board_init_r(gd_t *dummy1, ulong dummy2)
{
u32 boot_device;
@@ -132,6 +148,11 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
boot_device = spl_boot_device();
debug(boot device - %d\n, boot_device);
switch (boot_device) {
+#ifdef CONFIG_SPL_RAM_DEVICE
+ case BOOT_DEVICE_RAM:
+ spl_ram_load_image();
+ break;
+#endif
#ifdef CONFIG_SPL_MMC_SUPPORT
case BOOT_DEVICE_MMC1:
case BOOT_DEVICE_MMC2:
diff --git a/doc/README.SPL b/doc/README.SPL
index e4a5ac3..2acafba 100644
--- a/doc/README.SPL
+++ b/doc/README.SPL
@@ -66,6 +66,7 @@ CONFIG_SPL_DMA_SUPPORT (drivers/dma/libdma.o)
CONFIG_SPL_POST_MEM_SUPPORT (post/drivers/memory.o)
CONFIG_SPL_NAND_LOAD (drivers/mtd/nand/nand_spl_load.o)
CONFIG_SPL_SPI_LOAD (drivers/mtd/spi/spi_spl_load.o)
+CONFIG_SPL_RAM_DEVICE (common/spl/spl.c)
Normally CPU is assumed to be the same between the SPL and normal
--
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(cesky, pictures)
http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
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Re: [U-Boot] [PATCH] usb: remove unnecessary packed attributes
Dear Marek Vasut,
Dear Lucas Stach,
We don't actually need to pack those structs, as they
are not used to do actual hardware access.
This avoids some unaligned accesses and therefore makes
the EHCI stack work on ARMv7 without compiler workarounds.
Signed-off-by: Lucas Stach d...@lynxeye.de
I need to review this properly, will get back to it soon.
My 7th sense is telling me, these descriptors are sent across the bus.
ehci_submit_root() puts them into buffer and then ehci_submit_async() blasts
them. I believe they must be packed, otherwise the format expected by devices
on
the bus won't match and it'll fall apart.
Until then, CCing other good fellows.
---
drivers/usb/host/ehci-hcd.c | 2 +-
include/usb.h | 2 +-
2 Dateien geändert, 2 Zeilen hinzugefügt(+), 2 Zeilen entfernt(-)
diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
index 18b4bc6..2f4fa5e 100644
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -45,7 +45,7 @@ static struct descriptor {
struct usb_linux_config_descriptor config;
struct usb_linux_interface_descriptor interface;
struct usb_endpoint_descriptor endpoint;
-} __attribute__ ((packed)) descriptor = {
+} descriptor = {
{
0x8,/* bDescLength */
0x29, /* bDescriptorType: hub descriptor */
diff --git a/include/usb.h b/include/usb.h
index ba3d169..63730ee 100644
--- a/include/usb.h
+++ b/include/usb.h
@@ -369,7 +369,7 @@ struct usb_hub_descriptor {
unsigned char PortPowerCtrlMask[(USB_MAXCHILDREN+1+7)/8];
/* DeviceRemovable and PortPwrCtrlMask want to be variable-length
bitmaps that hold max 255 entries. (bit0 is ignored) */
-} __attribute__ ((packed));
+};
struct usb_hub_device {
Best regards,
Marek Vasut
Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH 1/4] usb: lowlevel interface change to support multiple controllers
Dear Lucas Stach, Carry an index in the lowlevel usb functions to make specify the respective usb controller. Also pass through an controller struct from lowlevel_init to the creation of the root usb device of this controller. Signed-off-by: Lucas Stach d...@lynxeye.de [...] WFM, Reviewed-by: Marek Vasut ma...@denx.de Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/4] usb: ehci: rework to take advantage of new lowlevel interface
Dear Lucas Stach, Kill off ehci-core.h It was used to specify some static controller data. To support more than one controller being active at any time we have to carry the controller data ourselfes. Change the ehci interface accordingly. NOTE: OMAP implemented the ehci stuff a bit backwards and should be fixed to do the same thing as other platforms. But the change for now is at least compile clean. Signed-off-by: Lucas Stach d...@lynxeye.de [...] The omap change could be separated out, no? Also, I'd fix all these (*something)-somethingelse if possible. Otherwise, Reviewed-by: Marek Vasut ma...@denx.de Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 1/4] mmc: dw-mmc: support DesignWare MMC Controller
On Tue, Jul 3, 2012 at 12:58 AM, Jaehoon Chung jh80.ch...@samsung.com wrote:
This patch is supported DesginWare MMC Controller.
Signed-off-by: Jaehoon Chung jh80.ch...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Signed-off-by: Rajeshawari Shinde rajeshwar...@samsung.com
diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
+ while (timeout--) {
+ ctrl = dwmci_readl(host, DWMCI_CTRL);
+ if (!(ctrl DWMCI_RESET_ALL))
+ return 1;
+ if (timeout == 0)
+ break;
Please fix this loop. while (timeout--) means the loop will stop
when timeout reaches 0. It's redundant with if (timeout == 0) break;
+ }
+ return 0;
+}
+
+static void dwmci_set_idma_desc(u8 *idmac, unsigned int des0,
+ unsigned int des1, unsigned int des2)
+{
+ struct dwmci_idmac *desc = (struct dwmci_idmac *)idmac;
I don't understand why this function takes a u8* Why not just pass a
struct dwmci_idmac * ?
+
+ desc-des0 = des0;
+ desc-des1 = des1;
+ desc-des2 = des2;
+ desc-des3 = (unsigned int)desc + sizeof(struct dwmci_idmac);
Also, is there a reason that you've decided to label the 4 fields of
your descriptor (which appear to reflect flags, count, address,
pointer to next descriptor) as des0-3?
+}
+
+static void dwmci_prepare_data(struct dwmci_host *host,
+ struct mmc_data *data)
+{
+ unsigned long ctrl;
+ unsigned int i = 0, flag, cnt, blk_cnt;
+ struct dwmci_idmac *p;
+ ulong data_start, data_end, start_addr;
+ ALLOC_CACHE_ALIGN_BUFFER(struct dwmci_idmac, idmac, 65565);
That's a really large buffer to allocate on the stack...
+
+ do {
+ flag = DWMCI_IDMAC_OWN | DWMCI_IDMAC_CH ;
+ flag |= (i == 0) ? DWMCI_IDMAC_FS : 0;
+ if (blk_cnt = 8) {
+ flag |= DWMCI_IDMAC_LD;
+ cnt = data-blocksize * blk_cnt;
+ } else {
+ flag = ~DWMCI_IDMAC_LD;
Clearing this bit will never have an effect (flag was initialized
without it set just before).
+ cnt = data-blocksize * 8;
+ }
+
+ dwmci_set_idma_desc((u8 *)p, flag, cnt,
+ start_addr + (i * PAGE_SIZE));
+
+ if (blk_cnt = 8)
+ break;
+ blk_cnt -= 8;
+ p++;
+ i++;
+ } while(1);
And, again, a loop with an internal control, as opposed to just saying
} while (blk_cnt 8)
This one may be fine, as I see you use 'p' after. However, I think it
best if you rework this loop to be a proper loop.
+
+ data_start = (ulong)idmac;
+ data_end = (ulong)p;
I'm not 100% sure, but I think p doesn't point to where you want it,
except by luck. You want p to point to the last byte of the
descriptor chain, not the first byte of the last descriptor, yes? I
suspect it will always work because of the ARCH_DMA_MINALIGN, but it
makes the code fragile.
+ flush_dcache_range(data_start, data_end + ARCH_DMA_MINALIGN);
+
This cache flush is why I think 'p' is inaccurate.
+
+ if (data) {
+ flags = dwmci_set_transfer_mode(host, data);
+ }
Don't use braces for single-line if-clauses.
[...]
+ if (data) {
+ while (1) {
+ mask = dwmci_readl(host, DWMCI_RINTSTS);
+ if (mask (DWMCI_DATA_ERR | DWMCI_DATA_TOUT)) {
+ debug(DATA ERROR!\n);
+ return -1;
+ } else if (mask DWMCI_INTMSK_DTO)
+ break;
+ }
do {
mask = ...
} while (!(mask DWMCI_INTMSK_DTO))
[...]
+
+ for (div = 1; div 255; div++) {
+ if ((sclk / (2 * div)) = freq) {
+ break;
+ }
+ }
1) Your braces are unnecessary.
2) This is reimplementing a basic mathematical formula in loop form.
Don't do that.
Do this:
div = DIV_ROUND_UP(sclk, 2 * freq);
This solves the formula:
freq = sclk/(2 * div) for div, choosing a large enough number to
ensure that the inequality is satisfied.
+ do {
+ status = dwmci_readl(host, DWMCI_CMD);
+ if (timeout == 0) {
+ printf(TIMEOUT error!!\n);
+ return -ETIMEDOUT;
+ }
+ } while ((status DWMCI_CMD_START) timeout--);
Here, you have a loop with a timeout control, but it never has any
effect. Personally, I would put the timeout check *after* the loop
terminates. After all, the last read could succeed, but then you'll
timeout. You'll have to modify the if clause to look for timeout being
less than 0.
+ timeout = 1;
+ do {
+
Re: [U-Boot] [PATCH 4/4] usb: add support for multiple usb controllers
Dear Lucas Stach,
Allows to initialize more than one USB controller at once.
Signed-off-by: Lucas Stach d...@lynxeye.de
[...]
int usb_stop(void)
{
- int res = 0;
+ int i;
if (usb_started) {
asynch_allowed = 1;
usb_started = 0;
usb_hub_reset();
- res = usb_lowlevel_stop(0);
+
+ for (i = 0; i CONFIG_USB_MAX_CONTROLLER_COUNT; i++)
+ usb_lowlevel_stop(i);
You might want to track if any failed and return it or emit warning.
Otherwise:
Reviewed-by: Marek Vasut ma...@denx.de
}
- return res;
+
+ return 0;
}
/*
@@ -751,7 +781,6 @@ struct usb_device *usb_get_dev_index(int index)
return usb_dev[index];
}
-
/* returns a pointer of a new device structure or NULL, if
* no device struct is available
*/
@@ -947,29 +976,4 @@ int usb_new_device(struct usb_device *dev)
return 0;
}
-/* build device Tree */
-static void usb_scan_devices(void)
-{
- int i;
- struct usb_device *dev;
-
- /* first make all devices unknown */
- for (i = 0; i USB_MAX_DEVICE; i++) {
- memset(usb_dev[i], 0, sizeof(struct usb_device));
- usb_dev[i].devnum = -1;
- }
- dev_index = 0;
- /* device 0 is always present (root hub, so let it analyze) */
- dev = usb_alloc_new_device(ctrl);
- if (usb_new_device(dev))
- printf(No USB Device found\n);
- else
- printf(%d USB Device(s) found\n, dev_index);
- /* insert driver if possible */
-#ifdef CONFIG_USB_KEYBOARD
- drv_usb_kbd_init();
-#endif
- USB_PRINTF(scan end\n);
-}
-
/* EOF */
diff --git a/common/usb_storage.c b/common/usb_storage.c
index 4aeed82..950451e 100644
--- a/common/usb_storage.c
+++ b/common/usb_storage.c
@@ -244,7 +244,7 @@ int usb_stor_scan(int mode)
struct usb_device *dev;
if (mode == 1)
- printf( scanning bus for storage devices... );
+ printf( scanning usb for storage devices... );
usb_disable_asynch(1); /* asynch transfer not allowed */
diff --git a/drivers/usb/eth/usb_ether.c b/drivers/usb/eth/usb_ether.c
index 6cad6c8..f361e8b 100644
--- a/drivers/usb/eth/usb_ether.c
+++ b/drivers/usb/eth/usb_ether.c
@@ -123,7 +123,7 @@ int usb_host_eth_scan(int mode)
if (mode == 1)
- printf( scanning bus for ethernet devices... );
+ printf( scanning usb for ethernet devices... );
old_async = usb_disable_asynch(1); /* asynch transfer not allowed */
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Re: [U-Boot] [PATCH 2/4] EXYNOS: clock: add the get_mmc_clk function
On Tue, Jul 3, 2012 at 12:58 AM, Jaehoon Chung jh80.ch...@samsung.com wrote:
To get more exactly sclk value, used the get_mmc_clk.
Signed-off-by: Jaehoon Chung jh80.ch...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/cpu/armv7/exynos/clock.c | 78
arch/arm/include/asm/arch-exynos/clk.h |1 +
+/* exynos4: return mmc clock frequency */
+static unsigned long exynos4_get_mmc_clk(int dev_index)
+{
+ struct exynos4_clock *clk =
+ (struct exynos4_clock *)samsung_get_base_clock();
+ unsigned long uclk, sclk;
+ unsigned int sel;
+ unsigned int ratio;
+ unsigned int pre_ratio;
+
+ sel = readl(clk-src_fsys);
+ sel = (sel (dev_index 2)) 0xf;
I think it would be more clear, here, if you did:
sel = (sel (4 * dev_index)) 0xf;
It makes it obvious that you're shifting a value by 4 bits per device.
+/* exynos5: return mmc clock frequency */
+static unsigned long exynos5_get_mmc_clk(int dev_index)
+{
+ struct exynos5_clock *clk =
+ (struct exynos5_clock *)samsung_get_base_clock();
+ unsigned long uclk, sclk;
+ unsigned int sel;
+ unsigned int ratio;
+ unsigned int pre_ratio;
+
+ sel = readl(clk-src_fsys);
+ sel = (sel (dev_index 2)) 0xf;
Same comment here about dev_index * 4
+
+ if (sel == 0x6)
+ sclk = get_pll_clk(MPLL);
+ else if (sel == 0x7)
+ sclk = get_pll_clk(EPLL);
+ else if (sel == 0x8)
+ sclk = get_pll_clk(VPLL);
+ else
+ return 0;
+
+ ratio = readl(clk-div_fsys1);
+ ratio = (ratio (dev_index 2)) 0xf;
And here.
+unsigned long get_mmc_clk(int dev_index)
+{
+ if (cpu_is_exynos5())
+ return exynos5_get_mmc_clk(dev_index);
+ else
+ return exynos4_get_mmc_clk(dev_index);
+}
This is a very generic name, and could interfere with the generic
layer if it ever has a similarly-named function.
+
void set_mmc_clk(int dev_index, unsigned int div)
This isn't part of your patch, but this is *also* too generic of a name.
Andy
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Re: [U-Boot] [PATCH v2 3/4] EXYNOS: mmc: support DesignWare Controller for Samsung-SoC
On Tue, Jul 3, 2012 at 12:58 AM, Jaehoon Chung jh80.ch...@samsung.com wrote:
Support DesignWare MMC Controller for Samsung Specific.
Signed-off-by: Jaehoon Chung jh80.ch...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Signed-off-by: Rajeshawari Shinde rajeshwar...@samsung.com
---
arch/arm/include/asm/arch-exynos/dwmmc.h | 36 ++
drivers/mmc/exynos_dw_mmc.c | 58
++
+int exynos_dwmci_init(u32 regbase, int bus_width, int index)
+{
+ struct dwmci_host *host = NULL;
+ host = (struct dwmci_host *)malloc(sizeof(struct dwmci_host));
It is not necessary (or desirable) to cast the result of malloc.
Andy
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Re: [U-Boot] [PATCH] usb: remove unnecessary packed attributes
Dear Marek,
it seems you are right. Though it works for me this may be pure luck. So
please disregard this patch, I'll fix this up more properly.
Thanks,
Lucas
Am Donnerstag, den 30.08.2012, 22:59 +0200 schrieb Marek Vasut:
Dear Marek Vasut,
Dear Lucas Stach,
We don't actually need to pack those structs, as they
are not used to do actual hardware access.
This avoids some unaligned accesses and therefore makes
the EHCI stack work on ARMv7 without compiler workarounds.
Signed-off-by: Lucas Stach d...@lynxeye.de
I need to review this properly, will get back to it soon.
My 7th sense is telling me, these descriptors are sent across the bus.
ehci_submit_root() puts them into buffer and then ehci_submit_async() blasts
them. I believe they must be packed, otherwise the format expected by devices
on
the bus won't match and it'll fall apart.
Until then, CCing other good fellows.
---
drivers/usb/host/ehci-hcd.c | 2 +-
include/usb.h | 2 +-
2 Dateien geändert, 2 Zeilen hinzugefügt(+), 2 Zeilen entfernt(-)
diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
index 18b4bc6..2f4fa5e 100644
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -45,7 +45,7 @@ static struct descriptor {
struct usb_linux_config_descriptor config;
struct usb_linux_interface_descriptor interface;
struct usb_endpoint_descriptor endpoint;
-} __attribute__ ((packed)) descriptor = {
+} descriptor = {
{
0x8,/* bDescLength */
0x29, /* bDescriptorType: hub descriptor */
diff --git a/include/usb.h b/include/usb.h
index ba3d169..63730ee 100644
--- a/include/usb.h
+++ b/include/usb.h
@@ -369,7 +369,7 @@ struct usb_hub_descriptor {
unsigned char PortPowerCtrlMask[(USB_MAXCHILDREN+1+7)/8];
/* DeviceRemovable and PortPwrCtrlMask want to be variable-length
bitmaps that hold max 255 entries. (bit0 is ignored) */
-} __attribute__ ((packed));
+};
struct usb_hub_device {
Best regards,
Marek Vasut
Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH v2 2/4] mmc: s5p_mmc: fixed wrong function argument
On Thu, Jul 26, 2012 at 7:33 PM, Jaehoon Chung jh80.ch...@samsung.com wrote:
Useless code is removed, and get buswidth value.
Signed-off-by: Jaehoon Chung jh80.ch...@samsung.com
---
arch/arm/include/asm/arch-exynos/mmc.h |4 ++--
arch/arm/include/asm/arch-s5pc1xx/mmc.h |4 ++--
drivers/mmc/s5p_sdhci.c |9 -
3 files changed, 8 insertions(+), 9 deletions(-)
diff --git a/arch/arm/include/asm/arch-exynos/mmc.h
b/arch/arm/include/asm/arch-exynos/mmc.h
static inline unsigned int s5p_mmc_init(int index, int bus_width)
{
unsigned int base = samsung_get_base_mmc() + (0x1 * index);
- return s5p_sdhci_init(base, 5200, 40, index);
+ return s5p_sdhci_init(base, index, bus_width);
}
diff --git a/drivers/mmc/s5p_sdhci.c b/drivers/mmc/s5p_sdhci.c
index 12b28dd..d7e92a4 100644
--- a/drivers/mmc/s5p_sdhci.c
+++ b/drivers/mmc/s5p_sdhci.c
-int s5p_sdhci_init(u32 regbase, u32 max_clk, u32 min_clk, u32 quirks)
+int s5p_sdhci_init(u32 regbase, int index, int bus_width)
{
struct sdhci_host *host = NULL;
host = (struct sdhci_host *)malloc(sizeof(struct sdhci_host));
@@ -80,12 +80,11 @@ int s5p_sdhci_init(u32 regbase, u32 max_clk, u32 min_clk,
u32 quirks)
host-name = S5P_NAME;
host-ioaddr = (void *)regbase;
- host-quirks = quirks;
I'm very confused by this line. quirks is the 4th argument to the
original version of this function, but I see that the original
*caller* of this function passed in index. This is amazingly broken.
Fortunately, your patch fixes it, but it calls into doubt how it ever
worked with any index but 0.
- host-quirks |= SDHCI_QUIRK_NO_HISPD_BIT | SDHCI_QUIRK_BROKEN_VOLTAGE
|
+ host-quirks = SDHCI_QUIRK_NO_HISPD_BIT | SDHCI_QUIRK_BROKEN_VOLTAGE |
SDHCI_QUIRK_BROKEN_R1B | SDHCI_QUIRK_32BIT_DMA_ADDR;
host-voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195;
- if (quirks SDHCI_QUIRK_REG32_RW)
+ if (host-quirks SDHCI_QUIRK_REG32_RW)
Now that host-quirks is initialized just above, SDHCI_QUIRK_REG32_RW
will never be set, so there's no point in checking for it.
Andy
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Re: [U-Boot] [PATCH 2/4] usb: ehci: rework to take advantage of new lowlevel interface
Am Donnerstag, den 30.08.2012, 23:09 +0200 schrieb Marek Vasut: Dear Lucas Stach, Kill off ehci-core.h It was used to specify some static controller data. To support more than one controller being active at any time we have to carry the controller data ourselfes. Change the ehci interface accordingly. NOTE: OMAP implemented the ehci stuff a bit backwards and should be fixed to do the same thing as other platforms. But the change for now is at least compile clean. Signed-off-by: Lucas Stach d...@lynxeye.de [...] The omap change could be separated out, no? There is no logic change in OMAP up to now. I just had to add some forward decls to make it work, which would not be needed if OMAP worked like all the other platforms. Actually fixing this would be far more invasive and I don't really want to do this work, as I don't have a single OMAP board to test with. Also, I'd fix all these (*something)-somethingelse if possible. I just did it this way to minimize the churn this change is causing. Removing this, arguably a bit ugly, pointer construct could possibly introduce logic errors, that are not catchable by just compile testing this. I would rather leave this to someone who actually cares about the specific platform. Otherwise, Reviewed-by: Marek Vasut ma...@denx.de Thanks, Lucas ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] Loop block device for sandbox
Dear Pavel Herrmann,
On Thursday 30 of August 2012 20:45:13 Marek Vasut wrote:
Dear Pavel Herrmann,
On Thursday 30 of August 2012 00:18:18 Marek Vasut wrote:
...snip...
+extern block_dev_desc_t sata_dev_desc[];
+
+int init_sata(int dev)
+{
+ block_dev_desc_t *pdev = (sata_dev_desc[dev]);
Superfluous braces ... Actually, I think sata_dev_desc as it would
work very well too.
Straight copy from dwc_ahsata.c, makes it more readable thought, as the
order of operation is not very intuitive IMHO.
sata_dev_desc + dev ?
even less intuitive
Why so?
+lbaint_t sata_read(int dev, lbaint_t start, lbaint_t blkcnt, void
*buffer)
+{
+ block_dev_desc_t *pdev = (sata_dev_desc[dev]);
+ int fd = (long) pdev-priv;
If pdev is NULL, this will crash
well, it isn't, at least not from the command - thats why you define
the number of ports in advance, you get dev already range-checked
Range check is fine, but will pdev be inited? It's a pointer from some
array.
init_sata is called first, so pdev is inited (see cmd_sata.c)
Unless it fails. Then what ?
+ lbaint_t retval;
+
+ os_lseek(fd, start*ATA_SECT_SIZE, OS_SEEK_SET);
+ retval = os_read(fd, buffer, ATA_SECT_SIZE * blkcnt);
+
+ return retval/ATA_SECT_SIZE;
+}
+
+lbaint_t sata_write(int dev, lbaint_t start, lbaint_t blkcnt, void
*buffer) +{
+ block_dev_desc_t *pdev = (sata_dev_desc[dev]);
+ int fd = (long) pdev-priv;
+ lbaint_t retval;
+
+ os_lseek(fd, start*ATA_SECT_SIZE, OS_SEEK_SET);
Besides, lseek can fail, can it not?
If you open a pipe (or nothing), yes
in the first case, you shouldn't
Shouldn't ... what? Sorry, I cannot parse this.
shouldn't do that - means i agree there should be a check in case you are
actively trying to break things, and use pipes/sockets as loop blocks
Good
in the second, the I/O op will harmlessly
fail as well
How so?
because then the fd is -1, and read/write will do the right thing there
(nothing, return -1 and set errno to EBADF)
From write(2)
--8--
RETURN VALUE
On success, the number of bytes written is returned (zero indicates
nothing was written). On error, -1 is returned,
and errno is set appropriately.
If count is zero and fd refers to a regular file, then write() may
return
a failure status if one of the errors below
is detected. If no errors are detected, 0 will be returned without
causing any other effect. If count is zero and fd
refers to a file other than a regular file, the results are not
specified.
--8--
I don't see the case where fd = -1 handled there at all. The last sentence
resembles it, but in that case, the behavior is undefined. Can you elaborate
please?
+ if (namelen 20)
+ namelen = 20;
Why do you trim down the string, won't simple strdup() work?
nah, the destination is char[21], as it is the exact length of
corresponding field in ATA identify response (one more for a 0 at the
end)
I see, is it a full path ? If so, it might be a better idea to use the
filename itself instead of the whole path. So you'd prevent names like
~/../foo/../.././bar.img .
yes, i was thinking about ...${last 17 bytes of the name} if the name was
longer, but this proved significantly simpler for demonstrating the general
idea.
I think the FS code might contain some function to fixup the path and get
filename from path.
+ memcpy(pdev-product, filenames[dev], namelen);
+ pdev-product[20] = 0;
+
+ if (fd != -1) {
And if fd is -1 ?
then all defaults to an invalid device, because you failed to open the
file, for whatever the reason.
At least the printf below will choke, since pdev-lba is uninited
not the case. sata_dev_desc is inited in cmd_sata.c, and therefore by not
doing anything we get an empty device
I see ... shall we also move all these memcpy() calls in to if (fd != -1) then?
Best Regards
Pavel Herrmann
Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH v2 4/4] mmc: sdhci: add the udelay for completed post-request
On Thu, Jul 26, 2012 at 7:33 PM, Jaehoon Chung jh80.ch...@samsung.com wrote:
To ensure that complete the request, add udelay(100).
Also increased the timeout value to 1.
(Because timeout value is short, there is the case that didn't transfer data)
Signed-off-by: Jaehoon Chung jh80.ch...@samsung.com
---
drivers/mmc/sdhci.c |3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
index ac39e48..f71a14b 100644
--- a/drivers/mmc/sdhci.c
+++ b/drivers/mmc/sdhci.c
@@ -83,7 +83,7 @@ static int sdhci_transfer_data(struct sdhci_host *host,
struct mmc_data *data,
{
unsigned int stat, rdy, mask, timeout, block = 0;
- timeout = 1;
+ timeout = 10;
rdy = SDHCI_INT_SPACE_AVAIL | SDHCI_INT_DATA_AVAIL;
mask = SDHCI_DATA_AVAILABLE | SDHCI_SPACE_AVAILABLE;
do {
@@ -239,6 +239,7 @@ int sdhci_send_command(struct mmc *mmc, struct mmc_cmd
*cmd,
if ((host-quirks SDHCI_QUIRK_32BIT_DMA_ADDR)
!is_aligned (data-flags == MMC_DATA_READ))
memcpy(data-dest, aligned_buffer, trans_bytes);
+ udelay(100);
These sorts of changes (both the increased timeout, and the udelay)
look very much like attempting to use time to substitute for proper
coherency assurances. What request is this udelay allowing to
finish?
Andy
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Re: [U-Boot] [PATCH 2/4] usb: ehci: rework to take advantage of new lowlevel interface
Dear Lucas Stach, Am Donnerstag, den 30.08.2012, 23:09 +0200 schrieb Marek Vasut: Dear Lucas Stach, Kill off ehci-core.h It was used to specify some static controller data. To support more than one controller being active at any time we have to carry the controller data ourselfes. Change the ehci interface accordingly. NOTE: OMAP implemented the ehci stuff a bit backwards and should be fixed to do the same thing as other platforms. But the change for now is at least compile clean. Signed-off-by: Lucas Stach d...@lynxeye.de [...] The omap change could be separated out, no? There is no logic change in OMAP up to now. I just had to add some forward decls to make it work, which would not be needed if OMAP worked like all the other platforms. Actually fixing this would be far more invasive and I don't really want to do this work, as I don't have a single OMAP board to test with. CCing Tom Also, I'd fix all these (*something)-somethingelse if possible. I just did it this way to minimize the churn this change is causing. Removing this, arguably a bit ugly, pointer construct could possibly introduce logic errors, that are not catchable by just compile testing this. I would rather leave this to someone who actually cares about the specific platform. CC these people please to review such changes. Otherwise, Reviewed-by: Marek Vasut ma...@denx.de Thanks, Lucas Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] usb: remove unnecessary packed attributes
Dear Lucas Stach,
Dear Marek,
it seems you are right. Though it works for me this may be pure luck. So
please disregard this patch, I'll fix this up more properly.
Cool thing we caught it :-)
http://www.denx.de/wiki/U-Boot/Patches btw read up here ... don't top-post ...
you know the drill.
Thanks,
Lucas
Am Donnerstag, den 30.08.2012, 22:59 +0200 schrieb Marek Vasut:
Dear Marek Vasut,
Dear Lucas Stach,
We don't actually need to pack those structs, as they
are not used to do actual hardware access.
This avoids some unaligned accesses and therefore makes
the EHCI stack work on ARMv7 without compiler workarounds.
Signed-off-by: Lucas Stach d...@lynxeye.de
I need to review this properly, will get back to it soon.
My 7th sense is telling me, these descriptors are sent across the bus.
ehci_submit_root() puts them into buffer and then ehci_submit_async()
blasts them. I believe they must be packed, otherwise the format
expected by devices on the bus won't match and it'll fall apart.
Until then, CCing other good fellows.
---
drivers/usb/host/ehci-hcd.c | 2 +-
include/usb.h | 2 +-
2 Dateien geändert, 2 Zeilen hinzugefügt(+), 2 Zeilen entfernt(-)
diff --git a/drivers/usb/host/ehci-hcd.c
b/drivers/usb/host/ehci-hcd.c index 18b4bc6..2f4fa5e 100644
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -45,7 +45,7 @@ static struct descriptor {
struct usb_linux_config_descriptor config;
struct usb_linux_interface_descriptor interface;
struct usb_endpoint_descriptor endpoint;
-} __attribute__ ((packed)) descriptor = {
+} descriptor = {
{
0x8,/* bDescLength */
0x29, /* bDescriptorType: hub descriptor */
diff --git a/include/usb.h b/include/usb.h
index ba3d169..63730ee 100644
--- a/include/usb.h
+++ b/include/usb.h
@@ -369,7 +369,7 @@ struct usb_hub_descriptor {
unsigned char PortPowerCtrlMask[(USB_MAXCHILDREN+1+7)/8];
/* DeviceRemovable and PortPwrCtrlMask want to be variable-
length
bitmaps that hold max 255 entries. (bit0 is ignored) */
-} __attribute__ ((packed));
+};
struct usb_hub_device {
Best regards,
Marek Vasut
Best regards,
Marek Vasut
Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH 0/2] PXA25x: USB ethernet driver
On 30.08.2012 21:09, Marek Vasut wrote: Dear Łukasz Dałek, I've moved cpu revision detection to arch/arm/cpu/pxa as you suggest. Cleaned ethernet driver. Soon I would also send patches for drivers/usb/gadget/ether.c to work correctly with this pxa driver. Łukasz Dałek (2): pxa: Add some stuff to examine cpu model and rev pxa25x: Add USB ethernet gadget arch/arm/cpu/pxa/cpuinfo.c | 11 +- arch/arm/include/asm/arch-pxa/pxa.h | 13 + drivers/usb/gadget/Makefile |1 + drivers/usb/gadget/pxa25x_udc.c | 2059 +++ drivers/usb/gadget/pxa25x_udc.h | 168 +++ 5 files changed, 2250 insertions(+), 2 deletions(-) create mode 100644 drivers/usb/gadget/pxa25x_udc.c create mode 100644 drivers/usb/gadget/pxa25x_udc.h Just a dumb question -- do we have any actual user for this stuff? Best regards, Marek Vasut Me. I have iPAQ h2200 but my patches for this paltmop aren't in the source tree. There is a chance that we don't have any device which uses this. Łukasz Dałek ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 0/2] PXA25x: USB ethernet driver
Dear Łukasz Dałek, On 30.08.2012 21:09, Marek Vasut wrote: Dear Łukasz Dałek, I've moved cpu revision detection to arch/arm/cpu/pxa as you suggest. Cleaned ethernet driver. Soon I would also send patches for drivers/usb/gadget/ether.c to work correctly with this pxa driver. Łukasz Dałek (2): pxa: Add some stuff to examine cpu model and rev pxa25x: Add USB ethernet gadget arch/arm/cpu/pxa/cpuinfo.c | 11 +- arch/arm/include/asm/arch-pxa/pxa.h | 13 + drivers/usb/gadget/Makefile |1 + drivers/usb/gadget/pxa25x_udc.c | 2059 +++ drivers/usb/gadget/pxa25x_udc.h | 168 +++ 5 files changed, 2250 insertions(+), 2 deletions(-) create mode 100644 drivers/usb/gadget/pxa25x_udc.c create mode 100644 drivers/usb/gadget/pxa25x_udc.h Just a dumb question -- do we have any actual user for this stuff? Best regards, Marek Vasut Me. I have iPAQ h2200 but my patches for this paltmop aren't in the source tree. There is a chance that we don't have any device which uses this. Why don't you add support for this ipaq too then ? Łukasz Dałek Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 0/2] PXA25x: USB ethernet driver
On 31.08.2012 00:04, Marek Vasut wrote: Dear Łukasz Dałek, On 30.08.2012 21:09, Marek Vasut wrote: Dear Łukasz Dałek, I've moved cpu revision detection to arch/arm/cpu/pxa as you suggest. Cleaned ethernet driver. Soon I would also send patches for drivers/usb/gadget/ether.c to work correctly with this pxa driver. Łukasz Dałek (2): pxa: Add some stuff to examine cpu model and rev pxa25x: Add USB ethernet gadget arch/arm/cpu/pxa/cpuinfo.c | 11 +- arch/arm/include/asm/arch-pxa/pxa.h | 13 + drivers/usb/gadget/Makefile |1 + drivers/usb/gadget/pxa25x_udc.c | 2059 +++ drivers/usb/gadget/pxa25x_udc.h | 168 +++ 5 files changed, 2250 insertions(+), 2 deletions(-) create mode 100644 drivers/usb/gadget/pxa25x_udc.c create mode 100644 drivers/usb/gadget/pxa25x_udc.h Just a dumb question -- do we have any actual user for this stuff? Best regards, Marek Vasut Me. I have iPAQ h2200 but my patches for this paltmop aren't in the source tree. There is a chance that we don't have any device which uses this. Why don't you add support for this ipaq too then ? I will but first of all I want to finish with pxa25x udc drivers and with bugs in CDC ether driver (ether.c). Then I will send patches adding support for my device. Łukasz Dałek Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCHv1] ARM: Add Altera SOCFPGA Cyclone5
On Thu, Aug 30, 2012 at 10:42:11PM +0200, Pavel Machek wrote: Hi! spl_ram_load_image... will I need to create some kind of #ifdef? Or would #ifdef BOOT_DEVICE_RAM do the trick? Good point, yes, we should add CONFIG_SPL_RAM_DEVICE and document it in docs/README.SPL and the toplevel README. Ok, something like this? Posting separately, maybe it makes sense to merge to your PATCH v6...? Sure, just include the actual spl_ram_load_image bits as well and I'll pick it up. Here you go. With the multi-line comment fixed up, queued for my v6. -- Tom ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] usb: do explicit unaligned accesses
usb_hub_descriptor has to be packed as it's used for
communication with the device. Member wHubCharacteristics
violates the natural alignment rules.
Use explicit unaligned access functions for this member.
Fixes ARMv7 traping while using USB.
Signed-off-by: Lucas Stach d...@lynxeye.de
---
common/usb_hub.c| 14 +-
drivers/usb/host/ehci-hcd.c | 7 +--
2 Dateien geändert, 14 Zeilen hinzugefügt(+), 7 Zeilen entfernt(-)
diff --git a/common/usb_hub.c b/common/usb_hub.c
index 53d939c..b8cd990 100644
--- a/common/usb_hub.c
+++ b/common/usb_hub.c
@@ -43,6 +43,7 @@
#include common.h
#include command.h
#include asm/processor.h
+#include asm/unaligned.h
#include linux/ctype.h
#include asm/byteorder.h
#include asm/unaligned.h
@@ -269,6 +270,7 @@ static int usb_hub_configure(struct usb_device *dev)
int i;
ALLOC_CACHE_ALIGN_BUFFER(unsigned char, buffer, USB_BUFSIZ);
unsigned char *bitmap;
+ short hubCharacteristics;
struct usb_hub_descriptor *descriptor;
struct usb_hub_device *hub;
#ifdef USB_HUB_DEBUG
@@ -304,8 +306,9 @@ static int usb_hub_configure(struct usb_device *dev)
}
memcpy((unsigned char *)hub-desc, buffer, descriptor-bLength);
/* adjust 16bit values */
- hub-desc.wHubCharacteristics =
- le16_to_cpu(descriptor-wHubCharacteristics);
+ put_unaligned(le16_to_cpu(get_unaligned(
+ descriptor-wHubCharacteristics)),
+ descriptor-wHubCharacteristics);
/* set the bitmap */
bitmap = (unsigned char *)hub-desc.DeviceRemovable[0];
/* devices not removable by default */
@@ -322,7 +325,8 @@ static int usb_hub_configure(struct usb_device *dev)
dev-maxchild = descriptor-bNbrPorts;
USB_HUB_PRINTF(%d ports detected\n, dev-maxchild);
- switch (hub-desc.wHubCharacteristics HUB_CHAR_LPSM) {
+ hubCharacteristics = get_unaligned(hub-desc.wHubCharacteristics);
+ switch (hubCharacteristics HUB_CHAR_LPSM) {
case 0x00:
USB_HUB_PRINTF(ganged power switching\n);
break;
@@ -335,12 +339,12 @@ static int usb_hub_configure(struct usb_device *dev)
break;
}
- if (hub-desc.wHubCharacteristics HUB_CHAR_COMPOUND)
+ if (hubCharacteristics HUB_CHAR_COMPOUND)
USB_HUB_PRINTF(part of a compound device\n);
else
USB_HUB_PRINTF(standalone hub\n);
- switch (hub-desc.wHubCharacteristics HUB_CHAR_OCPM) {
+ switch (hubCharacteristics HUB_CHAR_OCPM) {
case 0x00:
USB_HUB_PRINTF(global over-current protection\n);
break;
diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
index bfea192..d90e94d 100644
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -22,6 +22,7 @@
*/
#include common.h
#include asm/byteorder.h
+#include asm/unaligned.h
#include usb.h
#include asm/io.h
#include malloc.h
@@ -876,10 +877,12 @@ int usb_lowlevel_init(int index, void **controller)
debug(Register %x NbrPorts %d\n, reg, descriptor.hub.bNbrPorts);
/* Port Indicators */
if (HCS_INDICATOR(reg))
- descriptor.hub.wHubCharacteristics |= 0x80;
+ put_unaligned(get_unaligned(descriptor.hub.wHubCharacteristics)
+ | 0x80, descriptor.hub.wHubCharacteristics);
/* Port Power Control */
if (HCS_PPC(reg))
- descriptor.hub.wHubCharacteristics |= 0x01;
+ put_unaligned(get_unaligned(descriptor.hub.wHubCharacteristics)
+ | 0x01, descriptor.hub.wHubCharacteristics);
/* Start the host controller. */
cmd = ehci_readl(ehcic[index].hcor-or_usbcmd);
--
1.7.11.4
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Re: [U-Boot] [PATCH] usb: do explicit unaligned accesses
Dear Lucas Stach,
usb_hub_descriptor has to be packed as it's used for
communication with the device. Member wHubCharacteristics
violates the natural alignment rules.
Use explicit unaligned access functions for this member.
Fixes ARMv7 traping while using USB.
Shouldn't a properly configured compiler prevent such behavior?
Signed-off-by: Lucas Stach d...@lynxeye.de
---
common/usb_hub.c| 14 +-
drivers/usb/host/ehci-hcd.c | 7 +--
2 Dateien geändert, 14 Zeilen hinzugefügt(+), 7 Zeilen entfernt(-)
diff --git a/common/usb_hub.c b/common/usb_hub.c
index 53d939c..b8cd990 100644
--- a/common/usb_hub.c
+++ b/common/usb_hub.c
@@ -43,6 +43,7 @@
#include common.h
#include command.h
#include asm/processor.h
+#include asm/unaligned.h
#include linux/ctype.h
#include asm/byteorder.h
#include asm/unaligned.h
@@ -269,6 +270,7 @@ static int usb_hub_configure(struct usb_device *dev)
int i;
ALLOC_CACHE_ALIGN_BUFFER(unsigned char, buffer, USB_BUFSIZ);
unsigned char *bitmap;
+ short hubCharacteristics;
struct usb_hub_descriptor *descriptor;
struct usb_hub_device *hub;
#ifdef USB_HUB_DEBUG
@@ -304,8 +306,9 @@ static int usb_hub_configure(struct usb_device *dev)
}
memcpy((unsigned char *)hub-desc, buffer, descriptor-bLength);
/* adjust 16bit values */
- hub-desc.wHubCharacteristics =
- le16_to_cpu(descriptor-wHubCharacteristics);
+ put_unaligned(le16_to_cpu(get_unaligned(
+ descriptor-wHubCharacteristics)),
+ descriptor-wHubCharacteristics);
/* set the bitmap */
bitmap = (unsigned char *)hub-desc.DeviceRemovable[0];
/* devices not removable by default */
@@ -322,7 +325,8 @@ static int usb_hub_configure(struct usb_device *dev)
dev-maxchild = descriptor-bNbrPorts;
USB_HUB_PRINTF(%d ports detected\n, dev-maxchild);
- switch (hub-desc.wHubCharacteristics HUB_CHAR_LPSM) {
+ hubCharacteristics = get_unaligned(hub-desc.wHubCharacteristics);
+ switch (hubCharacteristics HUB_CHAR_LPSM) {
case 0x00:
USB_HUB_PRINTF(ganged power switching\n);
break;
@@ -335,12 +339,12 @@ static int usb_hub_configure(struct usb_device *dev)
break;
}
- if (hub-desc.wHubCharacteristics HUB_CHAR_COMPOUND)
+ if (hubCharacteristics HUB_CHAR_COMPOUND)
USB_HUB_PRINTF(part of a compound device\n);
else
USB_HUB_PRINTF(standalone hub\n);
- switch (hub-desc.wHubCharacteristics HUB_CHAR_OCPM) {
+ switch (hubCharacteristics HUB_CHAR_OCPM) {
case 0x00:
USB_HUB_PRINTF(global over-current protection\n);
break;
diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
index bfea192..d90e94d 100644
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -22,6 +22,7 @@
*/
#include common.h
#include asm/byteorder.h
+#include asm/unaligned.h
#include usb.h
#include asm/io.h
#include malloc.h
@@ -876,10 +877,12 @@ int usb_lowlevel_init(int index, void **controller)
debug(Register %x NbrPorts %d\n, reg, descriptor.hub.bNbrPorts);
/* Port Indicators */
if (HCS_INDICATOR(reg))
- descriptor.hub.wHubCharacteristics |= 0x80;
+ put_unaligned(get_unaligned(descriptor.hub.wHubCharacteristics)
+ | 0x80, descriptor.hub.wHubCharacteristics);
/* Port Power Control */
if (HCS_PPC(reg))
- descriptor.hub.wHubCharacteristics |= 0x01;
+ put_unaligned(get_unaligned(descriptor.hub.wHubCharacteristics)
+ | 0x01, descriptor.hub.wHubCharacteristics);
/* Start the host controller. */
cmd = ehci_readl(ehcic[index].hcor-or_usbcmd);
Best regards,
Marek Vasut
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[U-Boot] [PATCH] mtd: nand: allow NAND_NO_SUBPAGE_WRITE to be set from driver
This is based on Linux kernel -next:
commit a1256b0e087ed3cdb584c683acb966ee885f733c
Author: Brian Norris computersforpe...@gmail.com
Date: Fri Jul 13 09:28:24 2012 -0700
mtd: nand: allow NAND_NO_SUBPAGE_WRITE to be set from driver
The NAND_CHIPOPTIONS_MSK has limited utility and is causing real bugs. It
silently masks off at least one flag that might be set by the driver
(NAND_NO_SUBPAGE_WRITE). This breaks the GPMI NAND driver and possibly
others.
Really, as long as driver writers exercise a small amount of care with
NAND_* options, this mask is not necessary at all; it was only here to
prevent certain options from accidentally being set by the driver. But the
original thought turns out to be a bad idea occasionally. Thus, kill it.
Note, this patch fixes some major gpmi-nand breakage.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Brian Norris computersforpe...@gmail.com
Cc: Eric Nelson eric.nel...@boundarydevices.com
Cc: Fabio Estevam feste...@gmail.com
Cc: Otavio Salvador ota...@ossystems.com.br
Cc: Scott Wood scottw...@freescale.com
---
drivers/mtd/nand/nand_base.c |7 ++-
include/linux/mtd/nand.h |3 ---
2 files changed, 2 insertions(+), 8 deletions(-)
NOTE: Please test before applying, I'd like to know it doesn't cause breakage.
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index bfd668f..658b3ad 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -2578,9 +2578,7 @@ static int nand_flash_detect_onfi(struct mtd_info *mtd,
struct nand_chip *chip,
if (le16_to_cpu(p-features) 1)
*busw = NAND_BUSWIDTH_16;
- chip-options = ~NAND_CHIPOPTIONS_MSK;
- chip-options |= (NAND_NO_READRDY |
- NAND_NO_AUTOINCR) NAND_CHIPOPTIONS_MSK;
+ chip-options |= NAND_NO_READRDY | NAND_NO_AUTOINCR;
return 1;
}
@@ -2752,8 +2750,7 @@ static const struct nand_flash_dev
*nand_get_flash_type(struct mtd_info *mtd,
}
}
/* Get chip options, preserve non chip based options */
- chip-options = ~NAND_CHIPOPTIONS_MSK;
- chip-options |= type-options NAND_CHIPOPTIONS_MSK;
+ chip-options |= type-options;
/* Check if chip is a not a samsung device. Do not clear the
* options for chips which are not having an extended id.
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index 82704de..0a5aa64 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -205,9 +205,6 @@ typedef enum {
#define NAND_SUBPAGE_READ(chip) ((chip-ecc.mode == NAND_ECC_SOFT) \
(chip-page_shift 9))
-/* Mask to zero out the chip options, which come from the id table */
-#define NAND_CHIPOPTIONS_MSK (0x ~NAND_NO_AUTOINCR)
-
/* Non chip related options */
/*
* Use a flash based bad block table. OOB identifier is saved in OOB area.
--
1.7.10.4
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[U-Boot] [PATCH] SCSPS1: Enable caches
Enable caches, make it faster! Signed-off-by: Marek Vasut ma...@denx.de Cc: Stefano Babic sba...@denx.de Cc: Detlev Zundel d...@denx.de --- include/configs/sc_sps_1.h |2 -- 1 file changed, 2 deletions(-) diff --git a/include/configs/sc_sps_1.h b/include/configs/sc_sps_1.h index 0ebdfb8..f5dc393 100644 --- a/include/configs/sc_sps_1.h +++ b/include/configs/sc_sps_1.h @@ -39,8 +39,6 @@ #include asm/arch/regs-base.h #define CONFIG_SYS_NO_FLASH -#define CONFIG_SYS_ICACHE_OFF -#define CONFIG_SYS_DCACHE_OFF #define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_ARCH_CPU_INIT #define CONFIG_ARCH_MISC_INIT -- 1.7.10.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] mtd: nand: allow NAND_NO_SUBPAGE_WRITE to be set from driver
Dear Marek Vasut,
This is based on Linux kernel -next:
commit a1256b0e087ed3cdb584c683acb966ee885f733c
Author: Brian Norris computersforpe...@gmail.com
Date: Fri Jul 13 09:28:24 2012 -0700
mtd: nand: allow NAND_NO_SUBPAGE_WRITE to be set from driver
The NAND_CHIPOPTIONS_MSK has limited utility and is causing real bugs.
It silently masks off at least one flag that might be set by the driver
(NAND_NO_SUBPAGE_WRITE). This breaks the GPMI NAND driver and possibly
others.
Really, as long as driver writers exercise a small amount of care with
NAND_* options, this mask is not necessary at all; it was only here to
prevent certain options from accidentally being set by the driver. But
the original thought turns out to be a bad idea occasionally. Thus, kill
it.
Note, this patch fixes some major gpmi-nand breakage.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Brian Norris computersforpe...@gmail.com
Cc: Eric Nelson eric.nel...@boundarydevices.com
Cc: Fabio Estevam feste...@gmail.com
Cc: Otavio Salvador ota...@ossystems.com.br
Cc: Scott Wood scottw...@freescale.com
---
drivers/mtd/nand/nand_base.c |7 ++-
include/linux/mtd/nand.h |3 ---
2 files changed, 2 insertions(+), 8 deletions(-)
NOTE: Please test before applying, I'd like to know it doesn't cause
breakage.
NOTE2: This fixes UBI on MX28, MX6Q and soon-to-be MX233 GPMI NAND. Thanks
again, Brian!
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index bfd668f..658b3ad 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -2578,9 +2578,7 @@ static int nand_flash_detect_onfi(struct mtd_info
*mtd, struct nand_chip *chip, if (le16_to_cpu(p-features) 1)
*busw = NAND_BUSWIDTH_16;
- chip-options = ~NAND_CHIPOPTIONS_MSK;
- chip-options |= (NAND_NO_READRDY |
- NAND_NO_AUTOINCR) NAND_CHIPOPTIONS_MSK;
+ chip-options |= NAND_NO_READRDY | NAND_NO_AUTOINCR;
return 1;
}
@@ -2752,8 +2750,7 @@ static const struct nand_flash_dev
*nand_get_flash_type(struct mtd_info *mtd, }
}
/* Get chip options, preserve non chip based options */
- chip-options = ~NAND_CHIPOPTIONS_MSK;
- chip-options |= type-options NAND_CHIPOPTIONS_MSK;
+ chip-options |= type-options;
/* Check if chip is a not a samsung device. Do not clear the
* options for chips which are not having an extended id.
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index 82704de..0a5aa64 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -205,9 +205,6 @@ typedef enum {
#define NAND_SUBPAGE_READ(chip) ((chip-ecc.mode == NAND_ECC_SOFT) \
(chip-page_shift 9))
-/* Mask to zero out the chip options, which come from the id table */
-#define NAND_CHIPOPTIONS_MSK (0x ~NAND_NO_AUTOINCR)
-
/* Non chip related options */
/*
* Use a flash based bad block table. OOB identifier is saved in OOB area.
Best regards,
Marek Vasut
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Re: [U-Boot] trouble with mmc on origen
Hi John, Did you apply this patch? http://www.mail-archive.com/u-boot@lists.denx.de/msg88515.html Best Regards, Jaehoon Chung On 08/31/2012 12:42 AM, John Rigby wrote: Jaehoon, I get timeouts on multiblock mmc reads with v2012.07 u-boot. I did a bisect and found that it is broken back to 442d55685e1e2310d546044a6519ae73e4ba348a mmc: support the sdhci instead of s5p_mmc for samsung-soc and 236bfecff8091356d81e79da3281b9e4af967468 mmc: add the quirk to use the sdhci for samsung-soc That second commit seems to adds two new quirks SDHCI_QUIRK_NO_HISPD_BIT and SDHCI_QUIRK_BROKEN_VOLTAGE but I don't see any board using these so perhaps these need to be enabled for origen? Thanks, --john ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 0/2] PXA25x: USB ethernet driver
Dear Łukasz Dałek, On 31.08.2012 00:04, Marek Vasut wrote: Dear Łukasz Dałek, On 30.08.2012 21:09, Marek Vasut wrote: Dear Łukasz Dałek, I've moved cpu revision detection to arch/arm/cpu/pxa as you suggest. Cleaned ethernet driver. Soon I would also send patches for drivers/usb/gadget/ether.c to work correctly with this pxa driver. Łukasz Dałek (2): pxa: Add some stuff to examine cpu model and rev pxa25x: Add USB ethernet gadget arch/arm/cpu/pxa/cpuinfo.c | 11 +- arch/arm/include/asm/arch-pxa/pxa.h | 13 + drivers/usb/gadget/Makefile |1 + drivers/usb/gadget/pxa25x_udc.c | 2059 +++ drivers/usb/gadget/pxa25x_udc.h | 168 +++ | 5 files changed, 2250 insertions(+), 2 deletions(-) create mode 100644 drivers/usb/gadget/pxa25x_udc.c create mode 100644 drivers/usb/gadget/pxa25x_udc.h Just a dumb question -- do we have any actual user for this stuff? Best regards, Marek Vasut Me. I have iPAQ h2200 but my patches for this paltmop aren't in the source tree. There is a chance that we don't have any device which uses this. Why don't you add support for this ipaq too then ? I will but first of all I want to finish with pxa25x udc drivers and with bugs in CDC ether driver (ether.c). Then I will send patches adding support for my device. I'll put those patches on hold then, as it is pointless to put unused code into the tree. Łukasz Dałek Best regards, Marek Vasut Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 2/4] mmc: s5p_mmc: fixed wrong function argument
Hi Andy, @@ -80,12 +80,11 @@ int s5p_sdhci_init(u32 regbase, u32 max_clk, u32 min_clk, u32 quirks) host-name = S5P_NAME; host-ioaddr = (void *)regbase; - host-quirks = quirks; I'm very confused by this line. quirks is the 4th argument to the original version of this function, but I see that the original *caller* of this function passed in index. This is amazingly broken. Fortunately, your patch fixes it, but it calls into doubt how it ever worked with any index but 0. It's just lucky. Because We are using the index 0 for eMMC card. So i fixed this problem. - host-quirks |= SDHCI_QUIRK_NO_HISPD_BIT | SDHCI_QUIRK_BROKEN_VOLTAGE | + host-quirks = SDHCI_QUIRK_NO_HISPD_BIT | SDHCI_QUIRK_BROKEN_VOLTAGE | SDHCI_QUIRK_BROKEN_R1B | SDHCI_QUIRK_32BIT_DMA_ADDR; host-voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195; - if (quirks SDHCI_QUIRK_REG32_RW) + if (host-quirks SDHCI_QUIRK_REG32_RW) Now that host-quirks is initialized just above, SDHCI_QUIRK_REG32_RW will never be set, so there's no point in checking for it. Right, we can remove that. i will fix. Best Regards, Jaehoon Chung Andy ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 1/4] mmc: s5p_sdhci: set the SDHCI_QUIRK_BROKEN_R1B
Samsung SoC is broken busy waiting for R1b type. And clk delay control value is modified the previosuly value. (that value used at the s5p_mmc.c) Signed-off-by: Jaehoon Chung jh80.ch...@samsung.com Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com --- drivers/mmc/s5p_sdhci.c | 10 -- 1 files changed, 4 insertions(+), 6 deletions(-) diff --git a/drivers/mmc/s5p_sdhci.c b/drivers/mmc/s5p_sdhci.c index 1d4481b..6a04bd7 100644 --- a/drivers/mmc/s5p_sdhci.c +++ b/drivers/mmc/s5p_sdhci.c @@ -54,7 +54,7 @@ static void s5p_sdhci_set_control_reg(struct sdhci_host *host) * 00 = Delay3 (inverter delay) * 10 = Delay4 (inverter delay + 2ns) */ - val = SDHCI_CTRL3_FCSEL3 | SDHCI_CTRL3_FCSEL1; + val = SDHCI_CTRL3_FCSEL0 | SDHCI_CTRL3_FCSEL1; sdhci_writel(host, val, SDHCI_CONTROL3); /* @@ -82,12 +82,10 @@ int s5p_sdhci_init(u32 regbase, u32 max_clk, u32 min_clk, u32 quirks) host-ioaddr = (void *)regbase; host-quirks = quirks; - host-quirks |= SDHCI_QUIRK_NO_HISPD_BIT | SDHCI_QUIRK_BROKEN_VOLTAGE; + host-quirks = SDHCI_QUIRK_NO_HISPD_BIT | SDHCI_QUIRK_BROKEN_VOLTAGE | + SDHCI_QUIRK_BROKEN_R1B | SDHCI_QUIRK_32BIT_DMA_ADDR; host-voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195; - if (quirks SDHCI_QUIRK_REG32_RW) - host-version = sdhci_readl(host, SDHCI_HOST_VERSION - 2) 16; - else - host-version = sdhci_readw(host, SDHCI_HOST_VERSION); + host-version = sdhci_readw(host, SDHCI_HOST_VERSION); host-set_control_reg = s5p_sdhci_set_control_reg; -- 1.7.4.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 3/4] mmc: s5p_sdhci: add the set_mmc_clk for cmu control
Samsung SoC use the cmu control to set clock.
Signed-off-by: Jaehoon Chung jh80.ch...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
drivers/mmc/s5p_sdhci.c |3 +++
drivers/mmc/sdhci.c |3 +++
include/configs/trats.h |1 +
include/sdhci.h |2 ++
4 files changed, 9 insertions(+), 0 deletions(-)
diff --git a/drivers/mmc/s5p_sdhci.c b/drivers/mmc/s5p_sdhci.c
index 9378e36..b978236 100644
--- a/drivers/mmc/s5p_sdhci.c
+++ b/drivers/mmc/s5p_sdhci.c
@@ -21,6 +21,7 @@
#include malloc.h
#include sdhci.h
#include asm/arch/mmc.h
+#include asm/arch/clk.h
static char *S5P_NAME = SAMSUNG SDHCI;
static void s5p_sdhci_set_control_reg(struct sdhci_host *host)
@@ -87,6 +88,8 @@ int s5p_sdhci_init(u32 regbase, int index, int bus_width)
host-version = sdhci_readw(host, SDHCI_HOST_VERSION);
host-set_control_reg = s5p_sdhci_set_control_reg;
+ host-set_clock = set_mmc_clk;
+ host-index = index;
host-host_caps = MMC_MODE_HC;
diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
index 1709643..ac39e48 100644
--- a/drivers/mmc/sdhci.c
+++ b/drivers/mmc/sdhci.c
@@ -279,6 +279,9 @@ static int sdhci_set_clock(struct mmc *mmc, unsigned int
clock)
}
div = 1;
+ if (host-set_clock)
+ host-set_clock(host-index, div);
+
clk = (div SDHCI_DIV_MASK) SDHCI_DIVIDER_SHIFT;
clk |= ((div SDHCI_DIV_HI_MASK) SDHCI_DIV_MASK_LEN)
SDHCI_DIVIDER_HI_SHIFT;
diff --git a/include/configs/trats.h b/include/configs/trats.h
index d2dfc9f..799658f 100644
--- a/include/configs/trats.h
+++ b/include/configs/trats.h
@@ -76,6 +76,7 @@
#define CONFIG_MMC
#define CONFIG_S5P_SDHCI
#define CONFIG_SDHCI
+#define CONFIG_MMC_SDMA
/* PWM */
#define CONFIG_PWM
diff --git a/include/sdhci.h b/include/sdhci.h
index 9d37183..4351a62 100644
--- a/include/sdhci.h
+++ b/include/sdhci.h
@@ -248,8 +248,10 @@ struct sdhci_host {
unsigned int clock;
struct mmc *mmc;
const struct sdhci_ops *ops;
+ int index;
void (*set_control_reg)(struct sdhci_host *host);
+ void (*set_clock)(int dev_index, unsigned int div);
uintvoltages;
};
--
1.7.4.1
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[U-Boot] [PATCH v3 0/4] mmc: sdhci: fixed some problems for Exynos
To use SDHCI for Samsung-SoC, Some problem is fixed.(read/write problem) See the below mmcinfo message: 1. eMMC card: Device: SAMSUNG SDHCI Manufacturer ID: 15 OEM: 100 Name: VYL00 Tran Speed: 5200 Rd Block Len: 512 MMC version 4.0 High Capacity: Yes Capacity: 14.7 GiB Bus Width: 4-bit 2. SD-card Device: SAMSUNG SDHCI Manufacturer ID: 3 OEM: 5344 Name: SU04G Tran Speed: 2500 Rd Block Len: 512 SD version 2.0 High Capacity: Yes Capacity: 3.7 GiB Bus Width: 4-bit Changelog v3: - increased the timeout and udelay's value instead of adding udelay. Changelog v2: - Add the patch mmc: sdhci: add the udelay for completed post-request Jaehoon Chung (4): mmc: s5p_sdhci: set the SDHCI_QUIRK_BROKEN_R1B mmc: s5p_sdhci: fixed wrong function argument mmc: s5p_sdhci: add the set_mmc_clk for cmu control mmc: sdhci: increase the timeout and udelay value arch/arm/include/asm/arch-exynos/mmc.h |4 ++-- arch/arm/include/asm/arch-s5pc1xx/mmc.h |4 ++-- drivers/mmc/s5p_sdhci.c | 18 +- drivers/mmc/sdhci.c |7 +-- include/configs/trats.h |1 + include/sdhci.h |2 ++ 6 files changed, 21 insertions(+), 15 deletions(-) -- 1.7.4.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 2/4] mmc: s5p_sdhci: fixed wrong function argument
Useless code is removed, and get buswidth value.
buswidth value will be used to choice the 4bit or 8bit.
(Now used 4bit mode in sdhci.c by default)
Signed-off-by: Jaehoon Chung jh80.ch...@samsung.com
Signed-off-by: Kyungmin Park kyungin.p...@samsung.com
---
arch/arm/include/asm/arch-exynos/mmc.h |4 ++--
arch/arm/include/asm/arch-s5pc1xx/mmc.h |4 ++--
drivers/mmc/s5p_sdhci.c |5 ++---
3 files changed, 6 insertions(+), 7 deletions(-)
diff --git a/arch/arm/include/asm/arch-exynos/mmc.h
b/arch/arm/include/asm/arch-exynos/mmc.h
index 0f701c9..afdfcf0 100644
--- a/arch/arm/include/asm/arch-exynos/mmc.h
+++ b/arch/arm/include/asm/arch-exynos/mmc.h
@@ -64,11 +64,11 @@
#define SDHCI_CTRL4_DRIVE_MASK(_x) ((_x) 16)
#define SDHCI_CTRL4_DRIVE_SHIFT(16)
-int s5p_sdhci_init(u32 regbase, u32 max_clk, u32 min_clk, u32 quirks);
+int s5p_sdhci_init(u32 regbase, int index, int bus_width);
static inline unsigned int s5p_mmc_init(int index, int bus_width)
{
unsigned int base = samsung_get_base_mmc() + (0x1 * index);
- return s5p_sdhci_init(base, 5200, 40, index);
+ return s5p_sdhci_init(base, index, bus_width);
}
#endif
diff --git a/arch/arm/include/asm/arch-s5pc1xx/mmc.h
b/arch/arm/include/asm/arch-s5pc1xx/mmc.h
index 0f701c9..afdfcf0 100644
--- a/arch/arm/include/asm/arch-s5pc1xx/mmc.h
+++ b/arch/arm/include/asm/arch-s5pc1xx/mmc.h
@@ -64,11 +64,11 @@
#define SDHCI_CTRL4_DRIVE_MASK(_x) ((_x) 16)
#define SDHCI_CTRL4_DRIVE_SHIFT(16)
-int s5p_sdhci_init(u32 regbase, u32 max_clk, u32 min_clk, u32 quirks);
+int s5p_sdhci_init(u32 regbase, int index, int bus_width);
static inline unsigned int s5p_mmc_init(int index, int bus_width)
{
unsigned int base = samsung_get_base_mmc() + (0x1 * index);
- return s5p_sdhci_init(base, 5200, 40, index);
+ return s5p_sdhci_init(base, index, bus_width);
}
#endif
diff --git a/drivers/mmc/s5p_sdhci.c b/drivers/mmc/s5p_sdhci.c
index 6a04bd7..9378e36 100644
--- a/drivers/mmc/s5p_sdhci.c
+++ b/drivers/mmc/s5p_sdhci.c
@@ -69,7 +69,7 @@ static void s5p_sdhci_set_control_reg(struct sdhci_host *host)
sdhci_writel(host, ctrl, SDHCI_CONTROL2);
}
-int s5p_sdhci_init(u32 regbase, u32 max_clk, u32 min_clk, u32 quirks)
+int s5p_sdhci_init(u32 regbase, int index, int bus_width)
{
struct sdhci_host *host = NULL;
host = (struct sdhci_host *)malloc(sizeof(struct sdhci_host));
@@ -80,7 +80,6 @@ int s5p_sdhci_init(u32 regbase, u32 max_clk, u32 min_clk, u32
quirks)
host-name = S5P_NAME;
host-ioaddr = (void *)regbase;
- host-quirks = quirks;
host-quirks = SDHCI_QUIRK_NO_HISPD_BIT | SDHCI_QUIRK_BROKEN_VOLTAGE |
SDHCI_QUIRK_BROKEN_R1B | SDHCI_QUIRK_32BIT_DMA_ADDR;
@@ -91,6 +90,6 @@ int s5p_sdhci_init(u32 regbase, u32 max_clk, u32 min_clk, u32
quirks)
host-host_caps = MMC_MODE_HC;
- add_sdhci(host, max_clk, min_clk);
+ add_sdhci(host, 5200, 40);
return 0;
}
--
1.7.4.1
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[U-Boot] [PATCH v3 4/4] mmc: sdhci: increase the timeout and udelay value
Samsung-SoC is taken the too late to changing the interrupt status register.
This patch is ensure to check the interrupt status register for Samsung-SoC.
Signed-off-by: Jaehoon Chung jh80.ch...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
drivers/mmc/sdhci.c |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
index ac39e48..d0b8d24 100644
--- a/drivers/mmc/sdhci.c
+++ b/drivers/mmc/sdhci.c
@@ -83,7 +83,7 @@ static int sdhci_transfer_data(struct sdhci_host *host,
struct mmc_data *data,
{
unsigned int stat, rdy, mask, timeout, block = 0;
- timeout = 1;
+ timeout = 10;
rdy = SDHCI_INT_SPACE_AVAIL | SDHCI_INT_DATA_AVAIL;
mask = SDHCI_DATA_AVAILABLE | SDHCI_SPACE_AVAILABLE;
do {
@@ -110,7 +110,7 @@ static int sdhci_transfer_data(struct sdhci_host *host,
struct mmc_data *data,
}
#endif
if (timeout-- 0)
- udelay(10);
+ udelay(20);
else {
printf(Transfer data timeout\n);
return -1;
--
1.7.4.1
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Re: [U-Boot] [PATCH v3 3/4] mmc: s5p_sdhci: add the set_mmc_clk for cmu control
Hi Lei, On 08/31/2012 11:28 AM, Lei Wen wrote: Hi Jaehoon, -Original Message- From: Jaehoon Chung [mailto:jh80.ch...@samsung.com] Sent: Friday, August 31, 2012 10:24 AM To: u-boot@lists.denx.de Cc: Andy Fleming; Kyungmin Park; Lei Wen; John Rigby; Tushar Behera Subject: [PATCH v3 3/4] mmc: s5p_sdhci: add the set_mmc_clk for cmu control Samsung SoC use the cmu control to set clock. Signed-off-by: Jaehoon Chung jh80.ch...@samsung.com Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com --- drivers/mmc/s5p_sdhci.c |3 +++ drivers/mmc/sdhci.c |3 +++ include/configs/trats.h |1 + include/sdhci.h |2 ++ 4 files changed, 9 insertions(+), 0 deletions(-) I suggest you split this patch into two pieces, and don't mix the s5p specific changes to the sdhci overall changes, so that others could adapt such change without involve the s5p changes. Ok i will separate them. (sdhci and s5p specific patch). Best Regards, Jaehoon Chung Thanks, Lei ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 0/5] at91: 9x5: Enable PMECC(Programmable Multibit ECC controller) support
Hi, All Is any feedback for this rev3 patch series. Best Regards, Josh Wu On 8/23/2012 6:05 PM, Josh Wu wrote: This patch series will add PMECC support for atmel at91sam9x5ek in u-boot. The NAND flash driver patch is ported from kernel patch. The main different from kernel patch is the modification about registers access part. in this version it via a register structure to access. It is tested in atmel AT919G25EK board. Changes since v2: adapt atmel nand driver to CONFIG_SYS_NAND_SELF_INIT. It use a new board_nand_init(void) function. Add README doc for Atmel PMECC. Add timeout for PMECC read hw status. refine code according to Andreas and Scott's comments. Josh Wu (5): at91: atmel_nand: extract HWECC initialization code into one function: atmel_hw_nand_init_param(). at91: atmel_nand: remove unused variables. at91: atmel_nand: Update driver to support Programmable Multibit ECC controller at91: 9x5: change SMC config timing that both works for PMECC non-PMECC. at91: 9x5: Enable PMECC for 5series ek board. board/atmel/at91sam9x5ek/at91sam9x5ek.c | 12 +- doc/README.atmel_pmecc | 44 ++ drivers/mtd/nand/atmel_nand.c | 828 --- drivers/mtd/nand/atmel_nand_ecc.h | 113 + include/configs/at91sam9x5ek.h |7 + include/nand.h |2 +- 6 files changed, 938 insertions(+), 68 deletions(-) create mode 100644 doc/README.atmel_pmecc ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
