Hi Stephen, Tom,
Rob's series depends on Wolfgang(?)'s u-boot/ext4 branch at present.
I'm not sure what the status of that branch is right now - is it
something that's ready to be submitted, or is more work there needed,
so the branch won't be pulled into u-boot/master in the near future?
Hi Minkyu,
Support for multiple soft I2C buses.
Multibus I2C support is achieved by defining get_multi_{sda|scl}_pin
functions to switch between multiple soft I2C buses.
Common definition of I2C_X I2C buses is provided at i2c.h.
TEST HW:
Samsung's Exynos4210 evt.0.1 - Trats
I am adding support of imx35pdk in yocto.
I have done with my bsp. But the u-boot that build in response of my bsp
only runs over NOR and not on NAND. I spend 2 days on it but failed to do
so. I read some where that mx35pdk required some external 4-pins bla bla
something like that and page size is
Dear Lukasz,
On 12 September 2012 16:06, Lukasz Majewski l.majew...@samsung.com wrote:
Hi Minkyu,
Support for multiple soft I2C buses.
Multibus I2C support is achieved by defining get_multi_{sda|scl}_pin
functions to switch between multiple soft I2C buses.
Common definition of I2C_X I2C
Dear Mike Frysinger,
On Tue, Sep 11, 2012 at 3:08 PM, Marek Vasut wrote:
The GCC does not support this on blackfin, disable it.
err, no, you're probably using gcc-4.5.x which didn't support
-fstack-usage. that is not specific to Blackfin as gcc didn't add it
until 4.6.x.
I actually used
R-mobile SoC (at least SH73A0) has extension bits to store 8th bit of iccl and
icch.
This patch add support for the extentin bits.
Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
Changes for v2:
- define CONFIG_SH_I2C_8BIT at board config file and replace HAS_ICIC67.
irq_wait() was not used. So removed it to elminate compiler warnings.
Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
Changes for v2:
- new
drivers/i2c/sh_i2c.c | 16
1 file changed, 16 deletions(-)
diff --git a/drivers/i2c/sh_i2c.c b/drivers/i2c/sh_i2c.c
index
Set gpio config for I2C2.
Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
Changes for v2:
- new
board/kmc/kzm9g/kzm9g.c |2 ++
1 file changed, 2 insertions(+)
diff --git a/board/kmc/kzm9g/kzm9g.c b/board/kmc/kzm9g/kzm9g.c
index 93ca9d7..22f581a 100644
---
sh_i2c.c support I2C0 and I2C1. This patch extends it to I2C4.
Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
Changes for v2:
- new
drivers/i2c/sh_i2c.c| 15 +++
include/configs/kzm9g.h |5 -
2 files changed, 19 insertions(+), 1 deletion(-)
diff --git
Hi, Iwamatsu-san
Hello, Heiko
Iwamatu-san, thank you for review. This is v2 patch for sh_i2c.
Now i2c dev and i2c probe also work properly on KZM-A9-GT board.
I think this modification is common for R-mobile, but I have SH73A0 document
only. Iwamatu-san, please review this.
This patch set is
Before this patch, i2c_{read,write} always returned 0.
Check TACK in i2c_raw_{read,write} so that i2c_{read,write} return non-zero
when error.
Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
Changes for v2:
- new
drivers/i2c/sh_i2c.c | 44
Supply clock to I2C1 and release resetting.
Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
Changes for v2:
- new
board/kmc/kzm9g/kzm9g.c |5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/board/kmc/kzm9g/kzm9g.c b/board/kmc/kzm9g/kzm9g.c
index 0679be6..93ca9d7
Adjust i2c_raw_read() in sh_i2c.c to work for SH73A0.
After this patch, i2c md and i2c mw command on U-Boot work properly on
KZM-A9-GT board.
Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
Changes for v2:
- none
drivers/i2c/sh_i2c.c|4
include/configs/kzm9g.h |2 +-
Correct BUSY bit define in ICSR from (13) to (14).
Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
Changes for v2:
- none
drivers/i2c/sh_i2c.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/i2c/sh_i2c.c b/drivers/i2c/sh_i2c.c
index b98fce5..03dfa7a
Before this patch i2c_probe() always returned 0 and i2c probe command did not
work properly.
Modify i2c_set_addr() to check TACK when waiting DTE and make i2c_probe() call
this function.
Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
Changes for v2:
- new
drivers/i2c/sh_i2c.c |
Am 12/09/2012 04:42, schrieb Liu Hui-R64343:
-Original Message-
From: Fabio Estevam [mailto:feste...@gmail.com]
Sent: Wednesday, September 12, 2012 10:33 AM
To: Liu Hui-R64343
Cc: Estevam Fabio-R49496; sba...@denx.de; u-boot@lists.denx.de
Subject: Re: [U-Boot] [PATCH 1/2] mx6q:
Some mails seems to be missing. I am sending again..
Hi, Iwamatsu-san
Hello, Heiko
Iwamatu-san, thank you for review. This is v2 patch for sh_i2c.
Now i2c dev and i2c probe also work properly on KZM-A9-GT board.
I think this modification is common for R-mobile, but I have SH73A0 document
only.
R-mobile SoC (at least SH73A0) has extension bits to store 8th bit of iccl and
icch.
This patch add support for the extentin bits.
Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
Changes for v2:
- define CONFIG_SH_I2C_8BIT at board config file and replace HAS_ICIC67.
Correct BUSY bit define in ICSR from (13) to (14).
Acked-by: Nobuhiro Iwamatsu nobuhiro.iwamatsu...@renesas.com
Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
Changes for v2:
- none
drivers/i2c/sh_i2c.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
Adjust i2c_raw_read() in sh_i2c.c to work for SH73A0.
After this patch, i2c md and i2c mw command on U-Boot work properly on
KZM-A9-GT board.
Acked-by: Nobuhiro Iwamatsu nobuhiro.iwamatsu...@renesas.com
Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
Changes for v2:
- none
sh_i2c.c support I2C0 and I2C1. This patch extends it to I2C4.
Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
Changes for v2:
- new
drivers/i2c/sh_i2c.c| 15 +++
include/configs/kzm9g.h |5 -
2 files changed, 19 insertions(+), 1 deletion(-)
diff --git
Before this patch i2c_probe() always returned 0 and i2c probe command did not
work properly.
Modify i2c_set_addr() to check TACK when waiting DTE and make i2c_probe() call
this function.
Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
Changes for v2:
- new
drivers/i2c/sh_i2c.c |
Before this patch, i2c_{read,write} always returned 0.
Check TACK in i2c_raw_{read,write} so that i2c_{read,write} return non-zero
when error.
Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
Changes for v2:
- new
drivers/i2c/sh_i2c.c | 44
irq_wait() was not used. So removed it to elminate compiler warnings.
Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
Changes for v2:
- new
drivers/i2c/sh_i2c.c | 16
1 file changed, 16 deletions(-)
diff --git a/drivers/i2c/sh_i2c.c b/drivers/i2c/sh_i2c.c
index
Supply clock to I2C1 and release resetting.
Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
Changes for v2:
- new
board/kmc/kzm9g/kzm9g.c |5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/board/kmc/kzm9g/kzm9g.c b/board/kmc/kzm9g/kzm9g.c
index 0679be6..93ca9d7
Set gpio config for I2C2.
Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
Changes for v2:
- new
board/kmc/kzm9g/kzm9g.c |2 ++
1 file changed, 2 insertions(+)
diff --git a/board/kmc/kzm9g/kzm9g.c b/board/kmc/kzm9g/kzm9g.c
index 93ca9d7..22f581a 100644
---
Hi!
From: Dinh Nguyen dingu...@altera.com
Add minimal support for Altera's SOCFPGA Cyclone 5 hardware.
Applied on top of trini/WIP/spl-improvements v6
[...]
__noreturn attribute to reset_cpu() is still missing, but that's a minor
thing.
Hmm, I thought
Hi!
On 09/11/2012 02:21 AM, Pavel Machek wrote:
From: Dinh Nguyen dingu...@altera.com
Add minimal support for Altera's SOCFPGA Cyclone 5 hardware.
Applied on top of trini/WIP/spl-improvements v6
[...]
__noreturn attribute to reset_cpu() is still missing, but that's a
minor
Dear Marek Vasut,
The buf variable in bfin_mac.c is not used and produces warning,
fix it.
bfin_mac.c: In function 'bfin_EMAC_send':
bfin_mac.c:125:16: warning: variable 'buf' set but not used
[-Wunused-but-set-variable]
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Mike Frysinger
Dear Wolfgang,
please pull the following changes to your tree.
Thanks,
Michal
The following changes since commit a6f0c4faa4c65a7b7048b12c9d180d7e1aad1721:
Wolfgang Denk (1):
Merge branch 'master' of git://git.denx.de/u-boot-avr32
are available in the git repository at:
On 08/16/2012 08:30 AM, Michal Simek wrote:
Device driver for Zynq Gem IP.
Signed-off-by: Michal Simek mon...@monstr.eu
CC: Joe Hershberger joe.hershber...@gmail.com
---
v2: Remove phylib protection
Rename driver file name xilinx_gem to zynq_gem
Rename XEMACPSS to ZYNQ_GEM
On 08/16/2012 08:30 AM, Michal Simek wrote:
The driver is used on Xilinx Zynq platform.
Signed-off-by: Michal Simek mon...@monstr.eu
---
v2: Use Zynq name instead of Dragonfire and XPSS/XDFUART
Rename driver name
Remove driver description
---
drivers/serial/Makefile |1 +
Hi, Voice
On 9/10/2012 4:07 PM, Bo Shen wrote:
Hi Josh,
On 9/7/2012 18:39, Josh Wu wrote:
Signed-off-by: Josh Wu josh...@atmel.com
---
arch/arm/cpu/arm926ejs/at91/at91sam9x5_devices.c | 13 +
board/atmel/at91sam9x5ek/at91sam9x5ek.c | 16
On 08/16/2012 08:30 AM, Michal Simek wrote:
Add timer driver.
Signed-off-by: Michal Simek mon...@monstr.eu
---
v2: Move lowlevel_init.S from board to cpu folder
Remove XPSS prefix
Rename XSCUTIMER - SCUTIMER
Keep timer in zynq folder till ARM custodian comments it.
---
On 08/16/2012 08:30 AM, Michal Simek wrote:
Add support for Xilinx Zynq board.
Signed-off-by: Michal Simek mon...@monstr.eu
---
v2: Forget to also add config file
v3: Change name for serial driver
Remove lowlevel_init from board folder
Remove XPSS part from timer baseaddr
RTC driver for the S3C24XX SoCs.
Signed-off-by: José Miguel Gonçalves jose.goncal...@inov.pt
---
drivers/rtc/Makefile |1 +
drivers/rtc/s3c24xx_rtc.c | 166 +
2 files changed, 167 insertions(+)
create mode 100644 drivers/rtc/s3c24xx_rtc.c
Samsung's S3C24XX SoCs need this in order to generate a binary image with the
SPL and U-Boot concatenated.
Signed-off-by: José Miguel Gonçalves jose.goncal...@inov.pt
---
Makefile |7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/Makefile b/Makefile
index
Jumping to board_init_r is not performed due to a bug on address computation.
Relocation offsets are not needed when building SPL.
Signed-off-by: José Miguel Gonçalves jose.goncal...@inov.pt
---
arch/arm/cpu/arm926ejs/start.S |4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff
Serial driver for the S3C24XX SoCs.
Signed-off-by: José Miguel Gonçalves jose.goncal...@inov.pt
---
drivers/serial/Makefile |1 +
drivers/serial/s3c24xx_serial.c | 146 +++
2 files changed, 147 insertions(+)
create mode 100644
NAND Flash driver with HW ECC for the S3C24XX SoCs.
Currently it only supports SLC NAND chips.
Signed-off-by: José Miguel Gonçalves jose.goncal...@inov.pt
---
drivers/mtd/nand/Makefile |1 +
drivers/mtd/nand/s3c24xx_nand.c | 269 +++
2 files
The MINI2416 board is based on a Samsung's S3C2416 SoC and has 64MB DDR2 SDRAM,
256MB NAND Flash, a LAN9220 Ethernet Controller and a WM8731 Audio CODEC.
This U-Boot port was implemented and tested on a unit bought to Boardcon
(http://www.armdesigner.com/) but there are some other chinese
Support for the MINI2416 board based on a Samsung's S3C2416 SoC with
64MB DDR2 SDRAM, 256MB NAND Flash, a LAN9220 Ethernet Controller and a
WM8731 Audio CODEC.
José Miguel Gonçalves (7):
ARM: fix relocation on ARM926EJS
S3C24XX: Add core support for Samsung's S3C24XX SoCs
S3C24XX: Add
This patch adds the support for Samsung's S3C24XX SoCs that have an ARM926EJS
core.
Currently it supports S3C2412, S3C2413, S3C2416 and S3C2450.
Tested on an S3C2416 platform.
Signed-off-by: José Miguel Gonçalves jose.goncal...@inov.pt
---
arch/arm/cpu/arm926ejs/s3c24xx/Makefile | 52
On Wed, Sep 12, 2012 at 4:51 AM, Marek Vasut ma...@denx.de wrote:
Dear Marek Vasut,
The buf variable in bfin_mac.c is not used and produces warning,
fix it.
bfin_mac.c: In function 'bfin_EMAC_send':
bfin_mac.c:125:16: warning: variable 'buf' set but not used
[-Wunused-but-set-variable]
Hi Chang Hyun,
Hello Lukasz, Stephen,
I see there has been quite a few mails going back and forth on the
mailing list on the gpt: Replace the leXX_to_int() calls with ones
defined at compiler.hI haven't been receiving the e-mails because
my samsung e-mail account has expired.(Internship
This patch series provides a new command - gpt for eMMC partition table
(in the GPT format) restoration.
As a pre-work, some cleanup at the part_efi.c file was performed to
remove custom macros and make GPT related structures more readable.
Moreover the part_efi.h file has been moved to
The ustrtoul shall convert string defined size (e.g. 1GiB) to unsigned
long type (as its name implies).
Up till now it had returned int, which might cause problems with large
numbers (GiB range), when interpreted as U2 signed numbers.
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
Documentation of the GPT format.
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
Changes for v2:
- Typos correction.
- Adding guidlines about GPT restoration.
- Adding information about GUID generator
---
doc/README.gpt | 207
The restoration of GPT table (both primary and secondary) is now possible.
Simple GUID generation is supported.
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
Changes for v2:
- Move GPT Header and Page Table Entries generation
This move is necessary to export gpt header and GPT partition entries to be
used with other commands or subsystems (like DFU in the future)
Additionally the part_efi.h file has been cleaned-up to supress checkpatch's
warnings.
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
Signed-off-by:
From: Chang Hyun Park chchch.p...@samsung.com
Custom definitions of le_XX_to_int functions have been replaced with
standard ones, defined at compiler.h
Replacement of several GPT related structures members with ones
indicating its endianness and proper size.
Signed-off-by: Chang Hyun Park
New command - gpt is supported. It restores the GPT partition table.
It looks into the partitions environment variable for partitions definition.
It can be enabled at target configuration file with CONFIG_CMD_GPT.
Simple UUID generator has been implemented. It uses the the gd-start_addr_sp
for
Enable support for GPT partition table restoration at Samsung's Trats
development board.
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
Changes for v2:
- New format for default GPT partitions (key=value pairs)
- replace size
Hey all,
I know some of you have known me for ages, and some of you only as long
as my jaunt back into U-Boot over the last year. Rather than talk
myself up, I'd like to go with actions to let everyone know you're in
good hands.
I'd like to ask a few things of the community right now. If
On 09/10/2012 10:32 PM, bastian.rupp...@sewerin.de wrote:
Hello, Prabhakar, hello Tom
On Monday 10 September 2012 09:38 PM, Tom Rini wrote:
On Sun, Sep 9, 2012 at 11:01 PM, bastian.rupp...@sewerin.de wrote:
Hello,
Re: [U-Boot] [PATCH v3 5/6] da850/omap-l138: davinci_emac: Suppress
auto
On Wed, Sep 12, 2012 at 10:32 AM, Joe Hershberger wrote:
On Wed, Sep 12, 2012 at 4:51 AM, Marek Vasut wrote:
Dear Marek Vasut,
The buf variable in bfin_mac.c is not used and produces warning,
fix it.
bfin_mac.c: In function 'bfin_EMAC_send':
bfin_mac.c:125:16: warning: variable 'buf' set
Folks,
Stephen Warren has posted an internal bug regarding the cache
alignment 'warnings' seen on Tegra20 boards when accessing MMC. Here's
the gist:
Executing mmc dev 0 still yields cache warnings:
Tegra20 (Harmony) # mmc dev 0
ERROR: v7_dcache_inval_range- stop address is not aligned-
On Fri, Sep 07, 2012 at 11:06:31AM +0530, Chander Kashyap wrote:
Now DT support is becoming common for all new SoC's. Hence it is better
to have option for getting specific FDT from the remote server.
This patch adds support for new label i.e. 'fdt'. This will allow to
retrieve 'fdt blob'
On 09/11/2012 03:52 PM, Stephen Warren wrote:
On 09/05/2012 05:58 PM, Tom Rini wrote:
On Wed, Sep 05, 2012 at 06:51:58PM -0500, Rob Herring wrote:
On 09/05/2012 05:03 PM, Stephen Warren wrote:
From: Stephen Warren swar...@nvidia.com
This implements the following:
part uuid mmc 0:1
-
On 09/12/2012 12:00 AM, Lukasz Majewski wrote:
Hi Stephen, Tom,
Rob's series depends on Wolfgang(?)'s u-boot/ext4 branch at present.
I'm not sure what the status of that branch is right now - is it
something that's ready to be submitted, or is more work there needed,
so the branch won't
On 09/12/2012 10:19 AM, Tom Warren wrote:
Folks,
Stephen Warren has posted an internal bug regarding the cache
alignment 'warnings' seen on Tegra20 boards when accessing MMC. Here's
the gist:
Executing mmc dev 0 still yields cache warnings:
Tegra20 (Harmony) # mmc dev 0
ERROR:
On Tue, Sep 11, 2012 at 07:53:17AM +0200, Stefan Roese wrote:
Hi Pavel,
On 09/11/2012 02:21 AM, Pavel Machek wrote:
From: Dinh Nguyen dingu...@altera.com
Add minimal support for Altera's SOCFPGA Cyclone 5 hardware.
Applied on top of trini/WIP/spl-improvements v6
[...]
On 09/10/2012 05:21 PM, Pavel Machek wrote:
Hi!
From: Dinh Nguyen dingu...@altera.com
Add minimal support for Altera's SOCFPGA Cyclone 5 hardware.
Applied on top of trini/WIP/spl-improvements v6
[...]
__noreturn attribute to reset_cpu() is still missing, but that's a
minor thing.
On Wed, Sep 12, 2012 at 09:59:30AM +0200, Marek Vasut wrote:
Dear Mike Frysinger,
On Tue, Sep 11, 2012 at 3:08 PM, Marek Vasut wrote:
The GCC does not support this on blackfin, disable it.
err, no, you're probably using gcc-4.5.x which didn't support
-fstack-usage. that is not
On 09/12/2012 07:50 AM, Lukasz Majewski wrote:
New command - gpt is supported. It restores the GPT partition table.
It looks into the partitions environment variable for partitions definition.
It can be enabled at target configuration file with CONFIG_CMD_GPT.
Simple UUID generator has been
On 09/12/2012 07:50 AM, Lukasz Majewski wrote:
The restoration of GPT table (both primary and secondary) is now possible.
Simple GUID generation is supported.
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
[sinp]
+
+
On 09/12/2012 07:50 AM, Lukasz Majewski wrote:
This patch series provides a new command - gpt for eMMC partition table
(in the GPT format) restoration.
As a pre-work, some cleanup at the part_efi.c file was performed to
remove custom macros and make GPT related structures more readable.
On 9/12/2012 12:02 AM, Fabio Estevam wrote:
mx6qsabresd is a board based on mx6q SoC with the following features:
- 1GB of DDR3
- 1 USB OTG port
- 1 HDMI output port
- SPI NOR
- LVDS panel
- Gigabit Ethernet
- Camera Connector
- eMMC and SD card slot
- Audio
Add very basic support for it.
Hi Vikram,
On Wed, Sep 12, 2012 at 2:30 PM, Vikram Narayanan vikram...@gmail.com wrote:
According to this commit,
CONFIG_SYS_BAUDRATE_TABLE: Add config_fallbacks.h, place there
(26750c8aee2383a026e0cf89e9310628d3a5a6a0), the above line isn't required
anymore. Right?
Yes, you are right. Will
ons 2012-09-12 klockan 11:26 +1000 skrev Graeme Russ:
I must make an apology - I had committed to assisting you and Tom in
bringing this port into mainline U-Boot (including investigating the
SPL breakage et. al.).
No need to apology. We all have life (to various degrees) outside
computers.
Jason,
On Tue, Sep 11, 2012 at 11:26 PM, Liu Hui-R64343 r64...@freescale.com wrote:
Are you sure that we can use on DDR3 script to cover 3 kind of boards:
ARM2/Sabrelite/SabreSD? Did you do the DDR stress test?
Ok, looking more closely at this I will keep the ARM2 DDR3 init as is
in my v2
I am adding support of imx35pdk in yocto.
I have done with my bsp. But the u-boot that build in response of my bsp
only runs over NOR and not on NAND. I spend 2 days on it but failed to do
so. I read some where that mx35pdk required some external 4-pins bla bla
something like that.
Also the
Hi,
I am a new member to u-boot mail list.
I have the source code of u-boot downloaded.I am aware that
/boot,/board,/driver,include/config are the directory of imprtance.
I am trying to read the code.
1.I see that there are lots of other files and lots of APIs in the above
direcories.Can
Dear José Miguel Gonçalves,
Serial driver for the S3C24XX SoCs.
Signed-off-by: José Miguel Gonçalves jose.goncal...@inov.pt
---
drivers/serial/Makefile |1 +
drivers/serial/s3c24xx_serial.c | 146
+++ 2 files changed, 147 insertions(+)
Dear José Miguel Gonçalves,
RTC driver for the S3C24XX SoCs.
Signed-off-by: José Miguel Gonçalves jose.goncal...@inov.pt
---
drivers/rtc/Makefile |1 +
drivers/rtc/s3c24xx_rtc.c | 166
+ 2 files changed, 167
insertions(+)
create
Dear chandan mohanty,
Hi,
I am a new member to u-boot mail list.
I have the source code of u-boot downloaded.I am aware that
/boot,/board,/driver,include/config are the directory of imprtance.
I am trying to read the code.
1.I see that there are lots of other files and lots of APIs
Dear Muhammad Usman,
Ccing Stefano.
I am adding support of imx35pdk in yocto.
I have done with my bsp. But the u-boot that build in response of my bsp
only runs over NOR and not on NAND. I spend 2 days on it but failed to do
so. I read some where that mx35pdk required some external 4-pins
Dear José Miguel Gonçalves,
NAND Flash driver with HW ECC for the S3C24XX SoCs.
Currently it only supports SLC NAND chips.
Signed-off-by: José Miguel Gonçalves jose.goncal...@inov.pt
---
drivers/mtd/nand/Makefile |1 +
drivers/mtd/nand/s3c24xx_nand.c | 269
From: Ira W. Snyder i...@ovro.caltech.edu
This series improves the hardware support for the Freescale MPC8308RDB board.
Optional support for the SPI pins routed to header J8 is added for testing SPI
flash chips. This was tested with a Spansion S25FL256S1. This is not enabled
by default, because
From: Ira W. Snyder i...@ovro.caltech.edu
Add support for the S25FL256S1 flash chip. It is a 256Mb (32MB) flash
comprised of 64KB pages.
Signed-off-by: Ira W. Snyder i...@ovro.caltech.edu
---
drivers/mtd/spi/spansion.c |8
1 files changed, 8 insertions(+), 0 deletions(-)
diff
From: Ira W. Snyder i...@ovro.caltech.edu
This is very useful on a modern system.
Signed-off-by: Ira W. Snyder i...@ovro.caltech.edu
---
include/configs/MPC8308RDB.h |4
1 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/include/configs/MPC8308RDB.h
From: Ira W. Snyder i...@ovro.caltech.edu
Add support for the onboard eSDHC MMC controller. The hardware on the
MPC8308RDB has the following errata:
- ESDHC111: manual asynchronous CMD12 is broken
- DMA is broken (PIO works)
Signed-off-by: Ira W. Snyder i...@ovro.caltech.edu
---
From: Ira W. Snyder i...@ovro.caltech.edu
The MPC8308RDB Reference Manual states that no bits in the SPMODE
register are allowed to change while the enable (EN) bit is set.
This driver changes the character length bits (LEN) while the enable
(EN) bit is set. Clearing the EN bit while changing
From: Ira W. Snyder i...@ovro.caltech.edu
The SPI pins are routed to header J8 for testing SPI functionality. A
Spansion flash has been wired up and tested on this header.
This patch breaks support for the second TSEC interface, since the GPIO
pin used as a chip select is pinmuxed with some of
Am 12/09/2012 23:07, schrieb Marek Vasut:
Dear Muhammad Usman,
Hi Muhammad,
Ccing Stefano.
I am adding support of imx35pdk in yocto.
I have done with my bsp. But the u-boot that build in response of my bsp
only runs over NOR and not on NAND. I spend 2 days on it but failed to do
so.
Am 12/09/2012 20:22, schrieb Fabio Estevam:
Jason,
Hi Fabio,
On Tue, Sep 11, 2012 at 11:26 PM, Liu Hui-R64343 r64...@freescale.com wrote:
Are you sure that we can use on DDR3 script to cover 3 kind of boards:
ARM2/Sabrelite/SabreSD? Did you do the DDR stress test?
Ok, looking more
This patch series adds basic (boot to cmd prompt) support for Tegra30.
This is based on the Tegra20 SPL, which initializes the AVP (ARM7TDMI
boot proc) first, then control is transferred to the CPU (A9 quad cluster).
It is based on current u-boot-tegra/next.
Future patches will add
Signed-off-by: Tom Warren twar...@nvidia.com
---
arch/arm/cpu/arm720t/tegra30/Makefile | 48 +++
arch/arm/cpu/arm720t/tegra30/board.h | 25 ++
arch/arm/cpu/arm720t/tegra30/config.mk | 26 ++
arch/arm/cpu/arm720t/tegra30/cpu.c | 570
Signed-off-by: Tom Warren twar...@nvidia.com
---
arch/arm/cpu/armv7/tegra30/Makefile | 48 +
arch/arm/cpu/armv7/tegra30/cmd_enterrcm.c | 65 +
arch/arm/cpu/armv7/tegra30/config.mk | 26 +++
3 files changed, 139
Signed-off-by: Tom Warren twar...@nvidia.com
---
arch/arm/dts/tegra30.dtsi | 280 +++
board/nvidia/dts/tegra30-cardhu.dts | 92
2 files changed, 372 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/dts/tegra30.dtsi
create mode
Signed-off-by: Tom Warren twar...@nvidia.com
---
board/nvidia/cardhu/Makefile | 48
board/nvidia/cardhu/cardhu.c | 87 +++
board/nvidia/cardhu/pinmux-config-common.h | 346
3 files changed, 481 insertions(+), 0 deletions(-)
Signed-off-by: Tom Warren twar...@nvidia.com
---
board/nvidia/common/board.c | 27 ++-
1 files changed, 26 insertions(+), 1 deletions(-)
diff --git a/board/nvidia/common/board.c b/board/nvidia/common/board.c
index afe832a..4a86c30 100644
---
This builds boots to the command prompt on a Cardhu (T30) board.
This is a barebones binary - no I2C, USB, MMC, SPI, etc.
Drivers for those peripherals to follow.
Signed-off-by: Tom Warren twar...@nvidia.com
---
Makefile| 23 +++
Signed-off-by: Tom Warren twar...@nvidia.com
---
include/configs/cardhu.h | 52 +++
include/configs/tegra30-common.h | 188 ++
2 files changed, 240 insertions(+), 0 deletions(-)
create mode 100644 include/configs/cardhu.h
create mode 100644
Dear Bill,
Has anyone used U-boot on the imx28evk with initrd to setup a small
rootfs in RAM? I need the ability to do have a small temp rootfs to
assist in mounting a full rootfs from a USB for field upgrade purposes.
Yes, it's a linux thingie though. What's the problem? What version of
Dear Ellis Andrew,
Hi,
I'm not sure if this is specifically related to u boot.
I have compiled a linux kernel, which if I run on a system with flash
memory with 256k sector size there are no problems, however if I rebuild
for a system using flash with 64k sector size the boot process
Dear Stephen Warren,
On 09/12/2012 10:19 AM, Tom Warren wrote:
Folks,
Stephen Warren has posted an internal bug regarding the cache
alignment 'warnings' seen on Tegra20 boards when accessing MMC. Here's
the gist:
Executing mmc dev 0 still yields cache warnings:
Tegra20
On Mon, Aug 13, 2012 at 01:28:19PM -0500, Rob Herring wrote:
On 08/13/2012 06:52 AM, Wolfgang Denk wrote:
Dear Rob Herring,
In message 50244d5a.3080...@gmail.com you wrote:
I reported already that the prior version that ext4 has issues with
sub-directories. I don't think that has
On 09/12/2012 05:49 PM, Tom Rini wrote:
On Mon, Aug 13, 2012 at 01:28:19PM -0500, Rob Herring wrote:
On 08/13/2012 06:52 AM, Wolfgang Denk wrote:
Dear Rob Herring,
In message 50244d5a.3080...@gmail.com you wrote:
I reported already that the prior version that ext4 has issues with
On 09/12/2012 04:38 PM, Marek Vasut wrote:
Dear Stephen Warren,
On 09/12/2012 10:19 AM, Tom Warren wrote:
Folks,
Stephen Warren has posted an internal bug regarding the cache
alignment 'warnings' seen on Tegra20 boards when accessing MMC. Here's
the gist:
Executing mmc dev 0 still
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