Hi Suriyan,
On 01/23/2015 10:46 AM, Suriyan Ramasami wrote:
> On Thu, Jan 22, 2015 at 9:51 AM, Kevin Hilman wrote:
>> Suriyan Ramasami writes:
>>
>>> Hello Kevin,
>>>
>>> On Wed, Jan 21, 2015 at 4:54 PM, Kevin Hilman wrote:
Hi Surijan,
Suriyan Ramasami writes:
> Hello S
Hello Lubomir,
Am 24.11.2014 17:00, schrieb Lubomir Popov:
I2C chips do exist that require a write of some multi-byte data to occur in
a single bus transaction (aka atomic transfer), otherwise either the write
does not come into effect at all, or normal operation of internal circuitry
cannot be
On Wed, Jan 28, 2015 at 1:13 PM, Simon Glass wrote:
> This is a relatively low-cost x86 board in a small form factor. The main
> peripherals are uSD, USB, HDMI, Ethernet and SATA. It uses an Atom 3800
> series CPU. So far only the dual core 2GB variant is supported.
>
> This uses the existing FSP
Hi Simon,
On Wed, Jan 28, 2015 at 1:17 PM, Simon Glass wrote:
> Hi Bin,
>
> On 27 January 2015 at 07:00, Bin Meng wrote:
>> Hi Simon,
>>
>> On Tue, Jan 27, 2015 at 9:23 AM, Simon Glass wrote:
>>> The base address is found in a different way and the protection bit is also
>>> in a different plac
On Wed, Jan 28, 2015 at 1:13 PM, Simon Glass wrote:
> The base address is found in a different way and the protection bit is also
> in a different place. Otherwise it is very similar.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v2: None
>
> drivers/spi/ich.c | 56
> +
On Wed, Jan 28, 2015 at 1:13 PM, Simon Glass wrote:
> Since the FSP is a black box it helps to have some sort of debugging
> available to check its inputs. If the debug UART is in use, set it up
> after CAR is available.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v2:
> - Remove duplicate
On Wed, Jan 28, 2015 at 1:13 PM, Simon Glass wrote:
> Since these board functions seem to be the same for all boards which use
> FSP, move them into a common file. We can adjust this later if future FSPs
> need more flexibility.
>
> This creates a generic PCI MMC device.
>
> Signed-off-by: Simon G
Hi Simon,
On 01/28/2015 02:15 PM, Simon Glass wrote:
> Hi Joonyoung,
>
> On 27 January 2015 at 22:12, Joonyoung Shim wrote:
>> Hi Simon,
>>
>> On 01/28/2015 02:01 PM, Simon Glass wrote:
>>> Hi Joonyoung,
>>>
>>> On 27 January 2015 at 21:46, Joonyoung Shim wrote:
Hi Simon,
On 01/2
On Wed, Jan 28, 2015 at 1:13 PM, Simon Glass wrote:
> This setting will be used by more than just ivybridge so make it common.
>
> Also rename it to PCIE_ECAM_BASE which is a more descriptive name.
>
> Signed-off-by: Simon Glass
> ---
Reviewed-by: Bin Meng
Please see one minor issue below.
>
On Wed, Jan 28, 2015 at 1:13 PM, Simon Glass wrote:
> Rather than requiring the Makefile to be modified, provide a build option to
> enable the ROM to be built.
>
> We cannot do this by default since it requires binary blobs. Without these
> the build will fail.
>
> Signed-off-by: Simon Glass
> -
Hi Simon,
On Wed, Jan 28, 2015 at 1:13 PM, Simon Glass wrote:
> There is an existing function prototype in the header file but it is not
> implemented. Implement something similar.
>
> Signed-off-by: Simon Glass
> ---
>
Reviewed-by: Bin Meng
One typo below and I think you can fix it before ap
Signed-off-by: Andreas Bießmann
---
Changes in v1:
- add timer_init in board_r
- remove extern declaration of mmu_init_r()
arch/avr32/config.mk|3 +++
arch/avr32/cpu/u-boot.lds |2 ++
arch/avr32/include/asm/config.h |1 +
arch/avr32/include/asm/u-boot.h |7
Hi Stephen,
On Mon, 26 Jan 2015 10:40:57 -0700
Stephen Warren wrote:
> On 01/24/2015 11:11 PM, Masahiro Yamada wrote:
> > This commit moves files as follows:
> >
> > arch/arm/cpu/arm720t/tegra20/* -> arch/arm/mach-tegra/tegra20/*
> > arch/arm/cpu/arm720t/tegra30/* -> arch/arm/mach
This is the first attempt to add generic board support to avr32 architecture. It
has at least one relevant part for other manual reloc architectures.
This series is currently runtime tested on grasshhopper and atstk1002.
Andreas Bießmann
Changes in v1:
- new since RFC
- new since RFC
- add timer
Allow measuring of boot time using bootstage.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
Tested-by: Bin Meng
---
Changes in v2: None
include/configs/x86-common.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/include/configs/x86-common.h b/include/configs/x86-common.h
index ece
Since we must run a PCI BIOS ROM, and this can take a calamitous amount of
time, measure it using bootstage.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
Changes in v2: None
drivers/video/vesa_fb.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/video/vesa_fb.c b/drivers
For now this code seems to be the same for all FSP platforms. Make it
common until we see what differences are required.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
Tested-by: Bin Meng
---
Changes in v2: None
arch/x86/cpu/queensbay/Makefile | 2 +-
arch/x86/lib
Hi Bin,
On 27 January 2015 at 07:00, Bin Meng wrote:
> Hi Simon,
>
> On Tue, Jan 27, 2015 at 9:23 AM, Simon Glass wrote:
>> The base address is found in a different way and the protection bit is also
>> in a different place. Otherwise it is very similar.
>>
>> Signed-off-by: Simon Glass
>> ---
There is an existing function prototype in the header file but it is not
implemented. Implement something similar.
Signed-off-by: Simon Glass
---
Changes in v2:
- Fix missing spaces (code style nit)
- Add another comment in pci_find_class()
drivers/pci/pci.c | 43 ++
The base address is found in a different way and the protection bit is also
in a different place. Otherwise it is very similar.
Signed-off-by: Simon Glass
---
Changes in v2: None
drivers/spi/ich.c | 56 ---
drivers/spi/ich.h | 11 ++-
To avoid casts, find_fsp_header() should return a pointer. Add asmlinkage
to two API functions which use that convention. UPD_TERMINATOR is common
so move it into a common file.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
Tested-by: Bin Meng
---
Changes in v2: None
arch/x86/include/asm/
Since these board functions seem to be the same for all boards which use
FSP, move them into a common file. We can adjust this later if future FSPs
need more flexibility.
This creates a generic PCI MMC device.
Signed-off-by: Simon Glass
---
Changes in v2:
- Move MMC code into a new pci_mmc.c fi
Since the FSP is a black box it helps to have some sort of debugging
available to check its inputs. If the debug UART is in use, set it up
after CAR is available.
Signed-off-by: Simon Glass
---
Changes in v2:
- Remove duplicate prototype of setup_early_uart()
arch/x86/include/asm/u-boot-x86.h
Sometimes microcode is delivered as a header file. Allow the tool to
support this as well as collecting multiple microcode blocks into a
single update.
Signed-off-by: Simon Glass
Tested-by: Bin Meng
---
Changes in v2: None
tools/microcode-tool.py | 90 ++---
While queensbay is the first chip with these settings, others will want to
use them too. Make them common.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
Changes in v2: None
arch/x86/Kconfig | 38 ++
arch/x86/cpu/queensbay/Kconfig | 38 -
Some information has been gleaned on tools and procedures for porting
U-Boot to different x86 platforms. Add a few notes to start things off.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
Changes in v2:
- Document how to change the SPI speed with ifdtool
doc/README.x86 | 64 +++
Add a driver which locates the available XHCI controllers on the PCI bus
and makes them available.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
Changes in v2: None
drivers/usb/host/Makefile | 1 +
drivers/usb/host/xhci-pci.c | 60 +
2 fil
On some hardware this time can be significant. Add bootstage support for
measuring this. The result can be obtained using 'bootstage report' or
passed on to the Linux via the device tree.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
Changes in v2: None
common/cmd_scsi.c | 2 ++
incl
Tidy up the FSP support code a little.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
Changes in v2: None
arch/x86/lib/fsp/fsp_support.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/x86/lib/fsp/fsp_support.c b/arch/x86/lib/fsp/fsp_support.c
index b
This setting will be used by more than just ivybridge so make it common.
Also rename it to PCIE_ECAM_BASE which is a more descriptive name.
Signed-off-by: Simon Glass
---
Changes in v2:
- Rename MMCONF_BASE_ADDRESS to PCIE_ECAM_BASE
- Adjust the Kconfig help according to Bin's comments
arch/x
Rather than requiring the Makefile to be modified, provide a build option to
enable the ROM to be built.
We cannot do this by default since it requires binary blobs. Without these
the build will fail.
Signed-off-by: Simon Glass
---
Changes in v2:
- Fix README typos
Makefile | 5 +++--
Use the new utility function instead of local code.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
Changes in v2: None
drivers/usb/host/ehci-pci.c | 53 +
1 file changed, 1 insertion(+), 52 deletions(-)
diff --git a/drivers/usb/host/ehci-pci.
This board uses a new PCI ID.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
Changes in v2: None
drivers/video/vesa_fb.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/video/vesa_fb.c b/drivers/video/vesa_fb.c
index 3dacafd..3a0fea2 100644
--- a/drivers/video/vesa_fb.c
+++
This board includes a few IDs we have not seen before.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
Changes in v2: None
include/pci_ids.h | 5 +
1 file changed, 5 insertions(+)
diff --git a/include/pci_ids.h b/include/pci_ids.h
index 26f4748..1012abe 100644
--- a/include/pci_ids.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
Tested-by: Bin Meng
---
Changes in v2: None
arch/x86/cpu/queensbay/Makefile| 2 +-
arch/x86/cpu/queensbay/fsp_configs.c | 2 +-
arch/x86/cpu/queensbay/tnc.c
If the BIOS emulator is not available, allow use of native execution if
available, and vice versa. This can be controlled by the caller.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
Changes in v2:
- Rename pci_rom_emul_t to pci_rom_emul
arch/x86/cpu/ivybridge/gma.c | 3 ++-
drivers/p
Hi Joonyoung,
On 27 January 2015 at 22:12, Joonyoung Shim wrote:
> Hi Simon,
>
> On 01/28/2015 02:01 PM, Simon Glass wrote:
>> Hi Joonyoung,
>>
>> On 27 January 2015 at 21:46, Joonyoung Shim wrote:
>>> Hi Simon,
>>>
>>> On 01/28/2015 01:09 PM, Simon Glass wrote:
Hi,
On 15 January
This series adds support for the Intel Minnowboard Max (called Minnowmax
for short). Along the way a few refactors and additions are made:
- The Intel Firmware Support Package support is moved from queensbay to a
common location
- PCI support for XHCI is added
- A few tweaks are made to the PCI su
Hi Simon,
On 01/28/2015 02:01 PM, Simon Glass wrote:
> Hi Joonyoung,
>
> On 27 January 2015 at 21:46, Joonyoung Shim wrote:
>> Hi Simon,
>>
>> On 01/28/2015 01:09 PM, Simon Glass wrote:
>>> Hi,
>>>
>>> On 15 January 2015 at 23:09, Joonyoung Shim wrote:
Hi,
On 01/16/2015 02:48 PM,
On 27 January 2015 at 08:40, Peter Tyser wrote:
>
> On Mon, 2015-01-26 at 22:21 -0700, Simon Glass wrote:
>> Hi Peter,
>>
>> On 26 January 2015 at 10:42, Peter Tyser wrote:
>> > When run with the --dry-run argument patman prints out information
>> > showing what it would do. This information cur
Hi,
On 27 January 2015 at 18:20, Bin Meng wrote:
> Hi Rob,
>
> On Wed, Jan 28, 2015 at 1:38 AM, Rob Herring wrote:
>> On Mon, Jan 26, 2015 at 7:23 PM, Simon Glass wrote:
>>> On some hardware this time can be significant. Add bootstage support for
>>> measuring this. The result can be obtained u
Hi Joonyoung,
On 27 January 2015 at 21:46, Joonyoung Shim wrote:
> Hi Simon,
>
> On 01/28/2015 01:09 PM, Simon Glass wrote:
>> Hi,
>>
>> On 15 January 2015 at 23:09, Joonyoung Shim wrote:
>>> Hi,
>>>
>>> On 01/16/2015 02:48 PM, Akshay Saraswat wrote:
We planned to fetch peripheral rate thro
Hi Simon,
On 01/28/2015 01:09 PM, Simon Glass wrote:
> Hi,
>
> On 15 January 2015 at 23:09, Joonyoung Shim wrote:
>> Hi,
>>
>> On 01/16/2015 02:48 PM, Akshay Saraswat wrote:
>>> We planned to fetch peripheral rate through one generic API per
>>> peripheral. These generic peripheral functions are
Hi Akshay,
On 15 January 2015 at 06:42, Akshay Saraswat wrote:
> From: Doug Anderson
>
> It was found that the L2 cache timings that we had before could cause
> freezes and hangs. We should make things more robust with better
> timings. Currently the production ChromeOS kernel applies these
>
On 15 January 2015 at 06:42, Akshay Saraswat wrote:
> On warm reset, all cores jump to the low_power_start function because iRAM
> data is retained and because while executing iROM code all cores find
> the jump flag 0x02020028 set. In low_power_start, cores check the reset
> status and if true th
On 15 January 2015 at 06:42, Akshay Saraswat wrote:
> This patch adds workaround for the ARM errata 799270 which says
> "If the L2 cache logic clock is stopped because of L2 inactivity,
> setting or clearing the ACTLR.SMP bit might not be effective. The bit is
> modified in the ACTLR, meaning a re
On 15 January 2015 at 06:42, Akshay Saraswat wrote:
> When compiled SPL for Thumb secondary cores failed to boot
> at the kernel boot up. Only one core came up out of 4.
> This was happening because the code relocated to the
> address 0x02073000 by the primary core was an ARM asm
> code which was
On 15 January 2015 at 06:33, Akshay Saraswat wrote:
> This patch adds "iRAM, CPU state and low power" configs
> which are the addresses acting as flag registers.
>
> iROM code checks CONFIG_LOWPOWER_FLAG address. If it is equal
> to CONFIG_LOWPOWER_EN then it jumps to the address (0x0202+CPUID
On 15 January 2015 at 06:42, Akshay Saraswat wrote:
> L2 Auxiliary Control Register provides configuration
> and control options for the L2 memory system. Bit 3
> of L2ACTLR stands for clean/evict push to external.
> Setting bit 3 disables clean/evict which is what
> this patch intends to do.
>
>
On 15 January 2015 at 06:42, Akshay Saraswat wrote:
> This patch does 3 things:
> 1. Enables ECC by setting 21st bit of L2CTLR.
> 2. Restore data and tag RAM latencies to 3 cycles because iROM sets
>0x3000400 L2CTLR value during switching.
> 3. Disable clean/evict push to external by setting 3
Hi Akshay,
On 15 January 2015 at 06:42, Akshay Saraswat wrote:
> iROM logic provides undesired jump address for CPU2.
> This patch adds a programmable susbstitute for a part of
> iROM logic which wakes up cores and provides jump addresses.
> This patch creates a logic to make all secondary cores
Hi Akshay,
On 15 January 2015 at 06:42, Akshay Saraswat wrote:
> This patch adds workaround for ARM errata 798870 which says
> "If back-to-back speculative cache line fills (fill A and fill B) are
> issued from the L1 data cache of a CPU to the L2 cache, the second
> request (fill B) is then canc
On 15 January 2015 at 06:42, Akshay Saraswat wrote:
> 1. Renaming set_l2cache to configure_l2actlr in order to avoid
>misleading comprehensions. Apparently this name suggests
>that L2 cache is being set or initialized which is incorrect
>as per the code in this function.
> 2. Cleaning
Hi Akshay,
On 15 January 2015 at 22:48, Akshay Saraswat wrote:
> Replacing SoC and peripheral specific function calls with generic
> clock_get_periph_rate calls to get the peripheral clocks.
>
> Signed-off-by: Akshay Saraswat
> ---
> Changes since v2:
> - No change.
>
> Changes since v1:
Hi Akshay,
On 15 January 2015 at 22:48, Akshay Saraswat wrote:
> Removing dead code of peripheral and SoC specific function
> implementations which was used for fetching peripheral clocks.
> This code is not being used anymore because of the introduction
> of generic clock_get_periph_rate functio
Hi,
On 15 January 2015 at 23:35, Minkyu Kang wrote:
> On 15/01/15 22:41, Akshay Saraswat wrote:
>> This patch adds code to shutdown secondary cores.
>> When U-boot comes up, all secondary cores appear powered on,
>> which is undesirable and causes side effects while
>> initializing these cores in
On 15 January 2015 at 22:48, Akshay Saraswat wrote:
> exynos5_get_periph_rate function reads incorrect div for
> SDMMC2 & 3. It also reads prediv and does division only for
> SDMMC0 & 2 when actually various other peripherals need that.
> Adding changes to fix these mistakes in periph rate calcula
Hi,
On 15 January 2015 at 23:09, Joonyoung Shim wrote:
> Hi,
>
> On 01/16/2015 02:48 PM, Akshay Saraswat wrote:
>> We planned to fetch peripheral rate through one generic API per
>> peripheral. These generic peripheral functions are in turn
>> expected to fetch apt values from a function refactor
On 15 January 2015 at 22:48, Akshay Saraswat wrote:
> Moving exynos5420_get_pll_clk function definition up in the
> code to keep it together with rest of SoC_get_pll_clk functions.
> This makes code more legible and also removes the need of
> declaration when called before the position of definiti
On 15 January 2015 at 22:48, Akshay Saraswat wrote:
> Apparently, members of clk_bit_info array do not map correctly
> to the members of enum periph_id. This mapping got broken after
> we changed periph_id(s) to reflect interrupt number instead of
> their position in a sequence. This patch intends
Hi,
On 5 December 2014 at 07:24, Ajay kumar wrote:
> Hi All,
>
> On Tue, Dec 2, 2014 at 2:00 AM, Simon Glass wrote:
>> Hi Sjoerd,
>>
>> On 1 December 2014 at 13:25, Sjoerd Simons
>> wrote:
>>> On Mon, 2014-12-01 at 13:09 -0700, Simon Glass wrote:
+Akshay
Hi Sjoerd,
On 1
Hi Joe,
On Wed, Jan 28, 2015 at 4:43 AM, Joe Hershberger
wrote:
> On Mon, Jan 26, 2015 at 8:54 PM, wrote:
>>
>> From: Sonic Zhang
>>
>> Board can define its own AXI burst length to improve DWMAC DMA
>> performance.
>>
>> Signed-off-by: Sonic Zhang
>> ---
>>
>> drivers/net/designware.c |2
Hi,
On 27 January 2015 at 17:16, Andreas Bießmann
wrote:
> Signed-off-by: Andreas Bießmann
> ---
>
> Changes in v1:
> - add timer_init in board_r
> - remove extern declaration of mmu_init_r()
>
> arch/avr32/config.mk|3 +++
> arch/avr32/cpu/u-boot.lds |2 ++
> arch/avr
Hi Joe,
On 27 January 2015 at 16:27, Joe Hershberger wrote:
> The sandbox driver will now generate response traffic to exercise the
> ping command even when no network exists. This allows the basic data
> pathways of the DM to be tested.
>
> Signed-off-by: Joe Hershberger
> ---
Looks like this
On 27 January 2015 at 16:27, Joe Hershberger wrote:
> Make it clear that the helper is checking the addr, not setting it.
>
> Signed-off-by: Joe Hershberger
> ---
>
> net/eth.c | 13 -
> 1 file changed, 4 insertions(+), 9 deletions(-)
Reviewed-by: Simon Glass
>
> diff --git a/net/
On 27 January 2015 at 16:27, Joe Hershberger wrote:
> Move some things around and organize things so that the driver model
> implementation will fit in more easily.
>
> Signed-off-by: Joe Hershberger
> ---
>
> include/net.h | 63 +
> net/eth.c
Hi Joe,
On 27 January 2015 at 16:27, Joe Hershberger wrote:
> The current implementation exposes the eth_device struct to code that
> needs to access the MAC address. Add a wrapper function for this to
> abstract away the pointer for this operation.
>
> Signed-off-by: Joe Hershberger
> ---
>
>
On 27 January 2015 at 16:27, Joe Hershberger wrote:
> Many of the functions in net.h were preceded extern needlessly. Removing
> them to limit the number of checkpatch.pl complaints.
>
> Signed-off-by: Joe Hershberger
> ---
>
> include/net.h | 96
> +-
Hi Joe,
On 27 January 2015 at 16:27, Joe Hershberger wrote:
> Add basic network support to sandbox which includes a network driver.
>
> Signed-off-by: Joe Hershberger
> ---
>
> arch/sandbox/dts/sandbox.dts | 4 ++
> drivers/net/Makefile | 2 +
> drivers/net/sandbox.c| 91
> ++
Hi Joe,
On 27 January 2015 at 16:27, Joe Hershberger wrote:
> First just add support for MAC drivers.
>
I don't fully understand this partly because my knowledge of the
network stack is limited. So I'll make a few comments and we can go
from there.
> Signed-off-by: Joe Hershberger
> ---
>
> c
Hi Joe,
On 27 January 2015 at 16:27, Joe Hershberger wrote:
> For now this simply addresses the MAC part of the network hardware.
> The next part to implement is the PHY children. I wanted to get early
> feedback on what I have so far to make sure I'm going in the direction
> that Simon envision
Hi Rob,
On Wed, Jan 28, 2015 at 1:38 AM, Rob Herring wrote:
> On Mon, Jan 26, 2015 at 7:23 PM, Simon Glass wrote:
>> On some hardware this time can be significant. Add bootstage support for
>> measuring this. The result can be obtained using 'bootstage report' or
>> passed on to the Linux via th
On 01/23/2015 03:44 PM, Masahiro Yamada wrote:
On Fri, 23 Jan 2015 15:34:08 +0800
Bo Shen wrote:
+ Tom, Masahiro,
On 01/15/2015 10:03 AM, Bo Shen wrote:
When build for Atmel related boards which support SPL,
it will generate boot.bin, also clean when it when do
"make clean" operation.
Sign
This commit 904672e (lcd: refactor lcd console stuff into its
own file), which cause lcd console address is not initialized.
This patch initialize the lcd console use the default value,
will be update when splash screen is enabled.
Signed-off-by: Bo Shen
---
Hi Tom,
If no objection of this pat
Hi Simon,
On Tue, Jan 27, 2015 at 11:15 PM, Simon Glass wrote:
> Hi Bin,
>
> On 27 January 2015 at 05:20, Bin Meng wrote:
>> Hi Simon,
>>
>> On Tue, Jan 27, 2015 at 9:23 AM, Simon Glass wrote:
>>> Since these board functions seem to be the same for all boards which use
>>> FSP, move them into a
Hi Simon,
On Tue, Jan 27, 2015 at 11:12 PM, Simon Glass wrote:
> Hi Bin,
>
> On 27 January 2015 at 01:59, Bin Meng wrote:
>> Hi Simon,
>>
>> On Tue, Jan 27, 2015 at 9:22 AM, Simon Glass wrote:
>>> Sometimes microcode is delivered as a header file. Allow the tool to
>>> support this as well as c
Hi Nikita Kiryanov,
On 01/27/2015 10:45 PM, Nikita Kiryanov wrote:
Can we use the following patch to fix this issue?
--->8---
diff --git a/common/lcd.c b/common/lcd.c
index cc34b8a..1195a54 100644
--- a/common/lcd.c
+++ b/common/lcd.c
@@ -268,6 +268,7 @@ void lcd_clear(void)
console_row
Add basic network support to sandbox which includes a network driver.
Signed-off-by: Joe Hershberger
---
arch/sandbox/dts/sandbox.dts | 4 ++
drivers/net/Makefile | 2 +
drivers/net/sandbox.c| 91
include/configs/sandbox.h| 14 +
First just add support for MAC drivers.
Signed-off-by: Joe Hershberger
---
common/board_r.c | 4 +-
common/cmd_bdinfo.c| 2 +
include/dm/uclass-id.h | 1 +
include/net.h | 23
net/eth.c | 320 -
5 files
Many of the functions in net.h were preceded extern needlessly. Removing
them to limit the number of checkpatch.pl complaints.
Signed-off-by: Joe Hershberger
---
include/net.h | 96 +--
1 file changed, 48 insertions(+), 48 deletions(-)
di
Prefix mmu.h PAGE_xxx definitions with MMU_ in order to prevent a naming
conflict with other definitions.
Signed-off-by: Andreas Bießmann
---
Changes in v1:
- new since RFC
arch/avr32/cpu/at32ap700x/mmu.c |8
arch/avr32/include/asm/arch-at32ap700x/mmu.h |6 +++---
Signed-off-by: Andreas Bießmann
---
Changes in v1:
- new since RFC
include/configs/atstk1002.h |4
1 file changed, 4 insertions(+)
diff --git a/include/configs/atstk1002.h b/include/configs/atstk1002.h
index 9e58238..a9c064a 100644
--- a/include/configs/atstk1002.h
+++ b/include/confi
Signed-off-by: Andreas Bießmann
---
Changes in v1: None
include/configs/grasshopper.h |4
1 file changed, 4 insertions(+)
diff --git a/include/configs/grasshopper.h b/include/configs/grasshopper.h
index 83f0ed2..54eb977 100644
--- a/include/configs/grasshopper.h
+++ b/include/configs/
cpu_mmc_init() is required by the init sequence to have a working MMC interface
on avr32. This will not be included in the binary if we omit the avr32 board.c
when building the generic board.
Signed-off-by: Andreas Bießmann
---
Changes in v1:
- new since RFC
arch/avr32/cpu/Makefile |1 +
This is required for architectures still need manual relocation like avr32, m68k
microblaze and maybe others.
Signed-off-by: Andreas Bießmann
Reviewed-by: Simon Glass
Tested-by: Michal Simek
---
Changes in v1: None
common/board_r.c | 12
1 file changed, 12 insertions(+)
diff
Signed-off-by: Andreas Bießmann
---
Changes in v1: None
arch/avr32/cpu/cpu.c|2 +-
arch/avr32/include/asm/u-boot.h |2 ++
arch/avr32/lib/board.c |2 +-
3 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/avr32/cpu/cpu.c b/arch/avr32/cpu/cpu.c
ind
Signed-off-by: Andreas Bießmann
---
Changes in v1: None
arch/avr32/include/asm/dma-mapping.h |7 -
arch/avr32/lib/board.c | 51 --
include/configs/atngw100.h |1 -
include/configs/atngw100mkii.h |1 -
include/config
Move some things around and organize things so that the driver model
implementation will fit in more easily.
Signed-off-by: Joe Hershberger
---
include/net.h | 63 +
net/eth.c | 75 +++
2
The current implementation exposes the eth_device struct to code that
needs to access the MAC address. Add a wrapper function for this to
abstract away the pointer for this operation.
Signed-off-by: Joe Hershberger
---
arch/mips/cpu/mips32/au1x00/au1x00_eth.c | 2 +-
arch/powerpc/cpu/mpc8260/e
The sandbox driver will now generate response traffic to exercise the
ping command even when no network exists. This allows the basic data
pathways of the DM to be tested.
Signed-off-by: Joe Hershberger
---
drivers/net/sandbox.c | 75 +++
1 file
For now this simply addresses the MAC part of the network hardware.
The next part to implement is the PHY children. I wanted to get early
feedback on what I have so far to make sure I'm going in the direction
that Simon envisioned.
Joe Hershberger (7):
net: Provide a function to get the curren
Make it clear that the helper is checking the addr, not setting it.
Signed-off-by: Joe Hershberger
---
net/eth.c | 13 -
1 file changed, 4 insertions(+), 9 deletions(-)
diff --git a/net/eth.c b/net/eth.c
index eac4f7b..65e8c77 100644
--- a/net/eth.c
+++ b/net/eth.c
@@ -153,11 +153,
Hi Scott,
> > I waffled about removing it, but leaned towards leaving it in because:
> > - I didn't want to change the existing U-Boot behavior for other
> > users. A google of 'u-boot "nand write"' shows a lot of examples that
> > don't include verification of writes, and they should if we remo
On Tue, Dec 9, 2014 at 7:21 AM, Simon Glass wrote:
>
> Kconfig has been available for a while but there are still driver model
> CONFIG options. Move all of these to Kconfig.
>
> This patch isn't final - I need to wait until the SPL series can be fully
> applied, which is in turn waiting on some A
Masahiro,
Do you mind to add aarch64 support for checkstack.pl?
$ make checkstack
/opt/linaro/gcc-linaro-aarch64-linux-gnu-4.8-2013.12_linux/bin/aarch64-linux-gnu-objdump
-d u-boot $(find . -name u-boot-spl) | \
perl ./scripts/checkstack.pl aarch64
wrong or unknown architecture "aarch64"
On Fr, 2014-12-19 at 12:39 +0800, Peng Fan wrote:
> Calculate ecc strength according oobsize, but not hardcoded
> which is not aligned with kernel driver
>
> Signed-off-by: Peng Fan
> Signed-off-by: Ye.Li
> ---
> drivers/mtd/nand/mxs_nand.c | 22 --
> 1 file changed, 4 inser
On Monday, January 26, 2015 at 06:44:14 PM, Steve Rae wrote:
[...]
> > No, unless there's a convincing technical argument that the currently
> > mainline DWC2 gadget driver (the s3c one) can absolutelly not be used
> > for the broadcom SoC, I want to avoid having two drivers for the same
> > IP cor
On Tuesday, January 27, 2015 at 09:52:14 PM, Simon Glass wrote:
> Hi Marek,
Hi!
> On 27 January 2015 at 10:57, Marek Vasut wrote:
> > On Tuesday, January 27, 2015 at 02:23:04 AM, Simon Glass wrote:
> >> Add a driver which locates the available XHCI controllers on the PCI bus
> >> and makes them
On Tuesday, January 27, 2015 at 09:53:01 PM, Simon Glass wrote:
> Hi Marek,
Hi Simon,
> On 27 January 2015 at 10:50, Marek Vasut wrote:
> > On Tuesday, January 27, 2015 at 02:23:03 AM, Simon Glass wrote:
> >> Use the new utility function instead of local code.
> >>
> >> Signed-off-by: Simon Gla
Hi Marek,
On 27 January 2015 at 10:50, Marek Vasut wrote:
> On Tuesday, January 27, 2015 at 02:23:03 AM, Simon Glass wrote:
>> Use the new utility function instead of local code.
>>
>> Signed-off-by: Simon Glass
>> ---
>>
>> drivers/usb/host/ehci-pci.c | 53
>> +-
1 - 100 of 192 matches
Mail list logo
