After booting has finished, EFI allows firmware to still interact with the OS
using the "runtime services". These callbacks live in a separate address space,
since they are available long after U-Boot has been overwritten by the OS.
This patch adds enough framework for arbitrary code inside of
The EFI loader needs to maintain views of memory - general system memory
windows as well as used locations inside those and potential runtime service
MMIO windows.
To manage all of these, add a few helpers that maintain an internal
representation of the map the similar to how the EFI API later on
UEFI defines a simple boot protocol for removable media. There we should look
at the EFI (first GPT FAT) partition and search for /efi/boot/bootXXX.efi with
XXX being different between different platforms (x86, x64, arm, aa64, ...).
This patch implements a simple version of that protocol for the
This is my (now very late) Christmas present for my openSUSE friends :).
U-Boot is a great project for embedded devices. However, convincing
everyone involved that only for "a few oddball ARM devices" we need to
support different configuration formats from grub2 when all other platforms
(PPC,
Now that everything's in place, let's add myself as the maintainer for
the efi payload support.
Signed-off-by: Alexander Graf
Reviewed-by: Simon Glass
---
MAINTAINERS | 7 +++
1 file changed, 7 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index
Now that we have all the bits and pieces ready for EFI payload loading
support, hook them up in Makefiles and KConfigs so that we can build.
Signed-off-by: Alexander Graf
Reviewed-by: Simon Glass
Tested-by: Simon Glass
---
v1 -> v2:
-
The idea to generate our pages tables from an array of memory ranges
is very sound. However, instead of hard coding the code to create up
to 2 levels of 64k granule page tables, we really should just create
normal 4k page tables that allow us to set caching attributes on 2M
or 4k level later on.
When running in EL1, AArch64 knows two page table maps. One with addresses
that start with all zeros (TTBR0) and one with addresses that start with all
ones (TTBR1).
In U-Boot we don't care about the high up maps, so just disable them to ensure
we don't walk an invalid page table by accident.
The hikey runs with dcache disabled today. There really should be no reason
not to use caches on AArch64, so let's add MMU definitions and enable the
dcache.
Signed-off-by: Alexander Graf
---
v1 -> v2:
- Move tables to .c file
---
board/hisilicon/hikey/hikey.c | 21
On 23.02.16 14:07, Michal Simek wrote:
> Hi,
>
> before I comment the rest. You need to also fix gem driver because it is
> using 1MB mapping.
>
> diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c
> index b3821c31a91d..cf1376ce1bd7 100644
> --- a/drivers/net/zynq_gem.c
> +++
Now that we have nice table driven page table creating code that gives
us everything we need, move to that.
Signed-off-by: Alexander Graf
---
v1 -> v2:
- Move mmu tables into board file
---
arch/arm/cpu/armv8/zynqmp/cpu.c | 217 +---
On 02.02.16 15:47, Leif Lindholm wrote:
> On Tue, Feb 02, 2016 at 03:45:02AM +0100, Alexander Graf wrote:
>> When an EFI application runs, it has access to a few descriptor and callback
>> tables to instruct the EFI compliant firmware to do things for it. The bulk
>> of those interfaces are
On 02.02.16 18:49, Mark Rutland wrote:
> On Tue, Feb 02, 2016 at 03:45:01AM +0100, Alexander Graf wrote:
>> EFI uses the PE binary format for its application images. Add support to EFI
>> PE
>> binaries as well as all necessary bits for the "EFI image loader" interfaces.
>>
>> Signed-off-by:
When enable dcache on HiKey, we're running into MMC command timeouts
because our retry loop is now faster than the eMMC (or an external SD
card) can answer.
Increase the retry count to the same as the timeout value for status
reports.
The real fix is obviously to not base this whole thing on a
By now the code to only have a single page table level with 64k page
size and 42 bit address space is no longer used by any board in tree,
so we can safely remove it.
To clean up code, move the layerscape mmu code to the new defines,
removing redundant field definitions.
Signed-off-by: Alexander
The MMU range table can vary depending on things we may only find
out at runtime. While the very simple ThunderX variant does not
change, other boards will, so move the definition from a static
entry in a header file to the board file.
Signed-off-by: Alexander Graf
---
Howdy,
Currently on arm64 there is a big pile of mess when it comes to MMU
support and page tables. Each board does its own little thing and the
generic code is pretty dumb and nobody actually uses it.
This patch set tries to clean that up. After this series is applied,
all boards except for the
Based on the memory map we can determine a lot of hard coded fields of
TCR, like the maximum VA and max PA we want to support. Calculate those
dynamically to reduce the chance for pit falls.
Signed-off-by: Alexander Graf
---
arch/arm/cpu/armv8/cache_v8.c| 59
Now that we have nice table driven page table creating code that gives
us everything we need, move to that.
Signed-off-by: Alexander Graf
---
v1 -> v2:
- Move mmu tables into .c file
---
arch/arm/mach-tegra/arm64-mmu.c | 132 +-
Now that we have an easy way to describe memory regions and enable the MMU,
there really shouldn't be anything holding people back from running with
caches enabled on AArch64. To make sure people catch early if they're missing
on the caching fun, give them a compile error.
Signed-off-by:
There's no good excuse for running with caches disabled on AArch64,
so let's just move the vexpress64 target to enable the MMU and run
with caches on.
Signed-off-by: Alexander Graf
---
v1 -> v2:
- Move tables to .c file
---
board/armltd/vexpress64/vexpress64.c | 21
On Fri, Feb 19, 2016 at 12:09:44PM +0100, Hannes Schmelzer wrote:
> We drop everything possible things from board headerfiles and replace
> this functionality with responsible settings in Kconfig (_defconfig).
>
> Signed-off-by: Hannes Schmelzer
> Reviewed-by: Tom Rini
Hi Tom,
The following changes since commit 52dd704bf8eda7ca039cdb398ec0b6895c3ef939:
Merge branch 'master' of http://git.denx.de/u-boot-sunxi (2016-02-23
15:35:47 -0500)
are available in the git repository at:
git://git.denx.de/u-boot-dm.git
for you to fetch changes up to
On Thu, Feb 25, 2016 at 08:30:22AM -0700, Simon Glass wrote:
> Hi Tom,
>
> The following changes since commit 52dd704bf8eda7ca039cdb398ec0b6895c3ef939:
>
> Merge branch 'master' of http://git.denx.de/u-boot-sunxi (2016-02-23
> 15:35:47 -0500)
>
> are available in the git repository at:
>
>
On Fri, Feb 19, 2016 at 07:19:49PM +0200, Nikita Kiryanov wrote:
> During boot, U-Boot raises the CPU frequency but the CORE and MPU regulators
> are not updated. This is not a problem in cold boot since the default values
> that the pmic outputs are correct, but if Linux were to switch the
From: Suman Anna
Define a macro for the DSP GEM power domain id number and
use it instead of a hard-coded number in the code that
disables all the DSPs on various Keystone2 SoCs.
Signed-off-by: Suman Anna
Signed-off-by: Nishanth Menon
---
Hi,
Please find various fixes for DDR, DSP and speed grade operations
w.r.t Keystone devices
Based on master 52dd704bf8ed Merge branch 'master' of
http://git.denx.de/u-boot-sunxi
Lokesh Vutla (2):
ARM: keystone2: Allow for board specific speed definitions
ARM: keystone2: K2G: Add
From: Lokesh Vutla
The maximum device and arm speeds can be determined by reading
EFUSE_BOOTROM register. As there is already a framework for reading this
register, adding support for all possible speeds on k2g devices.
Signed-off-by: Lokesh Vutla
On Fri, Feb 19, 2016 at 12:09:43PM +0100, Hannes Schmelzer wrote:
> There is no need to have some specific prompt, so we drop this within
> defconfigs.
>
> Signed-off-by: Hannes Schmelzer
> Reviewed-by: Tom Rini
Applied to u-boot/master, thanks!
--
Tom
From: Vitaly Andrianov
This commit replaces hard-coded EMIF and PHY DDR3 configurations for
predefined SODIMMs to a calculated configuration. The SODIMM parameters
are read from SODIMM's SPD and used to calculated the configuration.
The current commit supports calculation for
From: Suman Anna
The DSPs are powered on by default upon a Power ON reset, and
they are powered off on current Keystone 2 SoCs - K2HK, K2L, K2E
during the boot in u-boot. This is not functional on K2G though.
Extend the existing DSP power-off support to the only DSP present
on
From: Lokesh Vutla
Its not compulsory that speed definition should be same on EFUSE_BOOTROM
register for all keystone 2 devices. So, allow for board specific
speed definitions.
Signed-off-by: Lokesh Vutla
Signed-off-by: Nishanth Menon
---
From: Vitaly Andrianov
Because KS2 u-boot works in 32 bit address space the existing ram_size
global data field cannot be used. The maximum, which the get_ram_size()
can detect is 2GB only. The ft_board_setup() needs the actual ddr3 size
to fix up dtb.
This commit introduces the
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