Re: [U-Boot] [PATCH v2] defconfig: Add a config for AM335x High Security EVM

On 01/19/2017 11:59 AM, Lokesh Vutla wrote: > > > On Thursday 19 January 2017 09:29 PM, Andrew F. Davis wrote: >> On 01/17/2017 10:14 PM, Lokesh Vutla wrote: >>> >>> [..snip..] >>> +CONFIG_OF_LIST="am335x-evm am335x-bone am335x-boneblack am335x-evmsk am335x-bonegreen

[U-Boot] [PATCH v3 3/3] defconfig: Add a config for AM335x High Security EVM

Add a new defconfig file for the AM335x High Security EVM. This config is specific for the case of memory device booting. Memory device booting is handled separatly from peripheral booting on HS devices as the load address changes. This defconfig is the same as for the non-secure part, except

[U-Boot] [PATCH v3 1/3] malloc_simple: Add debug statements to memalign_simple

Add debug statements to memalign_simple to match malloc_simple. Signed-off-by: Andrew F. Davis --- common/malloc_simple.c | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/common/malloc_simple.c b/common/malloc_simple.c index 0f6bcbcc71..611400265b 100644 ---

[U-Boot] [PATCH v3 0/3] Add a config for AM335x High Security EVM

Hello all, This series is [0] and [1] together due to a dependency. Both are modified as suggested in the comments. Thanks, Andrew [0]: https://patchwork.ozlabs.org/patch/713945/ [1]: https://patchwork.ozlabs.org/patch/715820/ Andrew F. Davis (3): malloc_simple: Add debug statements to

[U-Boot] [PATCH v2 2/7] arm: socfpga: update de0 nano default environment

From: Dalon Westergreen Remove the default environment as it is now in a common header. Add the CONFIG_DEFAULT_DEVICE_TREE to the board's defconfig to set the linux devicetree name. Signed-off-by: Dalon Westergreen ---

[U-Boot] [PATCH v2 4/7] arm: socfpga: update arria5 socdk default environment

From: Dalon Westergreen Remove the default environment as it is now in a common header. Add the CONFIG_DEFAULT_DEVICE_TREE to the board's defconfig to set the linux devicetree name. Signed-off-by: Dalon Westergreen ---

[U-Boot] [PATCH v2 5/7] arm: socfpga: Update DE1 environment

From: Dalon Westergreen Remove the default environment as it is now in a common header. Add the CONFIG_DEFAULT_DEVICE_TREE to the board's defconfig to set the linux devicetree name. Signed-off-by: Dalon Westergreen ---

[U-Boot] [PATCH v2 6/7] arm: socfpga: Update SoCKit environment

From: Dalon Westergreen Remove the default environment as it is now in a common header. Add the CONFIG_DEFAULT_DEVICE_TREE to the board's defconfig to set the linux devicetree name. Signed-off-by: Dalon Westergreen ---

[U-Boot] [PATCH v2 7/7] arm: socfpga: Update sr1500 environment

From: Dalon Westergreen Remove the default environment as it is now in a common header. Add the CONFIG_DEFAULT_DEVICE_TREE to the board's defconfig to set the linux devicetree name. Signed-off-by: Dalon Westergreen ---

[U-Boot] [PATCH v2 3/7] arm: socfpga: update cyclone5 socdk default environment

From: Dalon Westergreen Remove the default environment as it is now in a common header. Add the CONFIG_DEFAULT_DEVICE_TREE to the board's defconfig to set the linux devicetree name. Signed-off-by: Dalon Westergreen ---

[U-Boot] [PATCH v3 2/3] spl: Remove overwrite of relocated malloc limit

spl_init on some boards is called after stack and heap relocation, on some platforms spl_relocate_stack_gd is called to handle setting the limit to its value CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN when simple SPL malloc is enabled during relocation. spl_init should then not re-assign the old

[U-Boot] [PATCH] arm: socfpga: add support for Terasic DE10-Nano board

Add CycloneV based Terasic DE10 Nano board. The board is based on the DE0 Nano but has a larger fpga. Signed-off-by: Dalon Westergreen --- arch/arm/dts/Makefile | 1 + arch/arm/dts/socfpga_cyclone5_de10_nano.dts | 68 +++

Re: [U-Boot] [PATCH] spl: Add some missing newlines

On 01/20/2017 09:51 PM, Simon Glass wrote: > Hi Andrew, > > On 12 January 2017 at 09:19, Andrew F. Davis wrote: >> Signed-off-by: Andrew F. Davis >> --- >> common/spl/spl.c | 4 ++-- >> 1 file changed, 2 insertions(+), 2 deletions(-) >> >> diff --git

Re: [U-Boot] [RFC PATCH] SPL: replace ctype implementation with tiny version

On 01/20/2017 04:33 PM, Andre Przywara wrote: > The ctype implementation (isdigit() & friends) works with an array of > 256 Bytes - one for each character. This is pretty big in SPL terms, > so let's replace this "bloated" implementation with a tiny version > using C statements. This only

Re: [U-Boot] [RFC PATCH] SPL: replace ctype implementation with tiny version

On 22/01/17 16:09, Tom Rini wrote: > On Fri, Jan 20, 2017 at 10:33:28PM +, Andre Przywara wrote: >> The ctype implementation (isdigit() & friends) works with an array of >> 256 Bytes - one for each character. This is pretty big in SPL terms, >> so let's replace this "bloated" implementation

Re: [U-Boot] [PATCH 3/3] Kconfig: Migrate BOARD_LATE_INIT to a select

2017-01-23 9:43 GMT+09:00 Tom Rini : > This option should not really be user selectable. Note that on PowerPC > we currently only need BOARD_LATE_INIT when CHAIN_OF_TRUST is enabled so be > conditional on that. > > Signed-off-by: Tom Rini Acked-by:

Re: [U-Boot] pull request: u-boot-uniphier/master

On Sun, Jan 22, 2017 at 09:55:58PM +0900, Masahiro Yamada wrote: > Hi Tom, > > Please pull the 2nd round of UniPhier updates for v2017.03: > - Allow to disable SPL (mainly for ATF) > - Refactor SoC init code > - Update DRAM settings > - Add PXs3 SoC support (DT, pinctrl driver, SoC code)

Re: [U-Boot] [PATCH] travis-ci: Split p1_p2_rdb_pc and p1010rdb into separate jobs

On Sat, Jan 21, 2017 at 05:58:47PM -0500, Tom Rini wrote: > On occasion the job that does these two build types will hit the time > limit so split this in two. > > Signed-off-by: Tom Rini Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital

Re: [U-Boot] [RFC PATCH 04/11] SPL: FIT: allow loading multiple images

Hi Andre, On 01/22/2017 06:58 PM, André Przywara wrote: On 22/01/17 07:08, Kever Yang wrote: Hi Andre, Thanks for your patches, this is great help for enable ATF on U-Boot SPL. For ATF use case, we would like to identify which one is bl31 for we need to get entry point for it while we

[U-Boot] [PATCH v2 0/7] arm: socfpga: update socfpga environments

These patches update the boot and os partition numbers in the default uboot environment for a number of socfpga boards. Per request, common environment configurations have been moved to a shared header. Thanks, Dalon ___ U-Boot mailing list

[U-Boot] [PATCH v2 1/7] arm: socfpga: add env settings to common header

From: Dalon Westergreen Move repeated environment settings for socfpga boards to a common header. The default values for the boot partition and the OS filesystem partition have changed and as as result the default uboot environment for socfpga boards needs updating.

Re: [U-Boot] [RFC PATCH] SPL: replace ctype implementation with tiny version

On Sun, Jan 22, 2017 at 11:30:04PM +, André Przywara wrote: > On 22/01/17 16:09, Tom Rini wrote: > > On Fri, Jan 20, 2017 at 10:33:28PM +, Andre Przywara wrote: > >> The ctype implementation (isdigit() & friends) works with an array of > >> 256 Bytes - one for each character. This is

Re: [U-Boot] [PATCH 3/7] arm: socfpga: update arria5 socdk default environment

On Sun, 2017-01-22 at 01:36 +0100, Marek Vasut wrote: > On 01/22/2017 12:04 AM, Westergreen, Dalon wrote: > > > > On Sat, 2017-01-21 at 20:29 +0100, Marek Vasut wrote: > > > > > > On 01/21/2017 06:31 PM, Dalon Westergreen wrote: > > > > > > > > > > > > From: Dalon Westergreen

Re: [U-Boot] [PATCH v3 3/3] defconfig: Add a config for AM335x High Security EVM

On Monday 23 January 2017 03:49 AM, Andrew F. Davis wrote: > Add a new defconfig file for the AM335x High Security EVM. This config > is specific for the case of memory device booting. Memory device booting > is handled separatly from peripheral booting on HS devices as the load > address

Re: [U-Boot] [PATCH v3 1/3] malloc_simple: Add debug statements to memalign_simple

On Monday 23 January 2017 03:49 AM, Andrew F. Davis wrote: > Add debug statements to memalign_simple to match malloc_simple. > > Signed-off-by: Andrew F. Davis Reviewed-by: Lokesh Vutla Thanks and regards, Lokesh

Re: [U-Boot] [PATCH v4 04/28] arm: socfpga: arria10: add system manager defines

On 01/10/2017 06:20 AM, Chee Tien Fong wrote: > From: Tien Fong Chee > > Add system manager defines for Arria10. > > Signed-off-by: Dinh Nguyen > Signed-off-by: Tien Fong Chee Acked-by: Marek Vasut

Re: [U-Boot] [PATCH v4 02/28] arm: socfpga: arria10: add sdram defines for Arria10

On 01/10/2017 06:20 AM, Chee Tien Fong wrote: > From: Tien Fong Chee > > Add the structures for the SDRAM controller on Arria10. > > Signed-off-by: Dinh Nguyen > Signed-off-by: Tien Fong Chee > Cc: Marek Vasut

Re: [U-Boot] [PATCH v4 05/28] arm: socfpga: arria10: add misc functions for Arria10

On 01/10/2017 06:20 AM, Chee Tien Fong wrote: > From: Tien Fong Chee > > Add arch_early_init_r function. The Arria10 has a firewall protection > around the SDRAM and OCRAM. These firewalls are to be disabled in order > for U-Boot to function. Shouldn't all this happen

Re: [U-Boot] [PATCH v4 01/28] arm: socfpga: arria10: add additional i2c nodes for Arria10

On 01/10/2017 06:20 AM, Chee Tien Fong wrote: > From: Tien Fong Chee > > Add remaining 3 I2C base addresses for the Arria10. > > Signed-off-by: Dinh Nguyen > Signed-off-by: Tien Fong Chee > Reviewed-by: Stefan

Re: [U-Boot] [PATCH v4 09/28] arm: socfpga: add define for bootinfo bsel bit shift

On 01/10/2017 06:20 AM, Chee Tien Fong wrote: > From: Tien Fong Chee > > On arria5/cyclone5 parts, the bsel bits are at shift 0, while for arria10, > the bsel bits are at shift 12. Add SYSMGR_BOOTINFO_BSEL_SHIFT define so that > the reading the bsel can generic. > >

Re: [U-Boot] [PATCH v4 10/28] arm: socfpga: arria10: add reset manager for Arria10

On 01/10/2017 06:20 AM, Chee Tien Fong wrote: > From: Tien Fong Chee > > Add the defines for the reset manager and some basic reset functionality. > > Signed-off-by: Dinh Nguyen > Signed-off-by: Tien Fong Chee

Re: [U-Boot] [PATCH v4 12/28] arm: socfpga: arria10: don't build GEN5 sdram for arria10

On 01/10/2017 06:20 AM, Chee Tien Fong wrote: > From: Tien Fong Chee > > The Arria10 device will not be able to re-use the GEN5 SDRAM controller, > so we shouldn't build the driver. Move CONFIG_ALTERA_SDRAM to Kconfig > option in drivers/ddr/altera/Kconfig. > >

Re: [U-Boot] [PATCH v4 15/28] arm: socfpga: combine clrbits/setbits into a single clrsetbits

On 01/10/2017 06:20 AM, Chee Tien Fong wrote: > From: Tien Fong Chee > > There is no dependency on doing a separate clrbits first in the > dwmac_deassert_reset function. Combine them into a single > clrsetbits call. > > Signed-off-by: Dinh Nguyen

Re: [U-Boot] [PATCH v4 14/28] arm: socfpga: arria10: remove board_init and s_init

On 01/10/2017 06:20 AM, Chee Tien Fong wrote: > From: Tien Fong Chee > > These functions are already in arch/arm/mach-socfpga/board.c > > Signed-off-by: Dinh Nguyen > Signed-off-by: Tien Fong Chee > Cc: Marek

Re: [U-Boot] [PATCH v4 16/28] arm: socfpga: add reset manager defines for Arria10

On 01/10/2017 06:20 AM, Chee Tien Fong wrote: > From: Tien Fong Chee > > Add the Arria10 reset manager defines that is used in Linux. Change the > license to SPDX. > > [commit 007bb689b3dbad83cdab0ad192bc6ed0162451e0 from the Linux kernel] > > Signed-off-by: Dinh

Re: [U-Boot] [PATCH v4 13/28] arm: socfpga: arria10 fpga does not have bridges mapped

On 01/10/2017 06:20 AM, Chee Tien Fong wrote: > From: Tien Fong Chee > > On the Arria10 device, the bridges are not mapped through the interconnect. > > Signed-off-by: Dinh Nguyen > Signed-off-by: Tien Fong Chee

Re: [U-Boot] [PATCH v4 03/28] arm: socfpga: arria10: add board files for the Arria10 SoCDK

On 01/10/2017 06:20 AM, Chee Tien Fong wrote: > From: Tien Fong Chee > > Add minimal support for the Arria10 SoCDK. > > Signed-off-by: Dinh Nguyen > Signed-off-by: Tien Fong Chee > Cc: Marek Vasut

Re: [U-Boot] [PATCH v4 06/28] arm: socfpga: arria10: add socfpga_arria10_socdk config

On 01/10/2017 06:20 AM, Chee Tien Fong wrote: > From: Tien Fong Chee > > Add config for the Arria10 SoC Development Kit. > > Signed-off-by: Dinh Nguyen > Signed-off-by: Tien Fong Chee > Acked-by: Marek Vasut

Re: [U-Boot] [PATCH v4 08/28] arm: socfpga: arria10: add config option build for arria10

On 01/10/2017 06:20 AM, Chee Tien Fong wrote: > From: Tien Fong Chee Commit message missing. > Signed-off-by: Dinh Nguyen > Signed-off-by: Tien Fong Chee > Cc: Marek Vasut > Cc: Dinh Nguyen

Re: [U-Boot] [PATCH v4 07/28] arm: socfpga: arria10: add socfpga_arria10_defconfig

On 01/10/2017 06:20 AM, Chee Tien Fong wrote: > From: Tien Fong Chee > > Add a defconfig file for Arria10, which does not include enabling SPL. > > Signed-off-by: Dinh Nguyen > Signed-off-by: Tien Fong Chee >

Re: [U-Boot] [PATCH v4 11/28] arm: socfpga: wrap system manager functions for A5/C5 devices

On 01/10/2017 06:20 AM, Chee Tien Fong wrote: > From: Tien Fong Chee > > The system manager on Arria10 is not used for pin muxing duties, so wrap > these functions for GEN5 devices only. > > Signed-off-by: Dinh Nguyen > Signed-off-by:

Re: [U-Boot] [PATCH v4 17/28] arm: socfpga: arria10: update dwmac reset function to support Arria10

On 01/10/2017 06:20 AM, Chee Tien Fong wrote: > From: Tien Fong Chee > > On the Arria10, the EMAC phy mode configuration for each EMACs is located > in separate registers versus being in 1 register for the GEN5 devices. The > Arria10 also has 3 EMACs compared to 2 for

Re: [U-Boot] [PATCH v4 26/28] arm: socfpga: arria10: Added drivers for Arria10 pinmux/pins configuration

On 01/10/2017 06:20 AM, Chee Tien Fong wrote: > From: Tien Fong Chee > > Signed-off-by: Tien Fong Chee > Cc: Marek Vasut > Cc: Dinh Nguyen > Cc: Chin Liang See > Cc: Tien Fong

Re: [U-Boot] [PATCH v4 23/28] arm: socfpga: arria10: Added drivers for Arria10 Reset Manager

On 01/10/2017 06:20 AM, Chee Tien Fong wrote: > From: Tien Fong Chee > > Drivers for reset manager is restructured such that common functions, > gen5 drivers and Arria10 drivers are moved to reset_manager.c, > reset_manager_gen5.c and reset_manager_arria10.c

Re: [U-Boot] [PATCH v4 24/28] arm: socfpga: arria10: Added miscellaneous drivers for Arria 10

On 01/10/2017 06:20 AM, Chee Tien Fong wrote: > From: Tien Fong Chee > > The drivers is restructured such common functions, gen5 functions. and > arria10 functions are moved to misc.c, misc_gen5 and misc_arria10 > respectively. > > Signed-off-by: Tien Fong Chee

Re: [U-Boot] [PATCH v4 25/28] arm: socfpga: arria10: Added drivers for Arria10 clock manager

On 01/10/2017 06:20 AM, Chee Tien Fong wrote: > From: Tien Fong Chee > > The drivers is restructured such common functions, gen5 functions, and > arria10 functions are moved to clock_manager.c, clock_manager_gen5 and > clock_manager_arria10 respectively. > >

Re: [U-Boot] [PATCH v4 20/28] arm: socfpga: arria10: Added clock manager and pin mux compat macro

On 01/10/2017 06:20 AM, Chee Tien Fong wrote: > From: Tien Fong Chee > > These compat macros would be used by clock manager and pin mux drivers > to look the required HW info from DTS for hardware initialization. > > Signed-off-by: Tien Fong Chee

Re: [U-Boot] [PATCH v4 22/28] arm: socfpga: arria10: Added support for Arria 10 socdk

On 01/10/2017 06:20 AM, Chee Tien Fong wrote: > From: Tien Fong Chee > > Signed-off-by: Tien Fong Chee > Cc: Marek Vasut > Cc: Dinh Nguyen > Cc: Chin Liang See > Cc: Tien Fong

Re: [U-Boot] [PATCH v4 21/28] arm: socfpga: arria10: Added some hardware base address for Arria 10

On 01/10/2017 06:20 AM, Chee Tien Fong wrote: > From: Tien Fong Chee Commit message missing , replace "some" in subject with something more descriptive. > Signed-off-by: Tien Fong Chee > Cc: Marek Vasut > Cc: Dinh Nguyen

Re: [U-Boot] [PATCH v4 19/28] arm: socfpga: arria10: Enable SPL for Arria 10

On 01/10/2017 06:20 AM, Chee Tien Fong wrote: > From: Tien Fong Chee > > This patch enables SPL build and implementation for Arria 10. > > Signed-off-by: Tien Fong Chee > Cc: Marek Vasut > Cc: Dinh Nguyen

Re: [U-Boot] [PATCH v4 18/28] ARM:dts: Added device tree for socfpga arria10 development kit sdmmc

On 01/10/2017 06:20 AM, Chee Tien Fong wrote: > From: Tien Fong Chee > > This is initial version of device tree for the Intel socfpga arria10 > development kit with sdmmc. > > Signed-off-by: Tien Fong Chee > Cc: Marek Vasut >

Re: [U-Boot] [PATCH v3 1/7] arm: socfpga: add env settings to common header

On 01/23/2017 04:51 AM, Dalon Westergreen wrote: > From: Dalon Westergreen > > Move repeated environment settings for socfpga boards > to a common header. > > The default values for the boot partition and the > OS filesystem partition have changed and as > as result

Re: [U-Boot] [PATCH v3 2/7] arm: socfpga: update de0 nano default environment

On 01/23/2017 04:51 AM, Dalon Westergreen wrote: > From: Dalon Westergreen > > Remove the default environment as it is now in a common > header. > > Add the CONFIG_DEFAULT_DEVICE_TREE to the board's defconfig > to set the linux devicetree name. > > Signed-off-by:

Re: [U-Boot] [PATCH] arm: socfpga: add support for Terasic DE10-Nano board

On 01/23/2017 04:36 AM, Dalon Westergreen wrote: > Add CycloneV based Terasic DE10 Nano board. The > board is based on the DE0 Nano but has a larger > fpga. > > Signed-off-by: Dalon Westergreen Acked-by: Marek Vasut -- Best regards, Marek Vasut

Re: [U-Boot] [PATCH v4 28/28] arm: socfpga: arria10: Enable fpga driver build for SPL.

On 01/10/2017 06:20 AM, Chee Tien Fong wrote: > From: Tien Fong Chee This needs commit message and Kconfig conversion possibly. > Signed-off-by: Tien Fong Chee > Cc: Marek Vasut > Cc: Dinh Nguyen > Cc:

Re: [U-Boot] [PATCH v4 27/28] arm: socfpga: arria10: Added Arria10 critical HW initialization to spl

On 01/10/2017 06:20 AM, Chee Tien Fong wrote: > From: Tien Fong Chee > > This patch adding the Arria10 critical hardware initialization before > enabling console print out in spl. > > Signed-off-by: Tien Fong Chee > Cc: Marek Vasut

[U-Boot] [PATCH v2] rpi: Fix device tree path on ARM64

The directory structure of device tree files produced by the kernel's 'make dtbs_install' is different on ARM64, the RPi3 device tree file is in a 'broadcom' subdirectory there. Signed-off-by: Tuomas Tynkkynen --- v2: Build the full DTB at compile-time, not runtime.

Re: [U-Boot] [PATCH] net: phy: dp83867: add support for MAC impedance configuration

On Friday 20 January 2017 04:03 AM, Grygorii Strashko wrote: > Sry > > CC:u-boot@lists.denx.de > > On 01/19/2017 04:30 PM, Grygorii Strashko wrote: >> From: Mugunthan V N >> >> Add support for programmable MAC impedance configuration and >> fix typo in DT impedance

[U-Boot] [PATCH 2/3] NXP: Introduce board/freescale/common/Kconfig and migrate CHAIN_OF_TRUST

Introduce board/freescale/common/Kconfig so that we have a single place for CONFIG options that are shared between ARM and PowerPC NXP platforms. Cc: York Sun Signed-off-by: Tom Rini --- arch/arm/include/asm/fsl_secure_boot.h | 8

[U-Boot] [PATCH 1/3] imx31_phycore: Split the eet variant out into a different TARGET

Rename CONFIG_IMX31_PHYCORE_EET to CONFIG_TARGET_IMX31_PHYCORE_EET and make this a distinct config target. Signed-off-by: Tom Rini --- arch/arm/Kconfig| 6 +- board/imx31_phycore/Kconfig | 2 +- configs/imx31_phycore_eet_defconfig | 3 +--

Re: [U-Boot] [PATCH v2 2/4] kconfig: Add a FREEBSD option

On Fri, Jan 20, 2017 at 8:51 PM, Simon Glass wrote: > Hi, > > On 17 January 2017 at 08:50, Emmanuel Vadot wrote: >> Add a FreeBSD option that enable the API and enable the data cache >> command as it is needed to boot the FreeBSD loader. >> >>

Re: [U-Boot] [PATCH 3/7] arm: socfpga: update arria5 socdk default environment

On Sat, 2017-01-21 at 20:29 +0100, Marek Vasut wrote: > On 01/21/2017 06:31 PM, Dalon Westergreen wrote: > > > > From: Dalon Westergreen > > > > The default values for CONFIG_SYS_MMCSD_FS_BOOT_PARTITION > > and CONFIG_SYS_MMCSD_FS_OS_PARTITION have changed and as >

Re: [U-Boot] [PATCH v2 1/4] kconfig: Add API kconfig file

On Fri, Jan 20, 2017 at 8:51 PM, Simon Glass wrote: > Hi, > > On 17 January 2017 at 08:50, Emmanuel Vadot wrote: >> Add kconfig file to enable API support >> >> Signed-off-by: Emmanuel Vadot >> --- >> Kconfig | 2 ++ >>

Re: [U-Boot] [RFC PATCH] SPL: replace ctype implementation with tiny version

On 01/22/2017 03:58 PM, Andrew F. Davis wrote: > On 01/20/2017 04:33 PM, Andre Przywara wrote: >> The ctype implementation (isdigit() & friends) works with an array of >> 256 Bytes - one for each character. This is pretty big in SPL terms, >> so let's replace this "bloated" implementation with a

Re: [U-Boot] Reset emmc samsung

Hi Samuele Please note that this list is usually English only. On Fri, 2017-01-20 at 21:49 +0100, Samuele Bugs wrote: > Buoansera in che modo è possibile resettare completamente una emmc e > eventualmente di quali modelli samsung stiamo parlando You may find some information about eMMC reset

Re: [U-Boot] [RFC PATCH 03/11] SPL: FIT: factor out spl_load_fit_image()

Hi Andre, On 01/22/2017 06:42 PM, André Przywara wrote: On 22/01/17 07:16, Kever Yang wrote: Hi Andre, On 01/20/2017 09:53 AM, Andre Przywara wrote: At the moment we load two images from a FIT image: the actual U-Boot image and the DTB. Both times we have very similar code to deal with

[U-Boot] [PATCH v2 0/7] arm: socfpga: update socfpga environments

These patches update the boot and os partition numbers in the default uboot environment for a number of socfpga boards. Per request, common environment configurations have been moved to a shared header. ___ U-Boot mailing list U-Boot@lists.denx.de

[U-Boot] [PATCH v3 7/7] arm: socfpga: Update sr1500 environment

From: Dalon Westergreen Remove the default environment as it is now in a common header. Add the CONFIG_DEFAULT_DEVICE_TREE to the board's defconfig to set the linux devicetree name. Signed-off-by: Dalon Westergreen ---

Re: [U-Boot] [PATCH 3/9 v2] mmc: Add Marvell Xenon SDHCI controller driver

Hi Stefan, On 01/21/2017 06:20 PM, Stefan Roese wrote: > This driver implementes platform specific code for the Xenon SDHCI > controller which is integrated in the Marvell MVEBU Armada 37xx and > Armada 7k / 8K SoCs. > > History: > This driver is ported from the Marvell U-Boot version 2015.01

[U-Boot] [PATCH v3 6/7] arm: socfpga: Update SoCKit environment

From: Dalon Westergreen Remove the default environment as it is now in a common header. Add the CONFIG_DEFAULT_DEVICE_TREE to the board's defconfig to set the linux devicetree name. Signed-off-by: Dalon Westergreen ---

[U-Boot] [PATCH v3 0/7] arm: socfpga: update socfpga environments

These patches update the boot and os partition numbers in the default uboot environment for a number of socfpga boards. Per request, common environment configurations have been moved to a shared header. Changes in v3: - Corrected error in common default environment Thanks, Dalon

[U-Boot] [PATCH v3 1/7] arm: socfpga: add env settings to common header

From: Dalon Westergreen Move repeated environment settings for socfpga boards to a common header. The default values for the boot partition and the OS filesystem partition have changed and as as result the default uboot environment for socfpga boards needs updating.

[U-Boot] [PATCH v3 3/7] arm: socfpga: update cyclone5 socdk default environment

From: Dalon Westergreen Remove the default environment as it is now in a common header. Add the CONFIG_DEFAULT_DEVICE_TREE to the board's defconfig to set the linux devicetree name. Signed-off-by: Dalon Westergreen ---

[U-Boot] [PATCH v3 4/7] arm: socfpga: update arria5 socdk default environment

From: Dalon Westergreen Remove the default environment as it is now in a common header. Add the CONFIG_DEFAULT_DEVICE_TREE to the board's defconfig to set the linux devicetree name. Signed-off-by: Dalon Westergreen ---

[U-Boot] [PATCH v3 2/7] arm: socfpga: update de0 nano default environment

From: Dalon Westergreen Remove the default environment as it is now in a common header. Add the CONFIG_DEFAULT_DEVICE_TREE to the board's defconfig to set the linux devicetree name. Signed-off-by: Dalon Westergreen ---

[U-Boot] [PATCH v3 5/7] arm: socfpga: Update DE1 environment

From: Dalon Westergreen Remove the default environment as it is now in a common header. Add the CONFIG_DEFAULT_DEVICE_TREE to the board's defconfig to set the linux devicetree name. Signed-off-by: Dalon Westergreen ---

Re: [U-Boot] [PATCH v3 1/3] malloc_simple: Add debug statements to memalign_simple

On Sun, Jan 22, 2017 at 04:19:35PM -0600, Andrew F. Davis wrote: > Add debug statements to memalign_simple to match malloc_simple. > > Signed-off-by: Andrew F. Davis Reviewed-by: Tom Rini -- Tom signature.asc Description: Digital signature

Re: [U-Boot] [PATCH v3 2/3] spl: Remove overwrite of relocated malloc limit

On Sun, Jan 22, 2017 at 04:19:36PM -0600, Andrew F. Davis wrote: > spl_init on some boards is called after stack and heap relocation, on > some platforms spl_relocate_stack_gd is called to handle setting the > limit to its value CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN when simple > SPL malloc is

Re: [U-Boot] [PATCH v1] x86: make LOAD_FROM_32_BIT visible for platforms

On Sat, Jan 21, 2017 at 10:07 PM, Andy Shevchenko wrote: > This option useful not only for development, but for the platforms where > U-Boot is run from custom ROM bootloader. For example, Intel Edison is > that board. > > Make this option visible that platforms

Re: [U-Boot] [RFC PATCH] SPL: replace ctype implementation with tiny version

On Fri, Jan 20, 2017 at 10:33:28PM +, Andre Przywara wrote: > The ctype implementation (isdigit() & friends) works with an array of > 256 Bytes - one for each character. This is pretty big in SPL terms, > so let's replace this "bloated" implementation with a tiny version > using C statements.

Re: [U-Boot] [RFC Patch V3] drivers: mmc: omap_hsmmc: Fix IO Buffer on OMAP36xx

Hi On 01/20/2017 12:17 AM, Adam Ford wrote: > On the OMAP36xx/37xx the CONTROL_WKUP_CTRL register has > a field (bit 6) named GPIO_IO_PWRDNZ. If 0, the IO buffers which > are related to GPIO_126, 127 and 129 are disabled. Some boards may > need this for MMC. After the PBIAS is configured, this

Re: [U-Boot] [PATCH] i2c: mux: Allow muxes to work as children of i2c bus without i2c-parent

On 18.1.2017 22:42, Simon Glass wrote: > Hi Michal, > > On 4 January 2017 at 02:40, Michal Simek wrote: >> >> Hi, >> >> On 3.1.2017 17:15, Moritz Fischer wrote: >>> Hi Michal, >>> >>> On Tue, Jan 3, 2017 at 1:22 AM, Michal Simek >>> wrote:

Re: [U-Boot] Reset emmc samsung

Hi, On 01/23/2017 08:13 AM, Marcel Ziswiler wrote: > Hi Samuele > > Please note that this list is usually English only. > > On Fri, 2017-01-20 at 21:49 +0100, Samuele Bugs wrote: >> Buoansera in che modo è possibile resettare completamente una emmc e >> eventualmente di quali modelli samsung

[U-Boot] [PATCH] BOARD: MCCMON6: Provide support for iMX6q based mccmon6 board

This patch provides u-boot support for Liebherr (LWN) mccmon6 board. Signed-off-by: Lukasz Majewski --- Changes for v5: - Remove network configuration data from envs - Clean up the envs - remove duplicated env variables Changes for v4: - Update board/liebherr/mccmon6/MAINTAINERS

Re: [U-Boot] [PATCH 2/2] config: Move CONFIG_BOARD_LATE_INIT to defconfigs

On Sat, Jan 21, 2017 at 11:09:20PM -0500, Tom Rini wrote: > On Sun, Jan 22, 2017 at 12:45:44PM +0900, Masahiro Yamada wrote: > > Hi. > > > > > > 2017-01-22 8:02 GMT+09:00 Tom Rini : > > > On Sat, Jan 21, 2017 at 11:48:33AM +0100, Jagan Teki wrote: > > > > > >> Cc: Tom Rini

Re: [U-Boot] [PATCH 3/7] arm: socfpga: update arria5 socdk default environment

On 01/22/2017 07:29 AM, Westergreen, Dalon wrote: > On Sun, 2017-01-22 at 01:36 +0100, Marek Vasut wrote: >> On 01/22/2017 12:04 AM, Westergreen, Dalon wrote: >>> >>> On Sat, 2017-01-21 at 20:29 +0100, Marek Vasut wrote: On 01/21/2017 06:31 PM, Dalon Westergreen wrote: > > >

[U-Boot] [PATCH v4 2/9] ARM: DTS: stm32: add stm32f746-disco device tree files

This patch adds the DTS source files needed for stm32f746-disco board The files are based on the stm32f429/469 files from current linux kernel. Source for "arch/arm/dts/armv7-m.dtsi": Linux: "arch/arm/boot/dts/armv7-m.dtsi" Signed-off-by: Michael Kurz Acked-by: Vikas

[U-Boot] [PATCH v4 1/9] ARM: DTS: stm32: add stm32f746 device tree pin control files

This patch adds pin control definitions for use in device tree files The definitions are based on the stm32f746 files from current linux kernel "include/dt-bindings/pinctrl/stm32f746-pinfunc.h". Signed-off-by: Michael Kurz Acked-by: Vikas MANOCHA ---

[U-Boot] [PATCH v4 0/9] ARM: stm32: add network and qspi driver support to stm32f746-disco board

This series adds support for the network and the qspi devices found on the stm32f746 controller and enables those devices on the stm32f746-disco board. Changes in v4: - Correct commit message and add linux source file path - Update to current master - Fix missing newline at end of file - Removed

[U-Boot] [PATCH v4 5/9] ARM: stm32: use clock setup function defined in clock.c

Use the clock setup function defined in clock.c instead of setting the clock bits directly in the drivers. Remove register definitions of RCC in rcc.h as these are already defined in the struct in stm32.h Signed-off-by: Michael Kurz Reviewed-by: Joe Hershberger

[U-Boot] [PATCH v4 4/9] ARM: stm32: fix stm32f7 sdram fmc base address

The fmc base address is defined twice, once in fmc.h and once in stm32.h. Fix wrong definition in stm32.h. Remove the definiton in fmc.h. Signed-off-by: Michael Kurz Acked-by: Vikas Manocha --- Changes in v4: - Reword commit message - Add Acked-by

[U-Boot] [PATCH v4 9/9] ARM: SPI: stm32: add stm32f746 qspi driver

This patch adds support for the QSPI IP found in stm32f7 devices. Signed-off-by: Michael Kurz --- Changes in v4: - Remove dts patch as the dts import patch now disables the quad interface Changes in v3: - Moved qspi rcc bits into rcc header - Drop 'add missing flag to

[U-Boot] [PATCH v4 3/9] ARM: stm32: cleanup stm32f7 files

Cleanup stm32f7 files: - use BIT macro - use GENMASK macro - use rcc struct instead of macro additions Add missing stm32f7 register in rcc struct Signed-off-by: Michael Kurz --- Changes in v4: - Split struct stm32_rcc_regs into two structs (common and stm32f7 specific)

[U-Boot] [PATCH v4 6/9] net: stm32: add designware mac glue code for stm32

This patch adds glue code required for enabling the designware mac on stm32f7 devices. Signed-off-by: Michael Kurz Acked-by: Joe Hershberger --- Changes in v4: None Changes in v3: - Add Acked-by tag to 'add designware mac glue code for stm32'

[U-Boot] [PATCH v4 7/9] net: phy: add SMSC LAN8742 phy

This patch adds support for SMSC LAN8742 in phylib Signed-off-by: Michael Kurz Acked-by: Joe Hershberger --- Changes in v4: None Changes in v3: None Changes in v2: - Add Acked-by tag to 'net: phy: add SMSC LAN8742 phy' drivers/net/phy/smsc.c |

[U-Boot] [PATCH v4 8/9] ARM: stm32: enable support for smsc phy on stm32f746-disco board

This patch enables support for the smsc phy on the stm32f746-disco board. Signed-off-by: Michael Kurz Acked-by: Vikas MANOCHA Series-changes 3: - Add Acked-by tag to 'enable support for smsc phy on...' --- Changes in v4: None Changes in v3: None

Re: [U-Boot] [RFC PATCH 03/11] SPL: FIT: factor out spl_load_fit_image()

On 22/01/17 07:16, Kever Yang wrote: > Hi Andre, > > On 01/20/2017 09:53 AM, Andre Przywara wrote: >> At the moment we load two images from a FIT image: the actual U-Boot >> image and the DTB. Both times we have very similar code to deal with >> alignment requirement the media we load from

Re: [U-Boot] [RFC PATCH 04/11] SPL: FIT: allow loading multiple images

On 22/01/17 07:08, Kever Yang wrote: > Hi Andre, > > Thanks for your patches, this is great help for enable ATF on U-Boot > SPL. > For ATF use case, we would like to identify which one is bl31 for we > need to > get entry point for it while we only need load address for other image. > Any

Re: [U-Boot] [PATCH 00/11] ARM: uniphier: recond round of UniPhier updates for v2017.03

2017-01-21 18:05 GMT+09:00 Masahiro Yamada : > - Make SPL optional for ARMv8 SoCs (main motivation is to use ATF) > - Refactor SoC init code > - Add PXs3 SoC support (DT, pinctrl driver, SoC code) > > > > Masahiro Yamada (11): > ARM: uniphier: add missing

[U-Boot] pull request: u-boot-uniphier/master

Hi Tom, Please pull the 2nd round of UniPhier updates for v2017.03: - Allow to disable SPL (mainly for ATF) - Refactor SoC init code - Update DRAM settings - Add PXs3 SoC support (DT, pinctrl driver, SoC code) The following changes since commit 2d8d190c8394b43c0989cdb04a50cb48d4e1f8da:

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