+ Marek for the socfpga platform, see below
On 07.12.2017 06:49, Jagan Teki wrote:
On Tue, Dec 5, 2017 at 11:50 AM, Goldschmidt Simon
wrote:
+ Lukasz (as a reviewer of my patch[1])
On Mon, Dec 4, 2017 at 8:20, Jagan Teki wrote:
This is the patch[1] for
On 14.05.2018 09:22, Jagan Teki wrote:
On Mon, May 14, 2018 at 12:34 PM, Simon Goldschmidt
wrote:
+ Marek for the socfpga platform, see below
On 07.12.2017 06:49, Jagan Teki wrote:
On Tue, Dec 5, 2017 at 11:50 AM, Goldschmidt Simon
On Mon, May 14, 2018 at 2:42 PM, Ashish Kumar wrote:
>
>
>> -Original Message-
>> From: Jagan Teki [mailto:jagannadh.t...@gmail.com]
>> Sent: Friday, May 11, 2018 11:31 AM
>> To: Prabhakar Kushwaha
>> Cc: Jagan Teki
On Mon, May 14, 2018 at 1:00 AM, Simon Glass wrote:
> Hi Ramon,
>
> On 12 May 2018 at 20:15, Ramon Fried wrote:
>> The clock and serial nodes are needed before relocation.
>> This patch ensures that the msm-serial driver will probe
>> and provide uart
Hi,
Am 08.05.2018 um 10:05 schrieb Dr. Philipp Tomsich:
> Looks like the designware GMAC driver is trying to enable a clock and
> can’t deal with the -ENOENT. Could you try to see which clock it is
> requesting and add the necessary entries in the clock-enable function?
>
> If you have a patch,
Starting with cpuid level 0x16 (Skylake-based processors)
it is possible to get CPU base freq via cpuid.
This fixes booting on a skylake based system.
Signed-off-by: Christian Gmeiner
---
drivers/timer/tsc_timer.c | 31 +--
1 file
On 14.05.2018 10:17, Marek Vasut wrote:
On 05/14/2018 10:03 AM, Simon Goldschmidt wrote:
On 12.05.2018 22:27, Marek Vasut wrote:
The global data are in the .data section, so there's no point in
reserving any space for it above stack. Put stack at the end of
SRAM.
Signed-off-by: Marek Vasut
On Sat, May 12, 2018 at 02:12:43PM +0200, Marek Vasut wrote:
> > Since the first post of these patches, you've asked to rework in a
> > significant manner the driver already, including doing a new PHY
> > driver to use the device model, and making other substantial changes
> > to
Add the response string as a parameter to fastboot_okay/fail, instead
of modifying a global, to match the contract expected by the AOSP
U-Boot code.
Signed-off-by: Alex Kiernan
Reviewed-by: Joe Hershberger
---
Changes in v3:
- refactor for
Anyone who wants FASTBOOT before this series wants USB_FUNCTION_FASTBOOT.
Split USB_FUNCTION_FASTBOOT from FASTBOOT so they retain their existing
behaviour.
Signed-off-by: Alex Kiernan
Reviewed-by: Joe Hershberger
---
Changes in v3:
- move
Add drivers/fastboot/fb_common.c, where fastboot_okay/fail are implemented
so we can call them from a non-USB implementation.
Introduce fastboot_response which takes varargs parameters so we can
use it to generate formatted response strings. Refactor fastboot_okay/fail
to use it.
Signed-off-by:
Ensure that when selecting FASTBOOT_FLASH you end up with a buildable
configuration. Prior to this you could select NAND without MTDPARTS
and end up with an image which (surprisingly) excluded NAND.
Also fix dependencies on FASTBOOT_GPT_NAME/FASTBOOT_MBR_NAME which require
you have
Add newlines so we format our output correctly.
Signed-off-by: Alex Kiernan
Acked-by: Joe Hershberger
Reviewed-by: Jocelyn Bohr
---
Changes in v3: None
Changes in v2: None
drivers/fastboot/fb_mmc.c | 28
Compiling on a 64 bit target the arguments to _fb_nand_write are
incompatible:
drivers/fastboot/fb_nand.c: In function ‘_fb_nand_write’:
drivers/fastboot/fb_nand.c:101:42: warning: passing argument 3 of
‘nand_write_skip_bad’ from incompatible pointer type
[-Wincompatible-pointer-types]
Move strcmp_l1() to include/common.h so we can can call it from elsewhere.
Move FASTBOOT_VERSION to include/fastboot.h so when we merge the UDP code
we only have one definition.
Signed-off-by: Alex Kiernan
---
Changes in v3:
- new
Changes in v2: None
Rename fb_set_reboot_flag to fastboot_set_reboot_flag so it matches
all other fastboot code in the global name space. Fix the guards around
them so that they're dependent on FASTBOOT, not just USB_FUNCTION_FASTBOOT.
Move the weak implementation of fastboot_set_reboot_flag to fb_common.c
so we can
Overriding fastboot_set_reboot_flag() in arch/arm/mach-omap2/boot-common.c
leaves it applying all boards that derive from this, not just the ones which
have support for Android bootloader flow. Move the weak function override to
the relevant board files.
Signed-off-by: Alex Kiernan
CONFIG_FASTBOOT_GPT_NAME and CONFIG_FASTBOOT_MBR_NAME are always defined
by Kconfig if you're compiling this code, so remove these redundant
defaults.
Signed-off-by: Alex Kiernan
---
Changes in v3:
- new
Changes in v2: None
drivers/fastboot/fb_mmc.c | 13 -
Merge UDP fastboot support from AOSP:
https://android.googlesource.com/platform/external/u-boot/+/android-o-mr1-iot-preview-8
Signed-off-by: Alex Kiernan
Signed-off-by: Alex Deymo
Signed-off-by: Jocelyn Bohr
---
Changes in v3:
-
Add fs_get_type_name so we can get the current filesystem type.
Signed-off-by: Alex Kiernan
---
Changes in v3:
- new
Changes in v2: None
fs/fs.c | 5 +
include/fs.h | 5 +
2 files changed, 10 insertions(+)
diff --git a/fs/fs.c b/fs/fs.c
index
Convert USB fastboot code to use shared fastboot protocol.
Signed-off-by: Alex Kiernan
---
drivers/usb/gadget/f_fastboot.c | 310 +---
1 file changed, 36 insertions(+), 274 deletions(-)
diff --git a/drivers/usb/gadget/f_fastboot.c
This builds on the fastboot UDP support and migrates the USB fastboot code
to the shared code.
It's currently untested, other than passing in Travis:
https://travis-ci.org/akiernan/u-boot/builds/378475039
Alex Kiernan (1):
usb: fastboot: Convert USB f_fastboot to shared fastboot
> -Original Message-
> From: Jagan Teki [mailto:jagannadh.t...@gmail.com]
> Sent: Friday, May 11, 2018 11:31 AM
> To: Prabhakar Kushwaha
> Cc: Jagan Teki ; York Sun ;
> Yogesh Narayan Gaur
On Mon, 14 May 2018 08:01:45 +1000
Simon Glass wrote:
> Hi Lukasz,
>
> On 7 May 2018 at 06:26, Lukasz Majewski wrote:
> > This patch adds support for MC34708 PMIC, to be used with driver
> > model (DM).
> >
> > Signed-off-by: Lukasz Majewski
>
On Mon, May 14, 2018 at 1:00 AM, Simon Glass wrote:
> Hi Ramon,
>
> On 12 May 2018 at 20:15, Ramon Fried wrote:
>> This patch adds pinmux and pinctrl driver for TLMM
>> subsystem in snapdragon chipsets.
>> Currently, supporting only 8016, but
MMC is not initialized in SPL, so it cannot load u-boot.img
preventing boot from MMC.
Also driver specific functions are guarded with generic
configuration options which leads to build failures when device
driver is not enabled in config. Fix that by using driver
specific defines.
Signed-off-by:
On 12.05.2018 22:27, Marek Vasut wrote:
The global data are in the .data section, so there's no point in
reserving any space for it above stack. Put stack at the end of
SRAM.
Signed-off-by: Marek Vasut
Cc: Chin Liang See
Cc: Dinh Nguyen
On Mon, May 14, 2018 at 1:00 AM, Simon Glass wrote:
> Hi Ramon,
>
> On 12 May 2018 at 20:15, Ramon Fried wrote:
>> Failure to set the clocks will causes data abort exception when
>> trying to write to AHB uart registers.
>> This patch ensures that we
On Mon, May 14, 2018 at 12:34 PM, Simon Goldschmidt
wrote:
> + Marek for the socfpga platform, see below
>
> On 07.12.2017 06:49, Jagan Teki wrote:
>>
>> On Tue, Dec 5, 2017 at 11:50 AM, Goldschmidt Simon
>> wrote:
>>>
>>> +
Hi Simon,
> Hi Lukasz,
>
> On 7 May 2018 at 06:26, Lukasz Majewski wrote:
> > This commit provides support for transmissions larger than 1 byte
> > for PMIC devices used with DM (e.g. MC34708 from NXP).
> >
> > Signed-off-by: Lukasz Majewski
> >
> > ---
> >
> >
>> > > > > Related, is there a QEMU target for nds32 that we could leverage
>> > > > > so that once the toolchain issue is resolved we can update
>> > > > > .travis.yml to run
>> > > tests on it?
>> > > > > Thanks!
>> > > >
>> > > > I am applying the QEMU offering permit.
>> > > > If it is ok. I
On Fri, May 11, 2018 at 11:17:11AM +0530, Jagan Teki wrote:
> Amarula A64 Relic is A64 based IoT device, which support
> - Allwinner A64 Cortex-A53
> - Mali-400MP2 GPU
> - AXP803 PMIC
> - 1GB DDR3 RAM
> - 8GB eMMC
> - AP6330 Wifi/BLE
> - MIPI-DSI
> - CSI: OV5640 sensor
> - USB OTG
> - 12V DC power
On 05/14/2018 10:03 AM, Simon Goldschmidt wrote:
> On 12.05.2018 22:27, Marek Vasut wrote:
>> The global data are in the .data section, so there's no point in
>> reserving any space for it above stack. Put stack at the end of
>> SRAM.
>>
>> Signed-off-by: Marek Vasut
>> Cc: Chin
Separate CMD_FASTBOOT from FASTBOOT and move code and configuration to
drivers/fastboot.
Signed-off-by: Alex Kiernan
Reviewed-by: Simon Glass
---
Changes in v3:
- move imply ANDROID_BOOT_IMAGE, CMD_FASTBOOT to FASTBOOT from
USB_FUNCTION_FASTBOOT
-
Dear U-boot mailing list
During the development of a boot loader for a Marvel armv7-a Ethernet switch
(98DX3235) I found a linker problem causing u-boot to not recognize any
commands.
Development tools:
u-boot 2013.01 with 2016_T1.0.eng_drop_v6 Marvell modifications extracted over
it.
This series merges the fastboot UDP support from AOSP into mainline
U-Boot.
Changes in UDP behaviour from the AOSP code, so it follows the existing USB
behaviour:
- 'boot' now follows the USB code and does 'bootm CONFIG_FASTBOOT_BUF_ADDR'.
I've added 'fastboot_bootcmd' which if set overrides
ZynqMP emulation platforms are no longer tested and supported that's why
remove macros and code around.
Signed-off-by: Michal Simek
---
arch/arm/cpu/armv8/zynqmp/clk.c | 4
arch/arm/cpu/armv8/zynqmp/cpu.c | 4
> Since b0ba1e7e9d9b9441a18048ec67a3b3100c096975
> (rockchip: clk: rk3288: add clk_enable function and support USB HOST0/HSIC)
> Ethernet no longer probes on RK3288.
>
> Add no-ops for GMAC clocks observed to be requested which match the
> clk_enable cases in RK3368 and RK3399.
>
>
> On 14 May 2018, at 12:42, Jonathan Gray wrote:
>
> On Mon, May 14, 2018 at 11:28:38AM +0200, Wadim Egorov wrote:
>> Hi,
>>
>>
>> Am 08.05.2018 um 10:05 schrieb Dr. Philipp Tomsich:
>>> Looks like the designware GMAC driver is trying to enable a clock and
>>> can???t deal with
On Mon, May 14, 2018 at 11:28:38AM +0200, Wadim Egorov wrote:
> Hi,
>
>
> Am 08.05.2018 um 10:05 schrieb Dr. Philipp Tomsich:
> > Looks like the designware GMAC driver is trying to enable a clock and
> > can???t deal with the -ENOENT. Could you try to see which clock it is
> > requesting and
While it’s not directly related to this patch, we should clearly state that
the U-Boot code base (with the possible exception of the tools/ directory,
which I have started touching here) has _implicitly_ moved to GNU11
(yes, even newer than C99), when be upgraded beyond GCC 5.
For reference, see
As all platforms which uses this driver have CONFIG_CLK flag
enable in their defconfig, we can remove it from driver code.
Signed-off-by: Patrice Chotard
---
Changes in v2: None
drivers/spi/stm32_qspi.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff
From: Christophe Kerello
Align qspi bindings following kernel dt-bindings
Documentation/devicetree/bindings/mtd/stm32-quadspi.txt
from kernel v4.12-rc1.
Signed-off-by: Christophe Kerello
Signed-off-by: Patrice Chotard
Align qspi bindings following kernel dt-bindings
Documentation/devicetree/bindings/mtd/stm32-quadspi.txt
from kernel v4.17-rc1.
Signed-off-by: Patrice Chotard
---
Changes in v2:
_ remove "update mode management" patch, will be reworked and
submitted separately
From: Christophe Kerello
Add "st,stm32f469-qspi" compatible which is used on kernel side.
This will be necessary when DT will be synchronised from kernel.
Signed-off-by: Christophe Kerello
Signed-off-by: Patrice Chotard
From: Ye Li
According to the Cortex-A7 TRM, for ACTLR.SMP bit "You must ensure this bit
is set to 1 before the caches and MMU are enabled, or any cache and TLB
maintenance operations are performed".
ROM sets this bit in normal boot flow, but when in serial download mode,
it is not
On Mon, May 14, 2018 at 01:53:50PM +0200, Philipp Tomsich wrote:
> Following the conversion of the SPDX license tags, a number of files
> compiled with -pedantic now generate warnings similar to the following
> for using C99-style '//' comments in ISO C90 code:
>
> tools/gen_eth_addr.c:1:1:
From: Rajan Vaja
Existing EEMI version is to as 1.0 (available from xilinx v2018.1
version). Update required API version to match with EEMI API version.
New PMUFW version is required for operations with programmable logic.
Signed-off-by: Rajan Vaja
Add missing reset property in quadspi node.
Signed-off-by: Patrice Chotard
---
Changes in v2: None
arch/arm/dts/stm32f746.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/dts/stm32f746.dtsi b/arch/arm/dts/stm32f746.dtsi
index 8581df9a2778..4845279ccfca
On 05/14/2018 11:05 AM, Maxime Ripard wrote:
> On Sat, May 12, 2018 at 02:12:43PM +0200, Marek Vasut wrote:
>>> Since the first post of these patches, you've asked to rework in a
>>> significant manner the driver already, including doing a new PHY
>>> driver to use the device model,
Hi Tom,
please pull the following MVEBU related patches from Marek and
Chris.
Thanks,
Stefan
The following changes since commit 62d77cea31216cad526e5f45c88e8377efc6fcae:
mmc: Improve tinification (2018-05-13 07:57:32 -0400)
are available in the Git repository at:
On 14.5.2018 14:02, Ramon Fried wrote:
> The check is necessary to avoid NULL pointer dereference.
>
> Signed-off-by: Ramon Fried
> ---
> drivers/mmc/sdhci.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/mmc/sdhci.c
On 05/14/2018 11:01 AM, Simon Goldschmidt wrote:
>
>
> On 14.05.2018 10:17, Marek Vasut wrote:
>> On 05/14/2018 10:03 AM, Simon Goldschmidt wrote:
>>> On 12.05.2018 22:27, Marek Vasut wrote:
The global data are in the .data section, so there's no point in
reserving any space for it
On 11.05.2018 10:03, Marek Behún wrote:
The DTS file for armada-37xx uses the string "marvell,armada3700-ehci",
but the code searched for "marvell,armada-3700-ehci".
Signed-off-by: Marek Behun
---
drivers/phy/marvell/comphy_a3700.c | 2 +-
1 file changed, 1 insertion(+),
The check is necessary to avoid NULL pointer dereference.
Signed-off-by: Ramon Fried
---
drivers/mmc/sdhci.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
index 8971a1122c..400f87e134 100644
---
Use dev_read_xxx() instead of old manner fdt_xxx() API
Signed-off-by: Patrice Chotard
---
Changes in v2: None
drivers/spi/stm32_qspi.c | 17 ++---
1 file changed, 6 insertions(+), 11 deletions(-)
diff --git a/drivers/spi/stm32_qspi.c
From: Christophe Kerello
Quad-SPI interface is able to manage 2 spi nor devices.
FSEL bit selects the flash memory to be addressed in single flash mode.
Signed-off-by: Christophe Kerello
Signed-off-by: Patrice Chotard
On Mon, May 14, 2018 at 04:31:27PM +0800, Rick Chen wrote:
> >> > > > > Related, is there a QEMU target for nds32 that we could leverage
> >> > > > > so that once the toolchain issue is resolved we can update
> >> > > > > .travis.yml to run
> >> > > tests on it?
> >> > > > > Thanks!
> >> > > >
>
On 10.05.2018 03:28, Chris Packham wrote:
This series updates the ddr training code in u-boot with the latest
publicly available version from Marvell which can be found at
https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git
(mv_ddr-armada-17.10 branch).
I've tried to make the delta
On 24.04.2018 17:21, Marek Behún wrote:
This is the second version of patches for updating the support of Armada 37xx
devices. Here I also send first version of code which adds basic support for the
Turris Mox board, a router currently being developed here at CZ.NIC, which is
being crowdfunded
Following the conversion of the SPDX license tags, a number of files
compiled with -pedantic now generate warnings similar to the following
for using C99-style '//' comments in ISO C90 code:
tools/gen_eth_addr.c:1:1: warning: C++ style comments are not allowed in ISO
C90
//
On 11.5.2018 21:22, Tom Rini wrote:
> On Fri, May 11, 2018 at 03:16:56PM +0200, Michal Simek wrote:
>
>> Hi Tom,
>>
>> please pull these changes to your tree.
>> Buildman looks good and travis build is not showing any issue too.
>> https://travis-ci.org/michalsimek/u-boot/builds/377645974
>>
>>
Hi Simon,
> Hi Lukasz,
>
> On 7 May 2018 at 06:26, Lukasz Majewski wrote:
> > This change enables support for MC34708 PMIC in sandbox. Now we can
> > emulate the I2C transfers larger than 1 byte.
> >
> > Notable changes for this driver:
> >
> > - From now on the register number
Hi Tom,
On Tue, May 8, 2018 at 10:45 PM, Tom Rini wrote:
> On Fri, Apr 06, 2018 at 12:05:24PM +0530, jassisinghb...@gmail.com wrote:
>
>> From: Jassi Brar
>>
>> Provide an alternate path for sparse-images to be
>> written to MMC. For example, via
Hi there,
I'm using the show_boot_progress function to keep track of the boot
process and display errors during the boot on a display (which will be
controlled via UART).
This works fine for e.g. a bad CRC in the kernel, which will give me a
negative progress and I can check, that that is an
Following the conversion of the SPDX license tags, a number of files
compiled with -pedantic now generate warnings similar to the following
for using C99-style '//' comments in ISO C90 code:
tools/gen_eth_addr.c:1:1: warning: C++ style comments are not allowed in ISO
C90
//
This series :
_ removes useless CONFIG_CLK flag
_ fixes checkpatch warnings
_ sorts include files in alphabetical order
_ align DT bindings with kernel in DT and in driver code
_ add chip select management
_ uses dev_read_xxx API
_ add reset support
Changes in v2:
_ remove "update
Sort include files by alphabetical order
Signed-off-by: Patrice Chotard
---
Changes in v2: None
drivers/spi/stm32_qspi.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/spi/stm32_qspi.c b/drivers/spi/stm32_qspi.c
index
From: Patrick Delaunay
Fix parameters function alingemnt
Fix variable declaration
Signed-off-by: Patrick Delaunay
Signed-off-by: Patrice Chotard
---
Changes in v2: None
drivers/spi/stm32_qspi.c | 31
This reverts commit 819f1e081c527d2d02cdaeec0027384688cf5de0.
This check was introduced in order to cope with the size limitation we had
when we were still using the raw environment in MMC. However, this
introduces padding as well, which can result in an overly huge binary if
one wants to flash
From: Simon Glass
To: Duncan Hare
Cc: "joe.hershber...@ni.com" ; U-Boot Mailing List
Sent: Sunday, May 13, 2018 3:00 PM
Subject: Re: net: [U-Boot] [PATCH v10 3/3] Adding wget
Please setup a
That can happen if duplicate UDP packet arrived, and that's not uncommon.
Anyway, we ignore packets with rpc_id lower than last we sent for other
requests, so it makes sense to do that for read request as well.
Signed-off-by: Vasily Khoruzhick
---
net/nfs.c | 2 ++
1 file
On Mon, May 14, 2018 at 05:21:38PM +0200, Marek Vasut wrote:
> On 05/14/2018 05:14 PM, Evan Thompson wrote:
> > On Sun, May 13, 2018 at 12:03 PM, Marek Vasut wrote:
> >>
> >> btw doesn't CONFIG_BLOCK_CACHE offer similar service, but for everyone
> >> and on block level ? I
Now that PCI devices work with highmem-enabled QEMU emulation, bump up
the RAM size in the MMU tables to gain access to the full 255 GB of RAM
potential instead of the puny 3 GB.
Signed-off-by: Tuomas Tynkkynen
---
board/emulation/qemu-arm/qemu-arm.c | 2 +-
1 file
On Mon, May 14, 2018 at 3:47 PM Tom Rini wrote:
> On Mon, May 14, 2018 at 06:42:41PM +0530, Jassi Brar wrote:
> > Hi Tom,
> >
> > On Tue, May 8, 2018 at 10:45 PM, Tom Rini wrote:
> > > On Fri, Apr 06, 2018 at 12:05:24PM +0530, jassisinghb...@gmail.com
On Mon, May 14, 2018 at 04:53:49PM +0200, Mark Kettenis wrote:
> > From: Philipp Tomsich
> > Date: Mon, 14 May 2018 15:22:06 +0200
> >
> > Following the conversion of the SPDX license tags, a number of files
> > compiled with -pedantic now generate warnings
On Sun, May 13, 2018 at 12:03 PM, Marek Vasut wrote:
>
> btw doesn't CONFIG_BLOCK_CACHE offer similar service, but for everyone
> and on block level ? I recall looking for ext4 fs speed up , but then
> ultimately used CONFIG_BLOCK_CACHE which did it for me.
I was unaware
Hi Tom,
(Cc'ing Chris)
On 14.05.2018 17:11, Tom Rini wrote:
On Mon, May 14, 2018 at 01:58:59PM +0200, Stefan Roese wrote:
Hi Tom,
please pull the following MVEBU related patches from Marek and
Chris.
Thanks,
Stefan
The following changes since commit
Add PWM definition to sun50i-a64.dtsi
Signed-off-by: Vasily Khoruzhick
---
arch/arm/dts/sun50i-a64.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm/dts/sun50i-a64.dtsi b/arch/arm/dts/sun50i-a64.dtsi
index 65a344d9ce..a82a3d89af 100644
---
Along with using new mode it fixes eMMC instability on Pinebook
Signed-off-by: Vasily Khoruzhick
---
arch/arm/include/asm/arch-sunxi/mmc.h | 6 +-
drivers/mmc/sunxi_mmc.c | 11 +++
2 files changed, 16 insertions(+), 1 deletion(-)
diff --git
That is necessary for using automatic calibration on A64 eMMC.
Signed-off-by: Vasily khoruzhick
---
arch/arm/mach-sunxi/Kconfig | 1 +
drivers/mmc/sunxi_mmc.c | 2 +-
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-sunxi/Kconfig
Currently, if we happen to allocate an address requiring 64 bits to a
device only supporting 32-bit BARs, the address eventually gets silently
truncated to 32 bits. Avoid this by adding a new flag to
pciauto_region_allocate() to bail out in such situations.
Signed-off-by: Tuomas Tynkkynen
All of the debug output from this file is squished to one line. Fix
it.
Signed-off-by: Tuomas Tynkkynen
---
drivers/pci/pci_auto_common.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/pci/pci_auto_common.c
On Mon, May 14, 2018 at 06:42:41PM +0530, Jassi Brar wrote:
> Hi Tom,
>
> On Tue, May 8, 2018 at 10:45 PM, Tom Rini wrote:
> > On Fri, Apr 06, 2018 at 12:05:24PM +0530, jassisinghb...@gmail.com wrote:
> >
> >> From: Jassi Brar
> >>
> >> Provide an
On Mon, May 14, 2018 at 03:31:03PM +0200, Michal Simek wrote:
> On 11.5.2018 21:22, Tom Rini wrote:
> > On Fri, May 11, 2018 at 03:16:56PM +0200, Michal Simek wrote:
> >
> >> Hi Tom,
> >>
> >> please pull these changes to your tree.
> >> Buildman looks good and travis build is not showing any
On 05/14/2018 05:14 PM, Evan Thompson wrote:
> On Sun, May 13, 2018 at 12:03 PM, Marek Vasut wrote:
>>
>> btw doesn't CONFIG_BLOCK_CACHE offer similar service, but for everyone
>> and on block level ? I recall looking for ext4 fs speed up , but then
>> ultimately used
Now that U-Boot works fine with highmem enabled, there is no need to
tell users to disable highmem.
Signed-off-by: Tuomas Tynkkynen
---
doc/README.qemu-arm | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/doc/README.qemu-arm
I had a bit more time to look into this and it looks as if we have two
problem-spots...
First, there's a type-mismatch between ram_info.size (a size_t) and gd.ram_size
(phys_size_t).
While we can increase the size of a phys_size_t to 64bit (by defining
CONFIG_PHYS_64BIT),
the size_t will
> On 14 May 2018, at 16:53, Mark Kettenis wrote:
>
>> From: Philipp Tomsich
>> Date: Mon, 14 May 2018 15:22:06 +0200
>>
>> Following the conversion of the SPDX license tags, a number of files
>> compiled with -pedantic now
On Mon, May 14, 2018 at 01:58:59PM +0200, Stefan Roese wrote:
> Hi Tom,
>
> please pull the following MVEBU related patches from Marek and
> Chris.
>
> Thanks,
> Stefan
>
> The following changes since commit 62d77cea31216cad526e5f45c88e8377efc6fcae:
>
> mmc: Improve tinification (2018-05-13
eMMC seems to require new clocking mode and calibration on A64,
otherwise it is pretty unstable on some boards (e.g. Pinebook)
with some eMMCs.
v2: - improve comment about calibration for eMMC on A64
- simplify ifdef-s around configuring delays
Vasily Khoruzhick (2):
sunxi-mmc: use new
On 14.05.2018 11:06, Marek Vasut wrote:
On 05/14/2018 11:01 AM, Simon Goldschmidt wrote:
On 14.05.2018 10:17, Marek Vasut wrote:
On 05/14/2018 10:03 AM, Simon Goldschmidt wrote:
On 12.05.2018 22:27, Marek Vasut wrote:
The global data are in the .data section, so there's no point in
> From: Philipp Tomsich
> Date: Mon, 14 May 2018 15:22:06 +0200
>
> Following the conversion of the SPDX license tags, a number of files
> compiled with -pedantic now generate warnings similar to the following
> for using C99-style '//' comments in ISO C90
This commit adds basic support for PWM found on Allwinner A64.
It can be used for pwm_backlight driver (e.g. for Pinebook)
Signed-off-by: Vasily Khoruzhick
---
arch/arm/include/asm/arch-sunxi/gpio.h | 1 +
arch/arm/include/asm/arch-sunxi/pwm.h | 12 ++
Currently, qemu_arm_defconfig and qemu_arm64_defconfig only work with
the 'highmem=off' parameter passed to QEMU's virt machine. The reason is
that when 'highmem' is not disabled, QEMU appends 64-bit a memory
resource to the PCI controller's regions property in DT in addition to
the 32-bit PCI
On Mon, May 14, 2018 at 03:22:06PM +0200, Philipp Tomsich wrote:
> Following the conversion of the SPDX license tags, a number of files
> compiled with -pedantic now generate warnings similar to the following
> for using C99-style '//' comments in ISO C90 code:
>
> tools/gen_eth_addr.c:1:1:
This series introduces a PWM driver for Allwinner A64.
This driver can be used to control backlight on Pinebook
v4: use the same binding as in Linux
Vasily Khoruzhick (2):
pwm: sunxi: add support for PWM found on Allwinner A64
dts: sunxi: add PWM node for sun50i
Tom,
I have two fixes for regressions (that unfortunately ended up in the last
release) in my tree,
ready for a merge onto master.
Thanks,
Philipp.
The following changes since commit ca70cbabdcd19bf157ae4fa984559b126071ccff:
Merge git://git.denx.de/u-boot-marvell (2018-05-14 08:52:48
Travis report (prior to a final rebase onto your latest master) is at
https://travis-ci.org/ptomsich/u-boot-rockchip/builds/378666041
> On 14 May 2018, at 17:32, Dr. Philipp Tomsich
> wrote:
>
> Tom,
>
> I have two fixes for regressions (that
Added support for is25wp032, is25wp064 and is25wp128.
Signed-off-by: Kimmo Rautkoski
---
drivers/mtd/spi/spi_flash_ids.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/mtd/spi/spi_flash_ids.c b/drivers/mtd/spi/spi_flash_ids.c
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