Hi Ken,
Thanks for tackling this.
On Wed, Jun 6, 2018 at 9:08 PM, wrote:
> From: Ken Ma
>
> Add a uclass which provides access to MDIO busses and includes
> operations required by MDIO.
> The implementation is based on the existing mii/phy/mdio data
> structures and APIs.
> This patch also
When CMD_GPIO is enabled the command 'gpio status -a' can cause
a hang or reboot if GPIO banks are not enabled, because it scans
all banks. This patch enables all GPIO banks so 'gpio status -a'
can fully execute.
Signed-off-by: Adam Ford
diff --git a/arch/arm/mach-omap2/omap3/clock.c
On Fri, Jun 8, 2018 at 4:33 AM, Simon Glass wrote:
> On 3 June 2018 at 18:04, Bin Meng wrote:
>> The 206ax cpu driver does not require pre-relocation flag to work.
>>
>> Signed-off-by: Bin Meng
>> ---
>>
>> arch/x86/dts/chromebook_link.dts | 5 -
>> 1 file changed, 5 deletions(-)
>>
>
>
On Fri, Jun 8, 2018 at 4:30 AM, Simon Glass wrote:
> On 3 June 2018 at 18:04, Bin Meng wrote:
>> The Panther Point chipset connected to Ivybridge has xHC integrated,
>> imply it.
>>
>> Signed-off-by: Bin Meng
>> ---
>>
>> arch/x86/cpu/ivybridge/Kconfig | 1 +
>> 1 file changed, 1 insertion(+)
On Fri, Jun 8, 2018 at 4:31 AM, Simon Glass wrote:
> On 3 June 2018 at 18:04, Bin Meng wrote:
>> As README.x86 already mentions, there are two SPI flashes mounted
>> on Intel Cougar Canyon 2 board, called SPI-0 and SPI-1 respectively.
>> SPI-0 stores the flash descriptor and the ME firmware.
On Fri, Jun 8, 2018 at 4:32 AM, Simon Glass wrote:
> On 3 June 2018 at 18:04, Bin Meng wrote:
>> This is not used anywhere. Clean this up.
>>
>> Signed-off-by: Bin Meng
>> ---
>>
>> arch/x86/cpu/intel_common/mrc.c | 5 -
>> arch/x86/cpu/ivybridge/model_206ax.c | 15 ---
>>
On Fri, Jun 8, 2018 at 4:32 AM, Simon Glass wrote:
> On 3 June 2018 at 18:04, Bin Meng wrote:
>> This enables the 206ax cpu driver on Intel Cougar Canyon 2 board,
>> so that SMP can be supported too.
>>
>> Signed-off-by: Bin Meng
>> ---
>>
>> arch/x86/dts/cougarcanyon2.dts | 33
On Fri, Jun 8, 2018 at 4:33 AM, Simon Glass wrote:
> On 3 June 2018 at 18:04, Bin Meng wrote:
>> LINK_V2N and LINK_N2V are currently defines, so they cannot handle
>> complex logics. Change to inline functions for future extension.
>>
>> Signed-off-by: Bin Meng
>> ---
>>
>> arch/x86/cpu/irq.c
Hi Stefan,
> -Original Message-
> From: stefan.herbrechtsme...@weidmueller.com
> [mailto:stefan.herbrechtsme...@weidmueller.com]
> Sent: Monday, June 11, 2018 9:33 PM
> To: Siva Durga Prasad Paladugu ;
> ste...@herbrechtsmeier.net
> Cc: u-boot@lists.denx.de; michal.si...@xilinx.com;
Hi Heinrich,
On Tue, Jun 12, 2018 at 1:18 AM, Heinrich Schuchardt wrote:
> On 06/10/2018 03:25 PM, Bin Meng wrote:
>> The EFI application does not boot currently. It's due to the call
>> to syscon_get_by_driver_data() in cpu_init_r() maps to nowhere as
>> CONFIG_SYSCON is not included in the
From: Dennis Gilmore
The helios4 is built on the SolidRun Armada 38x SOM.
The port os based on the ClearFog board, using information from
https://github.com/helios-4/u-boot-marvell as well as dtb input
from https://github.com/helios-4/linux-marvell
Signed-off-by: Dennis Gilmore
Signed-off-by:
Hi Ivan,
On Sat, Apr 21, 2018 at 1:47 AM, Ivan Gorinov wrote:
> Hi Bin,
>
> On Wed, Apr 18, 2018 at 07:05:28PM -0600, Bin Meng wrote:
>> >> >
>> >> > If there is no ROM image, ucode_base and ucode_size are not initialized
>> >> > and
>> >> > the microcode update data from DTB applied by
When enabling BLOCK_CACHE on devices with limited RAM during SPL,
some devices may not boot. This creates an option to enable
block caching in SPL by defaults off. It is dependent on SPL_BLK
Fixes: 46960ad6d09b ("block: Have BLOCK_CACHE default to y in some cases")
Signed-off-by: Adam Ford
On Mon, 2018-06-11 at 10:41 +0200, Dr. Philipp Tomsich wrote:
> > On 11 Jun 2018, at 10:08, Carlo Caione wrote:
/cut
> > +#define GRF_SOC_CON0 0xff770244
> > #define GRF_SOC_CON2 0xff77024c
>
> Could you convert these to ‘const uintptr_t GRF_SOC_CON0 = …’ ?
> The compiler will generate the same
On Fri, Jun 8, 2018 at 4:31 AM, Simon Glass wrote:
> On 3 June 2018 at 18:04, Bin Meng wrote:
>> It turns out that like Braswell, Intel FSP for IvyBridge requires
>> SPI controller settings to be locked down, as the U-Boot ICH SPI
>> driver fails with the following message on Cougar Canyon 2
On Fri, Jun 8, 2018 at 4:33 AM, Simon Glass wrote:
> On 3 June 2018 at 18:04, Bin Meng wrote:
>> At present there are 3 irq router drivers. One is the common one
>> and the other two are chipset specific for queensbay and quark.
>> However these are really the same drivers as the core logic is
On Fri, Jun 8, 2018 at 4:31 AM, Simon Glass wrote:
> On 3 June 2018 at 18:04, Bin Meng wrote:
>> At present this 206ax cpu driver is only built when FSP is not used.
>> This updates the Makefile to enable the build for both cases.
>>
>> Signed-off-by: Bin Meng
>> ---
>>
>>
There are multiple GPIO banks with up to 32 pins / bank. When
using 'gpio status -a' to read the pins, this patch displays
both GPIO_ similar to how the device trees
display in addition to displaying gpio_#
Signed-off-by: Adam Ford
diff --git a/drivers/gpio/omap_gpio.c
On Fri, Jun 8, 2018 at 4:29 AM, Simon Glass wrote:
> On 3 June 2018 at 18:04, Bin Meng wrote:
>> This fixes the following compiler warning:
>>
>> "warning: cast from pointer to integer of different size
>> [-Wpointer-to-int-cast]"
>>
>> Signed-off-by: Bin Meng
>> ---
>>
>>
On Mon, 2018-06-11 at 13:38 -0600, Simon Glass wrote:
> Hi,
>
> On 11 June 2018 at 08:15, Marek Vasut wrote:
> >
> > On 06/11/2018 04:13 PM, Chee, Tien Fong wrote:
> > >
> > > On Mon, 2018-06-11 at 16:03 +0200, Marek Vasut wrote:
> > > >
> > > > On 06/11/2018 03:55 PM, Chee, Tien Fong wrote:
Add a new bootefi_run_prepare() function which holds common code used to
set up U-Boot to run EFI code. Make use of this from the existing
bootefi_test_prepare() function, as well as do_bootefi_exec().
Also shorten a few variable names.
Signed-off-by: Simon Glass
---
Changes in v5:
- Drop call
These constants are defined in arch-specific code but redefined here. Add
a TODO to clean this up.
Signed-off-by: Simon Glass
Reviewed-by: Heinrich Schuchardt
---
Changes in v5:
- Drop period after "elf" in comment
Changes in v4: None
Changes in v3: None
Changes in v2: None
This function can be used from do_bootefi_exec() so that we use mostly the
same code for a normal EFI application and an EFI test.
Rename the function and use it in both places.
Signed-off-by: Simon Glass
---
Changes in v5:
- Rebase to master
Changes in v4:
- Rebase to master
Changes in v3:
Some times gcc may generate data that is then used within code that may
be part of an efi runtime section. That data could be jump tables,
constants or strings.
In order to make sure we catch these, we need to ensure that gcc emits
them into a section that we can relocate together with all the
With sandbox the U-Boot code is not mapped into the sandbox memory range
so does not need to be excluded when allocating EFI memory. Update the EFI
memory init code to take account of that.
Also use mapmem instead of a cast to convert a memory address to a
pointer.
Signed-off-by: Simon Glass
At present this code casts addresses to pointers so cannot be used with
sandbox. Update it to use mapmem instead.
Signed-off-by: Simon Glass
---
Changes in v5: None
Changes in v4: None
Changes in v3:
- Drop incorrect map_sysmem() in write_smbios_table()
Changes in v2: None
lib/smbios.c | 32
This jumps to test code which can call directly into the EFI support. It
does not need a separate image so it is easy to write tests with it.
This test can be executed without causing problems to the run-time
environemnt (e.g. U-Boot does not need to reboot afterwards).
For now the test just
This allows this feature to build within sandbox. This is for testing
purposes only since it is not possible for sandbox to load native code.
Signed-off-by: Simon Glass
---
Changes in v5: None
Changes in v4: None
Changes in v3:
- Init the 'rows' and 'cols' vars to avoid a compiler error (gcc
Hi Alex,
On 24 May 2018 at 06:34, Alexander Graf wrote:
>
>
> On 16.05.18 17:42, Simon Glass wrote:
>> Add these so that we can build the EFI loader for sandbox. The values are
>> for x86_64 so potentially bogus. But we don't support relocation within
>> sandbox anyway.
>>
>> Signed-off-by:
On 12.06.18 07:27, Simon Glass wrote:
> Hi Alex,
>
> On 24 May 2018 at 06:34, Alexander Graf wrote:
>>
>>
>> On 16.05.18 17:42, Simon Glass wrote:
>>> Add these so that we can build the EFI loader for sandbox. The values are
>>> for x86_64 so potentially bogus. But we don't support relocation
The current code causes a compiler error on gcc 4.8.4 as used by sandbox
on Ubuntu 14.04, which is fairly recent. Init these variables to fix the
problem.
Signed-off-by: Simon Glass
---
Changes in v5: None
Changes in v4:
- Move the fix to query_console_serial()
Changes in v3:
- Add new patch
On 12.06.18 07:27, Simon Glass wrote:
> Hi Alex,
>
> On 24 May 2018 at 06:32, Alexander Graf wrote:
>>
>>
>> On 16.05.18 17:42, Simon Glass wrote:
>>> With sandbox these values depend on the host system. Let's assume that it
>>> is x86_64 for now.
>>>
>>> Signed-off-by: Simon Glass
>>> ---
With sandbox these values depend on the host system. Let's assume that it
is x86_64 for now.
Signed-off-by: Simon Glass
---
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
include/config_distro_bootcmd.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
At present 'buildman sandbox' will build all 5 boards for the sandbox
architecture rather than the single board 'sandbox'. The only current way
to exclude sandbox_spl, sandbox_noblk, etc. is to use -x which is a bit
clumbsy.
Add a --boards option to allow individual build targets to be specified.
Add these so that we can build the EFI loader for sandbox. The values are
for x86_64 so potentially bogus. But we don't support relocation within
sandbox anyway.
Signed-off-by: Simon Glass
---
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
A limitation of the EFI loader at present is that it does not build with
sandbox. This makes it hard to write tests, since sandbox is used for most
testing in U-Boot.
This series enables the EFI loader feature. It allows sandbox to build and
run a trivial function which calls the EFI API to
This does not work at present and gives the following error:
output: 'ld.bfd: read in flex scanner failed
scripts/Makefile.lib:390: recipe for target
'lib/efi_selftest/efi_selftest_miniapp_return_efi.so' failed
It may be possible to figure this out with suitable linker magic but it
does not
On 06/12/2018 07:26 AM, Simon Glass wrote:
> The current code causes a compiler error on gcc 4.8.4 as used by sandbox
> on Ubuntu 14.04, which is fairly recent. Init these variables to fix the
> problem.
>
> Signed-off-by: Simon Glass
Is this needed after Alex's
On 06/12/2018 07:26 AM, Simon Glass wrote:
> This does not work at present and gives the following error:
>
> output: 'ld.bfd: read in flex scanner failed
> scripts/Makefile.lib:390: recipe for target
> 'lib/efi_selftest/efi_selftest_miniapp_return_efi.so' failed
>
> It may be possible to
Currently efi.h determines a few bits of its environment according to
config options. This falls apart with the efi stub support which may
result in efi.h getting pulled into the stub as well as real U-Boot
code. In that case, one may be 32bit while the other one is 64bit.
This patch changes the
Hi Heinrich,
On 16 May 2018 at 23:31, Heinrich Schuchardt wrote:
> On 05/16/2018 07:13 PM, Heinrich Schuchardt wrote:
>> On 05/16/2018 05:42 PM, Simon Glass wrote:
>>> A limitation of the EFI loader at present is that it does not build with
>>> sandbox. This makes it hard to write tests, since
2018-06-12 14:26 GMT+09:00 Masahiro Yamada :
> Hi Siva, Michal.
>
>
> I noticed drivers/mmc/sdhci-cadence.c
> not working for my boards.
>
>
> git-bisect points the following commit:
>
>
>
> commit 434f9d454eb1a17bb7f5cdb21167ccbe7e41da39
> Author: Siva Durga Prasad Paladugu
> Date: Tue May 29
We plan to run more than one EFI test. In order to avoid duplicating code,
create functions which handle preparing for running the test and cleaning
up afterwards.
Also shorten the awfully long variable names here.
Signed-off-by: Simon Glass
---
Changes in v5:
- Drop call to
Hi Siva, Michal.
I noticed drivers/mmc/sdhci-cadence.c
not working for my boards.
git-bisect points the following commit:
commit 434f9d454eb1a17bb7f5cdb21167ccbe7e41da39
Author: Siva Durga Prasad Paladugu
Date: Tue May 29 20:03:10 2018 +0530
mmc: sdhci: Update sdhci_send_command()
Hi Alex,
On 24 May 2018 at 06:32, Alexander Graf wrote:
>
>
> On 16.05.18 17:42, Simon Glass wrote:
>> With sandbox these values depend on the host system. Let's assume that it
>> is x86_64 for now.
>>
>> Signed-off-by: Simon Glass
>> ---
>>
>> Changes in v4: None
>> Changes in v3: None
>>
On 11 Jun 2018, at 19:08, Carlo Caione wrote:
>
> On Mon, 2018-06-11 at 10:41 +0200, Dr. Philipp Tomsich wrote:
>>> On 11 Jun 2018, at 10:08, Carlo Caione wrote:
>
> /cut
>>> +#define GRF_SOC_CON0 0xff770244
>>> #define GRF_SOC_CON2 0xff77024c
>>
>> Could you convert these to ‘const uintptr_t
On 06/10/2018 03:25 PM, Bin Meng wrote:
> The EFI application does not boot currently. It's due to the call
> to syscon_get_by_driver_data() in cpu_init_r() maps to nowhere as
> CONFIG_SYSCON is not included in the configuration.
>
> EFI application is built as a shared library, so GCC won't
On 06/11/2018 05:29 AM, Tom Rini wrote:
> On Sat, Jun 09, 2018 at 04:57:44AM +, York Sun wrote:
>> On 06/08/2018 09:39 PM, Tom Rini wrote:
>>> On Fri, Jun 08, 2018 at 11:49:32PM +, York Sun wrote:
>>>
Tom,
The following changes since commit
Hi Heinrich,
On Mon, Jun 11, 2018 at 11:31 PM, Heinrich Schuchardt
wrote:
> On 06/11/2018 01:36 AM, Bin Meng wrote:
>> Hi Heinrich,
>>
>> On Mon, Jun 11, 2018 at 2:17 AM, Heinrich Schuchardt
>> wrote:
>>> On 06/10/2018 04:30 PM, Bin Meng wrote:
Hi Heinrich,
On Sun, Jun 10, 2018
On Sat, Jun 9, 2018 at 3:46 AM, Chris Packham wrote:
> Combine repeated code from smi_reg_read/smi_reg_write into a common
> function smi_wait_ready.
>
> Reviewed-by: Stefan Roese
> Signed-off-by: Chris Packham
Acked-by: Joe Hershberger
___
U-Boot
(ping Jagan)
On 06/06/2018 10:51 AM, Martin Kelly wrote:
On 06/06/2018 07:58 AM, Maxime Ripard wrote:
On Mon, Jun 04, 2018 at 11:15:34AM -0700, Martin Kelly wrote:
[snip as the thread is getting long]
On 06/04/2018 01:21 AM, Maxime Ripard wrote:
On Fri, Jun 01, 2018 at 10:16:32AM -0700,
From: Fabio Estevam
ARCH_MX6 has default values for SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
and SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR.
Do the same for ARCH_MX7 so that users may have a consistent
experience through the i.MX families.
Signed-off-by: Fabio Estevam
Signed-off-by: Otavio Salvador
---
From: Fabio Estevam
Since kernel commit 41bbeadceb03 ("ARM: dts: imx7d-pico-pi: Separate
into cpu and baseboard dts") the dtb name has changed.
Fix it accordingly.
Signed-off-by: Fabio Estevam
Signed-off-by: Otavio Salvador
---
include/configs/pico-imx7d.h | 2 +-
1 file changed, 1
On 06/11/2018 06:35 PM, Bin Meng wrote:
> Hi Heinrich,
>
> On Mon, Jun 11, 2018 at 11:31 PM, Heinrich Schuchardt
> wrote:
>> On 06/11/2018 01:36 AM, Bin Meng wrote:
>>> Hi Heinrich,
>>>
>>> On Mon, Jun 11, 2018 at 2:17 AM, Heinrich Schuchardt
>>> wrote:
On 06/10/2018 04:30 PM, Bin Meng
From: Carlo Caione
No functional change but at least we can now guarantee type safety.
Signed-off-by: Carlo Caione
---
arch/arm/mach-rockchip/rk3288-board.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-rockchip/rk3288-board.c
From: Carlo Caione
Use regulators_enable_boot_on() to init all the regulators with
regulator-boot-on property.
Signed-off-by: Carlo Caione
Reviewed-by: Simon Glass
Reviewed-by: Philipp Tomsich
Acked-by: Philipp Tomsich
---
arch/arm/mach-rockchip/rk3288-board.c | 6 ++
1 file changed, 6
From: Carlo Caione
On the veyron board the vcc33_sd regulator is used as vmmc-supply for
the SD card. This regulator is powered in the MMC core during power on
but its value is never actually set.
In the veyron platform the reset value for the LDO output is 1.8V while
the standard (min and max)
From: Carlo Caione
The GRF_SOC_CON0.grf_force_jtag bit is automatically set at boot and it
is preventing the SDMMC to work correctly. Disable the JTAG function on
the assumption that a working SD has higher priority over JTAG.
Signed-off-by: Carlo Caione
Reviewed-by: Simon Glass
Reviewed-by:
This adds various minor features for livetree, mostly related to memory
handling.
Michael Pratt (1):
fdt: Add device tree memory bindings
Simon Glass (10):
dm: core: Add ofnode function to read a 64-bit int
dm: core: Fix a few ofnode function comments
dm: core: Add comments to
These functions are missing comments. Add some.
Signed-off-by: Simon Glass
---
include/dm/ofnode.h | 23 +++
1 file changed, 23 insertions(+)
diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h
index 85cb87b83f..61c42311f8 100644
--- a/include/dm/ofnode.h
+++
Add additional logging so that common errors when finding a device by
ofnode are easier to debug.
Signed-off-by: Simon Glass
---
drivers/core/uclass.c | 14 --
1 file changed, 12 insertions(+), 2 deletions(-)
diff --git a/drivers/core/uclass.c b/drivers/core/uclass.c
index
From: Carlo Caione
These patches toghether with the previously submitted patch [0] enable
the chromebook veyron jerry to use the SDMMC interface when U-Boot is
not chainloaded by depthcharge but booted directly from SPI.
[0] https://marc.info/?l=u-boot=152836928803742=2
Changelog:
V2:
- Add
From: Michael Pratt
Support a default memory bank, specified in reg, as well as
board-specific memory banks in subtree board-id nodes.
This allows memory information to be provided in the device tree,
rather than hard-coded in, which will make it simpler to handle
similar devices with different
Tidy up three return-value errors.
Signed-off-by: Simon Glass
---
include/dm/ofnode.h | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h
index dbb4273db6..85cb87b83f 100644
--- a/include/dm/ofnode.h
+++ b/include/dm/ofnode.h
@@
We have a 32-bit version of this function. Add a 64-bit version as well so
we can easily read 64-bit ints from the device tree.
Signed-off-by: Simon Glass
---
drivers/core/of_access.c | 19 +++
drivers/core/ofnode.c| 32
Update the parameters sandbox_sf_bind_emul to support livetree.
Signed-off-by: Simon Glass
---
drivers/mtd/spi/sandbox.c | 9 +
include/spi_flash.h | 2 +-
test/dm/spi.c | 8
3 files changed, 10 insertions(+), 9 deletions(-)
diff --git
It is sometimes useful to show a message when logging an error return
value, perhaps to add a few details about the problem. Add a function to
support this.
Signed-off-by: Simon Glass
---
include/log.h | 8
1 file changed, 8 insertions(+)
diff --git a/include/log.h b/include/log.h
Add a way to decode a memory region, including the memory type (sram or
sdram) and its start address and size.
Signed-off-by: Simon Glass
---
drivers/core/of_extra.c | 81 +
include/dm/of_extra.h | 45 +++
2 files changed, 126
Hi,
On 11 June 2018 at 08:15, Marek Vasut wrote:
> On 06/11/2018 04:13 PM, Chee, Tien Fong wrote:
>> On Mon, 2018-06-11 at 16:03 +0200, Marek Vasut wrote:
>>> On 06/11/2018 03:55 PM, Chee, Tien Fong wrote:
>>> [...]
>
>>
>>>
Linux firmware loading method is
Hi Bin,
On 11 June 2018 at 09:53, Bin Meng wrote:
>
> Hi Simon,
>
> On Mon, Jun 11, 2018 at 10:53 PM, Simon Glass wrote:
> > Hi Bin,
> >
> > On 10 June 2018 at 05:24, Bin Meng wrote:
> >> Unfortunately the EFI x86 application and payload support have been
> >> broken for quite a while. This
On 11.06.18 11:11, Bin Meng wrote:
> Hi Alex,
>
> On Sun, Jun 10, 2018 at 9:25 PM, Bin Meng wrote:
>> Since commit bb0bb91cf0aa ("efi_stub: Use efi_uintn_t"), EFI x86
>> 64-bit payload does not work anymore. The call to GetMemoryMap()
>> in efi_stub.c fails with return code
We should use the baudrate variable available inside U-Boot
environment to allow it to be changed dynamically.
Signed-off-by: Otavio Salvador
---
include/configs/wandboard.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/configs/wandboard.h
When an exception or interrupt occurs the link register (LR) may
contain the source of the exception, although we do not print the
value it may still be extracted with a debugger. When in SPL we
loop on getting and exception, but use a linking branch, which
over-writes the LR value, use a regular
Update this function to take an ofnode so that it can work with livetree.
Signed-off-by: Simon Glass
---
drivers/core/of_extra.c | 8
drivers/misc/cros_ec.c | 4 ++--
include/dm/of_extra.h | 6 ++
3 files changed, 8 insertions(+), 10 deletions(-)
diff --git
Add an ofnode_by_compatible() to allow iterating through ofnodes with a
given compatible string.
Signed-off-by: Simon Glass
---
drivers/core/ofnode.c | 12
include/dm/ofnode.h | 11 +++
2 files changed, 23 insertions(+)
diff --git a/drivers/core/ofnode.c
On Mon, Jun 11, 2018 at 5:53 PM, Simon Glass wrote:
> Hi Ramon,
>
> On 9 June 2018 at 03:06, Ramon Fried wrote:
> > The Shared Memory Manager driver implements an interface for allocating
> > and accessing items in the memory area shared among all of the
> > processors in a Qualcomm platform.
>
Add a new device_bind_ofnode() function which can bind a device given its
ofnode. This allows binding devices more easily with livetree nodes.
Signed-off-by: Simon Glass
---
drivers/core/device.c| 8
include/dm/device-internal.h | 4
2 files changed, 12 insertions(+)
Hi Ramon,
On 11 June 2018 at 13:14, Ramon Fried wrote:
>
>
> On Mon, Jun 11, 2018 at 5:53 PM, Simon Glass wrote:
>>
>> Hi Ramon,
>>
>> On 9 June 2018 at 03:06, Ramon Fried wrote:
>> > The Shared Memory Manager driver implements an interface for allocating
>> > and accessing items in the memory
Hi,
On 11 June 2018 at 09:48, Manivannan Sadhasivam
wrote:
> This commit adds Actions Semi OWL family base clock and S900 SoC specific
> clock support. For S900 peripheral clock support, only UART clock has been
> added for now.
>
> Signed-off-by: Manivannan Sadhasivam
> ---
>
Hi Alex,
On Mon, Jun 11, 2018 at 1:52 PM, Alexander Graf wrote:
>
>
> On 11.06.18 01:29, Bin Meng wrote:
>> On Mon, Jun 11, 2018 at 3:16 AM, Alexander Graf wrote:
>>>
>>>
>>> On 10.06.18 15:25, Bin Meng wrote:
If UEFI BIOS has the graphics output protocol (GOP), let's pass its
Hi Alex,
On Mon, Jun 11, 2018 at 1:55 PM, Alexander Graf wrote:
>
>
> On 11.06.18 04:34, Bin Meng wrote:
>> On Mon, Jun 11, 2018 at 3:11 AM, Alexander Graf wrote:
>>>
>>>
>>> On 10.06.18 15:25, Bin Meng wrote:
Attempting to use a toolchain that is preconfigured to generate code
for
There is no reason to keep this gpio based code in architecture. Use
ledtrig-heartbeat.c instead which is much more flexible then this
ancient code.
Signed-off-by: Michal Simek
---
arch/microblaze/Kconfig.debug | 7
arch/microblaze/include/asm/setup.h | 3 --
On 8.6.2018 23:59, Simon Glass wrote:
> Hi,
>
>
> On 7 June 2018 at 06:18, Michal Simek wrote:
>> Hi,
>>
>> On 5.6.2018 09:20, Siva Durga Prasad Paladugu wrote:
>>> Fill initial ram top with DDR base addr value from DT as not filling
>>> it here always assumes it as zero while calculating
On 8.6.2018 23:59, Simon Glass wrote:
> +Tom
>
> Hi,
>
> On 5 June 2018 at 04:47, Michal Simek wrote:
>> The patch applied in 2010
>> "cmd_fpga: cleanup help and check parameters"
>> (sha1: a790b5b2326be9d7c9ad9e3d9b51a8bfabc62d07"
>> was adding this checking
>>
>> + if (dev ==
On 8.6.2018 15:02, Emmanuel Vadot wrote:
> On Fri, 8 Jun 2018 08:28:02 +0200
> Michal Simek wrote:
>
>> On 4.6.2018 12:21, Luca Ceresoli wrote:
>>> The value of PMUFW_INIT_FILE is prefixed with "$(srctree)/", thus
>>> forcing it to be a relative path inside the U-Boot source tree. Since
>>> the
Follow Linux commit 10b62a2f785a (".gitignore: move *.dtb and *.dtb.S
patterns to the top-level .gitignore").
Signed-off-by: Masahiro Yamada
---
.gitignore | 2 ++
arch/arc/dts/.gitignore| 1 -
arch/arm/dts/.gitignore| 1 -
arch/microblaze/dts/.gitignore | 1
Follow Linux commit 1377dd3e2987 (".gitignore: sort normal pattern
rules alphabetically").
This would allow us to easily catch duplicated patterns if any.
Signed-off-by: Masahiro Yamada
---
.gitignore | 30 +-
1 file changed, 13 insertions(+), 17 deletions(-)
diff
On 06/11/2018 08:01 AM, Bin Meng wrote:
Hi Alex,
On Mon, Jun 11, 2018 at 1:52 PM, Alexander Graf wrote:
On 11.06.18 01:29, Bin Meng wrote:
On Mon, Jun 11, 2018 at 3:16 AM, Alexander Graf wrote:
On 10.06.18 15:25, Bin Meng wrote:
If UEFI BIOS has the graphics output protocol (GOP), let's
Hi Alex,
On Mon, Jun 11, 2018 at 3:34 PM, Alexander Graf wrote:
> On 06/11/2018 08:01 AM, Bin Meng wrote:
>>
>> Hi Alex,
>>
>> On Mon, Jun 11, 2018 at 1:52 PM, Alexander Graf wrote:
>>>
>>>
>>> On 11.06.18 01:29, Bin Meng wrote:
On Mon, Jun 11, 2018 at 3:16 AM, Alexander Graf wrote:
From: Carlo Caione
These patches toghether with the previously submitted patch [0] enable
the chromebook veyron jerry to use the SDMMC interface when U-Boot is
not chainloaded by depthcharge but booted directly from SPI.
[0] https://marc.info/?l=u-boot=152836928803742=2
Changelog:
V2:
- Add
From: Carlo Caione
On the veyron board the vcc33_sd regulator is used as vmmc-supply for
the SD card. This regulator is powered in the MMC core during power on
but its value is never actually set.
In the veyron platform the reset value for the LDO output is 1.8V while
the standard (min and max)
From: Carlo Caione
Use regulators_enable_boot_on() to init all the regulators with
regulator-boot-on property.
Signed-off-by: Carlo Caione
Reviewed-by: Simon Glass
---
arch/arm/mach-rockchip/rk3288-board.c | 6 ++
1 file changed, 6 insertions(+)
diff --git
From: Carlo Caione
The GRF_SOC_CON0.grf_force_jtag bit is automatically set at boot and it
is preventing the SDMMC to work correctly. Disable the JTAG function on
the assumption that a working SD has higher priority over JTAG.
Signed-off-by: Carlo Caione
Reviewed-by: Simon Glass
---
On Sat, Jun 9, 2018 at 5:59 AM, Simon Glass wrote:
> Hi Ley Foon,
>
> On 3 June 2018 at 23:19, Ley Foon Tan wrote:
>> Add reset ctrl to dwmmc socfpga, designware Ethernet and ns16550 serial
>> drivers.
>>
>> A reset property is an optional feature, so only print out a warning and
>> do not fail
On 06/11/2018 09:44 AM, Bin Meng wrote:
Hi Alex,
On Mon, Jun 11, 2018 at 3:34 PM, Alexander Graf wrote:
On 06/11/2018 08:01 AM, Bin Meng wrote:
Hi Alex,
On Mon, Jun 11, 2018 at 1:52 PM, Alexander Graf wrote:
On 11.06.18 01:29, Bin Meng wrote:
On Mon, Jun 11, 2018 at 3:16 AM, Alexander
> On 11 Jun 2018, at 10:08, Carlo Caione wrote:
>
> From: Carlo Caione
>
> On the veyron board the vcc33_sd regulator is used as vmmc-supply for
> the SD card. This regulator is powered in the MMC core during power on
> but its value is never actually set.
>
> In the veyron platform the
> On 11 Jun 2018, at 10:08, Carlo Caione wrote:
>
> From: Carlo Caione
>
> Use regulators_enable_boot_on() to init all the regulators with
> regulator-boot-on property.
>
> Signed-off-by: Carlo Caione
> Reviewed-by: Simon Glass
Reviewed-by: Philipp Tomsich
Acked-by: Philipp Tomsich
> On 11 Jun 2018, at 10:08, Carlo Caione wrote:
>
> From: Carlo Caione
>
> The GRF_SOC_CON0.grf_force_jtag bit is automatically set at boot and it
> is preventing the SDMMC to work correctly. Disable the JTAG function on
> the assumption that a working SD has higher priority over JTAG.
>
>
On Mon, Jun 11, 2018 at 8:09 AM, Michal Simek wrote:
> There is no reason to keep this gpio based code in architecture. Use
> ledtrig-heartbeat.c instead which is much more flexible then this
> ancient code.
>
> Signed-off-by: Michal Simek
Reviewed-by: Linus Walleij
Maybe the arch
Hi Alex,
On Mon, Jun 11, 2018 at 4:33 PM, Alexander Graf wrote:
> On 06/11/2018 09:44 AM, Bin Meng wrote:
>>
>> Hi Alex,
>>
>> On Mon, Jun 11, 2018 at 3:34 PM, Alexander Graf wrote:
>>>
>>> On 06/11/2018 08:01 AM, Bin Meng wrote:
Hi Alex,
On Mon, Jun 11, 2018 at 1:52 PM,
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