Hi Simon,
On Mon, Jun 15, 2020 at 11:57 AM Simon Glass wrote:
>
> This chip is used on coral and we need to generate ACPI tables for sound
> to make it work. Add a driver that does just this (i.e. at present does
> not actually support playing sound).
>
> Signed-off-by: Simon Glass
> ---
>
>
Hi Simon,
On Mon, Jun 15, 2020 at 11:58 AM Simon Glass wrote:
>
> Add information about what is returned on error.
>
> Signed-off-by: Simon Glass
> ---
>
> arch/x86/include/asm/intel_pinctrl.h | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/x86/include/asm/intel_pinctrl.h
>
On Mon, Jun 15, 2020 at 11:58 AM Simon Glass wrote:
>
> Add a Kconfig to control whether pinctrl is represented as a single ACPI
> device or as multiple devices. In the latter case (the default) we should
> return the pin number relative to the pinctrl device.
>
> Signed-off-by: Simon Glass
>
On Mon, Jun 15, 2020 at 11:57 AM Simon Glass wrote:
>
> At present we can query the offset of a pinctrl register within the p2sb.
> For ACPI we need to get the actual address of the register. Add a function
> to handle this and rename the old one to more accurately reflect its
> purpose.
>
>
Hi Simon,
On Mon, Jun 15, 2020 at 11:58 AM Simon Glass wrote:
>
> At present the itss is probed in the ofdata_to_platdata() method. This is
> incorrect since itss is a child of p2sb which itself needs to probe the
> pinctrl device. This means that p2sb is effectively not probed when the
> itss
On 25/06/2020 17.51, Thirupathaiah Annapureddy wrote:
> Currently Verified Boot fails if there is a signature verification failure
> using required key in U-boot DTB. This patch adds support for multiple
> required keys. This means if verified boot passes with one of the required
> keys, u-boot
This patch adds the base dtsi file for the Octeon 3 cn73xx SoC.
Signed-off-by: Stefan Roese
---
(no changes since v1)
MAINTAINERS| 1 +
arch/mips/dts/mrvl,cn73xx.dtsi | 64 ++
2 files changed, 65 insertions(+)
create mode 100644
This patch adds very basic support for the Octeon III SoCs. Only CFI
parallel UART, reset and NOR flash are supported for now.
Please note that the basic Octeon port does not include the DDR3/4
initialization yet. This will be added in some follow-up patches later.
To still use U-Boot on with
This patch adds a UCLASS_SYSRESET sysreset driver for the Octeon SoC
family.
Signed-off-by: Stefan Roese
Reviewed-by: Daniel Schwierzeck
---
(no changes since v1)
drivers/sysreset/Kconfig | 7
drivers/sysreset/Makefile | 1 +
drivers/sysreset/sysreset_octeon.c | 52
Hi Tom
> From: Tom Rini
> Sent: vendredi 26 juin 2020 22:55
>
> On Thu, Jun 25, 2020 at 09:59:52AM +0200, Patrick Delaunay wrote:
>
> > Add the new command 'env select' to force the persistent storage of
> > environment, saved in gd->env_load_prio.
> >
> > Signed-off-by: Patrick Delaunay
>
With commit 0d7c2913fdf7 ("cmd: bootefi: Honor the address & size cells
properties correctly") addr was replaced by fdt_addr. But not in the check
against FDT_ADDR_T_NONE.
Fixes: 0d7c2913fdf7 ("cmd: bootefi: Honor the address & size cells properties
correctly")
Signed-off-by: Heinrich Schuchardt
On 3/20/20 3:10 AM, Lukasz Majewski wrote:
> On Fri, 20 Mar 2020 01:53:16 -0400
> Sean Anderson wrote:
>
>> Some of the debug messages in the clock subsystem can be made more
>> informative by adding the clock name or adding the explicit error.
>>
>> Signed-off-by: Sean Anderson
>> ---
>>
>>
Don't call rtc_mktime() twice with the same argument in
efi_variable_authenticate().
Signed-off-by: Heinrich Schuchardt
---
lib/efi_loader/efi_variable.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/lib/efi_loader/efi_variable.c b/lib/efi_loader/efi_variable.c
index
Hi Simon,
On Mon, Jun 15, 2020 at 11:58 AM Simon Glass wrote:
>
> Implement the method that converts a GPIO into the form used by ACPI, so
> that GPIOs can be added to ACPI tables.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v1:
> - Use acpi_get_path() to get device path
>
>
On Mon, Jun 15, 2020 at 11:58 AM Simon Glass wrote:
>
> Use the new binman memory-mapping function to access the VBT, to simplify
> the code.
>
> Signed-off-by: Simon Glass
> ---
>
> arch/x86/cpu/apollolake/fsp_s.c | 19 +--
> arch/x86/lib/fsp2/fsp_silicon_init.c | 1 +
>
This patch adds the code to copy itself from bootrom location to a
different location (TEXT_BASE) to the Octeon platform. Its used in
this case to copy the complete U-Boot image into L2 cache, which
greatly improves the bootup time - especially in regard to the
very long and complex DDR4 init
This patch adds the optional call to mips_mach_early_init() to start.S
at a very early stage. Its disabled per default. It can be used for
very early machine / platform specific init code. Its called very
early and at this stage the PC is allowed to differ from the linking
address
As Octeon is cache coherent, lets add an empty version of
invalidate_dcache_range(). With this, all global cache functions
are replaced by no-ops on Octeon.
Signed-off-by: Stefan Roese
---
(no changes since v1)
arch/mips/mach-octeon/cache.c | 4
1 file changed, 4 insertions(+)
diff
This patch adds __weak to invalidate_dcache_range() in lib/cache.c. This
makes it possible to overwrite this function by a platforms specific
version, which will be done for Octeon.
Signed-off-by: Stefan Roese
---
(no changes since v1)
arch/mips/lib/cache.c | 2 +-
1 file changed, 1
On Mon, Jun 15, 2020 at 11:58 AM Simon Glass wrote:
>
> The P2SB bus needs to be hidden in some cases so that it does not get
> auto-configured by Linux. Add a method for this.
>
> Signed-off-by: Simon Glass
> ---
>
> drivers/misc/p2sb-uclass.c | 10 ++
> include/p2sb.h | 25
On Mon, Jun 15, 2020 at 11:58 AM Simon Glass wrote:
>
> Add a few of these calls to make it easier to see where an error occurs,
> if CONFIG_LOG_ERROR_RETURN is enabled.
>
> Signed-off-by: Simon Glass
> ---
>
> drivers/i2c/i2c-uclass.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
On Mon, Jun 15, 2020 at 11:58 AM Simon Glass wrote:
>
> Add debugging for a few more values and also use log to show return values
> when something goes wrong. This makes it easier to see the root cause.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v1:
> - Add new patch to improve
On Mon, Jun 15, 2020 at 11:58 AM Simon Glass wrote:
>
> Add support for this new method in the driver and in the fsp-s setup.
>
> Signed-off-by: Simon Glass
> ---
>
> arch/x86/cpu/apollolake/fsp_s.c | 26 +++---
> arch/x86/cpu/intel_common/p2sb.c | 30
On Mon, Jun 15, 2020 at 11:58 AM Simon Glass wrote:
>
> This binding currently has a flags cell but it is not used. Make use of it
> to create ACPI tables for interrupts.
>
> Signed-off-by: Simon Glass
> ---
>
> arch/x86/cpu/acpi_gpe.c | 26 +++
>
On Mon, Jun 15, 2020 at 11:58 AM Simon Glass wrote:
>
> At present this information is used to locate and parse the tables but is
> not stored. Store it so that we can display it to the user, e.g. with the
> 'bdinfo' command.
>
> Signed-off-by: Simon Glass
> ---
>
>
On Mon, Jun 15, 2020 at 11:58 AM Simon Glass wrote:
>
> The comment here applies only to FSP1, so update it.
>
> Signed-off-by: Simon Glass
> ---
>
> arch/x86/cpu/start.S | 1 +
> 1 file changed, 1 insertion(+)
>
Reviewed-by: Bin Meng
Hi Simon,
On Mon, Jun 15, 2020 at 11:58 AM Simon Glass wrote:
>
> This function does not exist anymore. Drop it from the header file.
>
> Signed-off-by: Simon Glass
> ---
>
> arch/x86/include/asm/u-boot-x86.h | 2 --
> 1 file changed, 2 deletions(-)
>
The function is in zimage.c
Hi Simon,
On Mon, Jun 15, 2020 at 11:58 AM Simon Glass wrote:
>
> At present if MP is not enabled (e.g. booting from coreboot) the 'mtrr'
> command does not work correctly. It is not easy to make it work for all
> CPUs, since coreboot has halted them and we would need to start them up
> again,
On Tue, Jun 30, 2020 at 5:31 PM Heinrich Schuchardt wrote:
>
> Replace printf() and debug() by log_err() and log_debug().
>
> "No reserved memory region found in source FDT\n" is not an error but a
> debug information.
>
> %s/can not/cannot/ - use the more common spelling.
>
> Signed-off-by:
Hi Tom,
On 2020/6/30 上午12:00, Tom Rini wrote:
On Sun, Jun 28, 2020 at 06:20:52PM +0800, Kever Yang wrote:
pycrypto is needed for script to generate correct its.
Signed-off-by: Kever Yang
---
.gitlab-ci.yml | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
This patchset improves the Octeon base support by adding a very early
copy of the U-Boot image from bootspace (e.g. parallel NOR CFI flash)
to the L2 cache and continue execution there.
This is done by introducing the optional hook mips_mach_early_init() to
start.S for very early machine
Change the linking address (TEXT_BASE) to point to the L2 cache. This
way, mips_mach_early_init() will copy itself into L2 cache and run from
there to improve the bootup speed.
Also CONFIG_MIPS_CACHE_SETUP needs to be disabled, as now the cache is
used at this time and can't be resetted.
On 30.06.20 00:08, Daniel Schwierzeck wrote:
This patch adds the code to copy itself from bootrom location to a
different location (TEXT_BASE) to the Octeon platform. Its used in
this case to copy the complete U-Boot image into L2 cache, which
greatly improves the bootup time - especially in
Hi Beniamino,
On Wed, 6 May 2020 at 01:53, Beniamino Galvani wrote:
>
> Hi,
>
> these two patches add initial u-boot support for Hardkernel ODROID-C4.
>
> https://wiki.odroid.com/odroid-c4/odroid-c4
>
> Beniamino Galvani (2):
> arm: dts: import ODROID-C4 device tree
> boards: amlogic: add
On Mon, Jun 15, 2020 at 11:58 AM Simon Glass wrote:
>
> Generation of this table can fail, so update the function to return an
> error code.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v1:
> - Add new patch to add error checking for csrt table generation
>
> arch/x86/lib/acpi_table.c |
On Mon, Jun 15, 2020 at 11:58 AM Simon Glass wrote:
>
> Writing tables is currently pretty opaque. Add a bit of debugging to the
> process so we can see what tables are written and where they start/end in
> memory.
>
> Signed-off-by: Simon Glass
> ---
>
> arch/x86/lib/tables.c | 38
Hi Simon,
On Mon, Jun 15, 2020 at 11:58 AM Simon Glass wrote:
>
> The FSP-S changes the ITSS priorities. The code that tries to save it
> before running FSP-S and restore it afterwards does not work as U-Boot
> relocates in between the save and restore. This means that the driver
> data saved
Hi Simon,
On Mon, Jun 15, 2020 at 11:58 AM Simon Glass wrote:
>
> These registers need to be accesses from ACPI code, so move them to the
> header file.
>
I don't think these are common offset to every platform.
> Signed-off-by: Simon Glass
> ---
>
> drivers/power/acpi_pmc/acpi-pmc-uclass.c
On Mon, Jun 15, 2020 at 11:58 AM Simon Glass wrote:
>
> This confuses Linux's PCI probing so needs to be hidden when booting
> Linux. Add a remove() method to handle this.
>
> Signed-off-by: Simon Glass
> ---
>
> arch/x86/cpu/intel_common/p2sb.c | 14 ++
> 1 file changed, 14
CONFIG_ENV_OVERWRITE disable write protection on various environment
variables like "ethaddr" and "serial".
Define the config in LS1046A and LS1012A common header as both of them
require this entry. Also, resolve an error while setting multiple values
of "ethaddr" variable.
Before the change:
=>
From: Aaron Williams
This patch adds very basic support for the Octeon III SoCs. Only
CFI parallel NOR flash and UART is supported for now.
Please note that the basic Octeon port does not include the DDR3/4
initialization yet. This will be added in some follow-up patches
later. To still use
This patch adds very basic minimal support for the Marvell Octeon 3
CN73xx based EBB7304 EVK. Please note that the basic Octeon port does
not support DDR3/4 initialization yet. To still use U-Boot on with this
port, the L2 cache (4MiB) is used as RAM. This way, U-Boot can boot
to the prompt on
Hi,
This patch series introduces UCLASS_SOC to be used for SOC identification and
attribute matching based on SoC ID info. This allows drivers to be
provided for SoCs to retrieve SoC identifying information and also for matching
device attributes for selecting SoC specific data. This is intended
From: Jaiprakash Singh
Signed-off-by: Jaiprakash Singh
---
arch/arm/cpu/armv7/ls102xa/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/cpu/armv7/ls102xa/Kconfig
b/arch/arm/cpu/armv7/ls102xa/Kconfig
index 937989b..ba0731d 100644
--- a/arch/arm/cpu/armv7/ls102xa/Kconfig
+++
Introduce UCLASS_SOC to be used for SOC identification and attribute
matching based on the SoC ID info. This allows drivers to be provided
for SoCs to retrieve SoC identifying information and also for matching
device attributes for selecting SoC specific data.
This is useful for other device
Enable CONFIG_SOC_DEVICE and CONFIG_SOC_DEVICE_TI_K3 so the TI K3 SoC
driver can be used for SoC detection.
Signed-off-by: Dave Gerlach
---
configs/am65x_evm_a53_defconfig| 2 ++
configs/am65x_evm_r5_defconfig | 2 ++
configs/am65x_hs_evm_a53_defconfig | 2 ++
Add a sandbox SOC driver, and some tests for the SOC uclass.
Signed-off-by: Dave Gerlach
---
arch/sandbox/dts/test.dts | 4 +
configs/sandbox64_defconfig| 1 +
configs/sandbox_defconfig | 1 +
configs/sandbox_flattree_defconfig | 1 +
Make use of UCLASS_SOC to find device family and revision for
print_cpuinfo.
Signed-off-by: Dave Gerlach
---
arch/arm/mach-k3/common.c| 48 ++--
arch/arm/mach-k3/include/mach/hardware.h | 1 -
2 files changed, 19 insertions(+), 30 deletions(-)
diff --git
Enable CONFIG_SOC_DEVICE and CONFIG_SOC_DEVICE_TI_K3 so the TI K3 SoC
driver can be used for SoC detection.
Signed-off-by: Dave Gerlach
---
configs/j721e_evm_a72_defconfig| 2 ++
configs/j721e_evm_r5_defconfig | 2 ++
configs/j721e_hs_evm_a72_defconfig | 2 ++
Introduce a chipid node to provide a UCLASS_SOC driver to identify TI K3
SoCs.
Signed-off-by: Dave Gerlach
---
arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi | 4
arch/arm/dts/k3-j721e-mcu-wakeup.dtsi | 5 +
2 files changed, 9 insertions(+)
diff --git
Introduce an soc_ti_k3_driver that allows identification and selection
of SoC specific data based on the JTAG ID register for device
identification, as described for AM65x[0] and J721E[1] devices.
[0] http://www.ti.com/lit/ug/spruid7e/spruid7e.pdf
[1]
Introduce a chipid node to provide a UCLASS_SOC driver to identify TI K3
SoCs.
Signed-off-by: Dave Gerlach
---
arch/arm/dts/k3-am65-wakeup.dtsi | 5 +
arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 4
2 files changed, 9 insertions(+)
diff --git
On Mon, Jun 15, 2020 at 11:58 AM Simon Glass wrote:
>
> This function sounds like something that is called when U-Boot is about to
> jump to Linux. In fact it is an init function.
>
> Rename it to reduce confusion.
>
> Signed-off-by: Simon Glass
> ---
>
> arch/x86/cpu/coreboot/coreboot.c | 4
Hi Simon,
On Mon, Jun 15, 2020 at 11:58 AM Simon Glass wrote:
>
> This should ideally be used by all x86 boards in U-Boot. Enable it by
> default. If some boards don't use it, the cost is small.
>
> Signed-off-by: Simon Glass
> ---
>
> arch/Kconfig | 1 +
> 1 file changed, 1 insertion(+)
>
>
On Mon, Jun 15, 2020 at 11:58 AM Simon Glass wrote:
>
> Currently U-Boot implements version 2 but reports version 4. Correct it.
>
> Signed-off-by: Simon Glass
> ---
>
> arch/x86/lib/acpi_table.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
Reviewed-by: Bin Meng
On 30.06.20 00:34, Daniel Schwierzeck wrote:
Am Freitag, den 19.06.2020, 15:44 +0200 schrieb Stefan Roese:
From: Aaron Williams
This patch adds very basic support for the Octeon III SoCs. Only
CFI parallel NOR flash and UART is supported for now.
Please note that the basic Octeon port does
Replace printf() and debug() by log_err() and log_debug().
"No reserved memory region found in source FDT\n" is not an error but a
debug information.
%s/can not/cannot/ - use the more common spelling.
Signed-off-by: Heinrich Schuchardt
---
v2:
define the log category as LOGC_ARCH
The r8a774a1 is compatible with the generic rcar-gen3-sdhi controller.
This patch adds the compatibilty flag, to support the SDHI controller.
Signed-off-by: Adam Ford
---
V3: Use generic rcar-gen3-sdhi reference instead of SoC reference
V2: No Change
diff --git a/drivers/mmc/renesas-sdhi.c
The R8A774A1 (RZ/G2M) a commercial SoC based off the automotive
R8A7796 SoC.
This series will start the foundation to support this SoC by importing
porting the device tree and bindings from Linux 5.8-rc2 along with clock
clock driver tables, enable pinctrl driver, and add generic
rcar-gen3
The PFC tables for the R8A774A1 are already available, but they
not enabled.
This patch adds the Kconfig option and builds the corresponding file
when PINCTRL_PFC_R8A774A1 is enabled.
Signed-off-by: Adam Ford
---
V3: Reorder references to R8A774A1 to more closely match Linux's order
V2: Use
This patch imports the device tree and required bindings to permit
the device tree to build for the R8Z774A1 (RZ/G2M).
Signed-off-by: Adam Ford
---
V3: No change
V2: No change
diff --git a/arch/arm/dts/r8a774a1.dtsi b/arch/arm/dts/r8a774a1.dtsi
new file mode 100644
index
This sync's the clock tables with the official release from
Linux 5.8-RC2 and update r8a774a1_mstp_table from Ref Manual
v1.00.
Signed-off-by: Adam Ford
---
V3: Use clock tables from Linux instead of Renesas' U-Boot repo
Fix the r8a774a1_mstp_table to match ref manual v1.00
V2: No Change
On Thu, Jun 04, 2020 at 11:11:51PM +0800, Zhiqiang Hou wrote:
> From: Lukasz Majewski
>
> This patch fixes issue with defining the DM_SPI_FLASH in the
> configs/include/ instead of enabling this option in Kconfig.
>
> The problem is that CONFIG_IS_ENABLED(DM_SPI_FLASH) shows false as there
>
On Thu, Jun 04, 2020 at 11:11:53PM +0800, Zhiqiang Hou wrote:
> From: Lukasz Majewski
>
> This change allows more fine tuning of driver model based SPI support in
> SPL and TPL. It is now possible to explicitly enable/disable the DM_SPI
> support in SPL and TPL via Kconfig option.
>
> Before
On Tue, Jun 16, 2020 at 07:06:02PM -0400, Tom Rini wrote:
> This converts the following to Kconfig:
>CONFIG_ARCH_MISC_INIT
>
> Signed-off-by: Tom Rini
Applied to u-boot/next, thanks!
--
Tom
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Description: PGP signature
On Tue, Jun 16, 2020 at 07:06:01PM -0400, Tom Rini wrote:
> This converts the following to Kconfig:
>CONFIG_AM335X_LCD
>
> Signed-off-by: Tom Rini
Applied to u-boot/next, thanks!
--
Tom
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Description: PGP signature
On Thu, Jun 04, 2020 at 11:11:52PM +0800, Zhiqiang Hou wrote:
> From: Lukasz Majewski
>
> This patch moves the CONFIG_DM_SPI_FLASH and CONFIG_SPI_FLASH_DATAFLASH
> to be defined in Kconfig, not in board specific header file
> (include/configs/.h).
>
> Before this change the CONFIG_DM_SPI_FLASH
On Tue, Jun 16, 2020 at 07:06:07PM -0400, Tom Rini wrote:
> This converts the following to Kconfig:
>CONFIG_ATMEL_NAND_HW_PMECC
>CONFIG_ATMEL_NAND_HWECC
>CONFIG_NAND_ATMEL
>CONFIG_PMECC_CAP
>CONFIG_PMECC_SECTOR_SIZE
>
> Signed-off-by: Tom Rini
Applied to u-boot/next,
On Tue, Jun 16, 2020 at 07:06:03PM -0400, Tom Rini wrote:
> This converts the following to Kconfig:
>CONFIG_ARM_PL180_MMCI
>
> Signed-off-by: Tom Rini
Applied to u-boot/next, thanks!
--
Tom
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On Tue, Jun 16, 2020 at 07:06:06PM -0400, Tom Rini wrote:
> This converts the following to Kconfig:
>CONFIG_ATMEL_HLCD
>
> Signed-off-by: Tom Rini
Applied to u-boot/next, thanks!
--
Tom
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On Tue, Jun 16, 2020 at 07:06:08PM -0400, Tom Rini wrote:
> This converts the following to Kconfig:
>CONFIG_ATMEL_USART
>
> Signed-off-by: Tom Rini
Applied to u-boot/next, thanks!
--
Tom
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Description: PGP signature
On Tue, Jun 16, 2020 at 07:06:05PM -0400, Tom Rini wrote:
> This converts the following to Kconfig:
>CONFIG_AT91_GPIO
>
> Signed-off-by: Tom Rini
Applied to u-boot/next, thanks!
--
Tom
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Description: PGP signature
On Tue, Jun 30, 2020 at 01:08:34PM +0800, Ran Wang wrote:
> commit 0cfccb54014b ("configs: Resync with savedefconfig")
> removed CONFIG_USB_STORAGE from some powerpc platforms' defconfig
> files, whicih would block the use case of system loading rootfs
> from USB drives, add them back.
>
>
On Tue, Jun 30, 2020 at 2:52 PM Tom Rini wrote:
>
> On Mon, Jun 29, 2020 at 08:05:15PM -0400, Tom Rini wrote:
> > On Tue, Jun 30, 2020 at 01:10:53AM +0200, Daniel Schwierzeck wrote:
> >
> > > Hi Tom,
> > >
> > > actually I wanted to send this much earlier but I hope it's still okay.
> > >
> > >
On Fri, Jun 19, 2020 at 12:45:50PM +0200, Heiko Stuebner wrote:
> From: Heiko Stuebner
>
> If the newly added fit-generator key-options are found, append needed
> signature nodes to all generated image blocks, so that they can get
> signed when mkimage later compiles the .itb from the generated
On 6/30/20 2:49 PM, Heiko Stübner wrote:
> Am Donnerstag, 18. Juni 2020, 16:23:21 CEST schrieb Heiko Stuebner:
>> From: Heiko Stuebner
>>
>> While the SPL may want to do signature checking this won't be
>> the case for TPL in all cases, as TPL is mostly used when the
>> amount of initial memory
Quoting Ye Li from NXP:
"We have confirmed with PMIC team, 0x35 is used only on early chips
and not used any more. 0x25 is the final address."
Fix it by merging power_pca9450a_init and power_pca9450b_init into one
function power_pca9450_init.
Signed-off-by: Sébastien Szymanski
---
On Tue, Jun 30, 2020 at 02:46:51PM +0200, Heiko Stübner wrote:
> Hi Tom,
>
> Am Dienstag, 30. Juni 2020, 14:36:40 CEST schrieb Tom Rini:
> > On Fri, Jun 19, 2020 at 12:45:50PM +0200, Heiko Stuebner wrote:
> >
> > > From: Heiko Stuebner
> > >
> > > If the newly added fit-generator key-options
On Tue, Jun 30, 2020 at 05:17:54PM +0800, Kever Yang wrote:
> Hi Tom,
>
> On 2020/6/30 上午12:00, Tom Rini wrote:
> > On Sun, Jun 28, 2020 at 06:20:52PM +0800, Kever Yang wrote:
> >
> > > pycrypto is needed for script to generate correct its.
> > >
> > > Signed-off-by: Kever Yang
> > > ---
> > >
Hi Tom,
Am Dienstag, 30. Juni 2020, 14:36:40 CEST schrieb Tom Rini:
> On Fri, Jun 19, 2020 at 12:45:50PM +0200, Heiko Stuebner wrote:
>
> > From: Heiko Stuebner
> >
> > If the newly added fit-generator key-options are found, append needed
> > signature nodes to all generated image blocks, so
The Beacon EmbeddedWorks kit is based on the R8A774A1 SoC also
known as the RZ/G2M.
The kit consists of a SOM + Baseboard and supports microSD,
eMMC, Ethernet, a couple celular radios, two CAN interfaces,
Bluetooth and WiFi.
Signed-off-by: Adam Ford
---
V3: Remove unnecessary/unwanted code
On Tue, Jun 16, 2020 at 07:06:26PM -0400, Tom Rini wrote:
> While in most cases CSF_SIZE is handled via Kconfig we have some i.MX8M
> platforms that set the size based on the now-renamed CONFIG_SECURE_BOOT
> symbol. Update things so that CSF_SIZE itself depends on IMX_HAB being
> enabled and
On Tue, Jun 16, 2020 at 07:06:24PM -0400, Tom Rini wrote:
> There are a few remaining places where we say CONFIG_SECURE_BOOT rather
> than CONFIG_IMX HAB. Update these instances.
>
> Cc: Stefano Babic
> Cc: Fabio Estevam
> Cc: NXP i.MX U-Boot Team
> Cc: Eddy Petrișor
> Cc: Shawn Guo
> Cc:
On Tue, Jun 16, 2020 at 07:06:25PM -0400, Tom Rini wrote:
> There are two remaining users of the CONFIG_SECURE_BOOT symbol that have
> not been migrated to another symbol. In this case, they should be using
> CONFIG_NXP_ESBC as their guard.
>
> Cc: Vladimir Oltean
> Fixes: 5536c3c9d0d1
On Tue, Jun 16, 2020 at 07:06:28PM -0400, Tom Rini wrote:
> This variable is unset anywhere and only unset on a number of platforms.
> Remove all relevant code.
>
> Signed-off-by: Tom Rini
Applied to u-boot/next, thanks!
--
Tom
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On Mon, May 20, 2019 at 02:44:55AM +0200, Marcel Ziswiler wrote:
> Clean-up platform data include file by using BIT macro and converting
> indentation with spaces to tabs.
>
> Signed-off-by: Marcel Ziswiler
Applied to u-boot/next, thanks!
--
Tom
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On Tue, Jun 16, 2020 at 07:06:27PM -0400, Tom Rini wrote:
> This converts the following to Kconfig:
>CONFIG_BOOTM_NETBSD
>
> Signed-off-by: Tom Rini
Applied to u-boot/next, thanks!
--
Tom
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On Mon, May 20, 2019 at 02:44:53AM +0200, Marcel Ziswiler wrote:
> Add missing space before a comment delimiter.
>
> Signed-off-by: Marcel Ziswiler
> Reviewed-by: Peng Fan
> Reviewed-by: Igor Opaniuk
Applied to u-boot/next, thanks!
--
Tom
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On Tue, Jun 16, 2020 at 07:06:23PM -0400, Tom Rini wrote:
> This converts the following to Kconfig:
>CONFIG_CONSOLE_SCROLL_LINES
>
> Signed-off-by: Tom Rini
Applied to u-boot/next, thanks!
--
Tom
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On Tue, Jun 16, 2020 at 07:06:22PM -0400, Tom Rini wrote:
> This converts the following to Kconfig:
>CONFIG_CONSOLE_MUX
>
> Cc: Igor Opaniuk
> Signed-off-by: Tom Rini
> Reviewed-by: Igor Opaniuk
Applied to u-boot/next, thanks!
--
Tom
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On Tue, Jun 16, 2020 at 07:06:21PM -0400, Tom Rini wrote:
> This converts the following to Kconfig:
>CONFIG_CONS_INDEX
>
> Signed-off-by: Tom Rini
Applied to u-boot/next, thanks!
--
Tom
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On Tue, Jun 16, 2020 at 07:06:20PM -0400, Tom Rini wrote:
> This converts the following to Kconfig:
>CONFIG_CMDLINE_EDITING
>
> Signed-off-by: Tom Rini
Applied to u-boot/next, thanks!
--
Tom
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On Tue, Jun 16, 2020 at 07:06:19PM -0400, Tom Rini wrote:
> This converts the following to Kconfig:
>CONFIG_BUILD_TARGET
>
> Signed-off-by: Tom Rini
Applied to u-boot/next, thanks!
--
Tom
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On Tue, Jun 16, 2020 at 07:06:18PM -0400, Tom Rini wrote:
> This converts the following to Kconfig:
>CONFIG_BOUNCE_BUFFER
>
> Signed-off-by: Tom Rini
Applied to u-boot/next, thanks!
--
Tom
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On Tue, Jun 16, 2020 at 07:06:16PM -0400, Tom Rini wrote:
> This converts the following to Kconfig:
>CONFIG_BOOTDELAY
>
> Cc: Holger Brunck
> Signed-off-by: Tom Rini
Applied to u-boot/next, thanks!
--
Tom
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On Tue, Jun 16, 2020 at 07:06:13PM -0400, Tom Rini wrote:
> This converts the following to Kconfig:
>CONFIG_BCH
>
> Signed-off-by: Tom Rini
Applied to u-boot/next, thanks!
--
Tom
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On Tue, Jun 16, 2020 at 07:06:14PM -0400, Tom Rini wrote:
> This converts the following to Kconfig:
>CONFIG_BOARD_TYPES
>
> Signed-off-by: Tom Rini
Applied to u-boot/next, thanks!
--
Tom
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On Tue, Jun 16, 2020 at 07:06:15PM -0400, Tom Rini wrote:
> This converts the following to Kconfig:
>CONFIG_BOOTCOUNT_ENV
>CONFIG_BOOTCOUNT_LIMIT
>
> Cc: Anatolij Gustschin
> Signed-off-by: Tom Rini
Applied to u-boot/next, thanks!
--
Tom
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On Tue, Jun 16, 2020 at 07:06:17PM -0400, Tom Rini wrote:
> This converts the following to Kconfig:
>CONFIG_BOOTP_DNS2
>CONFIG_BOOTP_PXE_CLIENTARCH
>
> Signed-off-by: Tom Rini
Applied to u-boot/next, thanks!
--
Tom
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Hi,
On 30/06/2020 13:33, Anand Moon wrote:
> Hi Beniamino,
>
> On Wed, 6 May 2020 at 01:53, Beniamino Galvani wrote:
>>
>> Hi,
>>
>> these two patches add initial u-boot support for Hardkernel ODROID-C4.
>>
>> https://wiki.odroid.com/odroid-c4/odroid-c4
>>
>> Beniamino Galvani (2):
>> arm:
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