Add basic board support for the Kontron SMARC-sAL28 board. Please note,
that this board doesn't support TF-a (yet). Therefore, the u-boot SPL is
the first code which is run and it has to set up the RAM.
changes since v6:
- moved README to doc/board/kontron/sl28.rst
- added device tree files to
Hi Y.b
> Subject: RE: [v4, 00/11] mmc: fsl_esdhc: support eMMC HS200/HS400 modes
>
> Hi Jaehoon and Peng,
>
> Any comments on the v4 patch-set?
Sorry for late. I need postpone the pick up this patchset until next.
I'll give a check, if no issues, I'll pick this into next branch.
Thanks,
Peng.
On Mon, Sep 7, 2020 at 3:14 PM Chunfeng Yun wrote:
>
> Use macros with parameter to fill ep_info2, then some macros
> for MASK and SHIFT can be removed
>
> Signed-off-by: Chunfeng Yun
> ---
> v3: merge patch [v2 9/11] and [v2 10/11] into one, both for ep_info2
>
> v2: no changes
> ---
>
On Mon, Sep 7, 2020 at 3:14 PM Chunfeng Yun wrote:
>
> For normal TRB fields:
> use TRB_LEN(x) instead of ((x) & TRB_LEN_MASK);
> and use TRB_INTR_TARGET(x) instead of
> (((x) & TRB_INTR_TARGET_MASK) << TRB_INTR_TARGET_SHIFT)
>
> Signed-off-by: Chunfeng Yun
> ---
> v3: merge patch [v2 6/11] and
On Mon, Sep 7, 2020 at 3:14 PM Chunfeng Yun wrote:
>
> Use TRB_TX_TYPE() instead of (TRB_DATA_OUT/IN << TRB_TX_TYPE_SHIFT)
>
> Signed-off-by: Chunfeng Yun
> ---
> v2: no changes
> ---
> drivers/usb/host/xhci-ring.c | 4 ++--
> include/usb/xhci.h | 1 -
> 2 files changed, 2
This allows code to use a construct like `if (gd & gd->...) { ... }` when
accessing the global data pointer. Without this change, it was possible for
a very early trap to cause _exit_trap to read arbitrary memory. This could
cause a second trap, preventing show_regs from being printed.
Fixes:
Without these fences, it is perfectly valid for an out-of-order core to
re-order memory accesses to outside of the available_harts_lock critical
section.
Signed-off-by: Sean Anderson
---
arch/riscv/cpu/start.S | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git
This adds comments regarding the ordering and purpose of certain
instructions as I understand them.
Signed-off-by: Sean Anderson
---
arch/riscv/cpu/start.S | 19 +--
1 file changed, 17 insertions(+), 2 deletions(-)
diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S
No timer drivers return an error from get_count. Instead of possibly
returning an error, just return the count directly.
Signed-off-by: Sean Anderson
---
Passing CI (but not otherwise tested):
https://dev.azure.com/seanga2/u-boot/_build/results?buildId=25=results
This patch depends on
Hey all,
It's release day and I'm getting this one out on schedule again. With
this release, I'm also opening up -next and will start by testing the
NR_DRAM_BANKS PR and go from there on other series that are in my TODO
list.
Once again, for a changelog,
git log --merges
Hi Simon,
On 6/9/20 22:44, Simon Glass wrote:
Hi Walter,
On Fri, 7 Aug 2020 at 11:23, Walter Lozano wrote:
Hi Simon
On 7/8/20 13:23, Simon Glass wrote:
Hi Walter,
On Wed, 29 Jul 2020 at 10:00, Walter Lozano wrote:
Hi Simon,
On 28/7/20 23:42, Simon Glass wrote:
Hi Walter,
On Sun, 26
On Wed, Jun 24, 2020 at 06:03:11PM +0200, Marek Behún wrote:
> From: Qu Wenruo
>
> This version of btrfs_file_read() has the following new features:
> - Tries all mirrors
> - More handling on unaligned size
> - Better compressed extent handling
> The old implementation doesn't handle
On Tue, Sep 08, 2020 at 08:26:27AM +0800, Qu Wenruo wrote:
>
>
> On 2020/9/8 上午6:35, Tom Rini wrote:
> > On Wed, Jun 24, 2020 at 06:03:11PM +0200, Marek Behún wrote:
> >
> >> From: Qu Wenruo
> >>
> >> This version of btrfs_file_read() has the following new features:
> >> - Tries all mirrors
>
Add basic support for the Kontron SMARC-sAL28 board. This includes just
the bare minimum to be able to bring up the board and boot linux.
For now, the Single and Dual PHY variant is supported. Other variants
will fall back to the basic variant.
In particular, there is no watchdog support for
The board supports 16 configuration bits which can be manipulated with
this command. See the board's README for a detailed explanation on each
bit.
Signed-off-by: Michael Walle
---
board/kontron/sl28/Makefile | 2 +-
board/kontron/sl28/cmds.c | 178
2
Check hw and hw->dev before dereference it.
Signed-off-by: Claudiu Beznea
Reviewed-by: Simon Glass
---
drivers/clk/clk.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
index 786f4e887e7a..319808d433f5 100644
--- a/drivers/clk/clk.c
+++
In common clock framework the relation b/w parent and child clocks is
determined based on the udevice parent/child information. A clock
parent could be changed based on devices needs. In case this is happen
the functionalities for clock who's parent is changed are broken. Add
a function that
On Wed, Jun 24, 2020 at 06:02:49PM +0200, Marek Behún wrote:
> From: Qu Wenruo
>
> This patch uses generic code from btrfs-progs to read one super block
> from block device.
[snip]
> +/* Provide a compatibility layer to make code syncing easier */
> +
> +/* A simple wraper to for error() used
On Wed, Aug 26, 2020 at 09:31:07AM +0200, Stefan Roese wrote:
> Hi Tom,
>
> I've prepared a branch for you to pull the "Remove CONFIG_NR_DRAM_BANKS
> option and bi_memstart/memsize from bd_info" patchset, if you care to
> pull from it. I've rebased it on top of latest TOT, which was necessary
>
From: Cameron Nemo
On the Pinebook Pro, and perhaps some other boards, the mmc indices are
opposite from what is implied by the comment in
include/configs/rockchip-common.h.
This commit fixes the boot ordering to prioritize the SD card over eMMC.
I am not sure if this appropriate for the
Add master clock (MCK1..MCK4) support for SAMA7G5. SAMA7G5's PMC has
multiple master clocks feeding different subsystems. One of them
feeds image subsystem and is changeable based on image subsystem
needs.
Signed-off-by: Claudiu Beznea
---
drivers/clk/at91/clk-master.c | 178
Add clock support for SAMA7G5.
Signed-off-by: Claudiu Beznea
---
drivers/clk/at91/Makefile |1 +
drivers/clk/at91/sama7g5.c | 1401
2 files changed, 1402 insertions(+)
create mode 100644 drivers/clk/at91/sama7g5.c
diff --git
Add clk-programmable driver compatible with common clock framework.
Signed-off-by: Claudiu Beznea
---
drivers/clk/at91/Makefile | 2 +-
drivers/clk/at91/clk-programmable.c | 208
drivers/clk/at91/pmc.h | 17 +++
3 files changed, 226
Add clk-system driver compatible with common clock framework.
Signed-off-by: Claudiu Beznea
---
drivers/clk/at91/Makefile | 2 +-
drivers/clk/at91/clk-system.c | 112 ++
drivers/clk/at91/pmc.h| 3 ++
3 files changed, 116 insertions(+), 1
Add clk-peripheral compatible with common clock framework.
Signed-off-by: Claudiu Beznea
---
drivers/clk/at91/Makefile | 2 +
drivers/clk/at91/clk-peripheral.c | 254 ++
drivers/clk/at91/pmc.h| 16 +++
3 files changed, 272 insertions(+)
Add generic clock ops to be used by every AT91 PMC driver
built on top of CCF.
Signed-off-by: Claudiu Beznea
---
drivers/clk/at91/pmc.c | 71 ++
drivers/clk/at91/pmc.h | 2 ++
2 files changed, 73 insertions(+)
diff --git a/drivers/clk/at91/pmc.c
Add clk-generic driver compatible with common clock framework.
Signed-off-by: Claudiu Beznea
---
drivers/clk/at91/Makefile | 1 +
drivers/clk/at91/clk-generic.c | 202 +
drivers/clk/at91/pmc.h | 6 ++
3 files changed, 209 insertions(+)
Add clk-utmi driver compatible with common clock framework.
Signed-off-by: Claudiu Beznea
---
drivers/clk/at91/Makefile | 1 +
drivers/clk/at91/clk-utmi.c | 165
drivers/clk/at91/pmc.h | 3 +
3 files changed, 169 insertions(+)
create mode
On Mon, Sep 07, 2020 at 05:58:14PM +0200, Heinrich Schuchardt wrote:
> Hello Takahiro,
>
> on the 32bit Wandboard (with i.mx6 CPU) running the lib_asn1_pkcs7 unit
> test results in a crash due to an unaligned access occurring when
> br_i32_decode() is called by rsa_gen_key_prop().
Some guy has
> -Original Message-
> From: Tan, Ley Foon
> Sent: Tuesday, August 25, 2020 10:27 AM
> To: u-boot@lists.denx.de
> Cc: Joe Hershberger ; Ley Foon Tan
> ; See, Chin Liang ; Tan,
> Ley Foon
> Subject: [PATCH 0/3] net: tftp: Fixes for tftp rollover
>
> This patch series fix the tftp
Add clk-main driver compatible with common clock framework.
Signed-off-by: Claudiu Beznea
---
drivers/clk/at91/Makefile | 2 +-
drivers/clk/at91/clk-main.c | 387
drivers/clk/at91/pmc.h | 10 ++
3 files changed, 398 insertions(+), 1
Move clock code to compat.c to allow switching to CCF
without mixing CCF code with non CCF code. This prepares the
field for next commits.
Signed-off-by: Claudiu Beznea
---
drivers/clk/at91/Makefile | 13 +-
drivers/clk/at91/clk-generated.c | 178 ---
Add sam9x60-pll driver compatible with common clock framework.
Signed-off-by: Claudiu Beznea
---
drivers/clk/at91/Kconfig | 7 +
drivers/clk/at91/Makefile | 1 +
drivers/clk/at91/clk-sam9x60-pll.c | 442 +
drivers/clk/at91/pmc.h
Add clk-master driver compatible with common clock framework.
Signed-off-by: Claudiu Beznea
---
drivers/clk/at91/Makefile | 2 +-
drivers/clk/at91/clk-master.c | 156 ++
drivers/clk/at91/pmc.h| 21 ++
3 files changed, 178 insertions(+),
Add UTMI support for SAMA7G5. SAMA7G5's UTMI control is done via
XTALF register. Values written at bits 2..0 in this register
correspond to the on board crystal oscillator frequency.
Signed-off-by: Claudiu Beznea
---
drivers/clk/at91/clk-utmi.c | 71 -
On Mon, 7 Sep 2020 18:26:04 -0400
Tom Rini wrote:
> On Wed, Jun 24, 2020 at 06:02:49PM +0200, Marek Behún wrote:
>
> > From: Qu Wenruo
> >
> > This patch uses generic code from btrfs-progs to read one super block
> > from block device.
> [snip]
> > +/* Provide a compatibility layer to make
On 2020/9/8 上午6:35, Tom Rini wrote:
> On Wed, Jun 24, 2020 at 06:03:11PM +0200, Marek Behún wrote:
>
>> From: Qu Wenruo
>>
>> This version of btrfs_file_read() has the following new features:
>> - Tries all mirrors
>> - More handling on unaligned size
>> - Better compressed extent handling
>>
On 2020/9/8 上午8:56, Tom Rini wrote:
> On Tue, Sep 08, 2020 at 08:26:27AM +0800, Qu Wenruo wrote:
>>
>>
>> On 2020/9/8 上午6:35, Tom Rini wrote:
>>> On Wed, Jun 24, 2020 at 06:03:11PM +0200, Marek Behún wrote:
>>>
From: Qu Wenruo
This version of btrfs_file_read() has the following
On Mon, Sep 7, 2020 at 3:14 PM Chunfeng Yun wrote:
>
> Use readx_poll_sleep_timeout() to poll the register status
>
> Signed-off-by: Chunfeng Yun
> ---
> v3: no changes
>
> v2: fix typo of title suggested by Frank
> ---
> drivers/usb/host/xhci.c | 25 +++--
> 1 file changed,
Clearing MIP doesn't do anything. Whoops. The following commits should
tackle this problem in a more robust manner.
This reverts commit 9472630337e7c4ac442066b5a752aaa8c3b4d4a6.
Signed-off-by: Sean Anderson
---
arch/riscv/cpu/start.S | 2 --
1 file changed, 2 deletions(-)
diff --git
Some IPIs may already be pending when U-Boot is started. This could be a
problem if a secondary hart tries to handle an IPI before the boot hart has
initialized the IPI device.
This commit uses NULL as a sentinel for secondary harts so they know when
the IPI is initialized, and it is safe to use
Without a matching barrier on the write side, the barrier in handle_ipi
does nothing. It was entirely possible for the boot hart to write to addr,
arg0, and arg1 *after* sending the IPI, because there was no barrier on the
sending side.
Fixes: 90ae28143700bae4edd23930a7772899ad259058
On the K210, the prior stage bootloader does not clear IPIs. This presents
a problem, because U-Boot up until this point assumes (with one exception)
that IPIs are cleared when it starts. This series attempts to fix this in a
robust manner, and fix several concurrency bugs I noticed while fixing
Even though we no longer call smp_function if an IPI was not sent by
U-Boot, we still need to clear any IPIs which were pending from the
execution environment. Otherwise, secondary harts will busy-wait in
secondary_hart_loop, instead of relaxing.
Signed-off-by: Sean Anderson
---
Add sckc driver compatible with common clock framework. Driver
implements slow clock support for SAM9X60 compatible IPs (in this
list it is also present SAMA7G5's slow clock IP).
Signed-off-by: Claudiu Beznea
---
drivers/clk/at91/Makefile | 2 +-
drivers/clk/at91/sckc.c | 172
Add helper for clock drivers. These will be used by following
commits in the process of switching AT91 clock drivers to CCF.
Signed-off-by: Claudiu Beznea
---
drivers/clk/at91/pmc.c | 91 ++
drivers/clk/at91/pmc.h | 13
2 files changed,
Add pre-requisite headers for AT91 clock architecture. These
are based on already present files on Linux and will be used
by following commits for AT91 CCF clock drivers.
Signed-off-by: Claudiu Beznea
---
include/dt-bindings/clk/at91.h | 22
include/linux/clk/at91_pmc.h | 247
The purpose of this series is to add clock support for SAMA7G5.
Along with this, clock drivers were switched to CCF and aligned
with their corresponding versions present in Linux.
Some changes were done for CCF, patches 1, 3, 4, 5 (I don't know
if they were as is by intention of a fixes tag is
Do not disable clock if it is a critical one.
Signed-off-by: Claudiu Beznea
Reviewed-by: Simon Glass
---
drivers/clk/clk-uclass.c | 3 +++
test/dm/clk_ccf.c| 32 +++-
2 files changed, 34 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/clk-uclass.c
Clock re-parenting is not binding the clock's device to its new
parent device, it only calls the clock's ops->set_parent() API. The
changes in this commit re-parent the clock device to its new parent
so that subsequent operations like clk_get_parent() to point to the
proper parent.
Signed-off-by:
clk_get_by_indexed_prop() retrieves a clock with dev member being set
with the pointer to the udevice for the clock controller driver. But
in case of CCF each clock driver has set in dev member the reference
to its parent (the root of the clock tree is a fixed clock, every
node in clock tree is a
> -Original Message-
> From: Ang, Chee Hong
> Sent: Friday, August 14, 2020 11:07 AM
> To: u-boot@lists.denx.de
> Cc: Marek Vasut ; Simon Goldschmidt
> ; Tom Rini ; See,
> Chin Liang ; Tan, Ley Foon
> ; Ang, Chee Hong ;
> Chee, Tien Fong ; Lim, Elly Siew Chin
>
> Subject: [PATCH v1]
> -Original Message-
> From: Thirupathaiah Annapureddy
> Sent: Wednesday, September 2, 2020 4:43 AM
> To: u-boot@lists.denx.de
> Cc: Maxim Sloyko ; Marek Vasut ;
> thir...@microsoft.com; thir...@linux.microsoft.com; Tom Rini
> ; ChiaWei Wang ;
> Ryan Chen
> Subject: [PATCH v2] arm: dts:
From: Jean-Jacques Hiblot
Add a test to verify that GPIOs can be acquired/released using the managed
API. Also check that the GPIOs are released when the consumer device is
removed.
Signed-off-by: Jean-Jacques Hiblot
Signed-off-by: Pratyush Yadav
---
arch/sandbox/dts/test.dts | 10
From: Jean-Jacques Hiblot
Add managed functions to get a gpio from the devce-tree, based on a
property name (minus the '-gpios' suffix) and optionally an index.
When the device is unbound, the GPIO is automatically released and the
data structure is freed.
Signed-off-by: Jean-Jacques Hiblot
Hi,
This is a re-submission of Jean-Jacques' earlier work in October last
year. It can be found at [0]. The goal is to facilitate porting drivers
from the Linux kernel. Most of the series will be about adding managed
APIs to existing infrastructure (GPIO, reset, regmap).
This particular series
On Mon, Sep 7, 2020 at 3:14 PM Chunfeng Yun wrote:
>
nits: please remove the ending period in the commit title
> xhci versions 1.0 and later report the untransferred data remaining in a
> TD a bit differently than older hosts.
>
> We used to have separate functions for these, and needed to
On 02/09/20 4:48 pm, Faiz Abbas wrote:
> Add platform data and a device structure for the spi device
> present on am335x-icev2. This requires moving all omap3_spi
> platform data structures and symbols to an omap3_spi.h so that
> the board file can access them.
>
> Signed-off-by: Faiz Abbas
>
Hello,
sorry for the e-mail again.
i check the repo today, but the board is still missing.
can you tell me how long it take to push it in the main branch?
will it be there in future, or was the patch rejected.
thanks a lot, i wish you a great start into the week.
From: Vladimir Vid
Some of Marvell A3700 boards use mx25u12835f, specifically uDPU
and ESPRESSObin v7.
Signed-off-by: Vladimir Vid
[a.heider: adapt commit message to mainline]
Signed-off-by: Andre Heider
---
Patch taken from OpenWRT's uboot-mvebu package.
drivers/mtd/spi/spi-nor-ids.c | 1
Use macros with parameter to fill ep_info2, then some macros
for MASK and SHIFT can be removed
Signed-off-by: Chunfeng Yun
---
v3: merge patch [v2 9/11] and [v2 10/11] into one, both for ep_info2
v2: no changes
---
drivers/usb/host/xhci-mem.c | 15 +--
drivers/usb/host/xhci.c |
Use TRB_TX_TYPE() instead of (TRB_DATA_OUT/IN << TRB_TX_TYPE_SHIFT)
Signed-off-by: Chunfeng Yun
---
v2: no changes
---
drivers/usb/host/xhci-ring.c | 4 ++--
include/usb/xhci.h | 1 -
2 files changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/usb/host/xhci-ring.c
Use HCS_MAX_PORTS(p) instead of
((p & HCS_MAX_PORTS_MASK) >> HCS_MAX_PORTS_SHIFT)
Signed-off-by: Chunfeng Yun
Reviewed-by: Bin Meng
---
v3: add reviewed-by Bin
v2: no changes
---
drivers/usb/host/xhci.c | 3 +--
include/usb/xhci.h | 2 --
2 files changed, 1 insertion(+), 4 deletions(-)
Use TRB_TYPE(p) instead of ((p) << TRB_TYPE_SHIFT)
Signed-off-by: Chunfeng Yun
Reviewed-by: Bin Meng
---
v3: add reviewed-by Bin
v2: no changes
---
drivers/usb/host/xhci-mem.c | 3 +--
drivers/usb/host/xhci-ring.c | 11 +--
include/usb/xhci.h | 1 -
3 files changed, 6
Use readx_poll_sleep_timeout() to poll the register status
Signed-off-by: Chunfeng Yun
---
v3: no changes
v2: fix typo of title suggested by Frank
---
drivers/usb/host/xhci.c | 25 +++--
1 file changed, 11 insertions(+), 14 deletions(-)
diff --git a/drivers/usb/host/xhci.c
On 9/7/20 12:19 PM, Y.b. Lu wrote:
> Hi Jaehoon and Peng,
>
> Any comments on the v4 patch-set?
Will check. Thanks!
Best Regards,
Jaehoon Chung
> Thank you.
>
> Best regards,
> Yangbo Lu
>
>> -Original Message-
>> From: Yangbo Lu
>> Sent: Tuesday, September 1, 2020 4:58 PM
>> To:
Hi,
On 07. 09. 20 10:35, Michal Simek wrote:
> There shouldn't be a need to use loadables propertyn because u-boot can be
> pointed by firmware property. This change should also speedup boot process
> because loadables property is list of strings which code is going through.
> On the other hand
Hi Simon,
On 07. 09. 20 3:43, Simon Glass wrote:
> Hi Michal,
>
> On Thu, 3 Sep 2020 at 06:30, Michal Simek wrote:
>>
>> Hi,
>>
>> On 03. 09. 20 13:16, Heinrich Schuchardt wrote:
>>> On 9/3/20 1:03 PM, Michal Simek wrote:
Hi,
We have several use cases where customers want to
> -Original Message-
> From: Nico Becker
> Sent: Friday, July 17, 2020 6:23 PM
> To: u-boot@lists.denx.de; ma...@denx.de;
> simon.k.r.goldschm...@gmail.com; Tan, Ley Foon
> Cc: Nico Becker
> Subject: [PATCH v4] arm: socfpga: add board support for ic-automation
> Moritz III
>
> add
From: Vladimir Vid
Increase max gunzip size, required for booting itb recovery images on
uDPU.
Signed-off-by: Vladimir Vid
[a.heider: adapt to mainline]
Signed-off-by: Andre Heider
---
Patch taken from OpenWRT's uboot-mvebu package.
include/configs/mvebu_armada-37xx.h | 4
1 file
On Monday 07 September 2020 10:46:37 Andre Heider wrote:
> Hi Pali,
>
> On 07/09/2020 09:58, Pali Rohár wrote:
> > On Sunday 06 September 2020 20:44:50 Andre Heider wrote:
> > > On 06/09/2020 11:32, Pali Rohár wrote:
> > > > On Saturday 05 September 2020 14:07:44 Andre Heider wrote:
> > > > > +
>
Hi Bin,
On Fri, 2020-09-04 at 15:19 +0800, Bin Meng wrote:
> Hi Marek,
>
> On Fri, Sep 4, 2020 at 3:05 PM Marek Vasut wrote:
> >
> > On 9/4/20 8:54 AM, Bin Meng wrote:
> > > On Wed, Aug 26, 2020 at 5:31 PM Chunfeng Yun
> > > wrote:
> > >>
> > >> Use TRB_TYPE(p) instead of ((p) <<
Hi Simon,
On 07. 09. 20 3:43, Simon Glass wrote:
> Hi Michal,
>
> On Thu, 3 Sep 2020 at 05:03, Michal Simek wrote:
>>
>> SPL is creating fit-images DT node when loadables are recorded in selected
>> configuration. Entries which are created are using entry-point and
>> load-addr property names.
Jagan,
On 02/09/20 4:48 pm, Faiz Abbas wrote:
> There are devices which don't use OF_CONTROL or OF_PLATDATA but instead
> rely on statically defined platdata. Block dm_scan_fdt_dev() with both
> configs to avoid build failures under this condition.
>
> Signed-off-by: Faiz Abbas
Can you ack
> -Original Message-
> From: Nico Becker
> Sent: Monday, September 7, 2020 2:38 PM
> To: u-boot@lists.denx.de; ma...@denx.de;
> simon.k.r.goldschm...@gmail.com; Tan, Ley Foon
> Subject: [PATCH v4] arm: socfpga: add board support for ic-automation
> Moritz III
>
> Hello,
> sorry for
On Sunday 06 September 2020 20:44:50 Andre Heider wrote:
> On 06/09/2020 11:32, Pali Rohár wrote:
> > On Saturday 05 September 2020 14:07:44 Andre Heider wrote:
> > > +
> > > + emmc = of_machine_is_compatible("globalscale,espressobin-emmc");
> > > +
> > > + if (ddr4 && emmc)
> > > +
On Sat, Sep 5, 2020 at 6:23 AM Simon Glass wrote:
> On Fri, 4 Sep 2020 at 03:46, Andy Shevchenko
> wrote:
> > On Thu, Sep 03, 2020 at 07:28:51PM -0600, Simon Glass wrote:
> I do have a question though. How does the board decide whether to wait
> for the xFSTK tool to connect? Sometimes when I
Hi Pali,
On 07/09/2020 09:58, Pali Rohár wrote:
On Sunday 06 September 2020 20:44:50 Andre Heider wrote:
On 06/09/2020 11:32, Pali Rohár wrote:
On Saturday 05 September 2020 14:07:44 Andre Heider wrote:
+
+ emmc = of_machine_is_compatible("globalscale,espressobin-emmc");
+
+ if
Hello Rayagonda,
With today top of upstream u-boot tree, I am still getting the error in booting
lx216ardb
U-Boot 2020.10-rc3-00086-ge5df264e7a (Sep 07 2020 - 14:13:57 +0530)
“Error binding driver 'gic-v3': -96
Some drivers failed to bind
initcall sequence fbdcf368 failed at call
+andestech.com
On 07. 09. 20 3:43, Simon Glass wrote:
> Hi Michal,
>
> On Thu, 3 Sep 2020 at 05:03, Michal Simek wrote:
>>
>> The commit 9f45aeb93727 ("spl: fit: implement fdt_record_loadable") which
>> introduced fdt_record_loadable() state there spl_fit.c is not 64bit safe.
>> Based on my
Hi Simon,
On 05. 09. 20 23:10, Simon Glass wrote:
> If an entry argument is needed by an entry but the entry argument is not
> present, then a strange error can occur when trying to read the file.
>
> Fix this by allowing arguments to be required. Select this option for the
> cros-ec-rw entry.
Hi Lokesh,
On 07/09/20 12:08 pm, Lokesh Vutla wrote:
>
>
> On 02/09/20 4:48 pm, Faiz Abbas wrote:
>> Add platform data and a device structure for the spi device
>> present on am335x-icev2. This requires moving all omap3_spi
>> platform data structures and symbols to an omap3_spi.h so that
>>
Add a member to save xHCI version, it's used some times.
Signed-off-by: Chunfeng Yun
Reviewed-by: Bin Meng
---
v3: add reviewed-by Bin
v2: no changes
---
drivers/usb/host/xhci-ring.c | 4 ++--
drivers/usb/host/xhci.c | 1 +
include/usb/xhci.h | 1 +
3 files changed, 4
There some vendor quirks for MTK xHCI 0.96 host controller:
1. It defines some extra SW scheduling parameters for HW
to minimize the scheduling effort for synchronous and
interrupt endpoints. The parameters are put into reserved
DWs of slot context and endpoint context.
2. Its TDS in
xhci versions 1.0 and later report the untransferred data remaining in a
TD a bit differently than older hosts.
We used to have separate functions for these, and needed to check host
version before calling the right function.
Now Mediatek host has an additional quirk on how it uses the TD Size
For normal TRB fields:
use TRB_LEN(x) instead of ((x) & TRB_LEN_MASK);
and use TRB_INTR_TARGET(x) instead of
(((x) & TRB_INTR_TARGET_MASK) << TRB_INTR_TARGET_SHIFT)
Signed-off-by: Chunfeng Yun
---
v3: merge patch [v2 6/11] and [v2 7/11] into one, both for normal TRB fileds
v2: no changes
---
On 9/7/20 12:36 PM, Faiz Abbas wrote:
> Hi Lokesh,
>
> On 07/09/20 12:08 pm, Lokesh Vutla wrote:
>>
>>
>> On 02/09/20 4:48 pm, Faiz Abbas wrote:
>>> Add platform data and a device structure for the spi device
>>> present on am335x-icev2. This requires moving all omap3_spi
>>> platform data
On 07. 09. 20 3:43, Simon Glass wrote:
> Hi Michal,
>
> On Thu, 3 Sep 2020 at 05:03, Michal Simek wrote:
>>
>> The commit 9f45aeb93727 ("spl: fit: implement fdt_record_loadable") which
>> introduced fdt_record_loadable() state there spl_fit.c is not 64bit safe.
>> Based on my tests on Xilinx
There shouldn't be a need to use loadables propertyn because u-boot can be
pointed by firmware property. This change should also speedup boot process
because loadables property is list of strings which code is going through.
On the other hand firmware can just point to one image.
Signed-off-by:
Hi Simon,
On 06. 09. 20 18:39, Simon Glass wrote:
> This series adds support for help messages when binary blobs are missing,
> as well as selecting the default FIT configuration.
>
> It includes the v3 patches from the earlier series that were not applied.
>
> Note: This series is available at
On Sun, Sep 06, 2020 at 07:43:39PM -0600, Simon Glass wrote:
> On Fri, 4 Sep 2020 at 03:33, Andy Shevchenko
> wrote:
> > On Thu, Sep 03, 2020 at 07:28:53PM -0600, Simon Glass wrote:
> > > -self._pathname = tools.GetInputFilename(self._filename,
> > > -
On 02/09/20 4:48 pm, Faiz Abbas wrote:
> am335x internal SRAM is too small to support the addition of
> SPI bootmode to the default defconfig. Add a separate spiboot_defconfig
>
> Signed-off-by: Faiz Abbas
> ---
> configs/am335x_evm_spiboot_defconfig | 93
> 1
On 9/2/20 4:48 PM, Faiz Abbas wrote:
> Add an ofdata_to_platdata() callback to access dts in U-boot and
> access all platform data in it. This prepares the driver for supporting
> both device tree as well as static platform data structures in SPL.
>
> Signed-off-by: Faiz Abbas
> ---
>
On Sun, Sep 06, 2020 at 11:16:17PM +0100, André Przywara wrote:
> On 04/09/2020 19:42, Stephen Warren wrote:
> > On 9/4/20 3:07 AM, Edgar E. Iglesias wrote:
> >> From: "Edgar E. Iglesias"
> >>
> >> Mention the requirement of 4K aligned load addresses in the
> >> help section for the
From: Meenakshi Aggarwal
This patch set add support for LX2162AQDS board.
LX2162A is a variant of LX2160A.
---
Changes:
v2:
- Add Separate ARCH for LX2162A SoC
- Updated ReadMe of SoC and board
v3:
- Fix compilation bug for ls1088
From: Meenakshi Aggarwal
LX2162 is LX2160 based SoC, it has same die as of LX2160
with different packaging.
LX2162A support 64-bit 2.9GT/s DDR4 memory, i2c, micro-click module,
microSD card, eMMC support, serial console, qspi nor flash, qsgmii,
sgmii, 25g, 40g, 50g network interface, one usb
On Fri, Sep 04, 2020 at 12:43:57PM -0600, Stephen Warren wrote:
> On 9/4/20 3:07 AM, Edgar E. Iglesias wrote:
> > From: "Edgar E. Iglesias"
> >
> > PIE requires a 4K aligned load address. If this is not met, trap
> > the startup sequence in a WFI loop rather than running into obscure
> >
The following changes since commit e5df264e7aaca0d94428586837a1f70a23479d16:
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell
(2020-09-04 10:09:14 -0400)
are available in the Git repository at:
https://gitlab.denx.de/u-boot/custodians/u-boot-efi.git
tags/efi-2020-10-rc4
for
From: Meenakshi Aggarwal
This patch add base support for LX2162AQDS board.
LX2162AQDS board supports LX2162A family SoCs.
This patch add basic support of platform.
Signed-off-by: Ioana Ciornei
Signed-off-by: Zhao Qiang
Signed-off-by: hui.song
Signed-off-by: Manish Tomar
Signed-off-by: Vikas
Hi Chunfeng,
On Mon, Sep 7, 2020 at 3:20 PM Chunfeng Yun wrote:
>
> Hi Bin,
>
> On Fri, 2020-09-04 at 15:19 +0800, Bin Meng wrote:
> > Hi Marek,
> >
> > On Fri, Sep 4, 2020 at 3:05 PM Marek Vasut wrote:
> > >
> > > On 9/4/20 8:54 AM, Bin Meng wrote:
> > > > On Wed, Aug 26, 2020 at 5:31 PM
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