[PATCH] Makefile: Add more files to clean list

2021-12-22 Thread Adam Ford
When building for i.mx8m boards with binman, a few more additional
files are created which should be removed when running 'make clean'

Signed-off-by: Adam Ford 

diff --git a/Makefile b/Makefile
index ae9bfab91a..3c2b7008d4 100644
--- a/Makefile
+++ b/Makefile
@@ -2108,7 +2108,9 @@ CLEAN_FILES += include/bmp_logo.h include/bmp_logo_data.h 
tools/version.h \
   u-boot* MLO* SPL System.map fit-dtb.blob* \
   u-boot-ivt.img.log u-boot-dtb.imx.log SPL.log u-boot.imx.log \
   lpc32xx-* bl31.c bl31.elf bl31_*.bin image.map tispl.bin* \
-  idbloader.img flash.bin flash.log defconfig keep-syms-lto.c
+  idbloader.img flash.bin flash.log defconfig keep-syms-lto.c \
+  mkimage-out.spl.mkimage mkimage.spl.mkimage imx-boot.map \
+  itb.fit.fit itb.fit.itb itb.map spl.map
 
 # Directories & files removed with 'make mrproper'
 MRPROPER_DIRS  += include/config include/generated spl tpl \
-- 
2.32.0



Re: [PATCH 0/3] misc: atsha204a: bug fixes

2021-12-22 Thread Josh Datko
Thanks everyone for including me — I don’t have any code comments but I will 
say that this i2c driver, with the exception of the i2c default address (which 
looks like is being set via the device tree anyway), should also work with the 
ATECC508, ATECC608A, ATECC608B (which is the one of those three recommended for 
new designs) as I believe the interface at this level was not changed.

So that might be a nice comment or add to documentation. Otherwise, I’m glad to 
see y’all supporting this.

Also, it’s been a while since I’ve been active on such mailing lists, so I 
can’t remember the reply etiquette exactly. Apologizes in advance for the naive 
top-post :)

Josh



> On Dec 21, 2021, at 9:17 AM, Adrian Fiergolski 
>  wrote:
> 
> Series of patches fixing atsha204a driver. Partially inspired by Enclustra's 
> repo [1].
> 
> [1] https://github.com/enclustra-bsp/xilinx-uboot
> 
> Adrian Fiergolski (3):
>  misc: atsha204a: return timeout from wakeup function
>  misc: atsha204a: add delay after sending the message
>  misc: atsha204a: fix i2c address readout from DTS
> 
> drivers/misc/atsha204a-i2c.c | 8 
> 1 file changed, 4 insertions(+), 4 deletions(-)
> 
> -- 
> 2.34.1
> 



[PATCH v2] riscv: cancel the limitation that NR_CPUS is less than or equal to 32

2021-12-22 Thread Xiang W
Various specifications of riscv allow the number of hart to be
greater than 32. The limit of 32 is determined by
gd->arch.available_harts. We can eliminate this limitation through
bitmaps. Currently, the number of hart is limited to 4095, and 4095
is the limit of the RISC-V Advanced Core Local Interruptor
Specification.

Test on sifive unmatched.

Signed-off-by: Xiang W 
---
Changes since v1:

* When NR_CPUS is very large, the value of GD_AVAILABLE_HARTS will
  overflow the immediate range of ld/lw. This patch fixes this
  problem

 arch/riscv/Kconfig   |  4 ++--
 arch/riscv/cpu/start.S   | 21 -
 arch/riscv/include/asm/global_data.h |  4 +++-
 arch/riscv/lib/smp.c |  2 +-
 4 files changed, 22 insertions(+), 9 deletions(-)

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index ba29e70acf..7b9c7f5bca 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -220,8 +220,8 @@ config SPL_SMP
  all, single processor machines.
 
 config NR_CPUS
-   int "Maximum number of CPUs (2-32)"
-   range 2 32
+   int "Maximum number of CPUs (2-4095)"
+   range 2 4095
depends on SMP || SPL_SMP
default 8
help
diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S
index 76850ec9be..92f3b78f29 100644
--- a/arch/riscv/cpu/start.S
+++ b/arch/riscv/cpu/start.S
@@ -166,11 +166,22 @@ wait_for_gd_init:
mv  gp, s0
 
/* register available harts in the available_harts mask */
-   li  t1, 1
-   sll t1, t1, tp
-   LREGt2, GD_AVAILABLE_HARTS(gp)
-   or  t2, t2, t1
-   SREGt2, GD_AVAILABLE_HARTS(gp)
+   li  t1, GD_AVAILABLE_HARTS
+   add t1, t1, gp
+   LREGt1, 0(t1)
+#if defined(CONFIG_ARCH_RV64I)
+   srlit2, tp, 6
+   sllit2, t2, 3
+#elif defined(CONFIG_ARCH_RV32I)
+   srlit2, tp, 5
+   sllit2, t2, 2
+#endif
+   add t1, t1, t2
+   LREGt2, 0(t1)
+   li  t3, 1
+   sll t3, t3, tp
+   or  t2, t2, t3
+   SREGt2, 0(t1)
 
amoswap.w.rl zero, zero, 0(t0)
 
diff --git a/arch/riscv/include/asm/global_data.h 
b/arch/riscv/include/asm/global_data.h
index 095484a635..6de2ee0b25 100644
--- a/arch/riscv/include/asm/global_data.h
+++ b/arch/riscv/include/asm/global_data.h
@@ -10,9 +10,11 @@
 #ifndef__ASM_GBL_DATA_H
 #define __ASM_GBL_DATA_H
 
+#include 
 #include 
 #include 
 #include 
+#include 
 
 /* Architecture-specific global data */
 struct arch_global_data {
@@ -28,7 +30,7 @@ struct arch_global_data {
struct ipi_data ipi[CONFIG_NR_CPUS];
 #endif
 #ifndef CONFIG_XIP
-   ulong available_harts;
+   ulong available_harts[BITS_TO_LONGS(CONFIG_NR_CPUS)];
 #endif
 };
 
diff --git a/arch/riscv/lib/smp.c b/arch/riscv/lib/smp.c
index ba992100ad..e8e391fd41 100644
--- a/arch/riscv/lib/smp.c
+++ b/arch/riscv/lib/smp.c
@@ -47,7 +47,7 @@ static int send_ipi_many(struct ipi_data *ipi, int wait)
 
 #ifndef CONFIG_XIP
/* skip if hart is not available */
-   if (!(gd->arch.available_harts & (1 << reg)))
+   if (!test_bit(reg, gd->arch.available_harts))
continue;
 #endif
 
-- 
2.30.2



[PATCH] console: usb: kbd: Limit poll frequency to improve performance

2021-12-22 Thread Thomas Watson
Using the XHCI driver, the function `usb_kbd_poll_for_event` takes
30-40ms to run. The exact time is dependent on the polling interval the
keyboard requests in its descriptor, and likely cannot be significantly
reduced without major rework to the XHCI driver.

The U-Boot EFI console service sets a timer to poll the keyboard every 5
microseconds, and this timer is checked every time a block is read off
disk. The net effect is that, on my system, loading a ~40MiB kernel and
initrd takes about 62 seconds with a slower keyboard and 53 seconds
with a faster one, with the vast majority of the time spent polling the
keyboard.

To solve this problem, this patch adds a 20ms delay between consecutive
calls to `usb_kbd_poll_for_event`. This is sufficient to reduce the
total loading time to under half a second for both keyboards, and does
not impact the perceived keystroke latency.

Signed-off-by: Thomas Watson 
---

common/usb_kbd.c | 20 +++-
1 file changed, 15 insertions(+), 5 deletions(-)

diff --git a/common/usb_kbd.c b/common/usb_kbd.c
index afad260d3d..0131b7dfab 100644
--- a/common/usb_kbd.c
+++ b/common/usb_kbd.c
@@ -118,7 +118,7 @@ struct usb_kbd_pdata {
extern int __maybe_unused net_busy_flag;

/* The period of time between two calls of usb_kbd_testc(). */
-static unsigned long __maybe_unused kbd_testc_tms;
+static unsigned long kbd_testc_tms;

/* Puts character in the queue and sets up the in and out pointer. */
static void usb_kbd_put_queue(struct usb_kbd_pdata *data, u8 c)
@@ -394,21 +394,31 @@ static int usb_kbd_testc(struct stdio_dev *sdev)
struct usb_device *usb_kbd_dev;
struct usb_kbd_pdata *data;

+   /*
+* Polling the keyboard for an event can take dozens of milliseconds. 
Add a
+* delay between polls to avoid blocking activity which polls rapidly, 
like
+* the UEFI console timer.
+*/
+   unsigned long poll_delay = CONFIG_SYS_HZ / 50;
+
#ifdef CONFIG_CMD_NET
/*
 * If net_busy_flag is 1, NET transfer is running,
 * then we check key-pressed every second (first check may be
 * less than 1 second) to improve TFTP booting performance.
 */
-   if (net_busy_flag && (get_timer(kbd_testc_tms) < CONFIG_SYS_HZ))
-   return 0;
-   kbd_testc_tms = get_timer(0);
+   if (net_busy_flag)
+   poll_delay = CONFIG_SYS_HZ;
#endif
+
dev = stdio_get_by_name(sdev->name);
usb_kbd_dev = (struct usb_device *)dev->priv;
data = usb_kbd_dev->privptr;

-   usb_kbd_poll_for_event(usb_kbd_dev);
+   if (get_timer(kbd_testc_tms) >= poll_delay) {
+   usb_kbd_poll_for_event(usb_kbd_dev);
+   kbd_testc_tms = get_timer(0);
+   }

return !(data->usb_in_pointer == data->usb_out_pointer);
}
-- 
2.17.1



[PATCH] phy: nop-phy: Enable reset-gpios support

2021-12-22 Thread Adam Ford
Some usb-nop-xceiv devices use a gpio to put them in and
out of reset.  Add a reset function to put them into that
state.  This is similar to how Linux handles the
usb-nop-xceiv driver.

Signed-off-by: Adam Ford 

diff --git a/drivers/phy/nop-phy.c b/drivers/phy/nop-phy.c
index 9f12ebc062..be993a764f 100644
--- a/drivers/phy/nop-phy.c
+++ b/drivers/phy/nop-phy.c
@@ -10,11 +10,24 @@
 #include 
 #include 
 #include 
+#include 
 
 struct nop_phy_priv {
struct clk_bulk bulk;
+   struct gpio_desc reset_gpio;
 };
 
+static int nop_phy_reset(struct phy *phy)
+{
+   struct nop_phy_priv *priv = dev_get_priv(phy->dev);
+
+   /* Return if there is no gpio since it's optional */
+   if (!dm_gpio_is_valid(>reset_gpio))
+   return 0;
+
+   return dm_gpio_set_value(>reset_gpio, false);
+}
+
 static int nop_phy_init(struct phy *phy)
 {
struct nop_phy_priv *priv = dev_get_priv(phy->dev);
@@ -22,7 +35,12 @@ static int nop_phy_init(struct phy *phy)
if (CONFIG_IS_ENABLED(CLK))
return clk_enable_bulk(>bulk);
 
-   return 0;
+   /* Return if there is no gpio since it's optional */
+   if (!dm_gpio_is_valid(>reset_gpio))
+   return 0;
+
+   /* If there is a reset gpio, take it out of reset */
+   return dm_gpio_set_value(>reset_gpio, true);
 }
 
 static int nop_phy_probe(struct udevice *dev)
@@ -38,6 +56,12 @@ static int nop_phy_probe(struct udevice *dev)
}
}
 
+   ret = gpio_request_by_name(dev, "reset-gpios", 0,
+  >reset_gpio,
+  GPIOD_IS_OUT);
+   if (ret != -ENOENT)
+   return ret;
+
return 0;
 }
 
@@ -49,6 +73,7 @@ static const struct udevice_id nop_phy_ids[] = {
 
 static struct phy_ops nop_phy_ops = {
.init = nop_phy_init,
+   .reset = nop_phy_reset,
 };
 
 U_BOOT_DRIVER(nop_phy) = {
-- 
2.32.0



Re: [PATCH v1 1/3] arm: xea: Modify board code to generate single binary u-boot

2021-12-22 Thread Tom Rini
On Wed, Dec 22, 2021 at 01:49:02PM +0100, Lukasz Majewski wrote:

> This change provides the possibility to build XEA (imx287 based) board
> U-Boot as a single binary (without support for CONFIG_SPL_FRAMEWORK).
> 
> The generated u-boot.sb can be used in the factory environment to for
> example perform initial setup or HW testing.
> 
> It can be used with 'uuu' utility
> (SDPS: boot -f /srv/tftp/xea/u-boot.sb)
> 
> The board_init_ll() is used in arch/arm/cpu/arm926ejs/mxs/start.S, which
> is utilized when CONFIG_SPL_FRAMEWORK is disabled.
> 
> However, when it is enabled the arch/arm/cpu/arm926ejs/start.S is used,
> which requires the lowlevel_init() function.
> 
> Signed-off-by: Lukasz Majewski 
> ---
> 
>  board/liebherr/xea/spl_xea.c | 8 
>  board/liebherr/xea/xea.c | 3 ++-
>  2 files changed, 10 insertions(+), 1 deletion(-)
> 
> diff --git a/board/liebherr/xea/spl_xea.c b/board/liebherr/xea/spl_xea.c
> index 192f68fca5f..5ee561b8b78 100644
> --- a/board/liebherr/xea/spl_xea.c
> +++ b/board/liebherr/xea/spl_xea.c
> @@ -290,6 +290,13 @@ u32 mxs_dram_vals[] = {
>   0x, 0x
>  };
>  
> +/* #ifndef CONFIG_SPL_FRAMEWORK */
> +#if !CONFIG_IS_ENABLED(FRAMEWORK)
> +void board_init_ll(const u32 arg, const uint32_t *resptr)
> +{
> + mxs_common_spl_init(arg, resptr, iomux_setup, ARRAY_SIZE(iomux_setup));
> +}
> +#else
>  void lowlevel_init(void)
>  {
>   struct mxs_pinctrl_regs *pinctrl_regs =
> @@ -301,3 +308,4 @@ void lowlevel_init(void)
>  
>   mxs_common_spl_init(0, NULL, iomux_setup, ARRAY_SIZE(iomux_setup));
>  }
> +#endif
> diff --git a/board/liebherr/xea/xea.c b/board/liebherr/xea/xea.c
> index cd11b0ada77..685e2e26a18 100644
> --- a/board/liebherr/xea/xea.c
> +++ b/board/liebherr/xea/xea.c
> @@ -58,7 +58,8 @@ static void init_clocks(void)
>   mxs_set_sspclk(MXC_SSPCLK3, 96000, 0);
>  }
>  
> -#ifdef CONFIG_SPL_BUILD
> +/* #if CONFIG_SPL_BUILD && CONFIG_SPL_FRAMEWORK */
> +#if CONFIG_IS_ENABLED(BUILD) && CONFIG_IS_ENABLED(FRAMEWORK)
>  void board_init_f(ulong arg)
>  {
>   init_clocks();

I know checkpatch.pl has a warning, but maybe the text needs to be
tweaked there slightly?  Using CONFIG_IS_ENABLED here is less readable /
clear than CONFIG_SPL_BUILD (which is special) and CONFIG_SPL_FRAMEWORK
(there's no CONFIG_FRAMEWORK and this board isn't going to use TPL).

-- 
Tom


signature.asc
Description: PGP signature


[PATCH v2 3/5] clk: Add client API to HTML docs

2021-12-22 Thread Sean Anderson
This converts the existing client (aka clk.h) documentation to kernel doc
format, and adds it to the HTML docs. I have tried to preserve existing
comments as much as possible, refraining from semantic changes.

Signed-off-by: Sean Anderson 
Tested-by: Heinrich Schuchardt 
---

(no changes since v1)

 doc/api/clk.rst   |  13 +++
 doc/api/index.rst |   1 +
 include/clk.h | 229 +++---
 3 files changed, 129 insertions(+), 114 deletions(-)
 create mode 100644 doc/api/clk.rst

diff --git a/doc/api/clk.rst b/doc/api/clk.rst
new file mode 100644
index 00..7eb3b5645a
--- /dev/null
+++ b/doc/api/clk.rst
@@ -0,0 +1,13 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Clock API
+=
+
+.. kernel-doc:: include/clk.h
+   :doc: Overview
+
+Client API
+--
+
+.. kernel-doc:: include/clk.h
+   :internal:
diff --git a/doc/api/index.rst b/doc/api/index.rst
index 806c7385a6..83d4f3e5c1 100644
--- a/doc/api/index.rst
+++ b/doc/api/index.rst
@@ -6,6 +6,7 @@ U-Boot API documentation
 .. toctree::
:maxdepth: 2
 
+   clk
dfu
efi
getopt
diff --git a/include/clk.h b/include/clk.h
index 82c763d03f..33f448eb89 100644
--- a/include/clk.h
+++ b/include/clk.h
@@ -14,6 +14,8 @@
 #include 
 
 /**
+ * DOC: Overview
+ *
  * A clock is a hardware signal that oscillates autonomously at a specific
  * frequency and duty cycle. Most hardware modules require one or more clock
  * signal to drive their operation. Clock signals are typically generated
@@ -34,22 +36,22 @@ struct udevice;
 
 /**
  * struct clk - A handle to (allowing control of) a single clock.
- *
- * Clients provide storage for clock handles. The content of the structure is
- * managed solely by the clock API and clock drivers. A clock struct is
- * initialized by "get"ing the clock struct. The clock struct is passed to all
- * other clock APIs to identify which clock signal to operate upon.
- *
  * @dev: The device which implements the clock signal.
  * @rate: The clock rate (in HZ).
- * @flags: Flags used across common clock structure (e.g. CLK_)
+ * @flags: Flags used across common clock structure (e.g. %CLK_)
  * Clock IP blocks specific flags (i.e. mux, div, gate, etc) are 
defined
- * in struct's for those devices (e.g. struct clk_mux).
+ * in struct's for those devices (e.g.  clk_mux).
+ * @enable_count: The number of times this clock has been enabled.
  * @id: The clock signal ID within the provider.
  * @data: An optional data field for scenarios where a single integer ID is not
  *   sufficient. If used, it can be populated through an .of_xlate op and
  *   processed during the various clock ops.
  *
+ * Clients provide storage for clock handles. The content of the structure is
+ * managed solely by the clock API and clock drivers. A clock struct is
+ * initialized by "get"ing the clock struct. The clock struct is passed to all
+ * other clock APIs to identify which clock signal to operate upon.
+ *
  * Should additional information to identify and configure any clock signal
  * for any provider be required in the future, the struct could be expanded to
  * either (a) add more fields to allow clock providers to store additional
@@ -72,15 +74,14 @@ struct clk {
 
 /**
  * struct clk_bulk - A handle to (allowing control of) a bulk of clocks.
+ * @clks: An array of clock handles.
+ * @count: The number of clock handles in the clks array.
  *
  * Clients provide storage for the clock bulk. The content of the structure is
  * managed solely by the clock API. A clock bulk struct is
  * initialized by "get"ing the clock bulk struct.
  * The clock bulk struct is passed to all other bulk clock APIs to apply
  * the API to all the clock in the bulk struct.
- *
- * @clks: An array of clock handles.
- * @count: The number of clock handles in the clks array.
  */
 struct clk_bulk {
struct clk *clks;
@@ -91,16 +92,19 @@ struct clk_bulk {
 struct phandle_1_arg;
 /**
  * clk_get_by_phandle() - Get a clock by its phandle information (of-platadata)
+ * @dev: Device containing the phandle
+ * @cells: Phandle info
+ * @clk: A pointer to a clock struct to initialise
  *
  * This function is used when of-platdata is enabled.
  *
  * This looks up a clock using the phandle info. With dtoc, each phandle in the
- * 'clocks' property is transformed into an idx representing the device. For
- * example:
+ * 'clocks' property is transformed into an idx representing the device.
+ * For example::
  *
  * clocks = <_mpu_ck 23>;
  *
- * might result in:
+ * might result in::
  *
  * .clocks = {1, {23}},},
  *
@@ -109,16 +113,17 @@ struct phandle_1_arg;
  * this example it would return a clock containing the 'dpll_mpu_ck' device and
  * the clock ID 23.
  *
- * @dev: Device containing the phandle
- * @cells: Phandle info
- * @clock: A pointer to a clock struct to initialise
- * @return 0 if OK, or a negative error code.
+ * Return: 0 if OK, or a negative error code.
  */
 int 

[PATCH v2 2/5] clk: Inline clk_get_*_optional

2021-12-22 Thread Sean Anderson
The optional varients of clk_get_* functions are just simple wrappers.
Reduce code size a bit by inlining them. On platforms where it is not used
(most of them), it will not be compiled in any more. On platforms where
they are used, the inlined branch should not cause any significant growth.

Signed-off-by: Sean Anderson 
---

(no changes since v1)

 drivers/clk/clk-uclass.c | 22 ---
 include/clk.h| 58 
 2 files changed, 35 insertions(+), 45 deletions(-)

diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c
index 0ee9a38b15..5e9749a75b 100644
--- a/drivers/clk/clk-uclass.c
+++ b/drivers/clk/clk-uclass.c
@@ -432,18 +432,6 @@ int clk_get_by_name_nodev(ofnode node, const char *name, 
struct clk *clk)
return clk_get_by_index_nodev(node, index, clk);
 }
 
-int clk_get_by_name_nodev_optional(ofnode node, const char *name,
-  struct clk *clk)
-{
-   int ret;
-
-   ret = clk_get_by_name_nodev(node, name, clk);
-   if (ret == -ENODATA)
-   return 0;
-
-   return ret;
-}
-
 int clk_release_all(struct clk *clk, int count)
 {
int i, ret;
@@ -824,16 +812,6 @@ struct clk *devm_clk_get(struct udevice *dev, const char 
*id)
return clk;
 }
 
-struct clk *devm_clk_get_optional(struct udevice *dev, const char *id)
-{
-   struct clk *clk = devm_clk_get(dev, id);
-
-   if (PTR_ERR(clk) == -ENODATA)
-   return NULL;
-
-   return clk;
-}
-
 void devm_clk_put(struct udevice *dev, struct clk *clk)
 {
int rc;
diff --git a/include/clk.h b/include/clk.h
index 57c6707a55..82c763d03f 100644
--- a/include/clk.h
+++ b/include/clk.h
@@ -193,22 +193,6 @@ int clk_get_by_name(struct udevice *dev, const char *name, 
struct clk *clk);
  */
 int clk_get_by_name_nodev(ofnode node, const char *name, struct clk *clk);
 
-/**
- * clk_get_by_name_nodev_optional - Get/request an optinonal clock by name
- * without a device.
- * @node:  The client ofnode.
- * @name:  The name of the clock to request.
- * @name:  The name of the clock to request, within the client's list of
- * clocks.
- * @clock: A pointer to a clock struct to initialize.
- *
- * Behaves the same as clk_get_by_name_nodev() except where there is
- * no clock producer, in this case, skip the error number -ENODATA, and
- * the function returns 0.
- */
-int clk_get_by_name_nodev_optional(ofnode node, const char *name,
-  struct clk *clk);
-
 /**
  * devm_clk_get - lookup and obtain a managed reference to a clock producer.
  * @dev: device for clock "consumer"
@@ -238,7 +222,16 @@ struct clk *devm_clk_get(struct udevice *dev, const char 
*id);
  * Behaves the same as devm_clk_get() except where there is no clock producer.
  * In this case, instead of returning -ENOENT, the function returns NULL.
  */
-struct clk *devm_clk_get_optional(struct udevice *dev, const char *id);
+static inline struct clk *devm_clk_get_optional(struct udevice *dev,
+   const char *id)
+{
+   struct clk *clk = devm_clk_get(dev, id);
+
+   if (PTR_ERR(clk) == -ENODATA)
+   return NULL;
+
+   return clk;
+}
 
 /**
  * clk_release_all() - Disable (turn off)/Free an array of previously
@@ -291,18 +284,37 @@ clk_get_by_name_nodev(ofnode node, const char *name, 
struct clk *clk)
return -ENOSYS;
 }
 
-static inline int
-clk_get_by_name_nodev_optional(ofnode node, const char *name, struct clk *clk)
-{
-   return -ENOSYS;
-}
-
 static inline int clk_release_all(struct clk *clk, int count)
 {
return -ENOSYS;
 }
 #endif
 
+/**
+ * clk_get_by_name_nodev_optional - Get/request an optinonal clock by name
+ * without a device.
+ * @node:  The client ofnode.
+ * @name:  The name of the clock to request.
+ * @name:  The name of the clock to request, within the client's list of
+ * clocks.
+ * @clock: A pointer to a clock struct to initialize.
+ *
+ * Behaves the same as clk_get_by_name_nodev() except where there is
+ * no clock producer, in this case, skip the error number -ENODATA, and
+ * the function returns 0.
+ */
+static inline int clk_get_by_name_nodev_optional(ofnode node, const char *name,
+struct clk *clk)
+{
+   int ret;
+
+   ret = clk_get_by_name_nodev(node, name, clk);
+   if (ret == -ENODATA)
+   return 0;
+
+   return ret;
+}
+
 /**
  * enum clk_defaults_stage - What stage clk_set_defaults() is called at
  * @CLK_DEFAULTS_PRE: Called before probe. Setting of defaults for clocks owned
-- 
2.33.0



[PATCH v2 0/5] clk: Clean up optional helpers, and add API docs to HTML

2021-12-22 Thread Sean Anderson
This cleans up the various optional helpers for clocks, and adds a new one.
While we're at it, also convert the existing API docs to our HTML documentation.

Changes in v2:
- Clean up the argument list and descriptions
- Rebased onto u-boot/master

Sean Anderson (5):
  clk: Rename clk_get_optional_nodev
  clk: Inline clk_get_*_optional
  clk: Add client API to HTML docs
  clk: Add driver API to HTML docs
  clk: Add clk_get_by_name_optional

 doc/api/clk.rst|  19 +++
 doc/api/index.rst  |   1 +
 drivers/clk/clk-uclass.c   |  21 ---
 drivers/clk/clk_zynq.c |   5 +-
 drivers/phy/phy-mtk-tphy.c |   8 +-
 drivers/rng/meson-rng.c|   4 +-
 include/clk-uclass.h   | 187 +--
 include/clk.h  | 306 +
 8 files changed, 310 insertions(+), 241 deletions(-)
 create mode 100644 doc/api/clk.rst

-- 
2.33.0



[PATCH v2 4/5] clk: Add driver API to HTML docs

2021-12-22 Thread Sean Anderson
This converts the existing driver API docs (clk-uclass.h) to kernel doc
format and adds them to the HTML documentation. Because the kernel doc
sphinx converter does not handle functions in structs very well, the
individual methods are documented separately. This is primarily inspired by
the phylink documentation [1], which uses this trick extensively.

[1] 
https://www.kernel.org/doc/html/latest/networking/kapi.html#c.phylink_mac_ops

Signed-off-by: Sean Anderson 
Tested-by: Heinrich Schuchardt 
---

Changes in v2:
- Clean up the argument list and descriptions

 doc/api/clk.rst  |   6 ++
 include/clk-uclass.h | 187 +--
 2 files changed, 115 insertions(+), 78 deletions(-)

diff --git a/doc/api/clk.rst b/doc/api/clk.rst
index 7eb3b5645a..7c27066928 100644
--- a/doc/api/clk.rst
+++ b/doc/api/clk.rst
@@ -11,3 +11,9 @@ Client API
 
 .. kernel-doc:: include/clk.h
:internal:
+
+Driver API
+--
+
+.. kernel-doc:: include/clk-uclass.h
+   :internal:
diff --git a/include/clk-uclass.h b/include/clk-uclass.h
index 50e8681b55..e44f1caf51 100644
--- a/include/clk-uclass.h
+++ b/include/clk-uclass.h
@@ -16,96 +16,127 @@ struct ofnode_phandle_args;
 
 /**
  * struct clk_ops - The functions that a clock driver must implement.
+ * @of_xlate: Translate a client's device-tree (OF) clock specifier.
+ * @request: Request a translated clock.
+ * @rfree: Free a previously requested clock.
+ * @round_rate: Adjust a rate to the exact rate a clock can provide.
+ * @get_rate: Get current clock rate.
+ * @set_rate: Set current clock rate.
+ * @set_parent: Set current clock parent
+ * @enable: Enable a clock.
+ * @disable: Disable a clock.
+ *
+ * The individual methods are described more fully below.
  */
 struct clk_ops {
-   /**
-* of_xlate - Translate a client's device-tree (OF) clock specifier.
-*
-* The clock core calls this function as the first step in implementing
-* a client's clk_get_by_*() call.
-*
-* If this function pointer is set to NULL, the clock core will use a
-* default implementation, which assumes #clock-cells = <1>, and that
-* the DT cell contains a simple integer clock ID.
-*
-* At present, the clock API solely supports device-tree. If this
-* changes, other xxx_xlate() functions may be added to support those
-* other mechanisms.
-*
-* @clock:  The clock struct to hold the translation result.
-* @args:   The clock specifier values from device tree.
-* @return 0 if OK, or a negative error code.
-*/
int (*of_xlate)(struct clk *clock,
struct ofnode_phandle_args *args);
-   /**
-* request - Request a translated clock.
-*
-* The clock core calls this function as the second step in
-* implementing a client's clk_get_by_*() call, following a successful
-* xxx_xlate() call, or as the only step in implementing a client's
-* clk_request() call.
-*
-* @clock:  The clock struct to request; this has been fille in by
-*  a previoux xxx_xlate() function call, or by the caller
-*  of clk_request().
-* @return 0 if OK, or a negative error code.
-*/
int (*request)(struct clk *clock);
-   /**
-* rfree - Free a previously requested clock.
-*
-* This is the implementation of the client clk_free() API.
-*
-* @clock:  The clock to free.
-* @return 0 if OK, or a negative error code.
-*/
int (*rfree)(struct clk *clock);
-   /**
-* round_rate() - Adjust a rate to the exact rate a clock can provide.
-*
-* @clk:The clock to manipulate.
-* @rate:   Desidered clock rate in Hz.
-* @return rounded rate in Hz, or -ve error code.
-*/
ulong (*round_rate)(struct clk *clk, ulong rate);
-   /**
-* get_rate() - Get current clock rate.
-*
-* @clk:The clock to query.
-* @return clock rate in Hz, or -ve error code
-*/
ulong (*get_rate)(struct clk *clk);
-   /**
-* set_rate() - Set current clock rate.
-*
-* @clk:The clock to manipulate.
-* @rate:   New clock rate in Hz.
-* @return new rate, or -ve error code.
-*/
ulong (*set_rate)(struct clk *clk, ulong rate);
-   /**
-* set_parent() - Set current clock parent
-*
-* @clk:The clock to manipulate.
-* @parent: New clock parent.
-* @return zero on success, or -ve error code.
-*/
int (*set_parent)(struct clk *clk, struct clk *parent);
-   /**
-* enable() - Enable a clock.
-*
-* @clk:The clock to manipulate.
-* @return zero on success, or -ve error code.
- 

[PATCH v2 5/5] clk: Add clk_get_by_name_optional

2021-12-22 Thread Sean Anderson
This adds a helper function for clk_get_by_name in cases where the clock is
optional. Hopefully this helps point driver writers in the right direction.
Also convert some existing users.

Signed-off-by: Sean Anderson 
Reviewed-by: Neil Armstrong 
---

(no changes since v1)

 drivers/clk/clk_zynq.c  |  5 +++--
 drivers/rng/meson-rng.c |  4 ++--
 include/clk.h   | 24 
 3 files changed, 29 insertions(+), 4 deletions(-)

diff --git a/drivers/clk/clk_zynq.c b/drivers/clk/clk_zynq.c
index 18915c3e04..e80500e382 100644
--- a/drivers/clk/clk_zynq.c
+++ b/drivers/clk/clk_zynq.c
@@ -472,8 +472,9 @@ static int zynq_clk_probe(struct udevice *dev)
 
for (i = 0; i < 2; i++) {
sprintf(name, "gem%d_emio_clk", i);
-   ret = clk_get_by_name(dev, name, >gem_emio_clk[i]);
-   if (ret < 0 && ret != -ENODATA) {
+   ret = clk_get_by_name_optional(dev, name,
+  >gem_emio_clk[i]);
+   if (ret) {
dev_err(dev, "failed to get %s clock\n", name);
return ret;
}
diff --git a/drivers/rng/meson-rng.c b/drivers/rng/meson-rng.c
index 5a4f45ad5a..e0a1e8c7e0 100644
--- a/drivers/rng/meson-rng.c
+++ b/drivers/rng/meson-rng.c
@@ -91,8 +91,8 @@ static int meson_rng_of_to_plat(struct udevice *dev)
return -ENODEV;
 
/* Get optional "core" clock */
-   err = clk_get_by_name(dev, "core", >clk);
-   if (err && err != -ENODATA)
+   err = clk_get_by_name_optional(dev, "core", >clk);
+   if (err)
return err;
 
return 0;
diff --git a/include/clk.h b/include/clk.h
index 33f448eb89..9308b57167 100644
--- a/include/clk.h
+++ b/include/clk.h
@@ -292,6 +292,30 @@ static inline int clk_release_all(struct clk *clk, int 
count)
 }
 #endif
 
+/**
+ * clk_get_by_name_optional() - Get/request a optional clock by name.
+ * @dev:   The client device.
+ * @name:  The name of the clock to request, within the client's list of
+ * clocks.
+ * @clk:   A pointer to a clock struct to initialize.
+ *
+ * Behaves the same as clk_get_by_name(), except when there is no clock
+ * provider. In the latter case, return 0.
+ *
+ * Return: 0 if OK, or a negative error code.
+ */
+static inline int clk_get_by_name_optional(struct udevice *dev,
+  const char *name, struct clk *clk)
+{
+   int ret;
+
+   ret = clk_get_by_name_optional(dev, name, clk);
+   if (ret == -ENODATA)
+   return 0;
+
+   return ret;
+}
+
 /**
  * clk_get_by_name_nodev_optional - Get/request an optinonal clock by name
  * without a device.
-- 
2.33.0



[PATCH v2 1/5] clk: Rename clk_get_optional_nodev

2021-12-22 Thread Sean Anderson
This normalizes the name of this accessor function to put "_optional" last.

Signed-off-by: Sean Anderson 
---

(no changes since v1)

 drivers/clk/clk-uclass.c   | 3 ++-
 drivers/phy/phy-mtk-tphy.c | 8 
 include/clk.h  | 7 ---
 3 files changed, 10 insertions(+), 8 deletions(-)

diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c
index f2d2642754..0ee9a38b15 100644
--- a/drivers/clk/clk-uclass.c
+++ b/drivers/clk/clk-uclass.c
@@ -432,7 +432,8 @@ int clk_get_by_name_nodev(ofnode node, const char *name, 
struct clk *clk)
return clk_get_by_index_nodev(node, index, clk);
 }
 
-int clk_get_optional_nodev(ofnode node, const char *name, struct clk *clk)
+int clk_get_by_name_nodev_optional(ofnode node, const char *name,
+  struct clk *clk)
 {
int ret;
 
diff --git a/drivers/phy/phy-mtk-tphy.c b/drivers/phy/phy-mtk-tphy.c
index 824244b852..2dd964f7b2 100644
--- a/drivers/phy/phy-mtk-tphy.c
+++ b/drivers/phy/phy-mtk-tphy.c
@@ -723,13 +723,13 @@ static int mtk_tphy_probe(struct udevice *dev)
tphy->phys[index] = instance;
index++;
 
-   err = clk_get_optional_nodev(subnode, "ref",
->ref_clk);
+   err = clk_get_by_name_nodev_optional(subnode, "ref",
+>ref_clk);
if (err)
return err;
 
-   err = clk_get_optional_nodev(subnode, "da_ref",
->da_ref_clk);
+   err = clk_get_by_name_nodev_optional(subnode, "da_ref",
+>da_ref_clk);
if (err)
return err;
}
diff --git a/include/clk.h b/include/clk.h
index df5255e510..57c6707a55 100644
--- a/include/clk.h
+++ b/include/clk.h
@@ -194,7 +194,7 @@ int clk_get_by_name(struct udevice *dev, const char *name, 
struct clk *clk);
 int clk_get_by_name_nodev(ofnode node, const char *name, struct clk *clk);
 
 /**
- * clk_get_optional_nodev - Get/request an optinonal clock by name
+ * clk_get_by_name_nodev_optional - Get/request an optinonal clock by name
  * without a device.
  * @node:  The client ofnode.
  * @name:  The name of the clock to request.
@@ -206,7 +206,8 @@ int clk_get_by_name_nodev(ofnode node, const char *name, 
struct clk *clk);
  * no clock producer, in this case, skip the error number -ENODATA, and
  * the function returns 0.
  */
-int clk_get_optional_nodev(ofnode node, const char *name, struct clk *clk);
+int clk_get_by_name_nodev_optional(ofnode node, const char *name,
+  struct clk *clk);
 
 /**
  * devm_clk_get - lookup and obtain a managed reference to a clock producer.
@@ -291,7 +292,7 @@ clk_get_by_name_nodev(ofnode node, const char *name, struct 
clk *clk)
 }
 
 static inline int
-clk_get_optional_nodev(ofnode node, const char *name, struct clk *clk)
+clk_get_by_name_nodev_optional(ofnode node, const char *name, struct clk *clk)
 {
return -ENOSYS;
 }
-- 
2.33.0



[PATCH] riscv: cancel the limitation that NR_CPUS is less than or equal to 32

2021-12-22 Thread Xiang W
Various specifications of riscv allow the number of hart to be
greater than 32. The limit of 32 is determined by
gd->arch.available_harts. We can eliminate this limitation through
bitmaps. Currently, the number of hart is limited to 4095, and 4095
is the limit of the RISC-V Advanced Core Local Interruptor
Specification.

Test on sifive unmatched.

Signed-off-by: Xiang W 
---
 arch/riscv/Kconfig   |  4 ++--
 arch/riscv/cpu/start.S   | 19 ++-
 arch/riscv/include/asm/global_data.h |  4 +++-
 arch/riscv/lib/smp.c |  2 +-
 4 files changed, 20 insertions(+), 9 deletions(-)

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index ba29e70acf..7b9c7f5bca 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -220,8 +220,8 @@ config SPL_SMP
  all, single processor machines.
 
 config NR_CPUS
-   int "Maximum number of CPUs (2-32)"
-   range 2 32
+   int "Maximum number of CPUs (2-4095)"
+   range 2 4095
depends on SMP || SPL_SMP
default 8
help
diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S
index 76850ec9be..1f97240713 100644
--- a/arch/riscv/cpu/start.S
+++ b/arch/riscv/cpu/start.S
@@ -166,11 +166,20 @@ wait_for_gd_init:
mv  gp, s0
 
/* register available harts in the available_harts mask */
-   li  t1, 1
-   sll t1, t1, tp
-   LREGt2, GD_AVAILABLE_HARTS(gp)
-   or  t2, t2, t1
-   SREGt2, GD_AVAILABLE_HARTS(gp)
+   LREGt1, GD_AVAILABLE_HARTS(gp)
+#if defined(CONFIG_ARCH_RV64I)
+   srlit2, tp, 6
+   sllit2, t2, 3
+#elif defined(CONFIG_ARCH_RV32I)
+   srlit2, tp, 5
+   sllit2, t2, 2
+#endif
+   add t1, t1, t2
+   LREGt2, 0(t1)
+   li  t3, 1
+   sll t3, t3, tp
+   or  t2, t2, t3
+   SREGt2, 0(t1)
 
amoswap.w.rl zero, zero, 0(t0)
 
diff --git a/arch/riscv/include/asm/global_data.h 
b/arch/riscv/include/asm/global_data.h
index 095484a635..6de2ee0b25 100644
--- a/arch/riscv/include/asm/global_data.h
+++ b/arch/riscv/include/asm/global_data.h
@@ -10,9 +10,11 @@
 #ifndef__ASM_GBL_DATA_H
 #define __ASM_GBL_DATA_H
 
+#include 
 #include 
 #include 
 #include 
+#include 
 
 /* Architecture-specific global data */
 struct arch_global_data {
@@ -28,7 +30,7 @@ struct arch_global_data {
struct ipi_data ipi[CONFIG_NR_CPUS];
 #endif
 #ifndef CONFIG_XIP
-   ulong available_harts;
+   ulong available_harts[BITS_TO_LONGS(CONFIG_NR_CPUS)];
 #endif
 };
 
diff --git a/arch/riscv/lib/smp.c b/arch/riscv/lib/smp.c
index ba992100ad..e8e391fd41 100644
--- a/arch/riscv/lib/smp.c
+++ b/arch/riscv/lib/smp.c
@@ -47,7 +47,7 @@ static int send_ipi_many(struct ipi_data *ipi, int wait)
 
 #ifndef CONFIG_XIP
/* skip if hart is not available */
-   if (!(gd->arch.available_harts & (1 << reg)))
+   if (!test_bit(reg, gd->arch.available_harts))
continue;
 #endif
 
-- 
2.30.2



Re: [PATCH] console: usb: kbd: Limit poll frequency to improve performance

2021-12-22 Thread Marek Vasut

On 12/22/21 19:20, Mark Kettenis wrote:

From: Thomas Watson 
Date: Tue, 21 Dec 2021 19:36:16 -0600

Using the XHCI driver, the function `usb_kbd_poll_for_event` takes
30-40ms to run. The exact time is dependent on the polling interval the
keyboard requests in its descriptor, and likely cannot be significantly
reduced without major rework to the XHCI driver.

The U-Boot EFI console service sets a timer to poll the keyboard every 5
microseconds, and this timer is checked every time a block is read off
disk. The net effect is that, on my system, loading a ~40MiB kernel and
initrd takes about 62 seconds with a slower keyboard and 53 seconds
with a faster one, with the vast majority of the time spent polling the
keyboard.

To solve this problem, this patch adds a 20ms delay between consecutive
calls to `usb_kbd_poll_for_event`. This is sufficient to reduce the
total loading time to under half a second for both keyboards, and does
not impact the perceived keystroke latency.

Signed-off-by: Thomas Watson 
---


I can confirm that plugging in a usb keyboard makes loading a kernel
annoyingly slow when booting through EFI.  And this looks like a
reasonable approach to fix this to me.  Minor nit: I think you should
reflow the comment you're adding such that it fits within the standard
80 character line limit.


That, and please make sure the patch applies on u-boot/master (currently 
it does not). Use git send-email if your mailer reformats the patches.


Re: [PATCH] usb: ehci-mx6: Enable OTG detection on imx8mm and imx8mn

2021-12-22 Thread Marek Vasut

On 12/22/21 13:52, Adam Ford wrote:

The imx8mm and imx8mn appear compatible with imx7d-usb
flags in the OTG driver.  If the dr_mode is defined as
host or peripheral, the device appears to operate correctly,
however the auto host/peripheral detection results in an error.

Simply adding checks in ehci_usb_phy_mode for 8mm and
8mn in ehci_usb_phy_mode is not enough, because ehci_usb_of_to_plat
is run before the clock is enabled which results in a hang.

Enable the USB clock in ehci_usb_of_to_plat and add checks in
ehci_usb_phy_mode for 8mm and 8mn to enable auto detection of
the OTG mode on i.MX8M Mini and Nano.


I was under the impression that of_to_plat() was meant to parse DT into 
driver local data, so frobbing with clock there could be a problem, 
right ? +CC Simon.



diff --git a/drivers/usb/host/ehci-mx6.c b/drivers/usb/host/ehci-mx6.c
index 1bd6147c76..fa0798171b 100644
--- a/drivers/usb/host/ehci-mx6.c
+++ b/drivers/usb/host/ehci-mx6.c
@@ -543,7 +543,7 @@ static int ehci_usb_phy_mode(struct udevice *dev)
plat->init_type = USB_INIT_DEVICE;
else
plat->init_type = USB_INIT_HOST;
-   } else if (is_mx7()) {
+   } else if (is_mx7() || is_imx8mm() || is_imx8mn()) {
phy_status = (void __iomem *)(addr +
  USBNC_PHY_STATUS_OFFSET);
val = readl(phy_status);
@@ -561,11 +561,30 @@ static int ehci_usb_phy_mode(struct udevice *dev)
  
  static int ehci_usb_of_to_plat(struct udevice *dev)

  {
+#if CONFIG_IS_ENABLED(CLK)
+   int ret = 0;
+   struct ehci_mx6_priv_data *priv = dev_get_priv(dev);
+
+   ret = clk_get_by_index(dev, 0, >clk);
+   if (ret < 0)
+   return ret;
+
+   ret = clk_enable(>clk);
+   if (ret)
+   return ret;
+#endif
+
struct usb_plat *plat = dev_get_plat(dev);
enum usb_dr_mode dr_mode;
  
  	dr_mode = usb_get_dr_mode(dev_ofnode(dev));
  
+#if CONFIG_IS_ENABLED(CLK)

+   ret = clk_disable(>clk);
+   if (ret)
+   return ret;
+#endif
+
switch (dr_mode) {
case USB_DR_MODE_HOST:
plat->init_type = USB_INIT_HOST;


Re: [PATCH] console: usb: kbd: Limit poll frequency to improve performance

2021-12-22 Thread Mark Kettenis
> From: Thomas Watson 
> Date: Tue, 21 Dec 2021 19:36:16 -0600
> 
> Using the XHCI driver, the function `usb_kbd_poll_for_event` takes
> 30-40ms to run. The exact time is dependent on the polling interval the
> keyboard requests in its descriptor, and likely cannot be significantly
> reduced without major rework to the XHCI driver.
> 
> The U-Boot EFI console service sets a timer to poll the keyboard every 5
> microseconds, and this timer is checked every time a block is read off
> disk. The net effect is that, on my system, loading a ~40MiB kernel and
> initrd takes about 62 seconds with a slower keyboard and 53 seconds
> with a faster one, with the vast majority of the time spent polling the
> keyboard.
> 
> To solve this problem, this patch adds a 20ms delay between consecutive
> calls to `usb_kbd_poll_for_event`. This is sufficient to reduce the
> total loading time to under half a second for both keyboards, and does
> not impact the perceived keystroke latency.
> 
> Signed-off-by: Thomas Watson 
> ---

I can confirm that plugging in a usb keyboard makes loading a kernel
annoyingly slow when booting through EFI.  And this looks like a
reasonable approach to fix this to me.  Minor nit: I think you should
reflow the comment you're adding such that it fits within the standard
80 character line limit.


> common/usb_kbd.c | 20 +++-
> 1 file changed, 15 insertions(+), 5 deletions(-)
> 
> diff --git a/common/usb_kbd.c b/common/usb_kbd.c
> index afad260d3d..0131b7dfab 100644
> --- a/common/usb_kbd.c
> +++ b/common/usb_kbd.c
> @@ -118,7 +118,7 @@ struct usb_kbd_pdata {
> extern int __maybe_unused net_busy_flag;
> 
> /* The period of time between two calls of usb_kbd_testc(). */
> -static unsigned long __maybe_unused kbd_testc_tms;
> +static unsigned long kbd_testc_tms;
> 
> /* Puts character in the queue and sets up the in and out pointer. */
> static void usb_kbd_put_queue(struct usb_kbd_pdata *data, u8 c)
> @@ -394,21 +394,31 @@ static int usb_kbd_testc(struct stdio_dev *sdev)
>   struct usb_device *usb_kbd_dev;
>   struct usb_kbd_pdata *data;
> 
> + /*
> +  * Polling the keyboard for an event can take dozens of milliseconds. 
> Add a
> +  * delay between polls to avoid blocking activity which polls rapidly, 
> like
> +  * the UEFI console timer.
> +  */
> + unsigned long poll_delay = CONFIG_SYS_HZ / 50;
> +
> #ifdef CONFIG_CMD_NET
>   /*
>* If net_busy_flag is 1, NET transfer is running,
>* then we check key-pressed every second (first check may be
>* less than 1 second) to improve TFTP booting performance.
>*/
> - if (net_busy_flag && (get_timer(kbd_testc_tms) < CONFIG_SYS_HZ))
> - return 0;
> - kbd_testc_tms = get_timer(0);
> + if (net_busy_flag)
> + poll_delay = CONFIG_SYS_HZ;
> #endif
> +
>   dev = stdio_get_by_name(sdev->name);
>   usb_kbd_dev = (struct usb_device *)dev->priv;
>   data = usb_kbd_dev->privptr;
> 
> - usb_kbd_poll_for_event(usb_kbd_dev);
> + if (get_timer(kbd_testc_tms) >= poll_delay) {
> + usb_kbd_poll_for_event(usb_kbd_dev);
> + kbd_testc_tms = get_timer(0);
> + }
> 
>   return !(data->usb_in_pointer == data->usb_out_pointer);
> }
> -- 
> 2.17.1
> 
> 


Re: [PATCH] usb: ehci-mx6: Enable OTG detection on imx8mm and imx8mn

2021-12-22 Thread Marek Vasut

On 12/22/21 21:08, Adam Ford wrote:

On Wed, Dec 22, 2021 at 1:31 PM Marek Vasut  wrote:


On 12/22/21 13:52, Adam Ford wrote:

The imx8mm and imx8mn appear compatible with imx7d-usb
flags in the OTG driver.  If the dr_mode is defined as
host or peripheral, the device appears to operate correctly,
however the auto host/peripheral detection results in an error.

Simply adding checks in ehci_usb_phy_mode for 8mm and
8mn in ehci_usb_phy_mode is not enough, because ehci_usb_of_to_plat
is run before the clock is enabled which results in a hang.

Enable the USB clock in ehci_usb_of_to_plat and add checks in
ehci_usb_phy_mode for 8mm and 8mn to enable auto detection of
the OTG mode on i.MX8M Mini and Nano.


I was under the impression that of_to_plat() was meant to parse DT into
driver local data, so frobbing with clock there could be a problem,
right ? +CC Simon.



If that's true, we'll likely need to move the functions from
ehci_usb_of_to_plat to the probe function to run after the clocks are
enabled, because the call to usb_get_dr_mode hangs without the clocks
running.  usb_get_dr_mode tells the driver if it's a host or device mode.


Yes and this does not work, because you need to know whether the IP is 
in host and gadget mode before probe happens I think. Indeed, that's why 
OTG is unsupported thus far. But please do dig in and try to find a 
proper solution.



We could make a temporary clock instead of passing the clock to the priv
structure.  I intentionally shut the clock off as soon as we're finished
reading the register so it didn't collide with the existing functions.


[...]


Re: [RFC PATCH v2 7/8] FWU: Add support for FWU Multi Bank Update feature

2021-12-22 Thread Masami Hiramatsu
Hi Sughosh,

Can you move the FWU related configs to lib/fwu_updates/Kconfig ?
FWU multi bank update is an independent feature, thus I think it is
better to have its own Kconfig file and the lib/Kconfig only includes
it.
(I did it on my development series)

Thank you,

2021年12月19日(日) 16:07 Sughosh Ganu :
>
> The FWU Multi Bank Update feature supports updation of firmware images
> to one of multiple sets(also called banks) of images. The firmware
> images are clubbed together in banks, with the system booting images
> from the active bank. Information on the images such as which bank
> they belong to is stored as part of the metadata structure, which is
> stored on the same storage media as the firmware images on a dedicated
> partition.
>
> At the time of update, the metadata is read to identify the bank to
> which the images need to be flashed(update bank). On a successful
> update, the metadata is modified to set the updated bank as active
> bank to subsequently boot from.
>
> Signed-off-by: Sughosh Ganu 
> ---
> Changes since V1:
> * Call function fwu_update_checks_pass to check if the
>   update can be initiated
> * Do not allow firmware update from efi_init_obj_list as the
>   fwu boot-time checks need to be run
>
>  include/fwu.h|  18 +++-
>  lib/Kconfig  |  32 ++
>  lib/Makefile |   1 +
>  lib/efi_loader/efi_capsule.c | 198 ++-
>  lib/efi_loader/efi_setup.c   |   3 +-
>  lib/fwu_updates/Makefile |  11 ++
>  lib/fwu_updates/fwu.c|  27 +
>  7 files changed, 284 insertions(+), 6 deletions(-)
>  create mode 100644 lib/fwu_updates/Makefile
>
> diff --git a/include/fwu.h b/include/fwu.h
> index 2d2e674d6a..bf50fe9277 100644
> --- a/include/fwu.h
> +++ b/include/fwu.h
> @@ -10,14 +10,28 @@
>
>  #include 
>
> -#define FWU_MDATA_VERSION  0x1
> +#define FWU_MDATA_GUID \
> +   EFI_GUID(0x8a7a84a0, 0x8387, 0x40f6, 0xab, 0x41, \
> +0xa8, 0xb9, 0xa5, 0xa6, 0x0d, 0x23)
> +
> +#define FWU_OS_REQUEST_FW_REVERT_GUID \
> +   EFI_GUID(0xacd58b4b, 0xc0e8, 0x475f, 0x99, 0xb5, \
> +0x6b, 0x3f, 0x7e, 0x07, 0xaa, 0xf0)
> +
> +#define FWU_OS_REQUEST_FW_ACCEPT_GUID \
> +   EFI_GUID(0x0c996046, 0xbcc0, 0x4d04, 0x85, 0xec, \
> +0xe1, 0xfc, 0xed, 0xf1, 0xc6, 0xf8)
>
>  #define FWU_MDATA_GUID \
> EFI_GUID(0x8a7a84a0, 0x8387, 0x40f6, 0xab, 0x41, \
>  0xa8, 0xb9, 0xa5, 0xa6, 0x0d, 0x23)
>
> -int fwu_boottime_checks(void);
> +#define FWU_MDATA_VERSION  0x1
> +#define FWU_IMAGE_ACCEPTED 0x1
> +
>  u8 fwu_update_checks_pass(void);
> +int fwu_boottime_checks(void);
> +int fwu_trial_state_ctr_start(void);
>
>  int fwu_get_active_index(u32 *active_idx);
>  int fwu_update_active_index(u32 active_idx);
> diff --git a/lib/Kconfig b/lib/Kconfig
> index 807a4c6ade..7cb306317c 100644
> --- a/lib/Kconfig
> +++ b/lib/Kconfig
> @@ -835,3 +835,35 @@ config PHANDLE_CHECK_SEQ
>   When there are multiple device tree nodes with same name,
>enable this config option to distinguish them using
>   phandles in fdtdec_get_alias_seq() function.
> +
> +config FWU_MULTI_BANK_UPDATE
> +   bool "Enable FWU Multi Bank Update Feature"
> +   depends on EFI_HAVE_CAPSULE_SUPPORT
> +   select PARTITION_TYPE_GUID
> +   select EFI_SETUP_EARLY
> +   help
> + Feature for updating firmware images on platforms having
> + multiple banks(copies) of the firmware images. One of the
> + bank is selected for updating all the firmware components
> +
> +config FWU_NUM_BANKS
> +   int "Number of Banks defined by the platform"
> +   depends on FWU_MULTI_BANK_UPDATE
> +   help
> + Define the number of banks of firmware images on a platform
> +
> +config FWU_NUM_IMAGES_PER_BANK
> +   int "Number of firmware images per bank"
> +   depends on FWU_MULTI_BANK_UPDATE
> +   help
> + Define the number of firmware images per bank. This value
> + should be the same for all the banks.
> +
> +config FWU_TRIAL_STATE_CNT
> +   int "Number of times system boots in Trial State"
> +   depends on FWU_MULTI_BANK_UPDATE
> +   default 3
> +   help
> + With FWU Multi Bank Update feature enabled, number of times
> + the platform is allowed to boot in Trial State after an
> + update.
> diff --git a/lib/Makefile b/lib/Makefile
> index 5ddbc77ed6..bc5c1e22fc 100644
> --- a/lib/Makefile
> +++ b/lib/Makefile
> @@ -9,6 +9,7 @@ obj-$(CONFIG_EFI) += efi/
>  obj-$(CONFIG_EFI_LOADER) += efi_driver/
>  obj-$(CONFIG_EFI_LOADER) += efi_loader/
>  obj-$(CONFIG_CMD_BOOTEFI_SELFTEST) += efi_selftest/
> +obj-$(CONFIG_FWU_MULTI_BANK_UPDATE) += fwu_updates/
>  obj-$(CONFIG_LZMA) += lzma/
>  obj-$(CONFIG_BZIP2) += bzip2/
>  obj-$(CONFIG_TIZEN) += tizen/
> diff --git a/lib/efi_loader/efi_capsule.c b/lib/efi_loader/efi_capsule.c
> index 8301eed631..6dfe56bb0f 100644
> --- 

[PATCH 1/4] drivers: Introduce vibrator uclass

2021-12-22 Thread Samuel Dionne-Riel
Signed-off-by: Samuel Dionne-Riel 
---
 arch/sandbox/dts/test.dts  | 10 +++
 configs/sandbox_defconfig  |  2 +
 drivers/Kconfig|  2 +
 drivers/Makefile   |  1 +
 drivers/vibrator/Kconfig   | 21 +++
 drivers/vibrator/Makefile  |  5 ++
 drivers/vibrator/vibrator-uclass.c | 62 +++
 include/dm/uclass-id.h |  1 +
 include/vibrator.h | 87 +++
 test/dm/Makefile   |  1 +
 test/dm/vibrator.c | 97 ++
 11 files changed, 289 insertions(+)
 create mode 100644 drivers/vibrator/Kconfig
 create mode 100644 drivers/vibrator/Makefile
 create mode 100644 drivers/vibrator/vibrator-uclass.c
 create mode 100644 include/vibrator.h
 create mode 100644 test/dm/vibrator.c

diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index 2cea4a43c8..3633b8fb9f 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -1608,6 +1608,16 @@
compatible = "sandbox,regmap_test";
};
};
+
+   vibrator_left {
+   compatible = "gpio-vibrator";
+   enable-gpios = <_a 1 0 GPIO_ACTIVE_HIGH>;
+   };
+
+   vibrator_right {
+   compatible = "gpio-vibrator";
+   enable-gpios = <_a 2 0 GPIO_ACTIVE_HIGH>;
+   };
 };
 
 #include "sandbox_pmic.dtsi"
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index c390afe9de..43f9972178 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -273,6 +273,8 @@ CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_USB_ETHER=y
 CONFIG_USB_ETH_CDC=y
+CONFIG_VIBRATOR=y
+CONFIG_VIBRATOR_GPIO=y
 CONFIG_DM_VIDEO=y
 CONFIG_VIDEO_COPY=y
 CONFIG_CONSOLE_ROTATION=y
diff --git a/drivers/Kconfig b/drivers/Kconfig
index b26ca8cf70..a15674f22c 100644
--- a/drivers/Kconfig
+++ b/drivers/Kconfig
@@ -134,6 +134,8 @@ source "drivers/usb/Kconfig"
 
 source "drivers/ufs/Kconfig"
 
+source "drivers/vibrator/Kconfig"
+
 source "drivers/video/Kconfig"
 
 source "drivers/virtio/Kconfig"
diff --git a/drivers/Makefile b/drivers/Makefile
index 4e7cf28440..2290d4a5d8 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -29,6 +29,7 @@ obj-$(CONFIG_$(SPL_TPL_)RTC) += rtc/
 obj-$(CONFIG_$(SPL_TPL_)SERIAL) += serial/
 obj-$(CONFIG_$(SPL_TPL_)SPI) += spi/
 obj-$(CONFIG_$(SPL_TPL_)TIMER) += timer/
+obj-$(CONFIG_$(SPL_TPL_)VIBRATOR) += vibrator/
 obj-$(CONFIG_$(SPL_TPL_)VIRTIO) += virtio/
 obj-$(CONFIG_$(SPL_)DM_MAILBOX) += mailbox/
 obj-$(CONFIG_$(SPL_)REMOTEPROC) += remoteproc/
diff --git a/drivers/vibrator/Kconfig b/drivers/vibrator/Kconfig
new file mode 100644
index 00..f988aa63b9
--- /dev/null
+++ b/drivers/vibrator/Kconfig
@@ -0,0 +1,21 @@
+menu "Vibrator Feedback Support"
+
+config VIBRATOR
+   bool "Enable vibration motor support"
+   depends on DM
+   help
+ Many boards have vibration motorss which can be used to signal status 
or
+ alerts. U-Boot provides a uclass API to implement this feature. 
Vibration
+ motor drivers can provide access to board-specific vibration motors. 
Use
+ of the device tree for configuration is encouraged.
+
+config SPL_VIBRATOR
+   bool "Enable vibration motor support in SPL"
+   depends on SPL && SPL_DM
+   help
+ The vibration motor subsystem adds a small amount of overhead to the 
image.
+ If this is acceptable and you have a need to use vibration motors in 
SPL,
+ enable this option. You will need to enable device tree in SPL
+ for this to work.
+
+endmenu
diff --git a/drivers/vibrator/Makefile b/drivers/vibrator/Makefile
new file mode 100644
index 00..326838ff7a
--- /dev/null
+++ b/drivers/vibrator/Makefile
@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (c) 2021 Samuel Dionne-Riel 
+
+obj-y += vibrator-uclass.o
diff --git a/drivers/vibrator/vibrator-uclass.c 
b/drivers/vibrator/vibrator-uclass.c
new file mode 100644
index 00..ffb6522a19
--- /dev/null
+++ b/drivers/vibrator/vibrator-uclass.c
@@ -0,0 +1,62 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2021 Samuel Dionne-Riel 
+ * Copyright (c) 2015 Google, Inc
+ * Largely derived from `drivers/led/led-uclass.c`
+ * Original written by Simon Glass 
+ */
+
+#define LOG_CATEGORY UCLASS_VIBRATOR
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+int vibrator_get_by_label(const char *label, struct udevice **devp)
+{
+   struct udevice *dev;
+   struct uclass *uc;
+   int ret;
+
+   ret = uclass_get(UCLASS_VIBRATOR, );
+   if (ret)
+   return ret;
+   uclass_foreach_dev(dev, uc) {
+   struct vibrator_uc_plat *uc_plat = dev_get_uclass_plat(dev);
+
+   if (uc_plat->label && strcmp(label, uc_plat->label) == 0)
+   return 

[PATCH 3/4] cmd: Add vibrator command

2021-12-22 Thread Samuel Dionne-Riel
Signed-off-by: Samuel Dionne-Riel 
---
 cmd/Kconfig|  10 
 cmd/Makefile   |   1 +
 cmd/vibrator.c | 148 +
 3 files changed, 159 insertions(+)
 create mode 100644 cmd/vibrator.c

diff --git a/cmd/Kconfig b/cmd/Kconfig
index e538e69a11..51e79ad806 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -1391,6 +1391,16 @@ config CMD_PVBLOCK
help
  Xen para-virtualized block device support
 
+config CMD_VIBRATOR
+   bool "vibrator"
+   depends on VIBRATOR
+   default y if VIBRATOR
+   help
+ Enable the 'vibrator' command which allows for control of vibrator
+ motors available on the board. The vibrator motors can be listed with
+ 'vibrator list' and controlled with vibrator on/off/time. Any
+ vibrator driver can be controlled with this command.
+
 config CMD_VIRTIO
bool "virtio"
depends on VIRTIO
diff --git a/cmd/Makefile b/cmd/Makefile
index 6c4db4ed2e..49bf184bd9 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -164,6 +164,7 @@ obj-$(CONFIG_CMD_UBIFS) += ubifs.o
 obj-$(CONFIG_CMD_UNIVERSE) += universe.o
 obj-$(CONFIG_CMD_UNLZ4) += unlz4.o
 obj-$(CONFIG_CMD_UNZIP) += unzip.o
+obj-$(CONFIG_CMD_VIBRATOR) += vibrator.o
 obj-$(CONFIG_CMD_VIRTIO) += virtio.o
 obj-$(CONFIG_CMD_WDT) += wdt.o
 obj-$(CONFIG_CMD_LZMADEC) += lzmadec.o
diff --git a/cmd/vibrator.c b/cmd/vibrator.c
new file mode 100644
index 00..b77cb4867a
--- /dev/null
+++ b/cmd/vibrator.c
@@ -0,0 +1,148 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2021 Samuel Dionne-Riel 
+ * Copyright (c) 2017 Google, Inc
+ * Largely derived from `cmd/led.c`
+ * Original written by Simon Glass 
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+static const char *const state_label[] = {
+   [VIBRATOR_STATE_OFF]= "off",
+   [VIBRATOR_STATE_ON] = "on",
+   [VIBRATOR_STATE_TOGGLE] = "toggle",
+};
+
+enum vibrator_state_t get_vibrator_cmd(char *var)
+{
+   int i;
+
+   for (i = 0; i < VIBRATOR_STATE_COUNT; i++) {
+   if (!strncmp(var, state_label[i], strlen(var)))
+   return i;
+   }
+
+   return -1;
+}
+
+static int show_vibrator_state(struct udevice *dev)
+{
+   int ret;
+
+   ret = vibrator_get_state(dev);
+   if (ret >= VIBRATOR_STATE_COUNT)
+   ret = -EINVAL;
+   if (ret >= 0)
+   printf("%s\n", state_label[ret]);
+
+   return ret;
+}
+
+static int list_vibrators(void)
+{
+   struct udevice *dev;
+   int ret;
+
+   for (uclass_find_first_device(UCLASS_VIBRATOR, );
+dev;
+uclass_find_next_device()) {
+   struct vibrator_uc_plat *plat = dev_get_uclass_plat(dev);
+
+   if (!plat->label)
+   continue;
+   printf("%-15s ", plat->label);
+   if (device_active(dev)) {
+   ret = show_vibrator_state(dev);
+   if (ret < 0)
+   printf("Error %d\n", ret);
+   } else {
+   printf("\n");
+   }
+   }
+
+   return 0;
+}
+
+int timed_vibration(struct udevice *dev, int duration_ms)
+{
+   int ret;
+
+   ret = vibrator_set_state(dev, VIBRATOR_STATE_ON);
+   if (ret < 0) {
+   printf("Vibrator operation failed (err=%d)\n", ret);
+   return CMD_RET_FAILURE;
+   }
+
+   udelay(duration_ms * 1000);
+
+   ret = vibrator_set_state(dev, VIBRATOR_STATE_OFF);
+   if (ret < 0) {
+   printf("Vibrator operation failed (err=%d)\n", ret);
+   return CMD_RET_FAILURE;
+   }
+
+   return CMD_RET_SUCCESS;
+}
+
+int do_vibrator(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
+{
+   enum vibrator_state_t cmd;
+   const char *vibrator_label;
+   struct udevice *dev;
+   int ret;
+   int duration_ms = 0;
+
+   /* Validate arguments */
+   if (argc < 2)
+   return CMD_RET_USAGE;
+   vibrator_label = argv[1];
+   if (strncmp(vibrator_label, "list", 4) == 0)
+   return list_vibrators();
+
+   cmd = argc > 2 ? get_vibrator_cmd(argv[2]) : VIBRATOR_STATE_COUNT;
+   ret = vibrator_get_by_label(vibrator_label, );
+   if (ret) {
+   printf("Vibrator '%s' not found (err=%d)\n", vibrator_label, 
ret);
+   return CMD_RET_FAILURE;
+   }
+
+   if (strncmp(argv[2], "timed", 5) == 0) {
+   if (argc < 4)
+   return CMD_RET_USAGE;
+   duration_ms = dectoul(argv[3], NULL);
+
+   return timed_vibration(dev, duration_ms);
+   }
+
+   switch (cmd) {
+   case VIBRATOR_STATE_OFF:
+   case VIBRATOR_STATE_ON:
+   case VIBRATOR_STATE_TOGGLE:
+   ret = vibrator_set_state(dev, cmd);
+   break;
+   case VIBRATOR_STATE_COUNT:
+

[PATCH 4/4] pinephone_defconfig: Add gpio vibrator support

2021-12-22 Thread Samuel Dionne-Riel
Signed-off-by: Samuel Dionne-Riel 
Cc: Samuel Holland 
---
 configs/pinephone_defconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/configs/pinephone_defconfig b/configs/pinephone_defconfig
index 9d39204a43..72aaa4ea94 100644
--- a/configs/pinephone_defconfig
+++ b/configs/pinephone_defconfig
@@ -16,3 +16,5 @@ CONFIG_LED_STATUS_GPIO=y
 CONFIG_LED_STATUS0=y
 CONFIG_LED_STATUS_BIT=114
 CONFIG_LED_STATUS_STATE=2
+CONFIG_VIBRATOR=y
+CONFIG_VIBRATOR_GPIO=y
-- 
2.34.0



[PATCH v2] console: usb: kbd: Limit poll frequency to improve performance

2021-12-22 Thread Thomas Watson
Using the XHCI driver, the function `usb_kbd_poll_for_event` takes
30-40ms to run. The exact time is dependent on the polling interval the
keyboard requests in its descriptor, and likely cannot be significantly
reduced without major rework to the XHCI driver.

The U-Boot EFI console service sets a timer to poll the keyboard every 5
microseconds, and this timer is checked every time a block is read off
disk. The net effect is that, on my system, loading a ~40MiB kernel and
initrd takes about 62 seconds with a slower keyboard and 53 seconds
with a faster one, with the vast majority of the time spent polling the
keyboard.

To solve this problem, this patch adds a 20ms delay between consecutive
calls to `usb_kbd_poll_for_event`. This is sufficient to reduce the
total loading time to under half a second for both keyboards, and does
not impact the perceived keystroke latency.

Signed-off-by: Thomas Watson 
---
This revision wraps the comment at 80 characters and also should not
have been corrupted by my e-mail client.

 common/usb_kbd.c | 20 +++-
 1 file changed, 15 insertions(+), 5 deletions(-)

diff --git a/common/usb_kbd.c b/common/usb_kbd.c
index afad260d3d..5408c821b4 100644
--- a/common/usb_kbd.c
+++ b/common/usb_kbd.c
@@ -118,7 +118,7 @@ struct usb_kbd_pdata {
 extern int __maybe_unused net_busy_flag;
 
 /* The period of time between two calls of usb_kbd_testc(). */
-static unsigned long __maybe_unused kbd_testc_tms;
+static unsigned long kbd_testc_tms;
 
 /* Puts character in the queue and sets up the in and out pointer. */
 static void usb_kbd_put_queue(struct usb_kbd_pdata *data, u8 c)
@@ -394,21 +394,31 @@ static int usb_kbd_testc(struct stdio_dev *sdev)
struct usb_device *usb_kbd_dev;
struct usb_kbd_pdata *data;
 
+   /*
+* Polling the keyboard for an event can take dozens of milliseconds.
+* Add a delay between polls to avoid blocking activity which polls
+* rapidly, like the UEFI console timer.
+*/
+   unsigned long poll_delay = CONFIG_SYS_HZ / 50;
+
 #ifdef CONFIG_CMD_NET
/*
 * If net_busy_flag is 1, NET transfer is running,
 * then we check key-pressed every second (first check may be
 * less than 1 second) to improve TFTP booting performance.
 */
-   if (net_busy_flag && (get_timer(kbd_testc_tms) < CONFIG_SYS_HZ))
-   return 0;
-   kbd_testc_tms = get_timer(0);
+   if (net_busy_flag)
+   poll_delay = CONFIG_SYS_HZ;
 #endif
+
dev = stdio_get_by_name(sdev->name);
usb_kbd_dev = (struct usb_device *)dev->priv;
data = usb_kbd_dev->privptr;
 
-   usb_kbd_poll_for_event(usb_kbd_dev);
+   if (get_timer(kbd_testc_tms) >= poll_delay) {
+   usb_kbd_poll_for_event(usb_kbd_dev);
+   kbd_testc_tms = get_timer(0);
+   }
 
return !(data->usb_in_pointer == data->usb_out_pointer);
 }
-- 
2.31.1



Re: Please pull u-boot-marvell/next

2021-12-22 Thread Tom Rini
On Tue, Dec 21, 2021 at 09:27:09AM +0100, Stefan Roese wrote:

> Hi Tom,
> 
> please pull the following Marvell MVEBU related patches into next:
> 

Applied to u-boot/next, thanks!

-- 
Tom


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Re: [PATCH v3 1/2] binman: Do not pollute source tree when build with `make O=...`

2021-12-22 Thread Simon Glass
Hi Andy,

On Tue, 14 Dec 2021 at 17:33, Simon Glass  wrote:
>
> Importing libraries in Python caches the bytecode by default.
> Since we run scripts in source tree it ignores the current directory
> settings, which is $(srctree), and creates cache just in the middle
> of the source tree. Move cache to the current directory.
>
> Signed-off-by: Andy Shevchenko 
> ---
> v3: avoided crash (Simon), preserved tree hierarchy
>  tools/binman/main.py | 13 -
>  1 file changed, 12 insertions(+), 1 deletion(-)
>
> Applied to u-boot-dm/next, thanks!

I didn't notice this before, but this seems to create files like this:

./tools/binman/usr/lib/python3/dist-packages/elftools/common/construct_utils.cpython-39.pyc

We don't really want to 'recache' the common Python files. Do you
think we should revert this patch, or find another fix?

Regards,
Simon


[PATCH v2 8/8] arm: kirkwood: Pogoplug-V4 : Add board maintainer

2021-12-22 Thread Tony Dinh
Add board maintainer for Pogoplug V4 board

Signed-off-by: Tony Dinh 
---

(no changes since v1)

 board/cloudengines/pogo_v4/MAINTAINERS | 6 ++
 1 file changed, 6 insertions(+)
 create mode 100644 board/cloudengines/pogo_v4/MAINTAINERS

diff --git a/board/cloudengines/pogo_v4/MAINTAINERS 
b/board/cloudengines/pogo_v4/MAINTAINERS
new file mode 100644
index 00..35fd7858b7
--- /dev/null
+++ b/board/cloudengines/pogo_v4/MAINTAINERS
@@ -0,0 +1,6 @@
+POGO_V4 BOARD
+M: Tony Dinh 
+S: Maintained
+F: board/cloudengines/pogo_v4/
+F: include/configs/pogo_v4.h
+F: configs/pogo_v4_defconfig
-- 
2.20.1



[PATCH v2 3/8] arm: kirkwood: Pogoplug-V4 : Add Kconfig files

2021-12-22 Thread Tony Dinh
Add Kconfig files for Pogoplug V4 board

Signed-off-by: Tony Dinh 
---

(no changes since v1)

 arch/arm/mach-kirkwood/Kconfig |  4 
 board/cloudengines/pogo_v4/Kconfig | 16 
 2 files changed, 20 insertions(+)
 create mode 100644 board/cloudengines/pogo_v4/Kconfig

diff --git a/arch/arm/mach-kirkwood/Kconfig b/arch/arm/mach-kirkwood/Kconfig
index cb4e9f29ef..e8ea4a9956 100644
--- a/arch/arm/mach-kirkwood/Kconfig
+++ b/arch/arm/mach-kirkwood/Kconfig
@@ -25,6 +25,9 @@ config TARGET_LSXL
 config TARGET_POGO_E02
bool "pogo_e02 Board"
 
+config TARGET_POGO_V4
+   bool "Pogoplug V4 Board"
+
 config TARGET_DNS325
bool "dns325 Board"
 
@@ -74,6 +77,7 @@ source "board/Marvell/guruplug/Kconfig"
 source "board/Marvell/sheevaplug/Kconfig"
 source "board/buffalo/lsxl/Kconfig"
 source "board/cloudengines/pogo_e02/Kconfig"
+source "board/cloudengines/pogo_v4/Kconfig"
 source "board/d-link/dns325/Kconfig"
 source "board/iomega/iconnect/Kconfig"
 source "board/keymile/Kconfig"
diff --git a/board/cloudengines/pogo_v4/Kconfig 
b/board/cloudengines/pogo_v4/Kconfig
new file mode 100644
index 00..db3b76b4d4
--- /dev/null
+++ b/board/cloudengines/pogo_v4/Kconfig
@@ -0,0 +1,16 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# (C) Copyright 2014-2021 Tony Dinh 
+#
+if TARGET_POGO_V4
+
+config SYS_BOARD
+   default "pogo_v4"
+
+config SYS_VENDOR
+   default "cloudengines"
+
+config SYS_CONFIG_NAME
+   default "pogo_v4"
+
+endif
-- 
2.20.1



[PATCH v2 5/8] arm: kirkwood: Pogoplug-V4 : Add board kwbimage file

2021-12-22 Thread Tony Dinh
Add board kwbimage file for Pogoplug V4 board

Signed-off-by: Tony Dinh 
---

(no changes since v1)

 board/cloudengines/pogo_v4/kwbimage.cfg | 148 
 1 file changed, 148 insertions(+)
 create mode 100644 board/cloudengines/pogo_v4/kwbimage.cfg

diff --git a/board/cloudengines/pogo_v4/kwbimage.cfg 
b/board/cloudengines/pogo_v4/kwbimage.cfg
new file mode 100644
index 00..f6294fe313
--- /dev/null
+++ b/board/cloudengines/pogo_v4/kwbimage.cfg
@@ -0,0 +1,148 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2012
+# David Purdy 
+#
+# Based on Kirkwood support:
+# (C) Copyright 2009
+# Marvell Semiconductor 
+# Written-by: Prafulla Wadaskar  marvell.com>
+
+# Boot Media configurations   (DONE)
+BOOT_FROM  nand
+NAND_ECC_MODE  default
+NAND_PAGE_SIZE 0x0800
+
+# SOC registers configuration using bootrom header extension
+# Maximum KWBIMAGE_MAX_CONFIG configurations allowed
+
+# Configure RGMII-0 interface pad voltage to 1.8V (SHOULD BE SAME)
+DATA 0xffd100e0 0x1b1b1b9b
+
+#Dram initalization for SINGLE x16 CL=3 @ 200MHz   (need CL=3 @ 200MHz?)
+DATA 0xffd01400 0x43000618 # DDR Configuration register
+# bit13-0:  0x200 (200 DDR2 clks refresh rate)
+# bit23-14: zero
+# bit24: 1= enable exit self refresh mode on DDR access
+# bit25: 1 required
+# bit29-26: zero
+# bit31-30: 01
+
+DATA 0xffd01404 0x34143000 # DDR Controller Control Low
+# bit 4:0=addr/cmd in smame cycle
+# bit 5:0=clk is driven during self refresh, we don't care for APX
+# bit 6:0=use recommended falling edge of clk for addr/cmd
+# bit14:0=input buffer always powered up
+# bit18:1=cpu lock transaction enabled
+# bit23-20: 3=recommended value for CL=3 and STARTBURST_DEL disabled bit31=0
+# bit27-24: 6= CL+3, STARTBURST sample stages, for freqs 400MHz, unbuffered 
DIMM
+# bit30-28: 3 required
+# bit31:0=no additional STARTBURST delay
+
+DATA 0xffd01408 0x11012227 # DDR Timing (Low) (active cycles value +1)
+# bit3-0:   TRAS lsbs
+# bit7-4:   TRCD
+# bit11- 8: TRP
+# bit15-12: TWR
+# bit19-16: TWTR
+# bit20:TRAS msb
+# bit23-21: 0x0
+# bit27-24: TRRD
+# bit31-28: TRTP
+
+DATA 0xffd0140c 0x0819 #  DDR Timing (High)
+# bit6-0:   TRFC
+# bit8-7:   TR2R
+# bit10-9:  TR2W
+# bit12-11: TW2W
+# bit31-13: zero required
+
+DATA 0xffd01410 0x0001 #  DDR Address Control  (changed to Dockstar 
vals)
+# bit1-0:   00, Cs0width=x16
+# bit3-2:   10, Cs0size=512Mb
+# bit5-4:   00, Cs2width=nonexistent
+# bit7-6:   00, Cs1size =nonexistent
+# bit9-8:   00, Cs2width=nonexistent
+# bit11-10: 00, Cs2size =nonexistent
+# bit13-12: 00, Cs3width=nonexistent
+# bit15-14: 00, Cs3size =nonexistent
+# bit16:0,  Cs0AddrSel
+# bit17:0,  Cs1AddrSel
+# bit18:0,  Cs2AddrSel
+# bit19:0,  Cs3AddrSel
+# bit31-20: 0 required
+
+DATA 0xffd01414 0x #  DDR Open Pages Control
+# bit0:0,  OpenPage enabled
+# bit31-1: 0 required
+
+DATA 0xffd01418 0x #  DDR Operation
+# bit3-0:   0x0, DDR cmd
+# bit31-4:  0 required
+
+DATA 0xffd0141c 0x0632 #  DDR Mode
+# bit2-0:   2, BurstLen=2 required
+# bit3: 0, BurstType=0 required
+# bit6-4:   4, CL=5(<= change to CL=3 ?)
+# bit7: 0, TestMode=0 normal
+# bit8: 0, DLL reset=0 normal
+# bit11-9:  6, auto-precharge write recovery 
+# bit12:0, PD must be zero
+# bit31-13: 0 required
+
+DATA 0xffd01420 0x0040 #  DDR Extended Mode
+# bit0:0,  DDR DLL enabled
+# bit1:0,  DDR drive strenght normal
+# bit2:0,  DDR ODT control lsd (disabled)
+# bit5-3:  000, required
+# bit6:1,  DDR ODT control msb, (disabled)
+# bit9-7:  000, required
+# bit10:   0,  differential DQS enabled
+# bit11:   0, required
+# bit12:   0, DDR output buffer enabled
+# bit31-13: 0 required
+
+DATA 0xffd01424 0xF07F #  DDR Controller Control High
+# bit2-0:  111, required
+# bit3  :  1  , MBUS Burst Chop disabled
+# bit6-4:  111, required
+# bit7  :  0
+# bit8  :  0  , no sample stage
+# bit9  :  0  , no half clock cycle addition to dataout
+# bit10 :  0  , 1/4 clock cycle skew enabled for addr/ctl signals
+# bit11 :  0  , 1/4 clock cycle skew disabled for write mesh
+# bit15-12:  required
+# bit31-16: 0required
+
+DATA 0xffd01428 0x00085520 # DDR2 ODT Read Timing (default values)
+DATA 0xffd0147c 0x8552 # DDR2 ODT Write Timing (default values)
+
+DATA 0xFFD01500 0x # CS[0]n Base address to 0x0
+DATA 0xFFD01504 0x07F1 # CS[0]n Size
+# bit0:1,  Window enabled
+# bit1:0,  Write Protect disabled
+# bit3-2:  00, CS0 hit selected
+# bit23-4: ones, required
+# bit31-24: 0x07, Size (i.e. 128MB)
+
+DATA 0xFFD0150C 0x # CS[1]n Size, window disabled
+DATA 0xFFD01514 0x # CS[2]n Size, window disabled
+DATA 0xFFD0151C 0x # CS[3]n Size, window disabled
+
+DATA 0xffd01494 0x0003 #  DDR ODT Control (Low) (DONE)
+# bit3-0:  2, ODT0Rd, MODT[0] asserted during 

[PATCH v2 7/8] arm: kirkwood: Pogoplug-V4 : Add board implementation

2021-12-22 Thread Tony Dinh
Add board implementation for Pogoplug V4

Note: currently the fdt_get_phy_addr function in this file is
duplicate in this board and many other Kirkwood boards
(eg. Sheevaplug, GoFlex Home, etc.). This function is being
factored out into common area by another patch. And because it
was written for flattree only, the patch is being rewritten to
use livetree calls.

Signed-off-by: Tony Dinh 
---

Changes in v2:
Merge constants from header file.

 board/cloudengines/pogo_v4/pogo_v4.c | 220 +++
 1 file changed, 220 insertions(+)
 create mode 100644 board/cloudengines/pogo_v4/pogo_v4.c

diff --git a/board/cloudengines/pogo_v4/pogo_v4.c 
b/board/cloudengines/pogo_v4/pogo_v4.c
new file mode 100644
index 00..c85de0b22e
--- /dev/null
+++ b/board/cloudengines/pogo_v4/pogo_v4.c
@@ -0,0 +1,220 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2014-2021 Tony Dinh 
+ *
+ * Based on
+ * Copyright (C) 2012 David Purdy 
+ *
+ * Based on Kirkwood support:
+ * (C) Copyright 2009
+ * Marvell Semiconductor 
+ * Written-by: Prafulla Wadaskar 
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* GPIO configuration */
+#define POGO_V4_OE_LOW (~(0))
+#define POGO_V4_OE_HIGH(~(0))
+#define POGO_V4_OE_VAL_LOW BIT(29)
+#define POGO_V4_OE_VAL_HIGH0
+
+/* PHY related */
+#define MV88E1116_LED_FCTRL_REG10
+#define MV88E1116_CPRSP_CR3_REG21
+#define MV88E1116_MAC_CTRL_REG 21
+#define MV88E1116_PGADR_REG22
+#define MV88E1116_RGMII_TXTM_CTRL  BIT(4)
+#define MV88E1116_RGMII_RXTM_CTRL  BIT(5)
+
+/* button */
+#define BTN_EJECT  29
+
+int board_early_init_f(void)
+{
+   /*
+* default gpio configuration
+* There are maximum 64 gpios controlled through 2 sets of registers
+* the  below configuration configures mainly initial LED status
+*/
+   mvebu_config_gpio(POGO_V4_OE_VAL_LOW,
+ POGO_V4_OE_VAL_HIGH,
+ POGO_V4_OE_LOW, POGO_V4_OE_HIGH);
+
+   /* Multi-Purpose Pins Functionality configuration */
+   u32 kwmpp_config[] = {
+   MPP0_NF_IO2,
+   MPP1_NF_IO3,
+   MPP2_NF_IO4,
+   MPP3_NF_IO5,
+   MPP4_NF_IO6,
+   MPP5_NF_IO7,
+   MPP6_SYSRST_OUTn,
+   MPP7_GPO,
+   MPP8_TW_SDA,
+   MPP9_TW_SCK,
+   MPP10_UART0_TXD,
+   MPP11_UART0_RXD,
+   MPP12_SD_CLK,
+   MPP13_SD_CMD,
+   MPP14_SD_D0,
+   MPP15_SD_D1,
+   MPP16_SD_D2,
+   MPP17_SD_D3,
+   MPP18_NF_IO0,
+   MPP19_NF_IO1,
+   MPP20_SATA1_ACTn,
+   MPP21_SATA0_ACTn,
+   MPP22_GPIO, /* Green LED */
+   MPP23_GPIO,
+   MPP24_GPIO, /* Red LED */
+   MPP25_GPIO,
+   MPP26_GPIO,
+   MPP27_GPIO,
+   MPP28_GPIO,
+   MPP29_GPIO, /* Eject button */
+   MPP30_GPIO,
+   MPP31_GPIO,
+   MPP32_GPIO,
+   MPP33_GPIO,
+   MPP34_GPIO,
+   MPP35_GPIO, /* FR6192 has only 36 GPIOs */
+   0
+   };
+   kirkwood_mpp_conf(kwmpp_config, NULL);
+
+   return 0;
+}
+
+int board_late_init(void)
+{
+   /* Do late init to ensure successful enumeration of XHCI devices */
+   pci_init();
+   return 0;
+}
+
+int board_init(void)
+{
+   /* Boot parameters address */
+   gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
+
+   return 0;
+}
+
+int fdt_get_phy_addr(const char *path)
+{
+   const void *fdt = gd->fdt_blob;
+   const u32 *reg;
+   const u32 *val;
+   int node, phandle, addr;
+
+   /* Find the node by its full path */
+   node = fdt_path_offset(fdt, path);
+   if (node >= 0) {
+   /* Look up phy-handle */
+   val = fdt_getprop(fdt, node, "phy-handle", NULL);
+   if (!val) {
+   /* Look up phy (deprecated property for phy handle) */
+   val = fdt_getprop(fdt, node, "phy", NULL);
+   }
+   if (val) {
+   phandle = fdt32_to_cpu(*val);
+   if (!phandle)
+   return -FDT_ERR_NOTFOUND;
+
+   /* Follow it to its node */
+   node = fdt_node_offset_by_phandle(fdt, phandle);
+   if (node) {
+   /* Look up reg */
+   reg = fdt_getprop(fdt, node, "reg", 

[PATCH v2 4/8] arm: kirkwood: Pogoplug-V4 : Add board include configs file

2021-12-22 Thread Tony Dinh
Add include configs file for Pogoplug V4 board

Signed-off-by: Tony Dinh 
---

(no changes since v1)

 include/configs/pogo_v4.h | 94 +++
 1 file changed, 94 insertions(+)
 create mode 100644 include/configs/pogo_v4.h

diff --git a/include/configs/pogo_v4.h b/include/configs/pogo_v4.h
new file mode 100644
index 00..b449986e8c
--- /dev/null
+++ b/include/configs/pogo_v4.h
@@ -0,0 +1,94 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2014-2021 Tony Dinh 
+ *
+ * Based on
+ * Copyright (C) 2012
+ * David Purdy 
+ *
+ * Based on Kirkwood support:
+ * (C) Copyright 2009
+ * Marvell Semiconductor 
+ * Written-by: Prafulla Wadaskar 
+ */
+
+#ifndef _CONFIG_POGO_V4_H
+#define _CONFIG_POGO_V4_H
+
+/*
+ * Machine type definition and ID
+ */
+#define MACH_TYPE_POGO_V4  3960
+#define CONFIG_MACH_TYPE   MACH_TYPE_POGO_V4
+
+/*
+ * High Level Configuration Options (easy to change)
+ */
+#define CONFIG_FEROCEON_88FR131/* #define CPU Core subversion 
*/
+#define CONFIG_KW88F6192   /* SOC Name */
+
+/*
+ * Commands configuration
+ */
+#define CONFIG_SYS_NO_FLASH/* Declare no flash (NOR/SPI) */
+#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
+
+/*
+ * mv-common.h should be defined after CMD configs since it used them
+ * to enable certain macros
+ */
+#include "mv-common.h"
+
+/*
+ * Default environment variables
+ */
+#define CONFIG_BOOTCOMMAND \
+   "setenv bootargs $(bootargs_console); " \
+   "run bootcmd_usb; " \
+   "bootm 0x0080 0x0110 0x2c0"
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+   "dtb_file=/boot/dts/" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \
+   "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0"\
+   "mtdids=nand0=orion_nand\0"\
+   "bootargs_console=console=ttyS0,115200\0" \
+   "bootcmd_usb=usb start; load usb 0:1 0x0080 /boot/uImage; " \
+   "load usb 0:1 0x0110 /boot/uInitrd; " \
+   "load usb 0:1 0x2c0 $dtb_file\0"
+
+/*
+ * Ethernet Driver configuration
+ */
+#ifdef CONFIG_CMD_NET
+#define CONFIG_FEATURE_COMMAND_EDITING /* for netconsole */
+#define CONFIG_MVGBE_PORTS {1, 0}  /* enable port 0 only */
+#define CONFIG_PHY_BASE_ADR0
+#endif /* CONFIG_CMD_NET */
+
+/*
+ * File system
+ */
+#ifdef CONFIG_CMD_JFFS2
+#define CONFIG_JFFS2_NAND
+#define CONFIG_JFFS2_LZO
+#endif /* CONFIG_CMD_JFFS2 */
+
+/*
+ *  SATA Driver configuration
+ */
+#ifdef CONFIG_SATA
+#define CONFIG_SYS_SATA_MAX_DEVICE 1
+#endif /* CONFIG_SATA */
+
+/*
+ * Support large disk for SATA and USB
+ */
+#define CONFIG_SYS_64BIT_LBA
+#define CONFIG_LBA48
+
+/*
+ * Kirkwood GPIO
+ */
+#define CONFIG_KIRKWOOD_GPIO
+
+#endif /* _CONFIG_POGO_V4_H */
-- 
2.20.1



[PATCH v2 6/8] arm: kirkwood: Pogoplug-V4 : Add board Make file

2021-12-22 Thread Tony Dinh
Add board Makefile for Pogoplug V4

Signed-off-by: Tony Dinh 
---

Changes in v2:
- Merge all constants into the pogo_v4.c file, remove pogo_v4.h

 board/cloudengines/pogo_v4/Makefile | 10 ++
 1 file changed, 10 insertions(+)
 create mode 100644 board/cloudengines/pogo_v4/Makefile

diff --git a/board/cloudengines/pogo_v4/Makefile 
b/board/cloudengines/pogo_v4/Makefile
new file mode 100644
index 00..511bf5ff7e
--- /dev/null
+++ b/board/cloudengines/pogo_v4/Makefile
@@ -0,0 +1,10 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# (C) Copyright 2014-2021 Tony Dinh 
+#
+# Based on
+# Marvell Semiconductor 
+# Written-by: Prafulla Wadaskar 
+#
+
+obj-y  := pogo_v4.o
-- 
2.20.1



RE: [PATCH v2 00/16] Sync NXP LS1028A-RDB device trees between U-Boot and Linux

2021-12-22 Thread Priyanka Jain



>-Original Message-
>From: Vladimir Oltean 
>Sent: Tuesday, December 14, 2021 8:09 PM
>To: Priyanka Jain ; u-boot@lists.denx.de
>Cc: Michael Walle ; Tom Rini ; Leo Li
>; Heiko Schocher ; Simon Glass
>; Ramon Fried 
>Subject: Re: [PATCH v2 00/16] Sync NXP LS1028A-RDB device trees between U-
>Boot and Linux
>
>Hi Priyanka,
>
>On Tue, Dec 07, 2021 at 10:20:07PM +0200, Vladimir Oltean wrote:
>> The changes were intended to be minimal, but unfortunately I
>> discovered some other stuff as well:
>> - we need to make some changes to the compatible strings of RTC devices
>>   and I2C muxes. This has ramifications to other NXP boards which were
>>   also updated.
>> - I broke Ethernet on LS1028A boards through a patch that is currently
>>   in Ramon's tree.
>>
>> Therefore this patch set is a bit larger than would be otherwise
>> expected.
>>
>> The Linux device tree changes have just been posted by me here and are
>> currently in flight, but they are rather small so I don't expect too
>> much pushback on them:
>> https://lore.kernel.org/linux-arm-kernel/20211202141528.2450169-5-vlad
>> imir.olt...@nxp.com/T/#m6f63c92e75fa79a01144b2c2c6dc4776e7971395
>>
>> I've also triggered an Azure CI build with these changes:
>> https://github.com/u-boot/u-boot/pull/102
>> and it appears that 2 tests fail due to external causes:
>> 1.
>> https://dev.azure.com/u-boot/u-boot/_build/results?buildId=3283=l
>> ogs=5fafc5b9-a417-5c75-4c48-15c7f941e4ee=5fafc5b9-a417-5c75-4c
>> 48-15c7f941e4ee=c864b9c4-48aa-5e04-3916-54070f85e156
>> 2.
>> https://dev.azure.com/u-boot/u-boot/_build/results?buildId=3283=l
>> ogs=5fafc5b9-a417-5c75-4c48-15c7f941e4ee=c864b9c4-48aa-5e04-3916-
>5
>> 4070f85e156=27
>>
>> Unable to find image
>> 'trini/u-boot-gitlab-ci-runner:focal-20211006-14Nov2021' locally
>> docker: Error response from daemon: Head "https://registry-
>1.docker.io/v2/trini/u-boot-gitlab-ci-runner/manifests/focal-20211006-
>14Nov2021": received unexpected HTTP status: 502 Bad Gateway.
>>
>> The other tests seem to pass.
>
>The Linux side of device tree patches were merged today, and I see you've
>reviewed the U-Boot side of changes too. Could you please pick them up?

Yes, I will pick the series as part of next pull-request for 2022.04

Regards
Priyanka


[PATCH v2 0/8] arm: kirkwood: Add support for Pogoplug V4

2021-12-22 Thread Tony Dinh


Pogoplug V4 specifications:

Kirkwood 88F6192 SoC
800 MHz CPU
1Gbs Ethernet
128 MB RAM
128 MB NAND
1x USB 2.0
2x USB 3.0 (on PCIe bus)
1 SDHC slot
1x External SATA port (USM enclosure form factor slot)

Thanks to all v1 reviewers, all their comments were incorporated in this v2 
patch series.

Changes in v2:
- Use mainline Linux DTS version
- Use canonical format for defconfig file
- Merge all constants into the pogo_v4.c file, remove pogo_v4.h
Merge constants from header file.

Tony Dinh (8):
  arm: kirkwood: Pogoplug-V4 : Add DTS files
  arm: kirkwood: Pogoplug V4 : Add board defconfig file
  arm: kirkwood: Pogoplug-V4 : Add Kconfig files
  arm: kirkwood: Pogoplug-V4 : Add board include configs file
  arm: kirkwood: Pogoplug-V4 : Add board kwbimage file
  arm: kirkwood: Pogoplug-V4 : Add board Make file
  arm: kirkwood: Pogoplug-V4 : Add board implementation
  arm: kirkwood: Pogoplug-V4 : Add board maintainer

 arch/arm/dts/Makefile   |   1 +
 arch/arm/dts/kirkwood-pogoplug-series-4.dts | 180 
 arch/arm/mach-kirkwood/Kconfig  |   4 +
 board/cloudengines/pogo_v4/Kconfig  |  16 ++
 board/cloudengines/pogo_v4/MAINTAINERS  |   6 +
 board/cloudengines/pogo_v4/Makefile |  10 +
 board/cloudengines/pogo_v4/kwbimage.cfg | 148 +
 board/cloudengines/pogo_v4/pogo_v4.c| 220 
 configs/pogo_v4_defconfig   |  73 +++
 include/configs/pogo_v4.h   |  94 +
 10 files changed, 752 insertions(+)
 create mode 100644 arch/arm/dts/kirkwood-pogoplug-series-4.dts
 create mode 100644 board/cloudengines/pogo_v4/Kconfig
 create mode 100644 board/cloudengines/pogo_v4/MAINTAINERS
 create mode 100644 board/cloudengines/pogo_v4/Makefile
 create mode 100644 board/cloudengines/pogo_v4/kwbimage.cfg
 create mode 100644 board/cloudengines/pogo_v4/pogo_v4.c
 create mode 100644 configs/pogo_v4_defconfig
 create mode 100644 include/configs/pogo_v4.h

-- 
2.20.1



[PATCH v2 1/8] arm: kirkwood: Pogoplug-V4 : Add DTS files

2021-12-22 Thread Tony Dinh
Add DTS files for Pogoplug V4 board

Signed-off-by: Tony Dinh 
---

Changes in v2:
- Use mainline Linux DTS version

 arch/arm/dts/Makefile   |   1 +
 arch/arm/dts/kirkwood-pogoplug-series-4.dts | 180 
 2 files changed, 181 insertions(+)
 create mode 100644 arch/arm/dts/kirkwood-pogoplug-series-4.dts

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 7f622fedbd..c8be5b8ae5 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -68,6 +68,7 @@ dtb-$(CONFIG_ARCH_KIRKWOOD) += \
kirkwood-openrd-client.dtb \
kirkwood-openrd-ultimate.dtb \
kirkwood-pogo_e02.dtb \
+   kirkwood-pogoplug-series-4.dtb \
kirkwood-sheevaplug.dtb
 
 dtb-$(CONFIG_MACH_S900) += \
diff --git a/arch/arm/dts/kirkwood-pogoplug-series-4.dts 
b/arch/arm/dts/kirkwood-pogoplug-series-4.dts
new file mode 100644
index 00..5aa4669ae2
--- /dev/null
+++ b/arch/arm/dts/kirkwood-pogoplug-series-4.dts
@@ -0,0 +1,180 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * kirkwood-pogoplug-series-4.dts - Device tree file for PogoPlug Series 4
+ * inspired by the board files made by Kevin Mihelich for ArchLinux,
+ * and their DTS file.
+ *
+ * Copyright (C) 2015 Linus Walleij 
+ */
+
+/dts-v1/;
+
+#include "kirkwood.dtsi"
+#include "kirkwood-6192.dtsi"
+#include 
+
+/ {
+   model = "Cloud Engines PogoPlug Series 4";
+   compatible = "cloudengines,pogoplugv4", "marvell,kirkwood-88f6192",
+"marvell,kirkwood";
+
+   memory {
+   device_type = "memory";
+   reg = <0x 0x0800>;
+   };
+
+   chosen {
+   stdout-path = "uart0:115200n8";
+   };
+
+   gpio_keys {
+   compatible = "gpio-keys";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   pinctrl-0 = <_button_eject>;
+   pinctrl-names = "default";
+
+   eject {
+   debounce-interval = <50>;
+   wakeup-source;
+   linux,code = ;
+   label = "Eject Button";
+   gpios = < 29 GPIO_ACTIVE_LOW>;
+   };
+   };
+
+   gpio-leds {
+   compatible = "gpio-leds";
+   pinctrl-0 = <_led_green _led_red>;
+   pinctrl-names = "default";
+
+   health {
+   label = "pogoplugv4:green:health";
+   gpios = < 22 GPIO_ACTIVE_LOW>;
+   default-state = "on";
+   };
+   fault {
+   label = "pogoplugv4:red:fault";
+   gpios = < 24 GPIO_ACTIVE_LOW>;
+   };
+   };
+};
+
+ {
+   pmx_sata0: pmx-sata0 {
+   marvell,pins = "mpp21";
+   marvell,function = "sata0";
+   };
+
+   pmx_sata1: pmx-sata1 {
+   marvell,pins = "mpp20";
+   marvell,function = "sata1";
+   };
+
+   pmx_sdio_cd: pmx-sdio-cd {
+   marvell,pins = "mpp27";
+   marvell,function = "gpio";
+   };
+
+   pmx_sdio_wp: pmx-sdio-wp {
+   marvell,pins = "mpp28";
+   marvell,function = "gpio";
+   };
+
+   pmx_button_eject: pmx-button-eject {
+   marvell,pins = "mpp29";
+   marvell,function = "gpio";
+   };
+
+   pmx_led_green: pmx-led-green {
+   marvell,pins = "mpp22";
+   marvell,function = "gpio";
+   };
+
+   pmx_led_red: pmx-led-red {
+   marvell,pins = "mpp24";
+   marvell,function = "gpio";
+   };
+};
+
+ {
+   status = "okay";
+};
+
+/*
+ * This PCIE controller has a USB 3.0 XHCI controller at 1,0
+ */
+ {
+   status = "okay";
+};
+
+ {
+   status = "okay";
+};
+
+ {
+   status = "okay";
+   pinctrl-0 = <_sata0 _sata1>;
+   pinctrl-names = "default";
+   nr-ports = <1>;
+};
+
+ {
+   status = "okay";
+   pinctrl-0 = <_sdio _sdio_cd _sdio_wp>;
+   pinctrl-names = "default";
+   cd-gpios = < 27 GPIO_ACTIVE_LOW>;
+   wp-gpios = < 28 GPIO_ACTIVE_HIGH>;
+};
+
+ {
+   /* 128 MiB of NAND flash */
+   chip-delay = <40>;
+   status = "okay";
+   partitions {
+   compatible = "fixed-partitions";
+   #address-cells = <1>;
+   #size-cells = <1>;
+
+   partition@0 {
+   label = "u-boot";
+   reg = <0x 0x20>;
+   read-only;
+   };
+
+   partition@20 {
+   label = "uImage";
+   reg = <0x0020 0x30>;
+   };
+
+   partition@50 {
+   label = "uImage2";
+   reg = <0x0050 0x30>;
+   };
+
+   partition@80 {
+   label = "failsafe";
+

[PATCH v2 2/8] arm: kirkwood: Pogoplug V4 : Add board defconfig file

2021-12-22 Thread Tony Dinh
Add board defconfig file for Pogoplug V4 board

Signed-off-by: Tony Dinh 
---

Changes in v2:
- Use canonical format for defconfig file

 configs/pogo_v4_defconfig | 73 +++
 1 file changed, 73 insertions(+)
 create mode 100644 configs/pogo_v4_defconfig

diff --git a/configs/pogo_v4_defconfig b/configs/pogo_v4_defconfig
new file mode 100644
index 00..ab78dbcea2
--- /dev/null
+++ b/configs/pogo_v4_defconfig
@@ -0,0 +1,73 @@
+CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_SYS_DCACHE_OFF=y
+CONFIG_ARCH_CPU_INIT=y
+CONFIG_SYS_THUMB_BUILD=y
+CONFIG_ARCH_KIRKWOOD=y
+CONFIG_SYS_TEXT_BASE=0x60
+CONFIG_TARGET_POGO_V4=y
+CONFIG_ENV_SIZE=0x2
+CONFIG_ENV_OFFSET=0xC
+CONFIG_DEFAULT_DEVICE_TREE="kirkwood-pogoplug-series-4"
+CONFIG_IDENT_STRING="\nPogoplug V4"
+CONFIG_SYS_LOAD_ADDR=0x80
+CONFIG_BOOTSTAGE=y
+CONFIG_SHOW_BOOT_PROGRESS=y
+CONFIG_BOOTDELAY=10
+CONFIG_USE_PREBOOT=y
+CONFIG_BOARD_LATE_INIT=y
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_PROMPT="Pogo_V4> "
+CONFIG_CMD_BOOTZ=y
+# CONFIG_BOOTM_PLAN9 is not set
+# CONFIG_BOOTM_RTEMS is not set
+# CONFIG_BOOTM_VXWORKS is not set
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_MTD=y
+CONFIG_CMD_NAND=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_SATA=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_SNTP=y
+CONFIG_CMD_DNS=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_JFFS2=y
+CONFIG_CMD_MTDPARTS=y
+CONFIG_MTDIDS_DEFAULT="nand0=orion_nand"
+CONFIG_MTDPARTS_DEFAULT="mtdparts=orion_nand:2M(u-boot),3M(uImage),3M(uImage2),8M(failsafe),112M(root)"
+CONFIG_CMD_UBI=y
+CONFIG_ISO_PARTITION=y
+CONFIG_EFI_PARTITION=y
+CONFIG_PARTITION_TYPE_GUID=y
+CONFIG_OF_CONTROL=y
+CONFIG_ENV_OVERWRITE=y
+CONFIG_ENV_IS_IN_NAND=y
+CONFIG_VERSION_VARIABLE=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_NETCONSOLE=y
+CONFIG_DM=y
+CONFIG_SATA_MV=y
+# CONFIG_MMC_HW_PARTITIONING is not set
+CONFIG_MVEBU_MMC=y
+CONFIG_MTD=y
+CONFIG_MTD_RAW_NAND=y
+CONFIG_DM_ETH=y
+CONFIG_MVGBE=y
+CONFIG_MII=y
+CONFIG_PCI=y
+CONFIG_PCI_MVEBU=y
+CONFIG_DM_RTC=y
+CONFIG_RTC_EMULATION=y
+CONFIG_SYS_NS16550=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_PCI=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_STORAGE=y
-- 
2.20.1



RE: [PATCH] arm: socfpga: vining: Unmount UBIFS and detach UBI in ubi_load script

2021-12-22 Thread Chee, Tien Fong
Hi,

> -Original Message-
> From: Marek Vasut 
> Sent: Tuesday, 21 December, 2021 5:58 AM
> To: u-boot@lists.denx.de
> Cc: tr...@konsulko.com; Vasut, Marek ; Lim, Elly Siew Chin
> ; Simon Goldschmidt
> ; Chee, Tien Fong
> 
> Subject: [PATCH] arm: socfpga: vining: Unmount UBIFS and detach UBI in
> ubi_load script
> 
> Clean up in ubiload script. Unmount UBIFS from which kernel image was loaded
> and detach UBI on which the UBIFS is located, otherwise message similar to the
> following is printed just before booting kernel:
> 
> Removing MTD device #7 (rootfs) with use count 1 Error when deleting partition
> "rootfs" (-16)
> 
> Signed-off-by: Marek Vasut 
> Cc: Siew Chin Lim 
> Cc: Simon Goldschmidt 
> Cc: Tien Fong Chee 
> ---
>  include/configs/socfpga_vining_fpga.h | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/include/configs/socfpga_vining_fpga.h
> b/include/configs/socfpga_vining_fpga.h
> index d9d0a4af5ac..5c0ed07c427 100644
> --- a/include/configs/socfpga_vining_fpga.h
> +++ b/include/configs/socfpga_vining_fpga.h
> @@ -118,7 +118,8 @@
>   "addargs=run addcons addmtd addmisc\0"
>   \
>   "ubiload="  \
>   "ubi part ${ubimtd} ; ubifsmount ${ubipart} ; " \
> - "ubifsload ${kernel_addr_r} /boot/${bootfile}\0"\
> + "ubifsload ${kernel_addr_r} /boot/${bootfile} ; "   \
> + "ubifsumount ; ubi detach\0"\
>   "netload="  \
>   "tftp ${kernel_addr_r} ${hostname}/${bootfile}\0"   \
>   "miscargs=nohlt panic=1\0"  \
> --
> 2.34.1

Reviewed-by: Tien Fong Chee  

Regards
Tien Fong


kwboot: Marvell Dove UART booting

2021-12-22 Thread Tony Dinh
Hi all,

With great help from Pali, I've made some good progress on
kwboot the HP Thin Client T5335z (Marvell Dove SoC) board.
I had been unsuccessful running kwboot with this box until Pali
pointed out a few important aspects of the Dove SoC, and how the
BootROM commands work (my apology for forgetting to include the
u-boot-mailing list and Marek on previous email exchanges).

Here is the summary of the attempt to kwboot.

HP Thin Client T5335z
Marvell Dove SoC 88AP510 (A1)
1Ghz CPU
1 GB RAM

- Reset Strapping:

As with all Dove SoCs, there is no preamble
when we send the u-boot image over the serial line. IOW, no magic
handshake string to tell the BootROM that we are booting over UART.
Instead, the hardware must explicitly set to UART mode booting.
For boards like the Solidrun Cubox, there is a button, and some other
board, a DIP switch, to enable this mode. For the T55335z, there is
no button or DIP switch on the board for that purpose. Instead, there
is a jumper (the exact purpose is unknown), but I found that this jumper
will put the BootROM into debug mode. And from the BootROM debug prompt,
we can execute a command to set the boot mode to UART with "x command.

Here is the log and my commentary starting with ***



*** With jumper inserted, serial console connected, start serial console

# picocom --b 115200 --f n --p n --d 8 /dev/ttyUSB0
Terminal ready

*** Hit  here to get to the prompt and execute "x 0x0E"

Bootstrap 2.33>
Bootstrap 2.33>x 0x0E

*** No more input possible here,  so Control-A-X to exit serial console

Terminating...
Thanks for using picocom

*** Run kwboot

# kwboot -t -p -B 115200 /dev/ttyUSB0 -D /localdisk/mtd0.t5335z
Patching image boot signature to UART
Aligning image header to Xmodem block size
Waiting 2s and flushing tty
Sending boot image header (512 bytes)...
 25 % [  ]
Done
Sending boot image data (607664 bytes)...
  0 % [..]
  1 % [..]
  2 % [..]

 95 % [..]
 97 % [..]
 98 % [..]
Done
Finishing transfer
[Type Ctrl-\ + c to quit]

*** Hung here! BootROM did not execute the image payload.
***
*** The file mtd0.t5335z is a dd dump from the SPI flash mtd0 with
*** this command:
*** # dd if=/dev/mtd0 of=mtd0.t5335z bs=768k conv=sync




- Pali's observation:

It looks like Dove uses kwbimage v0 format with extensions, at
least according to Function Spec. See 'Binary Code Extension' and
'Header Extension'. Currently kwboot and kwbimage supports v0 image only
with one extension.

- My comments in response:

Indeed. I've seen that in the Functional Spec, too. The mdt0 binwalk also shows
what looks like the extension header.

DECIMAL   HEXADECIMAL DESCRIPTION

1181610x1CD91 Certificate in DER format (x509 v3),
header length: 4, sequence length: 3
1991690x30A01 Certificate in DER format (x509 v3),
header length: 4, sequence length: 5464
3806520x5CEEC CRC32 polynomial table, little endian
3870720x5E800 CRC32 polynomial table, little endian
6081660x947A6 LZMA compressed data, properties: 0x66,
dictionary size: 0 bytes, uncompressed size: 147351982848 bytes

Thanks,
Tony


Re: [PATCH] usb: ehci-mx6: Enable OTG detection on imx8mm and imx8mn

2021-12-22 Thread Adam Ford
On Wed, Dec 22, 2021 at 1:31 PM Marek Vasut  wrote:

> On 12/22/21 13:52, Adam Ford wrote:
> > The imx8mm and imx8mn appear compatible with imx7d-usb
> > flags in the OTG driver.  If the dr_mode is defined as
> > host or peripheral, the device appears to operate correctly,
> > however the auto host/peripheral detection results in an error.
> >
> > Simply adding checks in ehci_usb_phy_mode for 8mm and
> > 8mn in ehci_usb_phy_mode is not enough, because ehci_usb_of_to_plat
> > is run before the clock is enabled which results in a hang.
> >
> > Enable the USB clock in ehci_usb_of_to_plat and add checks in
> > ehci_usb_phy_mode for 8mm and 8mn to enable auto detection of
> > the OTG mode on i.MX8M Mini and Nano.
>
> I was under the impression that of_to_plat() was meant to parse DT into
> driver local data, so frobbing with clock there could be a problem,
> right ? +CC Simon.
>

If that's true, we'll likely need to move the functions from
ehci_usb_of_to_plat to the probe function to run after the clocks are
enabled, because the call to usb_get_dr_mode hangs without the clocks
running.  usb_get_dr_mode tells the driver if it's a host or device mode.

We could make a temporary clock instead of passing the clock to the priv
structure.  I intentionally shut the clock off as soon as we're finished
reading the register so it didn't collide with the existing functions.

adam

>
> > diff --git a/drivers/usb/host/ehci-mx6.c b/drivers/usb/host/ehci-mx6.c
> > index 1bd6147c76..fa0798171b 100644
> > --- a/drivers/usb/host/ehci-mx6.c
> > +++ b/drivers/usb/host/ehci-mx6.c
> > @@ -543,7 +543,7 @@ static int ehci_usb_phy_mode(struct udevice *dev)
> >   plat->init_type = USB_INIT_DEVICE;
> >   else
> >   plat->init_type = USB_INIT_HOST;
> > - } else if (is_mx7()) {
> > + } else if (is_mx7() || is_imx8mm() || is_imx8mn()) {
> >   phy_status = (void __iomem *)(addr +
> > USBNC_PHY_STATUS_OFFSET);
> >   val = readl(phy_status);
> > @@ -561,11 +561,30 @@ static int ehci_usb_phy_mode(struct udevice *dev)
> >
> >   static int ehci_usb_of_to_plat(struct udevice *dev)
> >   {
> > +#if CONFIG_IS_ENABLED(CLK)
> > + int ret = 0;
> > + struct ehci_mx6_priv_data *priv = dev_get_priv(dev);
> > +
> > + ret = clk_get_by_index(dev, 0, >clk);
> > + if (ret < 0)
> > + return ret;
> > +
> > + ret = clk_enable(>clk);
> > + if (ret)
> > + return ret;
> > +#endif
> > +
> >   struct usb_plat *plat = dev_get_plat(dev);
> >   enum usb_dr_mode dr_mode;
> >
> >   dr_mode = usb_get_dr_mode(dev_ofnode(dev));
> >
> > +#if CONFIG_IS_ENABLED(CLK)
> > + ret = clk_disable(>clk);
> > + if (ret)
> > + return ret;
> > +#endif
> > +
> >   switch (dr_mode) {
> >   case USB_DR_MODE_HOST:
> >   plat->init_type = USB_INIT_HOST;
>


[PATCH 2/4] vibrator: Add vibrator_gpio driver

2021-12-22 Thread Samuel Dionne-Riel
Signed-off-by: Samuel Dionne-Riel 
---
 drivers/vibrator/Kconfig |  16 
 drivers/vibrator/Makefile|   1 +
 drivers/vibrator/vibrator_gpio.c | 122 +++
 3 files changed, 139 insertions(+)
 create mode 100644 drivers/vibrator/vibrator_gpio.c

diff --git a/drivers/vibrator/Kconfig b/drivers/vibrator/Kconfig
index f988aa63b9..88e84ffb6c 100644
--- a/drivers/vibrator/Kconfig
+++ b/drivers/vibrator/Kconfig
@@ -18,4 +18,20 @@ config SPL_VIBRATOR
  enable this option. You will need to enable device tree in SPL
  for this to work.
 
+config VIBRATOR_GPIO
+   bool "VIBRATOR support for GPIO-connected VIBRATORs"
+   depends on VIBRATOR && DM_GPIO
+   help
+ Enable support for vibration motors which are connected to GPIO lines.
+ These GPIOs may be on the SoC or some other device which provides 
GPIOs.
+ The GPIO driver must used driver model. vibration motors are 
configured
+ using the device tree.
+
+config SPL_VIBRATOR_GPIO
+   bool "Vibration motor support for GPIO-connected vibration motors in 
SPL"
+depends on SPL_VIBRATOR && DM_GPIO
+   help
+ This option is an SPL-variant of the VIBRATOR_GPIO option.
+ See the help of VIBRATOR_GPIO for details.
+
 endmenu
diff --git a/drivers/vibrator/Makefile b/drivers/vibrator/Makefile
index 326838ff7a..cc5fc14fbf 100644
--- a/drivers/vibrator/Makefile
+++ b/drivers/vibrator/Makefile
@@ -3,3 +3,4 @@
 # Copyright (c) 2021 Samuel Dionne-Riel 
 
 obj-y += vibrator-uclass.o
+obj-$(CONFIG_$(SPL_)VIBRATOR_GPIO) += vibrator_gpio.o
diff --git a/drivers/vibrator/vibrator_gpio.c b/drivers/vibrator/vibrator_gpio.c
new file mode 100644
index 00..95648a7231
--- /dev/null
+++ b/drivers/vibrator/vibrator_gpio.c
@@ -0,0 +1,122 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2021 Samuel Dionne-Riel 
+ * Copyright (c) 2015 Google, Inc
+ * Largely derived from `drivers/led/led_gpio.c`
+ * Original written by Simon Glass 
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+struct vibrator_gpio_priv {
+   struct gpio_desc gpio;
+};
+
+static int gpio_vibrator_set_state(struct udevice *dev, enum vibrator_state_t 
state)
+{
+   struct vibrator_gpio_priv *priv = dev_get_priv(dev);
+   int ret;
+
+   if (!dm_gpio_is_valid(>gpio))
+   return -EREMOTEIO;
+   switch (state) {
+   case VIBRATOR_STATE_OFF:
+   case VIBRATOR_STATE_ON:
+   break;
+   case VIBRATOR_STATE_TOGGLE:
+   ret = dm_gpio_get_value(>gpio);
+   if (ret < 0)
+   return ret;
+   state = !ret;
+   break;
+   default:
+   return -ENOSYS;
+   }
+
+   return dm_gpio_set_value(>gpio, state);
+}
+
+static enum vibrator_state_t gpio_vibrator_get_state(struct udevice *dev)
+{
+   struct vibrator_gpio_priv *priv = dev_get_priv(dev);
+   int ret;
+
+   if (!dm_gpio_is_valid(>gpio))
+   return -EREMOTEIO;
+   ret = dm_gpio_get_value(>gpio);
+   if (ret < 0)
+   return ret;
+
+   return ret ? VIBRATOR_STATE_ON : VIBRATOR_STATE_OFF;
+}
+
+static int vibrator_gpio_probe(struct udevice *dev)
+{
+   struct vibrator_gpio_priv *priv = dev_get_priv(dev);
+   int ret;
+
+   ret = gpio_request_by_name(dev, "enable-gpios", 0, >gpio, 
GPIOD_IS_OUT);
+   if (ret)
+   return ret;
+
+   return 0;
+}
+
+static int vibrator_gpio_remove(struct udevice *dev)
+{
+   /*
+* The GPIO driver may have already been removed. We will need to
+* address this more generally.
+*/
+   if (!IS_ENABLED(CONFIG_SANDBOX)) {
+   struct vibrator_gpio_priv *priv = dev_get_priv(dev);
+
+   if (dm_gpio_is_valid(>gpio))
+   dm_gpio_free(dev, >gpio);
+   }
+
+   return 0;
+}
+
+static int vibrator_gpio_bind(struct udevice *dev)
+{
+   ofnode node;
+   struct vibrator_uc_plat *uc_plat;
+   const char *label;
+
+   node = dev_ofnode(dev);
+   label = ofnode_get_name(node);
+
+   uc_plat = dev_get_uclass_plat(dev);
+   uc_plat->label = label;
+
+   return 0;
+}
+
+static const struct vibrator_ops gpio_vibrator_ops = {
+   .set_state  = gpio_vibrator_set_state,
+   .get_state  = gpio_vibrator_get_state,
+};
+
+static const struct udevice_id vibrator_gpio_ids[] = {
+   { .compatible = "gpio-vibrator" },
+   { }
+};
+
+U_BOOT_DRIVER(vibrator_gpio) = {
+   .name   = "gpio_vibrator",
+   .id = UCLASS_VIBRATOR,
+   .of_match = vibrator_gpio_ids,
+   .ops= _vibrator_ops,
+   .priv_auto  = sizeof(struct vibrator_gpio_priv),
+   .bind   = vibrator_gpio_bind,
+   .probe  = vibrator_gpio_probe,
+   .remove = vibrator_gpio_remove,
+};
-- 
2.34.0



[PATCH 0/4] Add vibration motor support to U-Boot

2021-12-22 Thread Samuel Dionne-Riel
This series of patch adds support for vibration motors (often called
vibrators) to U-Boot.

The support adds the necessary plumbing to support SPL usage of
vibration motors. This can be used to vibrate the device, like a phone,
as early as possible during the boot process.

A `vibrator` command allows scripts, or customised boot commands, to
vibrate the device. This can be used to provide feedback to the end-user
about failure state, or boot stage.

An example use case of the command is, in a customized boot command, to
signify that an error happend, by synchronizing red LED flashes with a
few short vibrations.

Samuel Dionne-Riel (4):
  drivers: Introduce vibrator uclass
  vibrator: Add vibrator_gpio driver
  cmd: Add vibrator command
  pinephone_defconfig: Add gpio vibrator support

 arch/sandbox/dts/test.dts  |  10 ++
 cmd/Kconfig|  10 ++
 cmd/Makefile   |   1 +
 cmd/vibrator.c | 148 +
 configs/pinephone_defconfig|   2 +
 configs/sandbox_defconfig  |   2 +
 drivers/Kconfig|   2 +
 drivers/Makefile   |   1 +
 drivers/vibrator/Kconfig   |  37 
 drivers/vibrator/Makefile  |   6 ++
 drivers/vibrator/vibrator-uclass.c |  62 
 drivers/vibrator/vibrator_gpio.c   | 122 
 include/dm/uclass-id.h |   1 +
 include/vibrator.h |  87 +
 test/dm/Makefile   |   1 +
 test/dm/vibrator.c |  97 +++
 16 files changed, 589 insertions(+)
 create mode 100644 cmd/vibrator.c
 create mode 100644 drivers/vibrator/Kconfig
 create mode 100644 drivers/vibrator/Makefile
 create mode 100644 drivers/vibrator/vibrator-uclass.c
 create mode 100644 drivers/vibrator/vibrator_gpio.c
 create mode 100644 include/vibrator.h
 create mode 100644 test/dm/vibrator.c

-- 
2.34.0



Re: [PATCH 06/11] drivers/net/fec_mxc.c: Fix spelling of "resetting".

2021-12-22 Thread Ramon Fried
On Tue, Dec 21, 2021 at 11:08 PM Vagrant Cascadian  wrote:
>
> ---
>  drivers/net/fec_mxc.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c
> index 40a86a3e12..811bc275c1 100644
> --- a/drivers/net/fec_mxc.c
> +++ b/drivers/net/fec_mxc.c
> @@ -1465,7 +1465,7 @@ static int fecmxc_probe(struct udevice *dev)
> start = get_timer(0);
> while (readl(>eth->ecntrl) & FEC_ECNTRL_RESET) {
> if (get_timer(start) > (CONFIG_SYS_HZ * 5)) {
> -   printf("FEC MXC: Timeout reseting chip\n");
> +   printf("FEC MXC: Timeout resetting chip\n");
> goto err_timeout;
> }
> udelay(10);
> --
> 2.30.2
>
Reviewed-by: Ramon Fried 


[PATCH v1 2/4] usb: ehci: Refactor the ehci_mxs_toggle_clock function to be reused with DM

2021-12-22 Thread Lukasz Majewski
This function is going to be reused with the CONFIG_DM_USB enabled in
the imx28 mxs USB ehci driver.

No functional changes introduced.

Signed-off-by: Lukasz Majewski 
---

 drivers/usb/host/ehci-mxs.c | 42 ++---
 1 file changed, 21 insertions(+), 21 deletions(-)

diff --git a/drivers/usb/host/ehci-mxs.c b/drivers/usb/host/ehci-mxs.c
index 824c620e638..a9d5d58970a 100644
--- a/drivers/usb/host/ehci-mxs.c
+++ b/drivers/usb/host/ehci-mxs.c
@@ -29,6 +29,27 @@ struct ehci_mxs_port {
uint32_tgate_bits;
 };
 
+static int ehci_mxs_toggle_clock(const struct ehci_mxs_port *port, int enable)
+{
+   struct mxs_register_32 *digctl_ctrl =
+   (struct mxs_register_32 *)HW_DIGCTL_CTRL;
+   int pll_offset, dig_offset;
+
+   if (enable) {
+   pll_offset = offsetof(struct mxs_register_32, reg_set);
+   dig_offset = offsetof(struct mxs_register_32, reg_clr);
+   writel(port->gate_bits, (u32)_ctrl->reg + dig_offset);
+   writel(port->pll_en_bits, (u32)port->pll + pll_offset);
+   } else {
+   pll_offset = offsetof(struct mxs_register_32, reg_clr);
+   dig_offset = offsetof(struct mxs_register_32, reg_set);
+   writel(port->pll_dis_bits, (u32)port->pll + pll_offset);
+   writel(port->gate_bits, (u32)_ctrl->reg + dig_offset);
+   }
+
+   return 0;
+}
+
 static const struct ehci_mxs_port mxs_port[] = {
 #ifdef CONFIG_EHCI_MXS_PORT0
{
@@ -56,27 +77,6 @@ static const struct ehci_mxs_port mxs_port[] = {
 #endif
 };
 
-static int ehci_mxs_toggle_clock(const struct ehci_mxs_port *port, int enable)
-{
-   struct mxs_register_32 *digctl_ctrl =
-   (struct mxs_register_32 *)HW_DIGCTL_CTRL;
-   int pll_offset, dig_offset;
-
-   if (enable) {
-   pll_offset = offsetof(struct mxs_register_32, reg_set);
-   dig_offset = offsetof(struct mxs_register_32, reg_clr);
-   writel(port->gate_bits, (u32)_ctrl->reg + dig_offset);
-   writel(port->pll_en_bits, (u32)port->pll + pll_offset);
-   } else {
-   pll_offset = offsetof(struct mxs_register_32, reg_clr);
-   dig_offset = offsetof(struct mxs_register_32, reg_set);
-   writel(port->pll_dis_bits, (u32)port->pll + pll_offset);
-   writel(port->gate_bits, (u32)_ctrl->reg + dig_offset);
-   }
-
-   return 0;
-}
-
 int __weak board_ehci_hcd_init(int port)
 {
return 0;
-- 
2.20.1



[PATCH v1 3/4] usb: ehci: Move common mxs code to separate functions (ehci_hcd_{stop|start})

2021-12-22 Thread Lukasz Majewski
Those functions will be re-used when the ehci MXS driver (for imx28)
will be converted to also support CONFIG_DM_USB.

No functional changes introduced - only cosmetic changes (u32 type)
and alignment to pass checkpatch.

Signed-off-by: Lukasz Majewski 
---

 drivers/usb/host/ehci-mxs.c | 112 
 1 file changed, 62 insertions(+), 50 deletions(-)

diff --git a/drivers/usb/host/ehci-mxs.c b/drivers/usb/host/ehci-mxs.c
index a9d5d58970a..aa32af1f3aa 100644
--- a/drivers/usb/host/ehci-mxs.c
+++ b/drivers/usb/host/ehci-mxs.c
@@ -50,6 +50,66 @@ static int ehci_mxs_toggle_clock(const struct ehci_mxs_port 
*port, int enable)
return 0;
 }
 
+static int __ehci_hcd_init(struct ehci_mxs_port *port, enum usb_init_type init,
+  struct ehci_hccr **hccr, struct ehci_hcor **hcor)
+{
+   u32 usb_base, cap_base;
+   int ret;
+
+   /* Reset the PHY block */
+   writel(USBPHY_CTRL_SFTRST, >phy_regs->hw_usbphy_ctrl_set);
+   udelay(10);
+   writel(USBPHY_CTRL_SFTRST | USBPHY_CTRL_CLKGATE,
+  >phy_regs->hw_usbphy_ctrl_clr);
+
+   /* Enable USB clock */
+   ret = ehci_mxs_toggle_clock(port, 1);
+   if (ret)
+   return ret;
+
+   /* Start USB PHY */
+   writel(0, >phy_regs->hw_usbphy_pwd);
+
+   /* Enable UTMI+ Level 2 and Level 3 compatibility */
+   writel(USBPHY_CTRL_ENUTMILEVEL3 | USBPHY_CTRL_ENUTMILEVEL2 | 1,
+  >phy_regs->hw_usbphy_ctrl_set);
+
+   usb_base = port->usb_regs + 0x100;
+   *hccr = (struct ehci_hccr *)usb_base;
+
+   cap_base = ehci_readl(&(*hccr)->cr_capbase);
+   *hcor = (struct ehci_hcor *)(usb_base + HC_LENGTH(cap_base));
+
+   return 0;
+}
+
+static int __ehci_hcd_stop(struct ehci_mxs_port *port)
+{
+   u32 usb_base, cap_base, tmp;
+   struct ehci_hccr *hccr;
+   struct ehci_hcor *hcor;
+
+   /* Stop the USB port */
+   usb_base = port->usb_regs + 0x100;
+   hccr = (struct ehci_hccr *)usb_base;
+   cap_base = ehci_readl(>cr_capbase);
+   hcor = (struct ehci_hcor *)(usb_base + HC_LENGTH(cap_base));
+
+   tmp = ehci_readl(>or_usbcmd);
+   tmp &= ~CMD_RUN;
+   ehci_writel(>or_usbcmd, tmp);
+
+   /* Disable the PHY */
+   tmp = USBPHY_PWD_RXPWDRX | USBPHY_PWD_RXPWDDIFF |
+   USBPHY_PWD_RXPWD1PT1 | USBPHY_PWD_RXPWDENV |
+   USBPHY_PWD_TXPWDV2I | USBPHY_PWD_TXPWDIBIAS |
+   USBPHY_PWD_TXPWDFS;
+   writel(tmp, >phy_regs->hw_usbphy_pwd);
+
+   /* Disable USB clock */
+   return ehci_mxs_toggle_clock(port, 0);
+}
+
 static const struct ehci_mxs_port mxs_port[] = {
 #ifdef CONFIG_EHCI_MXS_PORT0
{
@@ -92,7 +152,6 @@ int ehci_hcd_init(int index, enum usb_init_type init,
 {
 
int ret;
-   uint32_t usb_base, cap_base;
const struct ehci_mxs_port *port;
 
if ((index < 0) || (index >= ARRAY_SIZE(mxs_port))) {
@@ -105,40 +164,12 @@ int ehci_hcd_init(int index, enum usb_init_type init,
return ret;
 
port = _port[index];
-
-   /* Reset the PHY block */
-   writel(USBPHY_CTRL_SFTRST, >phy_regs->hw_usbphy_ctrl_set);
-   udelay(10);
-   writel(USBPHY_CTRL_SFTRST | USBPHY_CTRL_CLKGATE,
-   >phy_regs->hw_usbphy_ctrl_clr);
-
-   /* Enable USB clock */
-   ret = ehci_mxs_toggle_clock(port, 1);
-   if (ret)
-   return ret;
-
-   /* Start USB PHY */
-   writel(0, >phy_regs->hw_usbphy_pwd);
-
-   /* Enable UTMI+ Level 2 and Level 3 compatibility */
-   writel(USBPHY_CTRL_ENUTMILEVEL3 | USBPHY_CTRL_ENUTMILEVEL2 | 1,
-   >phy_regs->hw_usbphy_ctrl_set);
-
-   usb_base = port->usb_regs + 0x100;
-   *hccr = (struct ehci_hccr *)usb_base;
-
-   cap_base = ehci_readl(&(*hccr)->cr_capbase);
-   *hcor = (struct ehci_hcor *)(usb_base + HC_LENGTH(cap_base));
-
-   return 0;
+   return __ehci_hcd_init(port, init, hccr, hcor);
 }
 
 int ehci_hcd_stop(int index)
 {
int ret;
-   uint32_t usb_base, cap_base, tmp;
-   struct ehci_hccr *hccr;
-   struct ehci_hcor *hcor;
const struct ehci_mxs_port *port;
 
if ((index < 0) || (index >= ARRAY_SIZE(mxs_port))) {
@@ -148,26 +179,7 @@ int ehci_hcd_stop(int index)
 
port = _port[index];
 
-   /* Stop the USB port */
-   usb_base = port->usb_regs + 0x100;
-   hccr = (struct ehci_hccr *)usb_base;
-   cap_base = ehci_readl(>cr_capbase);
-   hcor = (struct ehci_hcor *)(usb_base + HC_LENGTH(cap_base));
-
-   tmp = ehci_readl(>or_usbcmd);
-   tmp &= ~CMD_RUN;
-   ehci_writel(>or_usbcmd, tmp);
-
-   /* Disable the PHY */
-   tmp = USBPHY_PWD_RXPWDRX | USBPHY_PWD_RXPWDDIFF |
-   USBPHY_PWD_RXPWD1PT1 | USBPHY_PWD_RXPWDENV |
-   USBPHY_PWD_TXPWDV2I | USBPHY_PWD_TXPWDIBIAS |
-   USBPHY_PWD_TXPWDFS;
-   writel(tmp, >phy_regs->hw_usbphy_pwd);
-
-   /* Disable USB clock 

[PATCH v1 0/4] usb: ehci: Conversion of ehci-mxs driver to support DM (i.MX28)

2021-12-22 Thread Lukasz Majewski
This patch series focuses on converting ehci-mxs driver to support
DM and work with i.MX28 (SoC).
The XEA board has been used to test the proposed code with USB
pen drive.


Lukasz Majewski (4):
  usb: Modify Kconfig of the USB_EHCI_MXS to use this driver with imx28
  usb: ehci: Refactor the ehci_mxs_toggle_clock function to be reused
with DM
  usb: ehci: Move common mxs code to separate functions
(ehci_hcd_{stop|start})
  usb: ehci: dm: Convert i.MX28 ehci code to driver model

 drivers/usb/host/Kconfig|   7 +-
 drivers/usb/host/ehci-mxs.c | 328 
 2 files changed, 266 insertions(+), 69 deletions(-)

-- 
2.20.1



[PATCH v1 1/4] usb: Modify Kconfig of the USB_EHCI_MXS to use this driver with imx28

2021-12-22 Thread Lukasz Majewski
The ehci-mxs driver can be also used with imx28 SoC, not only
imx23.

Signed-off-by: Lukasz Majewski 
---

 drivers/usb/host/Kconfig | 7 ---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index ccecb5a3b08..7743c962cfa 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -180,12 +180,13 @@ config USB_EHCI_MX7
  Enables support for the on-chip EHCI controller on i.MX7 SoCs.
 
 config USB_EHCI_MXS
-   bool "Support for i.MX23 EHCI USB controller"
-   depends on ARCH_MX23
+   bool "Support for i.MX23/i.MX28 EHCI USB controller"
+   depends on ARCH_MX23 || ARCH_MX28
default y
select USB_EHCI_IS_TDI
help
- Enables support for the on-chip EHCI controller on i.MX23 SoCs.
+ Enables support for the on-chip EHCI controller on i.MX23 and
+ i.MX28 SoCs.
 
 config USB_EHCI_OMAP
bool "Support for OMAP3+ on-chip EHCI USB controller"
-- 
2.20.1



In spl falcon mode, and when in BOOT_DEVICE_RAM, why does it 'load' from RAM to RAM? when it's already loaded..

2021-12-22 Thread Chan Kim
Hello all,

 

I'm trying booting from RAM using SPL falcon mode. 

Another scp chip loads the image (FIT image) to SDRAM before u-boot-spl
starts.

Since the FPGA's DDR interface is not ready, we have on chip 8MB SRAM at the
start of DDR address range. (so it's faking DDR)

I made a 5.8MiB sized FIT image containing (4.6MiB linux kernel, 8.1KiB dtb,
1.1MB initramfs.cpio.gz).

CONFIG_SPL_RAM_SUPPORT and CONFIG_SPL_RAM_DEVICE are both turned on and the
spl_boot_list[0] was set to BOOT_DEVICE_RAM.

When I run it, at some point it in board_init_r function(common/spl/spl.c),
the functions below are called. (A->B means A calls B)

Boot_from_devices -> spl_ram_load_image -> spl_load_simple_fit ->
spl_simple_fit_read -> spl_get_fit_load_buffer -> malloc.

I found in spl_get_fit_load_buffer, it tries to get a buffer the size of the
FIT image. 

I spl_simple_fit_read, before calling spl_get_fit_load_buffer function, I
see thise comment.

/*

 * So far we only have one block of data from the FIT. Read the entire

 * thing, including that first block.

 *

 * For FIT with data embedded, data is loaded as part of FIT image.

 * For FIT with external data, data is not loaded in this step.

 */

In my case, the whole FIT image is already on (fake) DDR starting at
0x8000. 

But the comment sounds like it is reading the remainder into a buffer for
that FIT image.(and malloc failed while getting the buffer for that)

Why is it allocating the buffer when the whole data is already loaded?

Because my fake SDRAM size is only 8MB and the FIT image itself is 5.8MB, I
don't have any more big space for the FIT image.

I can't figure out what went wrong.

(I tried setting CONFIG_SYS_SPL_MALLOC_START and CONFIG_SYS_SPL_MALLOC_SIZE
which didn't work. Just no space..)

Is there any method I can run it without copying the already loaded FIT
image in RAM to another buffer?

I think u-boot-spl regards the RAM as a storage media, so it is tryng to
'load' from the 'media' to RAM, when it doesn't need to 'load' it.

Thank you for reading and any comment will be really appreciated.

 

Chan Kim



[PATCH v1 4/4] usb: ehci: dm: Convert i.MX28 ehci code to driver model

2021-12-22 Thread Lukasz Majewski
This commit converts i.MX28's EHCI USB host driver to driver model
(DM_USB). It is a straightforward conversion (to reuse as much code
as possible), based on ehci-mx5.c code.

Signed-off-by: Lukasz Majewski 

---

 drivers/usb/host/ehci-mxs.c | 184 
 1 file changed, 184 insertions(+)

diff --git a/drivers/usb/host/ehci-mxs.c b/drivers/usb/host/ehci-mxs.c
index aa32af1f3aa..9a614955fc1 100644
--- a/drivers/usb/host/ehci-mxs.c
+++ b/drivers/usb/host/ehci-mxs.c
@@ -11,6 +11,8 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 
 #include "ehci.h"
 
@@ -110,6 +112,7 @@ static int __ehci_hcd_stop(struct ehci_mxs_port *port)
return ehci_mxs_toggle_clock(port, 0);
 }
 
+#if !CONFIG_IS_ENABLED(DM_USB)
 static const struct ehci_mxs_port mxs_port[] = {
 #ifdef CONFIG_EHCI_MXS_PORT0
{
@@ -184,3 +187,184 @@ int ehci_hcd_stop(int index)
 
return ret;
 }
+#else /* CONFIG_IS_ENABLED(DM_USB) */
+struct ehci_mxs_priv_data {
+   struct ehci_ctrl ctrl;
+   struct usb_ehci *ehci;
+   struct udevice *vbus_supply;
+   struct ehci_mxs_port port;
+   enum usb_init_type init_type;
+};
+
+/*
+ * Below defines correspond to imx28 clk Linux (v5.15.y)
+ * clock driver to provide proper offset for PHY[01]
+ * devices.
+ */
+#define CLK_USB_PHY0 62
+#define CLK_USB_PHY1 63
+#define PLL0CTRL0(base) ((base) + 0x)
+#define PLL1CTRL0(base) ((base) + 0x0020)
+
+static int ehci_usb_ofdata_to_platdata(struct udevice *dev)
+{
+   struct ehci_mxs_priv_data *priv = dev_get_priv(dev);
+   struct usb_plat *plat = dev_get_plat(dev);
+   struct ehci_mxs_port *port = >port;
+   u32 phandle, phy_reg, clk_reg, clk_id;
+   ofnode phy_node, clk_node;
+   const char *mode;
+   int ret;
+
+   mode = ofnode_read_string(dev->node_, "dr_mode");
+   if (mode) {
+   if (strcmp(mode, "peripheral") == 0)
+   plat->init_type = USB_INIT_DEVICE;
+   else if (strcmp(mode, "host") == 0)
+   plat->init_type = USB_INIT_HOST;
+   else
+   return -EINVAL;
+   }
+
+   /* Read base address of the USB IP block */
+   ret = ofnode_read_u32(dev->node_, "reg", >usb_regs);
+   if (ret)
+   return ret;
+
+   /* Read base address of the USB PHY IP block */
+   ret = ofnode_read_u32(dev->node_, "fsl,usbphy", );
+   if (ret)
+   return ret;
+
+   phy_node = ofnode_get_by_phandle(phandle);
+   if (!ofnode_valid(phy_node))
+   return -ENODEV;
+
+   ret = ofnode_read_u32(phy_node, "reg", _reg);
+   if (ret)
+   return ret;
+
+   port->phy_regs = (struct mxs_usbphy_regs *)phy_reg;
+
+   /* Read base address of the CLK IP block and proper ID */
+   ret = ofnode_read_u32_index(phy_node, "clocks", 0, );
+   if (ret)
+   return ret;
+
+   ret = ofnode_read_u32_index(phy_node, "clocks", 1, _id);
+   if (ret)
+   return ret;
+
+   clk_node = ofnode_get_by_phandle(phandle);
+   if (!ofnode_valid(clk_node))
+   return -ENODEV;
+
+   ret = ofnode_read_u32(clk_node, "reg", _reg);
+   if (ret)
+   return ret;
+
+   port->pll = (struct mxs_register_32 *)clk_reg;
+
+   /* Provide proper offset for USB PHY clocks */
+   if (clk_id == CLK_USB_PHY0)
+   port->pll = PLL0CTRL0(port->pll);
+
+   if (clk_id == CLK_USB_PHY1)
+   port->pll = PLL1CTRL0(port->pll);
+
+   debug("%s: pll_reg: 0x%p clk_id: %d\n", __func__, port->pll, clk_id);
+   /*
+* On the imx28 the values provided by CLKCTRL_PLL0* defines to are the
+* same as ones for CLKCTRL_PLL1*. As a result the former can be used
+* for both ports - i.e. (usb[01]).
+*/
+   port->pll_en_bits = CLKCTRL_PLL0CTRL0_EN_USB_CLKS |
+   CLKCTRL_PLL0CTRL0_POWER;
+   port->pll_dis_bits = CLKCTRL_PLL0CTRL0_EN_USB_CLKS;
+   port->gate_bits = HW_DIGCTL_CTRL_USB0_CLKGATE;
+
+   return 0;
+}
+
+static int ehci_usb_probe(struct udevice *dev)
+{
+   struct usb_plat *plat = dev_get_plat(dev);
+   struct usb_ehci *ehci = dev_read_addr_ptr(dev);
+   struct ehci_mxs_priv_data *priv = dev_get_priv(dev);
+   struct ehci_mxs_port *port = >port;
+   enum usb_init_type type = plat->init_type;
+   struct ehci_hccr *hccr;
+   struct ehci_hcor *hcor;
+   int ret;
+
+   priv->ehci = ehci;
+   priv->init_type = type;
+
+   debug("%s: USB type: %s  reg: 0x%x phy_reg 0x%p\n", __func__,
+ type == USB_INIT_HOST ? "HOST" : "DEVICE", port->usb_regs,
+ (uint32_t *)port->phy_regs);
+
+#if CONFIG_IS_ENABLED(DM_REGULATOR)
+   ret = device_get_supply_regulator(dev, "vbus-supply",
+ >vbus_supply);
+   if (ret)
+   debug("%s: No vbus supply\n", dev->name);
+
+   if 

Re: [PATCH 0/3] Apple M1 power management controller support

2021-12-22 Thread Jaehoon Chung
Hi Mark,

On 12/21/21 5:30 PM, Mark Kettenis wrote:
>> From: Jaehoon Chung 
>> Date: Tue, 21 Dec 2021 08:00:38 +0900
> Hello Jaehoon,
>
>> Dear Mark,
>>
>> On 12/7/21 4:03 AM, Mark Kettenis wrote:
>>> This series adds support for the power management controller found on
>>> Apple SoCs based on the device tree bindings submitted to upstream
>>> Linux.  This is needed to enable power domains for devices that
>>> haven't been enabled by earlier boot stages.
>> Is there any patch before applied this patchset?
> This is based on next, with the watchdog patch applied:
>
> https://patchwork.ozlabs.org/project/uboot/list/?series=271919
>
> The drivers are independent, but I suppose you get conflicts in
> Kconfig and maybe the device tree without that series applied.

Thanks for sharing information. I will check on next branch. 

Best Regards,
Jaehoon Chung

>
> Cheers,
>
> Mark
>
>>>
>>> Mark Kettenis (3):
>>>   arm: dts: apple: Update Apple M1 device trees
>>>   arm: dts: apple: Add u-boot,dm-pre-reloc properties
>>>   power: domain: Add Apple pmgr driver
>>>
>>>  arch/arm/Kconfig|4 +
>>>  arch/arm/dts/Makefile   |5 +-
>>>  arch/arm/dts/t8103-j274-u-boot.dtsi |1 +
>>>  arch/arm/dts/t8103-j274.dts |  122 +--
>>>  arch/arm/dts/t8103-j293-u-boot.dtsi |1 +
>>>  arch/arm/dts/t8103-j293.dts |   92 +--
>>>  arch/arm/dts/t8103-j313-u-boot.dtsi |1 +
>>>  arch/arm/dts/t8103-j313.dts |   57 ++
>>>  arch/arm/dts/t8103-j456-u-boot.dtsi |1 +
>>>  arch/arm/dts/t8103-j456.dts |   71 ++
>>>  arch/arm/dts/t8103-j457-u-boot.dtsi |1 +
>>>  arch/arm/dts/t8103-j457.dts |   59 ++
>>>  arch/arm/dts/t8103-jxxx.dtsi|  140 
>>>  arch/arm/dts/t8103-pmgr.dtsi| 1136 +++
>>>  arch/arm/dts/t8103-u-boot.dtsi  |   25 +
>>>  arch/arm/dts/t8103.dtsi |  585 +++---
>>>  drivers/mailbox/Kconfig |9 +
>>>  drivers/mailbox/Makefile|1 +
>>>  drivers/power/domain/Kconfig|8 +
>>>  drivers/power/domain/Makefile   |1 +
>>>  drivers/power/domain/apple-pmgr.c   |  113 +++
>>>  21 files changed, 2005 insertions(+), 428 deletions(-)
>>>  create mode 100644 arch/arm/dts/t8103-j274-u-boot.dtsi
>>>  create mode 100644 arch/arm/dts/t8103-j293-u-boot.dtsi
>>>  create mode 100644 arch/arm/dts/t8103-j313-u-boot.dtsi
>>>  create mode 100644 arch/arm/dts/t8103-j313.dts
>>>  create mode 100644 arch/arm/dts/t8103-j456-u-boot.dtsi
>>>  create mode 100644 arch/arm/dts/t8103-j456.dts
>>>  create mode 100644 arch/arm/dts/t8103-j457-u-boot.dtsi
>>>  create mode 100644 arch/arm/dts/t8103-j457.dts
>>>  create mode 100644 arch/arm/dts/t8103-jxxx.dtsi
>>>  create mode 100644 arch/arm/dts/t8103-pmgr.dtsi
>>>  create mode 100644 arch/arm/dts/t8103-u-boot.dtsi
>>>  create mode 100644 drivers/power/domain/apple-pmgr.c
>>>
>>



[PATCH v1 2/3] arm: xea: config: Provide special defconfig for a single binary u-boot

2021-12-22 Thread Lukasz Majewski
The new configs/imx28_xea_sb_defconfig is introduced to facilitate
building the single binary u-boot.sb fox XEA board.

The biggest distinction from "normal" XEA imx28_xea_sb_defconfig is
support for USB mass storage devices (pen drives).

To achieve that, the CONFIG_DM_USB is enabled and supported.

Signed-off-by: Lukasz Majewski 
---

 configs/imx28_xea_sb_defconfig | 112 +
 1 file changed, 112 insertions(+)
 create mode 100644 configs/imx28_xea_sb_defconfig

diff --git a/configs/imx28_xea_sb_defconfig b/configs/imx28_xea_sb_defconfig
new file mode 100644
index 000..9513c5c695a
--- /dev/null
+++ b/configs/imx28_xea_sb_defconfig
@@ -0,0 +1,112 @@
+CONFIG_ARM=y
+CONFIG_SPL_SYS_THUMB_BUILD=y
+CONFIG_ARCH_MX28=y
+CONFIG_SYS_TEXT_BASE=0x40002000
+CONFIG_SYS_MALLOC_F_LEN=0x800
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_DM_GPIO=y
+CONFIG_SPL_DM_SPI=y
+CONFIG_DEFAULT_DEVICE_TREE="imx28-xea"
+CONFIG_SPL_TEXT_BASE=0x1000
+CONFIG_TARGET_XEA=y
+CONFIG_SPL_SYS_MALLOC_F_LEN=0x1000
+CONFIG_SPL=y
+CONFIG_ENV_OFFSET_REDUND=0x9
+CONFIG_SPL_PAYLOAD="u-boot.img"
+CONFIG_SYS_LOAD_ADDR=0x4200
+CONFIG_FIT=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyAMA0,115200n8"
+CONFIG_USE_PREBOOT=y
+CONFIG_PREBOOT="run prebootcmd"
+CONFIG_BOARD_EARLY_INIT_F=y
+# CONFIG_SPL_FRAMEWORK is not set
+CONFIG_SPL_BOARD_INIT=y
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0
+CONFIG_SUPPORT_EMMC_BOOT_OVERRIDE_PART_CONFIG=y
+CONFIG_SPL_DMA=y
+CONFIG_SPL_DM_SPI_FLASH=y
+CONFIG_SPL_OS_BOOT=y
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_SPL=y
+CONFIG_CMD_ASKENV=y
+CONFIG_CMD_GREPENV=y
+CONFIG_CMD_DM=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_MTD=y
+# CONFIG_CMD_PINMUX is not set
+CONFIG_CMD_SPI=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_REGULATOR=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_MTDPARTS=y
+CONFIG_MTDIDS_DEFAULT="nor0=spi3.0"
+CONFIG_MTDPARTS_DEFAULT="spi3.0:64k(SPL),448k(uboot),128k(envs),384k(unused1),4096k(kernel),8192k(swupdate),-(unused2)"
+CONFIG_OF_CONTROL=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names 
interrupt-parent interrupts"
+CONFIG_SPL_OF_PLATDATA=y
+# CONFIG_SPL_OF_PLATDATA_PARENT is not set
+CONFIG_ENV_OVERWRITE=y
+CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_USE_ENV_SPI_BUS=y
+CONFIG_ENV_SPI_BUS=3
+CONFIG_USE_ENV_SPI_CS=y
+CONFIG_ENV_SPI_CS=0
+CONFIG_USE_ENV_SPI_MAX_HZ=y
+CONFIG_ENV_SPI_MAX_HZ=4000
+CONFIG_USE_ENV_SPI_MODE=y
+CONFIG_ENV_SPI_MODE=0x0
+CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_DM=y
+CONFIG_SPL_DM=y
+CONFIG_DEVRES=y
+# CONFIG_SPL_BLK is not set
+CONFIG_MXS_GPIO=y
+CONFIG_SUPPORT_EMMC_BOOT=y
+CONFIG_MMC_MXS=y
+CONFIG_MTD=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SF_DEFAULT_BUS=3
+CONFIG_SF_DEFAULT_MODE=0x0
+CONFIG_SF_DEFAULT_SPEED=4000
+CONFIG_SPI_FLASH_SFDP_SUPPORT=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
+CONFIG_PHYLIB=y
+CONFIG_PHY_ADDR_ENABLE=y
+CONFIG_PHY_ADDR=1
+CONFIG_PHY_FIXED=y
+CONFIG_DM_ETH=y
+CONFIG_FEC_MXC=y
+CONFIG_MII=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_MXS=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_CONS_INDEX=0
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_MXS_SPI=y
+CONFIG_USB=y
+# CONFIG_SPL_DM_USB is not set
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_STORAGE=y
+CONFIG_FS_FAT=y
+# CONFIG_SPL_OF_LIBFDT is not set
-- 
2.20.1



[PATCH v1 1/3] arm: xea: Modify board code to generate single binary u-boot

2021-12-22 Thread Lukasz Majewski
This change provides the possibility to build XEA (imx287 based) board
U-Boot as a single binary (without support for CONFIG_SPL_FRAMEWORK).

The generated u-boot.sb can be used in the factory environment to for
example perform initial setup or HW testing.

It can be used with 'uuu' utility
(SDPS: boot -f /srv/tftp/xea/u-boot.sb)

The board_init_ll() is used in arch/arm/cpu/arm926ejs/mxs/start.S, which
is utilized when CONFIG_SPL_FRAMEWORK is disabled.

However, when it is enabled the arch/arm/cpu/arm926ejs/start.S is used,
which requires the lowlevel_init() function.

Signed-off-by: Lukasz Majewski 
---

 board/liebherr/xea/spl_xea.c | 8 
 board/liebherr/xea/xea.c | 3 ++-
 2 files changed, 10 insertions(+), 1 deletion(-)

diff --git a/board/liebherr/xea/spl_xea.c b/board/liebherr/xea/spl_xea.c
index 192f68fca5f..5ee561b8b78 100644
--- a/board/liebherr/xea/spl_xea.c
+++ b/board/liebherr/xea/spl_xea.c
@@ -290,6 +290,13 @@ u32 mxs_dram_vals[] = {
0x, 0x
 };
 
+/* #ifndef CONFIG_SPL_FRAMEWORK */
+#if !CONFIG_IS_ENABLED(FRAMEWORK)
+void board_init_ll(const u32 arg, const uint32_t *resptr)
+{
+   mxs_common_spl_init(arg, resptr, iomux_setup, ARRAY_SIZE(iomux_setup));
+}
+#else
 void lowlevel_init(void)
 {
struct mxs_pinctrl_regs *pinctrl_regs =
@@ -301,3 +308,4 @@ void lowlevel_init(void)
 
mxs_common_spl_init(0, NULL, iomux_setup, ARRAY_SIZE(iomux_setup));
 }
+#endif
diff --git a/board/liebherr/xea/xea.c b/board/liebherr/xea/xea.c
index cd11b0ada77..685e2e26a18 100644
--- a/board/liebherr/xea/xea.c
+++ b/board/liebherr/xea/xea.c
@@ -58,7 +58,8 @@ static void init_clocks(void)
mxs_set_sspclk(MXC_SSPCLK3, 96000, 0);
 }
 
-#ifdef CONFIG_SPL_BUILD
+/* #if CONFIG_SPL_BUILD && CONFIG_SPL_FRAMEWORK */
+#if CONFIG_IS_ENABLED(BUILD) && CONFIG_IS_ENABLED(FRAMEWORK)
 void board_init_f(ulong arg)
 {
init_clocks();
-- 
2.20.1



[PATCH v1 3/3] arm: dts: Enable support for USB on XEA (imx28) board

2021-12-22 Thread Lukasz Majewski
This change enables the support for USB with DM on the XEA (imx28)
board.

Signed-off-by: Lukasz Majewski 

---

 arch/arm/dts/imx28-xea.dts | 18 ++
 1 file changed, 18 insertions(+)

diff --git a/arch/arm/dts/imx28-xea.dts b/arch/arm/dts/imx28-xea.dts
index de049042f83..c97869e5225 100644
--- a/arch/arm/dts/imx28-xea.dts
+++ b/arch/arm/dts/imx28-xea.dts
@@ -41,6 +41,15 @@
enable-active-high;
regulator-boot-on;
};
+
+   reg_usb_5v: regulator-usb-5v {
+   compatible = "regulator-fixed";
+   regulator-name = "usb_vbus";
+   regulator-min-microvolt = <500>;
+   regulator-max-microvolt = <500>;
+   gpio = < 28 GPIO_ACTIVE_HIGH>;
+   enable-active-high;
+   };
 };
 
  {
@@ -110,3 +119,12 @@
};
};
 };
+
+ {
+   vbus-supply = <_usb_5v>;
+   status = "okay";
+};
+
+ {
+   status = "okay";
+};
-- 
2.20.1



[PATCH] usb: ehci-mx6: Enable OTG detection on imx8mm and imx8mn

2021-12-22 Thread Adam Ford
The imx8mm and imx8mn appear compatible with imx7d-usb
flags in the OTG driver.  If the dr_mode is defined as
host or peripheral, the device appears to operate correctly,
however the auto host/peripheral detection results in an error.

Simply adding checks in ehci_usb_phy_mode for 8mm and
8mn in ehci_usb_phy_mode is not enough, because ehci_usb_of_to_plat
is run before the clock is enabled which results in a hang.

Enable the USB clock in ehci_usb_of_to_plat and add checks in
ehci_usb_phy_mode for 8mm and 8mn to enable auto detection of
the OTG mode on i.MX8M Mini and Nano.

Signed-off-by: Adam Ford 

diff --git a/drivers/usb/host/ehci-mx6.c b/drivers/usb/host/ehci-mx6.c
index 1bd6147c76..fa0798171b 100644
--- a/drivers/usb/host/ehci-mx6.c
+++ b/drivers/usb/host/ehci-mx6.c
@@ -543,7 +543,7 @@ static int ehci_usb_phy_mode(struct udevice *dev)
plat->init_type = USB_INIT_DEVICE;
else
plat->init_type = USB_INIT_HOST;
-   } else if (is_mx7()) {
+   } else if (is_mx7() || is_imx8mm() || is_imx8mn()) {
phy_status = (void __iomem *)(addr +
  USBNC_PHY_STATUS_OFFSET);
val = readl(phy_status);
@@ -561,11 +561,30 @@ static int ehci_usb_phy_mode(struct udevice *dev)
 
 static int ehci_usb_of_to_plat(struct udevice *dev)
 {
+#if CONFIG_IS_ENABLED(CLK)
+   int ret = 0;
+   struct ehci_mx6_priv_data *priv = dev_get_priv(dev);
+
+   ret = clk_get_by_index(dev, 0, >clk);
+   if (ret < 0)
+   return ret;
+
+   ret = clk_enable(>clk);
+   if (ret)
+   return ret;
+#endif
+
struct usb_plat *plat = dev_get_plat(dev);
enum usb_dr_mode dr_mode;
 
dr_mode = usb_get_dr_mode(dev_ofnode(dev));
 
+#if CONFIG_IS_ENABLED(CLK)
+   ret = clk_disable(>clk);
+   if (ret)
+   return ret;
+#endif
+
switch (dr_mode) {
case USB_DR_MODE_HOST:
plat->init_type = USB_INIT_HOST;
-- 
2.32.0