Add support for ST-Ericsson U8500 SoC and HREF platform
John Rigby (2):
armv7: Add ST-Ericsson u8500 arch
armv7: Add support for ST-Ericsson U8500 href platform
Michael Brandt (1):
I2C: Add driver for ST-Ericsson U8500 i2c
Rabin Vincent (1):
Serial: p1011: new vendor init options
From: Rabin Vincent rabin.vinc...@stericsson.com
Two new options:
CONFIG_PL011_SERIAL_RLCR
Some vendor versions of PL011 serial ports (e.g. ST-Ericsson U8500)
have separate receive and transmit line control registers. Set
this variable to initialize the extra register.
From: Michael Brandt michael.bra...@stericsson.com
Signed-off-by: John Rigby john.ri...@linaro.org
CC: Heiko Schocher h...@denx.de
---
v2: Incorporate suggestions from Heiko Schocher
v3: Fix line length problem reported by Heiko Schocher
drivers/i2c/Makefile|1 +
drivers/i2c/u8500_i2c.c
Based on ST-Ericsson internal git repo.
Signed-off-by: Mathieu Poirier mathieu.poir...@linaro.org
Signed-off-by: John Rigby john.ri...@linaro.org
CC: Albert Aribaud albert.arib...@free.fr
---
v2: cleanup, mostly removal of unused defines
v3: remove prototype from sys_proto.h as suggested by
Minimal platform support to boot linux from SD.
Supported devices/hw limited to external MMC/SD slot,
GPIO, I2C and minimal PRCMU.
Signed-off-by: John Rigby john.ri...@linaro.org
CC: Albert Aribaud albert.arib...@free.fr
---
This board support requires mmc driver patch set from Matt Waddel.
v2:
From: Alex Dubov oa...@yahoo.com
AMC8548 is a RapidIO development board in AMC form factor, featuring MPC8548E
processor, DDR2 SO-DIMM slot, 16MB of hardwired NAND flash memory, real time
clock and additional serial EEPROM on i2c bus (enabled). USB controller is
available, but not presently
Some bug fixes for the recent SPI flash cleanups, some more cleanups
based on work by Richard, support for +len when erasing SPI flashes,
and more cleanups I noticed should be done while doing all of that.
Mike Frysinger (7):
sf: punt unused spi_flash_region struct
sf: atmel: undo unification
The previous unification patch missed setting up the sst read func.
Signed-off-by: Mike Frysinger vap...@gentoo.org
---
drivers/mtd/spi/sst.c |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/drivers/mtd/spi/sst.c b/drivers/mtd/spi/sst.c
index 29bb88b..38983bd 100644
---
The AT45 flashes are completely different (at the command set and
status register level) from all other SPI flashes, so we can't unify
their logic with common code.
Signed-off-by: Mike Frysinger vap...@gentoo.org
---
drivers/mtd/spi/atmel.c | 31 +--
1 files
From: Richard Retanubun richardretanu...@ruggedcom.com
This patch adds [+]len handler for the erase command that will
automatically round up the requested erase length to the flash's
sector_size.
Signed-off-by: Richard Retanubun richardretanu...@ruggedcom.com
Signed-off-by: Mike Frysinger
Signed-off-by: Mike Frysinger vap...@gentoo.org
---
include/spi_flash.h |5 -
1 files changed, 0 insertions(+), 5 deletions(-)
diff --git a/include/spi_flash.h b/include/spi_flash.h
index 1f8ba29..89cc3a7 100644
--- a/include/spi_flash.h
+++ b/include/spi_flash.h
@@ -26,11 +26,6 @@
From: Richard Retanubun richardretanu...@ruggedcom.com
This patch adds a new member to struct spi_flash (u16 sector_size)
and updates the spi flash drivers to start populating it.
This parameter can be used by spi flash commands that need to round
up units of operation to the flash's
No need for these to be exported as they are only accessed indirectly
via function pointers.
Signed-off-by: Mike Frysinger vap...@gentoo.org
---
drivers/mtd/spi/atmel.c|4 ++--
drivers/mtd/spi/eon.c |2 +-
drivers/mtd/spi/macronix.c |2 +-
drivers/mtd/spi/ramtron.c |2
Signed-off-by: Mike Frysinger vap...@gentoo.org
---
drivers/mtd/spi/spi_flash.c |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index ccb7e31..c75b716 100644
--- a/drivers/mtd/spi/spi_flash.c
+++
The common spi flash layer displays useful info when probing, so no
need for us to duplicate that.
Signed-off-by: Mike Frysinger vap...@gentoo.org
---
common/cmd_sf.c |3 ---
1 files changed, 0 insertions(+), 3 deletions(-)
diff --git a/common/cmd_sf.c b/common/cmd_sf.c
index
Requires a little reworking of the code flow with sub-functions, but
not a big deal.
Signed-off-by: Mike Frysinger vap...@gentoo.org
---
common/cmd_sf.c | 59 +++
1 files changed, 29 insertions(+), 30 deletions(-)
diff --git
these patches have been integrated/superseded by my recent sf patchset
-mike
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Although most IDE controller is designed to be connected to PCI bridge,
there are still some IDE controller support AHB interface for SoC design.
The driver implementation of these IDE-AHB controllers differ from other
IDE-PCI controller, some additional registers and commands access is required
Faraday's ftide020_s is an IDE-AHB controller for SoC design.
This patch add the u-boot driver (PIO) of ftide020 ATA (IDE) driver.
IDE commands include read, info, and other functions has been implemented.
Because this IDE controller support AHB interface only which is differ
from other most IDE
Hello John,
John Rigby wrote:
From: Michael Brandt michael.bra...@stericsson.com
Signed-off-by: John Rigby john.ri...@linaro.org
CC: Heiko Schocher h...@denx.de
---
v2: Incorporate suggestions from Heiko Schocher
v3: Fix line length problem reported by Heiko Schocher
Hello Nick,
Nick Thompson wrote:
The omap24xx driver only seems to support devices that have a single
subaddress
byte. With these types of devices, the first access in a bus transaction is
usually a write (writes the subaddress) followed by either a read or write to
access the devices
On Wednesday, March 16, 2011 04:04:42 Xie Shaohui-B21989 wrote:
On Tuesday, March 15, 2011 22:53:20 Shaohui Xie wrote:
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
+#ifndef CONFIG_FSL_ESPI
+#else
+#endif
yikes, this cant be right
[Xie
On Friday, December 24, 2010 02:16:05 Thomas Chou wrote:
This is the v9 update of the mmc_spi driver. Please enable DEBUG on the top
of mmc_spi.c and help me perform the tests.
A new spi_set_speed() is added to meet the 400KHz clock requirement during
mmc card initialization. An example
In some cases (e.g. bootm with a elf payload) there is a in place copy of
data to the same address. Catching this saves some ms while booting.
Signed-off-by: Matthias Weisser weiss...@arcor.de
---
lib/string.c |9 +
1 files changed, 9 insertions(+), 0 deletions(-)
diff --git
Make sure the pin request passed before attempting to use it later on.
Signed-off-by: Mike Frysinger vap...@gentoo.org
---
common/cmd_gpio.c |5 -
1 files changed, 4 insertions(+), 1 deletions(-)
diff --git a/common/cmd_gpio.c b/common/cmd_gpio.c
index 9c9de28..9cc790a 100644
---
this summary is kind of weak. please prefix it with something like string:
or memcpy/memmove:. keep in mind that the summary needs to quickly pick out
what the changeset is doing from every other changeset in the tree based only
on that. or at least give a pretty good idea.
side note, i
Hi Matthias,
Le 12/04/2011 08:58, Matthias Weisser a écrit :
In some cases (e.g. bootm with a elf payload) there is a in place copy of
data to the same address. Catching this saves some ms while booting.
Signed-off-by: Matthias Weisserweiss...@arcor.de
---
lib/string.c |9 +
Signed-off-by: Mike Frysinger vap...@gentoo.org
---
include/configs/bfin_adi_common.h |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/include/configs/bfin_adi_common.h
b/include/configs/bfin_adi_common.h
index 9e61542..3312681 100644
---
Am 12.04.2011 09:06, schrieb Albert ARIBAUD:
Hi Matthias,
Le 12/04/2011 08:58, Matthias Weisser a écrit :
In some cases (e.g. bootm with a elf payload) there is a in place copy of
data to the same address. Catching this saves some ms while booting.
Signed-off-by: Matthias
Am 12.04.2011 09:05, schrieb Mike Frysinger:
this summary is kind of weak. please prefix it with something like string:
or memcpy/memmove:. keep in mind that the summary needs to quickly pick out
what the changeset is doing from every other changeset in the tree based only
on that. or at
Hi John,
Le 12/04/2011 08:17, John Rigby a écrit :
diff --git a/arch/arm/cpu/armv7/u8500/lowlevel.S
b/arch/arm/cpu/armv7/u8500/lowlevel.S
new file mode 100644
index 000..0e3f8fc
--- /dev/null
+++ b/arch/arm/cpu/armv7/u8500/lowlevel.S
@@ -0,0 +1,33 @@
+/*
+ * See file CREDITS for
Hi Matthias,
Le 12/04/2011 09:13, Matthias Weißer a écrit :
Am 12.04.2011 09:06, schrieb Albert ARIBAUD:
Hi Matthias,
Le 12/04/2011 08:58, Matthias Weisser a écrit :
In some cases (e.g. bootm with a elf payload) there is a in place
copy of
data to the same address. Catching this saves some
On 04/11/2011 03:05 PM, Ben Gardiner wrote:
Hi Ben,
[...]
@@ -143,20 +144,20 @@ int board_init(void)
irq_init();
#endif
-#ifdef CONFIG_NAND_DAVINCI
/*
* NAND CS setup - cycle counts based on da850evm NAND timings in the
* Linux kernel @ 25MHz EMIFA
Dear Sung Hee Park
On 12 April 2011 12:04, Sung Hee Park shpa...@stanford.edu wrote:
Hi,
I'm having a problem with detecting a network controller in Mistral's
omap3evm board rev G. I've compiled both x-loader and u-boot from the one
included in dvsdk_omap3530-evm_4_01_00_09_setuplinux. Can
I believe this is correct. I have redone the patch as two patches. The first
patch fixes the 8-bit addressing and has been tested with both 8 and 16-bit
support with Spansion. The second patch adds a 1us delay after every reset
call. In my email correspondence with Spansion they said that at
Am 12.04.2011 09:27, schrieb Albert ARIBAUD:
Hi Matthias,
Le 12/04/2011 09:13, Matthias Weißer a écrit :
Am 12.04.2011 09:06, schrieb Albert ARIBAUD:
Hi Matthias,
Le 12/04/2011 08:58, Matthias Weisser a écrit :
In some cases (e.g. bootm with a elf payload) there is a in place
copy of
This patch corrects the addresses used when working with Spansion/AMD FLASH
chips. Addressing for 8 and 16 bits is almost identical except in the 16
bit case the LSB of the address is always 0. The confusion arose because
the addresses in the datasheet for the 16 bit mode are word addresses but
I ran into a problem where the reset was failing except when I enabled
debugging support. After talking with Garret Swalling at Spansion I
was told that the GL-N series of devices require a 500ns wait for the
reset to complete. The below patch adds a 1us delay after all reset
commands.
-Aaron
Hi
I looked into the documentation but I can't find a command which copies
an image from one address to another. This would be extremly useful for
me as reading from (uncached) flash is way slower then reading from
cached SDRAM. Currently booting is done by a simple bootm. This requires
that
Hi Aaron,
On Tuesday 12 April 2011 09:46:22 Aaron Williams wrote:
I believe this is correct.
Hmmm, I'm still not convinced about this reset call in the erase function. Do
you really need it for the CFI driver to work correctly on your board? Could
you please test without this reset command?
Hi Aaron,
Le 12/04/2011 09:53, Aaron Williams a écrit :
This patch corrects the addresses used when working with Spansion/AMD FLASH
chips. Addressing for 8 and 16 bits is almost identical except in the 16
bit case the LSB of the address is always 0. The confusion arose because
the addresses
Dear Joakim Tjernlund,
In message 1291642606-4290-1-git-send-email-joakim.tjernl...@transmode.se you
wrote:
The -fPIC flag belongs with -mrelocatable, move it there.
Also change -fPIC to -fpic as this produces smaller
binaries.
However, currently -mrelocatable promotes -fpic to -fPIC, a
fix
Hi Stefan,
It looks like the other reset is not needed. The delay is needed. Without it
sometimes the reset would fail on some of our boards.
Here's what Garret Swalling at Spansion told me:
...
The CFI reset calls into two subroutines that resove to:
flash_write_cmd(info, 0, 0,
Dear Joakim Tjernlund,
In message 1291642606-4290-1-git-send-email-joakim.tjernl...@transmode.se
you wrote:
The -fPIC flag belongs with -mrelocatable, move it there.
Also change -fPIC to -fpic as this produces smaller
binaries.
However, currently -mrelocatable promotes -fpic to
The omap24xx driver only seems to support devices that have a single subaddress
byte. With these types of devices, the first access in a bus transaction is
usually a write (writes the subaddress) followed by either a read or write to
access the devices registers.
Many such devices will respond to
On 04/11/2011 04:04 PM, Ben Gardiner wrote:
Hi Stefano,
Hi Ben,
Thanks for sharing this patch -- I have been using the -O 2048 (VID
header offset) option to prevent subpages here.
Yes, this works too, at least with Linux.
On Sat, Apr 9, 2011 at 2:05 PM, Stefano Babic sba...@denx.de
Hi Aaron,
On Tuesday 12 April 2011 10:33:05 Aaron Williams wrote:
It looks like the other reset is not needed.
Good. Then please remove it from your patch and resend a new version labled
v2 [PATCH v2]. And please include the patch revision history as mentioned by
Albert. See this link for
Hi, Wolfgang,
2011/4/11 Wolfgang Denk w...@denx.de:
Dear Jason Liu,
In message banlktima8u7djdbb0sb+an0wsrbwrm5...@mail.gmail.com you wrote:
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
...
Who will pick up this patch?
It's MMC code, so that would be MMC custodian.
The original comparing the 4.1 with gcc --version will assume
the toolchain 4.4.1 as toolchain 4.1 and setup wrong CPP flags.
Signed-off-by: Lu Jingchang b35...@freescale.com
Signed-off-by: Jason Jin jason@freescale.com
---
arch/m68k/cpu/mcf5227x/config.mk |2 +-
Some typoes in Makefile and boards.cfg make the M54455 board
and M53017 board configuration broken.
Signed-off-by: Jason Jin jason@freescale.com
---
Makefile |1 +
boards.cfg |2 +-
2 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/Makefile b/Makefile
index
Move the environment outside the u-boot image, leave more
space for the text to avoid the possible PC truncate issue.
The lds file for ColdFire need to clean up since commit
6d8962e814c15807dd6ac5757904be2a02d187b8 'Switch from archive
libraries to partial linking'.
Signed-off-by: Jason Jin
The lds file for ColdFire boards need to clean up since commit
6d8962e814c15807dd6ac5757904be2a02d187b8 'Switch from archive
libraries to partial linking'.
Signed-off-by: Jason Jin jason@freescale.com
---
board/freescale/m5208evbe/u-boot.lds |3 ---
board/freescale/m52277evb/u-boot.spa |
There is no network device on ColdFire 52277EVB board.But the default
cmd include NFS define which make the build error.
Signed-off-by: Jason Jin jason@freescale.com
---
include/configs/M52277EVB.h |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git
commit a45dde2293c816138e53c26eca6fd0322583f9a6 changed the dm9000
direct register access to standard IO. This should work
on the ColdFire platform as there are corresponding macros for
the LE devices. But the hardware settings on M5253DEMO board had
swapped the byte order which make the original
Signed-off-by: David Müller d.muel...@elsoft.ch
---
include/configs/VCMA9.h |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/include/configs/VCMA9.h b/include/configs/VCMA9.h
index ebe9e42..b723908 100644
--- a/include/configs/VCMA9.h
+++ b/include/configs/VCMA9.h
Signed-off-by: David Müller d.muel...@elsoft.ch
---
board/mpl/vcma9/Makefile |2 +-
board/mpl/vcma9/flash.c | 432 --
board/mpl/vcma9/vcma9.c | 12 ++
include/configs/VCMA9.h | 28 +--
4 files changed, 22 insertions(+), 452 deletions(-)
This patch serie brings the VCMA9 port in sync with the latest U-Boot
version by doing the following:
- do the necessary adjustments to support the ARM relocation feature
- use the CFI flash driver (and removing the old one)
- remove the unneeded config.mk file
- various cleanups/coding style
Signed-off-by: David Müller d.muel...@elsoft.ch
---
board/mpl/vcma9/config.mk | 24
include/configs/VCMA9.h |2 ++
2 files changed, 2 insertions(+), 24 deletions(-)
delete mode 100644 board/mpl/vcma9/config.mk
diff --git a/board/mpl/vcma9/config.mk
Signed-off-by: David Müller d.muel...@elsoft.ch
---
board/mpl/vcma9/cmd_vcma9.c |4 +-
board/mpl/vcma9/lowlevel_init.S | 549 ++-
board/mpl/vcma9/vcma9.c | 272 +---
board/mpl/vcma9/vcma9.h | 117 +
The following patches update some ColdFire boards to work with
latest u-boot. Those update were tested on following Freescale boards:
M54455EVB, M54451EVB, M5475EVB(M5475CFE_config), M5485EVB(M5485HFE_conifg),
M5208EVB, M5253DEMO, M52277EVB, M53017EVB, M5373EVB,
M5329EVB(M5329BFEE_config).
On 04/11/2011 09:16 PM, Scott Wood wrote:
This only controls the davinci driver, so it should be
CONFIG_SYS_DAVINCI_NAND_NO_SUBPAGE.
Is this really board-specific?
No, really not.
Does the davinci driver ever support
subpage?
No, it does not. This problem affects all boards using the
Dear Jason Jin,
In message 1302597610-15646-4-git-send-email-jason@freescale.com you
wrote:
Move the environment outside the u-boot image, leave more
space for the text to avoid the possible PC truncate issue.
The lds file for ColdFire need to clean up since commit
Dear Jason Jin,
In message 1302597610-15646-3-git-send-email-jason@freescale.com you
wrote:
The original comparing the 4.1 with gcc --version will assume
the toolchain 4.4.1 as toolchain 4.1 and setup wrong CPP flags.
Signed-off-by: Lu Jingchang b35...@freescale.com
Signed-off-by:
Dear Jason Jin,
In message 1302597610-15646-6-git-send-email-jason@freescale.com you
wrote:
commit a45dde2293c816138e53c26eca6fd0322583f9a6 changed the dm9000
direct register access to standard IO. This should work
on the ColdFire platform as there are corresponding macros for
the LE
Dear =?UTF-8?q?David=20M=C3=BCller?=,
In message 1302600759-28219-5-git-send-email-d.muel...@elsoft.ch you wrote:
--===1758926862==
Signed-off-by: David Müller d.muel...@elsoft.ch
---
board/mpl/vcma9/cmd_vcma9.c |4 +-
board/mpl/vcma9/lowlevel_init.S | 549
Dear =?UTF-8?q?David=20M=C3=BCller?=,
In message 1302600759-28219-2-git-send-email-d.muel...@elsoft.ch you wrote:
--===0390427290==
Signed-off-by: David Müller d.muel...@elsoft.ch
---
include/configs/VCMA9.h |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
Dear =?UTF-8?q?David=20M=C3=BCller?=,
In message 1302600759-28219-2-git-send-email-d.muel...@elsoft.ch you wrote:
Signed-off-by: David Müller d.muel...@elsoft.ch
Actually the Subject: is wrong. No part in this patch activates
anything - you just add some missing definitions to fix build
Of the following patches in my latest 6 patch series ([U-Boot] [PATCH 0/6]
x86: General cleanup), only the first has shown up in patchwork. Has anyone
else experienced this?
http://lists.denx.de/pipermail/u-boot/2011-April/090145.html
http://lists.denx.de/pipermail/u-boot/2011-April/090146.html
On Tue, Apr 12, 2011 at 5:08 AM, Stefano Babic sba...@denx.de wrote:
Ben Gardiner wrote:
Thanks for sharing this patch -- I have been using the -O 2048 (VID
header offset) option to prevent subpages here.
Yes, this works too, at least with Linux.
(being picky / for archival purposes) In
Am Montag, den 11.04.2011, 23:14 -0400 schrieb Mike Frysinger:
On Monday, April 11, 2011 15:34:17 Andreas Pretzsch wrote:
Am Sonntag, den 03.04.2011, 04:43 -0400 schrieb Mike Frysinger:
+ return port_base + simple_strtoul(name, NULL, 10);
Remark: Leads to an oom access when exceeding
Am Dienstag, den 12.04.2011, 03:03 -0400 schrieb Mike Frysinger:
Make sure the pin request passed before attempting to use it later on.
Signed-off-by: Mike Frysinger vap...@gentoo.org
Tested-by: Andreas Pretzsch a...@cn-eng.de
Verified on Blackfin BF561 with full port range.
--
carpe
Hello,
I use the spi interfaces with more then one flash in the U-Boot. Actually I
use one spi fram(ramtron) and one spi flash (stmicro).
I first thought that configuring both flags is just what I need:
CONFIG_SPI_FLASH_STMICRO
CONFIG_SPI_FLASH_RAMTRON
But since the ramtron implementation change
Am Montag, den 11.04.2011, 23:08 +0200 schrieb Wolfgang Denk:
But if you really want to keep the existing embedded environment when
flashing a new U-Boot, then after you have loaded the new U-Boot in RAM
as usual, all you need is to overwrite its environment with the one
already in
Dear Andreas Pretzsch,
In message 1302614926.27200.12.ca...@ws-apr.office.loc you wrote:
True, but it would pollute the env with transient variables like
fileaddr, filesize and serveraddr. Nothing serious, of course.
Do you really care to delete these before each and every saveenv?
Or is your
On 04/12/2011 12:35 AM, Daniel Schwierzeck wrote:
diff --git a/arch/mips/cpu/mips32/start.S b/arch/mips/cpu/mips32/start.S
index 0a9d9d5..f1e3447 100644
--- a/arch/mips/cpu/mips32/start.S
+++ b/arch/mips/cpu/mips32/start.S
@@ -62,11 +62,11 @@
.globl _start
.text
_start:
-
On Mon, Apr 11, 2011 at 05:03:32AM -0700, Prafulla Wadaskar wrote:
I have tested these patches and works for openRD-Base, certainly it may not
work for ultimate and client since respective machine ids are not programmed.
I can't believe I forgot this part.
May you please provide tuned
On Tue, Apr 12, 2011 at 3:29 AM, Stefano Babic sba...@denx.de wrote:
On 04/11/2011 03:05 PM, Ben Gardiner wrote:
[...]
@@ -143,20 +144,20 @@ int board_init(void)
irq_init();
#endif
-#ifdef CONFIG_NAND_DAVINCI
/*
* NAND CS setup - cycle counts based on da850evm NAND
---
MAKEALL |2 ++
board/Marvell/openrd_base/openrd_base.c |6 ++
boards.cfg |4 +++-
include/configs/openrd_base.h | 14 +-
4 files changed, 24 insertions(+), 2 deletions(-)
diff --git a/MAKEALL
(rework of Julian Pidancet's patch)
---
board/Marvell/openrd_base/openrd_base.c | 22 ++
include/configs/openrd_base.h | 14 --
2 files changed, 30 insertions(+), 6 deletions(-)
diff --git a/board/Marvell/openrd_base/openrd_base.c
---
board/Marvell/openrd/Makefile | 56 ++
board/Marvell/openrd/kwbimage.cfg | 168 ++
board/Marvell/openrd/openrd.c | 173 +++
board/Marvell/openrd/openrd.h | 46
On Tuesday, April 12, 2011 09:13:35 Andreas Pretzsch wrote:
Am Montag, den 11.04.2011, 23:14 -0400 schrieb Mike Frysinger:
On Monday, April 11, 2011 15:34:17 Andreas Pretzsch wrote:
Am Sonntag, den 03.04.2011, 04:43 -0400 schrieb Mike Frysinger:
+ return port_base +
On Tuesday, April 12, 2011 09:23:21 Ran Shalit wrote:
But since the ramtron implementation change the value of IDCODE_CONT_LEN, I
will get that this constant (IDCODE_CONT_LEN)
is OK for one flash but wrong in the other
that is incorrect. the IDCODE_CONT_LEN only controls the max # of ident
On Tuesday, April 12, 2011 04:01:18 Matthias Weißer wrote:
I looked into the documentation but I can't find a command which copies
an image from one address to another.
you mean 'cp' ?
-mike
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Hi Clint,
Le 12/04/2011 18:09, Clint Adams a écrit :
---
board/Marvell/openrd/Makefile | 56 ++
board/Marvell/openrd/kwbimage.cfg | 168
++
board/Marvell/openrd/openrd.c | 173
+++
Le 12/04/2011 18:09, Clint Adams a écrit :
---
MAKEALL |2 ++
board/Marvell/openrd_base/openrd_base.c |6 ++
boards.cfg |4 +++-
include/configs/openrd_base.h | 14 +-
4 files changed,
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Dear Reinhard Meyer,
can you apply this patch to current atmel_rework 110411.
The eb_cpux9k2 board runs with this patch.
The at91rm9200_ek has compiled without error's.
Best regards
Jens Scharsig
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The current NAND timings, introduced in commit
a3f88293ddd13facd734769c1664d35ab4ed681f da850evm: setup the NAND flash
timings , incorrectly set WSTROBE and TA to 0. A more recent inspection of the
values set by the Linux kernel indicates that these should be set to 1.
Set the WSTROBE and TA
Dear Zhao Chenhui,
In message 1296202676-30873-1-git-send-email-b35...@freescale.com you wrote:
ONFIG_NAND_U_BOOT indicates whether the SPL is used, while
CONFIG_NAND_SPL is set only when building the SPL itself (and isn't
available in makefiles anyway). This is the linker script for the
On Tue, 12 Apr 2011 20:39:21 +0200
Wolfgang Denk w...@denx.de wrote:
Dear Zhao Chenhui,
In message 1296202676-30873-1-git-send-email-b35...@freescale.com you wrote:
ONFIG_NAND_U_BOOT indicates whether the SPL is used, while
CONFIG_NAND_SPL is set only when building the SPL itself (and
On Tue, Apr 12, 2011 at 11:38:13AM -0700, Julian Pidancet wrote:
This part only initialize second PHY for the OpenRD-Client board and not
the OpenRD-Ultimate.
I would do something like:
#if defined(CONFIG_BOARD_IS_OPENRD_CLIENT) ||
defined(CONFIG_BOARD_IS_OPENRD_ULTIMATE)
#if
---
MAKEALL |2 ++
board/Marvell/openrd_base/openrd_base.c |6 ++
boards.cfg |4 +++-
include/configs/openrd_base.h | 14 +-
4 files changed, 24 insertions(+), 2 deletions(-)
diff --git a/MAKEALL
(rework of Julian Pidancet's patch)
---
board/Marvell/openrd_base/openrd_base.c | 24
include/configs/openrd_base.h | 14 --
2 files changed, 32 insertions(+), 6 deletions(-)
diff --git a/board/Marvell/openrd_base/openrd_base.c
---
board/Marvell/openrd/Makefile | 56 ++
board/Marvell/openrd/kwbimage.cfg | 168 +
board/Marvell/openrd/openrd.c | 175 +++
board/Marvell/openrd/openrd.h | 46
Am 12.04.2011 18:20, schrieb Mike Frysinger:
On Tuesday, April 12, 2011 04:01:18 Matthias Weißer wrote:
I looked into the documentation but I can't find a command which copies
an image from one address to another.
you mean 'cp' ?
Well, not exactly. cp doesn't know anything about the size of
Thank you for reworking this patch.
On 04/12/2011 09:09 AM, Clint Adams wrote:
(rework of Julian Pidancet's patch)
---
board/Marvell/openrd_base/openrd_base.c | 22 ++
include/configs/openrd_base.h | 14 --
2 files changed, 30 insertions(+), 6
Dear Klaus Flittner,
In message 20110131204025.1ffb0...@earth.lan you wrote:
With the current hardware initialisation of the driver all packets with
an odd number of preamble nibbles are dropped. Some switches seem to
send all packets with such an preamble.
According to the functional
Dear Aaron Williams,
In message 201101311955.50902.aaron.willi...@caviumnetworks.com you wrote:
There is a bug in the min and max macros in common.h which occurs if
Y is a larger type than X. For example, if Y is a 64-bit value and X
is a 32-bit value then Y will be truncated to 32-bits. This
Dear Catalin Radu,
In message 1296664907-2185-1-git-send-email-cata...@virtualmetrix.com you
wrote:
---
lib/gunzip.c | 16 ++--
1 files changed, 10 insertions(+), 6 deletions(-)
Please resubmit after cleaning up as requested by Sergei!
Best regards,
Wolfgang Denk
--
DENX
Dear Catalin Radu,
In message 1296664907-2185-1-git-send-email-cata...@virtualmetrix.com you
wrote:
---
lib/gunzip.c | 16 ++--
1 files changed, 10 insertions(+), 6 deletions(-)
Oops. Please ignore me.
Or rather: Next time when posting a follow up patch please make sure
to
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