Re: [U-Boot] [PATCH 1/2] configs: mx6_common: Restrict CONFIG_ARM_ERRATA_742230 for multi-core
Hi Fabio, On 06/01/2014 14:14, Fabio Estevam wrote: According to e9fd66defd (ARM: mx6: define CONFIG_ARM_ERRATA_742230), the CONFIG_ARM_ERRATA_742230 option should only be applied to multi-core variants, so restrict its usage for quad and dual-lite only. Signed-off-by: Fabio Estevam fabio.este...@freescale.com --- include/configs/mx6_common.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h index 514d634..0b8db85 100644 --- a/include/configs/mx6_common.h +++ b/include/configs/mx6_common.h @@ -17,7 +17,9 @@ #ifndef __MX6_COMMON_H #define __MX6_COMMON_H +#if defined(CONFIG_MX6Q) || defined(CONFIG_MX6DL) #define CONFIG_ARM_ERRATA_742230 +#endif #define CONFIG_ARM_ERRATA_743622 #define CONFIG_ARM_ERRATA_751472 #define CONFIG_BOARD_POSTCLK_INIT In Kernel I cannot read that the errata is related to a multicore processor. Indeed, it is related to the Cortex-A9 version. This option enables the workaround for the 742230 Cortex-A9 (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction between two write operations may not ensure the correct visibility ordering of the two writes. This workaround sets a specific bit in the diagnostic register of the Cortex-A9 which causes the DMB instruction to behave as a DSB, ensuring the correct behaviour of the two writes. The fix was merged in kernel since a lot of time, before having multicore processors for ARM. At least the commit message does not seem coherent with the explanations in kernel. Maybe has solo a upgraded core version as dual/quad ? Best regards, Stefano -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v4 1/3] cm_t335: fix linker file to produce full ELF
Newly added cm_t335 was missed in commit 47ed5dd0 which
made ARM targets produce full ELF files. Fix its linker
script.
This change is binary-invariant when only .dynsym, .dynstr,
.dynamic, .plt, .interp and .gun sections are declared.
Sections .hash, .got.plt, .dynbss and .ARM.exidx are also
declared so that their (unused) content is moved out of the
u-boot binary.
Signed-off-by: Albert ARIBAUD albert.u.b...@aribaud.net
---
Changes in v4: None
Changes in v3:
- fixed cm_t335 linker script
Changes in v2: None
board/compulab/cm_t335/u-boot.lds | 16 ++--
1 file changed, 10 insertions(+), 6 deletions(-)
diff --git a/board/compulab/cm_t335/u-boot.lds
b/board/compulab/cm_t335/u-boot.lds
index 1b609a2..d25c19a 100644
--- a/board/compulab/cm_t335/u-boot.lds
+++ b/board/compulab/cm_t335/u-boot.lds
@@ -92,10 +92,14 @@ SECTIONS
KEEP(*(.__bss_end));
}
- /DISCARD/ : { *(.dynsym) }
- /DISCARD/ : { *(.dynstr*) }
- /DISCARD/ : { *(.dynamic*) }
- /DISCARD/ : { *(.plt*) }
- /DISCARD/ : { *(.interp*) }
- /DISCARD/ : { *(.gnu*) }
+ .dynsym _end : { *(.dynsym) }
+ .hash : { *(.hash) }
+ .got.plt : { *(.got.plt) }
+ .dynbss : { *(.dynbss) }
+ .dynstr : { *(.dynstr*) }
+ .dynamic : { *(.dynamic*) }
+ .plt : { *(.plt*) }
+ .interp : { *(.interp*) }
+ .gnu : { *(.gnu*) }
+ .ARM.exidx : { *(.ARM.exidx*) }
}
--
1.8.3.2
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[U-Boot] [PATCH v4 2/3] arm: make _end compiler-generated
This prevents references to _end from generating absolute
relocation records.
This change is binary invariant for ARM targets.
Signed-off-by: Albert ARIBAUD albert.u.b...@aribaud.net
---
Changes in v4: None
Changes in v3:
- Replace _end in linker scripts with _image_binary_end
Changes in v2: None
arch/arm/cpu/arm1136/u-boot-spl.lds| 6 +-
arch/arm/cpu/arm920t/ep93xx/u-boot.lds | 5 -
arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds | 9 +++--
arch/arm/cpu/arm926ejs/spear/u-boot-spl.lds| 9 +++--
arch/arm/cpu/armv7/am33xx/u-boot-spl.lds | 6 +-
arch/arm/cpu/armv7/omap-common/u-boot-spl.lds | 6 +-
arch/arm/cpu/armv7/socfpga/u-boot-spl.lds | 6 +-
arch/arm/cpu/at91-common/u-boot-spl.lds| 6 +-
arch/arm/cpu/ixp/u-boot.lds| 9 +++--
arch/arm/cpu/u-boot-spl.lds| 9 +++--
arch/arm/cpu/u-boot.lds| 9 +++--
arch/arm/lib/Makefile | 2 +-
arch/arm/lib/sections.c| 1 +
board/Barix/ipam390/u-boot-spl-ipam390.lds | 6 +-
board/actux1/u-boot.lds| 9 +++--
board/actux2/u-boot.lds| 9 +++--
board/actux3/u-boot.lds| 9 +++--
board/ait/cam_enc_4xx/u-boot-spl.lds | 6 +-
board/compulab/cm_t335/u-boot.lds | 9 +++--
board/davinci/da8xxevm/u-boot-spl-da850evm.lds | 6 +-
board/davinci/da8xxevm/u-boot-spl-hawk.lds | 5 -
board/dvlhost/u-boot.lds | 9 +++--
board/freescale/mx31ads/u-boot.lds | 9 +++--
board/samsung/common/exynos-uboot-spl.lds | 6 +-
board/ti/am335x/u-boot.lds | 9 +++--
board/vpac270/u-boot-spl.lds | 9 +++--
26 files changed, 146 insertions(+), 38 deletions(-)
diff --git a/arch/arm/cpu/arm1136/u-boot-spl.lds
b/arch/arm/cpu/arm1136/u-boot-spl.lds
index bccde73..0299902 100644
--- a/arch/arm/cpu/arm1136/u-boot-spl.lds
+++ b/arch/arm/cpu/arm1136/u-boot-spl.lds
@@ -33,7 +33,11 @@ SECTIONS
.data : { *(SORT_BY_ALIGNMENT(.data*)) } .sram
. = ALIGN(4);
__image_copy_end = .;
- _end = .;
+
+ .end :
+ {
+ *(.__end)
+ }
.bss :
{
diff --git a/arch/arm/cpu/arm920t/ep93xx/u-boot.lds
b/arch/arm/cpu/arm920t/ep93xx/u-boot.lds
index 4bed4fc..9699404 100644
--- a/arch/arm/cpu/arm920t/ep93xx/u-boot.lds
+++ b/arch/arm/cpu/arm920t/ep93xx/u-boot.lds
@@ -50,5 +50,8 @@ SECTIONS
.bss : { *(.bss*) }
__bss_end = .;
- _end = .;
+ .end :
+ {
+ *(.__end)
+ }
}
diff --git a/arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds
b/arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds
index 80fb9bd..d0b482d 100644
--- a/arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds
+++ b/arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds
@@ -49,9 +49,14 @@ SECTIONS
__bss_end = .;
}
- _end = .;
+ .end :
+ {
+ *(.__end)
+ }
+
+ _image_binary_end = .;
- .dynsym _end : { *(.dynsym) }
+ .dynsym _image_binary_end : { *(.dynsym) }
.dynbss : { *(.dynbss) }
.dynstr : { *(.dynstr*) }
.dynamic : { *(.dynamic*) }
diff --git a/arch/arm/cpu/arm926ejs/spear/u-boot-spl.lds
b/arch/arm/cpu/arm926ejs/spear/u-boot-spl.lds
index 76b499d..b6d0f65 100644
--- a/arch/arm/cpu/arm926ejs/spear/u-boot-spl.lds
+++ b/arch/arm/cpu/arm926ejs/spear/u-boot-spl.lds
@@ -49,9 +49,14 @@ SECTIONS
__bss_end = .;
}
- _end = .;
+ .end :
+ {
+ *(.__end)
+ }
+
+ _image_binary_end = .;
- .dynsym _end : { *(.dynsym) }
+ .dynsym _image_binary_end : { *(.dynsym) }
.dynbss : { *(.dynbss) }
.dynstr : { *(.dynstr*) }
.dynamic : { *(.dynamic*) }
diff --git a/arch/arm/cpu/armv7/am33xx/u-boot-spl.lds
b/arch/arm/cpu/armv7/am33xx/u-boot-spl.lds
index 9302856..b1c28c9 100644
--- a/arch/arm/cpu/armv7/am33xx/u-boot-spl.lds
+++ b/arch/arm/cpu/armv7/am33xx/u-boot-spl.lds
@@ -38,7 +38,11 @@ SECTIONS
. = ALIGN(4);
__image_copy_end = .;
- _end = .;
+
+ .end :
+ {
+ *(.__end)
+ } .sram
.bss :
{
diff --git a/arch/arm/cpu/armv7/omap-common/u-boot-spl.lds
b/arch/arm/cpu/armv7/omap-common/u-boot-spl.lds
index 02aa129..745603d 100644
--- a/arch/arm/cpu/armv7/omap-common/u-boot-spl.lds
+++ b/arch/arm/cpu/armv7/omap-common/u-boot-spl.lds
@@ -39,7 +39,11 @@ SECTIONS
. = ALIGN(4);
__image_copy_end = .;
- _end = .;
+
+ .end :
+ {
+ *(.__end)
+ }
.bss :
{
diff --git a/arch/arm/cpu/armv7/socfpga/u-boot-spl.lds
b/arch/arm/cpu/armv7/socfpga/u-boot-spl.lds
index a7c9c9d..4282beb 100644
--- a/arch/arm/cpu/armv7/socfpga/u-boot-spl.lds
+++
[U-Boot] [PATCH v4 3/3] arm: remove unneeded symbol offsets and _TEXT_BASE
Remove the last uses of symbol offsets in ARM U-Boot. Remove some needless uses of _TEXT_BASE. Remove all _TEXT_BASE definitions. Signed-off-by: Albert ARIBAUD albert.u.b...@aribaud.net --- Changes in v4: - removed mkexynosspl patch, already fixed in 0fcac1ab Changes in v3: None Changes in v2: - fixed use of _rel_dyn_end instead of _end README | 6 -- arch/arm/cpu/arm1136/start.S| 27 --- arch/arm/cpu/arm1176/start.S| 27 --- arch/arm/cpu/arm720t/start.S| 26 -- arch/arm/cpu/arm920t/start.S| 26 -- arch/arm/cpu/arm926ejs/at91/lowlevel_init.S | 14 +- arch/arm/cpu/arm926ejs/mxs/start.S | 27 --- arch/arm/cpu/arm926ejs/start.S | 27 --- arch/arm/cpu/arm946es/start.S | 26 -- arch/arm/cpu/arm_intcm/start.S | 26 -- arch/arm/cpu/armv7/omap3/lowlevel_init.S| 3 --- arch/arm/cpu/armv7/start.S | 23 --- arch/arm/cpu/ixp/start.S| 26 -- arch/arm/cpu/pxa/start.S| 27 --- arch/arm/cpu/sa1100/start.S | 26 -- arch/arm/lib/board.c| 12 ++-- board/armltd/integrator/lowlevel_init.S | 2 +- board/cm4008/flash.c| 2 +- board/cm41xx/flash.c| 2 +- board/mpl/vcma9/lowlevel_init.S | 5 + board/mx1ads/lowlevel_init.S| 4 board/samsung/goni/lowlevel_init.S | 3 --- board/samsung/smdk2410/lowlevel_init.S | 5 + board/samsung/smdk5250/lowlevel_init.S | 5 + board/samsung/smdkc100/lowlevel_init.S | 3 --- board/ti/omap5912osk/lowlevel_init.S| 4 common/board_f.c| 14 +++--- common/board_r.c| 4 ++-- include/asm-generic/sections.h | 26 +++--- 29 files changed, 25 insertions(+), 403 deletions(-) diff --git a/README b/README index 8f0b38c..d9149f3 100644 --- a/README +++ b/README @@ -3676,12 +3676,6 @@ Configuration Settings: its config.mk file). If you find problems enabling this option on your board please report the problem and send patches! -- CONFIG_SYS_SYM_OFFSETS - This is set by architectures that use offsets for link symbols - instead of absolute values. So bss_start is obtained using an - offset _bss_start_ofs from CONFIG_SYS_TEXT_BASE, rather than - directly. You should not need to touch this setting. - - CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC (OMAP only) This is set by OMAP boards for the max time that reset should be asserted. See doc/README.omap-reset-time for details on how diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S index 00d1b30..3e2358e 100644 --- a/arch/arm/cpu/arm1136/start.S +++ b/arch/arm/cpu/arm1136/start.S @@ -70,32 +70,6 @@ _end_vect: * */ -.globl _TEXT_BASE -_TEXT_BASE: -#if defined(CONFIG_SPL_BUILD) defined(CONFIG_SPL_TEXT_BASE) - .word CONFIG_SPL_TEXT_BASE -#else - .word CONFIG_SYS_TEXT_BASE -#endif - -/* - * These are defined in the board-specific linker script. - * Subtracting _start from them lets the linker put their - * relative position in the executable instead of leaving - * them null. - */ -.globl _bss_start_ofs -_bss_start_ofs: - .word __bss_start - _start - -.globl _bss_end_ofs -_bss_end_ofs: - .word __bss_end - _start - -.globl _end_ofs -_end_ofs: - .word _end - _start - #ifdef CONFIG_USE_IRQ /* IRQ stack memory (calculated at run-time) */ .globl IRQ_STACK_START @@ -295,7 +269,6 @@ cpu_init_crit: #ifdef CONFIG_SPL_BUILD .align 5 do_hang: - ldr sp, _TEXT_BASE /* use 32 words about stack */ bl hang/* hang and never return */ #else /* !CONFIG_SPL_BUILD */ .align 5 diff --git a/arch/arm/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S index ffd7dd0..ce62011 100644 --- a/arch/arm/cpu/arm1176/start.S +++ b/arch/arm/cpu/arm1176/start.S @@ -77,33 +77,6 @@ _end_vect: * */ -.globl _TEXT_BASE -_TEXT_BASE: -#if defined(CONFIG_SPL_BUILD) defined(CONFIG_SPL_TEXT_BASE) - .word CONFIG_SPL_TEXT_BASE -#else - .word CONFIG_SYS_TEXT_BASE -#endif - -/* - * These are defined in the board-specific linker script. - * Subtracting _start from them lets the linker put their - * relative position in the executable instead of leaving - *
Re: [U-Boot] [PATCH v3 00/29] zynq: More boards support
Hi Jagannadha, On Thu, 19 Dec 2013 23:38:51 +0530, Jagannadha Sutradharudu Teki jagannadha.sutradharudu-t...@xilinx.com wrote: These changes are from u-boot-xlnx.git repo from git.xilinx.com This repo is well tested on xilinx zynq platform, hence pushing the same on upstream. Excluded qspi and nand changes from previous series. The series, with 11/29 and 19/29 replaced with v4, does not apply cleanly to master. A 3-way am works on 10/29 and 11/29, but 12/29 v3 fails even with 3-way. Can you please post a series rebased on master? I'll apply it as soon as it arrives. Thanks, Jagan. Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v6] spi: pl022_spi: Add support for ARM PL022 spi controller
Hello Jagan,
Sorry for late reply.
On 12/20/2013 8:03 PM, Jagan Teki wrote:
On Fri, Oct 4, 2013 at 12:20 PM, Jagan Teki jagannadh.t...@gmail.com wrote:
Hi Vipin,
I have few quick comments, please fix it.
Please use the u-boot-spi.git with master-probe branch for testing this driver.
Let me know for any issues/concerns.
On Wed, Jun 12, 2013 at 7:55 PM, Jagan Teki jagannadh.t...@gmail.com wrote:
Thanks for v6 sent.
Have you tested this?
on which board, include/configs/*.h file?
--
Thanks,
Jagan.
On Wed, Jun 12, 2013 at 6:17 PM, Armando Visconti
armando.visco...@st.com wrote:
This patch adds the support for the ARM PL022 SPI controller for the standard
variant (0x00041022), which has a 16bit wide and 8 locations deep TX/RX FIFO.
Signed-off-by: Armando Visconti armando.visco...@st.com
Signed-off-by: Vipin Kumar vipin.ku...@st.com
Acked-by: Stefan Roese s...@denx.de
---
v5-v6
1. Make use of spi_alloc_slave() macro.
2. Changed the identation on 'if statement' as requested
by Jagan.
drivers/spi/Makefile| 1 +
drivers/spi/pl022_spi.c | 308
2 files changed, 309 insertions(+)
create mode 100644 drivers/spi/pl022_spi.c
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index d08609e..b6443b1 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -47,6 +47,7 @@ COBJS-$(CONFIG_MXC_SPI) += mxc_spi.o
COBJS-$(CONFIG_MXS_SPI) += mxs_spi.o
COBJS-$(CONFIG_OC_TINY_SPI) += oc_tiny_spi.o
COBJS-$(CONFIG_OMAP3_SPI) += omap3_spi.o
+COBJS-$(CONFIG_PL022_SPI) += pl022_spi.o
COBJS-$(CONFIG_SOFT_SPI) += soft_spi.o
COBJS-$(CONFIG_SH_SPI) += sh_spi.o
COBJS-$(CONFIG_FSL_ESPI) += fsl_espi.o
diff --git a/drivers/spi/pl022_spi.c b/drivers/spi/pl022_spi.c
new file mode 100644
index 000..5b47413
--- /dev/null
+++ b/drivers/spi/pl022_spi.c
@@ -0,0 +1,308 @@
+/*
+ * (C) Copyright 2012
+ * Armando Visconti, ST Microelectronics, armando.visco...@st.com.
+ *
+ * Driver for ARM PL022 SPI Controller. Based on atmel_spi.c
+ * by Atmel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
Use latest SPDX-License-Identifier:
check for any existing one.
+
+#include common.h
+#include malloc.h
+#include spi.h
+#include asm/io.h
+#include asm/arch/hardware.h
+
+/* SSP registers mapping */
+struct pl022 {
Something like pl022_spi_regs
+ u32 ssp_cr0;/* 0x000 */
+ u32 ssp_cr1;/* 0x004 */
+ u32 ssp_dr; /* 0x008 */
+ u32 ssp_sr; /* 0x00c */
+ u32 ssp_cpsr; /* 0x010 */
+ u32 ssp_imsc; /* 0x014 */
+ u32 ssp_ris;/* 0x018 */
+ u32 ssp_mis;/* 0x01c */
+ u32 ssp_icr;/* 0x020 */
+ u32 ssp_dmacr; /* 0x024 */
+ u8 reserved_1[0x080 - 0x028];
+ u32 ssp_itcr; /* 0x080 */
+ u32 ssp_itip; /* 0x084 */
+ u32 ssp_itop; /* 0x088 */
+ u32 ssp_tdr;/* 0x08c */
+ u8 reserved_2[0xFE0 - 0x090];
+ u32 ssp_pid0; /* 0xfe0 */
+ u32 ssp_pid1; /* 0xfe4 */
+ u32 ssp_pid2; /* 0xfe8 */
+ u32 ssp_pid3; /* 0xfec */
+ u32 ssp_cid0; /* 0xff0 */
+ u32 ssp_cid1; /* 0xff4 */
+ u32 ssp_cid2; /* 0xff8 */
+ u32 ssp_cid3; /* 0xffc */
+};
+
-- TAG+
+/* SSP Control Register 0 - SSP_CR0 */
+#define SSP_CR0_SPO(0x1 6)
+#define SSP_CR0_SPH(0x1 7)
+#define SSP_CR0_8BIT_MODE (0x07)
+#define SSP_SCR_MAX(0xFF)
+#define SSP_SCR_SHFT 8
+
+/* SSP Control Register 0 - SSP_CR1 */
+#define SSP_CR1_MASK_SSE (0x1 1)
+
+#define SSP_CPSR_MAX (0xFE)
+
+/* SSP Status Register - SSP_SR */
+#define SSP_SR_MASK_TFE(0x1 0) /* Transmit FIFO empty */
+#define SSP_SR_MASK_TNF(0x1 1) /* Transmit FIFO not full */
+#define SSP_SR_MASK_RNE(0x1 2) /* Receive FIFO not empty */
+#define SSP_SR_MASK_RFF(0x1 3) /* Receive FIFO full */
+#define SSP_SR_MASK_BSY(0x1 4) /* Busy Flag */
+
--- TAG -
Bit mask macros - please place after headers.
We follow a simple format to write spi driver - please
[U-Boot] [PATCH] net/fm: fix ft_fixup_xgec with checking enablement
We should check if the 10G port is enabled when we update dynamically
the corresponding dual-role MAC node in device tree.
Signed-off-by: Shengzhou Liu shengzhou@freescale.com
---
drivers/net/fm/init.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/net/fm/init.c b/drivers/net/fm/init.c
index a759892..35a1ac7 100644
--- a/drivers/net/fm/init.c
+++ b/drivers/net/fm/init.c
@@ -276,7 +276,8 @@ static int ft_fixup_xgec(void *blob, struct fm_eth_info
*info)
#define FM1_10GEC3_TX_PORT_ADDR(CONFIG_SYS_CCSRBAR_PHYS + 0x4a8000)
#define FM1_10GEC3_MAC_ADDR(CONFIG_SYS_CCSRBAR_PHYS + 0x4e)
- if ((info-port == FM1_10GEC3) || (info-port == FM1_10GEC4)) {
+ if (((info-port == FM1_10GEC3) || (info-port == FM1_10GEC4))
+ info-enabled) {
ci = (info-port == FM1_10GEC3) ? 2 : 3;
i = (info-port == FM1_10GEC3) ? 0 : 1;
--
1.8.0
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Re: [U-Boot] [PATCH v3 00/29] zynq: More boards support
Hi Albert, On Wed, Jan 8, 2014 at 3:07 PM, Albert ARIBAUD albert.u.b...@aribaud.net wrote: Hi Jagannadha, On Thu, 19 Dec 2013 23:38:51 +0530, Jagannadha Sutradharudu Teki jagannadha.sutradharudu-t...@xilinx.com wrote: These changes are from u-boot-xlnx.git repo from git.xilinx.com This repo is well tested on xilinx zynq platform, hence pushing the same on upstream. Excluded qspi and nand changes from previous series. The series, with 11/29 and 19/29 replaced with v4, does not apply cleanly to master. A 3-way am works on 10/29 and 11/29, but 12/29 v3 fails even with 3-way. Can you please post a series rebased on master? I'll apply it as soon as it arrives. OK. I am sending the whole series again with v4 with rebase on master. Let me know for any info. -- Thanks, Jagan. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v4 01/29] zynq: Enable CONFIG_FIT_VERBOSE
Enabled fit_format_{error,warning}()
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
include/configs/zynq.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/configs/zynq.h b/include/configs/zynq.h
index 82ec826..6019c4a 100644
--- a/include/configs/zynq.h
+++ b/include/configs/zynq.h
@@ -127,6 +127,7 @@
/* OF */
#define CONFIG_FIT
+#define CONFIG_FIT_VERBOSE 1 /* enable fit_format_{error,warning}() */
#define CONFIG_OF_LIBFDT
/* Commands */
--
1.8.3
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[U-Boot] [PATCH v4 25/29] dts: zynq: Add basic fdt support
This patch provides a basic fdt support for zynq u-boot.
zynq-7000.dtsi- initial arch dts file
zynq-zed.dts - initial zed board dts file
more devices should be added in subsequent patches.
u-boot build: once configuring of a board done
for building dtb with zynq-zed.dts as an input
zynq-uboot make DEVICE_TREE=zynq-zed
Enabled CONFIG_OF_SEPARATE for building dtb separately.
There is a new binary called u-boot-dtb.bin which is a u-boot
with devicetree supported.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
arch/arm/dts/zynq-7000.dtsi | 13 +
board/xilinx/dts/zynq-zed.dts | 14 ++
include/configs/zynq-common.h | 5 +
3 files changed, 32 insertions(+)
create mode 100644 arch/arm/dts/zynq-7000.dtsi
create mode 100644 board/xilinx/dts/zynq-zed.dts
diff --git a/arch/arm/dts/zynq-7000.dtsi b/arch/arm/dts/zynq-7000.dtsi
new file mode 100644
index 000..f20b8bd
--- /dev/null
+++ b/arch/arm/dts/zynq-7000.dtsi
@@ -0,0 +1,13 @@
+/*
+ * Xilinx Zynq 7000 DTSI
+ * Describes the hardware common to all Zynq 7000-based boards.
+ *
+ * Copyright (C) 2013 Xilinx, Inc.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+/include/ skeleton.dtsi
+
+/ {
+ compatible = xlnx,zynq-7000;
+};
diff --git a/board/xilinx/dts/zynq-zed.dts b/board/xilinx/dts/zynq-zed.dts
new file mode 100644
index 000..91a5deb
--- /dev/null
+++ b/board/xilinx/dts/zynq-zed.dts
@@ -0,0 +1,14 @@
+/*
+ * Xilinx ZED board DTS
+ *
+ * Copyright (C) 2013 Xilinx, Inc.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+/dts-v1/;
+#include zynq-7000.dtsi
+
+/ {
+ model = Zynq ZED Board;
+ compatible = xlnx,zynq-zed, xlnx,zynq-7000;
+};
diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h
index 184d4ba..8707bc0 100644
--- a/include/configs/zynq-common.h
+++ b/include/configs/zynq-common.h
@@ -212,6 +212,11 @@
#define CONFIG_FIT
#define CONFIG_FIT_VERBOSE 1 /* enable fit_format_{error,warning}() */
+/* FDT support */
+#define CONFIG_OF_CONTROL
+#define CONFIG_OF_SEPARATE
+#define CONFIG_DISPLAY_BOARDINFO_LATE
+
/* Boot FreeBSD/vxWorks from an ELF image */
#if defined(CONFIG_ZYNQ_BOOT_FREEBSD)
# define CONFIG_API
--
1.8.3
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[U-Boot] [PATCH v4 20/29] zynq: Add support to find bootmode
Added support to find the bootmodes by reading
slcr bootmode register. this can be helpful to
autoboot the configurations w.r.t a specified bootmode.
Added this functionality on board_late_init as it's not
needed for normal initializtion part.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
arch/arm/cpu/armv7/zynq/slcr.c | 6 ++
arch/arm/include/asm/arch-zynq/sys_proto.h | 1 +
board/xilinx/zynq/board.c | 25 +
doc/README.zynq| 25 +++--
include/configs/zynq-common.h | 1 +
5 files changed, 56 insertions(+), 2 deletions(-)
diff --git a/arch/arm/cpu/armv7/zynq/slcr.c b/arch/arm/cpu/armv7/zynq/slcr.c
index 717ec65..b4c11c3 100644
--- a/arch/arm/cpu/armv7/zynq/slcr.c
+++ b/arch/arm/cpu/armv7/zynq/slcr.c
@@ -101,6 +101,12 @@ void zynq_slcr_devcfg_enable(void)
zynq_slcr_lock();
}
+u32 zynq_slcr_get_boot_mode(void)
+{
+ /* Get the bootmode register value */
+ return readl(slcr_base-boot_mode);
+}
+
u32 zynq_slcr_get_idcode(void)
{
return (readl(slcr_base-pss_idcode) SLCR_IDCODE_MASK)
diff --git a/arch/arm/include/asm/arch-zynq/sys_proto.h
b/arch/arm/include/asm/arch-zynq/sys_proto.h
index 110de90..8f925af 100644
--- a/arch/arm/include/asm/arch-zynq/sys_proto.h
+++ b/arch/arm/include/asm/arch-zynq/sys_proto.h
@@ -13,6 +13,7 @@ extern void zynq_slcr_cpu_reset(void);
extern void zynq_slcr_gem_clk_setup(u32 gem_id, u32 rclk, u32 clk);
extern void zynq_slcr_devcfg_disable(void);
extern void zynq_slcr_devcfg_enable(void);
+extern u32 zynq_slcr_get_boot_mode(void);
extern u32 zynq_slcr_get_idcode(void);
extern void zynq_ddrc_init(void);
diff --git a/board/xilinx/zynq/board.c b/board/xilinx/zynq/board.c
index 5119c09..a5b9bde 100644
--- a/board/xilinx/zynq/board.c
+++ b/board/xilinx/zynq/board.c
@@ -12,6 +12,12 @@
DECLARE_GLOBAL_DATA_PTR;
+/* Bootmode setting values */
+#define ZYNQ_BM_MASK 0x0F
+#define ZYNQ_BM_NOR0x02
+#define ZYNQ_BM_SD 0x05
+#define ZYNQ_BM_JTAG 0x0
+
#ifdef CONFIG_FPGA
Xilinx_desc fpga;
@@ -59,6 +65,25 @@ int board_init(void)
return 0;
}
+int board_late_init(void)
+{
+ switch ((zynq_slcr_get_boot_mode()) ZYNQ_BM_MASK) {
+ case ZYNQ_BM_NOR:
+ setenv(modeboot, norboot);
+ break;
+ case ZYNQ_BM_SD:
+ setenv(modeboot, sdboot);
+ break;
+ case ZYNQ_BM_JTAG:
+ setenv(modeboot, jtagboot);
+ break;
+ default:
+ setenv(modeboot, );
+ break;
+ }
+
+ return 0;
+}
#ifdef CONFIG_CMD_NET
int board_eth_init(bd_t *bis)
diff --git a/doc/README.zynq b/doc/README.zynq
index 56a74b4..ea1c8c1 100644
--- a/doc/README.zynq
+++ b/doc/README.zynq
@@ -28,7 +28,27 @@ and I/O programmability.
- zc770-xm012 (nor)
- zc770-xm013 (dual parallel qspi, gem1)
-3. Mainline status
+3. Bootmode
+
+Zynq has a facility to read the bootmode from the slcr bootmode register
+once user is setting through jumpers on the board - see page no:1546 on [5]
+
+All possible bootmode values are defined in Table 6-2:Boot_Mode MIO Pins
+on [5].
+
+board_late_init() will read the bootmode values using slcr bootmode register
+at runtime and assign the modeboot variable to specific bootmode string which
+is intern used in autoboot.
+
+SLCR bootmode register Bit[3:0] values
+#define ZYNQ_BM_NOR0x02
+#define ZYNQ_BM_SD 0x05
+#define ZYNQ_BM_JTAG 0x0
+
+modeboot variable can assign any of norboot, sdboot or jtagboot
+bootmode strings at runtime.
+
+4. Mainline status
- Added basic board configurations support.
- Added zynq u-boot bsp code - arch/arm/cpu/armv7/zynq
@@ -41,7 +61,7 @@ and I/O programmability.
spi- drivers/spi/zynq_spi.c
i2c - drivers/i2c/zynq_i2c.c
-4. TODO
+5. TODO
- Add zynq boards support - zc70x, zed, microzed, zc770
- Add zynq qspi controller driver
@@ -54,6 +74,7 @@ and I/O programmability.
[2] http://www.xilinx.com/products/boards-and-kits/EK-Z7-ZC706-G.htm
[3] http://zedboard.org/product/zedboard
[4] http://zedboard.org/product/microzed
+[5]
http://www.xilinx.com/support/documentation/user_guides/ug585-Zynq-7000-TRM.pdf
--
Jagannadha Sutradharudu Teki jaga...@xilinx.com
diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h
index db47c42..b1fa0cb 100644
--- a/include/configs/zynq-common.h
+++ b/include/configs/zynq-common.h
@@ -140,6 +140,7 @@
#define CONFIG_CMDLINE_EDITING
#define CONFIG_AUTO_COMPLETE
+#define CONFIG_BOARD_LATE_INIT
#define CONFIG_SYS_LONGHELP
#define CONFIG_SYS_MAXARGS 15 /* max number of command args */
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
--
1.8.3
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[U-Boot] [PATCH v4 13/29] zynq: Move CONFIG_SYS_SDRAM_SIZE to pre-board configs
CONFIG_SYS_SDRAM_SIZE is specific to a board hence moved to specific pre-config board files. Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com --- include/configs/zynq-common.h | 1 - include/configs/zynq_zc70x.h | 2 ++ include/configs/zynq_zed.h| 2 ++ 3 files changed, 4 insertions(+), 1 deletion(-) diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index bce1094..bb9e337 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -125,7 +125,6 @@ #define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_SDRAM_BASE 0 -#define CONFIG_SYS_SDRAM_SIZE 0x4000 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x1000) diff --git a/include/configs/zynq_zc70x.h b/include/configs/zynq_zc70x.h index 9910804..6950d41 100644 --- a/include/configs/zynq_zc70x.h +++ b/include/configs/zynq_zc70x.h @@ -10,6 +10,8 @@ #ifndef __CONFIG_ZYNQ_ZC70X_H #define __CONFIG_ZYNQ_ZC70X_H +#define CONFIG_SYS_SDRAM_SIZE (1024 * 1024 * 1024) + #define CONFIG_ZYNQ_SERIAL_UART1 #define CONFIG_ZYNQ_GEM0 #define CONFIG_ZYNQ_GEM_PHY_ADDR0 7 diff --git a/include/configs/zynq_zed.h b/include/configs/zynq_zed.h index 278db1e..31926df 100644 --- a/include/configs/zynq_zed.h +++ b/include/configs/zynq_zed.h @@ -10,6 +10,8 @@ #ifndef __CONFIG_ZYNQ_ZED_H #define __CONFIG_ZYNQ_ZED_H +#define CONFIG_SYS_SDRAM_SIZE (512 * 1024 * 1024) + #define CONFIG_ZYNQ_SERIAL_UART1 #define CONFIG_ZYNQ_GEM0 #define CONFIG_ZYNQ_GEM_PHY_ADDR0 0 -- 1.8.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v4 19/29] zynq: Add zynq_zc770 xm012 board support
ZC770 is a complete development board based on the Xilinx Zynq-7000 All Programmable SoC, similar to ZC70x board but which has four different daughter cards, like XM010, XM011, XM012 and XM013 ZC770 XM012: - 1GB DDR3 - 64MiB Numonyx NOR flash - USB-UART Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com Cc: Stefan Roese s...@denx.de --- boards.cfg| 1 + include/configs/zynq-common.h | 16 include/configs/zynq_zc770.h | 4 3 files changed, 21 insertions(+) diff --git a/boards.cfg b/boards.cfg index 86e4e6e..9ad2601 100644 --- a/boards.cfg +++ b/boards.cfg @@ -358,6 +358,7 @@ Active arm armv7 zynqxilinx zynqzynq_zc70x - Active armarmv7 zynqxilinx zynq zynq_zed - Michal Simek mon...@monstr.eu:Jagannadha Sutradharudu Teki jaga...@xilinx.com Active armarmv7 zynqxilinx zynq zynq_microzed- Michal Simek mon...@monstr.eu:Jagannadha Sutradharudu Teki jaga...@xilinx.com Active armarmv7 zynqxilinx zynq zynq_zc770_xm010 zynq_zc770:ZC770_XM010 Michal Simek mon...@monstr.eu:Jagannadha Sutradharudu Teki jaga...@xilinx.com +Active armarmv7 zynqxilinx zynq zynq_zc770_xm012 zynq_zc770:ZC770_XM012 Michal Simek mon...@monstr.eu:Jagannadha Sutradharudu Teki jaga...@xilinx.com Active armarmv7 zynqxilinx zynq zynq_zc770_xm013 zynq_zc770:ZC770_XM013 Michal Simek mon...@monstr.eu:Jagannadha Sutradharudu Teki jaga...@xilinx.com Active arm armv7:arm720t tegra114nvidia dalmore dalmore - Tom Warren twar...@nvidia.com Active arm armv7:arm720t tegra20 avionic-design medcom-wide medcom-wide - Thierry Reding thierry.red...@avionic-design.de diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index cf96333..db47c42 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -75,6 +75,22 @@ # define CONFIG_CMD_SF #endif +/* NOR */ +#ifndef CONFIG_SYS_NO_FLASH +# define CONFIG_SYS_FLASH_BASE 0xE200 +# define CONFIG_SYS_FLASH_SIZE (16 * 1024 * 1024) +# define CONFIG_SYS_MAX_FLASH_BANKS1 +# define CONFIG_SYS_MAX_FLASH_SECT 512 +# define CONFIG_SYS_FLASH_ERASE_TOUT 1000 +# define CONFIG_SYS_FLASH_WRITE_TOUT 5000 +# define CONFIG_FLASH_SHOW_PROGRESS10 +# define CONFIG_SYS_FLASH_CFI +# undef CONFIG_SYS_FLASH_EMPTY_INFO +# define CONFIG_FLASH_CFI_DRIVER +# undef CONFIG_SYS_FLASH_PROTECTION +# define CONFIG_SYS_FLASH_USE_BUFFER_WRITE +#endif + /* MMC */ #if defined(CONFIG_ZYNQ_SDHCI0) || defined(CONFIG_ZYNQ_SDHCI1) # define CONFIG_MMC diff --git a/include/configs/zynq_zc770.h b/include/configs/zynq_zc770.h index 181f9fb..16b9047 100644 --- a/include/configs/zynq_zc770.h +++ b/include/configs/zynq_zc770.h @@ -21,6 +21,10 @@ # define CONFIG_ZYNQ_SDHCI0 # define CONFIG_ZYNQ_SPI +#elif defined(CONFIG_ZC770_XM012) +# define CONFIG_ZYNQ_SERIAL_UART1 +# undef CONFIG_SYS_NO_FLASH + #elif defined(CONFIG_ZC770_XM013) # define CONFIG_ZYNQ_SERIAL_UART0 # define CONFIG_ZYNQ_GEM1 -- 1.8.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v4 03/29] zynq: Cleanup on miscellaneous configs
Cleanup on miscellaneous configurable options: - Rename SYS_PROMPT as zynq-uboot - Add comment - Re-order configs Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com --- include/configs/zynq.h | 19 ++- 1 file changed, 10 insertions(+), 9 deletions(-) diff --git a/include/configs/zynq.h b/include/configs/zynq.h index 0492818..e34024d 100644 --- a/include/configs/zynq.h +++ b/include/configs/zynq.h @@ -111,19 +111,20 @@ CONFIG_SYS_INIT_RAM_SIZE - \ GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_PROMPT U-Boot -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ +/* Miscellaneous configurable options */ +#define CONFIG_SYS_PROMPT zynq-uboot +#define CONFIG_SYS_HUSH_PARSER + +#define CONFIG_CMDLINE_EDITING +#define CONFIG_AUTO_COMPLETE +#define CONFIG_SYS_LONGHELP +#define CONFIG_SYS_MAXARGS 15 /* max number of command args */ +#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ sizeof(CONFIG_SYS_PROMPT) + 16) #define CONFIG_SYS_LOAD_ADDR 0 -#define CONFIG_SYS_MAXARGS 15 /* max number of command args */ -#define CONFIG_SYS_LONGHELP -#define CONFIG_AUTO_COMPLETE -#define CONFIG_CMDLINE_EDITING -#define CONFIG_SYS_HUSH_PARSER -#define CONFIG_SYS_PROMPT_HUSH_PS2 /* OF */ #define CONFIG_FIT -- 1.8.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v4 29/29] doc: Update the zynq u-boot status
Updated doc/README.zynq to current status. Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com --- doc/README.zynq | 26 ++ 1 file changed, 18 insertions(+), 8 deletions(-) diff --git a/doc/README.zynq b/doc/README.zynq index ea1c8c1..6330408 100644 --- a/doc/README.zynq +++ b/doc/README.zynq @@ -28,7 +28,16 @@ and I/O programmability. - zc770-xm012 (nor) - zc770-xm013 (dual parallel qspi, gem1) -3. Bootmode +3. Building + + # Configure for microzed board + $ make zynq_microzed_config + Configuring for zynq_microzed board... + + # Building + $ make DEVICE_TREE=zynq-microzed + +4. Bootmode Zynq has a facility to read the bootmode from the slcr bootmode register once user is setting through jumpers on the board - see page no:1546 on [5] @@ -48,11 +57,11 @@ SLCR bootmode register Bit[3:0] values modeboot variable can assign any of norboot, sdboot or jtagboot bootmode strings at runtime. -4. Mainline status +5. Mainline status - Added basic board configurations support. - Added zynq u-boot bsp code - arch/arm/cpu/armv7/zynq -- Added zynq boards named - zynq, zynq_dcc +- Added zynq boards named - zc70x, zed, microzed, zc770_xm010, zc770_xm012, zc770_xm013 - Added zynq drivers: serial - drivers/serial/serial_zynq.c net - drivers/net/zynq_gem.c @@ -60,15 +69,16 @@ bootmode strings at runtime. mmc - drivers/mmc/zynq_sdhci.c spi- drivers/spi/zynq_spi.c i2c - drivers/i2c/zynq_i2c.c +- Done proper cleanups on board configurations +- Added basic FDT support for zynq boards +- d-cache support for zynq_gem.c -5. TODO +6. TODO -- Add zynq boards support - zc70x, zed, microzed, zc770 +- Add zynq boards support - zc770_xm011 - Add zynq qspi controller driver - Add zynq nand controller driver -- d-cache support for zynq_gem.c -- FDT support for zynq boards -- Need proper cleanups on board configurations +- Add FDT support on individual drivers [1] http://www.xilinx.com/products/boards-and-kits/EK-Z7-ZC702-G.htm [2] http://www.xilinx.com/products/boards-and-kits/EK-Z7-ZC706-G.htm -- 1.8.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v4 09/29] zynq-common: Rename zynq with zynq-common
zynq.h - zynq-common.h, zynq-common is Common
configuration options for all Zynq boards.
zynq.h is no longer exists hense removed from boards.cfg
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
boards.cfg| 2 --
include/configs/{zynq.h = zynq-common.h} | 9 ++---
2 files changed, 6 insertions(+), 5 deletions(-)
rename include/configs/{zynq.h = zynq-common.h} (95%)
diff --git a/boards.cfg b/boards.cfg
index 18faf09..faaac0a 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -354,8 +354,6 @@ Active arm armv7 socfpga altera
socfpga
Active arm armv7 u8500 st-ericsson snowball
snowball -
Mathieu Poirier mathieu.poir...@linaro.org
Active arm armv7 u8500 st-ericsson u8500
u8500_href -
-
Active arm armv7 vf610 freescale vf610twr
vf610twr
vf610twr:IMX_CONFIG=board/freescale/vf610twr/imximage.cfg
Alison Wang
b18...@freescale.com
-Active arm armv7 zynqxilinx zynq
zynq -
Michal Simek mon...@monstr.eu
-Active arm armv7 zynqxilinx zynq
zynq_dcc zynq:ZYNQ_DCC
Michal Simek mon...@monstr.eu
Active arm armv7:arm720t tegra114nvidia dalmore
dalmore -
Tom Warren twar...@nvidia.com
Active arm armv7:arm720t tegra20 avionic-design medcom-wide
medcom-wide -
Thierry Reding thierry.red...@avionic-design.de
Active arm armv7:arm720t tegra20 avionic-design plutux
plutux -
Thierry Reding thierry.red...@avionic-design.de
diff --git a/include/configs/zynq.h b/include/configs/zynq-common.h
similarity index 95%
rename from include/configs/zynq.h
rename to include/configs/zynq-common.h
index ea25159..9fe06e8 100644
--- a/include/configs/zynq.h
+++ b/include/configs/zynq-common.h
@@ -1,11 +1,14 @@
/*
* (C) Copyright 2012 Michal Simek mon...@monstr.eu
+ * (C) Copyright 2013 Xilinx, Inc.
+ *
+ * Common configuration options for all Zynq boards.
*
* SPDX-License-Identifier:GPL-2.0+
*/
-#ifndef __CONFIG_ZYNQ_H
-#define __CONFIG_ZYNQ_H
+#ifndef __CONFIG_ZYNQ_COMMON_H
+#define __CONFIG_ZYNQ_COMMON_H
/* High Level configuration Options */
#define CONFIG_ARMV7
@@ -170,4 +173,4 @@
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_MII
-#endif /* __CONFIG_ZYNQ_H */
+#endif /* __CONFIG_ZYNQ_COMMON_H */
--
1.8.3
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[U-Boot] [PATCH v4 06/29] zynq: Enable cache options
- Enable cache command - Turn-off L2 cache - Turn-on D-cache Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com --- include/configs/zynq.h | 10 ++ 1 file changed, 10 insertions(+) diff --git a/include/configs/zynq.h b/include/configs/zynq.h index c8ab06f..6e545e5 100644 --- a/include/configs/zynq.h +++ b/include/configs/zynq.h @@ -16,6 +16,16 @@ # define CONFIG_CPU_FREQ_HZ8 #endif +/* Cache options */ +#define CONFIG_CMD_CACHE +#define CONFIG_SYS_CACHELINE_SIZE 32 + +#define CONFIG_SYS_L2CACHE_OFF +#ifndef CONFIG_SYS_L2CACHE_OFF +# define CONFIG_SYS_L2_PL310 +# define CONFIG_SYS_PL310_BASE 0xf8f02000 +#endif + /* Serial drivers */ #define CONFIG_BAUDRATE115200 /* The following table includes the supported baudrates */ -- 1.8.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v4 21/29] zynq-common: Define default environment
Defined default env. for autoboot FIT image from
respective boot devices.
Default settings:
fit_image=fit.itb
load_addr=0x200
fit_size=0x80
flash_off=0x10
nor_flash_off=0xE210
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
include/configs/zynq-common.h | 23 ++-
1 file changed, 22 insertions(+), 1 deletion(-)
diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h
index b1fa0cb..1eaf17d 100644
--- a/include/configs/zynq-common.h
+++ b/include/configs/zynq-common.h
@@ -132,7 +132,28 @@
/* Environment */
#define CONFIG_ENV_SIZE0x1 /* Env. sector size */
#define CONFIG_ENV_IS_NOWHERE
-#define CONFIG_SYS_LOAD_ADDR 0
+
+/* Default environment */
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ fit_image=fit.itb\0 \
+ load_addr=0x200\0 \
+ fit_size=0x80\0 \
+ flash_off=0x10\0 \
+ nor_flash_off=0xE210\0\
+ fdt_high=0x2000\0 \
+ initrd_high=0x2000\0 \
+ norboot=echo Copying FIT from NOR flash to RAM... \
+ cp.b ${nor_flash_off} ${load_addr} ${fit_size} \
+ bootm ${load_addr}\0 \
+ sdboot=echo Copying FIT from SD to RAM... \
+ fatload mmc 0 ${load_addr} ${fit_image} \
+ bootm ${load_addr}\0 \
+ jtagboot=echo TFTPing FIT to RAM... \
+ tftp ${load_addr} ${fit_image} \
+ bootm ${load_addr}\0
+#define CONFIG_BOOTCOMMAND run $modeboot
+#define CONFIG_BOOTDELAY 3 /* -1 to Disable autoboot */
+#define CONFIG_SYS_LOAD_ADDR 0 /* default? */
/* Miscellaneous configurable options */
#define CONFIG_SYS_PROMPT zynq-uboot
--
1.8.3
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[U-Boot] [PATCH v4 24/29] zynq-common: Define CONFIG_ENV_OVERWRITE
Defined CONFIG_ENV_OVERWRITE, which allow to overwrite serial baudrate and ethaddr. Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com --- include/configs/zynq-common.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index 568c49f..184d4ba 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -132,6 +132,9 @@ /* Total Size of Environment Sector */ #define CONFIG_ENV_SIZE(128 10) +/* Allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE + /* Environment */ #ifndef CONFIG_ENV_IS_NOWHERE # ifndef CONFIG_SYS_NO_FLASH -- 1.8.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v4 02/29] zynq: Enable Boot FreeBSD/vxWorks
This enabled Boot FreeBSD/vxWorks from an ELF image support
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
include/configs/zynq.h | 7 +++
1 file changed, 7 insertions(+)
diff --git a/include/configs/zynq.h b/include/configs/zynq.h
index 6019c4a..0492818 100644
--- a/include/configs/zynq.h
+++ b/include/configs/zynq.h
@@ -130,6 +130,13 @@
#define CONFIG_FIT_VERBOSE 1 /* enable fit_format_{error,warning}() */
#define CONFIG_OF_LIBFDT
+/* Boot FreeBSD/vxWorks from an ELF image */
+#if defined(CONFIG_ZYNQ_BOOT_FREEBSD)
+# define CONFIG_API
+# define CONFIG_CMD_ELF
+# define CONFIG_SYS_MMC_MAX_DEVICE 1
+#endif
+
/* Commands */
#include config_cmd_default.h
--
1.8.3
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[U-Boot] [PATCH v4 04/29] zynq: Cleanup on memory configs
Cleanup on memory configuration options:
- Add comment
- Re-order configs
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
include/configs/zynq.h | 27 ++-
1 file changed, 14 insertions(+), 13 deletions(-)
diff --git a/include/configs/zynq.h b/include/configs/zynq.h
index e34024d..8be52df 100644
--- a/include/configs/zynq.h
+++ b/include/configs/zynq.h
@@ -13,14 +13,6 @@
/* CPU clock */
#define CONFIG_CPU_FREQ_HZ 8
-/* Ram */
-#define CONFIG_NR_DRAM_BANKS 1
-#define CONFIG_SYS_TEXT_BASE 0
-#define CONFIG_SYS_SDRAM_BASE 0
-#define CONFIG_SYS_SDRAM_SIZE 0x4000
-#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
-#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x1000)
-
/* The following table includes the supported baudrates */
#define CONFIG_SYS_BAUDRATE_TABLE \
{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
@@ -105,11 +97,6 @@
#define CONFIG_SYS_NO_FLASH
#define CONFIG_SYS_MALLOC_LEN 0x40
-#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_SDRAM_BASE
-#define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN
-#define CONFIG_SYS_INIT_SP_ADDR(CONFIG_SYS_INIT_RAM_ADDR + \
- CONFIG_SYS_INIT_RAM_SIZE - \
- GENERATED_GBL_DATA_SIZE)
/* Miscellaneous configurable options */
#define CONFIG_SYS_PROMPT zynq-uboot
@@ -125,7 +112,21 @@
#define CONFIG_SYS_LOAD_ADDR 0
+/* Physical Memory map */
+#define CONFIG_SYS_TEXT_BASE 0
+#define CONFIG_NR_DRAM_BANKS 1
+#define CONFIG_SYS_SDRAM_BASE 0
+#define CONFIG_SYS_SDRAM_SIZE 0x4000
+
+#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
+#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x1000)
+
+#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_SDRAM_BASE
+#define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN
+#define CONFIG_SYS_INIT_SP_ADDR(CONFIG_SYS_INIT_RAM_ADDR + \
+ CONFIG_SYS_INIT_RAM_SIZE - \
+ GENERATED_GBL_DATA_SIZE)
/* OF */
#define CONFIG_FIT
#define CONFIG_FIT_VERBOSE 1 /* enable fit_format_{error,warning}() */
--
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[U-Boot] [PATCH v4 15/29] zynq: zc70x: Add Catalyst 24WC08 EEPROM config support
Adds configurations for Catalyst 24WC08 EEPROM, which is present on the zynq boards. Enable EEPROM support for zc70x boards. Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com --- include/configs/zynq-common.h | 10 ++ include/configs/zynq_zc70x.h | 1 + 2 files changed, 11 insertions(+) diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index e5b1e1d..cf96333 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -97,6 +97,16 @@ # define CONFIG_SYS_I2C_ZYNQ_SLAVE 1 #endif +/* EEPROM */ +#ifdef CONFIG_ZYNQ_EEPROM +# define CONFIG_CMD_EEPROM +# define CONFIG_SYS_I2C_EEPROM_ADDR_LEN1 +# define CONFIG_SYS_I2C_EEPROM_ADDR0x54 +# define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 +# define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 +# define CONFIG_SYS_EEPROM_SIZE1024 /* Bytes */ +#endif + #define CONFIG_BOOTP_SERVERIP #define CONFIG_BOOTP_BOOTPATH #define CONFIG_BOOTP_GATEWAY diff --git a/include/configs/zynq_zc70x.h b/include/configs/zynq_zc70x.h index 6950d41..0a7fa97 100644 --- a/include/configs/zynq_zc70x.h +++ b/include/configs/zynq_zc70x.h @@ -20,6 +20,7 @@ #define CONFIG_ZYNQ_SDHCI0 #define CONFIG_ZYNQ_I2C0 +#define CONFIG_ZYNQ_EEPROM #define CONFIG_ZYNQ_BOOT_FREEBSD #include configs/zynq-common.h -- 1.8.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v4 14/29] zynq-common: Define exact TEXT_BASE
Defined TEXT_BASE for u-boot starts from 0x400 w.r.t zynq memory-map. Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com --- include/configs/zynq-common.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index bb9e337..e5b1e1d 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -121,7 +121,7 @@ sizeof(CONFIG_SYS_PROMPT) + 16) /* Physical Memory map */ -#define CONFIG_SYS_TEXT_BASE 0 +#define CONFIG_SYS_TEXT_BASE 0x400 #define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_SDRAM_BASE 0 -- 1.8.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v4 28/29] dts: zynq: Add more zynq dts files
This patch adds initial dts support for supported
zynq boards.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
board/xilinx/dts/zynq-microzed.dts| 14 ++
board/xilinx/dts/zynq-zc702.dts | 14 ++
board/xilinx/dts/zynq-zc706.dts | 14 ++
board/xilinx/dts/zynq-zc770-xm010.dts | 14 ++
board/xilinx/dts/zynq-zc770-xm012.dts | 14 ++
board/xilinx/dts/zynq-zc770-xm013.dts | 14 ++
6 files changed, 84 insertions(+)
create mode 100644 board/xilinx/dts/zynq-microzed.dts
create mode 100644 board/xilinx/dts/zynq-zc702.dts
create mode 100644 board/xilinx/dts/zynq-zc706.dts
create mode 100644 board/xilinx/dts/zynq-zc770-xm010.dts
create mode 100644 board/xilinx/dts/zynq-zc770-xm012.dts
create mode 100644 board/xilinx/dts/zynq-zc770-xm013.dts
diff --git a/board/xilinx/dts/zynq-microzed.dts
b/board/xilinx/dts/zynq-microzed.dts
new file mode 100644
index 000..6da71c1
--- /dev/null
+++ b/board/xilinx/dts/zynq-microzed.dts
@@ -0,0 +1,14 @@
+/*
+ * Xilinx MicroZED board DTS
+ *
+ * Copyright (C) 2013 Xilinx, Inc.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+/dts-v1/;
+#include zynq-7000.dtsi
+
+/ {
+ model = Zynq MicroZED Board;
+ compatible = xlnx,zynq-microzed, xlnx,zynq-7000;
+};
diff --git a/board/xilinx/dts/zynq-zc702.dts b/board/xilinx/dts/zynq-zc702.dts
new file mode 100644
index 000..667dc28
--- /dev/null
+++ b/board/xilinx/dts/zynq-zc702.dts
@@ -0,0 +1,14 @@
+/*
+ * Xilinx ZC702 board DTS
+ *
+ * Copyright (C) 2013 Xilinx, Inc.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+/dts-v1/;
+#include zynq-7000.dtsi
+
+/ {
+ model = Zynq ZC702 Board;
+ compatible = xlnx,zynq-zc702, xlnx,zynq-7000;
+};
diff --git a/board/xilinx/dts/zynq-zc706.dts b/board/xilinx/dts/zynq-zc706.dts
new file mode 100644
index 000..526fc88
--- /dev/null
+++ b/board/xilinx/dts/zynq-zc706.dts
@@ -0,0 +1,14 @@
+/*
+ * Xilinx ZC706 board DTS
+ *
+ * Copyright (C) 2013 Xilinx, Inc.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+/dts-v1/;
+#include zynq-7000.dtsi
+
+/ {
+ model = Zynq ZC706 Board;
+ compatible = xlnx,zynq-zc706, xlnx,zynq-7000;
+};
diff --git a/board/xilinx/dts/zynq-zc770-xm010.dts
b/board/xilinx/dts/zynq-zc770-xm010.dts
new file mode 100644
index 000..8b542a1
--- /dev/null
+++ b/board/xilinx/dts/zynq-zc770-xm010.dts
@@ -0,0 +1,14 @@
+/*
+ * Xilinx ZC770 XM010 board DTS
+ *
+ * Copyright (C) 2013 Xilinx, Inc.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+/dts-v1/;
+#include zynq-7000.dtsi
+
+/ {
+ model = Zynq ZC770 XM010 Board;
+ compatible = xlnx,zynq-zc770-xm010, xlnx,zynq-7000;
+};
diff --git a/board/xilinx/dts/zynq-zc770-xm012.dts
b/board/xilinx/dts/zynq-zc770-xm012.dts
new file mode 100644
index 000..0379a07
--- /dev/null
+++ b/board/xilinx/dts/zynq-zc770-xm012.dts
@@ -0,0 +1,14 @@
+/*
+ * Xilinx ZC770 XM012 board DTS
+ *
+ * Copyright (C) 2013 Xilinx, Inc.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+/dts-v1/;
+#include zynq-7000.dtsi
+
+/ {
+ model = Zynq ZC770 XM012 Board;
+ compatible = xlnx,zynq-zc770-xm012, xlnx,zynq-7000;
+};
diff --git a/board/xilinx/dts/zynq-zc770-xm013.dts
b/board/xilinx/dts/zynq-zc770-xm013.dts
new file mode 100644
index 000..a4f9e05
--- /dev/null
+++ b/board/xilinx/dts/zynq-zc770-xm013.dts
@@ -0,0 +1,14 @@
+/*
+ * Xilinx ZC770 XM013 board DTS
+ *
+ * Copyright (C) 2013 Xilinx, Inc.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+/dts-v1/;
+#include zynq-7000.dtsi
+
+/ {
+ model = Zynq ZC770 XM013 Board;
+ compatible = xlnx,zynq-zc770-xm013, xlnx,zynq-7000;
+};
--
1.8.3
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[U-Boot] [PATCH v4 12/29] zynq: Add zynq zed board support
Zed is a complete development board based on the Xilinx Zynq-7000 All Programmable SoC. APSOC: - XC7Z020-CLG484-1 Memory: - 512 MB DDR3 - 256 Mb Quad-SPI Flash( - Full size SD/MMC card cage Connectivity: - 10/100/1000 Ethernet - USB OTG (Device/Host/OTG) - USB-UART Expansion: - FMC (Low Pin Count) - Pmod. headers (2x6) Video/Display: - HDMI output (1080p60 + audio) - VGA connector - 128 x 32 OLED - User LEDs (9) User inputs: - Slide switches (8) - Push button switches (7) Audio: - 24-bit stereo audio CODEC - Stereo line in/out - Headphone - Microphone input Analog: - Xilinx XADC header - Supports 4 analog inputs - 2 Differential / 4 Single-ended Debug: - On-board USB JTAG programming port - ARM Debug Access Port (DAP) For more info - http://zedboard.org/product/zedboard Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com --- boards.cfg | 1 + include/configs/zynq_zed.h | 24 2 files changed, 25 insertions(+) create mode 100644 include/configs/zynq_zed.h diff --git a/boards.cfg b/boards.cfg index 5ef2045..720aad6 100644 --- a/boards.cfg +++ b/boards.cfg @@ -355,6 +355,7 @@ Active arm armv7 u8500 st-ericsson snowball Active arm armv7 u8500 st-ericsson u8500 u8500_href - - Active arm armv7 vf610 freescale vf610twr vf610twr vf610twr:IMX_CONFIG=board/freescale/vf610twr/imximage.cfg Alison Wang b18...@freescale.com Active armarmv7 zynqxilinx zynq zynq_zc70x - Michal Simek mon...@monstr.eu:Jagannadha Sutradharudu Teki jaga...@xilinx.com +Active armarmv7 zynqxilinx zynq zynq_zed - Michal Simek mon...@monstr.eu:Jagannadha Sutradharudu Teki jaga...@xilinx.com Active arm armv7:arm720t tegra114nvidia dalmore dalmore - Tom Warren twar...@nvidia.com Active arm armv7:arm720t tegra20 avionic-design medcom-wide medcom-wide - Thierry Reding thierry.red...@avionic-design.de Active arm armv7:arm720t tegra20 avionic-design plutux plutux - Thierry Reding thierry.red...@avionic-design.de diff --git a/include/configs/zynq_zed.h b/include/configs/zynq_zed.h new file mode 100644 index 000..278db1e --- /dev/null +++ b/include/configs/zynq_zed.h @@ -0,0 +1,24 @@ +/* + * (C) Copyright 2013 Xilinx, Inc. + * + * Configuration for Zynq Evaluation and Development Board - ZedBoard + * See zynq_common.h for Zynq common configs + * + * SPDX-License-Identifier:GPL-2.0+ + */ + +#ifndef __CONFIG_ZYNQ_ZED_H +#define __CONFIG_ZYNQ_ZED_H + +#define CONFIG_ZYNQ_SERIAL_UART1 +#define CONFIG_ZYNQ_GEM0 +#define CONFIG_ZYNQ_GEM_PHY_ADDR0 0 + +#define CONFIG_SYS_NO_FLASH + +#define CONFIG_ZYNQ_SDHCI0 +#define CONFIG_ZYNQ_BOOT_FREEBSD + +#include configs/zynq-common.h + +#endif /* __CONFIG_ZYNQ_ZED_H */ -- 1.8.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v4 05/29] zynq: Minor config cleanup
Cleanups mostly on:
- Add comments
- Re-order configs
- Remove #define CONFIG_ZYNQ_SDHCI
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
include/configs/zynq.h | 76 ++
1 file changed, 39 insertions(+), 37 deletions(-)
diff --git a/include/configs/zynq.h b/include/configs/zynq.h
index 8be52df..c8ab06f 100644
--- a/include/configs/zynq.h
+++ b/include/configs/zynq.h
@@ -7,33 +7,51 @@
#ifndef __CONFIG_ZYNQ_H
#define __CONFIG_ZYNQ_H
-#define CONFIG_ARMV7 /* This is an ARM V7 CPU core */
+/* High Level configuration Options */
+#define CONFIG_ARMV7
#define CONFIG_ZYNQ
/* CPU clock */
-#define CONFIG_CPU_FREQ_HZ 8
+#ifndef CONFIG_CPU_FREQ_HZ
+# define CONFIG_CPU_FREQ_HZ8
+#endif
+/* Serial drivers */
+#define CONFIG_BAUDRATE115200
/* The following table includes the supported baudrates */
#define CONFIG_SYS_BAUDRATE_TABLE \
{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
-#define CONFIG_BAUDRATE115200
-
-/* XPSS Serial driver */
+/* Zynq Serial driver */
#define CONFIG_ZYNQ_SERIAL
#define CONFIG_ZYNQ_SERIAL_BASEADDR0 0xE0001000
#define CONFIG_ZYNQ_SERIAL_BAUDRATE0 CONFIG_BAUDRATE
#define CONFIG_ZYNQ_SERIAL_CLOCK0 5000
+/* DCC driver */
+#if defined(CONFIG_ZYNQ_DCC)
+# define CONFIG_ARM_DCC
+# define CONFIG_CPU_V6 /* Required by CONFIG_ARM_DCC */
+#endif
+
/* Ethernet driver */
#define CONFIG_NET_MULTI
#define CONFIG_ZYNQ_GEM
#define CONFIG_ZYNQ_GEM0
#define CONFIG_ZYNQ_GEM_PHY_ADDR0 7
-#define CONFIG_ZYNQ_SDHCI
-#define CONFIG_ZYNQ_SDHCI0
+#define CONFIG_ZYNQ_SPI
+/* SPI */
+#ifdef CONFIG_ZYNQ_SPI
+# define CONFIG_SPI_FLASH
+# define CONFIG_SPI_FLASH_SST
+# define CONFIG_CMD_SF
+#endif
+
+/* NOR */
+#define CONFIG_SYS_NO_FLASH
+#define CONFIG_ZYNQ_SDHCI0
/* MMC */
#if defined(CONFIG_ZYNQ_SDHCI0) || defined(CONFIG_ZYNQ_SDHCI1)
# define CONFIG_MMC
@@ -48,7 +66,6 @@
#endif
#define CONFIG_ZYNQ_I2C0
-
/* I2C */
#if defined(CONFIG_ZYNQ_I2C0) || defined(CONFIG_ZYNQ_I2C1)
# define CONFIG_CMD_I2C
@@ -58,26 +75,6 @@
# define CONFIG_SYS_I2C_ZYNQ_SLAVE 1
#endif
-#if defined(CONFIG_ZYNQ_DCC)
-# define CONFIG_ARM_DCC
-# define CONFIG_CPU_V6 /* Required by CONFIG_ARM_DCC */
-#endif
-
-#define CONFIG_ZYNQ_SPI
-
-/* SPI */
-#ifdef CONFIG_ZYNQ_SPI
-# define CONFIG_SPI_FLASH
-# define CONFIG_SPI_FLASH_SST
-# define CONFIG_CMD_SF
-#endif
-
-/* Enable the PL to be downloaded */
-#define CONFIG_FPGA
-#define CONFIG_FPGA_XILINX
-#define CONFIG_FPGA_ZYNQPL
-#define CONFIG_CMD_FPGA
-
#define CONFIG_BOOTP_SERVERIP
#define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_GATEWAY
@@ -91,12 +88,9 @@
#define CONFIG_PHY_MARVELL
/* Environment */
+#define CONFIG_ENV_SIZE0x1 /* Env. sector size */
#define CONFIG_ENV_IS_NOWHERE
-#define CONFIG_ENV_SIZE 0x1
-
-#define CONFIG_SYS_NO_FLASH
-
-#define CONFIG_SYS_MALLOC_LEN 0x40
+#define CONFIG_SYS_LOAD_ADDR 0
/* Miscellaneous configurable options */
#define CONFIG_SYS_PROMPT zynq-uboot
@@ -110,8 +104,6 @@
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
sizeof(CONFIG_SYS_PROMPT) + 16)
-#define CONFIG_SYS_LOAD_ADDR 0
-
/* Physical Memory map */
#define CONFIG_SYS_TEXT_BASE 0
@@ -122,15 +114,25 @@
#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x1000)
+#define CONFIG_SYS_MALLOC_LEN 0x40
#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_SDRAM_BASE
#define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN
#define CONFIG_SYS_INIT_SP_ADDR(CONFIG_SYS_INIT_RAM_ADDR + \
CONFIG_SYS_INIT_RAM_SIZE - \
GENERATED_GBL_DATA_SIZE)
-/* OF */
+
+/* Enable the PL to be downloaded */
+#define CONFIG_FPGA
+#define CONFIG_FPGA_XILINX
+#define CONFIG_FPGA_ZYNQPL
+#define CONFIG_CMD_FPGA
+
+/* Open Firmware flat tree */
+#define CONFIG_OF_LIBFDT
+
+/* FIT support */
#define CONFIG_FIT
#define CONFIG_FIT_VERBOSE 1 /* enable fit_format_{error,warning}() */
-#define CONFIG_OF_LIBFDT
/* Boot FreeBSD/vxWorks from an ELF image */
#if defined(CONFIG_ZYNQ_BOOT_FREEBSD)
--
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[U-Boot] [PATCH v4 22/29] zynq-common: Change Env. Sector size to 128Kb
Changed Env. Sector size from 0x1 to 128Kb Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com --- include/configs/zynq-common.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index 1eaf17d..402009e 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -129,8 +129,10 @@ #define CONFIG_BOOTP_HOSTNAME #define CONFIG_BOOTP_MAY_FAIL +/* Total Size of Environment Sector */ +#define CONFIG_ENV_SIZE(128 10) + /* Environment */ -#define CONFIG_ENV_SIZE0x1 /* Env. sector size */ #define CONFIG_ENV_IS_NOWHERE /* Default environment */ -- 1.8.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v4 07/29] zynq: Add UART0, UART1 configs support
Zynq uart controller support two serial ports like
CONFIG_ZYNQ_SERIAL_UART0 and CONFIG_ZYNQ_SERIAL_UART1
enabled both so-that the respective board will define
these macros based on their usage.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
include/configs/zynq.h | 20
1 file changed, 16 insertions(+), 4 deletions(-)
diff --git a/include/configs/zynq.h b/include/configs/zynq.h
index 6e545e5..f104558 100644
--- a/include/configs/zynq.h
+++ b/include/configs/zynq.h
@@ -33,10 +33,22 @@
{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
/* Zynq Serial driver */
-#define CONFIG_ZYNQ_SERIAL
-#define CONFIG_ZYNQ_SERIAL_BASEADDR0 0xE0001000
-#define CONFIG_ZYNQ_SERIAL_BAUDRATE0 CONFIG_BAUDRATE
-#define CONFIG_ZYNQ_SERIAL_CLOCK0 5000
+#define CONFIG_ZYNQ_SERIAL_UART1
+#ifdef CONFIG_ZYNQ_SERIAL_UART0
+# define CONFIG_ZYNQ_SERIAL_BASEADDR0 0xE000
+# define CONFIG_ZYNQ_SERIAL_BAUDRATE0 CONFIG_BAUDRATE
+# define CONFIG_ZYNQ_SERIAL_CLOCK0 5000
+#endif
+
+#ifdef CONFIG_ZYNQ_SERIAL_UART1
+# define CONFIG_ZYNQ_SERIAL_BASEADDR1 0xE0001000
+# define CONFIG_ZYNQ_SERIAL_BAUDRATE1 CONFIG_BAUDRATE
+# define CONFIG_ZYNQ_SERIAL_CLOCK1 5000
+#endif
+
+#if defined(CONFIG_ZYNQ_SERIAL_UART0) || defined(CONFIG_ZYNQ_SERIAL_UART1)
+# define CONFIG_ZYNQ_SERIAL
+#endif
/* DCC driver */
#if defined(CONFIG_ZYNQ_DCC)
--
1.8.3
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[U-Boot] [PATCH v4 26/29] gpio: zynq: Add dummy gpio routines
GPIO dummy routines are required for fdt build, may be removed
these dependencies once the u-boot fdt is fully optimized.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
arch/arm/include/asm/arch-zynq/gpio.h | 25 +
1 file changed, 25 insertions(+)
create mode 100644 arch/arm/include/asm/arch-zynq/gpio.h
diff --git a/arch/arm/include/asm/arch-zynq/gpio.h
b/arch/arm/include/asm/arch-zynq/gpio.h
new file mode 100644
index 000..2dbba75
--- /dev/null
+++ b/arch/arm/include/asm/arch-zynq/gpio.h
@@ -0,0 +1,25 @@
+/*
+ * Copyright (c) 2013 Xilinx, Inc.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef _ZYNQ_GPIO_H
+#define _ZYNQ_GPIO_H
+
+inline int gpio_get_value(unsigned gpio)
+{
+ return 0;
+}
+
+inline int gpio_set_value(unsigned gpio, int val)
+{
+ return 0;
+}
+
+inline int gpio_request(unsigned gpio, const char *label)
+{
+ return 0;
+}
+
+#endif /* _ZYNQ_GPIO_H */
--
1.8.3
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[U-Boot] [PATCH v4 16/29] zynq: Add zynq microzed board support
MicroZed is a low-cost development board based on the Xilinx Zynq-7000 All Programmable SoC. APSOC: - XC7Z010-1CLG400C Memory: - 1 GB of DDR3 SDRAM - 128Mb of QSPI flash(S25FL128SAGBHI200) - Micro SD card interface Communication: - 10/100/1000 Ethernet - USB 2.0 - USB-UART User I/O: - 100 User I/O (50 per connector) - Configurable as up to 48 LVDS pairs or 100 single-ended I/O Misc: - Xilinx PC4 JTAG configuration port - PS JTAG pins accessible via Pmod - 33.33 MHz oscillator - User LED and push switch For more info - http://zedboard.org/product/microzed Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com --- boards.cfg | 1 + include/configs/zynq_microzed.h | 25 + 2 files changed, 26 insertions(+) create mode 100644 include/configs/zynq_microzed.h diff --git a/boards.cfg b/boards.cfg index 720aad6..1c7cdf3 100644 --- a/boards.cfg +++ b/boards.cfg @@ -356,6 +356,7 @@ Active arm armv7 u8500 st-ericsson u8500 Active arm armv7 vf610 freescale vf610twr vf610twr vf610twr:IMX_CONFIG=board/freescale/vf610twr/imximage.cfg Alison Wang b18...@freescale.com Active armarmv7 zynqxilinx zynq zynq_zc70x - Michal Simek mon...@monstr.eu:Jagannadha Sutradharudu Teki jaga...@xilinx.com Active armarmv7 zynqxilinx zynq zynq_zed - Michal Simek mon...@monstr.eu:Jagannadha Sutradharudu Teki jaga...@xilinx.com +Active armarmv7 zynqxilinx zynq zynq_microzed- Michal Simek mon...@monstr.eu:Jagannadha Sutradharudu Teki jaga...@xilinx.com Active arm armv7:arm720t tegra114nvidia dalmore dalmore - Tom Warren twar...@nvidia.com Active arm armv7:arm720t tegra20 avionic-design medcom-wide medcom-wide - Thierry Reding thierry.red...@avionic-design.de Active arm armv7:arm720t tegra20 avionic-design plutux plutux - Thierry Reding thierry.red...@avionic-design.de diff --git a/include/configs/zynq_microzed.h b/include/configs/zynq_microzed.h new file mode 100644 index 000..549a664 --- /dev/null +++ b/include/configs/zynq_microzed.h @@ -0,0 +1,25 @@ +/* + * (C) Copyright 2013 Xilinx, Inc. + * + * Configuration for Micro Zynq Evaluation and Development Board - MicroZedBoard + * See zynq-common.h for Zynq common configs + * + * SPDX-License-Identifier:GPL-2.0+ + */ + +#ifndef __CONFIG_ZYNQ_MICROZED_H +#define __CONFIG_ZYNQ_MICROZED_H + +#define CONFIG_SYS_SDRAM_SIZE (1024 * 1024 * 1024) + +#define CONFIG_ZYNQ_SERIAL_UART1 +#define CONFIG_ZYNQ_GEM0 +#define CONFIG_ZYNQ_GEM_PHY_ADDR0 0 + +#define CONFIG_SYS_NO_FLASH + +#define CONFIG_ZYNQ_SDHCI0 + +#include configs/zynq-common.h + +#endif /* __CONFIG_ZYNQ_MICROZED_H */ -- 1.8.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v4 08/29] zynq: Add GEM0, GEM1 configs support
Zynq ethernet controller support two GEM's like CONFIG_ZYNQ_GEM0 and CONFIG_ZYNQ_GEM1 enabled both so-that the respective board will define these macros based on their usage. Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com --- include/configs/zynq.h | 16 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/include/configs/zynq.h b/include/configs/zynq.h index f104558..ea25159 100644 --- a/include/configs/zynq.h +++ b/include/configs/zynq.h @@ -57,10 +57,16 @@ #endif /* Ethernet driver */ -#define CONFIG_NET_MULTI -#define CONFIG_ZYNQ_GEM #define CONFIG_ZYNQ_GEM0 #define CONFIG_ZYNQ_GEM_PHY_ADDR0 7 +#if defined(CONFIG_ZYNQ_GEM0) || defined(CONFIG_ZYNQ_GEM1) +# define CONFIG_NET_MULTI +# define CONFIG_ZYNQ_GEM +# define CONFIG_MII +# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN +# define CONFIG_PHYLIB +# define CONFIG_PHY_MARVELL +#endif #define CONFIG_ZYNQ_SPI /* SPI */ @@ -103,12 +109,6 @@ #define CONFIG_BOOTP_HOSTNAME #define CONFIG_BOOTP_MAY_FAIL -/* MII and Phylib */ -#define CONFIG_MII -#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN -#define CONFIG_PHYLIB -#define CONFIG_PHY_MARVELL - /* Environment */ #define CONFIG_ENV_SIZE0x1 /* Env. sector size */ #define CONFIG_ENV_IS_NOWHERE -- 1.8.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v4 18/29] zynq: Add zynq_zc770 xm013 board support
ZC770 is a complete development board based on the Xilinx Zynq-7000 All Programmable SoC, similar to ZC70x board but which has four different daughter cards, like XM010, XM011, XM012 and XM013 ZC770 XM013: - 1GB DDR3 - 128 Mb Quad-SPI Flash(dual parallel) - USB-UART Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com --- boards.cfg | 1 + include/configs/zynq_zc770.h | 5 + 2 files changed, 6 insertions(+) diff --git a/boards.cfg b/boards.cfg index 4e88dfe..86e4e6e 100644 --- a/boards.cfg +++ b/boards.cfg @@ -358,6 +358,7 @@ Active arm armv7 zynqxilinx zynqzynq_zc70x - Active armarmv7 zynqxilinx zynq zynq_zed - Michal Simek mon...@monstr.eu:Jagannadha Sutradharudu Teki jaga...@xilinx.com Active armarmv7 zynqxilinx zynq zynq_microzed- Michal Simek mon...@monstr.eu:Jagannadha Sutradharudu Teki jaga...@xilinx.com Active armarmv7 zynqxilinx zynq zynq_zc770_xm010 zynq_zc770:ZC770_XM010 Michal Simek mon...@monstr.eu:Jagannadha Sutradharudu Teki jaga...@xilinx.com +Active armarmv7 zynqxilinx zynq zynq_zc770_xm013 zynq_zc770:ZC770_XM013 Michal Simek mon...@monstr.eu:Jagannadha Sutradharudu Teki jaga...@xilinx.com Active arm armv7:arm720t tegra114nvidia dalmore dalmore - Tom Warren twar...@nvidia.com Active arm armv7:arm720t tegra20 avionic-design medcom-wide medcom-wide - Thierry Reding thierry.red...@avionic-design.de Active arm armv7:arm720t tegra20 avionic-design plutux plutux - Thierry Reding thierry.red...@avionic-design.de diff --git a/include/configs/zynq_zc770.h b/include/configs/zynq_zc770.h index 8589d9d..181f9fb 100644 --- a/include/configs/zynq_zc770.h +++ b/include/configs/zynq_zc770.h @@ -21,6 +21,11 @@ # define CONFIG_ZYNQ_SDHCI0 # define CONFIG_ZYNQ_SPI +#elif defined(CONFIG_ZC770_XM013) +# define CONFIG_ZYNQ_SERIAL_UART0 +# define CONFIG_ZYNQ_GEM1 +# define CONFIG_ZYNQ_GEM_PHY_ADDR1 7 + #else # define CONFIG_ZYNQ_SERIAL_UART0 #endif -- 1.8.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v4 11/29] zynq: Add zynq zc70x board support
The Zynq-7000 APSOC zc702 and zc706 enabled complte embedded
processing includes ASIC and FPGA design.
ZC702-:
APSOC:
- XC7Z020-CLG484-1
Memory:
- DDR3 Component Memory 1GB
- 16MB Quad SPI Flash
- IIC - 1 KB EEPROM
Connectivity:
- Gigabit Ethernet GMII, RGMII and SGMII.
- USB OTG - Host USB
- IIC Bus Headers/HUB
- 1 CAN with Wake on CAN
- USB-UART
Video/Display:
- HDMI Video OUT
- 8X LEDs
Control I/O:
- 3 User Push Buttons
- 2 User Switches
- 8 User LEDs
For more info on zc702 board:
- http://www.xilinx.com/products/boards-and-kits/EK-Z7-ZC702-G.htm
ZC706-:
APSOC:
- XC7Z045 FFG900 -2 AP SoC
Memory:
- DDR3 Component Memory 1GB (PS)
- DDR3 SODIM Memory 1GB (PL)
- 2X16MB Quad SPI Flash (dual parallel)
- IIC - 1 KB EEPROM
Connectivity:
- PCIe Gen2x4
- SFP+ and SMA Pairs
- GigE RGMII Ethernet (PS)
- USB OTG 1 (PS) - Host USB
- IIC Bus Headers/HUB (PS)
- 1 CAN with Wake on CAN (PS)
- USB-UART
Video/Display:
- HDMI 8 color RGB 4.4.4 1080P-60 OUT
- HDMI IN 8 color RGB 4.4.4
Control I/O:
- 2 User Push Buttons/Dip Switch, 2 User LEDs
- IIC access to GPIO
- SDIO (SD Card slot)
- 3 User Push Buttons, 2 User Switches, 8 User LEDs
For more info on zc706 board:
- http://www.xilinx.com/products/boards-and-kits/EK-Z7-ZC706-G.htm
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
boards.cfg| 1 +
include/configs/zynq-common.h | 9 -
include/configs/zynq_zc70x.h | 25 +
3 files changed, 26 insertions(+), 9 deletions(-)
create mode 100644 include/configs/zynq_zc70x.h
diff --git a/boards.cfg b/boards.cfg
index faaac0a..5ef2045 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -354,6 +354,7 @@ Active arm armv7 socfpga altera
socfpga
Active arm armv7 u8500 st-ericsson snowball
snowball -
Mathieu Poirier mathieu.poir...@linaro.org
Active arm armv7 u8500 st-ericsson u8500
u8500_href -
-
Active arm armv7 vf610 freescale vf610twr
vf610twr
vf610twr:IMX_CONFIG=board/freescale/vf610twr/imximage.cfg
Alison Wang
b18...@freescale.com
+Active armarmv7 zynqxilinx zynq
zynq_zc70x -
Michal Simek mon...@monstr.eu:Jagannadha Sutradharudu Teki
jaga...@xilinx.com
Active arm armv7:arm720t tegra114nvidia dalmore
dalmore -
Tom Warren twar...@nvidia.com
Active arm armv7:arm720t tegra20 avionic-design medcom-wide
medcom-wide -
Thierry Reding thierry.red...@avionic-design.de
Active arm armv7:arm720t tegra20 avionic-design plutux
plutux -
Thierry Reding thierry.red...@avionic-design.de
diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h
index 9fe06e8..bce1094 100644
--- a/include/configs/zynq-common.h
+++ b/include/configs/zynq-common.h
@@ -36,7 +36,6 @@
{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
/* Zynq Serial driver */
-#define CONFIG_ZYNQ_SERIAL_UART1
#ifdef CONFIG_ZYNQ_SERIAL_UART0
# define CONFIG_ZYNQ_SERIAL_BASEADDR0 0xE000
# define CONFIG_ZYNQ_SERIAL_BAUDRATE0 CONFIG_BAUDRATE
@@ -60,8 +59,6 @@
#endif
/* Ethernet driver */
-#define CONFIG_ZYNQ_GEM0
-#define CONFIG_ZYNQ_GEM_PHY_ADDR0 7
#if defined(CONFIG_ZYNQ_GEM0) || defined(CONFIG_ZYNQ_GEM1)
# define CONFIG_NET_MULTI
# define CONFIG_ZYNQ_GEM
@@ -71,7 +68,6 @@
# define CONFIG_PHY_MARVELL
#endif
-#define CONFIG_ZYNQ_SPI
/* SPI */
#ifdef CONFIG_ZYNQ_SPI
# define CONFIG_SPI_FLASH
@@ -79,10 +75,6 @@
# define CONFIG_CMD_SF
#endif
-/* NOR */
-#define CONFIG_SYS_NO_FLASH
-
-#define CONFIG_ZYNQ_SDHCI0
/* MMC */
#if defined(CONFIG_ZYNQ_SDHCI0) || defined(CONFIG_ZYNQ_SDHCI1)
# define CONFIG_MMC
@@ -96,7 +88,6 @@
# define CONFIG_DOS_PARTITION
#endif
-#define CONFIG_ZYNQ_I2C0
/* I2C */
#if
[U-Boot] [PATCH v4 17/29] zynq: Add zynq_zc770 xm010 board support
ZC770 is a complete development board based on the Xilinx Zynq-7000 All Programmable SoC, similar to ZC70x board but which has four different daughter cards, like XM010, XM011, XM012 and XM013 ZC770 XM010: - 1Gb DDR3 - 1Mb SST SPI flash - 128 Mb Quad-SPI Flash - 8 Mb SST SI flash - Full size SD/MMC card cage - 10/100/1000 Ethernet - USB-UART Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com --- boards.cfg | 1 + include/configs/zynq_zc770.h | 30 ++ 2 files changed, 31 insertions(+) create mode 100644 include/configs/zynq_zc770.h diff --git a/boards.cfg b/boards.cfg index 1c7cdf3..4e88dfe 100644 --- a/boards.cfg +++ b/boards.cfg @@ -357,6 +357,7 @@ Active arm armv7 vf610 freescale vf610twr Active armarmv7 zynqxilinx zynq zynq_zc70x - Michal Simek mon...@monstr.eu:Jagannadha Sutradharudu Teki jaga...@xilinx.com Active armarmv7 zynqxilinx zynq zynq_zed - Michal Simek mon...@monstr.eu:Jagannadha Sutradharudu Teki jaga...@xilinx.com Active armarmv7 zynqxilinx zynq zynq_microzed- Michal Simek mon...@monstr.eu:Jagannadha Sutradharudu Teki jaga...@xilinx.com +Active armarmv7 zynqxilinx zynq zynq_zc770_xm010 zynq_zc770:ZC770_XM010 Michal Simek mon...@monstr.eu:Jagannadha Sutradharudu Teki jaga...@xilinx.com Active arm armv7:arm720t tegra114nvidia dalmore dalmore - Tom Warren twar...@nvidia.com Active arm armv7:arm720t tegra20 avionic-design medcom-wide medcom-wide - Thierry Reding thierry.red...@avionic-design.de Active arm armv7:arm720t tegra20 avionic-design plutux plutux - Thierry Reding thierry.red...@avionic-design.de diff --git a/include/configs/zynq_zc770.h b/include/configs/zynq_zc770.h new file mode 100644 index 000..8589d9d --- /dev/null +++ b/include/configs/zynq_zc770.h @@ -0,0 +1,30 @@ +/* + * (C) Copyright 2013 Xilinx, Inc. + * + * Configuration settings for the Xilinx Zynq ZC770 board. + * See zynq-common.h for Zynq common configs + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_ZYNQ_ZC770_H +#define __CONFIG_ZYNQ_ZC770_H + +#define CONFIG_SYS_SDRAM_SIZE (1024 * 1024 * 1024) + +#define CONFIG_SYS_NO_FLASH + +#if defined(CONFIG_ZC770_XM010) +# define CONFIG_ZYNQ_SERIAL_UART1 +# define CONFIG_ZYNQ_GEM0 +# define CONFIG_ZYNQ_GEM_PHY_ADDR0 7 +# define CONFIG_ZYNQ_SDHCI0 +# define CONFIG_ZYNQ_SPI + +#else +# define CONFIG_ZYNQ_SERIAL_UART0 +#endif + +#include configs/zynq-common.h + +#endif /* __CONFIG_ZYNQ_ZC770_H */ -- 1.8.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v4 23/29] zynq-common: Define flash env. partition
Last 128Kb sector of 1Mb flash is defined as u-boot environment partition. Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com --- include/configs/zynq-common.h | 12 +++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index 402009e..568c49f 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -133,7 +133,17 @@ #define CONFIG_ENV_SIZE(128 10) /* Environment */ -#define CONFIG_ENV_IS_NOWHERE +#ifndef CONFIG_ENV_IS_NOWHERE +# ifndef CONFIG_SYS_NO_FLASH +# define CONFIG_ENV_IS_IN_FLASH +# elif defined(CONFIG_SYS_NO_FLASH) +# define CONFIG_ENV_IS_NOWHERE +# endif + +# define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE +# define CONFIG_ENV_OFFSET 0xE +# define CONFIG_CMD_SAVEENV +#endif /* Default environment */ #define CONFIG_EXTRA_ENV_SETTINGS \ -- 1.8.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v4 10/29] doc: zynq: Add information on zynq u-boot
Information on zynq u-boot about - zynq boards - mainline status - TODO Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com --- doc/README.zynq | 60 + 1 file changed, 60 insertions(+) create mode 100644 doc/README.zynq diff --git a/doc/README.zynq b/doc/README.zynq new file mode 100644 index 000..56a74b4 --- /dev/null +++ b/doc/README.zynq @@ -0,0 +1,60 @@ +# +# Xilinx ZYNQ U-Boot +# +# (C) Copyright 2013 Xilinx, Inc. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +1. About this + +This document describes the information about Xilinx Zynq U-Boot - +like supported boards, ML status and TODO list. + +2. Zynq boards + +Xilinx Zynq-7000 All Programmable SoCs enable extensive system level +differentiation, integration, and flexibility through hardware, software, +and I/O programmability. + +* zc70x + - zc702 (single qspi, gem0, mmc) [1] + - zc706 (dual parallel qspi, gem0, mmc) [2] +* zed (single qspi, gem0, mmc) [3] +* microzed (single qspi, gem0, mmc) [4] +* zc770 + - zc770-xm010 (single qspi, gem0, mmc) + - zc770-xm011 (8 or 16 bit nand) + - zc770-xm012 (nor) + - zc770-xm013 (dual parallel qspi, gem1) + +3. Mainline status + +- Added basic board configurations support. +- Added zynq u-boot bsp code - arch/arm/cpu/armv7/zynq +- Added zynq boards named - zynq, zynq_dcc +- Added zynq drivers: + serial - drivers/serial/serial_zynq.c + net - drivers/net/zynq_gem.c + mmc - drivers/mmc/zynq_sdhci.c + mmc - drivers/mmc/zynq_sdhci.c + spi- drivers/spi/zynq_spi.c + i2c - drivers/i2c/zynq_i2c.c + +4. TODO + +- Add zynq boards support - zc70x, zed, microzed, zc770 +- Add zynq qspi controller driver +- Add zynq nand controller driver +- d-cache support for zynq_gem.c +- FDT support for zynq boards +- Need proper cleanups on board configurations + +[1] http://www.xilinx.com/products/boards-and-kits/EK-Z7-ZC702-G.htm +[2] http://www.xilinx.com/products/boards-and-kits/EK-Z7-ZC706-G.htm +[3] http://zedboard.org/product/zedboard +[4] http://zedboard.org/product/microzed + +-- +Jagannadha Sutradharudu Teki jaga...@xilinx.com +Sun Dec 15 14:52:41 IST 2013 -- 1.8.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v4 27/29] zynq-common: Enable verified boot(RSA)
CONFIG_FIT_SIGNATURE - signature node support in FIT image CONFIG_RSA - RSA lib support Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com --- include/configs/zynq-common.h | 4 1 file changed, 4 insertions(+) diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index 8707bc0..e7a8e9f 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -217,6 +217,10 @@ #define CONFIG_OF_SEPARATE #define CONFIG_DISPLAY_BOARDINFO_LATE +/* RSA support */ +#define CONFIG_FIT_SIGNATURE +#define CONFIG_RSA + /* Boot FreeBSD/vxWorks from an ELF image */ #if defined(CONFIG_ZYNQ_BOOT_FREEBSD) # define CONFIG_API -- 1.8.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] sandbox question
Hi, Albrahm: Thanks a lot! Best wishes, ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v6] spi: pl022_spi: Add support for ARM PL022 spi controller
On Wed, Jan 8, 2014 at 2:49 PM, Armando Visconti
armando.visco...@st.com wrote:
Hello Jagan,
Sorry for late reply.
On 12/20/2013 8:03 PM, Jagan Teki wrote:
On Fri, Oct 4, 2013 at 12:20 PM, Jagan Teki jagannadh.t...@gmail.com
wrote:
Hi Vipin,
I have few quick comments, please fix it.
Please use the u-boot-spi.git with master-probe branch for testing this
driver.
Let me know for any issues/concerns.
On Wed, Jun 12, 2013 at 7:55 PM, Jagan Teki jagannadh.t...@gmail.com
wrote:
Thanks for v6 sent.
Have you tested this?
on which board, include/configs/*.h file?
--
Thanks,
Jagan.
On Wed, Jun 12, 2013 at 6:17 PM, Armando Visconti
armando.visco...@st.com wrote:
This patch adds the support for the ARM PL022 SPI controller for the
standard
variant (0x00041022), which has a 16bit wide and 8 locations deep TX/RX
FIFO.
Signed-off-by: Armando Visconti armando.visco...@st.com
Signed-off-by: Vipin Kumar vipin.ku...@st.com
Acked-by: Stefan Roese s...@denx.de
---
v5-v6
1. Make use of spi_alloc_slave() macro.
2. Changed the identation on 'if statement' as requested
by Jagan.
drivers/spi/Makefile| 1 +
drivers/spi/pl022_spi.c | 308
2 files changed, 309 insertions(+)
create mode 100644 drivers/spi/pl022_spi.c
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index d08609e..b6443b1 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -47,6 +47,7 @@ COBJS-$(CONFIG_MXC_SPI) += mxc_spi.o
COBJS-$(CONFIG_MXS_SPI) += mxs_spi.o
COBJS-$(CONFIG_OC_TINY_SPI) += oc_tiny_spi.o
COBJS-$(CONFIG_OMAP3_SPI) += omap3_spi.o
+COBJS-$(CONFIG_PL022_SPI) += pl022_spi.o
COBJS-$(CONFIG_SOFT_SPI) += soft_spi.o
COBJS-$(CONFIG_SH_SPI) += sh_spi.o
COBJS-$(CONFIG_FSL_ESPI) += fsl_espi.o
diff --git a/drivers/spi/pl022_spi.c b/drivers/spi/pl022_spi.c
new file mode 100644
index 000..5b47413
--- /dev/null
+++ b/drivers/spi/pl022_spi.c
@@ -0,0 +1,308 @@
+/*
+ * (C) Copyright 2012
+ * Armando Visconti, ST Microelectronics, armando.visco...@st.com.
+ *
+ * Driver for ARM PL022 SPI Controller. Based on atmel_spi.c
+ * by Atmel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
Use latest SPDX-License-Identifier:
check for any existing one.
+
+#include common.h
+#include malloc.h
+#include spi.h
+#include asm/io.h
+#include asm/arch/hardware.h
+
+/* SSP registers mapping */
+struct pl022 {
Something like pl022_spi_regs
+ u32 ssp_cr0;/* 0x000 */
+ u32 ssp_cr1;/* 0x004 */
+ u32 ssp_dr; /* 0x008 */
+ u32 ssp_sr; /* 0x00c */
+ u32 ssp_cpsr; /* 0x010 */
+ u32 ssp_imsc; /* 0x014 */
+ u32 ssp_ris;/* 0x018 */
+ u32 ssp_mis;/* 0x01c */
+ u32 ssp_icr;/* 0x020 */
+ u32 ssp_dmacr; /* 0x024 */
+ u8 reserved_1[0x080 - 0x028];
+ u32 ssp_itcr; /* 0x080 */
+ u32 ssp_itip; /* 0x084 */
+ u32 ssp_itop; /* 0x088 */
+ u32 ssp_tdr;/* 0x08c */
+ u8 reserved_2[0xFE0 - 0x090];
+ u32 ssp_pid0; /* 0xfe0 */
+ u32 ssp_pid1; /* 0xfe4 */
+ u32 ssp_pid2; /* 0xfe8 */
+ u32 ssp_pid3; /* 0xfec */
+ u32 ssp_cid0; /* 0xff0 */
+ u32 ssp_cid1; /* 0xff4 */
+ u32 ssp_cid2; /* 0xff8 */
+ u32 ssp_cid3; /* 0xffc */
+};
+
-- TAG+
+/* SSP Control Register 0 - SSP_CR0 */
+#define SSP_CR0_SPO(0x1 6)
+#define SSP_CR0_SPH(0x1 7)
+#define SSP_CR0_8BIT_MODE (0x07)
+#define SSP_SCR_MAX(0xFF)
+#define SSP_SCR_SHFT 8
+
+/* SSP Control Register 0 - SSP_CR1 */
+#define SSP_CR1_MASK_SSE (0x1 1)
+
+#define SSP_CPSR_MAX (0xFE)
+
+/* SSP Status Register - SSP_SR */
+#define SSP_SR_MASK_TFE(0x1 0) /* Transmit FIFO
empty */
+#define SSP_SR_MASK_TNF(0x1 1) /* Transmit FIFO not
full */
+#define SSP_SR_MASK_RNE(0x1 2) /* Receive FIFO not
empty */
+#define SSP_SR_MASK_RFF
[U-Boot] [PATCH v4 00/29] zynq: More boards support
These changes are from u-boot-xlnx.git repo from git.xilinx.com and in addition of basic fdt support. This repo is well tested on xilinx zynq platform, hence pushing the same on upstream. Excluded qspi and nand changes from previous series. Please note that all this series available in u-boot-spi.git/master-xlnx repo. -- Thanks, Jagan. Changes for v4: - rebase to master - Removed CONFIG_SYS_NO_FLASH in zynq-common.h Changes for v3: - Removed CONFIG_ZYNQ_QSPI - Removed CONFIG_NAND_ZYNQ - Removed CONFIG_SYS_PROMPT_HUSH_PS2 - Documented bootmode detection code - Added comments Jagannadha Sutradharudu Teki (29): zynq: Enable CONFIG_FIT_VERBOSE zynq: Enable Boot FreeBSD/vxWorks zynq: Cleanup on miscellaneous configs zynq: Cleanup on memory configs zynq: Minor config cleanup zynq: Enable cache options zynq: Add UART0, UART1 configs support zynq: Add GEM0, GEM1 configs support zynq-common: Rename zynq with zynq-common doc: zynq: Add information on zynq u-boot zynq: Add zynq zc70x board support zynq: Add zynq zed board support zynq: Move CONFIG_SYS_SDRAM_SIZE to pre-board configs zynq-common: Define exact TEXT_BASE zynq: zc70x: Add Catalyst 24WC08 EEPROM config support zynq: Add zynq microzed board support zynq: Add zynq_zc770 xm010 board support zynq: Add zynq_zc770 xm013 board support zynq: Add zynq_zc770 xm012 board support zynq: Add support to find bootmode zynq-common: Define default environment zynq-common: Change Env. Sector size to 128Kb zynq-common: Define flash env. partition zynq-common: Define CONFIG_ENV_OVERWRITE dts: zynq: Add basic fdt support gpio: zynq: Add dummy gpio routines zynq-common: Enable verified boot(RSA) dts: zynq: Add more zynq dts files doc: Update the zynq u-boot status arch/arm/cpu/armv7/zynq/slcr.c | 6 + arch/arm/dts/zynq-7000.dtsi| 13 ++ arch/arm/include/asm/arch-zynq/gpio.h | 25 +++ arch/arm/include/asm/arch-zynq/sys_proto.h | 1 + board/xilinx/dts/zynq-microzed.dts | 14 ++ board/xilinx/dts/zynq-zc702.dts| 14 ++ board/xilinx/dts/zynq-zc706.dts| 14 ++ board/xilinx/dts/zynq-zc770-xm010.dts | 14 ++ board/xilinx/dts/zynq-zc770-xm012.dts | 14 ++ board/xilinx/dts/zynq-zc770-xm013.dts | 14 ++ board/xilinx/dts/zynq-zed.dts | 14 ++ board/xilinx/zynq/board.c | 25 +++ boards.cfg | 8 +- doc/README.zynq| 91 +++ include/configs/zynq-common.h | 238 + include/configs/zynq.h | 139 - include/configs/zynq_microzed.h| 25 +++ include/configs/zynq_zc70x.h | 28 include/configs/zynq_zc770.h | 39 + include/configs/zynq_zed.h | 26 20 files changed, 621 insertions(+), 141 deletions(-) create mode 100644 arch/arm/dts/zynq-7000.dtsi create mode 100644 arch/arm/include/asm/arch-zynq/gpio.h create mode 100644 board/xilinx/dts/zynq-microzed.dts create mode 100644 board/xilinx/dts/zynq-zc702.dts create mode 100644 board/xilinx/dts/zynq-zc706.dts create mode 100644 board/xilinx/dts/zynq-zc770-xm010.dts create mode 100644 board/xilinx/dts/zynq-zc770-xm012.dts create mode 100644 board/xilinx/dts/zynq-zc770-xm013.dts create mode 100644 board/xilinx/dts/zynq-zed.dts create mode 100644 doc/README.zynq create mode 100644 include/configs/zynq-common.h delete mode 100644 include/configs/zynq.h create mode 100644 include/configs/zynq_microzed.h create mode 100644 include/configs/zynq_zc70x.h create mode 100644 include/configs/zynq_zc770.h create mode 100644 include/configs/zynq_zed.h -- 1.8.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] Add code for spi half duplex operation for enc28j60
On Sat, Dec 21, 2013 at 12:40 AM, Jagan Teki jagannadh.t...@gmail.com wrote: On Fri, Oct 4, 2013 at 4:43 PM, Jagan Teki jagannadh.t...@gmail.com wrote: Hi Seems like some issues with checkpatch.pl and use proper commit msg header. Please fix and use u-boot-spi.git repo with master-probe branch. Please test the same on your hw and let me know for any issues. On Tue, Aug 13, 2013 at 8:15 AM, Asok Subramanian a...@vyassoft.com wrote: Add code for spi half duplex operation for enc28j60 The current code assumes full duplex spi operation. But there are processors like imx23 which only permit half duplex operation. This fix does half duplex operation based on the definition of CONFIG_SPI_HALF_DUPLEX Signed-off-by: Asok Subramanian asok at vyassoft.com --- drivers/net/enc28j60.c | 23 +++ 1 file changed, 23 insertions(+) diff --git a/drivers/net/enc28j60.c b/drivers/net/enc28j60.c index ec33764..753fe26 100644 --- a/drivers/net/enc28j60.c +++ b/drivers/net/enc28j60.c @@ -157,9 +157,17 @@ static u8 enc_r8(enc_dev_t *enc, const u16 reg) enc_set_bank(enc, reg); dout[0] = CMD_RCR(reg); +#ifndef CONFIG_SPI_HALF_DUPLEX spi_xfer(enc-slave, nbytes * 8, dout, din, SPI_XFER_BEGIN | SPI_XFER_END); return din[nbytes-1]; +#else +spi_xfer(enc-slave, (nbytes -1) * 8, dout, NULL, +SPI_XFER_BEGIN ); +spi_xfer(enc-slave, 8, NULL, din, +SPI_XFER_END ); +return din[0]; +#endif } /* @@ -175,6 +183,7 @@ static u16 enc_r16(enc_dev_t *enc, const u16 reg) enc_set_bank(enc, reg); dout[0] = CMD_RCR(reg); +#ifndef CONFIG_SPI_HALF_DUPLEX spi_xfer(enc-slave, nbytes * 8, dout, din, SPI_XFER_BEGIN | SPI_XFER_END); result = din[nbytes-1]; @@ -183,6 +192,20 @@ static u16 enc_r16(enc_dev_t *enc, const u16 reg) SPI_XFER_BEGIN | SPI_XFER_END); result |= din[nbytes-1] 8; return result; +#else +spi_xfer(enc-slave, (nbytes -1) * 8, dout, NULL, +SPI_XFER_BEGIN ); +spi_xfer(enc-slave, 8, NULL, din, +SPI_XFER_END ); +result = din[0]; +dout[0]++; /* next register */ +spi_xfer(enc-slave, (nbytes -1) * 8, dout, NULL, +SPI_XFER_BEGIN ); +spi_xfer(enc-slave, 8, NULL, din, +SPI_XFER_END ); +result |= din[0] 8; +return result; +#endif } /* -- Ping Ping.! -- Thanks, Jagan. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/5] edid: add function to convert edid to fb_videomode
CC to Anatolij as video custodian
On 08/01/2014 08:24, Christian Gmeiner wrote:
There may be some custom boards in the field which have
an seperate eeprom chip to store edid informations in it.
To make use of those edid information in the board code
this patch add a function to convert edid to fb_videomode.
Signed-off-by: Christian Gmeiner christian.gmei...@gmail.com
---
common/edid.c | 29 +
include/edid.h |3 +++
2 files changed, 32 insertions(+)
diff --git a/common/edid.c b/common/edid.c
index e66108f..8841c25 100644
--- a/common/edid.c
+++ b/common/edid.c
@@ -12,6 +12,7 @@
#include common.h
#include edid.h
+#include linux/fb.h
#include linux/ctype.h
#include linux/string.h
@@ -288,3 +289,31 @@ void edid_print_info(struct edid1_info *edid_info)
if (!have_timing)
printf(\tNone\n);
}
+
+void edid_to_fb_videomode(struct edid1_info *edid, struct fb_videomode *mode)
+{
+struct edid_monitor_descriptor *monitor =
edid-monitor_details.descriptor[0];
+unsigned char *bytes = (unsigned char *)monitor;
+struct edid_detailed_timing *timing = (struct edid_detailed_timing
*)monitor;
+
+uint32_t pixclock = EDID_DETAILED_TIMING_PIXEL_CLOCK(*timing);
+uint32_t h_blanking =
EDID_DETAILED_TIMING_HORIZONTAL_BLANKING(*timing);
+uint32_t h_active = EDID_DETAILED_TIMING_HORIZONTAL_ACTIVE(*timing);
+uint32_t h_sync_offset = EDID_DETAILED_TIMING_HSYNC_OFFSET(*timing);
+uint32_t h_sync_width =
EDID_DETAILED_TIMING_HSYNC_PULSE_WIDTH(*timing);
+uint32_t v_blanking =
EDID_DETAILED_TIMING_VERTICAL_BLANKING(*timing);
+uint32_t v_active = EDID_DETAILED_TIMING_VERTICAL_ACTIVE(*timing);
+uint32_t v_sync_offset = EDID_DETAILED_TIMING_VSYNC_OFFSET(*timing);
+uint32_t v_sync_width =
EDID_DETAILED_TIMING_VSYNC_PULSE_WIDTH(*timing);
+
+mode-name = EDID;
+mode-pixclock = pixclock;
+mode-yres = v_active;
+mode-xres = h_active;
+mode-left_margin = h_blanking - h_sync_offset - h_sync_width;
+mode-right_margin = h_sync_offset;
+mode-upper_margin = v_blanking - v_sync_offset - v_sync_width;
+mode-lower_margin = v_sync_offset;
+mode-hsync_len = h_sync_width;
+mode-vsync_len = v_sync_width;
+}
diff --git a/include/edid.h b/include/edid.h
index 480a773..4423062 100644
--- a/include/edid.h
+++ b/include/edid.h
@@ -233,6 +233,9 @@ struct edid1_info {
*/
void edid_print_info(struct edid1_info *edid_info);
+struct fb_videomode;
+void edid_to_fb_videomode(struct edid1_info *edid, struct fb_videomode
*mode);
+
/**
* Check the EDID info.
*
--
=
DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=
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Re: [U-Boot] [U-Boot,PATCHv3,1/5] am43xx: Add qspi support
On Mon, Jan 6, 2014 at 1:51 PM, Sourav Poddar sourav.pod...@ti.com wrote:
On Monday 06 January 2014 01:06 PM, Jagan Teki wrote:
Hi Sourav,
On Mon, Jan 6, 2014 at 12:10 PM, Sourav Poddarsourav.pod...@ti.com
wrote:
Hi Jagan,
On Saturday 21 December 2013 12:50 PM, Jagannadha Sutradharudu Teki
wrote:
From: Jagannadha Sutradharudu
Tekijagannadha.sutradharudu-t...@xilinx.com
From: Poddar, Souravsourav.pod...@ti.com
Add QSPI definitions and clock configuration support.
Signed-off-by: Sourav Poddarsourav.pod...@ti.com
Reviewed-by: Jagannadha Sutradharudu Tekijaga...@xilinx.com
---
V3: Added review tag
V2:
arch/arm/cpu/armv7/am33xx/clock_am43xx.c |1 +
arch/arm/include/asm/arch-am33xx/cpu.h |4 +++-
arch/arm/include/asm/arch-am33xx/omap.h |1 +
3 files changed, 5 insertions(+), 1 deletions(-)
diff --git a/arch/arm/cpu/armv7/am33xx/clock_am43xx.c
b/arch/arm/cpu/armv7/am33xx/clock_am43xx.c
index 97c00b4..fb654bb 100644
--- a/arch/arm/cpu/armv7/am33xx/clock_am43xx.c
+++ b/arch/arm/cpu/armv7/am33xx/clock_am43xx.c
@@ -98,6 +98,7 @@ void enable_basic_clocks(void)
cmper-emiffwclkctrl,
cmper-emifclkctrl,
cmper-otfaemifclkctrl,
+cmper-qspiclkctrl,
0
};
diff --git a/arch/arm/include/asm/arch-am33xx/cpu.h
b/arch/arm/include/asm/arch-am33xx/cpu.h
index 9febfa2..0736258 100644
--- a/arch/arm/include/asm/arch-am33xx/cpu.h
+++ b/arch/arm/include/asm/arch-am33xx/cpu.h
@@ -332,7 +332,9 @@ struct cm_perpll {
unsigned int mcasp1clkctrl; /* offset 0x240 */
unsigned int resv11;
unsigned int mmc2clkctrl; /* offset 0x248 */
- unsigned int resv12[5];
+ unsigned int resv12[3];
+ unsigned int qspiclkctrl; /* offset 0x258 */
+ unsigned int resv121;
unsigned int usb0clkctrl; /* offset 0x260 */
unsigned int resv13[103];
unsigned int l4lsclkstctrl; /* offset 0x400 */
diff --git a/arch/arm/include/asm/arch-am33xx/omap.h
b/arch/arm/include/asm/arch-am33xx/omap.h
index 7a7d91b..0855d16 100644
--- a/arch/arm/include/asm/arch-am33xx/omap.h
+++ b/arch/arm/include/asm/arch-am33xx/omap.h
@@ -29,5 +29,6 @@
#define SRAM_SCRATCH_SPACE_ADDR 0x40337C00
#define AM4372_BOARD_NAME_START SRAM_SCRATCH_SPACE_ADDR
#define AM4372_BOARD_NAME_END SRAM_SCRATCH_SPACE_ADDR + 0xC
+#define QSPI_BASE 0x4790
#endif
#endif
This looks Ok to me.
How you want this to go?
I mean as Tom suggested in some earlier version through his tree? or
yours?
Tom told in earlier that - he will take this series as there are some
conflicts w.r.t u-boot-ti
http://u-boot.10912.n7.nabble.com/UBOOT-PATCHv2-0-5-qspi-Add-AM437x-support-td170188.html
I sent this series again to fix one warning and added Reviewed-by tag.
Ok thanks,
Tom,
Can you pick this one?
fyi: I just marked these series to Tom as a delegate.
--
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Jagan.
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Re: [U-Boot] [PATCH 2/5] imx: mx6q_4x_mt41j128.cfg: enable ecspi3 clocks
Hi Christian, On 08/01/2014 08:24, Christian Gmeiner wrote: Signed-off-by: Christian Gmeiner christian.gmei...@gmail.com --- board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg b/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg index bb6c60b..b9e107a 100644 --- a/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg +++ b/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg @@ -144,7 +144,7 @@ DATA 4 0x021b0404 0x00011006 /* set the default clock gate to save power */ DATA 4 0x020c4068 0x00C03F3F -DATA 4 0x020c406c 0x0030FC03 +DATA 4 0x020c406c 0x0030FC33 DATA 4 0x020c4070 0x0FFFC000 DATA 4 0x020c4074 0x3FF0 DATA 4 0x020c4078 0x00FFF300 I do not think a good idea to enable the clock here. We have to set only the clocks that are required for U-Boot, letting the other ones off to save power. This is a common file, and then all boards using it will have the ecspi-3 clock turned on, even if they do not require it. Better is to set the clock inside the board file only for the boards (yours !) that need it, for example in board_early_init() Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/5] fdt: add fdt_add_display_timings(..)
Hi Christian,
On 08/01/2014 08:24, Christian Gmeiner wrote:
This new function is used to set all display-timings
properties based on fb_videomode.
display-timings {
timing0 {
clock-frequency = 2500;
hactive = 640;
vactive = 480;
hback-porch = 48;
hfront-porch = 16;
vback-porch = 31;
vfront-porch = 12;
hsync-len = 96;
vsync-len = 2;
};
};
Signed-off-by: Christian Gmeiner christian.gmei...@gmail.com
---
common/fdt_support.c | 23 +++
include/fdt_support.h |3 +++
2 files changed, 26 insertions(+)
diff --git a/common/fdt_support.c b/common/fdt_support.c
index 4e32b02..cf81a4b 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -11,6 +11,7 @@
#include stdio_dev.h
#include linux/ctype.h
#include linux/types.h
+#include linux/fb.h
#include asm/global_data.h
#include libfdt.h
#include fdt_support.h
@@ -1342,6 +1343,28 @@ err_size:
#endif
/*
+ * fdt_add_display_timings: add display-timings properties
+ *
+ * @fdt: ptr to device tree
+ * @noff: node to update
+ * @mode: ptr to b_videomode
+ */
+void fdt_add_display_timings(void *fdt, int noff, struct fb_videomode *mode)
+{
+ if (noff != -FDT_ERR_NOTFOUND) {
+ fdt_setprop_u32(fdt, noff, clock-frequency, mode-pixclock);
+ fdt_setprop_u32(fdt, noff, hactive, mode-xres);
+ fdt_setprop_u32(fdt, noff, vactive, mode-yres);
+ fdt_setprop_u32(fdt, noff, hback-porch, mode-left_margin);
+ fdt_setprop_u32(fdt, noff, hfront-porch, mode-right_margin);
+ fdt_setprop_u32(fdt, noff, vback-porch, mode-upper_margin);
+ fdt_setprop_u32(fdt, noff, vfront-porch, mode-lower_margin);
+ fdt_setprop_u32(fdt, noff, hsync-len, mode-hsync_len);
+ fdt_setprop_u32(fdt, noff, vsync-len, mode-vsync_len);
+ }
+}
+
+/*
* Verify the physical address of device tree node for a given alias
*
* This function locates the device tree node of a given alias, and then
diff --git a/include/fdt_support.h b/include/fdt_support.h
index 9871e2f..1c54880 100644
--- a/include/fdt_support.h
+++ b/include/fdt_support.h
@@ -82,6 +82,9 @@ int fdt_set_phandle(void *fdt, int nodeoffset, uint32_t
phandle);
unsigned int fdt_create_phandle(void *fdt, int nodeoffset);
int fdt_add_edid(void *blob, const char *compat, unsigned char *buf);
+struct fb_videomode;
+void fdt_add_display_timings(void *blob, int noff, struct fb_videomode
*mode);
+
int fdt_verify_alias_address(void *fdt, int anode, const char *alias,
u64 addr);
u64 fdt_get_base_address(void *fdt, int node);
Agree that we have to sync u-boot and kernel, and this can be a way in
the short term.
I am asking if this is in the long term the best way to do it. You are
converting EDID values to fb_videomode *mode, and then again to the
device node as required by DT.
We have already had some talks about moving U-Boot configuration to DT,
that is U-Boot can be also configured by a DT file (see for example
support for Nvidia processors, they already support DT in U-Boot).
Anatolji, what do you think as best solution we have to follow for
display setting ?
Best regards,
Stefano Babic
--
=
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Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
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Re: [U-Boot] [PATCH] Fix problems in chip select selection in imx23, 28 spi code
On Sat, Dec 21, 2013 at 12:42 AM, Jagan Teki jagannadh.t...@gmail.com wrote:
On Fri, Oct 4, 2013 at 4:06 PM, Jagan Teki jagannadh.t...@gmail.com wrote:
Hi,
Try to fix the above issues.
Use u-boot-spi.git repo with master-probe branch.
Please test the same on your hw and let me know for any issues.
On Tue, Aug 27, 2013 at 6:54 PM, Jagan Teki jagannadh.t...@gmail.com wrote:
On Tue, Aug 27, 2013 at 2:40 PM, Jagan Teki jagannadh.t...@gmail.com
wrote:
Hi,
On Tue, Aug 27, 2013 at 4:11 AM, Asok Subramanian a...@vyassoft.com
wrote:
Fix problems in chip select selection in imx23,28 spi code
The spi function code for imx23,28 currently does not work for chip select
other than 0.
This is because the register HW_SSP_CTRL0 is first reset and the code
does
not load the CS bits
again into HW_SSP_CTRL0 after the reset. The proposed fix reloads the CS
bits after the reset.
Signed-off-by: Asok Subramanian asok at vyassoft.com
---
drivers/spi/mxs_spi.c |4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/spi/mxs_spi.c b/drivers/spi/mxs_spi.c
index 3cf7142..15681dc 100644
--- a/drivers/spi/mxs_spi.c
+++ b/drivers/spi/mxs_spi.c
@@ -32,6 +32,7 @@ struct mxs_spi_slave {
uint32_tmax_khz;
uint32_tmode;
struct mxs_ssp_regs*regs;
+unsigned intcs;
};
static inline struct mxs_spi_slave *to_mxs_slave(struct spi_slave *slave)
@@ -74,6 +75,7 @@ struct spi_slave *spi_setup_slave(unsigned int bus,
unsigned int cs,
mxs_slave-max_khz = max_hz / 1000;
mxs_slave-mode = mode;
mxs_slave-regs = mxs_ssp_regs_by_bus(bus);
+mxs_slave-cs = cs;
ssp_regs = mxs_slave-regs;
reg = readl(ssp_regs-hw_ssp_ctrl0);
@@ -102,7 +104,7 @@ int spi_claim_bus(struct spi_slave *slave)
mxs_reset_block(ssp_regs-hw_ssp_ctrl0_reg);
-writel(SSP_CTRL0_BUS_WIDTH_ONE_BIT, ssp_regs-hw_ssp_ctrl0);
+writel(SSP_CTRL0_BUS_WIDTH_ONE_BIT | (mxs_slave-cs)
MXS_SSP_CHIPSELECT_SHIFT, ssp_regs-hw_ssp_ctrl0);
reg = SSP_CTRL1_SSP_MODE_SPI | SSP_CTRL1_WORD_LENGTH_EIGHT_BITS;
reg |= (mxs_slave-mode SPI_CPOL) ? SSP_CTRL1_POLARITY : 0;
--
1.7.9.5
Please use the proper commit head.
Fix problems in chip select selection in imx23,28 spi code
spi: mxs_spi: EDIT THE TEXT
And also please fix the check-patch errors:
ERROR: Unrecognized email address: 'Asok Subramanian asok at vyassoft.com'
#18:
Signed-off-by: Asok Subramanian asok at vyassoft.com
ERROR: patch seems to be corrupt (line wrapped?)
#29: FILE: drivers/spi/mxs_spi.c:31:
uint32_tmax_khz;
WARNING: line over 80 characters
#49: FILE: drivers/spi/mxs_spi.c:104:
+writel(SSP_CTRL0_BUS_WIDTH_ONE_BIT | (mxs_slave-cs)
MXS_SSP_CHIPSELECT_SHIFT, ssp_regs-hw_ssp_ctrl0);
total: 2 errors, 1 warnings, 22 lines checked
Ping.
Ping.!
--
Thanks,
Jagan.
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Re: [U-Boot] [PATCH 5/5] imx6: make use of lldiv(..)
Hi Christian, On 08/01/2014 08:24, Christian Gmeiner wrote: Commit 762a88ccf8540948fbf8c31b40a29d1e0684a25b introduces a 64-bit division without using the lldiv() function, which pulls in previously unused libgcc stuff. Signed-off-by: Måns Rullgård m...@mansr.com Signed-off-by: Christian Gmeiner christian.gmei...@gmail.com --- arch/arm/cpu/armv7/mx6/clock.c |3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c index 873d9d0..4eeb09b 100644 --- a/arch/arm/cpu/armv7/mx6/clock.c +++ b/arch/arm/cpu/armv7/mx6/clock.c @@ -5,6 +5,7 @@ */ #include common.h +#include div64.h #include asm/io.h #include asm/errno.h #include asm/arch/imx-regs.h @@ -123,7 +124,7 @@ static u32 mxc_get_pll_pfd(enum pll_clocks pll, int pfd_num) return 0; } - return (freq * 18) / ((div ANATOP_PFD_FRAC_MASK(pfd_num)) + return lldiv(freq * 18, (div ANATOP_PFD_FRAC_MASK(pfd_num)) ANATOP_PFD_FRAC_SHIFT(pfd_num)); } Thanks to repost this patch. I will apply it for the current release. Acked-by: Stefano Babic sba...@denx.de Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 2/3] boards.cfg: Place - in the 8th field if it is the same as 7th
Hello Masahiro, On Tue, Jan 7, 2014 at 11:38 PM, Masahiro Yamada yamad...@jp.panasonic.comwrote: The 8th field of boards.cfg takes the form: board config name[:comma separated config options] We should describe explicitely the 8th field only when it is necessary to do so. Specify - in the 8th field if it is the same as 7th field. Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com For mx23evk: Acked-by: Otavio Salvador ota...@ossystems.com.br -- Otavio Salvador O.S. Systems http://www.ossystems.com.brhttp://code.ossystems.com.br Mobile: +55 (53) 9981-7854Mobile: +1 (347) 903-9750 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] avr32: delete unused header files
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
---
arch/avr32/cpu/pio2.h | 44 --
arch/avr32/include/asm/arch-at32ap700x/gpio-impl.h | 86 ---
arch/avr32/include/asm/arch-common/portmux-gpio.h | 98 --
3 files changed, 228 deletions(-)
delete mode 100644 arch/avr32/cpu/pio2.h
delete mode 100644 arch/avr32/include/asm/arch-at32ap700x/gpio-impl.h
delete mode 100644 arch/avr32/include/asm/arch-common/portmux-gpio.h
diff --git a/arch/avr32/cpu/pio2.h b/arch/avr32/cpu/pio2.h
deleted file mode 100644
index 9719ea8..000
--- a/arch/avr32/cpu/pio2.h
+++ /dev/null
@@ -1,44 +0,0 @@
-/*
- * Register definitions for Parallel Input/Output Controller
- */
-#ifndef __CPU_AT32AP_PIO2_H__
-#define __CPU_AT32AP_PIO2_H__
-
-/* PIO2 register offsets */
-#define PIO2_PER 0x
-#define PIO2_PDR 0x0004
-#define PIO2_PSR 0x0008
-#define PIO2_OER 0x0010
-#define PIO2_ODR 0x0014
-#define PIO2_OSR 0x0018
-#define PIO2_IFER 0x0020
-#define PIO2_IFDR 0x0024
-#define PIO2_ISFR 0x0028
-#define PIO2_SODR 0x0030
-#define PIO2_CODR 0x0034
-#define PIO2_ODSR 0x0038
-#define PIO2_PDSR 0x003c
-#define PIO2_IER 0x0040
-#define PIO2_IDR 0x0044
-#define PIO2_IMR 0x0048
-#define PIO2_ISR 0x004c
-#define PIO2_MDER 0x0050
-#define PIO2_MDDR 0x0054
-#define PIO2_MDSR 0x0058
-#define PIO2_PUDR 0x0060
-#define PIO2_PUER 0x0064
-#define PIO2_PUSR 0x0068
-#define PIO2_ASR 0x0070
-#define PIO2_BSR 0x0074
-#define PIO2_ABSR 0x0078
-#define PIO2_OWER 0x00a0
-#define PIO2_OWDR 0x00a4
-#define PIO2_OWSR 0x00a8
-
-/* Register access macros */
-#define pio2_readl(base,reg) \
- readl((void *)base + PIO2_##reg)
-#define pio2_writel(base,reg,value)\
- writel((value), (void *)base + PIO2_##reg)
-
-#endif /* __CPU_AT32AP_PIO2_H__ */
diff --git a/arch/avr32/include/asm/arch-at32ap700x/gpio-impl.h
b/arch/avr32/include/asm/arch-at32ap700x/gpio-impl.h
deleted file mode 100644
index 8801bd0..000
--- a/arch/avr32/include/asm/arch-at32ap700x/gpio-impl.h
+++ /dev/null
@@ -1,86 +0,0 @@
-#ifndef __ASM_AVR32_ARCH_GPIO_IMPL_H__
-#define __ASM_AVR32_ARCH_GPIO_IMPL_H__
-
-/* Register offsets */
-struct gpio_regs {
- u32 GPER;
- u32 GPERS;
- u32 GPERC;
- u32 GPERT;
- u32 PMR0;
- u32 PMR0S;
- u32 PMR0C;
- u32 PMR0T;
- u32 PMR1;
- u32 PMR1S;
- u32 PMR1C;
- u32 PMR1T;
- u32 __reserved0[4];
- u32 ODER;
- u32 ODERS;
- u32 ODERC;
- u32 ODERT;
- u32 OVR;
- u32 OVRS;
- u32 OVRC;
- u32 OVRT;
- u32 PVR;
- u32 __reserved_PVRS;
- u32 __reserved_PVRC;
- u32 __reserved_PVRT;
- u32 PUER;
- u32 PUERS;
- u32 PUERC;
- u32 PUERT;
- u32 PDER;
- u32 PDERS;
- u32 PDERC;
- u32 PDERT;
- u32 IER;
- u32 IERS;
- u32 IERC;
- u32 IERT;
- u32 IMR0;
- u32 IMR0S;
- u32 IMR0C;
- u32 IMR0T;
- u32 IMR1;
- u32 IMR1S;
- u32 IMR1C;
- u32 IMR1T;
- u32 GFER;
- u32 GFERS;
- u32 GFERC;
- u32 GFERT;
- u32 IFR;
- u32 __reserved_IFRS;
- u32 IFRC;
- u32 __reserved_IFRT;
- u32 ODMER;
- u32 ODMERS;
- u32 ODMERC;
- u32 ODMERT;
- u32 __reserved1[4];
- u32 ODCR0;
- u32 ODCR0S;
- u32 ODCR0C;
- u32 ODCR0T;
- u32 ODCR1;
- u32 ODCR1S;
- u32 ODCR1C;
- u32 ODCR1T;
- u32 __reserved2[4];
- u32 OSRR0;
- u32 OSRR0S;
- u32 OSRR0C;
- u32 OSRR0T;
- u32 __reserved3[8];
- u32 STER;
- u32 STERS;
- u32 STERC;
- u32 STERT;
- u32 __reserved4[35];
- u32 VERSION;
-};
-
-#endif /*
[U-Boot] [PATCH] blackfin: delete unused header files
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
---
.../include/asm/mach-common/bits/lockbox.h | 62 ---
arch/blackfin/include/asm/mach-common/bits/sport.h | 89 --
2 files changed, 151 deletions(-)
delete mode 100644 arch/blackfin/include/asm/mach-common/bits/lockbox.h
delete mode 100644 arch/blackfin/include/asm/mach-common/bits/sport.h
diff --git a/arch/blackfin/include/asm/mach-common/bits/lockbox.h
b/arch/blackfin/include/asm/mach-common/bits/lockbox.h
deleted file mode 100644
index 17d22ab..000
--- a/arch/blackfin/include/asm/mach-common/bits/lockbox.h
+++ /dev/null
@@ -1,62 +0,0 @@
-/*
- * Lockbox/Security Masks
- */
-
-#ifndef __BFIN_PERIPHERAL_LOCKBOX__
-#define __BFIN_PERIPHERAL_LOCKBOX__
-
-#ifndef __ASSEMBLY__
-
-#include bootrom.h
-
-/* SESR argument structure. Expected to reside at 0xFF900018. */
-typedef struct SESR_args {
- unsigned short usFlags;/* security firmware flags
*/
- unsigned short usIRQMask; /* interrupt mask
*/
- unsigned long ulMessageSize; /* message length in bytes
*/
- unsigned long ulSFEntryPoint; /* entry point of secure function
*/
- unsigned long ulMessagePtr; /* pointer to the buffer containing
- the digital signature and
message */
- unsigned long ulReserved1;/* reserved
*/
- unsigned long ulReserved2;/* reserved
*/
-} tSESR_args;
-
-/* Secure Entry Service Routine */
-static void (* const sesr)(void) = (void *)_BOOTROM_SESR;
-
-#endif
-
-/* SESR flags argument bitfields */
-#define SESR_FLAGS_STAY_AT_NMI 0x
-#define SESR_FLAGS_DROP_BELOW_NMI 0x0001
-#define SESR_FLAGS_NO_SF_DMA0x
-#define SESR_FLAGS_DMA_SF_TO_RUN_DEST 0x0002
-#define SESR_FLAGS_USE_ADI_PUB_KEY 0x
-#define SESR_FLAGS_USE_CUST_PUB_KEY 0x0100
-
-/* Bit masks for SECURE_SYSSWT */
-#define EMUDABL0x0001/* Emulation Disable */
-#define RSTDABL0x0002/* Reset Disable */
-#define L1IDABL0x001c/* L1 Instruction Memory Disable
*/
-#define L1DADABL 0x00e0/* L1 Data Bank A Memory Disable
*/
-#define L1DBDABL 0x0700/* L1 Data Bank B Memory Disable
*/
-#define DMA0OVR0x0800/* DMA0 Memory Access Override */
-#define DMA1OVR0x1000/* DMA1 Memory Access Override */
-#define EMUOVR 0x4000/* Emulation Override */
-#define OTPSEN 0x8000/* OTP Secrets Enable */
-#define L2DABL 0x0007/* L2 Memory Disable */
-
-/* Bit masks for SECURE_CONTROL */
-#define SECURE00x0001/* SECURE 0 */
-#define SECURE10x0002/* SECURE 1 */
-#define SECURE20x0004/* SECURE 2 */
-#define SECURE30x0008/* SECURE 3 */
-
-/* Bit masks for SECURE_STATUS */
-#define SECMODE0x0003/* Secured Mode Control State */
-#define NMI0x0004/* Non Maskable Interrupt */
-#define AFVALID0x0008/* Authentication Firmware Valid
*/
-#define AFEXIT 0x0010/* Authentication Firmware Exit */
-#define SECSTAT0x00e0/* Secure Status */
-
-#endif
diff --git a/arch/blackfin/include/asm/mach-common/bits/sport.h
b/arch/blackfin/include/asm/mach-common/bits/sport.h
deleted file mode 100644
index 88e7a5d..000
--- a/arch/blackfin/include/asm/mach-common/bits/sport.h
+++ /dev/null
@@ -1,89 +0,0 @@
-/*
- * SPORT Masks
- */
-
-#ifndef __BFIN_PERIPHERAL_SPORT__
-#define __BFIN_PERIPHERAL_SPORT__
-
-/* SPORTx_TCR1 Masks */
-#define TSPEN 0x0001 /* TX enable */
-#define ITCLK 0x0002 /* Internal TX Clock Select */
-#define TDTYPE 0x000C /* TX Data Formatting Select */
-#define DTYPE_NORM 0x0004 /* Data Format Normal */
-#define DTYPE_ULAW 0x0008 /* Compand Using u-Law */
-#define DTYPE_ALAW 0x000C /* Compand Using A-Law */
-#define TLSBIT 0x0010 /* TX Bit Order */
-#define ITFS 0x0200 /* Internal TX Frame Sync Select */
-#define TFSR 0x0400 /* TX Frame Sync Required Select */
-#define DITFS 0x0800 /* Data Independent TX Frame Sync
Select */
-#define LTFS 0x1000 /* Low TX Frame Sync Select */
-#define LATFS 0x2000 /* Late TX Frame Sync Select */
-#define TCKFE 0x4000 /* TX Clock Falling Edge Select */
-
-/* SPORTx_TCR2 Masks */
-#define SLEN 0x001F /* TX Word Length */
-#define TXSE 0x0100 /* TX
[U-Boot] [PATCH] x86: delete unused header files
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
---
arch/x86/include/asm/mtrr.h | 193
1 file changed, 193 deletions(-)
delete mode 100644 arch/x86/include/asm/mtrr.h
diff --git a/arch/x86/include/asm/mtrr.h b/arch/x86/include/asm/mtrr.h
deleted file mode 100644
index fac2e58..000
--- a/arch/x86/include/asm/mtrr.h
+++ /dev/null
@@ -1,193 +0,0 @@
-/*
- * Generic MTRR (Memory Type Range Register) ioctls.
- * Taken from the Linux kernel
- *
- * (C) Copyright 2012
- * Graeme Russ, graeme.r...@gmail.com
- *
- * Copyright (C) 1997-1999 Richard Gooch rgo...@atnf.csiro.au
- *
- * SPDX-License-Identifier:GPL-2.0+
- */
-
-#ifndef _ASM_X86_MTRR_H
-#define _ASM_X86_MTRR_H
-
-#define MTRRphysBase_MSR(reg) (0x200 + 2 * (reg))
-#define MTRRphysMask_MSR(reg) (0x200 + 2 * (reg) + 1)
-
-#ifndef __ASSEMBLY__
-
-#include linux/types.h
-#include linux/ioctl.h
-#include errno.h
-
-#defineMTRR_IOCTL_BASE 'M'
-
-struct mtrr_sentry {
- unsigned long base; /* Base address */
- unsigned int size; /* Size of region */
- unsigned int type; /* Type of region */
-};
-
-/*
- * Warning: this structure has a different order from i386
- * on x86-64. The 32bit emulation code takes care of that.
- * But you need to use this for 64bit, otherwise your X server
- * will break.
- */
-
-#ifdef __i386__
-struct mtrr_gentry {
- unsigned int regnum;/* Register number */
- unsigned long base; /* Base address */
- unsigned int size; /* Size of region */
- unsigned int type; /* Type of region */
-};
-
-#else /* __i386__ */
-
-struct mtrr_gentry {
- unsigned long base; /* Base address */
- unsigned int size; /* Size of region */
- unsigned int regnum;/* Register number */
- unsigned int type; /* Type of region */
-};
-#endif /* !__i386__ */
-
-struct mtrr_var_range {
- __u32 base_lo;
- __u32 base_hi;
- __u32 mask_lo;
- __u32 mask_hi;
-};
-
-/*
- * In the Intel processor's MTRR interface, the MTRR type is always held in
- * an 8 bit field:
- */
-typedef __u8 mtrr_type;
-
-#define MTRR_NUM_FIXED_RANGES 88
-#define MTRR_MAX_VAR_RANGES 256
-
-struct mtrr_state_type {
- struct mtrr_var_range var_ranges[MTRR_MAX_VAR_RANGES];
- mtrr_type fixed_ranges[MTRR_NUM_FIXED_RANGES];
- unsigned char enabled;
- unsigned char have_fixed;
- mtrr_type def_type;
-};
-
-/* These are the various ioctls */
-#define MTRRIOC_ADD_ENTRY_IOW(MTRR_IOCTL_BASE, 0, struct mtrr_sentry)
-#define MTRRIOC_SET_ENTRY_IOW(MTRR_IOCTL_BASE, 1, struct mtrr_sentry)
-#define MTRRIOC_DEL_ENTRY_IOW(MTRR_IOCTL_BASE, 2, struct mtrr_sentry)
-#define MTRRIOC_GET_ENTRY_IOWR(MTRR_IOCTL_BASE, 3, struct mtrr_gentry)
-#define MTRRIOC_KILL_ENTRY _IOW(MTRR_IOCTL_BASE, 4, struct mtrr_sentry)
-#define MTRRIOC_ADD_PAGE_ENTRY _IOW(MTRR_IOCTL_BASE, 5, struct mtrr_sentry)
-#define MTRRIOC_SET_PAGE_ENTRY _IOW(MTRR_IOCTL_BASE, 6, struct mtrr_sentry)
-#define MTRRIOC_DEL_PAGE_ENTRY _IOW(MTRR_IOCTL_BASE, 7, struct mtrr_sentry)
-#define MTRRIOC_GET_PAGE_ENTRY _IOWR(MTRR_IOCTL_BASE, 8, struct mtrr_gentry)
-#define MTRRIOC_KILL_PAGE_ENTRY _IOW(MTRR_IOCTL_BASE, 9, struct mtrr_sentry)
-
-/* These are the region types */
-#define MTRR_TYPE_UNCACHABLE 0
-#define MTRR_TYPE_WRCOMB 1
-/*#define MTRR_TYPE_ 2*/
-/*#define MTRR_TYPE_ 3*/
-#define MTRR_TYPE_WRTHROUGH 4
-#define MTRR_TYPE_WRPROT 5
-#define MTRR_TYPE_WRBACK 6
-#define MTRR_NUM_TYPES 7
-
-#ifdef __KERNEL__
-
-/* The following functions are for use by other drivers */
-# ifdef CONFIG_MTRR
-extern u8 mtrr_type_lookup(u64 addr, u64 end);
-extern void mtrr_save_fixed_ranges(void *);
-extern void mtrr_save_state(void);
-extern int mtrr_add(unsigned long base, unsigned long size,
- unsigned int type, bool increment);
-extern int mtrr_add_page(unsigned long base, unsigned long size,
-unsigned int type, bool increment);
-extern int mtrr_del(int reg, unsigned long base, unsigned long size);
-extern int mtrr_del_page(int reg, unsigned long base, unsigned long size);
-extern void mtrr_centaur_report_mcr(int mcr, u32 lo, u32 hi);
-extern void mtrr_ap_init(void);
-extern void mtrr_bp_init(void);
-extern void set_mtrr_aps_delayed_init(void);
-extern void mtrr_aps_init(void);
-extern void mtrr_bp_restore(void);
-extern int mtrr_trim_uncached_memory(unsigned long end_pfn);
-extern int amd_special_default_mtrr(void);
-# else
-static inline u8 mtrr_type_lookup(u64 addr, u64 end)
-{
- /*
-* Return no-MTRRs:
-*/
- return 0xff;
-}
-#define mtrr_save_fixed_ranges(arg) do {} while (0)
-#define mtrr_save_state() do {} while (0)
-static inline int mtrr_del(int reg, unsigned long base, unsigned long size)
-{
- return -ENODEV;
-}
-static inline int
[U-Boot] [PATCH] powerpc: delete unused header files
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
---
arch/powerpc/cpu/mpc824x/drivers/i2c_export.h | 103 -
arch/powerpc/cpu/mpc8260/speed.h | 38 --
arch/powerpc/include/asm/iopin_85xx.h | 146 --
arch/powerpc/include/asm/pnp.h| 643 --
arch/powerpc/include/asm/residual.h | 331 -
5 files changed, 1261 deletions(-)
delete mode 100644 arch/powerpc/cpu/mpc824x/drivers/i2c_export.h
delete mode 100644 arch/powerpc/cpu/mpc8260/speed.h
delete mode 100644 arch/powerpc/include/asm/iopin_85xx.h
delete mode 100644 arch/powerpc/include/asm/pnp.h
delete mode 100644 arch/powerpc/include/asm/residual.h
diff --git a/arch/powerpc/cpu/mpc824x/drivers/i2c_export.h
b/arch/powerpc/cpu/mpc824x/drivers/i2c_export.h
deleted file mode 100644
index 6264d18..000
--- a/arch/powerpc/cpu/mpc824x/drivers/i2c_export.h
+++ /dev/null
@@ -1,103 +0,0 @@
-#ifndef I2C_EXPORT_H
-#define I2C_EXPORT_H
-
-/
- *
- * Copyright Motrola 1999
- *
- /
-
-/* These are the defined return values for the I2C_do_transaction function.
- * Any non-zero value indicates failure. Failure modes can be added for
- * more detailed error reporting.
- */
-typedef enum _i2c_status
-{
- I2C_SUCCESS = 0,
- I2C_ERROR,
-} I2C_Status;
-
-/* These are the defined tasks for I2C_do_transaction.
- * Modes for SLAVE_RCV and SLAVE_XMIT will be added.
- */
-typedef enum _i2c_transaction_mode
-{
- I2C_MASTER_RCV = 0,
- I2C_MASTER_XMIT = 1,
-} I2C_TRANSACTION_MODE;
-
-typedef enum _i2c_interrupt_mode
-{
- I2C_INT_DISABLE = 0,
- I2C_INT_ENABLE = 1,
-} I2C_INTERRUPT_MODE;
-
-typedef enum _i2c_stop
-{
- I2C_NO_STOP = 0,
- I2C_STOP = 1,
-} I2C_STOP_MODE;
-
-typedef enum _i2c_restart
-{
- I2C_NO_RESTART = 0,
- I2C_RESTART = 1,
-} I2C_RESTART_MODE;
-
-/ App. API
- * The application API is for user level application
- * to use the functionality provided by I2C driver.
- * This is a generic I2C interface, it should contain
- * nothing specific to the Kahlua implementation.
- * Only the generic functions are exported by the library.
- *
- * Note: Its App.s responsibility to swap the data
- * byte. In our API, we just transfer whatever
- * we are given
- **/
-
-
-/* Initialize I2C unit with the following:
- * driver's slave address
- * interrupt enabled
- * optional pointer to application layer print function
- *
- * These parameters may be added:
- * desired clock rate
- * digital filter frequency sampling rate
- *
- * This function must be called before I2C unit can be used.
- */
-extern I2C_Status I2C_Initialize(
- unsigned char addr,/* driver's I2C slave address */
- I2C_INTERRUPT_MODE en_int, /* 1 - enable I2C interrupt
- * 0 - disable I2C interrupt
- */
- int (*app_print_function)(char *,...)); /* pointer to optional printf
-* provided by application
-*/
-
-/* Perform the given I2C transaction, only MASTER_XMIT and MASTER_RCV
- * are implemented. Both are only in polling mode.
- *
- * en_int controls interrupt/polling mode
- * act is the type of transaction
- * addr is the I2C address of the slave device
- * len is the length of data to send or receive
- * buffer is the address of the data buffer
- * stop = I2C_NO_STOP, don't signal STOP at end of transaction
- *I2C_STOP, signal STOP at end of transaction
- * retry is the timeout retry value, currently ignored
- * rsta = I2C_NO_RESTART, this is not continuation of existing transaction
- *I2C_RESTART, this is a continuation of existing transaction
- */
-extern I2C_Status I2C_do_transaction( I2C_INTERRUPT_MODE en_int,
- I2C_TRANSACTION_MODE act,
- unsigned char i2c_addr,
- unsigned char data_addr,
- int len,
- char *buffer,
- I2C_STOP_MODE stop,
- int retry,
- I2C_RESTART_MODE rsta);
-#endif
diff --git a/arch/powerpc/cpu/mpc8260/speed.h b/arch/powerpc/cpu/mpc8260/speed.h
deleted file mode 100644
index f1b10bf..000
--- a/arch/powerpc/cpu/mpc8260/speed.h
+++ /dev/null
@@ -1,38 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, w...@denx.de.
- *
- * SPDX-License-Identifier:GPL-2.0+
- */
-
-/*---
- * Timer value for timer 2, ICLK = 10
- *
- * SPEED_FCOUNT2 =
[U-Boot] [PATCH] board: delete unused header files
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com --- board/cogent/kbm.h | 79 - board/cray/L1/L1.h | 28 -- board/esd/common/s1d13806_640_480_8bpp.h | 120 - board/etin/debris/speed.h| 38 board/genietv/genietv.h | 25 -- board/hidden_dragon/speed.h | 38 board/inka4x0/hyb25d512160bf-5.h | 16 board/prodrive/p3mx/ppc_error_no.h | 148 --- board/sandpoint/speed.h | 38 9 files changed, 530 deletions(-) delete mode 100644 board/cogent/kbm.h delete mode 100644 board/cray/L1/L1.h delete mode 100644 board/esd/common/s1d13806_640_480_8bpp.h delete mode 100644 board/etin/debris/speed.h delete mode 100644 board/genietv/genietv.h delete mode 100644 board/hidden_dragon/speed.h delete mode 100644 board/inka4x0/hyb25d512160bf-5.h delete mode 100644 board/prodrive/p3mx/ppc_error_no.h delete mode 100644 board/sandpoint/speed.h diff --git a/board/cogent/kbm.h b/board/cogent/kbm.h deleted file mode 100644 index 7eb419c..000 --- a/board/cogent/kbm.h +++ /dev/null @@ -1,79 +0,0 @@ -/* keyboard/mouse not implemented yet */ - -extern int cma_kbm_not_implemented; - -/ DEFINES for H8542B Keyboard/Mouse Controller ***/ - -/* - * note the auxillary port is used to control the mouse - */ - -/* 8542B Commands (Sent to the Command Port) */ -#define HT8542_CMD_SET_BYTE0x60/* Set the command byte */ -#define HT8542_CMD_GET_BYTE0x20/* Get the command byte */ -#define HT8542_CMD_KBD_OBUFF 0xD2/* Write to HT8542 Kbd Output Buffer */ -#define HT8542_CMD_AUX_OBUFF 0xD3/* Write to HT8542 Mse Output Buffer */ -#define HT8542_CMD_AUX_WRITE 0xD4/* Write to Mouse Port */ -#define HT8542_CMD_AUX_OFF 0xA7/* Disable Mouse Port */ -#define HT8542_CMD_AUX_ON 0xA8/* Re-Enable Mouse Port */ -#define HT8542_CMD_AUX_TEST0xA9/* Test for the presence of a Mouse */ -#define HT8542_CMD_DIAG0xAA/* Start Diagnostics */ -#define HT8542_CMD_KBD_TEST0xAB/* Test for presence of a keyboard */ -#define HT8542_CMD_KBD_OFF 0xAD/* Disable Kbd Port (use KBD_DAT_ON) */ -#define HT8542_CMD_KBD_ON 0xAE/* Enable Kbd Port (use KBD_DAT_OFF) */ - -/* HT8542B cmd byte set by KBD_CMD_SET_BYTE and retrieved by KBD_CMD_GET_BYTE */ -#define HT8542_CMD_BYTE_TRANS 0x40 -#define HT8542_CMD_BYTE_AUX_OFF0x20/* 1 = mse port disabled, 0 = enabled */ -#define HT8542_CMD_BYTE_KBD_OFF0x10/* 1 = kbd port disabled, 0 = enabled */ -#define HT8542_CMD_BYTE_OVER 0x08/* 1 = override keyboard lock */ -#define HT8542_CMD_BYTE_RES0x04/* reserved */ -#define HT8542_CMD_BYTE_AUX_INT0x02/* 1 = enable mouse interrupt */ -#define HT8542_CMD_BYTE_KBD_INT0x01/* 1 = enable keyboard interrupt */ - -/* Keyboard Commands (Sent to the Data Port) */ -#define KBD_CMD_LED0xED/* Set Keyboard LEDS with next byte */ -#define KBD_CMD_ECHO 0xEE/* Echo - we get 0xFA, 0xEE back */ -#define KBD_CMD_MODE 0xF0/* set scan code mode with next byte */ -#define KBD_CMD_ID 0xF2/* get keyboard/mouse ID */ -#define KBD_CMD_RPT0xF3/* Set Repeat Rate and Delay 2nd Byte */ -#define KBD_CMD_ON 0xF4/* Enable keyboard */ -#define KBD_CMD_OFF0xF5/* Disables Scanning, Resets to Def */ -#define KBD_CMD_DEF0xF6/* Reverts kbd to default settings */ -#define KBD_CMD_RST0xFF/* Reset - should get 0xFA, 0xAA back */ - -/* Set LED second bit defines */ -#define KBD_CMD_LED_SCROLL 0x01/* Set SCROLL LOCK LED on */ -#define KBD_CMD_LED_NUM0x02/* Set NUM LOCK LED on */ -#define KBD_CMD_LED_CAPS 0x04/* Set CAPS LOCK LED on */ - -/* Set Mode second byte defines */ -#define KBD_CMD_MODE_STAT 0x00/* get current scan code mode */ -#define KBD_CMD_MODE_SCAN1 0x01/* set mode to scan code 1 */ -#define KBD_CMD_MODE_SCAN2 0x02/* set mode to scan code 2 */ -#define KBD_CMD_MODE_SCAN3 0x03/* set mode to scan code 3 */ - -/* Keyboard/Mouse ID Codes */ -#define KBD_CMD_ID_1ST 0xAB/* 1st byte is 0xAB, 2nd is actual ID */ -#define KBD_CMD_ID_KBD 0x83/* Keyboard */ -#define KBD_CMD_ID_MOUSE 0x00/* Mouse */ - -/* Keyboard Data Return Defines */ -#define KBD_STAT_OVER 0x00/* Buffer Overrun */ -#define KBD_STAT_DIAG_OK 0x55/* Internal Self Test OK */ -#define KBD_STAT_RST_OK0xAA/* Reset Complete */ -#define KBD_STAT_ECHO 0xEE/* Echo Command Return */ -#define KBD_STAT_BRK 0xF0/* Prefix for Break Key Code */ -#define KBD_STAT_ACK 0xFA/* Received after all commands */ -#define KBD_STAT_DIAG_FAIL
[U-Boot] [PATCH] drivers: delete unused header files
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com --- drivers/bios_emulator/include/x86emu/prim_asm.h | 970 drivers/mmc/pxa_mmc.h | 138 drivers/net/nicext.h| 109 --- 3 files changed, 1217 deletions(-) delete mode 100644 drivers/bios_emulator/include/x86emu/prim_asm.h delete mode 100644 drivers/mmc/pxa_mmc.h delete mode 100644 drivers/net/nicext.h diff --git a/drivers/bios_emulator/include/x86emu/prim_asm.h b/drivers/bios_emulator/include/x86emu/prim_asm.h deleted file mode 100644 index 4cb4cab..000 --- a/drivers/bios_emulator/include/x86emu/prim_asm.h +++ /dev/null @@ -1,970 +0,0 @@ -/ -* -* Realmode X86 Emulator Library -* -* Copyright (C) 1991-2004 SciTech Software, Inc. -*Copyright (C) David Mosberger-Tang -* Copyright (C) 1999 Egbert Eich -* -* -* -* Permission to use, copy, modify, distribute, and sell this software and -* its documentation for any purpose is hereby granted without fee, -* provided that the above copyright notice appear in all copies and that -* both that copyright notice and this permission notice appear in -* supporting documentation, and that the name of the authors not be used -* in advertising or publicity pertaining to distribution of the software -* without specific, written prior permission. The authors makes no -* representations about the suitability of this software for any purpose. -* It is provided as is without express or implied warranty. -* -* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, -* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO -* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR -* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF -* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR -* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR -* PERFORMANCE OF THIS SOFTWARE. -* -* -* -* Language: Watcom C++ 10.6 or later -* Environment: Any -* Developer:Kendall Bennett -* -* Description: Inline assembler versions of the primitive operand -* functions for faster performance. At the moment this is -* x86 inline assembler, but these functions could be replaced -* with native inline assembler for each supported processor -* platform. -* -/ - -#ifndef __X86EMU_PRIM_ASM_H -#define __X86EMU_PRIM_ASM_H - -#ifdef __WATCOMC__ - -#ifndef VALIDATE -#define __HAVE_INLINE_ASSEMBLER__ -#endif - -u32 get_flags_asm(void); -#pragma aux get_flags_asm = \ -pushf \ -popeax\ -value [eax] \ -modify exact [eax]; - -u16 aaa_word_asm(u32 * flags, u16 d); -#pragma aux aaa_word_asm = \ -push [edi] \ -popf \ -aaa \ -pushf \ -pop[edi] \ -parm [edi] [ax] \ -value [ax] \ -modify exact [ax]; - -u16 aas_word_asm(u32 * flags, u16 d); -#pragma aux aas_word_asm = \ -push [edi] \ -popf \ -aas \ -pushf \ -pop[edi] \ -parm [edi] [ax] \ -value [ax] \ -modify exact [ax]; - -u16 aad_word_asm(u32 * flags, u16 d); -#pragma aux aad_word_asm = \ -push [edi] \ -popf \ -aad \ -pushf \ -pop[edi] \ -parm [edi] [ax] \ -value [ax] \ -modify exact [ax]; - -u16 aam_word_asm(u32 * flags, u8 d); -#pragma aux aam_word_asm = \ -push [edi] \ -popf \ -aam \ -pushf \ -pop[edi] \ -parm [edi] [al] \ -value [ax] \ -modify exact [ax]; - -u8 adc_byte_asm(u32 * flags, u8 d, u8 s); -#pragma aux adc_byte_asm = \ -push [edi] \ -popf \ -adcal,bl \ -pushf \ -pop[edi] \ -parm [edi] [al] [bl]\ -value [al] \ -modify exact [al bl]; - -u16
Re: [U-Boot] [PATCH] board: delete unused header files
On 08.01.2014 12:11, Masahiro Yamada wrote: Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com --- board/cogent/kbm.h | 79 - board/cray/L1/L1.h | 28 -- board/esd/common/s1d13806_640_480_8bpp.h | 120 - board/etin/debris/speed.h| 38 board/genietv/genietv.h | 25 -- board/hidden_dragon/speed.h | 38 board/inka4x0/hyb25d512160bf-5.h | 16 board/prodrive/p3mx/ppc_error_no.h | 148 --- board/sandpoint/speed.h | 38 9 files changed, 530 deletions(-) delete mode 100644 board/cogent/kbm.h delete mode 100644 board/cray/L1/L1.h delete mode 100644 board/esd/common/s1d13806_640_480_8bpp.h delete mode 100644 board/etin/debris/speed.h delete mode 100644 board/genietv/genietv.h delete mode 100644 board/hidden_dragon/speed.h delete mode 100644 board/inka4x0/hyb25d512160bf-5.h delete mode 100644 board/prodrive/p3mx/ppc_error_no.h delete mode 100644 board/sandpoint/speed.h Good catch! Thanks Masahiro! Acked-by: Stefan Roese s...@denx.de Thanks, Stefan ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 4/5] imx6: add ot1200 mr board
Hi Christian,
On 08/01/2014 08:24, Christian Gmeiner wrote:
This patch add support for one device of the Bachmann OT1200
series - the mr variant.
Nobody knows (at least, me !) what mr variant means.
My first attemp was to use one u-boot binary for all OT1200
^attempt
devices, but as I need to load a device-specific devicetree
I decided to go this way.
but a specific devicetree for kernel means only a different U-Boot
variable in the environment ? Sure that we are not able to manage this ?
Following components are used:
+ ethernet
+ usb
+ i2c
+ display connected via ldb (init and usage in linux only)
+ emmc
Signed-off-by: Christian Gmeiner christian.gmei...@gmail.com
---
board/bachmann/ot1200/Makefile |9 ++
board/bachmann/ot1200/ot1200.c | 246
boards.cfg |1 +
include/configs/ot1200.h | 241 +++
4 files changed, 497 insertions(+)
create mode 100644 board/bachmann/ot1200/Makefile
create mode 100644 board/bachmann/ot1200/ot1200.c
create mode 100644 include/configs/ot1200.h
diff --git a/board/bachmann/ot1200/Makefile b/board/bachmann/ot1200/Makefile
new file mode 100644
index 000..1bd42e8
--- /dev/null
+++ b/board/bachmann/ot1200/Makefile
@@ -0,0 +1,9 @@
+#
+# Copyright (C) 2012-2013, Guennadi Liakhovetski l...@denx.de
+# (C) Copyright 2012-2013 Freescale Semiconductor, Inc.
+# Copyright (C) 2013, Boundary Devices i...@boundarydevices.com
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y := ot1200.o
diff --git a/board/bachmann/ot1200/ot1200.c b/board/bachmann/ot1200/ot1200.c
new file mode 100644
index 000..6a884c2
--- /dev/null
+++ b/board/bachmann/ot1200/ot1200.c
@@ -0,0 +1,246 @@
+/*
+ * Copyright (C) 2010-2013 Freescale Semiconductor, Inc.
+ * Copyright (C) 2013, Bachmann electronic GmbH
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include common.h
+#include asm/arch/clock.h
+#include asm/arch/imx-regs.h
+#include asm/arch/iomux.h
+#include asm/arch/mx6-pins.h
+#include asm/imx-common/iomux-v3.h
+#include asm/imx-common/mxc_i2c.h
+#include mmc.h
+#include fsl_esdhc.h
+#include netdev.h
+#include i2c.h
+#include pca953x.h
+#include edid.h
+#include linux/fb.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP |\
+ PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \
+ PAD_CTL_SRE_FAST | PAD_CTL_HYS)
+
+#define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \
+ PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \
+ PAD_CTL_SRE_FAST | PAD_CTL_HYS)
+
+#define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP |\
+ PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
+
+#define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \
+ PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
+
+#define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
+ PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \
+ PAD_CTL_ODE | PAD_CTL_SRE_FAST)
+
+#define OUTPUT_40OHM (PAD_CTL_SPEED_MED|PAD_CTL_DSE_40ohm)
+
+int dram_init(void)
+{
+ gd-ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE);
+
+ return 0;
+}
+
+static iomux_v3_cfg_t const uart1_pads[] = {
+ MX6_PAD_CSI0_DAT10__UART1_TXD | MUX_PAD_CTRL(UART_PAD_CTRL),
+ MX6_PAD_CSI0_DAT11__UART1_RXD | MUX_PAD_CTRL(UART_PAD_CTRL),
+};
+
+static void setup_iomux_uart(void)
+{
+ imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
+}
+
+static iomux_v3_cfg_t const enet_pads[] = {
+ MX6_PAD_KEY_ROW1__ENET_COL | MUX_PAD_CTRL(ENET_PAD_CTRL),
+ MX6_PAD_KEY_COL3__ENET_CRS | MUX_PAD_CTRL(ENET_PAD_CTRL),
+ MX6_PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL),
+ MX6_PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL),
+ MX6_PAD_GPIO_16__ENET_ETHERNET_REF_OUT | MUX_PAD_CTRL(ENET_PAD_CTRL),
+ MX6_PAD_GPIO_18__ENET_RX_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL),
+ MX6_PAD_ENET_RXD0__ENET_RDATA_0 | MUX_PAD_CTRL(ENET_PAD_CTRL),
+ MX6_PAD_ENET_RXD1__ENET_RDATA_1 | MUX_PAD_CTRL(ENET_PAD_CTRL),
+ MX6_PAD_KEY_COL2__ENET_RDATA_2 | MUX_PAD_CTRL(ENET_PAD_CTRL),
+ MX6_PAD_KEY_COL0__ENET_RDATA_3 | MUX_PAD_CTRL(ENET_PAD_CTRL),
+ MX6_PAD_ENET_CRS_DV__ENET_RX_EN | MUX_PAD_CTRL(ENET_PAD_CTRL),
+ MX6_PAD_ENET_REF_CLK__ENET_TX_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL),
+ MX6_PAD_ENET_TXD0__ENET_TDATA_0 | MUX_PAD_CTRL(ENET_PAD_CTRL),
+ MX6_PAD_ENET_TXD1__ENET_TDATA_1 | MUX_PAD_CTRL(ENET_PAD_CTRL),
+ MX6_PAD_KEY_ROW2__ENET_TDATA_2 | MUX_PAD_CTRL(ENET_PAD_CTRL),
+ MX6_PAD_KEY_ROW0__ENET_TDATA_3 | MUX_PAD_CTRL(ENET_PAD_CTRL),
+ MX6_PAD_ENET_TX_EN__ENET_TX_EN | MUX_PAD_CTRL(ENET_PAD_CTRL),
+};
+
+static void setup_iomux_enet(void)
+{
+ imx_iomux_v3_setup_multiple_pads(enet_pads, ARRAY_SIZE(enet_pads));
[U-Boot] [PATCH] mmc: Delete unused driver ftsdc021_sdhci
CONFIG_FTSDC021 is not defined anywhere.
So ftsdc021_sdhci.c is never compiled.
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
---
drivers/mmc/Makefile | 1 -
drivers/mmc/ftsdc021_sdhci.c | 33 -
2 files changed, 34 deletions(-)
delete mode 100644 drivers/mmc/ftsdc021_sdhci.c
diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile
index 1ed26ca..a7ae38d 100644
--- a/drivers/mmc/Makefile
+++ b/drivers/mmc/Makefile
@@ -9,7 +9,6 @@ obj-$(CONFIG_BFIN_SDH) += bfin_sdh.o
obj-$(CONFIG_DAVINCI_MMC) += davinci_mmc.o
obj-$(CONFIG_FSL_ESDHC) += fsl_esdhc.o
obj-$(CONFIG_FTSDC010) += ftsdc010_mci.o
-obj-$(CONFIG_FTSDC021) += ftsdc021_sdhci.o
obj-$(CONFIG_GENERIC_MMC) += mmc.o
obj-$(CONFIG_GENERIC_ATMEL_MCI) += gen_atmel_mci.o
obj-$(CONFIG_MMC_SPI) += mmc_spi.o
diff --git a/drivers/mmc/ftsdc021_sdhci.c b/drivers/mmc/ftsdc021_sdhci.c
deleted file mode 100644
index 1f6cdba..000
--- a/drivers/mmc/ftsdc021_sdhci.c
+++ /dev/null
@@ -1,33 +0,0 @@
-/*
- * (C) Copyright 2013 Faraday Technology
- * Kuo-Jung Su dant...@faraday-tech.com
- *
- * SPDX-License-Identifier:GPL-2.0+
- */
-
-#include common.h
-#include malloc.h
-#include sdhci.h
-
-#ifndef CONFIG_FTSDC021_CLOCK
-#define CONFIG_FTSDC021_CLOCK clk_get_rate(MMC)
-#endif
-
-int ftsdc021_sdhci_init(u32 regbase)
-{
- struct sdhci_host *host = NULL;
- uint32_t freq = CONFIG_FTSDC021_CLOCK;
-
- host = calloc(1, sizeof(struct sdhci_host));
- if (!host) {
- puts(sdh_host malloc fail!\n);
- return 1;
- }
-
- host-name = FTSDC021;
- host-ioaddr = (void __iomem *)regbase;
- host-quirks = 0;
- add_sdhci(host, freq, 0);
-
- return 0;
-}
--
1.8.3.2
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Re: [U-Boot] [PATCH v2] spi/cadence: Adding Cadence SPI driver support for SOCFPGA
Hi Chin Liang See,
On Thu, Jan 2, 2014 at 8:13 AM, Chin Liang See cl...@altera.com wrote:
To add the Cadence SPI driver support for Altera SOCFPGA. It
required information such as clocks and timing from platform's
configuration header file within include/configs folder
Signed-off-by: Chin Liang See cl...@altera.com
Cc: Jagan Teki jagannadh.t...@gmail.com
Cc: Gerhard Sittig g...@denx.de
---
Changes for v2
- Combine driver into single C file instead of 2
- Added documentation on the macro used
- Using structure for registers instead of macro
---
doc/README.socfpga | 47 ++
drivers/spi/Makefile |1 +
drivers/spi/cadence_qspi.c | 1018
drivers/spi/cadence_qspi.h | 170
4 files changed, 1236 insertions(+)
create mode 100644 drivers/spi/cadence_qspi.c
create mode 100644 drivers/spi/cadence_qspi.h
diff --git a/doc/README.socfpga b/doc/README.socfpga
index cfcbbfe..242af97 100644
--- a/doc/README.socfpga
+++ b/doc/README.socfpga
@@ -51,3 +51,50 @@ the card
#define CONFIG_SOCFPGA_DWMMC_BUS_HZ5000
- The clock rate to controller. Do note the controller have a wrapper which
divide the clock from PLL by 4.
+
+
+cadence_qspi
+
+Here are macro and detailed configuration required to enable Cadence QSPI
+controller support within SOCFPGA
+
+#define CONFIG_SPI_FLASH
+- To enable the SPI flash framework support
+
+#define CONFIG_CMD_SF
+- To enable the console support for SPI flash
+
+#define CONFIG_SF_DEFAULT_SPEED(5000)
+- To set the target SPI clock frequency in Hz
+
+#define CONFIG_SF_DEFAULT_MODE SPI_MODE_3
+- To set the SPI mode (CPOL CPHA). Normally use mode 3 for serial NOR
flash
+
+#define CONFIG_SPI_FLASH_QUAD (1)
+- To enable the Quad IO mode for performance boost
+
+#define CONFIG_SPI_FLASH_STMICRO
+#define CONFIG_SPI_FLASH_SPANSION
+- To enable the SPI flash support for vendor Micron and Spansion
+
+#define CONFIG_CQSPI_BASE (SOCFPGA_QSPIREGS_ADDRESS)
+#define CONFIG_CQSPI_AHB_BASE (SOCFPGA_QSPIDATA_ADDRESS)
+- To specify the base address for controller CSR base and AHB data base addr
+
+#define CONFIG_CQSPI_REF_CLK (4)
+- The clock frequency supplied from PLL to the QSPI controller
+
+#define CONFIG_CQSPI_PAGE_SIZE (256)
+- To define the page size of serial flash in bytes
+
+#define CONFIG_CQSPI_BLOCK_SIZE(16)
+- To define the block size of serial flash in pages
+
+#define CONFIG_CQSPI_DECODER (0)
+- To enable the 4-to-16 decoder which enable up to 16 serial flash devices
+
+#define CONFIG_CQSPI_TSHSL_NS (200)
+#define CONFIG_CQSPI_TSD2D_NS (255)
+#define CONFIG_CQSPI_TCHSH_NS (20)
+#define CONFIG_CQSPI_TSLCH_NS (20)
+- Configure the controller based on serial flash device timing
characteristic
Do we really require this, because most of the known macros definitions.
Better to not write too many duplicates - Yes there are few macro's
which are specific to cadence
but I don't think those were required.
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index ed4ecd7..b8d56ea 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -15,6 +15,7 @@ obj-$(CONFIG_ATMEL_DATAFLASH_SPI) += atmel_dataflash_spi.o
obj-$(CONFIG_ATMEL_SPI) += atmel_spi.o
obj-$(CONFIG_BFIN_SPI) += bfin_spi.o
obj-$(CONFIG_BFIN_SPI6XX) += bfin_spi6xx.o
+obj-$(CONFIG_CADENCE_QSPI) += cadence_qspi.o
obj-$(CONFIG_CF_SPI) += cf_spi.o
obj-$(CONFIG_CF_QSPI) += cf_qspi.o
obj-$(CONFIG_DAVINCI_SPI) += davinci_spi.o
diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c
new file mode 100644
index 000..4712b45
--- /dev/null
+++ b/drivers/spi/cadence_qspi.c
@@ -0,0 +1,1018 @@
+/*
+ * (C) Copyright 2014 Altera Corporation www.altera.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include asm/io.h
+#include asm/errno.h
+#include malloc.h
+#include spi.h
+#include cadence_qspi.h
Try to move the stuff from header here.!
+
+static int qspi_is_init;
+static unsigned int qspi_calibrated_hz;
+static unsigned int qspi_calibrated_cs;
+
+static const struct cadence_qspi *cadence_qspi_base = (void *)QSPI_BASE;
+
+#define to_cadence_qspi_slave(s) \
+ container_of(s, struct cadence_qspi_slave, slave)
+
+#define CQSPI_CAL_DELAY(tdelay_ns, tref_ns, tsclk_ns) \
+ tdelay_ns) - (tsclk_ns)) / (tref_ns)))
+
+#define CQSPI_GET_WR_SRAM_LEVEL() \
+ ((readl(cadence_qspi_base-sramfill) \
+ CQSPI_REG_SRAMLEVEL_WR_LSB) CQSPI_REG_SRAMLEVEL_WR_MASK)
+
+static unsigned int cadence_qspi_apb_cmd2addr(const unsigned char *addr_buf,
+ unsigned int addr_width)
+{
+ unsigned int addr;
+
+
Re: [U-Boot] [PATCH] board: delete unused header files
Thanks. Acked-by: Matthias Fuchs matthias.fu...@esd.eu On 08.01.2014 12:11, Masahiro Yamada wrote: Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com --- board/cogent/kbm.h | 79 - board/cray/L1/L1.h | 28 -- board/esd/common/s1d13806_640_480_8bpp.h | 120 - board/etin/debris/speed.h| 38 board/genietv/genietv.h | 25 -- board/hidden_dragon/speed.h | 38 board/inka4x0/hyb25d512160bf-5.h | 16 board/prodrive/p3mx/ppc_error_no.h | 148 --- board/sandpoint/speed.h | 38 9 files changed, 530 deletions(-) delete mode 100644 board/cogent/kbm.h delete mode 100644 board/cray/L1/L1.h delete mode 100644 board/esd/common/s1d13806_640_480_8bpp.h delete mode 100644 board/etin/debris/speed.h delete mode 100644 board/genietv/genietv.h delete mode 100644 board/hidden_dragon/speed.h delete mode 100644 board/inka4x0/hyb25d512160bf-5.h delete mode 100644 board/prodrive/p3mx/ppc_error_no.h delete mode 100644 board/sandpoint/speed.h diff --git a/board/cogent/kbm.h b/board/cogent/kbm.h deleted file mode 100644 index 7eb419c..000 --- a/board/cogent/kbm.h +++ /dev/null @@ -1,79 +0,0 @@ -/* keyboard/mouse not implemented yet */ - -extern int cma_kbm_not_implemented; - -/ DEFINES for H8542B Keyboard/Mouse Controller ***/ - -/* - * note the auxillary port is used to control the mouse - */ - -/* 8542B Commands (Sent to the Command Port) */ -#define HT8542_CMD_SET_BYTE0x60/* Set the command byte */ -#define HT8542_CMD_GET_BYTE0x20/* Get the command byte */ -#define HT8542_CMD_KBD_OBUFF 0xD2/* Write to HT8542 Kbd Output Buffer */ -#define HT8542_CMD_AUX_OBUFF 0xD3/* Write to HT8542 Mse Output Buffer */ -#define HT8542_CMD_AUX_WRITE 0xD4/* Write to Mouse Port */ -#define HT8542_CMD_AUX_OFF 0xA7/* Disable Mouse Port */ -#define HT8542_CMD_AUX_ON 0xA8/* Re-Enable Mouse Port */ -#define HT8542_CMD_AUX_TEST0xA9/* Test for the presence of a Mouse */ -#define HT8542_CMD_DIAG0xAA/* Start Diagnostics */ -#define HT8542_CMD_KBD_TEST0xAB/* Test for presence of a keyboard */ -#define HT8542_CMD_KBD_OFF 0xAD/* Disable Kbd Port (use KBD_DAT_ON) */ -#define HT8542_CMD_KBD_ON 0xAE/* Enable Kbd Port (use KBD_DAT_OFF) */ - -/* HT8542B cmd byte set by KBD_CMD_SET_BYTE and retrieved by KBD_CMD_GET_BYTE */ -#define HT8542_CMD_BYTE_TRANS 0x40 -#define HT8542_CMD_BYTE_AUX_OFF0x20/* 1 = mse port disabled, 0 = enabled */ -#define HT8542_CMD_BYTE_KBD_OFF0x10/* 1 = kbd port disabled, 0 = enabled */ -#define HT8542_CMD_BYTE_OVER 0x08/* 1 = override keyboard lock */ -#define HT8542_CMD_BYTE_RES0x04/* reserved */ -#define HT8542_CMD_BYTE_AUX_INT0x02/* 1 = enable mouse interrupt */ -#define HT8542_CMD_BYTE_KBD_INT0x01/* 1 = enable keyboard interrupt */ - -/* Keyboard Commands (Sent to the Data Port) */ -#define KBD_CMD_LED0xED/* Set Keyboard LEDS with next byte */ -#define KBD_CMD_ECHO 0xEE/* Echo - we get 0xFA, 0xEE back */ -#define KBD_CMD_MODE 0xF0/* set scan code mode with next byte */ -#define KBD_CMD_ID 0xF2/* get keyboard/mouse ID */ -#define KBD_CMD_RPT0xF3/* Set Repeat Rate and Delay 2nd Byte */ -#define KBD_CMD_ON 0xF4/* Enable keyboard */ -#define KBD_CMD_OFF0xF5/* Disables Scanning, Resets to Def */ -#define KBD_CMD_DEF0xF6/* Reverts kbd to default settings */ -#define KBD_CMD_RST0xFF/* Reset - should get 0xFA, 0xAA back */ - -/* Set LED second bit defines */ -#define KBD_CMD_LED_SCROLL 0x01/* Set SCROLL LOCK LED on */ -#define KBD_CMD_LED_NUM0x02/* Set NUM LOCK LED on */ -#define KBD_CMD_LED_CAPS 0x04/* Set CAPS LOCK LED on */ - -/* Set Mode second byte defines */ -#define KBD_CMD_MODE_STAT 0x00/* get current scan code mode */ -#define KBD_CMD_MODE_SCAN1 0x01/* set mode to scan code 1 */ -#define KBD_CMD_MODE_SCAN2 0x02/* set mode to scan code 2 */ -#define KBD_CMD_MODE_SCAN3 0x03/* set mode to scan code 3 */ - -/* Keyboard/Mouse ID Codes */ -#define KBD_CMD_ID_1ST 0xAB/* 1st byte is 0xAB, 2nd is actual ID */ -#define KBD_CMD_ID_KBD 0x83/* Keyboard */ -#define KBD_CMD_ID_MOUSE 0x00/* Mouse */ - -/* Keyboard Data Return Defines */ -#define KBD_STAT_OVER 0x00/* Buffer Overrun */ -#define KBD_STAT_DIAG_OK 0x55/* Internal Self Test OK */ -#define KBD_STAT_RST_OK0xAA/* Reset Complete */ -#define
Re: [U-Boot] [PATCH 1/2] configs: mx6_common: Restrict CONFIG_ARM_ERRATA_742230 for multi-core
On Wed, Jan 08, 2014 at 09:55:10AM +0100, Stefano Babic wrote: Hi Fabio, On 06/01/2014 14:14, Fabio Estevam wrote: According to e9fd66defd (ARM: mx6: define CONFIG_ARM_ERRATA_742230), the CONFIG_ARM_ERRATA_742230 option should only be applied to multi-core variants, so restrict its usage for quad and dual-lite only. Signed-off-by: Fabio Estevam fabio.este...@freescale.com --- include/configs/mx6_common.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h index 514d634..0b8db85 100644 --- a/include/configs/mx6_common.h +++ b/include/configs/mx6_common.h @@ -17,7 +17,9 @@ #ifndef __MX6_COMMON_H #define __MX6_COMMON_H +#if defined(CONFIG_MX6Q) || defined(CONFIG_MX6DL) #define CONFIG_ARM_ERRATA_742230 +#endif #define CONFIG_ARM_ERRATA_743622 #define CONFIG_ARM_ERRATA_751472 #define CONFIG_BOARD_POSTCLK_INIT In Kernel I cannot read that the errata is related to a multicore processor. Indeed, it is related to the Cortex-A9 version. This option enables the workaround for the 742230 Cortex-A9 (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction between two write operations may not ensure the correct visibility ordering of the two writes. This workaround sets a specific bit in the diagnostic register of the Cortex-A9 which causes the DMB instruction to behave as a DSB, ensuring the correct behaviour of the two writes. The fix was merged in kernel since a lot of time, before having multicore processors for ARM. At least the commit message does not seem coherent with the explanations in kernel. Maybe has solo a upgraded core version as dual/quad ? The sololite has the same core version as dual/quad - r2p10. The help text of erratum 742230 in kernel suggests that only version r1p0..r2p2 are affected. So it sounds like the erratum 742230 should be irrelevant to i.MX6 SoCs. However we were running into a reboot issue on multi-core i.MX6 SoCs. There was a quite long discussion [1] about it. Though we did not reach a conclusion in the thread, one ARM people sent me a private message, suggesting this should be an ARM core issue and workaround for erratum 742230 might help. And it turns out what he said is true. And that's why I came up with the commit e9fd66defd (ARM: mx6: define CONFIG_ARM_ERRATA_742230) to turn on the erratum for imx6 dual/quad. Shawn [1] http://lists.infradead.org/pipermail/linux-arm-kernel/2012-August/thread.html#113096 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] spi: soft_spi: Support NULL din/dout buffers
Hi Andrew Ruder,
On Wed, Oct 23, 2013 at 5:41 AM, Andrew Ruder
andrew.ru...@elecsyscorp.com wrote:
This mirrors the conventions used in other SPI drivers (kirkwood,
davinci, atmel, et al) where the din/dout buffer can be NULL when the
received/transmitted data isn't important. This reduces the need for
allocating additional buffers when write-only/read-only functionality is
needed.
In the din == NULL case, the received data is simply not stored. In the
dout == NULL case, zeroes are transmitted.
Signed-off-by: Andrew Ruder andrew.ru...@elecsyscorp.com
---
drivers/spi/soft_spi.c | 18 +-
1 file changed, 13 insertions(+), 5 deletions(-)
diff --git a/drivers/spi/soft_spi.c b/drivers/spi/soft_spi.c
index 5d22351..5fdd091 100644
--- a/drivers/spi/soft_spi.c
+++ b/drivers/spi/soft_spi.c
@@ -137,9 +137,15 @@ int spi_xfer(struct spi_slave *slave, unsigned int
bitlen,
* Check if it is time to work on a new byte.
*/
if((j % 8) == 0) {
- tmpdout = *txd++;
+ if (txd) {
+ tmpdout = *txd++;
+ } else {
+ tmpdout = 0;
+ }
if(j != 0) {
- *rxd++ = tmpdin;
+ if (rxd) {
+ *rxd++ = tmpdin;
+ }
}
tmpdin = 0;
}
@@ -164,9 +170,11 @@ int spi_xfer(struct spi_slave *slave, unsigned int
bitlen,
* bits over to left-justify them. Then store the last byte
* read in.
*/
- if((bitlen % 8) != 0)
- tmpdin = 8 - (bitlen % 8);
- *rxd++ = tmpdin;
+ if (rxd) {
+ if((bitlen % 8) != 0)
+ tmpdin = 8 - (bitlen % 8);
+ *rxd++ = tmpdin;
+ }
if (flags SPI_XFER_END)
spi_cs_deactivate(slave);
--
I'm not sure does this NULL buf config stuff will works all boards as
you listed.
I guess ie the reason the earlier code doesn't have this.
Does this tested on your board? any possibility to test others too.
Jean-Christophe, any comments here!
--
Thanks,
Jagan.
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Re: [U-Boot] [PATCH] cmd_sf: Mention in the help text that mode, addr, offset and len must be given in hex.
On Thu, Oct 24, 2013 at 7:14 PM, Jakob Unterwurzacher jakob.unterwurzac...@theobroma-systems.com wrote: These parameters are always interpreted as hex, even without 0x prefix. Signed-off-by: Jakob Unterwurzacher jakob.unterwurzac...@theobroma-systems.com --- common/cmd_sf.c |3 ++- 1 files changed, 2 insertions(+), 1 deletions(-) diff --git a/common/cmd_sf.c b/common/cmd_sf.c index 0a17782..0f7c0a3 100644 --- a/common/cmd_sf.c +++ b/common/cmd_sf.c @@ -531,6 +531,7 @@ U_BOOT_CMD( sf erase offset [+]len - erase `len' bytes from `offset'\n `+len' round up `len' to block size\n sf update addr offset len - erase and write `len' bytes from memory\n -at `addr' to flash at `offset' +at `addr' to flash at `offset'\n + Parameters mode, addr, offset and len must be in hex. SF_TEST_HELP ); All in u-boot treated similar, i don't think the point here to add notes. Sorry, rejected. -- Thanks, Jagan. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v5 5/8] SPI: add Dove support to Kirkwood SPI driver
On Sat, Dec 21, 2013 at 12:35 AM, Jagan Teki jagannadh.t...@gmail.com wrote: Hi Sascha Silbe, On Wed, Jun 26, 2013 at 7:41 PM, Wolfgang Denk w...@denx.de wrote: Dear Sascha Silbe, In message 1372195668-25496-6-git-send-email-t-ub...@infra-silbe.de you wrote: The SPI support on Dove is very similar to that on Kirkwood (and possibly orion5x as well). Instead of duplicating the code, we tweak the Kirkwood driver so it works for Dove, too. Signed-off-by: Sascha Silbe t-ub...@infra-silbe.de Not checkpatch clean: 2 errors, 2 warnings. Please fix. Any inputs on this. Last ping! -- Thanks, Jagan. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] omap4_common: config: remove I2C for SPL mode
On Tue, Jan 07, 2014 at 08:06:56PM -0600, Nishanth Menon wrote: Commit 6789e84ecaa8f45d053084e08c381284a04abff7 (i2c, omap24xx: convert driver to new mutlibus/mutliadapter framework) intended to make I2C driver compatible with latest changes. It unfortunately has had a impact on size on SPL as well. For example on SDP4430, 32032 bytes before/MLO 35416 bytes after/MLO Ah toolchain fun, that's why I hadn't seen this, all of mine build around 32KiB. So, where is the 38KiB max size we set valid, on OMAP4 devices? -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] omap4_common: config: remove I2C for SPL mode
HI On Wed, Jan 8, 2014 at 1:58 PM, Tom Rini tr...@ti.com wrote: On Tue, Jan 07, 2014 at 08:06:56PM -0600, Nishanth Menon wrote: Commit 6789e84ecaa8f45d053084e08c381284a04abff7 (i2c, omap24xx: convert driver to new mutlibus/mutliadapter framework) intended to make I2C driver compatible with latest changes. It unfortunately has had a impact on size on SPL as well. For example on SDP4430, 32032 bytes before/MLO 35416 bytes after/MLO Ah toolchain fun, that's why I hadn't seen this, all of mine build around 32KiB. So, where is the 38KiB max size we set valid, on OMAP4 devices? I'm working on a different version of u-boot for omap4460 and my spl is very big /* Defines for SPL */ #define CONFIG_SPL #if 0 #define CONFIG_SPL_TEXT_BASE 0x40303080 #define CONFIG_SPL_MAX_SIZE(38 * 1024) #else #define CONFIG_SPL_TEXT_BASE0x40303080 #define CONFIG_SPL_MAX_SIZE ((40 * 1024) + 512) #endif With this size I can boot from serial and from sdcard. Michael -- Tom ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] arm: put .hash, .got.plt and .machine_param back in binaries
Some targets will build fine but not boot if sections .hash and
.got.plt are not present in the binary. Add them back.
Also, Exynos machines require .machine_param section in SPL.
Add it.
Signed-off-by: Albert ARIBAUD albert.u.b...@aribaud.net
---
Changes for v2:
- removed SREC format SPL generation
arch/arm/config.mk | 2 +-
arch/arm/cpu/armv7/exynos/config.mk | 7 +++
arch/arm/cpu/u-boot.lds | 3 +--
spl/Makefile| 2 +-
4 files changed, 10 insertions(+), 4 deletions(-)
create mode 100644 arch/arm/cpu/armv7/exynos/config.mk
diff --git a/arch/arm/config.mk b/arch/arm/config.mk
index fd3e5fb..5d39d39 100644
--- a/arch/arm/config.mk
+++ b/arch/arm/config.mk
@@ -105,4 +105,4 @@ PLATFORM_CPPFLAGS += $(call cc-option, -mword-relocations)
endif
# limit ourselves to the sections we want in the .bin.
-OBJCFLAGS += -j .text -j .rodata -j .data -j .u_boot_list -j .rel.dyn
+OBJCFLAGS += -j .text -j .rodata -j .hash -j .data -j .got.plt -j .u_boot_list
-j .rel.dyn
diff --git a/arch/arm/cpu/armv7/exynos/config.mk
b/arch/arm/cpu/armv7/exynos/config.mk
new file mode 100644
index 000..ee0d2da
--- /dev/null
+++ b/arch/arm/cpu/armv7/exynos/config.mk
@@ -0,0 +1,7 @@
+#
+# Copyright (C) Albert ARIBAUD albert.u.b...@aribaud.net
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+SPL_OBJCFLAGS += -j .machine_param
diff --git a/arch/arm/cpu/u-boot.lds b/arch/arm/cpu/u-boot.lds
index 9463a33..4da5d24 100644
--- a/arch/arm/cpu/u-boot.lds
+++ b/arch/arm/cpu/u-boot.lds
@@ -92,8 +92,6 @@ SECTIONS
}
.dynsym _end : { *(.dynsym) }
- .hash : { *(.hash) }
- .got.plt : { *(.got.plt) }
.dynbss : { *(.dynbss) }
.dynstr : { *(.dynstr*) }
.dynamic : { *(.dynamic*) }
@@ -101,4 +99,5 @@ SECTIONS
.interp : { *(.interp*) }
.gnu : { *(.gnu*) }
.ARM.exidx : { *(.ARM.exidx*) }
+ .gnu.linkonce.armexidx : { *(.gnu.linkonce.armexidx.*) }
}
diff --git a/spl/Makefile b/spl/Makefile
index 0caa982..a91bbd0 100644
--- a/spl/Makefile
+++ b/spl/Makefile
@@ -176,7 +176,7 @@ $(obj)$(BOARD)-spl.bin: $(obj)u-boot-spl.bin
endif
$(obj)$(SPL_BIN).bin: $(obj)$(SPL_BIN)
- $(OBJCOPY) $(OBJCFLAGS) -O binary $ $@
+ $(OBJCOPY) $(OBJCFLAGS) $(SPL_OBJCFLAGS) -O binary $ $@
GEN_UBOOT = \
cd $(obj) $(LD) $(LDFLAGS) $(LDFLAGS_$(@F)) $(__START) \
--
1.8.3.2
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Re: [U-Boot] ARM: twister: add missing gpio clock init
On Sat, Dec 21, 2013 at 06:06:33PM +0100, Jeroen Hofstee wrote: Commit f33b9bd3984fb11e1d8566a866adc5957b1e1c9d breaks boards which do not explicitly enable the gpio clocks. This causes the twister spl to hang, since it uses the no longer enabled gpio 55. Add CONFIG_OMAP3_GPIO_2 to unbrick the board. Cc: Stefano Babic sba...@denx.de Cc: Tapani Utriainen tap...@technexion.com Signed-off-by: Jeroen Hofstee jer...@myspectrum.nl Acked-by: Stefano Babic sba...@denx.de Applied to u-boot-ti/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] ARM: tam3517-common: fix nand spl boot
On Sat, Dec 21, 2013 at 06:03:09PM +0100, Jeroen Hofstee wrote: commit f9095aac793aa8917ab9b915c5d449e6dc8d3d30, mtd: nand: omap: add CONFIG_NAND_OMAP_ECCSCHEME for selection of ecc-scheme removed CONFIG_SPL_NAND_SOFTECC from the tam3517 common config, causing the spl nand boot to fail. Add it back, so derived boards boot again. Cc: Pekon Gupta pe...@ti.com Cc: Scott Wood scottw...@freescale.com Cc: Raphael Assenat r...@8d.com Cc: Stefano Babic sba...@denx.de Cc: Tapani Utriainen tap...@technexion.com Signed-off-by: Jeroen Hofstee jer...@myspectrum.nl Acked-by: Stefano Babic sba...@denx.de Applied to u-boot-ti/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] cam_enc_4xx: Set CONFIG_SYS_NAND_MAX_OOBFREE / CONFIG_SYS_NAND_MAX_ECCPOS
On Wed, Dec 18, 2013 at 02:43:08PM -0500, Tom Rini wrote: With the changes to make OOBFREE/ECCPOS configurable but default to larger, we need to set these config options for the space savings they provide. Cc: Scott Wood scottw...@freescale.com Cc: Heiko Schocher h...@denx.de Signed-off-by: Tom Rini tr...@ti.com Applied to u-boot-ti/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Please pull u-boot-ti/master
Hey, The following changes since commit 4b0561d84198f8d696fd51cfc27aeac8c7482a8c: Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master' (2014-01-06 09:32:42 +0100) are available in the git repository at: git://git.denx.de/u-boot-ti.git master for you to fetch changes up to e0a1d598ef0155f31589c42db17ff4784e84ca67: ARM: dra7_evm: read mac address properly from e-fuse (2014-01-07 16:41:12 -0500) Jeroen Hofstee (2): ARM: tam3517-common: fix nand spl boot ARM: twister: add missing gpio clock init Mugunthan V N (1): ARM: dra7_evm: read mac address properly from e-fuse Nikita Kiryanov (1): arm: omap: cm_t35: enable gpio bank 5 clocks explicitly Tom Rini (2): cam_enc_4xx: Set CONFIG_SYS_NAND_MAX_OOBFREE / CONFIG_SYS_NAND_MAX_ECCPOS TI:omap3: Drop omap3_zoom2 board/logicpd/zoom2/Makefile | 11 -- board/logicpd/zoom2/config.mk | 17 --- board/logicpd/zoom2/debug_board.c | 44 --- board/logicpd/zoom2/led.c | 116 -- board/logicpd/zoom2/zoom2.c| 183 board/logicpd/zoom2/zoom2.h| 142 - board/logicpd/zoom2/zoom2_serial.c | 130 board/logicpd/zoom2/zoom2_serial.h | 59 - board/ti/dra7xx/evm.c |8 +- boards.cfg |1 - drivers/serial/ns16550.c |5 +- include/configs/cam_enc_4xx.h |2 + include/configs/cm_t35.h |1 + include/configs/omap3_zoom2.h | 237 include/configs/tam3517-common.h |1 + include/configs/twister.h |3 + 16 files changed, 13 insertions(+), 947 deletions(-) delete mode 100644 board/logicpd/zoom2/Makefile delete mode 100644 board/logicpd/zoom2/config.mk delete mode 100644 board/logicpd/zoom2/debug_board.c delete mode 100644 board/logicpd/zoom2/led.c delete mode 100644 board/logicpd/zoom2/zoom2.c delete mode 100644 board/logicpd/zoom2/zoom2.h delete mode 100644 board/logicpd/zoom2/zoom2_serial.c delete mode 100644 board/logicpd/zoom2/zoom2_serial.h delete mode 100644 include/configs/omap3_zoom2.h -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] TI:omap3: Drop omap3_zoom2
On Fri, Dec 20, 2013 at 11:19:33AM -0500, Tom Rini wrote: The omap3_zoom2 board has not been updated for a correct CONFIG_SYS_HZ and Tom Rix's email has long been bouncing. Signed-off-by: Tom Rini tr...@ti.com Applied to u-boot-ti/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] arm: omap: cm_t35: enable gpio bank 5 clocks explicitly
On Tue, Dec 31, 2013 at 12:55:15PM +0200, Nikita Kiryanov wrote: Following commit arm: omap3: Enable clocks for peripherals only if they are used (f33b9bd3984fb11e1d8566a866adc5957b1e1c9d) it is now necessary to enable clocks for GPIO banks explicitly. On cm_t35, GPIO bank 5 is necessary for scf0403 lcd support. Enable GPIO bank 5 clocks. Signed-off-by: Nikita Kiryanov nik...@compulab.co.il Cc: Igor Grinberg grinb...@compulab.co.il Cc: Tom Rini tr...@ti.com Acked-by: Igor Grinberg grinb...@compulab.co.il Applied to u-boot-ti/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [U-Boot, 1/1] ARM: dra7_evm: read mac address properly from e-fuse
On Tue, Jan 07, 2014 at 07:57:38PM +0530, Mugunthan V N wrote: Byte offset of Ethernet mac address read from e-fuse are wrong so DHCP is not working on some boards, modifying the offset to read properly. Signed-off-by: Mugunthan V N mugunthan...@ti.com Applied to u-boot-ti/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] configs: mx6_common: Restrict CONFIG_ARM_ERRATA_742230 for multi-core
Hi Fabio, On 08/01/2014 13:10, Shawn Guo wrote: On Wed, Jan 08, 2014 at 09:55:10AM +0100, Stefano Babic wrote: Hi Fabio, On 06/01/2014 14:14, Fabio Estevam wrote: According to e9fd66defd (ARM: mx6: define CONFIG_ARM_ERRATA_742230), the CONFIG_ARM_ERRATA_742230 option should only be applied to multi-core variants, so restrict its usage for quad and dual-lite only. Signed-off-by: Fabio Estevam fabio.este...@freescale.com --- include/configs/mx6_common.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h index 514d634..0b8db85 100644 --- a/include/configs/mx6_common.h +++ b/include/configs/mx6_common.h @@ -17,7 +17,9 @@ #ifndef __MX6_COMMON_H #define __MX6_COMMON_H +#if defined(CONFIG_MX6Q) || defined(CONFIG_MX6DL) #define CONFIG_ARM_ERRATA_742230 +#endif #define CONFIG_ARM_ERRATA_743622 #define CONFIG_ARM_ERRATA_751472 #define CONFIG_BOARD_POSTCLK_INIT In Kernel I cannot read that the errata is related to a multicore processor. Indeed, it is related to the Cortex-A9 version. This option enables the workaround for the 742230 Cortex-A9 (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction between two write operations may not ensure the correct visibility ordering of the two writes. This workaround sets a specific bit in the diagnostic register of the Cortex-A9 which causes the DMB instruction to behave as a DSB, ensuring the correct behaviour of the two writes. The fix was merged in kernel since a lot of time, before having multicore processors for ARM. At least the commit message does not seem coherent with the explanations in kernel. Maybe has solo a upgraded core version as dual/quad ? The sololite has the same core version as dual/quad - r2p10. The help text of erratum 742230 in kernel suggests that only version r1p0..r2p2 are affected. So it sounds like the erratum 742230 should be irrelevant to i.MX6 SoCs. However we were running into a reboot issue on multi-core i.MX6 SoCs. There was a quite long discussion [1] about it. Though we did not reach a conclusion in the thread, one ARM people sent me a private message, suggesting this should be an ARM core issue and workaround for erratum 742230 might help. And it turns out what he said is true. And that's why I came up with the commit e9fd66defd (ARM: mx6: define CONFIG_ARM_ERRATA_742230) to turn on the erratum for imx6 dual/quad. Shawn, thanks for explanations. Fabio, can you extend the commit message, pointing out that the version itself of the ARM core is not the real cause. Maybe improving with part of Russel's answer to the thread, that catches the point. http://lists.infradead.org/pipermail/linux-arm-kernel/2012-August/113353.html This is a fix that I will merge for release. I am quite astonished what can still happens in User Space, if the compiler issues a dmb instruction... Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 11/12] trats2: add LCD download menu support
Hello Minkyu, On 01/08/2014 02:56 AM, Minkyu Kang wrote: Dear Przemsyslaw Marczak, On 07/01/14 21:54, Przemyslaw Marczak wrote: Hello, On 01/06/2014 12:37 PM, Minkyu Kang wrote: On 04/01/14 02:21, Przemyslaw Marczak wrote: Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com --- changes v2: - add definitions for check keys - cleanup config definitions Changes v3: - remove CONFIG_BOARD_NAME from include/configs/trats2.h include/configs/trats2.h | 26 ++ 1 file changed, 26 insertions(+) diff --git a/include/configs/trats2.h b/include/configs/trats2.h index 740ceb1..453a37e 100644 --- a/include/configs/trats2.h +++ b/include/configs/trats2.h @@ -19,6 +19,7 @@ #define CONFIG_S5P/* which is in a S5P Family */ #define CONFIG_EXYNOS4/* which is in a EXYNOS4XXX */ #define CONFIG_TIZEN/* TIZEN lib */ +#define CONFIG_TRATS2 #include asm/arch/cpu.h/* get chip and board defs */ @@ -315,6 +316,31 @@ int get_soft_i2c_sda_pin(void); /* Common misc for Samsung */ #define CONFIG_MISC_INIT_R +/* Download menu - Samsung common */ +#define CONFIG_LCD_MENU +#define CONFIG_LCD_MENU_BOARD + +/* Download menu - definitions for check keys */ +#ifndef __ASSEMBLY__ +#ifdef __COMMON_H_ why this ifdef(__COMMON_H_) is needed? There was some include conflict with pmic which breaks build and this macro resolve it. What kind of conflict? I think it is not a solution. Thanks, Minkyu Kang. There was various errors with conflicting declaration types. It was looking like common.h was not included for some file when I add include of pmic.h to file trats2.h. The conflict was because of max77686_pmic.h which needs pmic.h(functions declarations with struct pmic). File pmic.h includes common.h but it is unneeded there. Remove common.h from pmic.h solved this issue. I will resend patches soon. Thank you -- Przemyslaw Marczak Samsung RD Institute Poland Samsung Electronics p.marc...@samsung.com ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] omap4_common: config: remove I2C for SPL mode
On Wed, Jan 8, 2014 at 6:58 AM, Tom Rini tr...@ti.com wrote: Ah toolchain fun, that's why I hadn't seen this, all of mine build around 32KiB. arm-linux-gnueabi-gcc --version arm-linux-gnueabi-gcc (Ubuntu/Linaro 4.6.3-1ubuntu5) 4.6.3 Copyright (C) 2011 Free Software Foundation, Inc. This is free software; see the source for copying conditions. There is NO warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. So, where is the 38KiB max size we set valid, on OMAP4 devices? as I mentioned in my commit message, 32k limit is on OMAP4 devices - Default accessible non-secure SRAM out of the total of 56K is only 32K. Sricharan already pointed at http://git.denx.de/?p=u-boot/u-boot-arm.git;a=commit;h=dcc23576384dbb875a4427dcfa9ac8d237230d42 Any further savings will be great. Regards, Nishanth Menon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 1/2] configs: mx6_common: Restrict CONFIG_ARM_ERRATA_742230 for multi-core
From: Fabio Estevam fabio.este...@freescale.com According to e9fd66defd (ARM: mx6: define CONFIG_ARM_ERRATA_742230), the CONFIG_ARM_ERRATA_742230 option should only be applied to multi-core variants, so restrict its usage for quad and dual-lite only. Quoting Shawn Guo [2]: The sololite has the same core version as dual/quad - r2p10. The help text of erratum 742230 in kernel suggests that only version r1p0..r2p2 are affected. So it sounds like the erratum 742230 should be irrelevant to i.MX6 SoCs. However we were running into a reboot issue on multi-core i.MX6 SoCs. There was a quite long discussion [1] about it. Though we did not reach a conclusion in the thread, one ARM people sent me a private message, suggesting this should be an ARM core issue and workaround for erratum 742230 might help. And it turns out what he said is true. And that's why I came up with the commit e9fd66defd (ARM: mx6: define CONFIG_ARM_ERRATA_742230) to turn on the erratum for imx6 dual/quad. Shawn [1] http://lists.infradead.org/pipermail/linux-arm-kernel/2012-August/thread.html#113096; [2] http://lists.denx.de/pipermail/u-boot/2014-January/170424.html Signed-off-by: Fabio Estevam fabio.este...@freescale.com --- Changes since v1: - Improve commit log include/configs/mx6_common.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h index 514d634..0b8db85 100644 --- a/include/configs/mx6_common.h +++ b/include/configs/mx6_common.h @@ -17,7 +17,9 @@ #ifndef __MX6_COMMON_H #define __MX6_COMMON_H +#if defined(CONFIG_MX6Q) || defined(CONFIG_MX6DL) #define CONFIG_ARM_ERRATA_742230 +#endif #define CONFIG_ARM_ERRATA_743622 #define CONFIG_ARM_ERRATA_751472 #define CONFIG_BOARD_POSTCLK_INIT -- 1.8.1.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 2/2] mx6slevk: Include mx6_common.h
From: Fabio Estevam fabio.este...@freescale.com Include mx6_common.h so that some ARM errata are applied and also the vddsoc regulator can be changed. Signed-off-by: Fabio Estevam fabio.este...@freescale.com --- Changes since v1: - None include/configs/mx6slevk.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/configs/mx6slevk.h b/include/configs/mx6slevk.h index 7abad08..b29f78c 100644 --- a/include/configs/mx6slevk.h +++ b/include/configs/mx6slevk.h @@ -11,6 +11,7 @@ #include asm/arch/imx-regs.h #include asm/sizes.h +#include mx6_common.h #define CONFIG_MX6 #define CONFIG_DISPLAY_CPUINFO -- 1.8.1.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 1/2] configs: mx6_common: Restrict CONFIG_ARM_ERRATA_742230 for multi-core
Hi Dirk, On Wed, Jan 8, 2014 at 12:07 PM, Dirk Behme dirk.be...@de.bosch.com wrote: Just for my understanding: Is there a technical reason not to use this errata on single core (solo/sololite)? I.e. do you see any real issues using this errata on solo/sololite? No real issue. It is unneeded for single core mx6 as explained by Shawn. My real goal on this series was to enable the other ARM errata available at mx6_common.h for sololite. While reviewing the errata list, I learned that CONFIG_ARM_ERRATA_742230 is not needed for solo/solo-lite, so that's why I came up with this 1/2 patch. Regards, Fabio Estevam ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 1/2] configs: mx6_common: Restrict CONFIG_ARM_ERRATA_742230 for multi-core
Hi Fabio, On 08.01.2014 14:59, Fabio Estevam wrote: From: Fabio Estevam fabio.este...@freescale.com According to e9fd66defd (ARM: mx6: define CONFIG_ARM_ERRATA_742230), the CONFIG_ARM_ERRATA_742230 option should only be applied to multi-core variants, so restrict its usage for quad and dual-lite only. Just for my understanding: Is there a technical reason not to use this errata on single core (solo/sololite)? I.e. do you see any real issues using this errata on solo/sololite? Or is this patch just out of formal aspects? I.e. there are no positive/negative issues seen on solo/sololite, but the documentation tells that it shouldn't be used on solo/sololite, so disable it? Best regards Dirk Quoting Shawn Guo [2]: The sololite has the same core version as dual/quad - r2p10. The help text of erratum 742230 in kernel suggests that only version r1p0..r2p2 are affected. So it sounds like the erratum 742230 should be irrelevant to i.MX6 SoCs. However we were running into a reboot issue on multi-core i.MX6 SoCs. There was a quite long discussion [1] about it. Though we did not reach a conclusion in the thread, one ARM people sent me a private message, suggesting this should be an ARM core issue and workaround for erratum 742230 might help. And it turns out what he said is true. And that's why I came up with the commit e9fd66defd (ARM: mx6: define CONFIG_ARM_ERRATA_742230) to turn on the erratum for imx6 dual/quad. Shawn [1] http://lists.infradead.org/pipermail/linux-arm-kernel/2012-August/thread.html#113096; [2] http://lists.denx.de/pipermail/u-boot/2014-January/170424.html Signed-off-by: Fabio Estevam fabio.este...@freescale.com --- Changes since v1: - Improve commit log include/configs/mx6_common.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h index 514d634..0b8db85 100644 --- a/include/configs/mx6_common.h +++ b/include/configs/mx6_common.h @@ -17,7 +17,9 @@ #ifndef __MX6_COMMON_H #define __MX6_COMMON_H +#if defined(CONFIG_MX6Q) || defined(CONFIG_MX6DL) #define CONFIG_ARM_ERRATA_742230 +#endif #define CONFIG_ARM_ERRATA_743622 #define CONFIG_ARM_ERRATA_751472 #define CONFIG_BOARD_POSTCLK_INIT ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/5] imx: mx6q_4x_mt41j128.cfg: enable ecspi3 clocks
Hi Stefano, On 08/01/2014 08:24, Christian Gmeiner wrote: Signed-off-by: Christian Gmeiner christian.gmei...@gmail.com --- board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg b/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg index bb6c60b..b9e107a 100644 --- a/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg +++ b/board/freescale/imx/ddr/mx6q_4x_mt41j128.cfg @@ -144,7 +144,7 @@ DATA 4 0x021b0404 0x00011006 /* set the default clock gate to save power */ DATA 4 0x020c4068 0x00C03F3F -DATA 4 0x020c406c 0x0030FC03 +DATA 4 0x020c406c 0x0030FC33 DATA 4 0x020c4070 0x0FFFC000 DATA 4 0x020c4074 0x3FF0 DATA 4 0x020c4078 0x00FFF300 I do not think a good idea to enable the clock here. We have to set only the clocks that are required for U-Boot, letting the other ones off to save power. This is a common file, and then all boards using it will have the ecspi-3 clock turned on, even if they do not require it. Better is to set the clock inside the board file only for the boards (yours !) that need it, for example in board_early_init() Sounds like a good plan... will rework this part for the next version. thanks -- Christian Gmeiner, MSc ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 5/5] imx6: make use of lldiv(..)
Hi Stefano, 2014/1/8 Stefano Babic sba...@denx.de: Hi Christian, On 08/01/2014 08:24, Christian Gmeiner wrote: Commit 762a88ccf8540948fbf8c31b40a29d1e0684a25b introduces a 64-bit division without using the lldiv() function, which pulls in previously unused libgcc stuff. Signed-off-by: Måns Rullgård m...@mansr.com Signed-off-by: Christian Gmeiner christian.gmei...@gmail.com --- arch/arm/cpu/armv7/mx6/clock.c |3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c index 873d9d0..4eeb09b 100644 --- a/arch/arm/cpu/armv7/mx6/clock.c +++ b/arch/arm/cpu/armv7/mx6/clock.c @@ -5,6 +5,7 @@ */ #include common.h +#include div64.h #include asm/io.h #include asm/errno.h #include asm/arch/imx-regs.h @@ -123,7 +124,7 @@ static u32 mxc_get_pll_pfd(enum pll_clocks pll, int pfd_num) return 0; } - return (freq * 18) / ((div ANATOP_PFD_FRAC_MASK(pfd_num)) + return lldiv(freq * 18, (div ANATOP_PFD_FRAC_MASK(pfd_num)) ANATOP_PFD_FRAC_SHIFT(pfd_num)); } Thanks to repost this patch. I will apply it for the current release. Acked-by: Stefano Babic sba...@denx.de Fine.. one patch less to keep track of :) -- Christian Gmeiner, MSc ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 4/5] imx6: add ot1200 mr board
HI Stefano,
2014/1/8 Stefano Babic sba...@denx.de:
Hi Christian,
On 08/01/2014 08:24, Christian Gmeiner wrote:
This patch add support for one device of the Bachmann OT1200
series - the mr variant.
Nobody knows (at least, me !) what mr variant means.
its just a project name.
My first attemp was to use one u-boot binary for all OT1200
^attempt
ups
devices, but as I need to load a device-specific devicetree
I decided to go this way.
but a specific devicetree for kernel means only a different U-Boot
variable in the environment ? Sure that we are not able to manage this ?
That is correct... in the beginnings we did not stored the env in the SPI flash
but only used the default one. But that looks like a very good idea.
So I can get rid of CONFIG_SYS_VARIANT and have really only one u-boot
image for all two devices :)
Following components are used:
+ ethernet
+ usb
+ i2c
+ display connected via ldb (init and usage in linux only)
+ emmc
Signed-off-by: Christian Gmeiner christian.gmei...@gmail.com
---
board/bachmann/ot1200/Makefile |9 ++
board/bachmann/ot1200/ot1200.c | 246
boards.cfg |1 +
include/configs/ot1200.h | 241
+++
4 files changed, 497 insertions(+)
create mode 100644 board/bachmann/ot1200/Makefile
create mode 100644 board/bachmann/ot1200/ot1200.c
create mode 100644 include/configs/ot1200.h
diff --git a/board/bachmann/ot1200/Makefile b/board/bachmann/ot1200/Makefile
new file mode 100644
index 000..1bd42e8
--- /dev/null
+++ b/board/bachmann/ot1200/Makefile
@@ -0,0 +1,9 @@
+#
+# Copyright (C) 2012-2013, Guennadi Liakhovetski l...@denx.de
+# (C) Copyright 2012-2013 Freescale Semiconductor, Inc.
+# Copyright (C) 2013, Boundary Devices i...@boundarydevices.com
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y := ot1200.o
diff --git a/board/bachmann/ot1200/ot1200.c b/board/bachmann/ot1200/ot1200.c
new file mode 100644
index 000..6a884c2
--- /dev/null
+++ b/board/bachmann/ot1200/ot1200.c
@@ -0,0 +1,246 @@
+/*
+ * Copyright (C) 2010-2013 Freescale Semiconductor, Inc.
+ * Copyright (C) 2013, Bachmann electronic GmbH
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include common.h
+#include asm/arch/clock.h
+#include asm/arch/imx-regs.h
+#include asm/arch/iomux.h
+#include asm/arch/mx6-pins.h
+#include asm/imx-common/iomux-v3.h
+#include asm/imx-common/mxc_i2c.h
+#include mmc.h
+#include fsl_esdhc.h
+#include netdev.h
+#include i2c.h
+#include pca953x.h
+#include edid.h
+#include linux/fb.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP |\
+ PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \
+ PAD_CTL_SRE_FAST | PAD_CTL_HYS)
+
+#define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \
+ PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \
+ PAD_CTL_SRE_FAST | PAD_CTL_HYS)
+
+#define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP |\
+ PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
+
+#define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \
+ PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
+
+#define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
+ PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \
+ PAD_CTL_ODE | PAD_CTL_SRE_FAST)
+
+#define OUTPUT_40OHM (PAD_CTL_SPEED_MED|PAD_CTL_DSE_40ohm)
+
+int dram_init(void)
+{
+ gd-ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE);
+
+ return 0;
+}
+
+static iomux_v3_cfg_t const uart1_pads[] = {
+ MX6_PAD_CSI0_DAT10__UART1_TXD | MUX_PAD_CTRL(UART_PAD_CTRL),
+ MX6_PAD_CSI0_DAT11__UART1_RXD | MUX_PAD_CTRL(UART_PAD_CTRL),
+};
+
+static void setup_iomux_uart(void)
+{
+ imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
+}
+
+static iomux_v3_cfg_t const enet_pads[] = {
+ MX6_PAD_KEY_ROW1__ENET_COL | MUX_PAD_CTRL(ENET_PAD_CTRL),
+ MX6_PAD_KEY_COL3__ENET_CRS | MUX_PAD_CTRL(ENET_PAD_CTRL),
+ MX6_PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL),
+ MX6_PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL),
+ MX6_PAD_GPIO_16__ENET_ETHERNET_REF_OUT | MUX_PAD_CTRL(ENET_PAD_CTRL),
+ MX6_PAD_GPIO_18__ENET_RX_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL),
+ MX6_PAD_ENET_RXD0__ENET_RDATA_0 | MUX_PAD_CTRL(ENET_PAD_CTRL),
+ MX6_PAD_ENET_RXD1__ENET_RDATA_1 | MUX_PAD_CTRL(ENET_PAD_CTRL),
+ MX6_PAD_KEY_COL2__ENET_RDATA_2 | MUX_PAD_CTRL(ENET_PAD_CTRL),
+ MX6_PAD_KEY_COL0__ENET_RDATA_3 | MUX_PAD_CTRL(ENET_PAD_CTRL),
+ MX6_PAD_ENET_CRS_DV__ENET_RX_EN | MUX_PAD_CTRL(ENET_PAD_CTRL),
+ MX6_PAD_ENET_REF_CLK__ENET_TX_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL),
+ MX6_PAD_ENET_TXD0__ENET_TDATA_0 | MUX_PAD_CTRL(ENET_PAD_CTRL),
+ MX6_PAD_ENET_TXD1__ENET_TDATA_1 |
Re: [U-Boot] When will orphan boards removed?
-BEGIN PGP SIGNED MESSAGE- Hash: SHA1 On 01/08/2014 01:17 AM, Masahiro Yamada wrote: Hello Tom, Albert. When will Orphan boards in boards.cfg removed? Well, somewhere between when they're a problem and when someone says I'd like to remove So, if you'd like to start the next merge window off with dumping a large number of orphan boards, I'm OK with that as I imagine that'll make your Kbuild series easier. - -- Tom -BEGIN PGP SIGNATURE- Version: GnuPG v1.4.11 (GNU/Linux) Comment: Using GnuPG with Thunderbird - http://www.enigmail.net/ iQIcBAEBAgAGBQJSzW1xAAoJENk4IS6UOR1W+F0P/3NqRD7sKoZuSgV5GXV0ldQI jtPpTVpW0iJzLRK3RKfA0Q6NQNTp9SV+hGLO9x/FTvzXsDnVRHDaw75Jjfdu3D7Q pTCjWPFIqlhuBKdWNvuk8y95DQCkkrqx8DquLz/aC36oDzR1d6s58QP/LZg/8Szg nGVcrJNcE39eL+x9l2DYgO3xcs9zr61HOpLrkqMaEsYpIBkL9PjI7KyGN6HzR9EU v7CM5Ay3fT5XGiPk/llgoamiHXP/0u0g4caHbufJg7z4AocTdP5G+DDAK/AUL+ni Pz8oah3p/SF/7Rdsa7OPqwU3XXg2ebsX4atJAgMU8YSjd9yCkGjCFvPs+Q/Js+lE jI1RTw7hyv3YbQYX6jUaJdJlgPbKkScdCgOBmGCG1mTnKRdHcFTar2r1UjAA23GY lR96/v4YwyDkrNhiPUIDO47nJ+Cs6JhMDhFGaf+fGiZ5MLKSa2VJUjOknsK2moT/ bs0hGT3MQBYKI9aNMyrdjPhwCEfKVliMf3o4MC6khyBDZ5LTRJdfC+DZ6NoNt+DU zY/hC8yBTebhBZfGdIYjx5MzkC1m8eXD6kjfxyTCJuy2hUl4lGe7ItsrlBlKG3Yt p0t/VicbXkesST3creFc0uTGa9Uvr+eQYdHpczQi6Qg5vschU5Q+lJ+LWYCLKWxs 3rigqayi6gC2bnzyCtlr =wUf7 -END PGP SIGNATURE- ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Pull request for u-boot-marvell.git
Hi Prafulla, On Mon, 6 Jan 2014 04:38:43 -0800, Prafulla Wadaskar prafu...@marvell.com wrote: Hi Albert, Please pull The following changes since commit 4b0561d84198f8d696fd51cfc27aeac8c7482a8c: Albert ARIBAUD (1): Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master' are available in the git repository at: u-boot-marvell.git master branch. Holger Brunck (1): arm/km: fix i2c mux define for km_kirkwood_128m16 target Karlheinz Jerg (1): arm/km: add support for km_kirkwood_128m16 board Luka Perkov (1): kirkwood: ib62x0: use device tree and update config boards.cfg|1 + include/configs/ib62x0.h | 38 +++--- include/configs/km_kirkwood.h | 10 ++ 3 files changed, 34 insertions(+), 15 deletions(-) Regards... Prafulla . . . Applied to u-boot-arm/master, thanks! Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4 09/29] zynq-common: Rename zynq with zynq-common
Hi Jagannadha, On Wed, 8 Jan 2014 15:53:16 +0530, Jagannadha Sutradharudu Teki jagannadha.sutradharudu-t...@xilinx.com wrote: zynq.h - zynq-common.h, zynq-common is Common configuration options for all Zynq boards. zynq.h is no longer exists hense removed from boards.cfg Note this did not cleanly apply to arm/master and had to be manually fixed. Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] include/mmc.h: Remove declaration for spl_mmc_load()
Hi Lad, On Dec 3, 2013, at 8:47 AM, Lad, Prabhakar wrote: From: Lad, Prabhakar prabhakar.cse...@gmail.com The spl_mmc_load() was removed while converting to CONFIG_SPL_FRAMEWORK usage the definition was removed but the declaration was missed. This patch removes this declaration. Signed-off-by: Lad, Prabhakar prabhakar.cse...@gmail.com --- include/mmc.h |1 - 1 file changed, 1 deletion(-) diff --git a/include/mmc.h b/include/mmc.h index cb558da..8f51c93 100644 --- a/include/mmc.h +++ b/include/mmc.h @@ -304,7 +304,6 @@ int board_mmc_getcd(struct mmc *mmc); int mmc_switch_part(int dev_num, unsigned int part_num); int mmc_getcd(struct mmc *mmc); int mmc_getwp(struct mmc *mmc); -void spl_mmc_load(void) __noreturn; /* Function to change the size of boot partition and rpmb partitions */ int mmc_boot_partition_size_change(struct mmc *mmc, unsigned long bootsize, unsigned long rpmbsize); -- 1.7.9.5 Acked-by: Pantelis Antoniou pa...@antoniou-consulting.com ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] x86: delete unused header files
On 8 January 2014 04:10, Masahiro Yamada yamad...@jp.panasonic.com wrote: Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com Acked-by: Simon Glass s...@chromium.org ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] uboot post for arm
Hi, On 6 January 2014 04:09, shobin sho...@live.com wrote: Hi all, Any one please tell me how to enable post for arm in uboot?i am using uboot-toradex for colibri t20 module.(My goal is to check the hardware peripherals is ok/not at boot itme).Please tell me a solution. I've not used this on ARM, you may need changes to implement it. How will you output the POST messages? Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] MAKEALL
Hi York, On 4 January 2014 02:21, Wolfgang Denk w...@denx.de wrote: Dear York, In message 52c7424a.4090...@freescale.com you wrote: I have some troubles to run MAKEALL with BUILD_NBUILDS. If I set BUILD_NBUILDS to 2 or greater, there is a good chance the total number of targets is not an integral multiple of BUILD_NBUILDS. It has two undesired results. 1. The status report has wrong number of passed builds. 2. This script throws out SIGTERM. The second one is troubling me. I am using Jenkins to monitor and build automatically. I can trap the SIGTERM on some hosts but not all of them. Can you shed some light on this? I'm sorry, but I am not familiar with this BUILD_NBUILDS code at all. It was added by Andy Fleming, so maybe he can help. Andy? It might also be worth looking at tools/buildman, which automatically allocates one build thread per CPU. Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Interrupts in U-Boot
Hi, On 2 January 2014 07:18, Parimala Baggiri baggiriparim...@gmail.com wrote: Hello, Does U-Boot support interrupt handling for ARM processors? If it is not supporting can I add it on my own? There is very basic support, in terms of setting up the vectors. I believe the IRQ is supported for a timer in some cases. You may need to do a little work though. Be careful that interrupt use in U-Boot is discouraged, to keep things simple. Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2] mmc/dwmmc: Using calloc instead malloc
Hi Chin,
On Dec 18, 2013, at 7:16 PM, Chin Liang See wrote:
To enhance the SDMMC DesignWare driver to use calloc instead of
malloc. This will avoid the incident that uninitialized members
of mmc structure are later used for NULL comparison.
Signed-off-by: Chin Liang See cl...@altera.com
Cc: Rajeshwari Shinde rajeshwar...@samsung.com
Cc: Jaehoon Chung jh80.ch...@samsung.com
Cc: Mischa Jonker mjon...@synopsys.com
Cc: Alexey Brodkin abrod...@synopsys.com
Cc: Andy Fleming aflem...@freescale.com
Cc: Pantelis Antoniou pa...@antoniou-consulting.com
---
Changes for v2
- Adding u-boot-mmc maintainer
---
drivers/mmc/dw_mmc.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
mode change 100644 = 100755 drivers/mmc/dw_mmc.c
diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
old mode 100644
new mode 100755
index 19d9b0b..82abe19
--- a/drivers/mmc/dw_mmc.c
+++ b/drivers/mmc/dw_mmc.c
@@ -336,9 +336,9 @@ int add_dwmci(struct dwmci_host *host, u32 max_clk, u32
min_clk)
struct mmc *mmc;
int err = 0;
- mmc = malloc(sizeof(struct mmc));
+ mmc = calloc(sizeof(struct mmc), 1);
if (!mmc) {
- printf(mmc malloc fail!\n);
+ printf(mmc calloc fail!\n);
return -1;
}
--
1.7.9.5
Applied, thanks
Acked-by: Pantelis Antoniou pa...@antoniou-consulting.com
___
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Re: [U-Boot] [PATCH] ARM: omap5_uevm: Enable 8-bit eMMC access
Hi Lubomir, On Dec 19, 2013, at 5:14 PM, Lubomir Popov wrote: All prerequisites are already available, so why not enable 8-bit access - it is a matter of a define in the board file only. Signed-off-by: Lubomir Popov l-po...@ti.com --- include/configs/omap5_uevm.h |1 + 1 file changed, 1 insertion(+) diff --git a/include/configs/omap5_uevm.h b/include/configs/omap5_uevm.h index 96b5f23..3c479db 100644 --- a/include/configs/omap5_uevm.h +++ b/include/configs/omap5_uevm.h @@ -36,6 +36,7 @@ #define CONFIG_EFI_PARTITION #define CONFIG_PARTITION_UUIDS #define CONFIG_CMD_PART +#define CONFIG_HSMMC2_8BIT /* Required support for the TCA642X GPIO we have on the uEVM */ #define CONFIG_TCA642X -- 1.7.9.5 Applied, thanks Acked-by: Pantelis Antoniou pa...@antoniou-consulting.com ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4 00/29] zynq: More boards support
Hi Jagannadha, On Wed, 8 Jan 2014 15:53:07 +0530, Jagannadha Sutradharudu Teki jagannadha.sutradharudu-t...@xilinx.com wrote: These changes are from u-boot-xlnx.git repo from git.xilinx.com and in addition of basic fdt support. This repo is well tested on xilinx zynq platform, hence pushing the same on upstream. Excluded qspi and nand changes from previous series. Please note that all this series available in u-boot-spi.git/master-xlnx repo. -- Thanks, Jagan. Changes for v4: - rebase to master - Removed CONFIG_SYS_NO_FLASH in zynq-common.h As the series was rebased tu u-boot/master, not u-boot-arm/master, all patches adding board support failed to apply properly due to boards.cfg differences. I did resolve these manually, but at build-test time, all Zynq boards failed with Makefile:11: *** Please define CONFIG_DEFAULT_DEVICE_TREE in your board header file. Stop. -- and were the only ones to do so. Jagan, can you look into this and produce a v5 which can build on ARM? Amicalement, -- Albert. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4 00/29] zynq: More boards support
Hi Albert, On Wed, Jan 8, 2014 at 10:44 PM, Albert ARIBAUD albert.u.b...@aribaud.net wrote: Hi Jagannadha, On Wed, 8 Jan 2014 15:53:07 +0530, Jagannadha Sutradharudu Teki jagannadha.sutradharudu-t...@xilinx.com wrote: These changes are from u-boot-xlnx.git repo from git.xilinx.com and in addition of basic fdt support. This repo is well tested on xilinx zynq platform, hence pushing the same on upstream. Excluded qspi and nand changes from previous series. Please note that all this series available in u-boot-spi.git/master-xlnx repo. -- Thanks, Jagan. Changes for v4: - rebase to master - Removed CONFIG_SYS_NO_FLASH in zynq-common.h As the series was rebased tu u-boot/master, not u-boot-arm/master, all patches adding board support failed to apply properly due to boards.cfg differences. Yes - I saw this i'll rebase your u-boot-arm/master then. I did resolve these manually, but at build-test time, all Zynq boards failed with Makefile:11: *** Please define CONFIG_DEFAULT_DEVICE_TREE in your board header file. Stop. -- and were the only ones to do so. Actually build will successful when you give the dts at runtime while building u-boot like Linux style. $ make DEVICE_TREE=dts_file_name ex: make DEVICE_TREE=zynq-zc702 This is the reason I am not defining this on individual pre-board configs. I guess this could be fine, please comment. -- Thanks, Jagan. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 00/11 V13] EXYNOS5420: Add SMDK5420 board support
Him On 31 December 2013 00:34, Minkyu Kang mk7.k...@samsung.com wrote: On 26/12/13 13:14, Rajeshwari S Shinde wrote: This patch adds basic board support for SMDK5420 board. These patches are tested for booting fine on EVT1 SMDK5420. Rajeshwari S Shinde (11): EXYNOS5: Create a common board file Exynos5420: Add base addresses for 5420 EXYNOS5420: Add power register structure. EXYNOS5420: Add dmc and phy_control register structure Exynos5420: Add clock initialization for 5420 Exynos5420: Add DDR3 initialization for 5420 Exynos5420: Add support for 5420 in pinmux and gpio Exynos5420: Add base patch for SMDK5420 DTS: Add dts support for SMDK5420 Config: Add initial config for SMDK5420 SPL: EXYNOS: Prepare for variable size SPL support arch/arm/cpu/armv7/exynos/clock.c | 279 - arch/arm/cpu/armv7/exynos/clock_init.h | 17 + arch/arm/cpu/armv7/exynos/clock_init_exynos5.c | 352 ++- arch/arm/cpu/armv7/exynos/dmc_common.c | 60 +- arch/arm/cpu/armv7/exynos/dmc_init_ddr3.c | 439 - arch/arm/cpu/armv7/exynos/exynos5_setup.h | 764 -- arch/arm/cpu/armv7/exynos/pinmux.c | 260 +++- arch/arm/dts/exynos5.dtsi | 198 ++ arch/arm/dts/exynos5250.dtsi | 194 +- arch/arm/dts/exynos5420.dtsi | 70 +++ arch/arm/include/asm/arch-exynos/board.h | 17 + arch/arm/include/asm/arch-exynos/clk.h | 1 + arch/arm/include/asm/arch-exynos/clock.h | 494 +++ arch/arm/include/asm/arch-exynos/cpu.h | 52 +- arch/arm/include/asm/arch-exynos/dmc.h | 177 ++ arch/arm/include/asm/arch-exynos/gpio.h| 143 - arch/arm/include/asm/arch-exynos/periph.h | 3 + arch/arm/include/asm/arch-exynos/power.h | 837 + board/samsung/common/Makefile | 4 + board/samsung/common/board.c | 408 board/samsung/dts/exynos5420-smdk5420.dts | 169 + board/samsung/smdk5250/exynos5-dt.c| 350 +-- board/samsung/smdk5250/smdk5250.c | 182 +- board/samsung/smdk5420/Makefile| 11 + board/samsung/smdk5420/smdk5420.c | 159 + board/samsung/smdk5420/smdk5420_spl.c | 52 ++ boards.cfg | 1 + include/configs/arndale.h | 1 + include/configs/exynos5-dt.h | 290 + include/configs/exynos5250-dt.h| 284 + include/configs/smdk5420.h | 56 ++ spl/Makefile | 7 +- tools/Makefile | 3 +- tools/mkexynosspl.c| 167 +++-- 34 files changed, 5187 insertions(+), 1314 deletions(-) create mode 100644 arch/arm/dts/exynos5.dtsi create mode 100644 arch/arm/dts/exynos5420.dtsi create mode 100644 arch/arm/include/asm/arch-exynos/board.h create mode 100644 board/samsung/common/board.c create mode 100644 board/samsung/dts/exynos5420-smdk5420.dts create mode 100644 board/samsung/smdk5420/Makefile create mode 100644 board/samsung/smdk5420/smdk5420.c create mode 100644 board/samsung/smdk5420/smdk5420_spl.c create mode 100644 include/configs/exynos5-dt.h create mode 100644 include/configs/smdk5420.h applied to u-boot-samsung. Congrats on getting this in! Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] spi: sh_qspi: Add header file that defines the address of registers
Hi Nobuhiro Iwamatsu, On Wed, Jan 8, 2014 at 6:46 AM, Nobuhiro Iwamatsu nobuhiro.iwamatsu...@renesas.com wrote: Signed-off-by: Nobuhiro Iwamatsu nobuhiro.iwamatsu...@renesas.com --- drivers/spi/sh_qspi.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/spi/sh_qspi.c b/drivers/spi/sh_qspi.c index edeb42d..77ede6b 100644 --- a/drivers/spi/sh_qspi.c +++ b/drivers/spi/sh_qspi.c @@ -10,6 +10,7 @@ #include common.h #include malloc.h #include spi.h +#include asm/arch/rmobile.h #include asm/io.h /* SH QSPI register bit masks REG_BIT */ @@ -170,7 +171,7 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, return NULL; } - ss-regs = (struct sh_qspi_regs *)CONFIG_SH_QSPI_BASE; + ss-regs = (struct sh_qspi_regs *)SH_QSPI_BASE; I really don't understand where you define this macro. -- Thanks, Jagan. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] powerpc/mpc85xx: Revise workaround for DDR A003474
Existing workaround only handles one RDIMM on reference design. In case
two RDIMMs are used, the workaround requires two separate writes to
DDR_SDRAM_MD_CNTL register.
This patch also restores two registers changed by the workaround.
Signed-off-by: York Sun york...@freescale.com
---
drivers/ddr/fsl/mpc85xx_ddr_gen3.c | 59 ++--
1 file changed, 57 insertions(+), 2 deletions(-)
diff --git a/drivers/ddr/fsl/mpc85xx_ddr_gen3.c
b/drivers/ddr/fsl/mpc85xx_ddr_gen3.c
index 9f04133..864976f 100644
--- a/drivers/ddr/fsl/mpc85xx_ddr_gen3.c
+++ b/drivers/ddr/fsl/mpc85xx_ddr_gen3.c
@@ -39,6 +39,9 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs,
unsigned int csn_bnds_backup = 0, cs_sa, cs_ea, *csn_bnds_t;
int csn = -1;
#endif
+#ifdef CONFIG_SYS_FSL_ERRATUM_DDR_A003
+ u32 save1, save2;
+#endif
switch (ctrl_num) {
case 0:
@@ -197,6 +200,8 @@ step2:
out_be32(ddr-ddr_wrlvl_cntl, regs-ddr_wrlvl_cntl
0x7fff);
out_be32(ddr-sdram_cfg_2, regs-ddr_sdram_cfg_2 0xffeb);
out_be32(ddr-mtcr, 0);
+ save1 = in_be32(ddr-debug[12]);
+ save2 = in_be32(ddr-debug[21]);
out_be32(ddr-debug[12], 0x0015);
out_be32(ddr-debug[21], 0x2400);
out_be32(ddr-sdram_interval, regs-ddr_sdram_interval
0x);
@@ -214,6 +219,16 @@ step2:
0x0400 |
MD_CNTL_WRCW|
MD_CNTL_MD_VALUE(0x02));
+#if (CONFIG_DIMM_SLOTS_PER_CTLR == 2)
+ if (!(regs-cs[2].config SDRAM_CS_CONFIG_EN))
+ break;
+ out_be32(ddr-sdram_md_cntl,
+MD_CNTL_MD_EN |
+MD_CNTL_CS_SEL_CS2_CS3 |
+0x0400 |
+MD_CNTL_WRCW |
+MD_CNTL_MD_VALUE(0x02));
+#endif
break;
case 0x0010:
out_be32(ddr-sdram_md_cntl,
@@ -222,6 +237,16 @@ step2:
0x0400 |
MD_CNTL_WRCW|
MD_CNTL_MD_VALUE(0x0a));
+#if (CONFIG_DIMM_SLOTS_PER_CTLR == 2)
+ if (!(regs-cs[2].config SDRAM_CS_CONFIG_EN))
+ break;
+ out_be32(ddr-sdram_md_cntl,
+MD_CNTL_MD_EN |
+MD_CNTL_CS_SEL_CS2_CS3 |
+0x0400 |
+MD_CNTL_WRCW |
+MD_CNTL_MD_VALUE(0x0a));
+#endif
break;
case 0x0020:
out_be32(ddr-sdram_md_cntl,
@@ -230,6 +255,16 @@ step2:
0x0400 |
MD_CNTL_WRCW|
MD_CNTL_MD_VALUE(0x12));
+#if (CONFIG_DIMM_SLOTS_PER_CTLR == 2)
+ if (!(regs-cs[2].config SDRAM_CS_CONFIG_EN))
+ break;
+ out_be32(ddr-sdram_md_cntl,
+MD_CNTL_MD_EN |
+MD_CNTL_CS_SEL_CS2_CS3 |
+0x0400 |
+MD_CNTL_WRCW |
+MD_CNTL_MD_VALUE(0x12));
+#endif
break;
case 0x0030:
out_be32(ddr-sdram_md_cntl,
@@ -238,6 +273,16 @@ step2:
0x0400 |
MD_CNTL_WRCW|
MD_CNTL_MD_VALUE(0x1a));
+#if (CONFIG_DIMM_SLOTS_PER_CTLR == 2)
+ if (!(regs-cs[2].config SDRAM_CS_CONFIG_EN))
+ break;
+ out_be32(ddr-sdram_md_cntl,
+MD_CNTL_MD_EN |
+MD_CNTL_CS_SEL_CS2_CS3 |
+0x0400 |
+MD_CNTL_WRCW |
+MD_CNTL_MD_VALUE(0x1a));
+#endif
break;
default:
out_be32(ddr-sdram_md_cntl,
@@ -246,6 +291,16 @@ step2:
0x0400 |
MD_CNTL_WRCW|
MD_CNTL_MD_VALUE(0x02));
+#if (CONFIG_DIMM_SLOTS_PER_CTLR == 2)
+ if (!(regs-cs[2].config SDRAM_CS_CONFIG_EN))
+
Re: [U-Boot] [PATCH] powerpc/mpc85xx: Revise workaround for DDR A003474
On 01/08/2014 10:17 AM, York Sun wrote: Existing workaround only handles one RDIMM on reference design. In case two RDIMMs are used, the workaround requires two separate writes to DDR_SDRAM_MD_CNTL register. This patch also restores two registers changed by the workaround. Signed-off-by: York Sun york...@freescale.com Ignore this patch. I made a typo on the subject. v2 is coming. York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [Patch v2] powerpc/mpc85xx: Revise workaround for DDR-A003
Existing workaround only handles one RDIMM on reference design. In case
of two RDIMMs being used, the workaround requires two separate writes to
DDR_SDRAM_MD_CNTL register.
This patch also restores two debug registers changed by the workaround.
This change has been tested on P4080 v2 platform with one and two RDIMMs
for each controller.
Signed-off-by: York Sun york...@freescale.com
Tested-by: Ben Collins be...@servergy.com
CC: James Yang james.y...@freescale.com
---
Change log:
v2: Revise commit message
drivers/ddr/fsl/mpc85xx_ddr_gen3.c | 59 ++--
1 file changed, 57 insertions(+), 2 deletions(-)
diff --git a/drivers/ddr/fsl/mpc85xx_ddr_gen3.c
b/drivers/ddr/fsl/mpc85xx_ddr_gen3.c
index 9f04133..864976f 100644
--- a/drivers/ddr/fsl/mpc85xx_ddr_gen3.c
+++ b/drivers/ddr/fsl/mpc85xx_ddr_gen3.c
@@ -39,6 +39,9 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs,
unsigned int csn_bnds_backup = 0, cs_sa, cs_ea, *csn_bnds_t;
int csn = -1;
#endif
+#ifdef CONFIG_SYS_FSL_ERRATUM_DDR_A003
+ u32 save1, save2;
+#endif
switch (ctrl_num) {
case 0:
@@ -197,6 +200,8 @@ step2:
out_be32(ddr-ddr_wrlvl_cntl, regs-ddr_wrlvl_cntl
0x7fff);
out_be32(ddr-sdram_cfg_2, regs-ddr_sdram_cfg_2 0xffeb);
out_be32(ddr-mtcr, 0);
+ save1 = in_be32(ddr-debug[12]);
+ save2 = in_be32(ddr-debug[21]);
out_be32(ddr-debug[12], 0x0015);
out_be32(ddr-debug[21], 0x2400);
out_be32(ddr-sdram_interval, regs-ddr_sdram_interval
0x);
@@ -214,6 +219,16 @@ step2:
0x0400 |
MD_CNTL_WRCW|
MD_CNTL_MD_VALUE(0x02));
+#if (CONFIG_DIMM_SLOTS_PER_CTLR == 2)
+ if (!(regs-cs[2].config SDRAM_CS_CONFIG_EN))
+ break;
+ out_be32(ddr-sdram_md_cntl,
+MD_CNTL_MD_EN |
+MD_CNTL_CS_SEL_CS2_CS3 |
+0x0400 |
+MD_CNTL_WRCW |
+MD_CNTL_MD_VALUE(0x02));
+#endif
break;
case 0x0010:
out_be32(ddr-sdram_md_cntl,
@@ -222,6 +237,16 @@ step2:
0x0400 |
MD_CNTL_WRCW|
MD_CNTL_MD_VALUE(0x0a));
+#if (CONFIG_DIMM_SLOTS_PER_CTLR == 2)
+ if (!(regs-cs[2].config SDRAM_CS_CONFIG_EN))
+ break;
+ out_be32(ddr-sdram_md_cntl,
+MD_CNTL_MD_EN |
+MD_CNTL_CS_SEL_CS2_CS3 |
+0x0400 |
+MD_CNTL_WRCW |
+MD_CNTL_MD_VALUE(0x0a));
+#endif
break;
case 0x0020:
out_be32(ddr-sdram_md_cntl,
@@ -230,6 +255,16 @@ step2:
0x0400 |
MD_CNTL_WRCW|
MD_CNTL_MD_VALUE(0x12));
+#if (CONFIG_DIMM_SLOTS_PER_CTLR == 2)
+ if (!(regs-cs[2].config SDRAM_CS_CONFIG_EN))
+ break;
+ out_be32(ddr-sdram_md_cntl,
+MD_CNTL_MD_EN |
+MD_CNTL_CS_SEL_CS2_CS3 |
+0x0400 |
+MD_CNTL_WRCW |
+MD_CNTL_MD_VALUE(0x12));
+#endif
break;
case 0x0030:
out_be32(ddr-sdram_md_cntl,
@@ -238,6 +273,16 @@ step2:
0x0400 |
MD_CNTL_WRCW|
MD_CNTL_MD_VALUE(0x1a));
+#if (CONFIG_DIMM_SLOTS_PER_CTLR == 2)
+ if (!(regs-cs[2].config SDRAM_CS_CONFIG_EN))
+ break;
+ out_be32(ddr-sdram_md_cntl,
+MD_CNTL_MD_EN |
+MD_CNTL_CS_SEL_CS2_CS3 |
+0x0400 |
+MD_CNTL_WRCW |
+MD_CNTL_MD_VALUE(0x1a));
+#endif
break;
default:
out_be32(ddr-sdram_md_cntl,
@@ -246,6 +291,16 @@ step2:
0x0400 |
