Re: [U-Boot] [Patch 2/3] Revert "e1000: fix sw fw sync on igb i210/i211"

On Fri, 2015-07-10 at 08:47 -0700, Tim Harvey wrote: > > Marcel, > > Could you give an 'acked-by' if you agree with this series? I would > like to see it merged: > > https://patchwork.ozlabs.org/patch/473997/ > https://patchwork.ozlabs.org/patch/473998/ > https://patchwork.ozlabs.org/patch/473996

Re: [U-Boot] [PATCH V2 03/15] imx: mx6ul: Update imx registers head file

On Saturday, July 11, 2015 at 10:07:11 AM, Peng Fan wrote: > 1. Update imx register base address for i.MX6UL. > 2. Remove duplicated MXS_APBH/GPMI/BCH_BASE. > 3. Remove #ifdef for register addresses that equal to >"AIPS2_OFF_BASE_ADDR + 0x34000" for different chips. > 4. According fuse map, com

Re: [U-Boot] [PATCH V2 02/15] imx: mx6ul: Add pins IOMUX head file

On Saturday, July 11, 2015 at 10:07:10 AM, Peng Fan wrote: > Add i.MX6UL pins IOMUX file which defines the IOMUX settings for choose. > > Signed-off-by: Peng Fan > Signed-off-by: Ye.Li > --- > > Changes v2: > none > > arch/arm/include/asm/arch-mx6/mx6-pins.h |2 + > arch/arm/include/as

[U-Boot] [PATCH] common/lcd_console: fix console/logo regression

From: Marcel Ziswiler The following commit changed the order of the column vs. row parameter to the lcd_init_console() function but missed actually changing it as well the second time it is called from lcd_clear() which resulted in a garbled text console which this patch fixes. commit 604c7d4a5a

Re: [U-Boot] [PATCH] musb: set MUSB speed based on CONFIG

Hi, On 10-07-15 17:31, Bin Liu wrote: Hi, On 07/10/2015 10:12 AM, Heiko Schocher wrote: Hello Samuel, Am 10.07.2015 um 16:50 schrieb Egli, Samuel: Hi Hans, -Original Message- From: Hans de Goede [mailto:hdego...@redhat.com] Sent: Freitag, 10. Juli 2015 16:37 To: Egli, Samuel; ma...

Re: [U-Boot] [PATCH] musb: set MUSB speed based on CONFIG

Hi, On 10-07-15 17:31, Bin Liu wrote: Hi, On 07/10/2015 10:12 AM, Heiko Schocher wrote: Hello Samuel, Am 10.07.2015 um 16:50 schrieb Egli, Samuel: Hi Hans, -Original Message- From: Hans de Goede [mailto:hdego...@redhat.com] Sent: Freitag, 10. Juli 2015 16:37 To: Egli, Samuel; ma...

[U-Boot] [PATCH V2 14/15] imx: imx6_spl add mx6ul support

i.MX6UL's DRAM space starts from 0x8000, same to i.MX6SX, so use same address with i.MX6SX. Signed-off-by: Peng Fan --- Changes v2: new patch include/configs/imx6_spl.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/imx6_spl.h b/include/configs/imx6_sp

[U-Boot] [PATCH V2 13/15] imx:mx6ul add dram spl configuration and header file

1. Define two structures mx6ul_iomux_ddr_regs and mx6ul_iomux_grp_regs. 2. Add a new function mx6ul_dram_iocfg to configure dram io. 3. Refactor MMDC1 macro, discard "#ifdef CONFIG_MX6SX". Since only mmdc0 channel exists on i.MX6SX/UL, redefine MMDC1 macro support runtime check, but not hardc

[U-Boot] [PATCH V2 15/15] imx: mx6ul_14x14_evk add basic board support

1. Add USDHC, I2C, UART, 74LV, USB, QSPI support. 2. Support SPL 3. CONFIG_MX6UL_14X14_EVK_EMMC_REWORK is introduced, this board default supports sd for usdhc2, but can do hardware rework to make usdhc2 support emmc. Signed-off-by: Peng Fan --- Changes v2: Add SPL support More commit msg

[U-Boot] [PATCH V2 12/15] mx6_common: Fix LOADADDR and SYS_TEXT_BASE for i.MX6UL

DRAM space starts from 0x8000 for i.MX6UL, so need to fix LOADADDR, SYS_TEXT_BASE. Signed-off-by: Peng Fan --- Changes v2: refine commit msg. include/configs/mx6_common.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/mx6_common.h b/include/configs/mx6

[U-Boot] [PATCH V2 10/15] imx: mx6 add PAD_CTL_SPEED_LOW for i.MX6SX/UL

PAD_CTL_SPEED_LOW for i.MX6SX/UL is (0 << 6) Signed-off-by: Ye.Li Signed-off-by: Peng Fan --- Changes v2: none arch/arm/include/asm/imx-common/iomux-v3.h | 4 1 file changed, 4 insertions(+) diff --git a/arch/arm/include/asm/imx-common/iomux-v3.h b/arch/arm/include/asm/imx-common/iomu

[U-Boot] [PATCH V2 11/15] mxc: gpio add i.MX6UL support

i.MX6UL does not have GPIO6/7, so do not include them for i.MX6UL. Signed-off-by: Peng Fan --- Changes v2: none drivers/gpio/mxc_gpio.c | 4 1 file changed, 4 insertions(+) diff --git a/drivers/gpio/mxc_gpio.c b/drivers/gpio/mxc_gpio.c index 2012f99..57a650f 100644 --- a/drivers/gpio/mx

[U-Boot] [PATCH V2 09/15] imx: mx6ul update soc related settings

1.Update WDOG settings. 2.No need to gate/ungate all PFDs for i.MX6UL. Signed-off-by: Peng Fan Signed-off-by: Ye.Li --- Changes v2: runtime check for wdog part. arch/arm/cpu/armv7/mx6/soc.c | 9 - 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/arch/arm/cpu/armv7/mx6/so

[U-Boot] [PATCH V2 08/15] imx: mx6ul select SYS_L2CACHE_OFF

i.MX6UL features an Cortex-A7 core, it does not have PL310 as other i.MX6 chips. To Cortex-A7 core, If D-Cache is enabled, L2 Cache is enabled. There is on specific switch for on/off L2 Cache, so default select SYS_L2CACHE_OFF. Signed-off-by: Peng Fan --- Changes v2: refine commit msg. arch/a

[U-Boot] [PATCH V2 07/15] imx:mx6ul add clock support

1. Add enet, uart, i2c, ipg clock support for i.MX6UL. 2. Correct get_periph_clk, it should account for MXC_CCM_CBCDR_PERIPH_CLK2_PODF_MASK. 3. Refactor get_mmdc_ch0_clk to make all i.MX6 share one function, but not use 'ifdef'. 4. Use CONFIG_FSL_QSPI for enable_qspi_clk, but not #ifdef CONFI

[U-Boot] [PATCH V2 05/15] imx-common: timer: add i.MX6UL support

Add i.MX6UL GPT timer support. Signed-off-by: Peng Fan --- Changes v2: system counter patch is removed. Now, defaut use gpt. arch/arm/imx-common/timer.c | 8 +--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/arch/arm/imx-common/timer.c b/arch/arm/imx-common/timer.c index

[U-Boot] [PATCH V2 04/15] imx: mx6ul Add CONFIG_SYS_CACHELINE_SIZE for i.MX6UL

Since i.MX6UL's cache line size is 64bytes, need to define the macro CONFIG_SYS_CACHELINE_SIZE to 64 for i.MX6UL. Signed-off-by: Peng Fan --- Changes v2: new patch, splitted from patch 03/15. arch/arm/include/asm/arch-mx6/imx-regs.h | 4 1 file changed, 4 insertions(+) diff --git a/arch

[U-Boot] [PATCH V2 06/15] imx: mx6ul remove errata for i.MX6UL

Since i.MX6UL use A7 core, but not A9 core, we do not need the erratas for i.MX6UL. Signed-off-by: Ye.Li Signed-off-by: Peng Fan --- Changes v2: remove the system counter define, since default use GPT now. include/configs/mx6_common.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)

[U-Boot] [PATCH V2 02/15] imx: mx6ul: Add pins IOMUX head file

Add i.MX6UL pins IOMUX file which defines the IOMUX settings for choose. Signed-off-by: Peng Fan Signed-off-by: Ye.Li --- Changes v2: none arch/arm/include/asm/arch-mx6/mx6-pins.h |2 + arch/arm/include/asm/arch-mx6/mx6ul_pins.h | 1065 2 files changed, 106

[U-Boot] [PATCH V2 03/15] imx: mx6ul: Update imx registers head file

1. Update imx register base address for i.MX6UL. 2. Remove duplicated MXS_APBH/GPMI/BCH_BASE. 3. Remove #ifdef for register addresses that equal to "AIPS2_OFF_BASE_ADDR + 0x34000" for different chips. 4. According fuse map, complete fuse_bank4_regs. 5. Move AIPS3_ARB_BASE_ADDR and AIPS3_ARB_END_

[U-Boot] [PATCH V2 01/15] imx: mx6ul: Add i.MX6UL CPU type

Add MXC_CPU_MX6UL for i.MX6UL CPU type which is got at runtime from DIGPROG register. But the value has been occupied by MXC_CPU_MX6D which is not real id from DIGPROG register, so change i.MX6D to value 0x67 which is not used now. Signed-off-by: Peng Fan Signed-off-by: Ye.Li --- Changes v2: R

[U-Boot] [PATCH V2 00/15] imx: Add i.MX6UL and basic board support

Add i.MX 6UltraLite support and include mx6ul_14x14_evk basic board support. i.MX 6UltraLite is a high performance, ultra-efficient processor family featuring an advanced implementation of a single Cortex-A7 core. This patch set is based on i.MX6QP patch v5 set: https://patchwork.ozlabs.org/patch/