Re: [U-Boot] [PATCH V3 2/8] board: ks2_evm: get rid of bogus CONFIG_LINUX_BOOT_PARAM_ADDR
On Sat, Jul 18, 2015 at 11:40:30AM -0500, Nishanth Menon wrote: CONFIG_LINUX_BOOT_PARAM_ADDR is not a valid configuration option. Do just like what the rest of the world does. Acked-by: Vitaly Andrianov vita...@ti.com Acked-By: Murali Karicheri m-kariche...@ti.com Signed-off-by: Nishanth Menon n...@ti.com Reviewed-by: Tom Rini tr...@konsulko.com -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V3 5/8] configs: ti_armv7_keystone2: switch addresses to generic addresses
On Sat, Jul 18, 2015 at 11:40:33AM -0500, Nishanth Menon wrote: Use the defaults defined in DEFAULT_LINUX_BOOT_ENV Signed-off-by: Nishanth Menon n...@ti.com Reviewed-by: Tom Rini tr...@konsulko.com -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 03/19] ARM: zynq: DT: Add a fixed regulator for CPU voltage
To silence the warning
cpufreq_cpu0: failed to get cpu0 regulator: -19
from the cpufreq driver regarding a missing regulator,
add a fixed regulator to the DT.
Zynq does not support voltage scaling and the CPU rail should always be
supplied with 1 V, hence it is added in the SOC-level dtsi.
Signed-off-by: Soren Brinkmann soren.brinkm...@xilinx.com
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
Sync with mainline kernel
---
arch/arm/dts/zynq-7000.dtsi | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/dts/zynq-7000.dtsi b/arch/arm/dts/zynq-7000.dtsi
index fc5dd4d4a38e..326ab6766c56 100644
--- a/arch/arm/dts/zynq-7000.dtsi
+++ b/arch/arm/dts/zynq-7000.dtsi
@@ -21,6 +21,7 @@
reg = 0;
clocks = clkc 3;
clock-latency = 1000;
+ cpu0-supply = regulator_vccpint;
operating-points =
/* kHzuV */
67 100
@@ -44,6 +45,15 @@
reg = 0xf8891000 0x1000 0xf8893000 0x1000 ;
};
+ regulator_vccpint: fixedregulator@0 {
+ compatible = regulator-fixed;
+ regulator-name = VCCPINT;
+ regulator-min-microvolt = 100;
+ regulator-max-microvolt = 100;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
amba {
compatible = simple-bus;
#address-cells = 1;
--
2.3.5
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[U-Boot] [PATCH 05/19] ARM: zynq: DT: Remove 222 MHz OPP
Due to dependencies between timer and CPU frequency, only changes by powers of two are allowed. The clocksource driver prevents other changes, but with cpufreq and its governors it can result in being spammed with error messages constantly. Hence, remove the 222 MHz OPP. Signed-off-by: Soren Brinkmann soren.brinkm...@xilinx.com Signed-off-by: Michal Simek michal.si...@xilinx.com --- From mainline --- arch/arm/dts/zynq-7000.dtsi | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/dts/zynq-7000.dtsi b/arch/arm/dts/zynq-7000.dtsi index a4bfc6211100..7679cf242f91 100644 --- a/arch/arm/dts/zynq-7000.dtsi +++ b/arch/arm/dts/zynq-7000.dtsi @@ -26,7 +26,6 @@ /* kHzuV */ 67 100 34 100 - 23 100 ; }; -- 2.3.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 06/19] spi: Fix zynq SPI binding
Zynq is using Cadence IP where binding is documented in the Linux kernel
and there is no reason to use different binding.
Synchronize it.
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
arch/arm/dts/zynq-7000.dtsi | 4 ++--
doc/device-tree-bindings/spi/spi-zynq.txt | 35 +--
drivers/spi/zynq_spi.c| 2 +-
3 files changed, 22 insertions(+), 19 deletions(-)
diff --git a/arch/arm/dts/zynq-7000.dtsi b/arch/arm/dts/zynq-7000.dtsi
index 7679cf242f91..d212b60ca6b2 100644
--- a/arch/arm/dts/zynq-7000.dtsi
+++ b/arch/arm/dts/zynq-7000.dtsi
@@ -166,7 +166,7 @@
};
spi0: spi@e0006000 {
- compatible = xlnx,zynq-spi;
+ compatible = xlnx,zynq-spi-r1p6;
reg = 0xe0006000 0x1000;
status = disabled;
interrupt-parent = intc;
@@ -179,7 +179,7 @@
};
spi1: spi@e0007000 {
- compatible = xlnx,zynq-spi;
+ compatible = xlnx,zynq-spi-r1p6;
reg = 0xe0007000 0x1000;
status = disabled;
interrupt-parent = intc;
diff --git a/doc/device-tree-bindings/spi/spi-zynq.txt
b/doc/device-tree-bindings/spi/spi-zynq.txt
index f397a36d6801..cb2945789d05 100644
--- a/doc/device-tree-bindings/spi/spi-zynq.txt
+++ b/doc/device-tree-bindings/spi/spi-zynq.txt
@@ -1,29 +1,32 @@
-Zynq SPI controller Device Tree Bindings
-
+Cadence SPI controller Device Tree Bindings
+---
Required properties:
-- compatible : Should be xlnx,spi-zynq.
+- compatible : Should be cdns,spi-r1p6 or xlnx,zynq-spi-r1p6.
- reg : Physical base address and size of SPI registers map.
-- status : Status will be disabled in dtsi and enabled in
required dts.
-- interrupt-parent : Must be core interrupt controller.
- interrupts : Property with a value describing the interrupt
number.
-- clocks : Clock phandles (see clock bindings for details).
+- interrupt-parent : Must be core interrupt controller
- clock-names : List of input clock names - ref_clk, pclk
(See clock bindings for details).
+- clocks : Clock phandles (see clock bindings for details).
- spi-max-frequency: Maximum SPI clocking speed of device in Hz
+Optional properties:
+- num-cs : Number of chip selects used.
+ If a decoder is used, this will be the number of
+ chip selects after the decoder.
+- is-decoded-cs: Flag to indicate whether decoder is used or
not.
+
Example:
- spi@e0006000 {
- compatible = xlnx,zynq-spi;
- reg = 0xe0006000 0x1000;
- status = disabled;
- interrupt-parent = intc;
- interrupts = 0 26 4;
- clocks = clkc 25, clkc 34;
+ spi@e0007000 {
+ compatible = xlnx,zynq-spi-r1p6;
clock-names = ref_clk, pclk;
- spi-max-frequency = 16700;
- #address-cells = 1;
- #size-cells = 0;
+ clocks = clkc 26, clkc 35;
+ interrupt-parent = intc;
+ interrupts = 0 49 4;
+ num-cs = 4;
+ is-decoded-cs = 0;
+ reg = 0xe0007000 0x1000;
} ;
diff --git a/drivers/spi/zynq_spi.c b/drivers/spi/zynq_spi.c
index c5c3e1044fda..0208afc4a636 100644
--- a/drivers/spi/zynq_spi.c
+++ b/drivers/spi/zynq_spi.c
@@ -309,7 +309,7 @@ static const struct dm_spi_ops zynq_spi_ops = {
};
static const struct udevice_id zynq_spi_ids[] = {
- { .compatible = xlnx,zynq-spi },
+ { .compatible = xlnx,zynq-spi-r1p6 },
{ }
};
--
2.3.5
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[U-Boot] [PATCH 04/19] ARM: zynq: DT: Migrate UART to Cadence binding
The Zynq UART is Cadence IP and the driver has been renamed accordingly.
Migrate the DT to use the new binding for the UART driver.
Signed-off-by: Soren Brinkmann soren.brinkm...@xilinx.com
Acked-by: Peter Crosthwaite peter.crosthwa...@xilinx.com
Acked-by: Rob Herring r...@kernel.org
Tested-by: Michal Simek michal.si...@xilinx.com
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
Mainline sync
---
arch/arm/dts/zynq-7000.dtsi | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/dts/zynq-7000.dtsi b/arch/arm/dts/zynq-7000.dtsi
index 326ab6766c56..a4bfc6211100 100644
--- a/arch/arm/dts/zynq-7000.dtsi
+++ b/arch/arm/dts/zynq-7000.dtsi
@@ -149,19 +149,19 @@
};
uart0: serial@e000 {
- compatible = xlnx,xuartps;
+ compatible = xlnx,xuartps, cdns,uart-r1p8;
status = disabled;
clocks = clkc 23, clkc 40;
- clock-names = ref_clk, aper_clk;
+ clock-names = uart_clk, pclk;
reg = 0xE000 0x1000;
interrupts = 0 27 4;
};
uart1: serial@e0001000 {
- compatible = xlnx,xuartps;
+ compatible = xlnx,xuartps, cdns,uart-r1p8;
status = disabled;
clocks = clkc 24, clkc 41;
- clock-names = ref_clk, aper_clk;
+ clock-names = uart_clk, pclk;
reg = 0xE0001000 0x1000;
interrupts = 0 50 4;
};
--
2.3.5
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[U-Boot] [PATCH 07/19] ARM: zynq: DT: Fix GEM register area size
The size of the GEM's register area is only 0x1000 bytes.
Signed-off-by: Soren Brinkmann soren.brinkm...@xilinx.com
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
Sync from the kernel
---
arch/arm/dts/zynq-7000.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/dts/zynq-7000.dtsi b/arch/arm/dts/zynq-7000.dtsi
index d212b60ca6b2..a8bbe4875465 100644
--- a/arch/arm/dts/zynq-7000.dtsi
+++ b/arch/arm/dts/zynq-7000.dtsi
@@ -193,7 +193,7 @@
gem0: ethernet@e000b000 {
compatible = cdns,gem;
- reg = 0xe000b000 0x4000;
+ reg = 0xe000b000 0x1000;
status = disabled;
interrupts = 0 22 4;
clocks = clkc 30, clkc 30, clkc 13;
@@ -202,7 +202,7 @@
gem1: ethernet@e000c000 {
compatible = cdns,gem;
- reg = 0xe000c000 0x4000;
+ reg = 0xe000c000 0x1000;
status = disabled;
interrupts = 0 45 4;
clocks = clkc 31, clkc 31, clkc 14;
--
2.3.5
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[U-Boot] [PATCH 08/19] ARM: zynq: DT: Use the zynq binding with macb
Use the new zynq binding for macb ethernet, since it will disable half
duplex gigabit like the Zynq TRM says to do. Also allow the compatible
cadence gem binding that won't disable half duplex but works otherwise.
Signed-off-by: Nathan Sullivan nathan.sulli...@ni.com
Acked-by: Sören Brinkmann soren.brinkm...@xilinx.com
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
From the kernel.
---
arch/arm/dts/zynq-7000.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/dts/zynq-7000.dtsi b/arch/arm/dts/zynq-7000.dtsi
index a8bbe4875465..383ddd674b08 100644
--- a/arch/arm/dts/zynq-7000.dtsi
+++ b/arch/arm/dts/zynq-7000.dtsi
@@ -192,7 +192,7 @@
};
gem0: ethernet@e000b000 {
- compatible = cdns,gem;
+ compatible = cdns,zynq-gem, cdns,gem;
reg = 0xe000b000 0x1000;
status = disabled;
interrupts = 0 22 4;
@@ -201,7 +201,7 @@
};
gem1: ethernet@e000c000 {
- compatible = cdns,gem;
+ compatible = cdns,zynq-gem, cdns,gem;
reg = 0xe000c000 0x1000;
status = disabled;
interrupts = 0 45 4;
--
2.3.5
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[U-Boot] [PATCH 10/19] ARM: zynq: DT: Cleanup address-cells and size-cells
Remove unneeded address-cells form intc node because it is already setup
in parent node.
Add missing address-cells and size-cells to eth node to be shared for
every platform DTSes.
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
Sync with mainline.
---
arch/arm/dts/zynq-7000.dtsi | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/arch/arm/dts/zynq-7000.dtsi b/arch/arm/dts/zynq-7000.dtsi
index 61256ee42393..276aa75097fc 100644
--- a/arch/arm/dts/zynq-7000.dtsi
+++ b/arch/arm/dts/zynq-7000.dtsi
@@ -127,7 +127,6 @@
intc: interrupt-controller@f8f01000 {
compatible = arm,cortex-a9-gic;
#interrupt-cells = 3;
- #address-cells = 1;
interrupt-controller;
reg = 0xF8F01000 0x1000,
0xF8F00100 0x100;
@@ -198,6 +197,8 @@
interrupts = 0 22 4;
clocks = clkc 30, clkc 30, clkc 13;
clock-names = pclk, hclk, tx_clk;
+ #address-cells = 1;
+ #size-cells = 0;
};
gem1: ethernet@e000c000 {
@@ -207,6 +208,8 @@
interrupts = 0 45 4;
clocks = clkc 31, clkc 31, clkc 14;
clock-names = pclk, hclk, tx_clk;
+ #address-cells = 1;
+ #size-cells = 0;
};
sdhci0: sdhci@e010 {
--
2.3.5
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[U-Boot] [PATCH 18/48] efi: Add start-up library code
When running as an EFI application, U-Boot must request memory from EFI,
and provide access to the boot services U-Boot needs.
Add library code to perform these tasks. This includes efi_main() which is
the entry point from EFI. U-Boot is built as a shared library.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/x86/include/asm/fsp/fsp_hob.h | 59 +-
include/efi.h | 356 +
include/efi_api.h | 252 ++
include/part_efi.h | 9 +-
lib/Kconfig| 2 +
lib/Makefile | 1 +
lib/efi/Kconfig| 33
lib/efi/Makefile | 7 +
lib/efi/efi.c | 91 ++
lib/efi/efi_app.c | 125 +
10 files changed, 871 insertions(+), 64 deletions(-)
create mode 100644 include/efi.h
create mode 100644 include/efi_api.h
create mode 100644 lib/efi/Kconfig
create mode 100644 lib/efi/Makefile
create mode 100644 lib/efi/efi.c
create mode 100644 lib/efi/efi_app.c
diff --git a/arch/x86/include/asm/fsp/fsp_hob.h
b/arch/x86/include/asm/fsp/fsp_hob.h
index 6cca7f5..3fb3546 100644
--- a/arch/x86/include/asm/fsp/fsp_hob.h
+++ b/arch/x86/include/asm/fsp/fsp_hob.h
@@ -8,6 +8,8 @@
#ifndef __FSP_HOB_H__
#define __FSP_HOB_H__
+#include efi.h
+
/* Type of HOB Header */
#define HOB_TYPE_MEM_ALLOC 0x0002
#define HOB_TYPE_RES_DESC 0x0003
@@ -25,63 +27,6 @@ struct hob_header {
u32 reserved; /* always zero */
};
-/* Enumeration of memory types introduced in UEFI */
-enum efi_mem_type {
- EFI_RESERVED_MEMORY_TYPE,
- /*
-* The code portions of a loaded application.
-* (Note that UEFI OS loaders are UEFI applications.)
-*/
- EFI_LOADER_CODE,
- /*
-* The data portions of a loaded application and
-* the default data allocation type used by an application
-* to allocate pool memory.
-*/
- EFI_LOADER_DATA,
- /* The code portions of a loaded Boot Services Driver */
- EFI_BOOT_SERVICES_CODE,
- /*
-* The data portions of a loaded Boot Serves Driver and
-* the default data allocation type used by a Boot Services
-* Driver to allocate pool memory.
-*/
- EFI_BOOT_SERVICES_DATA,
- /* The code portions of a loaded Runtime Services Driver */
- EFI_RUNTIME_SERVICES_CODE,
- /*
-* The data portions of a loaded Runtime Services Driver and
-* the default data allocation type used by a Runtime Services
-* Driver to allocate pool memory.
-*/
- EFI_RUNTIME_SERVICES_DATA,
- /* Free (unallocated) memory */
- EFI_CONVENTIONAL_MEMORY,
- /* Memory in which errors have been detected */
- EFI_UNUSABLE_MEMORY,
- /* Memory that holds the ACPI tables */
- EFI_ACPI_RECLAIM_MEMORY,
- /* Address space reserved for use by the firmware */
- EFI_ACPI_MEMORY_NVS,
- /*
-* Used by system firmware to request that a memory-mapped IO region
-* be mapped by the OS to a virtual address so it can be accessed by
-* EFI runtime services.
-*/
- EFI_MMAP_IO,
- /*
-* System memory-mapped IO region that is used to translate
-* memory cycles to IO cycles by the processor.
-*/
- EFI_MMAP_IO_PORT,
- /*
-* Address space reserved by the firmware for code that is
-* part of the processor.
-*/
- EFI_PAL_CODE,
- EFI_MAX_MEMORY_TYPE
-};
-
/*
* Describes all memory ranges used during the HOB producer phase that
* exist outside the HOB list. This HOB type describes how memory is used,
diff --git a/include/efi.h b/include/efi.h
new file mode 100644
index 000..66ef6c3
--- /dev/null
+++ b/include/efi.h
@@ -0,0 +1,356 @@
+/*
+ * Extensible Firmware Interface
+ * Based on 'Extensible Firmware Interface Specification' version 0.9,
+ * April 30, 1999
+ *
+ * Copyright (C) 1999 VA Linux Systems
+ * Copyright (C) 1999 Walt Drummond drumm...@valinux.com
+ * Copyright (C) 1999, 2002-2003 Hewlett-Packard Co.
+ * David Mosberger-Tang dav...@hpl.hp.com
+ * Stephane Eranian eran...@hpl.hp.com
+ *
+ * From include/linux/efi.h in kernel 4.1 with some additions/subtractions
+ */
+
+#ifndef _EFI_H
+#define _EFI_H
+
+#include linux/string.h
+#include linux/types.h
+
+#ifdef CONFIG_EFI_STUB_64BIT
+#define EFIAPI __attribute__((ms_abi))
+#else
+#define EFIAPI
+#endif
+
+struct efi_device_path;
+
+#define EFI_SUCCESS0
+#define EFI_LOAD_ERROR (1 | (1UL (BITS_PER_LONG - 1)))
+#define EFI_INVALID_PARAMETER (2 | (1UL (BITS_PER_LONG - 1)))
+#define EFI_UNSUPPORTED(3 | (1UL (BITS_PER_LONG - 1)))
+#define EFI_BAD_BUFFER_SIZE(4 | (1UL (BITS_PER_LONG - 1)))
+#define EFI_BUFFER_TOO_SMALL (5 | (1UL (BITS_PER_LONG -
[U-Boot] [PATCH 12/48] x86: Tidy up the 64-bit calling code
The GDT works but technically the length is incorrect. Fix this and add a comment. Signed-off-by: Simon Glass s...@chromium.org --- arch/x86/cpu/call64.S | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/x86/cpu/call64.S b/arch/x86/cpu/call64.S index 74dd5a8..08dc473 100644 --- a/arch/x86/cpu/call64.S +++ b/arch/x86/cpu/call64.S @@ -82,8 +82,8 @@ lret_target: .data gdt: - .word gdt_end - gdt - .long gdt + .word gdt_end - gdt - 1 + .long gdt /* Fixed up by code above */ .word 0 .quad 0x /* NULL descriptor */ .quad 0x00af9a00 /* __KERNEL_CS */ -- 2.4.3.573.g4eafbef ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 21/48] efi: Drop CONFIG_SYS_TEXT_BASE for EFI
From: Ben Stoltz sto...@google.com When U-Boot runs as an EFI application is does not have a definition of CONFIG_SYS_TEXT_BASE. U-Boot is a relocatable application and the relocation is done by EFI. U-Boot can be loaded at any address. Ensure that this CONFIG option is not set in this case. Signed-off-by: Ben Stoltz sto...@google.com Signed-off-by: Simon Glass s...@chromium.org --- Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/Kconfig b/Kconfig index 15e15af..c1e7d22 100644 --- a/Kconfig +++ b/Kconfig @@ -179,6 +179,7 @@ config SYS_EXTRA_OPTIONS config SYS_TEXT_BASE depends on SPARC || ARC || X86 || ARCH_UNIPHIER + depends on !ARCH_EFI hex Text Base help TODO: Move CONFIG_SYS_TEXT_BASE for all the architecture -- 2.4.3.573.g4eafbef ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 46/48] x86: qemu: Support operation as an EFI payload
Disable a few things which interfere with the EFI init. This allows QEMU to
to boot into EFI, load a U-Boot payload then boot to the U-Boot prompt.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/x86/cpu/qemu/Makefile | 5 -
arch/x86/cpu/qemu/qemu.c | 2 ++
board/emulation/qemu-x86/Kconfig | 5 +++--
3 files changed, 9 insertions(+), 3 deletions(-)
diff --git a/arch/x86/cpu/qemu/Makefile b/arch/x86/cpu/qemu/Makefile
index be79723..9a66b16 100644
--- a/arch/x86/cpu/qemu/Makefile
+++ b/arch/x86/cpu/qemu/Makefile
@@ -4,5 +4,8 @@
# SPDX-License-Identifier: GPL-2.0+
#
-obj-y += car.o dram.o qemu.o
+ifndef CONFIG_EFI_STUB
+obj-y += car.o dram.o
+endif
+obj-y += qemu.o
obj-$(CONFIG_PCI) += pci.o
diff --git a/arch/x86/cpu/qemu/qemu.c b/arch/x86/cpu/qemu/qemu.c
index 930d2b6..64634a9 100644
--- a/arch/x86/cpu/qemu/qemu.c
+++ b/arch/x86/cpu/qemu/qemu.c
@@ -25,11 +25,13 @@ int arch_cpu_init(void)
return 0;
}
+#ifndef CONFIG_EFI_STUB
int print_cpuinfo(void)
{
post_code(POST_CPU_INFO);
return default_print_cpuinfo();
}
+#endif
void reset_cpu(ulong addr)
{
diff --git a/board/emulation/qemu-x86/Kconfig b/board/emulation/qemu-x86/Kconfig
index e777ef4..930eeb8 100644
--- a/board/emulation/qemu-x86/Kconfig
+++ b/board/emulation/qemu-x86/Kconfig
@@ -13,11 +13,12 @@ config SYS_CONFIG_NAME
default qemu-x86
config SYS_TEXT_BASE
- default 0xfff0
+ default 0xfff0 if !EFI_STUB
+default 0x0111 if EFI_STUB
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
- select X86_RESET_VECTOR
+ select X86_RESET_VECTOR if !EFI_STUB
select QEMU
select BOARD_ROMSIZE_KB_1024
--
2.4.3.573.g4eafbef
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[U-Boot] [PATCH 35/48] x86: Support building the EFI stub
Add support for building a 32/64-bit EFI stub for x86. This involves building the startup and relocation code for either i386 or x86_64. Signed-off-by: Simon Glass s...@chromium.org --- arch/x86/lib/Makefile | 16 +++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/arch/x86/lib/Makefile b/arch/x86/lib/Makefile index 77bba16..fb4a73c 100644 --- a/arch/x86/lib/Makefile +++ b/arch/x86/lib/Makefile @@ -11,6 +11,20 @@ else obj-$(CONFIG_ARCH_EFI) += crt0-efi-ia64.o reloc_ia64.o endif +ifneq ($(CONFIG_EFI_STUB),) +CFLAGS_REMOVE_reloc_ia32.o += -mregparm=3 +CFLAGS_reloc_ia32.o += -fpic -fshort-wchar + +CFLAGS_REMOVE_reloc_x86_64.o += -mregparm=3 -march=i386 -m32 +CFLAGS_reloc_x86_64.o += -fpic -fshort-wchar + +AFLAGS_REMOVE_crt0-efi-x86_64.o += -mregparm=3 -march=i386 -m32 +AFLAGS_crt0-efi-x86_64.o += -fpic -fshort-wchar + +extra-$(CONFIG_EFI_STUB_32BIT) += crt0-efi-ia32.o reloc_ia32.o +extra-$(CONFIG_EFI_STUB_64BIT) += crt0-efi-x86_64.o reloc_x86_64.o +endif + obj-y += bios.o obj-y += bios_asm.o obj-y += bios_interrupts.o @@ -40,7 +54,7 @@ obj-$(CONFIG_SYS_X86_TSC_TIMER) += tsc_timer.o obj-$(CONFIG_CMD_ZBOOT)+= zimage.o obj-$(CONFIG_HAVE_FSP) += fsp/ -extra-$(CONFIG_USE_PRIVATE_LIBGCC) := lib.a +extra-$(CONFIG_USE_PRIVATE_LIBGCC) += lib.a NORMAL_LIBGCC = $(shell $(CC) $(PLATFORM_CPPFLAGS) -print-libgcc-file-name) OBJCOPYFLAGS := --prefix-symbols=__normal_ -- 2.4.3.573.g4eafbef ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V3 8/8] configs: keystone2: remove distro specific ramdisk name
On 07/18/2015 12:40 PM, Nishanth Menon wrote:
u-boot should support multiple distros as necessary. So, DONOT hardcode
distro specific image name in package. Instead we use a generic
ramdisk.gz as image name which can be modified by distro specific logic.
Signed-off-by: Nishanth Menon n...@ti.com
---
New patch
include/configs/k2e_evm.h| 1 -
include/configs/k2hk_evm.h | 1 -
include/configs/k2l_evm.h| 1 -
include/configs/ti_armv7_keystone2.h | 1 +
4 files changed, 1 insertion(+), 3 deletions(-)
diff --git a/include/configs/k2e_evm.h b/include/configs/k2e_evm.h
index 4f4ebf53ec59..59ce6fa0bdb3 100644
--- a/include/configs/k2e_evm.h
+++ b/include/configs/k2e_evm.h
@@ -23,7 +23,6 @@
name_mon=skern-k2e.bin\0\
name_ubi=k2e-evm-ubifs.ubi\0\
name_uboot=u-boot-spi-k2e-evm.gph\0 \
- name_fs=arago-console-image-k2e-evm.cpio.gz\0
#include configs/ti_armv7_keystone2.h
diff --git a/include/configs/k2hk_evm.h b/include/configs/k2hk_evm.h
index 6c6dcb1e5ed3..835dd0e13b4b 100644
--- a/include/configs/k2hk_evm.h
+++ b/include/configs/k2hk_evm.h
@@ -23,7 +23,6 @@
name_mon=skern-k2hk.bin\0 \
name_ubi=k2hk-evm-ubifs.ubi\0 \
name_uboot=u-boot-spi-k2hk-evm.gph\0\
- name_fs=arago-console-image-k2hk-evm.cpio.gz\0
#include configs/ti_armv7_keystone2.h
diff --git a/include/configs/k2l_evm.h b/include/configs/k2l_evm.h
index 9bacfa49c430..a7c835953b73 100644
--- a/include/configs/k2l_evm.h
+++ b/include/configs/k2l_evm.h
@@ -23,7 +23,6 @@
name_mon=skern-k2l.bin\0\
name_ubi=k2l-evm-ubifs.ubi\0\
name_uboot=u-boot-spi-k2l-evm.gph\0 \
- name_fs=arago-console-image-k2l-evm.cpio.gz\0
#include configs/ti_armv7_keystone2.h
diff --git a/include/configs/ti_armv7_keystone2.h
b/include/configs/ti_armv7_keystone2.h
index e327f3e03073..198e3650fd55 100644
--- a/include/configs/ti_armv7_keystone2.h
+++ b/include/configs/ti_armv7_keystone2.h
@@ -221,6 +221,7 @@
addr_ubi=0x8200\0 \
addr_secdb_key=0xc00\0 \
name_kern=zImage\0 \
+ name_fs=ramdisk.gz\0\
run_mon=mon_install ${addr_mon}\0 \
run_kern=bootz ${loadaddr} - ${fdtaddr}\0 \
init_net=run args_all args_net\0\
Reviewed-by: Murali Karicheri m-kariche...@ti.com
--
Murali Karicheri
Linux Kernel, Keystone
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[U-Boot] [PATCH 06/48] Allow objcopy to work without filling gaps with 0xff
This is currently done for all targets, since 0xff is the default erased value for most flash devices. In some cases this is not what we want (e.g. for EFI images) so provide a command to do a vanilla objcopy. Signed-off-by: Simon Glass s...@chromium.org --- Makefile | 8 +++- config.mk | 2 -- 2 files changed, 7 insertions(+), 3 deletions(-) diff --git a/Makefile b/Makefile index b6f83a5..e0218b3 100644 --- a/Makefile +++ b/Makefile @@ -778,8 +778,14 @@ ifneq ($(CONFIG_SYS_TEXT_BASE),) LDFLAGS_u-boot += -Ttext $(CONFIG_SYS_TEXT_BASE) endif +# Normally we fill empty space with 0xff quiet_cmd_objcopy = OBJCOPY $@ -cmd_objcopy = $(OBJCOPY) $(OBJCOPYFLAGS) $(OBJCOPYFLAGS_$(@F)) $ $@ +cmd_objcopy = $(OBJCOPY) --gap-fill=0xff $(OBJCOPYFLAGS) \ + $(OBJCOPYFLAGS_$(@F)) $ $@ + +# Provide a version which does not do this, for use by EFI +quiet_cmd_zobjcopy = OBJCOPY $@ +cmd_zobjcopy = $(OBJCOPY) $(OBJCOPYFLAGS) $(OBJCOPYFLAGS_$(@F)) $ $@ quiet_cmd_mkimage = MKIMAGE $@ cmd_mkimage = $(objtree)/tools/mkimage $(MKIMAGEFLAGS_$(@F)) -d $ $@ \ diff --git a/config.mk b/config.mk index 6282919..b77d589 100644 --- a/config.mk +++ b/config.mk @@ -73,8 +73,6 @@ endif RELFLAGS := $(PLATFORM_RELFLAGS) -OBJCOPYFLAGS += --gap-fill=0xff - PLATFORM_CPPFLAGS += $(RELFLAGS) PLATFORM_CPPFLAGS += -pipe -- 2.4.3.573.g4eafbef ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 09/48] x86: Use CR0 constants in CPU init
We should use these constants where possible.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/x86/cpu/cpu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/cpu.c
index b9134cf..d233a45 100644
--- a/arch/x86/cpu/cpu.c
+++ b/arch/x86/cpu/cpu.c
@@ -456,7 +456,7 @@ void x86_full_reset(void)
int dcache_status(void)
{
- return !(read_cr0() 0x4000);
+ return !(read_cr0() X86_CR0_CD);
}
/* Define these functions to allow ehch-hcd to function */
--
2.4.3.573.g4eafbef
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[U-Boot] [PATCH 32/48] x86: Add a link script entry for U-Boot as a payload
Allow U-Boot to be packaged into the image as a binary payload.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/x86/cpu/efi/elf_ia32_efi.lds | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/x86/cpu/efi/elf_ia32_efi.lds
b/arch/x86/cpu/efi/elf_ia32_efi.lds
index fca008b..87ddb4d 100644
--- a/arch/x86/cpu/efi/elf_ia32_efi.lds
+++ b/arch/x86/cpu/efi/elf_ia32_efi.lds
@@ -57,6 +57,9 @@ SECTIONS
KEEP(*(SORT(.u_boot_list*)));
. = ALIGN(8);
KEEP(*(.dtb*));
+ /* Keep U-Boot payload */
+ . = ALIGN(8);
+ KEEP(*(.u_boot_bin.*));
}
.dynamic : { *(.dynamic) }
. = ALIGN(4096);
--
2.4.3.573.g4eafbef
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[U-Boot] [PATCH 45/48] x86: baytrail: Support operation as an EFI payload
Disable a few things which interfere with the EFI init. This allows the
Minnowboard MAX to boot into EFI, load a U-Boot payload then boot to the
U-Boot prompt.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/x86/cpu/baytrail/Kconfig | 2 +-
arch/x86/cpu/baytrail/cpu.c| 2 ++
arch/x86/cpu/baytrail/valleyview.c | 2 ++
board/intel/minnowmax/Kconfig | 5 +++--
4 files changed, 8 insertions(+), 3 deletions(-)
diff --git a/arch/x86/cpu/baytrail/Kconfig b/arch/x86/cpu/baytrail/Kconfig
index e86cc01..407feb2 100644
--- a/arch/x86/cpu/baytrail/Kconfig
+++ b/arch/x86/cpu/baytrail/Kconfig
@@ -6,4 +6,4 @@
config INTEL_BAYTRAIL
bool
- select HAVE_FSP
+ select HAVE_FSP if !EFI
diff --git a/arch/x86/cpu/baytrail/cpu.c b/arch/x86/cpu/baytrail/cpu.c
index a011730..b1faf8c 100644
--- a/arch/x86/cpu/baytrail/cpu.c
+++ b/arch/x86/cpu/baytrail/cpu.c
@@ -45,6 +45,8 @@ static void set_max_freq(void)
static int cpu_x86_baytrail_probe(struct udevice *dev)
{
+ if (!ll_boot_init())
+ return 0;
debug(Init BayTrail core\n);
/*
diff --git a/arch/x86/cpu/baytrail/valleyview.c
b/arch/x86/cpu/baytrail/valleyview.c
index 9915da5..f1c3578 100644
--- a/arch/x86/cpu/baytrail/valleyview.c
+++ b/arch/x86/cpu/baytrail/valleyview.c
@@ -20,6 +20,7 @@ int cpu_mmc_init(bd_t *bis)
ARRAY_SIZE(mmc_supported));
}
+#ifndef CONFIG_ARCH_EFI
int arch_cpu_init(void)
{
int ret;
@@ -35,3 +36,4 @@ int arch_cpu_init(void)
return 0;
}
+#endif
diff --git a/board/intel/minnowmax/Kconfig b/board/intel/minnowmax/Kconfig
index f2a0b71..2052c52 100644
--- a/board/intel/minnowmax/Kconfig
+++ b/board/intel/minnowmax/Kconfig
@@ -13,11 +13,12 @@ config SYS_CONFIG_NAME
default minnowmax
config SYS_TEXT_BASE
- default 0xfff0
+default 0xfff0 if !EFI_STUB
+default 0x0111 if EFI_STUB
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
- select X86_RESET_VECTOR
+ select X86_RESET_VECTOR if !EFI_STUB
select INTEL_BAYTRAIL
select BOARD_ROMSIZE_KB_8192
--
2.4.3.573.g4eafbef
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Re: [U-Boot] [PATCH 1/3] ARM: at91: add cpu.h
Hi, On 15/06/2015 at 14:42:59 +0200, Heiko Schocher wrote : add cpu.h from linux: 7538ec7d1e5: ARM: at91: remove no-MMU at91x40 support so it is easier to port linux code, which is based on it. That file doesn't exist anymore, see f56d8f7c29320abe6f923fa1b3cb7adcc3252a24 and I think the cpu_is_xxx removal was finished a few linux versions ago so you should not need that. Signed-off-by: Heiko Schocher h...@denx.de --- arch/arm/mach-at91/include/mach/cpu.h | 149 ++ 1 file changed, 149 insertions(+) create mode 100644 arch/arm/mach-at91/include/mach/cpu.h diff --git a/arch/arm/mach-at91/include/mach/cpu.h b/arch/arm/mach-at91/include/mach/cpu.h new file mode 100644 index 000..a5e698d --- /dev/null +++ b/arch/arm/mach-at91/include/mach/cpu.h @@ -0,0 +1,149 @@ +/* + * from linux: + * 7538ec7d1e5: ARM: at91: remove no-MMU at91x40 support + * + * arch/arm/mach-at91/include/mach/cpu.h + * + * Copyright (C) 2006 SAN People + * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD plagn...@jcrosoft.com + * + * SPDX-License-Identifier: GPL-2.0+ + * + */ + +#ifndef __AT91_MACH_CPU_H__ +#define __AT91_MACH_CPU_H__ + +#ifdef CONFIG_AT91RM9200 +#define cpu_is_at91rm9200() (1) +#else +#define cpu_is_at91rm9200() (0) +#endif + +#ifdef CONFIG_AT91SAM9260 +#define cpu_is_at91sam9260() (1) +#else +#define cpu_is_at91sam9260() (0) +#endif + +#ifdef CONFIG_AT91SAM9G20 +#define cpu_is_at91sam9g20() (1) +#else +#define cpu_is_at91sam9g20() (0) +#endif + +#ifdef CONFIG_AT91SAM9XE +#define cpu_is_at91sam9xe() (1) +#else +#define cpu_is_at91sam9xe() (0) +#endif + +#ifdef CONFIG_AT91SAM9261 +#define cpu_is_at91sam9261() (1) +#else +#define cpu_is_at91sam9261() (0) +#endif + +#ifdef CONFIG_AT91SAM9G10 +#define cpu_is_at91sam9g10() (1) +#else +#define cpu_is_at91sam9g10() (0) +#endif + +#ifdef CONFIG_AT91SAM9263 +#define cpu_is_at91sam9263() (1) +#else +#define cpu_is_at91sam9263() (0) +#endif + +#ifdef CONFIG_AT91SAM9RL +#define cpu_is_at91sam9rl() (1) +#else +#define cpu_is_at91sam9rl() (0) +#endif + +#ifdef CONFIG_AT91SAM9G45 +#define cpu_is_at91sam9g45() (1) +#else +#define cpu_is_at91sam9g45() (0) +#endif + +#ifdef CONFIG_AT91SAM9G45ES +#define cpu_is_at91sam9g45es() (1) +#else +#define cpu_is_at91sam9g45es() (0) +#endif + +#ifdef CONFIG_AT91SAM9M10 +#define cpu_is_at91sam9m10() (1) +#else +#define cpu_is_at91sam9m10() (0) +#endif + +#ifdef CONFIG_AT91SAM9G46 +#define cpu_is_at91sam9g46() (1) +#else +#define cpu_is_at91sam9g46() (0) +#endif + +#ifdef CONFIG_AT91SAM9M11 +#define cpu_is_at91sam9m11() (1) +#else +#define cpu_is_at91sam9m11() (0) +#endif + +#ifdef CONFIG_AT91SAM9X5 +#define cpu_is_at91sam9x5() (1) +#else +#define cpu_is_at91sam9x5() (0) +#endif + +#ifdef CONFIG_AT91SAM9G15 +#define cpu_is_at91sam9g15() (1) +#else +#define cpu_is_at91sam9g15() (0) +#endif + +#ifdef CONFIG_AT91SAM9G35 +#define cpu_is_at91sam9g35() (1) +#else +#define cpu_is_at91sam9g35() (0) +#endif + +#ifdef CONFIG_AT91SAM9X35 +#define cpu_is_at91sam9x35() (1) +#else +#define cpu_is_at91sam9x35() (0) +#endif + +#ifdef CONFIG_AT91SAM9G25 +#define cpu_is_at91sam9g25() (1) +#else +#define cpu_is_at91sam9g25() (0) +#endif + +#ifdef CONFIG_AT91SAM9X25 +#define cpu_is_at91sam9x25() (1) +#else +#define cpu_is_at91sam9x25() (0) +#endif + +#ifdef CONFIG_AT91SAM9N12 +#define cpu_is_at91sam9n12() (1) +#else +#define cpu_is_at91sam9n12() (0) +#endif + +#ifdef CONFIG_SAMA5D3 +#define cpu_is_sama5d3() (1) +#else +#define cpu_is_sama5d3() (0) +#endif + +#ifdef CONFIG_SAMA5D4 +#define cpu_is_sama5d4() (1) +#else +#define cpu_is_sama5d4() (0) +#endif + +#endif -- 2.1.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot -- Alexandre Belloni ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/2] zynqmp: Add support for IP detection via SLCR
SLCR can be used for IP configuration setting.
Add SLCR skeleton to enable run time checking.
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
arch/arm/cpu/armv8/zynqmp/Makefile | 1 +
arch/arm/cpu/armv8/zynqmp/slcr.c| 63 +
arch/arm/include/asm/arch-zynqmp/hardware.h | 9 +
3 files changed, 73 insertions(+)
create mode 100644 arch/arm/cpu/armv8/zynqmp/slcr.c
diff --git a/arch/arm/cpu/armv8/zynqmp/Makefile
b/arch/arm/cpu/armv8/zynqmp/Makefile
index efab5eabc97b..d0ed2223ff79 100644
--- a/arch/arm/cpu/armv8/zynqmp/Makefile
+++ b/arch/arm/cpu/armv8/zynqmp/Makefile
@@ -8,3 +8,4 @@
obj-y += clk.o
obj-y += cpu.o
obj-$(CONFIG_MP) += mp.o
+obj-y += slcr.o
diff --git a/arch/arm/cpu/armv8/zynqmp/slcr.c b/arch/arm/cpu/armv8/zynqmp/slcr.c
new file mode 100644
index ..713e9a62c019
--- /dev/null
+++ b/arch/arm/cpu/armv8/zynqmp/slcr.c
@@ -0,0 +1,63 @@
+/*
+ * (C) Copyright 2014 - 2015 Xilinx, Inc.
+ * Michal Simek michal.si...@xilinx.com
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include asm/io.h
+#include malloc.h
+#include asm/arch/hardware.h
+#include asm/arch/sys_proto.h
+#include asm/arch/clk.h
+
+/*
+ * zynq_slcr_mio_get_status - Get the status of MIO peripheral.
+ *
+ * @peri_name: Name of the peripheral for checking MIO status
+ * @get_pins: Pointer to array of get pin for this peripheral
+ * @num_pins: Number of pins for this peripheral
+ * @mask: Mask value
+ * @check_val: Required check value to get the status of periph
+ */
+struct zynq_slcr_mio_get_status {
+ const char *peri_name;
+ const int *get_pins;
+ int num_pins;
+ u32 mask;
+ u32 check_val;
+};
+
+static const struct zynq_slcr_mio_get_status mio_periphs[] = {
+};
+
+/*
+ * zynq_slcr_get_mio_pin_status - Get the MIO pin status of peripheral.
+ *
+ * @periph: Name of the peripheral
+ *
+ * Returns count to indicate the number of pins configured for the
+ * given @periph.
+ */
+int zynq_slcr_get_mio_pin_status(const char *periph)
+{
+ const struct zynq_slcr_mio_get_status *mio_ptr;
+ int val, i, j;
+ int mio = 0;
+
+ for (i = 0; i ARRAY_SIZE(mio_periphs); i++) {
+ if (strcmp(periph, mio_periphs[i].peri_name) == 0) {
+ mio_ptr = mio_periphs[i];
+ for (j = 0; j mio_ptr-num_pins; j++) {
+ val = readl(slcr_base-mio_pin
+ [mio_ptr-get_pins[j]]);
+ if ((val mio_ptr-mask) == mio_ptr-check_val)
+ mio++;
+ }
+ break;
+ }
+ }
+
+ return mio;
+}
diff --git a/arch/arm/include/asm/arch-zynqmp/hardware.h
b/arch/arm/include/asm/arch-zynqmp/hardware.h
index c9dc49d78317..15bd519bfbe1 100644
--- a/arch/arm/include/asm/arch-zynqmp/hardware.h
+++ b/arch/arm/include/asm/arch-zynqmp/hardware.h
@@ -55,6 +55,15 @@ struct iou_scntr {
#define EMMC_MODE 0x0006
#define JTAG_MODE 0x
+#define ZYNQMP_IOU_SLCR_BASEADDR 0xFF18
+
+struct iou_slcr_regs {
+ u32 mio_pin[78];
+ u32 reserved[442];
+};
+
+#define slcr_base ((struct iou_slcr_regs *)ZYNQMP_IOU_SLCR_BASEADDR)
+
#define ZYNQMP_RPU_BASEADDR0xFF9A
struct rpu_regs {
--
2.3.5
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[U-Boot] [PATCH 19/19] ARM: zynq: Add support for zc770-xm011
Add xm011 DTS file and related configs and configurations.
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/zynq-zc770-xm011.dts | 65 ++
configs/zynq_zc770_xm011_defconfig | 13
include/configs/zynq_zc770.h | 3 ++
4 files changed, 82 insertions(+)
create mode 100644 arch/arm/dts/zynq-zc770-xm011.dts
create mode 100644 configs/zynq_zc770_xm011_defconfig
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 8ebd6934320b..06fbd8b0af20 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -45,6 +45,7 @@ dtb-$(CONFIG_ARCH_ZYNQ) += zynq-zc702.dtb \
zynq-microzed.dtb \
zynq-picozed.dtb \
zynq-zc770-xm010.dtb \
+ zynq-zc770-xm011.dtb \
zynq-zc770-xm012.dtb \
zynq-zc770-xm013.dtb
dtb-$(CONFIG_AM33XX) += am335x-boneblack.dtb
diff --git a/arch/arm/dts/zynq-zc770-xm011.dts
b/arch/arm/dts/zynq-zc770-xm011.dts
new file mode 100644
index ..d38c8201353c
--- /dev/null
+++ b/arch/arm/dts/zynq-zc770-xm011.dts
@@ -0,0 +1,65 @@
+/*
+ * Xilinx ZC770 XM013 board DTS
+ *
+ * Copyright (C) 2013 Xilinx, Inc.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+/dts-v1/;
+#include zynq-7000.dtsi
+/ {
+ compatible = xlnx,zynq-zc770-xm011, xlnx,zynq-7000;
+ model = Xilinx Zynq;
+
+ aliases {
+ i2c0 = i2c1;
+ serial0 = uart1;
+ spi0 = spi0;
+ };
+
+ chosen {
+ bootargs = console=ttyPS0,115200 root=/dev/ram rw earlyprintk;
+ linux,stdout-path = uart1;
+ stdout-path = uart1;
+ };
+
+ memory@0 {
+ device_type = memory;
+ reg = 0x0 0x4000;
+ };
+
+ usb_phy1: phy1 {
+ compatible = usb-nop-xceiv;
+ #phy-cells = 0;
+ };
+};
+
+spi0 {
+ status = okay;
+ num-cs = 4;
+ is-decoded-cs = 0;
+};
+
+can0 {
+ status = okay;
+};
+
+i2c1 {
+ status = okay;
+ clock-frequency = 40;
+
+ m24c02_eeprom@52 {
+ compatible = at,24c02;
+ reg = 0x52;
+ };
+};
+
+uart1 {
+ status = okay;
+};
+
+usb1 {
+ status = okay;
+ dr_mode = host;
+ usb-phy = usb_phy1;
+};
diff --git a/configs/zynq_zc770_xm011_defconfig
b/configs/zynq_zc770_xm011_defconfig
new file mode 100644
index ..8f9221db85e3
--- /dev/null
+++ b/configs/zynq_zc770_xm011_defconfig
@@ -0,0 +1,13 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ZYNQ=y
+CONFIG_TARGET_ZYNQ_ZC770=y
+CONFIG_DEFAULT_DEVICE_TREE=zynq-zc770-xm011
+# CONFIG_SYS_MALLOC_F is not set
+CONFIG_SPL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_FIT_SIGNATURE=y
+CONFIG_SYS_EXTRA_OPTIONS=ZC770_XM011
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_SETEXPR is not set
diff --git a/include/configs/zynq_zc770.h b/include/configs/zynq_zc770.h
index 16b904743f1e..7a1b8729e5b1 100644
--- a/include/configs/zynq_zc770.h
+++ b/include/configs/zynq_zc770.h
@@ -21,6 +21,9 @@
# define CONFIG_ZYNQ_SDHCI0
# define CONFIG_ZYNQ_SPI
+#elif defined(CONFIG_ZC770_XM011)
+# define CONFIG_ZYNQ_SERIAL_UART1
+
#elif defined(CONFIG_ZC770_XM012)
# define CONFIG_ZYNQ_SERIAL_UART1
# undef CONFIG_SYS_NO_FLASH
--
2.3.5
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[U-Boot] [PATCH 0/8] ARM: keystone2: Clocls and PLLs cleanup
This seires does a several bunch of cleanups for clock and PLL related definitions. This helps a lot in adding data for new Keystone2 SoCs. And also adds support for CPU detection. This is based on Nishanth's config cleanup series: https://www.mail-archive.com/u-boot%40lists.denx.de/msg177822.html Tested on K2HK-evm: http://pastebin.ubuntu.com/11920541/ Lokesh Vutla (8): ARM: keystone2: Cleanup SoC detection ARM: keystone2: Enable CONFIG_DISPLAY_CPUINFO ARM: keystone2: Cleanup PLL init code ARM: keystone2: Fix dev and arm speed detection ARM: keystone2: Use common address for PLL ARM: keystone2: Cleanup pll calling ARM: keystone2: Remove unsed externalk clocks ARM: keystone2: Use common definition for clk_get_rate arch/arm/mach-keystone/Makefile| 3 - arch/arm/mach-keystone/clock-k2e.c | 117 - arch/arm/mach-keystone/clock-k2hk.c| 145 -- arch/arm/mach-keystone/clock-k2l.c | 138 -- arch/arm/mach-keystone/clock.c | 527 + arch/arm/mach-keystone/cmd_clock.c | 7 +- arch/arm/mach-keystone/include/mach/clock-k2e.h| 58 +-- arch/arm/mach-keystone/include/mach/clock-k2hk.h | 64 +-- arch/arm/mach-keystone/include/mach/clock-k2l.h| 59 +-- arch/arm/mach-keystone/include/mach/clock.h| 60 ++- arch/arm/mach-keystone/include/mach/clock_defs.h | 107 +++-- .../arm/mach-keystone/include/mach/hardware-k2hk.h | 4 - arch/arm/mach-keystone/include/mach/hardware.h | 51 +- arch/arm/mach-keystone/init.c | 24 + board/ti/ks2_evm/board.c | 1 - board/ti/ks2_evm/board_k2e.c | 41 +- board/ti/ks2_evm/board_k2hk.c | 47 +- board/ti/ks2_evm/board_k2l.c | 46 +- include/configs/ti_armv7_keystone2.h | 1 + 19 files changed, 603 insertions(+), 897 deletions(-) delete mode 100644 arch/arm/mach-keystone/clock-k2e.c delete mode 100644 arch/arm/mach-keystone/clock-k2hk.c delete mode 100644 arch/arm/mach-keystone/clock-k2l.c -- 2.1.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/8] ARM: keystone2: Cleanup SoC detection
Add proper register definition for JTAG ID and
cleanup cpu_is_* functions.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
---
arch/arm/mach-keystone/include/mach/hardware.h | 42 --
1 file changed, 26 insertions(+), 16 deletions(-)
diff --git a/arch/arm/mach-keystone/include/mach/hardware.h
b/arch/arm/mach-keystone/include/mach/hardware.h
index 16cbcee..15c25b1 100644
--- a/arch/arm/mach-keystone/include/mach/hardware.h
+++ b/arch/arm/mach-keystone/include/mach/hardware.h
@@ -237,6 +237,17 @@ typedef volatile unsigned int *dv_reg_p;
/* SGMII SerDes */
#define KS2_SGMII_SERDES_BASE 0x0232a000
+/* JTAG ID register */
+#define JTAGID_VARIANT_SHIFT 28
+#define JTAGID_VARIANT_MASK(0xf 28)
+#define JTAGID_PART_NUM_SHIFT 12
+#define JTAGID_PART_NUM_MASK (0x 12)
+
+/* PART NUMBER definitions */
+#define CPU_66AK2Hx0xb981
+#define CPU_66AK2Ex0xb9a6
+#define CPU_66AK2Lx0xb9a7
+
#ifdef CONFIG_SOC_K2HK
#include asm/arch/hardware-k2hk.h
#endif
@@ -250,34 +261,33 @@ typedef volatile unsigned int *dv_reg_p;
#endif
#ifndef __ASSEMBLY__
-static inline int cpu_is_k2hk(void)
+
+static inline u16 get_part_number(void)
{
- unsigned int jtag_id= __raw_readl(KS2_JTAG_ID_REG);
- unsigned int part_no= (jtag_id 12) 0x;
+ u32 jtag_id = __raw_readl(KS2_JTAG_ID_REG);
- return (part_no == 0xb981) ? 1 : 0;
+ return (jtag_id JTAGID_PART_NUM_MASK) JTAGID_PART_NUM_SHIFT;
}
-static inline int cpu_is_k2e(void)
+static inline u8 cpu_is_k2hk(void)
{
- unsigned int jtag_id= __raw_readl(KS2_JTAG_ID_REG);
- unsigned int part_no= (jtag_id 12) 0x;
-
- return (part_no == 0xb9a6) ? 1 : 0;
+ return get_part_number() == CPU_66AK2Hx;
}
-static inline int cpu_is_k2l(void)
+static inline u8 cpu_is_k2e(void)
{
- unsigned int jtag_id= __raw_readl(KS2_JTAG_ID_REG);
- unsigned int part_no= (jtag_id 12) 0x;
+ return get_part_number() == CPU_66AK2Ex;
+}
- return (part_no == 0xb9a7) ? 1 : 0;
+static inline u8 cpu_is_k2l(void)
+{
+ return get_part_number() == CPU_66AK2Lx;
}
-static inline int cpu_revision(void)
+static inline u8 cpu_revision(void)
{
- unsigned int jtag_id= __raw_readl(KS2_JTAG_ID_REG);
- unsigned int rev= (jtag_id 28) 0xf;
+ u32 jtag_id = __raw_readl(KS2_JTAG_ID_REG);
+ u8 rev = (jtag_id JTAGID_VARIANT_MASK) JTAGID_VARIANT_SHIFT;
return rev;
}
--
2.1.4
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[U-Boot] [PATCH 17/19] ARM: zynq: DT: Add zc702 pushbuttons to DT as gpio-keys
Adds the two MIO connected pushbuttons on the zc702 board to the
devicetree as a single multi-key device for us with the gpio-keys driver.
Signed-off-by: Ezra Savard ezra.sav...@xilinx.com
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
arch/arm/dts/zynq-zc702.dts | 21 +
1 file changed, 21 insertions(+)
diff --git a/arch/arm/dts/zynq-zc702.dts b/arch/arm/dts/zynq-zc702.dts
index 1c879846813e..6691a8de247d 100644
--- a/arch/arm/dts/zynq-zc702.dts
+++ b/arch/arm/dts/zynq-zc702.dts
@@ -29,6 +29,27 @@
stdout-path = serial0:115200n8;
};
+ gpio-keys {
+ compatible = gpio-keys;
+ #address-cells = 1;
+ #size-cells = 0;
+ autorepeat;
+ sw14 {
+ label = sw14;
+ gpios = gpio0 12 0;
+ linux,code = 108; /* down */
+ gpio-key,wakeup;
+ autorepeat;
+ };
+ sw13 {
+ label = sw13;
+ gpios = gpio0 14 0;
+ linux,code = 103; /* up */
+ gpio-key,wakeup;
+ autorepeat;
+ };
+ };
+
leds {
compatible = gpio-leds;
--
2.3.5
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[U-Boot] [PATCH 18/19] ARM: zynq: DT: Update zc770 dtses
Platform DTSes are missing content needed for platform to be able to use
OF binding and DM.
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
arch/arm/dts/zynq-zc770-xm010.dts | 75 ---
arch/arm/dts/zynq-zc770-xm012.dts | 51 +++---
arch/arm/dts/zynq-zc770-xm013.dts | 62 ++--
3 files changed, 176 insertions(+), 12 deletions(-)
diff --git a/arch/arm/dts/zynq-zc770-xm010.dts
b/arch/arm/dts/zynq-zc770-xm010.dts
index bf107e308a6a..da3a182ea1e1 100644
--- a/arch/arm/dts/zynq-zc770-xm010.dts
+++ b/arch/arm/dts/zynq-zc770-xm010.dts
@@ -1,7 +1,7 @@
/*
* Xilinx ZC770 XM010 board DTS
*
- * Copyright (C) 2013 Xilinx, Inc.
+ * Copyright (C) 2013 - 2015 Xilinx, Inc.
*
* SPDX-License-Identifier:GPL-2.0+
*/
@@ -9,20 +9,85 @@
#include zynq-7000.dtsi
/ {
- model = Zynq ZC770 XM010 Board;
compatible = xlnx,zynq-zc770-xm010, xlnx,zynq-7000;
+ model = Xilinx Zynq;
aliases {
+ ethernet0 = gem0;
+ i2c0 = i2c0;
serial0 = uart1;
- spi1 = spi1;
+ spi0 = spi1;
};
- memory {
+ chosen {
+ bootargs = console=ttyPS0,115200 root=/dev/ram rw earlyprintk;
+ linux,stdout-path = uart1;
+ stdout-path = uart1;
+ };
+
+ memory@0 {
device_type = memory;
- reg = 0 0x4000;
+ reg = 0x0 0x4000;
+ };
+
+ usb_phy0: phy0 {
+ compatible = usb-nop-xceiv;
+ #phy-cells = 0;
};
};
spi1 {
status = okay;
+ num-cs = 4;
+ is-decoded-cs = 0;
+ flash@0 {
+ compatible = sst25wf080;
+ reg = 1;
+ spi-max-frequency = 100;
+ #address-cells = 1;
+ #size-cells = 1;
+ partition@test {
+ label = spi-flash;
+ reg = 0x0 0x10;
+ };
+ };
+};
+
+can0 {
+ status = okay;
+};
+
+gem0 {
+ status = okay;
+ phy-mode = rgmii-id;
+ phy-handle = ethernet_phy;
+
+ ethernet_phy: ethernet-phy@7 {
+ reg = 7;
+ };
+};
+
+i2c0 {
+ status = okay;
+ clock-frequency = 40;
+
+ m24c02_eeprom@52 {
+ compatible = at,24c02;
+ reg = 0x52;
+ };
+
+};
+
+sdhci0 {
+ status = okay;
+};
+
+uart1 {
+ status = okay;
+};
+
+usb0 {
+ status = okay;
+ dr_mode = host;
+ usb-phy = usb_phy0;
};
diff --git a/arch/arm/dts/zynq-zc770-xm012.dts
b/arch/arm/dts/zynq-zc770-xm012.dts
index 127a6619c631..f8cc5039d6b7 100644
--- a/arch/arm/dts/zynq-zc770-xm012.dts
+++ b/arch/arm/dts/zynq-zc770-xm012.dts
@@ -1,7 +1,7 @@
/*
* Xilinx ZC770 XM012 board DTS
*
- * Copyright (C) 2013 Xilinx, Inc.
+ * Copyright (C) 2013 - 2015 Xilinx, Inc.
*
* SPDX-License-Identifier:GPL-2.0+
*/
@@ -9,15 +9,58 @@
#include zynq-7000.dtsi
/ {
- model = Zynq ZC770 XM012 Board;
compatible = xlnx,zynq-zc770-xm012, xlnx,zynq-7000;
+ model = Xilinx Zynq;
aliases {
+ i2c0 = i2c0;
+ i2c1 = i2c1;
serial0 = uart1;
+ spi0 = spi1;
};
- memory {
+ chosen {
+ bootargs = console=ttyPS0,115200 root=/dev/ram rw earlyprintk;
+ linux,stdout-path = uart1;
+ stdout-path = uart1;
+ };
+
+ memory@0 {
device_type = memory;
- reg = 0 0x4000;
+ reg = 0x0 0x4000;
+ };
+};
+
+spi1 {
+ status = okay;
+ num-cs = 4;
+ is-decoded-cs = 0;
+};
+
+can1 {
+ status = okay;
+};
+
+i2c0 {
+ status = okay;
+ clock-frequency = 40;
+
+ m24c02_eeprom@52 {
+ compatible = at,24c02;
+ reg = 0x52;
+ };
+};
+
+i2c1 {
+ status = okay;
+ clock-frequency = 40;
+
+ m24c02_eeprom@52 {
+ compatible = at,24c02;
+ reg = 0x52;
};
};
+
+uart1 {
+ status = okay;
+};
diff --git a/arch/arm/dts/zynq-zc770-xm013.dts
b/arch/arm/dts/zynq-zc770-xm013.dts
index c61c7e7592f8..436a8cd1b9a9 100644
--- a/arch/arm/dts/zynq-zc770-xm013.dts
+++ b/arch/arm/dts/zynq-zc770-xm013.dts
@@ -9,15 +9,71 @@
#include zynq-7000.dtsi
/ {
- model = Zynq ZC770 XM013 Board;
compatible = xlnx,zynq-zc770-xm013, xlnx,zynq-7000;
+ model = Xilinx Zynq;
aliases {
+ ethernet0 = gem1;
+ i2c0 = i2c1;
serial0 = uart0;
+ spi0 = spi0;
};
- memory {
+ chosen {
+ bootargs = console=ttyPS0,115200 root=/dev/ram rw earlyprintk;
+ linux,stdout-path = uart0;
+ stdout-path = uart0;
+ };
+
+ memory@0 {
[U-Boot] [PATCH 1/2] zynqmp: mp: Simplify set_r5_start handling
Pass directly boot_addr which is LOVEC (0) or HIVEC (0x). No reason to use magic values 0 and 1. Signed-off-by: Michal Simek michal.si...@xilinx.com --- arch/arm/cpu/armv8/zynqmp/mp.c | 7 +-- 1 file changed, 1 insertion(+), 6 deletions(-) diff --git a/arch/arm/cpu/armv8/zynqmp/mp.c b/arch/arm/cpu/armv8/zynqmp/mp.c index 17e32a7b7ce8..dcb80b522ead 100644 --- a/arch/arm/cpu/armv8/zynqmp/mp.c +++ b/arch/arm/cpu/armv8/zynqmp/mp.c @@ -216,12 +216,7 @@ int cpu_release(int nr, int argc, char * const argv[]) printf(R5 lockstep mode\n); set_r5_tcm_mode(LOCK); set_r5_halt_mode(HALT, LOCK); - - if (boot_addr == 0) - set_r5_start(0); - else - set_r5_start(1); - + set_r5_start(boot_addr); enable_clock_r5(); release_r5_reset(LOCK); set_r5_halt_mode(RELEASE, LOCK); -- 2.3.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/8] ARM: keystone2: Cleanup SoC detection
On 07/22/2015 11:39 AM, Lokesh Vutla wrote:
Add proper register definition for JTAG ID and
cleanup cpu_is_* functions.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
---
arch/arm/mach-keystone/include/mach/hardware.h | 42 --
1 file changed, 26 insertions(+), 16 deletions(-)
diff --git a/arch/arm/mach-keystone/include/mach/hardware.h
b/arch/arm/mach-keystone/include/mach/hardware.h
index 16cbcee..15c25b1 100644
--- a/arch/arm/mach-keystone/include/mach/hardware.h
+++ b/arch/arm/mach-keystone/include/mach/hardware.h
@@ -237,6 +237,17 @@ typedef volatile unsigned int *dv_reg_p;
/* SGMII SerDes */
#define KS2_SGMII_SERDES_BASE 0x0232a000
+/* JTAG ID register */
+#define JTAGID_VARIANT_SHIFT 28
+#define JTAGID_VARIANT_MASK(0xf 28)
+#define JTAGID_PART_NUM_SHIFT 12
+#define JTAGID_PART_NUM_MASK (0x 12)
+
+/* PART NUMBER definitions */
+#define CPU_66AK2Hx0xb981
+#define CPU_66AK2Ex0xb9a6
+#define CPU_66AK2Lx0xb9a7
+
#ifdef CONFIG_SOC_K2HK
#include asm/arch/hardware-k2hk.h
#endif
@@ -250,34 +261,33 @@ typedef volatile unsigned int *dv_reg_p;
#endif
#ifndef __ASSEMBLY__
-static inline int cpu_is_k2hk(void)
+
+static inline u16 get_part_number(void)
{
- unsigned int jtag_id= __raw_readl(KS2_JTAG_ID_REG);
- unsigned int part_no= (jtag_id 12) 0x;
+ u32 jtag_id = __raw_readl(KS2_JTAG_ID_REG);
- return (part_no == 0xb981) ? 1 : 0;
+ return (jtag_id JTAGID_PART_NUM_MASK) JTAGID_PART_NUM_SHIFT;
}
-static inline int cpu_is_k2e(void)
+static inline u8 cpu_is_k2hk(void)
{
- unsigned int jtag_id= __raw_readl(KS2_JTAG_ID_REG);
- unsigned int part_no= (jtag_id 12) 0x;
-
- return (part_no == 0xb9a6) ? 1 : 0;
+ return get_part_number() == CPU_66AK2Hx;
}
-static inline int cpu_is_k2l(void)
+static inline u8 cpu_is_k2e(void)
{
- unsigned int jtag_id= __raw_readl(KS2_JTAG_ID_REG);
- unsigned int part_no= (jtag_id 12) 0x;
+ return get_part_number() == CPU_66AK2Ex;
+}
- return (part_no == 0xb9a7) ? 1 : 0;
+static inline u8 cpu_is_k2l(void)
+{
+ return get_part_number() == CPU_66AK2Lx;
}
-static inline int cpu_revision(void)
+static inline u8 cpu_revision(void)
{
- unsigned int jtag_id= __raw_readl(KS2_JTAG_ID_REG);
- unsigned int rev= (jtag_id 28) 0xf;
+ u32 jtag_id = __raw_readl(KS2_JTAG_ID_REG);
+ u8 rev = (jtag_id JTAGID_VARIANT_MASK) JTAGID_VARIANT_SHIFT;
return rev;
}
Reviewed-by: Vitaly Andrianov vita...@ti.com
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Re: [U-Boot] [PATCH V3 3/8] configs: rename ks2_evm into ti_armv7_keystone2
On 07/18/2015 12:40 PM, Nishanth Menon wrote:
rename the keystone2 common header into an keystone2 architecture
specific header which can then reuse the common ti_armv7 config headers.
Acked-by: Vitaly Andrianov vita...@ti.com
Acked-By: Murali Karicheri m-kariche...@ti.com
Signed-off-by: Nishanth Menon n...@ti.com
---
V3: picked up acks, no change.
V2: https://patchwork.ozlabs.org/patch/496822/ (no change)
V1: https://patchwork.ozlabs.org/patch/496728/
include/configs/k2e_evm.h | 2 +-
include/configs/k2hk_evm.h | 2 +-
include/configs/k2l_evm.h | 2 +-
include/configs/{ks2_evm.h = ti_armv7_keystone2.h} | 0
4 files changed, 3 insertions(+), 3 deletions(-)
rename include/configs/{ks2_evm.h = ti_armv7_keystone2.h} (100%)
diff --git a/include/configs/k2e_evm.h b/include/configs/k2e_evm.h
index a28ceb7064a7..ac50a01b2980 100644
--- a/include/configs/k2e_evm.h
+++ b/include/configs/k2e_evm.h
@@ -27,7 +27,7 @@
name_uboot=u-boot-spi-k2e-evm.gph\0 \
name_fs=arago-console-image-k2e-evm.cpio.gz\0
-#include configs/ks2_evm.h
+#include configs/ti_armv7_keystone2.h
/* SPL SPI Loader Configuration */
#define CONFIG_SPL_TEXT_BASE 0x0c10
diff --git a/include/configs/k2hk_evm.h b/include/configs/k2hk_evm.h
index eae772178338..29e3403aa082 100644
--- a/include/configs/k2hk_evm.h
+++ b/include/configs/k2hk_evm.h
@@ -27,7 +27,7 @@
name_uboot=u-boot-spi-k2hk-evm.gph\0\
name_fs=arago-console-image-k2hk-evm.cpio.gz\0
-#include configs/ks2_evm.h
+#include configs/ti_armv7_keystone2.h
/* SPL SPI Loader Configuration */
#define CONFIG_SPL_TEXT_BASE 0x0c20
diff --git a/include/configs/k2l_evm.h b/include/configs/k2l_evm.h
index 57da0579255a..50d5c991a0bb 100644
--- a/include/configs/k2l_evm.h
+++ b/include/configs/k2l_evm.h
@@ -27,7 +27,7 @@
name_uboot=u-boot-spi-k2l-evm.gph\0 \
name_fs=arago-console-image-k2l-evm.cpio.gz\0
-#include configs/ks2_evm.h
+#include configs/ti_armv7_keystone2.h
/* SPL SPI Loader Configuration */
#define CONFIG_SPL_TEXT_BASE 0x0c10
diff --git a/include/configs/ks2_evm.h b/include/configs/ti_armv7_keystone2.h
similarity index 100%
rename from include/configs/ks2_evm.h
rename to include/configs/ti_armv7_keystone2.h
Reviewed-by: Murali Karicheri m-kariche...@ti.com
--
Murali Karicheri
Linux Kernel, Keystone
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Re: [U-Boot] [PATCH V3 3/8] configs: rename ks2_evm into ti_armv7_keystone2
On Sat, Jul 18, 2015 at 11:40:31AM -0500, Nishanth Menon wrote: rename the keystone2 common header into an keystone2 architecture specific header which can then reuse the common ti_armv7 config headers. Acked-by: Vitaly Andrianov vita...@ti.com Acked-By: Murali Karicheri m-kariche...@ti.com Signed-off-by: Nishanth Menon n...@ti.com Reviewed-by: Tom Rini tr...@konsulko.com -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V3 6/8] ti_armv7_keystone2: switch to using kernel zImage
On Sat, Jul 18, 2015 at 11:40:34AM -0500, Nishanth Menon wrote: Switch to using zImage instead of uImage. and while at it, start using bootz as default. While at it, get rid of BOOTIMAGE define and start using Linux upstream dtb file names. Signed-off-by: Nishanth Menon n...@ti.com Reviewed-by: Tom Rini tr...@konsulko.com -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V3 7/8] configs: k2*_evm: rename skernel binary names to generated file names
On Sat, Jul 18, 2015 at 11:40:35AM -0500, Nishanth Menon wrote: using http://git.ti.com/keystone-linux/boot-monitor/trees/master as reference (tag K2_BM_15.07) the generated files do not have evm extensions by default. So dont use -evm extension. Signed-off-by: Nishanth Menon n...@ti.com Reviewed-by: Tom Rini tr...@konsulko.com -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V3 1/8] configs: split ti_armv7_common into a omap generic header
On Sat, Jul 18, 2015 at 11:40:29AM -0500, Nishanth Menon wrote: TI armv7 based SoCs are based on two architectures - one based on OMAP generation architecture and others based on Keystone architecture. Many of the options are architecture specific, however a lot are common with v7 architecture. So, step 1 will be to move out OMAP specific stuff from ti_armv7_common into a ti_armv7_omap.h header which is then used by all the relevant architecture headers. Signed-off-by: Nishanth Menon n...@ti.com Reviewed-by: Tom Rini tr...@konsulko.com -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 8/8] ARM: keystone2: Use common definition for clk_get_rate
Since all the clocks are defined common, and has the same logic to get
the frequencies, use a common definition for for clk_get_rate().
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
---
arch/arm/mach-keystone/Makefile | 3 -
arch/arm/mach-keystone/clock-k2e.c | 95
arch/arm/mach-keystone/clock-k2hk.c | 105 -
arch/arm/mach-keystone/clock-k2l.c | 99
arch/arm/mach-keystone/clock.c | 139 +++
arch/arm/mach-keystone/cmd_clock.c | 7 +-
arch/arm/mach-keystone/include/mach/clock-k2e.h | 21
arch/arm/mach-keystone/include/mach/clock-k2hk.h | 23
arch/arm/mach-keystone/include/mach/clock-k2l.h | 22
arch/arm/mach-keystone/include/mach/clock.h | 23
arch/arm/mach-keystone/include/mach/clock_defs.h | 32 --
11 files changed, 167 insertions(+), 402 deletions(-)
delete mode 100644 arch/arm/mach-keystone/clock-k2e.c
delete mode 100644 arch/arm/mach-keystone/clock-k2hk.c
delete mode 100644 arch/arm/mach-keystone/clock-k2l.c
diff --git a/arch/arm/mach-keystone/Makefile b/arch/arm/mach-keystone/Makefile
index ed030db..ffd9ead 100644
--- a/arch/arm/mach-keystone/Makefile
+++ b/arch/arm/mach-keystone/Makefile
@@ -8,9 +8,6 @@
obj-y += init.o
obj-y += psc.o
obj-y += clock.o
-obj-$(CONFIG_SOC_K2HK) += clock-k2hk.o
-obj-$(CONFIG_SOC_K2E) += clock-k2e.o
-obj-$(CONFIG_SOC_K2L) += clock-k2l.o
obj-y += cmd_clock.o
obj-y += cmd_mon.o
obj-y += msmc.o
diff --git a/arch/arm/mach-keystone/clock-k2e.c
b/arch/arm/mach-keystone/clock-k2e.c
deleted file mode 100644
index 7d163a4..000
diff --git a/arch/arm/mach-keystone/clock-k2hk.c
b/arch/arm/mach-keystone/clock-k2hk.c
deleted file mode 100644
index 2e36891..000
diff --git a/arch/arm/mach-keystone/clock-k2l.c
b/arch/arm/mach-keystone/clock-k2l.c
deleted file mode 100644
index 0004059..000
diff --git a/arch/arm/mach-keystone/clock.c b/arch/arm/mach-keystone/clock.c
index 824a6ce..54f30d7 100644
--- a/arch/arm/mach-keystone/clock.c
+++ b/arch/arm/mach-keystone/clock.c
@@ -246,3 +246,142 @@ int get_max_dev_speed(void)
return get_max_speed(devspeed, DEV_SUPPORTED_SPEEDS);
}
+
+/**
+ * pll_freq_get - get pll frequency
+ * @pll: pll identifier
+ */
+static unsigned long pll_freq_get(int pll)
+{
+ unsigned long mult = 1, prediv = 1, output_div = 2;
+ unsigned long ret;
+ u32 tmp, reg;
+
+ if (pll == MAIN_PLL) {
+ ret = external_clk[sys_clk];
+ if (pllctl_reg_read(pll, ctl) PLLCTL_PLLEN_MASK) {
+ /* PLL mode */
+ tmp = __raw_readl(KS2_MAINPLLCTL0);
+ prediv = (tmp CFG_PLLCTL0_PLLD_MASK) + 1;
+ mult = ((tmp CFG_PLLCTL0_PLLM_HI_MASK)
+ CFG_PLLCTL0_PLLM_SHIFT |
+ (pllctl_reg_read(pll, mult)
+PLLM_MULT_LO_MASK)) + 1;
+ output_div = ((pllctl_reg_read(pll, secctl)
+ SECCTL_OP_DIV_MASK)
+ SECCTL_OP_DIV_SHIFT) + 1;
+
+ ret = ret / prediv / output_div * mult;
+ }
+ } else {
+ switch (pll) {
+ case PASS_PLL:
+ ret = external_clk[pa_clk];
+ reg = KS2_PASSPLLCTL0;
+ break;
+ case TETRIS_PLL:
+ ret = external_clk[tetris_clk];
+ reg = KS2_ARMPLLCTL0;
+ break;
+ case DDR3A_PLL:
+ ret = external_clk[ddr3a_clk];
+ reg = KS2_DDR3APLLCTL0;
+ break;
+ case DDR3B_PLL:
+ ret = external_clk[ddr3b_clk];
+ reg = KS2_DDR3BPLLCTL0;
+ break;
+ default:
+ return 0;
+ }
+
+ tmp = __raw_readl(reg);
+
+ if (!(tmp CFG_PLLCTL0_BYPASS_MASK)) {
+ /* Bypass disabled */
+ prediv = (tmp CFG_PLLCTL0_PLLD_MASK) + 1;
+ mult = ((tmp CFG_PLLCTL0_PLLM_MASK)
+ CFG_PLLCTL0_PLLM_SHIFT) + 1;
+ output_div = ((tmp CFG_PLLCTL0_CLKOD_MASK)
+ CFG_PLLCTL0_CLKOD_SHIFT) + 1;
+ ret = ((ret / prediv) * mult) / output_div;
+ }
+ }
+
+ return ret;
+}
+
+unsigned long clk_get_rate(unsigned int clk)
+{
+ unsigned long freq = 0;
+
+ switch (clk) {
+ case core_pll_clk:
+ freq = pll_freq_get(CORE_PLL);
+ break;
+ case pass_pll_clk:
+ freq = pll_freq_get(PASS_PLL);
+
[U-Boot] [PATCH 7/8] ARM: keystone2: Remove unsed external clocks
Remove unused external clocks and make a common definition
for all keystone platforms.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
---
arch/arm/mach-keystone/clock-k2e.c | 2 +-
arch/arm/mach-keystone/clock-k2l.c | 2 +-
arch/arm/mach-keystone/include/mach/clock-k2e.h | 15 ---
arch/arm/mach-keystone/include/mach/clock-k2hk.h | 18 --
arch/arm/mach-keystone/include/mach/clock-k2l.h | 15 ---
arch/arm/mach-keystone/include/mach/clock.h | 11 +++
board/ti/ks2_evm/board_k2e.c | 7 +--
board/ti/ks2_evm/board_k2hk.c| 6 --
board/ti/ks2_evm/board_k2l.c | 5 +
9 files changed, 15 insertions(+), 66 deletions(-)
diff --git a/arch/arm/mach-keystone/clock-k2e.c
b/arch/arm/mach-keystone/clock-k2e.c
index b23d2a5..7d163a4 100644
--- a/arch/arm/mach-keystone/clock-k2e.c
+++ b/arch/arm/mach-keystone/clock-k2e.c
@@ -43,7 +43,7 @@ static unsigned long pll_freq_get(int pll)
reg = KS2_PASSPLLCTL0;
break;
case DDR3_PLL:
- ret = external_clk[ddr3_clk];
+ ret = external_clk[ddr3a_clk];
reg = KS2_DDR3APLLCTL0;
break;
default:
diff --git a/arch/arm/mach-keystone/clock-k2l.c
b/arch/arm/mach-keystone/clock-k2l.c
index 0bd0fd6..0004059 100644
--- a/arch/arm/mach-keystone/clock-k2l.c
+++ b/arch/arm/mach-keystone/clock-k2l.c
@@ -47,7 +47,7 @@ static unsigned long pll_freq_get(int pll)
reg = KS2_ARMPLLCTL0;
break;
case DDR3_PLL:
- ret = external_clk[ddr3_clk];
+ ret = external_clk[ddr3a_clk];
reg = KS2_DDR3APLLCTL0;
break;
default:
diff --git a/arch/arm/mach-keystone/include/mach/clock-k2e.h
b/arch/arm/mach-keystone/include/mach/clock-k2e.h
index 3bde6da..e2467e7 100644
--- a/arch/arm/mach-keystone/include/mach/clock-k2e.h
+++ b/arch/arm/mach-keystone/include/mach/clock-k2e.h
@@ -10,21 +10,6 @@
#ifndef __ASM_ARCH_CLOCK_K2E_H
#define __ASM_ARCH_CLOCK_K2E_H
-enum ext_clk_e {
- sys_clk,
- alt_core_clk,
- pa_clk,
- ddr3_clk,
- mcm_clk,
- pcie_clk,
- sgmii_clk,
- xgmii_clk,
- usb_clk,
- ext_clk_count /* number of external clocks */
-};
-
-extern unsigned int external_clk[ext_clk_count];
-
#define CLK_LIST(CLK)\
CLK(0, core_pll_clk)\
CLK(1, pass_pll_clk)\
diff --git a/arch/arm/mach-keystone/include/mach/clock-k2hk.h
b/arch/arm/mach-keystone/include/mach/clock-k2hk.h
index 366bf0e..775a9cb 100644
--- a/arch/arm/mach-keystone/include/mach/clock-k2hk.h
+++ b/arch/arm/mach-keystone/include/mach/clock-k2hk.h
@@ -10,24 +10,6 @@
#ifndef __ASM_ARCH_CLOCK_K2HK_H
#define __ASM_ARCH_CLOCK_K2HK_H
-enum ext_clk_e {
- sys_clk,
- alt_core_clk,
- pa_clk,
- tetris_clk,
- ddr3a_clk,
- ddr3b_clk,
- mcm_clk,
- pcie_clk,
- sgmii_srio_clk,
- xgmii_clk,
- usb_clk,
- rp1_clk,
- ext_clk_count /* number of external clocks */
-};
-
-extern unsigned int external_clk[ext_clk_count];
-
#define CLK_LIST(CLK)\
CLK(0, core_pll_clk)\
CLK(1, pass_pll_clk)\
diff --git a/arch/arm/mach-keystone/include/mach/clock-k2l.h
b/arch/arm/mach-keystone/include/mach/clock-k2l.h
index e3f005a..485746d 100644
--- a/arch/arm/mach-keystone/include/mach/clock-k2l.h
+++ b/arch/arm/mach-keystone/include/mach/clock-k2l.h
@@ -10,21 +10,6 @@
#ifndef __ASM_ARCH_CLOCK_K2L_H
#define __ASM_ARCH_CLOCK_K2L_H
-enum ext_clk_e {
- sys_clk,
- alt_core_clk,
- pa_clk,
- tetris_clk,
- ddr3_clk,
- pcie_clk,
- sgmii_clk,
- usb_clk,
- rp1_clk,
- ext_clk_count /* number of external clocks */
-};
-
-extern unsigned int external_clk[ext_clk_count];
-
#define CLK_LIST(CLK)\
CLK(0, core_pll_clk)\
CLK(1, pass_pll_clk)\
diff --git a/arch/arm/mach-keystone/include/mach/clock.h
b/arch/arm/mach-keystone/include/mach/clock.h
index ea7d8bc..2509d5d 100644
--- a/arch/arm/mach-keystone/include/mach/clock.h
+++ b/arch/arm/mach-keystone/include/mach/clock.h
@@ -52,6 +52,16 @@ enum {
MAX_PLL_COUNT,
};
+enum ext_clk_e {
+ sys_clk,
+ alt_core_clk,
+ pa_clk,
+ tetris_clk,
+ ddr3a_clk,
+ ddr3b_clk,
+ ext_clk_count /* number of external clocks */
+};
+
enum clk_e {
CLK_LIST(GENERATE_ENUM)
};
@@ -69,6 +79,7 @@ struct pll_init_data {
int pll_od; /* PLL output divider */
};
+extern unsigned int external_clk[ext_clk_count];
extern const struct keystone_pll_regs keystone_pll_regs[];
extern int dev_speeds[];
extern int arm_speeds[];
diff --git a/board/ti/ks2_evm/board_k2e.c
[U-Boot] [PATCH 05/48] Add a way to skip relocation
When running U-Boot as an EFI application we cannot relocate since we do not
have relocation information. U-Boot has already been relocated to a suitable
address.
Add a global_data flag to control skipping relocation.
Signed-off-by: Simon Glass s...@chromium.org
---
common/board_f.c | 7 +++
include/asm-generic/global_data.h | 1 +
2 files changed, 8 insertions(+)
diff --git a/common/board_f.c b/common/board_f.c
index 21be26f..5e09c5f 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -664,6 +664,11 @@ static int reloc_fdt(void)
static int setup_reloc(void)
{
+ if (gd-flags GD_FLG_SKIP_RELOC) {
+ debug(Skipping relocation due to flag\n);
+ return 0;
+ }
+
#ifdef CONFIG_SYS_TEXT_BASE
gd-reloc_off = gd-relocaddr - CONFIG_SYS_TEXT_BASE;
#ifdef CONFIG_M68K
@@ -689,6 +694,8 @@ static int setup_reloc(void)
static int jump_to_copy(void)
{
+ if (gd-flags GD_FLG_SKIP_RELOC)
+ return 0;
/*
* x86 is special, but in a nice way. It uses a trampoline which
* enables the dcache if possible.
diff --git a/include/asm-generic/global_data.h
b/include/asm-generic/global_data.h
index db0550b..086ee96 100644
--- a/include/asm-generic/global_data.h
+++ b/include/asm-generic/global_data.h
@@ -116,5 +116,6 @@ typedef struct global_data {
#define GD_FLG_ENV_READY 0x00080 /* Env. imported into hash table */
#define GD_FLG_SERIAL_READY0x00100 /* Pre-reloc serial console ready */
#define GD_FLG_FULL_MALLOC_INIT0x00200 /* Full malloc() is ready
*/
+#define GD_FLG_SKIP_RELOC 0x00400 /* Don't relocate */
#endif /* __ASM_GENERIC_GBL_DATA_H */
--
2.4.3.573.g4eafbef
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[U-Boot] [PATCH 16/48] pci: Fix up code for CONFIG_PCI_ENUM_ONLY
This option is not used by any board but appears to still be useful, at least
for testing. With recent commits it does not build, so fix it.
Signed-off-by: Simon Glass s...@chromium.org
---
drivers/pci/pci_auto.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/pci/pci_auto.c b/drivers/pci/pci_auto.c
index 7ff282b..51d2ac0 100644
--- a/drivers/pci/pci_auto.c
+++ b/drivers/pci/pci_auto.c
@@ -82,9 +82,9 @@ void pciauto_setup_device(struct pci_controller *hose,
pci_size_t bar_size;
u16 cmdstat = 0;
int bar, bar_nr = 0;
+#ifndef CONFIG_PCI_ENUM_ONLY
u8 header_type;
int rom_addr;
-#ifndef CONFIG_PCI_ENUM_ONLY
pci_addr_t bar_value;
struct pci_region *bar_res;
int found_mem64 = 0;
@@ -181,6 +181,7 @@ void pciauto_setup_device(struct pci_controller *hose,
bar_nr++;
}
+#ifndef CONFIG_PCI_ENUM_ONLY
/* Configure the expansion ROM address */
pci_hose_read_config_byte(hose, dev, PCI_HEADER_TYPE, header_type);
if (header_type != PCI_HEADER_TYPE_CARDBUS) {
@@ -201,6 +202,7 @@ void pciauto_setup_device(struct pci_controller *hose,
debug(\n);
}
}
+#endif
pci_hose_write_config_word(hose, dev, PCI_COMMAND, cmdstat);
pci_hose_write_config_byte(hose, dev, PCI_CACHE_LINE_SIZE,
--
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[U-Boot] [PATCH 14/48] x86: Tidy up a few minor issues with interrupts
Fix a typo, remove an unused field and make sure to use existing #define
constants instead of open-coded values.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/x86/cpu/interrupts.c | 9 -
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/arch/x86/cpu/interrupts.c b/arch/x86/cpu/interrupts.c
index 853c82f..3a9c2d4 100644
--- a/arch/x86/cpu/interrupts.c
+++ b/arch/x86/cpu/interrupts.c
@@ -19,6 +19,7 @@
#include asm/processor-flags.h
#include linux/compiler.h
#include asm/msr.h
+#include asm/processor.h
#include asm/u-boot-x86.h
#include asm/i8259.h
@@ -46,7 +47,7 @@ static char *exceptions[] = {
Invalid TSS,
Segment Not Present,
Stack Segment Fault,
- Gerneral Protection,
+ General Protection,
Page Fault,
Reserved,
x87 FPU Floating-Point Error,
@@ -165,7 +166,6 @@ struct idt_entry {
struct desc_ptr {
unsigned short size;
unsigned long address;
- unsigned short segment;
} __packed;
struct idt_entry idt[256] __aligned(16);
@@ -202,14 +202,13 @@ int cpu_init_interrupts(void)
for (i = 0; i 256; i++) {
idt[i].access = 0x8e;
idt[i].res = 0;
- idt[i].selector = 0x10;
+ idt[i].selector = X86_GDT_ENTRY_32BIT_CS * X86_GDT_ENTRY_SIZE;
set_vector(i, irq_entry);
irq_entry += irq_entry_size;
}
- idt_ptr.size = 256 * 8;
+ idt_ptr.size = 256 * 8 - 1;
idt_ptr.address = (unsigned long) idt;
- idt_ptr.segment = 0x18;
load_idt(idt_ptr);
--
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[U-Boot] [PATCH 07/48] Bring in __aligned_u64 and friends to linux/types.h
These will be used for efi.h both for U-Boot running as an EFI application
and as a payload. They come from Linux 4.1.
Signed-off-by: Simon Glass s...@chromium.org
---
include/linux/types.h | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/include/linux/types.h b/include/linux/types.h
index c9a8d9a..255967f 100644
--- a/include/linux/types.h
+++ b/include/linux/types.h
@@ -113,6 +113,11 @@ typedef__s64 int64_t;
#endif /* __KERNEL_STRICT_NAMES */
+/* this is a special 64bit data type that is 8-byte aligned */
+#define aligned_u64 __u64 __aligned(8)
+#define aligned_be64 __be64 _aligned(8)
+#define aligned_le64 __le64 _aligned(8)
+
#if defined(CONFIG_USE_STDINT) defined(__INT64_TYPE__)
typedef__UINT64_TYPE__ uint64_t;
typedef__UINT64_TYPE__ u_int64_t;
@@ -145,7 +150,6 @@ typedef __u64 __bitwise __be64;
typedef __u16 __bitwise __sum16;
typedef __u32 __bitwise __wsum;
-
typedef unsigned __bitwise__ gfp_t;
struct ustat {
--
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[U-Boot] [PATCH 15/48] pci: Use debug() instead of DEBUGF() in pci_auto.c
This file does not need its own way of doing debug(). Clean it up to use the
new way.
Signed-off-by: Simon Glass s...@chromium.org
---
drivers/pci/pci_auto.c | 48 +++-
1 file changed, 23 insertions(+), 25 deletions(-)
diff --git a/drivers/pci/pci_auto.c b/drivers/pci/pci_auto.c
index a7af8cb..7ff282b 100644
--- a/drivers/pci/pci_auto.c
+++ b/drivers/pci/pci_auto.c
@@ -14,12 +14,6 @@
#include errno.h
#include pci.h
-#ifdef DEBUG
-#define DEBUGF(x...) printf(x)
-#else
-#define DEBUGF(x...)
-#endif /* DEBUG */
-
/* the user can define CONFIG_SYS_PCI_CACHE_LINE_SIZE to avoid problems */
#ifndef CONFIG_SYS_PCI_CACHE_LINE_SIZE
#define CONFIG_SYS_PCI_CACHE_LINE_SIZE 8
@@ -50,20 +44,21 @@ int pciauto_region_allocate(struct pci_region *res,
pci_size_t size,
pci_addr_t addr;
if (!res) {
- DEBUGF(No resource);
+ debug(No resource);
goto error;
}
addr = ((res-bus_lower - 1) | (size - 1)) + 1;
if (addr - res-bus_start + size res-size) {
- DEBUGF(No room in resource);
+ debug(No room in resource);
goto error;
}
res-bus_lower = addr + size;
- DEBUGF(address=0x%llx bus_lower=0x%llx, (u64)addr,
(u64)res-bus_lower);
+ debug(address=0x%llx bus_lower=0x%llx, (unsigned long long)addr,
+ (unsigned long long)res-bus_lower);
*bar = addr;
return 0;
@@ -122,7 +117,8 @@ void pciauto_setup_device(struct pci_controller *hose,
bar_res = io;
#endif
- DEBUGF(PCI Autoconfig: BAR %d, I/O, size=0x%llx, ,
bar_nr, (u64)bar_size);
+ debug(PCI Autoconfig: BAR %d, I/O, size=0x%llx, ,
+ bar_nr, (unsigned long long)bar_size);
} else {
if ((bar_response PCI_BASE_ADDRESS_MEM_TYPE_MASK) ==
PCI_BASE_ADDRESS_MEM_TYPE_64) {
@@ -152,7 +148,8 @@ void pciauto_setup_device(struct pci_controller *hose,
bar_res = mem;
#endif
- DEBUGF(PCI Autoconfig: BAR %d, Mem, size=0x%llx, ,
bar_nr, (u64)bar_size);
+ debug(PCI Autoconfig: BAR %d, Mem, size=0x%llx, ,
+ bar_nr, (unsigned long long)bar_size);
}
#ifndef CONFIG_PCI_ENUM_ONLY
@@ -179,7 +176,7 @@ void pciauto_setup_device(struct pci_controller *hose,
cmdstat |= (bar_response PCI_BASE_ADDRESS_SPACE) ?
PCI_COMMAND_IO : PCI_COMMAND_MEMORY;
- DEBUGF(\n);
+ debug(\n);
bar_nr++;
}
@@ -193,14 +190,15 @@ void pciauto_setup_device(struct pci_controller *hose,
pci_hose_read_config_dword(hose, dev, rom_addr, bar_response);
if (bar_response) {
bar_size = -(bar_response ~1);
- DEBUGF(PCI Autoconfig: ROM, size=%#x, , bar_size);
+ debug(PCI Autoconfig: ROM, size=%#x, ,
+ (unsigned int)bar_size);
if (pciauto_region_allocate(mem, bar_size,
bar_value) == 0) {
pci_hose_write_config_dword(hose, dev, rom_addr,
bar_value);
}
cmdstat |= PCI_COMMAND_MEMORY;
- DEBUGF(\n);
+ debug(\n);
}
}
@@ -411,7 +409,7 @@ void pciauto_config_init(struct pci_controller *hose)
if (hose-pci_mem) {
pciauto_region_init(hose-pci_mem);
- DEBUGF(PCI Autoconfig: Bus Memory region: [0x%llx-0x%llx],\n
+ debug(PCI Autoconfig: Bus Memory region: [0x%llx-0x%llx],\n
\t\tPhysical Memory [%llx-%llxx]\n,
(u64)hose-pci_mem-bus_start,
(u64)(hose-pci_mem-bus_start + hose-pci_mem-size - 1),
@@ -422,7 +420,7 @@ void pciauto_config_init(struct pci_controller *hose)
if (hose-pci_prefetch) {
pciauto_region_init(hose-pci_prefetch);
- DEBUGF(PCI Autoconfig: Bus Prefetchable Mem:
[0x%llx-0x%llx],\n
+ debug(PCI Autoconfig: Bus Prefetchable Mem: [0x%llx-0x%llx],\n
\t\tPhysical Memory [%llx-%llx]\n,
(u64)hose-pci_prefetch-bus_start,
(u64)(hose-pci_prefetch-bus_start +
@@ -435,7 +433,7 @@ void pciauto_config_init(struct pci_controller *hose)
if (hose-pci_io) {
pciauto_region_init(hose-pci_io);
- DEBUGF(PCI Autoconfig: Bus I/O region: [0x%llx-0x%llx],\n
+ debug(PCI Autoconfig: Bus I/O region: [0x%llx-0x%llx],\n
\t\tPhysical Memory:
[U-Boot] [PATCH 11/48] x86: Drop unused copy_fdt_to_ram()
This is now handled by generic U-Boot code so we do not need an x86 version.
It is no-longer called, so remove it.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/x86/include/asm/relocate.h | 1 -
arch/x86/lib/relocate.c | 18 --
2 files changed, 19 deletions(-)
diff --git a/arch/x86/include/asm/relocate.h b/arch/x86/include/asm/relocate.h
index eb186b9..cff3abc 100644
--- a/arch/x86/include/asm/relocate.h
+++ b/arch/x86/include/asm/relocate.h
@@ -11,7 +11,6 @@
#include common.h
int copy_uboot_to_ram(void);
-int copy_fdt_to_ram(void);
int clear_bss(void);
int do_elf_reloc_fixups(void);
diff --git a/arch/x86/lib/relocate.c b/arch/x86/lib/relocate.c
index b33586b..1a62142 100644
--- a/arch/x86/lib/relocate.c
+++ b/arch/x86/lib/relocate.c
@@ -17,8 +17,6 @@
#include common.h
#include inttypes.h
-#include libfdt.h
-#include malloc.h
#include asm/u-boot-x86.h
#include asm/relocate.h
#include asm/sections.h
@@ -35,22 +33,6 @@ int copy_uboot_to_ram(void)
return 0;
}
-int copy_fdt_to_ram(void)
-{
- if (gd-new_fdt) {
- ulong fdt_size;
-
- fdt_size = ALIGN(fdt_totalsize(gd-fdt_blob) + 0x1000, 32);
-
- memcpy(gd-new_fdt, gd-fdt_blob, fdt_size);
- debug(Relocated fdt from %p to %p, size %lx\n,
- gd-fdt_blob, gd-new_fdt, fdt_size);
- gd-fdt_blob = gd-new_fdt;
- }
-
- return 0;
-}
-
int clear_bss(void)
{
ulong dst_addr = (ulong)__bss_start + gd-reloc_off;
--
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[U-Boot] [PATCH 37/48] x86: Add a way to call 32-bit code from 64-bit mode
The procedure to drop from 64-bit mode to 32-bit is a bit messy. Add a function to take care of it. It requires identity-mapped pages and that the calling code is running below 4GB. Signed-off-by: Simon Glass s...@chromium.org --- arch/x86/cpu/Makefile | 6 + arch/x86/cpu/call32.S | 65 ++ arch/x86/include/asm/cpu.h | 9 +++ 3 files changed, 80 insertions(+) create mode 100644 arch/x86/cpu/call32.S diff --git a/arch/x86/cpu/Makefile b/arch/x86/cpu/Makefile index 9678976..eb993ec 100644 --- a/arch/x86/cpu/Makefile +++ b/arch/x86/cpu/Makefile @@ -12,6 +12,12 @@ extra-y = start.o obj-$(CONFIG_X86_RESET_VECTOR) += resetvec.o start16.o obj-y += interrupts.o cpu.o cpu_x86.o call64.o +AFLAGS_REMOVE_call32.o := -mregparm=3 \ + $(if $(CONFIG_EFI_STUB_64BIT),-march=i386 -m32) +AFLAGS_call32.o := -fpic -fshort-wchar + +extra-y += call32.o + obj-$(CONFIG_INTEL_BAYTRAIL) += baytrail/ obj-$(CONFIG_SYS_COREBOOT) += coreboot/ obj-$(CONFIG_ARCH_EFI) += efi/ diff --git a/arch/x86/cpu/call32.S b/arch/x86/cpu/call32.S new file mode 100644 index 000..3fe010e --- /dev/null +++ b/arch/x86/cpu/call32.S @@ -0,0 +1,65 @@ +/* + * (C) Copyright 2015 Google, Inc + * Written by Simon Glass s...@chromium.org + * + * SPDX-License-Identifier:GPL-2.0+ + */ + +#include asm/global_data.h +#include asm/msr-index.h +#include asm/processor-flags.h + + /* +* rdi - 32-bit code segment selector +* rsi - target address +* rdx - table address (0 if none) +*/ +.code64 +.globl cpu_call32 +cpu_call32: + cli + + /* Save table pointer */ + mov %edx, %ebx + + /* +* Debugging option, this outputs characters to the console UART +* mov $0x3f8,%edx +* mov $'a',%al +* out %al,(%dx) +*/ + + pushf + push%rdi/* 32-bit code segment */ + lea compat(%rip), %rax + push%rax + .byte 0x48 + retf +.code32 +compat: + /* +* We are now in compatibility mode with a default operand size of +* 32 bits. First disable paging. +*/ + movl%cr0, %eax + andl$~X86_CR0_PG, %eax + movl%eax, %cr0 + + /* Invalidate TLB */ + xorl%eax, %eax + movl%eax, %cr3 + + /* Disable Long mode in EFER (Extended Feature Enable Register) */ + movl$MSR_EFER, %ecx + rdmsr + btr $_EFER_LME, %eax + wrmsr + + /* Set up table pointer for _x86boot_start */ + mov %ebx, %ecx + + /* Jump to the required target */ + pushl %edi/* 32-bit code segment */ + pushl %esi/* 32-bit target address */ + .byte 0x48 + retf diff --git a/arch/x86/include/asm/cpu.h b/arch/x86/include/asm/cpu.h index b96513d..e977045 100644 --- a/arch/x86/include/asm/cpu.h +++ b/arch/x86/include/asm/cpu.h @@ -222,6 +222,15 @@ char *cpu_get_name(char *name); void cpu_call64(ulong pgtable, ulong setup_base, ulong target); /** + * cpu_call32() - Jump to a 32-bit entry point + * + * @code_seg32:32-bit code segment to use (GDT offset, e.g. 0x20) + * @target:Pointer to the start of the 32-bit U-Boot image/entry point + * @table: Pointer to start of info table to pass to U-Boot + */ +void cpu_call32(ulong code_seg32, ulong target, ulong table); + +/** * cpu_jump_to_64bit() - Jump to a 64-bit Linux kernel * * The kernel is uncompressed and the 64-bit entry point is expected to be -- 2.4.3.573.g4eafbef ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V3 4/8] configs: ti_armv7_keystone2: start using armv7_common
On 07/18/2015 12:40 PM, Nishanth Menon wrote: Try to maintain as much commonality by conditionally including stuff in armv7_common as necessary and removing the common defines from keystone2 header. /* U-Boot Build Configuration */ #define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is a 2nd stage loader */ -#define CONFIG_SYS_NO_FLASH/* that is, no *NOR* flash */ -#define CONFIG_SYS_CONSOLE_INFO_QUIET #define CONFIG_BOARD_EARLY_INIT_F -#define CONFIG_SYS_THUMB_BUILD One thing I see is THUMB build is only enabled for SPL build in ti_armv7_common.h. With this transition, regular build will not be using THUMB build anymore. This is not right. Please fix it. Many platforms configs such as tbs2910.h, colibri_vf.h, highbank.h etc has this enabled for both builds as this will reduce the image size. /* SoC Configuration */ -- Murali Karicheri Linux Kernel, Keystone ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V3 4/8] configs: ti_armv7_keystone2: start using armv7_common
On Wed, Jul 22, 2015 at 11:19:29AM -0400, Murali Karicheri wrote: On 07/18/2015 12:40 PM, Nishanth Menon wrote: Try to maintain as much commonality by conditionally including stuff in armv7_common as necessary and removing the common defines from keystone2 header. /* U-Boot Build Configuration */ #define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is a 2nd stage loader */ -#define CONFIG_SYS_NO_FLASH /* that is, no *NOR* flash */ -#define CONFIG_SYS_CONSOLE_INFO_QUIET #define CONFIG_BOARD_EARLY_INIT_F -#define CONFIG_SYS_THUMB_BUILD One thing I see is THUMB build is only enabled for SPL build in ti_armv7_common.h. With this transition, regular build will not be using THUMB build anymore. This is not right. Please fix it. Many platforms configs such as tbs2910.h, colibri_vf.h, highbank.h etc has this enabled for both builds as this will reduce the image size. Good point. Lets just whack thumb on for all platforms (so after the patch to make things include ti_armv7_omap.h, add that in). Thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 04/48] elf: Add a few definitions for 64-bit relocation
Provide the types necessary to relocate 64-bit images.
Signed-off-by: Simon Glass s...@chromium.org
---
include/elf.h | 26 ++
1 file changed, 26 insertions(+)
diff --git a/include/elf.h b/include/elf.h
index 63d9341..1936ef6 100644
--- a/include/elf.h
+++ b/include/elf.h
@@ -28,6 +28,16 @@ typedef int32_t Elf32_Sword;/* Signed large
integer */
typedef uint32_t Elf32_Word; /* Unsigned large integer */
typedef uint16_t Elf32_Half; /* Unsigned medium integer */
+/* 64-bit ELF base types. */
+typedef __u64 Elf64_Addr;
+typedef __u16 Elf64_Half;
+typedef __s16 Elf64_SHalf;
+typedef __u64 Elf64_Off;
+typedef __s32 Elf64_Sword;
+typedef __u32 Elf64_Word;
+typedef __u64 Elf64_Xword;
+typedef __s64 Elf64_Sxword;
+
/* e_ident[] identification indexes */
#define EI_MAG00 /* file ID */
#define EI_MAG11 /* file ID */
@@ -379,6 +389,11 @@ typedef struct
Elf32_Sword r_addend;
} Elf32_Rela;
+struct elf64_rel {
+ Elf64_Addr r_offset;/* Location at which to apply the action */
+ Elf64_Xword r_info; /* index and type of relocation */
+};
+
/* Extract relocation info - r_info */
#define ELF32_R_SYM(i) ((i) 8)
#define ELF32_R_TYPE(i)((unsigned char) (i))
@@ -431,6 +446,17 @@ typedef struct
extern Elf32_Dyn _DYNAMIC[];
+typedef struct {
+ Elf64_Sxword d_tag; /* entry tag value */
+ union {
+ Elf64_Xword d_val;
+ Elf64_Addr d_ptr;
+ } d_un;
+} Elf64_Dyn;
+
+#define ELF64_R_SYM(i) ((i) 32)
+#define ELF64_R_TYPE(i)((i) 0x)
+
/* Dynamic Array Tags - d_tag */
#define DT_NULL0 /* marks end of _DYNAMIC array
*/
#define DT_NEEDED 1 /* string table offset of needed lib */
--
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[U-Boot] [PATCH 01/48] Support removing default assembler flags
The CFLAGS_REMOVE_file feature allows default C compiler flags to be removed for particular files. Add the same feature for assembler, using AFLAGS_REMOVE_file. Signed-off-by: Simon Glass s...@chromium.org --- scripts/Makefile.lib | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib index 8731fc6..3d5c872 100644 --- a/scripts/Makefile.lib +++ b/scripts/Makefile.lib @@ -104,8 +104,9 @@ modname_flags = $(if $(filter 1,$(words $(modname))),\ orig_c_flags = $(KBUILD_CPPFLAGS) $(KBUILD_CFLAGS) $(KBUILD_SUBDIR_CCFLAGS) \ $(ccflags-y) $(CFLAGS_$(basetarget).o) _c_flags = $(filter-out $(CFLAGS_REMOVE_$(basetarget).o), $(orig_c_flags)) -_a_flags = $(KBUILD_CPPFLAGS) $(KBUILD_AFLAGS) $(KBUILD_SUBDIR_ASFLAGS) \ +orig_a_flags = $(KBUILD_CPPFLAGS) $(KBUILD_AFLAGS) $(KBUILD_SUBDIR_ASFLAGS) \ $(asflags-y) $(AFLAGS_$(basetarget).o) +_a_flags = $(filter-out $(AFLAGS_REMOVE_$(basetarget).o), $(orig_a_flags)) _cpp_flags = $(KBUILD_CPPFLAGS) $(cppflags-y) $(CPPFLAGS_$(@F)) # -- 2.4.3.573.g4eafbef ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 03/48] dm: serial: Correct logic in serial_find_console_or_panic()
In a final attempt to find a console UART this function uses the first
first available serial device. However the check for a valid device is
inverted.
This code is only executed when there is in fact no serial UART, but at
present it can fail to reach the panic_str() call in this case, and start
trying to use a non-existent UART.
Signed-off-by: Simon Glass s...@chromium.org
---
drivers/serial/serial-uclass.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/serial/serial-uclass.c b/drivers/serial/serial-uclass.c
index 815fec3..bbc366b 100644
--- a/drivers/serial/serial-uclass.c
+++ b/drivers/serial/serial-uclass.c
@@ -71,7 +71,7 @@ static void serial_find_console_or_panic(void)
#endif
if (!uclass_get_device_by_seq(UCLASS_SERIAL, INDEX, dev) ||
!uclass_get_device(UCLASS_SERIAL, INDEX, dev) ||
- (!uclass_first_device(UCLASS_SERIAL, dev) || dev)) {
+ (!uclass_first_device(UCLASS_SERIAL, dev) dev)) {
gd-cur_serial_dev = dev;
return;
}
--
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[U-Boot] [PATCH 10/48] x86: Tidy up global_data flags
These flags now overlap some global ones. Adjust the x86-specific flags to avoid this. Signed-off-by: Simon Glass s...@chromium.org --- arch/x86/include/asm/global_data.h | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/x86/include/asm/global_data.h b/arch/x86/include/asm/global_data.h index 4d9eac6..abd70b9 100644 --- a/arch/x86/include/asm/global_data.h +++ b/arch/x86/include/asm/global_data.h @@ -87,14 +87,14 @@ static inline __attribute__((no_instrument_function)) gd_t *get_fs_gd_ptr(void) #define gd get_fs_gd_ptr() +#define DECLARE_GLOBAL_DATA_PTR + #endif /* * Our private Global Data Flags */ -#define GD_FLG_COLD_BOOT 0x00100 /* Cold Boot */ -#define GD_FLG_WARM_BOOT 0x00200 /* Warm Boot */ - -#define DECLARE_GLOBAL_DATA_PTR +#define GD_FLG_COLD_BOOT 0x1000 /* Cold Boot */ +#define GD_FLG_WARM_BOOT 0x2000 /* Warm Boot */ #endif /* __ASM_GBL_DATA_H */ -- 2.4.3.573.g4eafbef ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 08/48] x86: Add various minor tidy-ups to the 32-bit startup code
Fix a typo, improve some comments and add a little more detail in some cases. Signed-off-by: Simon Glass s...@chromium.org --- arch/x86/cpu/start.S | 46 ++ 1 file changed, 26 insertions(+), 20 deletions(-) diff --git a/arch/x86/cpu/start.S b/arch/x86/cpu/start.S index 00e585e..7ef8b88 100644 --- a/arch/x86/cpu/start.S +++ b/arch/x86/cpu/start.S @@ -25,11 +25,11 @@ .globl _x86boot_start _x86boot_start: /* -* This is the fail safe 32-bit bootstrap entry point. The -* following code is not executed from a cold-reset (actually, a -* lot of it is, but from real-mode after cold reset. It is -* repeated here to put the board into a state as close to cold -* reset as necessary) +* This is the fail-safe 32-bit bootstrap entry point. +* +* This code is used when booting from another boot loader like +* coreboot or EFI. So we repeat some of the same init found in +* start16. */ cli cld @@ -45,15 +45,15 @@ _x86boot_start: jmp 1f _start: /* -* This is the 32-bit cold-reset entry point. Initialize %bx to 0 -* in case we're preceeded by some sort of boot stub. +* This is the 32-bit cold-reset entry point, coming from start16. +* Set %bx to 0 to indicate this. */ movw$GD_FLG_COLD_BOOT, %bx 1: /* Save BIST */ movl%eax, %ebp - /* Load the segement registes to match the gdt loaded in start16.S */ + /* Load the segement registers to match the GDT loaded in start16.S */ movl$(X86_GDT_ENTRY_32BIT_DS * X86_GDT_ENTRY_SIZE), %eax movw%ax, %fs movw%ax, %ds @@ -64,7 +64,11 @@ _start: /* Clear the interrupt vectors */ lidtblank_idt_ptr - /* Early platform init (setup gpio, etc ) */ + /* +* Critical early platform init - generally not used, we prefer init +* to happen later when we have a console, in case something goes +* wrong. +*/ jmp early_board_init .globl early_board_init_ret early_board_init_ret: @@ -79,7 +83,7 @@ car_init_ret: * We now have CONFIG_SYS_CAR_SIZE bytes of Cache-As-RAM (or SRAM, * or fully initialised SDRAM - we really don't care which) * starting at CONFIG_SYS_CAR_ADDR to be used as a temporary stack -* and early malloc area. The MRC requires some space at the top. +* and early malloc() area. The MRC requires some space at the top. * * Stack grows down from top of CAR. We have: * @@ -97,7 +101,7 @@ car_init_ret: #endif #else /* -* When we get here after car_init, esp points to a temporary stack +* When we get here after car_init(), esp points to a temporary stack * and esi holds the HOB list address returned by the FSP. */ #endif @@ -137,17 +141,18 @@ skip_hob: movl%esp, %ecx #if defined(CONFIG_SYS_MALLOC_F_LEN) + /* Set up the pre-relocation malloc pool */ subl$CONFIG_SYS_MALLOC_F_LEN, %esp movl%eax, %edx addl$GD_MALLOC_BASE, %edx movl%esp, (%edx) #endif - /* Store BIST */ + /* Store BIST into global_data */ movl%eax, %edx addl$GD_BIST, %edx movl%ebp, (%edx) - /* Set second parameter to setup_gdt */ + /* Set second parameter to setup_gdt() */ movl%ecx, %edx /* Setup global descriptor table so gd-xyz works */ @@ -157,7 +162,7 @@ skip_hob: post_code(POST_START_DONE) xorl%eax, %eax - /* Enter, U-boot! */ + /* Enter, U-Boot! */ callboard_init_f /* indicate (lack of) progress */ @@ -184,13 +189,13 @@ board_init_f_r_trampoline: /* Align global data to 16-byte boundary */ andl$0xfff0, %esp - /* Setup first parameter to memcpy (and setup_gdt) */ + /* Setup first parameter to memcpy() and setup_gdt() */ movl%esp, %eax - /* Setup second parameter to memcpy */ + /* Setup second parameter to memcpy() */ fs movl 0, %edx - /* Set third parameter to memcpy */ + /* Set third parameter to memcpy() */ movl$GENERATED_GBL_DATA_SIZE, %ecx /* Copy global data from CAR to SDRAM stack */ @@ -202,7 +207,7 @@ board_init_f_r_trampoline: /* Align global descriptor table to 16-byte boundary */ andl$0xfff0, %esp - /* Set second parameter to setup_gdt */ + /* Set second parameter to setup_gdt() */ movl%esp, %edx /* Setup global descriptor table so gd-xyz works */ @@ -216,7 +221,7 @@ board_init_f_r_trampoline: callcar_uninit 1: - /* Re-enter U-Boot by calling board_init_f_r */ + /* Re-enter U-Boot by calling board_init_f_r() */ call
[U-Boot] [PATCH 02/48] dm: core: Check for empty list in uclass_find_device()
This function needs to check the list has entries before traversing it.
Fix this bug.
Signed-off-by: Simon Glass s...@chromium.org
---
drivers/core/uclass.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/core/uclass.c b/drivers/core/uclass.c
index 7de8173..a930c30 100644
--- a/drivers/core/uclass.c
+++ b/drivers/core/uclass.c
@@ -153,6 +153,8 @@ int uclass_find_device(enum uclass_id id, int index, struct
udevice **devp)
ret = uclass_get(id, uc);
if (ret)
return ret;
+ if (list_empty(uc-dev_head))
+ return 0;
list_for_each_entry(dev, uc-dev_head, uclass_node) {
if (!index--) {
--
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[U-Boot] [PATCH 20/48] efi: Add a serial driver
Add a serial driver which makes use of EFI's console in/out service.
Signed-off-by: Simon Glass s...@chromium.org
---
drivers/serial/Kconfig | 8 +++
drivers/serial/Makefile | 1 +
drivers/serial/serial_efi.c | 149
3 files changed, 158 insertions(+)
create mode 100644 drivers/serial/serial_efi.c
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index 4829284..f874837 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -44,6 +44,14 @@ config DEBUG_UART_NS16550
will need to provide parameters to make this work. The driver will
be available until the real driver model serial is running.
+config DEBUG_UART_EFI
+ bool EFI
+ help
+ Select this to enable a debug UART which calls back to EFI to output
+ to the console. This can be useful for early debugging of U-Boot
+ when running on top of EFI (Extensive Firmware Interface). This is
+ a type of BIOS used by PCs.
+
endchoice
config DEBUG_UART_BASE
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index d183eed..92c3808 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -21,6 +21,7 @@ obj-$(CONFIG_ALTERA_JTAG_UART) += altera_jtag_uart.o
obj-$(CONFIG_ARM_DCC) += arm_dcc.o
obj-$(CONFIG_ATMEL_USART) += atmel_usart.o
obj-$(CONFIG_DW_SERIAL) += serial_dw.o
+obj-$(CONFIG_ARCH_EFI) += serial_efi.o
obj-$(CONFIG_LPC32XX_HSUART) += lpc32xx_hsuart.o
obj-$(CONFIG_MCFUART) += mcfuart.o
obj-$(CONFIG_OPENCORES_YANU) += opencores_yanu.o
diff --git a/drivers/serial/serial_efi.c b/drivers/serial/serial_efi.c
new file mode 100644
index 000..15e541b
--- /dev/null
+++ b/drivers/serial/serial_efi.c
@@ -0,0 +1,149 @@
+/*
+ * Copyright (c) 2015 Google, Inc
+ * Written by Simon Glass s...@chromium.org
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include debug_uart.h
+#include dm.h
+#include efi.h
+#include efi_api.h
+#include errno.h
+#include fdtdec.h
+#include linux/compiler.h
+#include asm/io.h
+#include serial.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* Information about the efi console */
+struct serial_efi_priv {
+ struct efi_simple_input_interface *con_in;
+ struct efi_simple_text_output_protocol *con_out;
+ struct efi_input_key key;
+ bool have_key;
+};
+
+int serial_efi_setbrg(struct udevice *dev, int baudrate)
+{
+ return 0;
+}
+
+static int serial_efi_get_key(struct serial_efi_priv *priv)
+{
+ int ret;
+
+ if (priv-have_key)
+ return 0;
+ ret = priv-con_in-read_key_stroke(priv-con_in, priv-key);
+ if (ret == EFI_NOT_READY)
+ return -EAGAIN;
+ else if (ret != EFI_SUCCESS)
+ return -EIO;
+
+ priv-have_key = true;
+
+ return 0;
+}
+
+static int serial_efi_getc(struct udevice *dev)
+{
+ struct serial_efi_priv *priv = dev_get_priv(dev);
+ int ret, ch;
+
+ ret = serial_efi_get_key(priv);
+ if (ret)
+ return ret;
+
+ priv-have_key = false;
+ ch = priv-key.unicode_char;
+ if (!ch priv-key.scan_code == 8)
+ ch = 8;
+ debug( [%x %x %x] , ch, priv-key.unicode_char, priv-key.scan_code);
+
+ return ch;
+}
+
+static int serial_efi_putc(struct udevice *dev, const char ch)
+{
+ struct serial_efi_priv *priv = dev_get_priv(dev);
+ uint16_t ucode[2];
+ int ret;
+
+ ucode[0] = ch;
+ ucode[1] = '\0';
+ ret = priv-con_out-output_string(priv-con_out, ucode);
+ if (ret)
+ return -EIO;
+
+ return 0;
+}
+
+static int serial_efi_pending(struct udevice *dev, bool input)
+{
+ struct serial_efi_priv *priv = dev_get_priv(dev);
+ int ret;
+
+ /* We assume that EFI will stall if its output buffer fills up */
+ if (!input)
+ return 0;
+
+ ret = serial_efi_get_key(priv);
+ if (ret == -EAGAIN)
+ return 0;
+ else if (ret)
+ return ret;
+
+ return 1;
+}
+
+void debug_uart_init(void)
+{
+}
+
+static inline void _debug_uart_putc(int ch)
+{
+ struct efi_system_table *sys_table = efi_get_sys_table();
+ uint16_t ucode[2];
+
+ ucode[0] = ch;
+ ucode[1] = '\0';
+ sys_table-con_out-output_string(sys_table-con_out, ucode);
+}
+
+DEBUG_UART_FUNCS
+
+static int serial_efi_probe(struct udevice *dev)
+{
+ struct efi_system_table *table = efi_get_sys_table();
+ struct serial_efi_priv *priv = dev_get_priv(dev);
+
+ priv-con_in = table-con_in;
+ priv-con_out = table-con_out;
+
+ return 0;
+}
+
+static const struct dm_serial_ops serial_efi_ops = {
+ .putc = serial_efi_putc,
+ .getc = serial_efi_getc,
+ .pending = serial_efi_pending,
+ .setbrg = serial_efi_setbrg,
+};
+
+static const struct udevice_id serial_efi_ids[] = {
+ { .compatible = efi,uart },
+ { }
+};
+
[U-Boot] [PATCH 48/48] efi: Add a README to explain how things work
Add some documentation on the EFI implementation in U-Boot. Signed-off-by: Ben Stoltz sto...@google.com Signed-off-by: Simon Glass s...@chromium.org --- doc/README.efi | 237 + 1 file changed, 237 insertions(+) create mode 100644 doc/README.efi diff --git a/doc/README.efi b/doc/README.efi new file mode 100644 index 000..4706602 --- /dev/null +++ b/doc/README.efi @@ -0,0 +1,237 @@ +# +# Copyright (C) 2015 Google, Inc +# +# SPDX-License-Identifier: GPL-2.0+ +# + +U-Boot on EFI += +This document provides information about U-Boot running on top of EFI, either +as an application or just as a means of getting U-Boot onto a new platform. + + +In God's Name, Why? +--- +This is useful in several situations: + +- You have EFI running on a board but U-Boot does not natively support it +fully yet. You can boot into U-Boot from EFI and use that until U-Boot is +fully ported + +- You need to use an EFI implementation (e.g. UEFI) because your vendor +requires it in order to provide support + +- You plan to use Coreboot to boot into U-Boot but Coreboot support does +not currently exist for your platform. In the meantime you can use U-Boot +on EFI and then move to U-Boot on Coreboot when ready + +- You use EFI but want to experiment with a simpler alternative like U-Boot + + +Status +-- +Only x86 is supported at present. If you are using EFI on another +architecture you may want to reconsider. However, much of the code is generic +so could be ported. + +U-Boot supports running as an EFI application for 32-bit EFI only. This is +not very useful since only a serial port is provided. You can look around at +memory and type 'help' but that is about it. + +More usefully, U-Boot supports building itself as a payload for either 32-bit +or 64-bit EFI. U-Boot is packaged up and loaded in its entirety by EFI. Once +started, U-Boot changes to 32-bit mode (currently) and takes over the +machine. You can use devices, boot a kernel, etc. + + +Build Instructions +-- +First choose a board that has EFI support and obtain an EFI implementation +for that board. It will be either 32-bit or 64-bit. + +To build U-Boot as an EFI application (32-bit EFI required), enable +CONFIG_EFI and CONFIG_ARCH_EFI. The efi-x86 config is set up for this. + +To build U-Boot as an EFI payload (32-bit or 64-bit EFI can be used), adjust +an existing config to enable CONFIG_EFI, CONFIG_EFI_STUB and either +CONFIG_EFI_STUB_32BIT or CONFIG_EFI_STUB_64BIT. + +Then build U-Boot as normal, e.g. + + make qemu-x86_defconfig + make menuconfig(or make xconfig if you prefer) + # change the settings as above + make + +You will end up with one of these files: + + u-boot.efi - U-Boot EFI application + u-boot-payload.efi - U-Boot EFI payload application + + +Trying it out +- +Qemu is an emulator and it can emulate an x86 machine. You can run the +payload with something like this: + + mkdir /tmp/efi + cp /path/to/u-boot*.efi /tmp/efi + qemu-system-x86_64 -bios bios.bin -hda fat:/tmp/efi/ + +Add -nographic if you want to use the terminal for output. Once it starts +type 'fs0:u-boot-payload.efi' to run the payload or 'fs0:u-boot.efi' to run +the application. 'bios.bin' is the EFI 'BIOS'. + +To try it on real hardware, put u-boot.efi on a suitable boot medium, such +as a USB stick. Then you can type something like this to start it: + + fs0:u-boot-payload.efi + +(or fs0:u-boot.efi for the application) + +This will start the payload, copy U-Boot into RAM and start U-Boot. Note +that EFI does not support booting a 64-bit application from a 32-bit +EFI (or vice versa). Also it will often fail to print an error message if +you get this wrong. + + +Inner workings +== +Here follow a few implementation notes for those who want to fiddle with +this and perhaps contribute patches. + +The application and payload approaches sound similar but are in fact +implemented completely differently. + +EFI Application +--- +For the application the whole of U-Boot is built as a shared library. The +efi_main() function is in lib/efi/efi_app.c. It sets up some basic EFI +functions with efi_init(), sets up U-Boot global_data, allocates memory for +U-Boot's malloc(), etc. and enters the normal init sequence (board_init_f() +and board_init_r()). + +Since U-Boot limits its memory access to the allocated regions very little +special code is needed. The CONFIG_ARCH_EFI option controls a few things +that need to change so 'git grep CONFIG_ARCH_EFI' may be instructive. +The CONFIG_EFI option controls more general EFI adjustments. + +The only available driver is the serial driver. This calls back into EFI +'boot services' to send and receive characters. Although it is implemented +as a serial driver the console device is not necessarilly serial. If you +boot EFI with video output then the 'serial' device will operate on your
[U-Boot] [PATCH 36/48] x86: Add an enum for some commonly-used GDT bits
Rather than add these as open-coded values, create an enum with the commonly
used flags.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/x86/include/asm/cpu.h | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/x86/include/asm/cpu.h b/arch/x86/include/asm/cpu.h
index 08284ee..b96513d 100644
--- a/arch/x86/include/asm/cpu.h
+++ b/arch/x86/include/asm/cpu.h
@@ -27,6 +27,16 @@ enum {
X86_VENDOR_UNKNOWN = 0xff
};
+/* Global descriptor table (GDT) bits */
+enum {
+ GDT_4GB = 1ULL 55,
+ GDT_32BIT = 1ULL 54,
+ GDT_LONG= 1ULL 53,
+ GDT_PRESENT = 1ULL 47,
+ GDT_NOTSYS = 1ULL 44,
+ GDT_CODE= 1ULL 43,
+};
+
struct cpuid_result {
uint32_t eax;
uint32_t ebx;
--
2.4.3.573.g4eafbef
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[U-Boot] [PATCH 43/48] x86: Handle running as EFI payload
When U-Boot runs as an EFI payload it needs to avoid setting up the CPU
again. Also U-Boot currently does not handle interrupts for many devices, so
run with interrupts disabled.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/x86/Kconfig | 16
arch/x86/cpu/cpu.c| 21 +
arch/x86/cpu/interrupts.c | 10 --
arch/x86/lib/bootm.c | 2 ++
4 files changed, 39 insertions(+), 10 deletions(-)
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index f124d58..c64c626 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -194,6 +194,7 @@ config X86_RAMTEST
config HAVE_FSP
bool Add an Firmware Support Package binary
+ depends on !EFI
help
Select this option to add an Firmware Support Package binary to
the resulting U-Boot image. It is a binary blob which U-Boot uses
@@ -309,6 +310,7 @@ menu System tables
config GENERATE_PIRQ_TABLE
bool Generate a PIRQ table
+ depends on !EFI
default n
help
Generate a PIRQ routing table for this board. The PIRQ routing table
@@ -319,6 +321,7 @@ config GENERATE_PIRQ_TABLE
config GENERATE_SFI_TABLE
bool Generate a SFI (Simple Firmware Interface) table
+ depends on !EFI
help
The Simple Firmware Interface (SFI) provides a lightweight method
for platform firmware to pass information to the operating system
@@ -333,6 +336,7 @@ config GENERATE_SFI_TABLE
config GENERATE_MP_TABLE
bool Generate an MP (Multi-Processor) table
+ depends on !EFI
default n
help
Generate an MP (Multi-Processor) table for this board. The MP table
@@ -383,4 +387,16 @@ config PCIE_ECAM_SIZE
so a default 0x1000 size covers all of the 256 buses which is the
maximum number of PCI buses as defined by the PCI specification.
+if EFI
+
+config SYS_CAR_ADDR
+ hex
+ default 0x10
+
+config SYS_CAR_SIZE
+ hex
+ default 0x2
+
+endif
+
endmenu
diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/cpu.c
index d233a45..129777c 100644
--- a/arch/x86/cpu/cpu.c
+++ b/arch/x86/cpu/cpu.c
@@ -330,13 +330,15 @@ int x86_cpu_init_f(void)
const u32 em_rst = ~X86_CR0_EM;
const u32 mp_ne_set = X86_CR0_MP | X86_CR0_NE;
- /* initialize FPU, reset EM, set MP and NE */
- asm (fninit\n \
-movl %%cr0, %%eax\n \
-andl %0, %%eax\n \
-orl %1, %%eax\n \
-movl %%eax, %%cr0\n \
-: : i (em_rst), i (mp_ne_set) : eax);
+ if (ll_boot_init()) {
+ /* initialize FPU, reset EM, set MP and NE */
+ asm (fninit\n \
+ movl %%cr0, %%eax\n \
+ andl %0, %%eax\n \
+ orl %1, %%eax\n \
+ movl %%eax, %%cr0\n \
+ : : i (em_rst), i (mp_ne_set) : eax);
+ }
/* identify CPU via cpuid and store the decoded info into gd-arch */
if (has_cpuid()) {
@@ -712,5 +714,8 @@ __weak int x86_init_cpus(void)
int cpu_init_r(void)
{
- return x86_init_cpus();
+ if (ll_boot_init())
+ return x86_init_cpus();
+
+ return 0;
}
diff --git a/arch/x86/cpu/interrupts.c b/arch/x86/cpu/interrupts.c
index a86c673..7df50bd 100644
--- a/arch/x86/cpu/interrupts.c
+++ b/arch/x86/cpu/interrupts.c
@@ -254,8 +254,14 @@ int interrupt_init(void)
/* Initialize core interrupt and exception functionality of CPU */
cpu_init_interrupts();
- /* It is now safe to enable interrupts */
- enable_interrupts();
+ /*
+* It is now safe to enable interrupts.
+*
+* TODO(s...@chromium.org): But we don't handle these correctly when
+* booted from EFI.
+*/
+ if (ll_boot_init())
+ enable_interrupts();
#endif
return 0;
diff --git a/arch/x86/lib/bootm.c b/arch/x86/lib/bootm.c
index 445ee6e..3ad941f 100644
--- a/arch/x86/lib/bootm.c
+++ b/arch/x86/lib/bootm.c
@@ -165,6 +165,7 @@ int boot_linux_kernel(ulong setup_base, ulong load_address,
bool image_64bit)
* U-boot is setting them up that way for itself in
* arch/i386/cpu/cpu.c.
*/
+#ifndef CONFIG_ARCH_EFI
__asm__ __volatile__ (
movl $0, %%ebp\n
cli\n
@@ -173,6 +174,7 @@ int boot_linux_kernel(ulong setup_base, ulong load_address,
bool image_64bit)
[boot_params] S(setup_base),
b(0), D(0)
);
+#endif
}
/* We can't get to here */
--
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[U-Boot] [PATCH 3/8] ARM: keystone2: Cleanup PLL init code
There are two types of PLL for all keystone platforms:
Main PLL, Secondary PLL. Instead of duplicating the same definition
for each secondary PLL, have a common function which does
initialization for both PLLs. And also add proper register
definitions.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
---
arch/arm/mach-keystone/clock.c | 309 ++-
arch/arm/mach-keystone/include/mach/clock-k2e.h | 1 +
arch/arm/mach-keystone/include/mach/clock.h | 1 -
arch/arm/mach-keystone/include/mach/clock_defs.h | 77 +-
board/ti/ks2_evm/board.c | 1 -
5 files changed, 201 insertions(+), 188 deletions(-)
diff --git a/arch/arm/mach-keystone/clock.c b/arch/arm/mach-keystone/clock.c
index 625907f..d8311ca 100644
--- a/arch/arm/mach-keystone/clock.c
+++ b/arch/arm/mach-keystone/clock.c
@@ -18,195 +18,157 @@ static void wait_for_completion(const struct
pll_init_data *data)
int i;
for (i = 0; i 100; i++) {
sdelay(450);
- if ((pllctl_reg_read(data-pll, stat) PLLSTAT_GO) == 0)
+ if (!(pllctl_reg_read(data-pll, stat) PLLSTAT_GOSTAT_MASK))
break;
}
}
-void init_pll(const struct pll_init_data *data)
+static inline void bypass_main_pll(const struct pll_init_data *data)
+{
+ pllctl_reg_clrbits(data-pll, ctl, PLLCTL_PLLENSRC_MASK |
+ PLLCTL_PLLEN_MASK);
+
+ /* 4 cycles of reference clock CLKIN*/
+ sdelay(340);
+}
+
+static void configure_mult_div(const struct pll_init_data *data)
{
- u32 tmp, tmp_ctl, pllm, plld, pllod, bwadj;
+ u32 pllm, plld, bwadj;
pllm = data-pll_m - 1;
- plld = (data-pll_d - 1) PLL_DIV_MASK;
- pllod = (data-pll_od - 1) PLL_CLKOD_MASK;
+ plld = (data-pll_d - 1) CFG_PLLCTL0_PLLD_MASK;
- if (data-pll == MAIN_PLL) {
- /* The requered delay before main PLL configuration */
- sdelay(21);
+ /* Program Multiplier */
+ if (data-pll == MAIN_PLL)
+ pllctl_reg_write(data-pll, mult, pllm PLLM_MULT_LO_MASK);
- tmp = pllctl_reg_read(data-pll, secctl);
+ clrsetbits_le32(keystone_pll_regs[data-pll].reg0,
+ CFG_PLLCTL0_PLLM_MASK,
+ pllm CFG_PLLCTL0_PLLM_SHIFT);
+
+ /* Program BWADJ */
+ bwadj = (data-pll_m - 1) 1; /* Divide pllm by 2 */
+ clrsetbits_le32(keystone_pll_regs[data-pll].reg0,
+ CFG_PLLCTL0_BWADJ_MASK,
+ (bwadj CFG_PLLCTL0_BWADJ_SHIFT)
+ CFG_PLLCTL0_BWADJ_MASK);
+ bwadj = bwadj CFG_PLLCTL0_BWADJ_BITS;
+ clrsetbits_le32(keystone_pll_regs[data-pll].reg1,
+ CFG_PLLCTL1_BWADJ_MASK, bwadj);
+
+ /* Program Divider */
+ clrsetbits_le32(keystone_pll_regs[data-pll].reg0,
+ CFG_PLLCTL0_PLLD_MASK, plld);
+}
- if (tmp (PLLCTL_BYPASS)) {
- setbits_le32(keystone_pll_regs[data-pll].reg1,
-BIT(MAIN_ENSAT_OFFSET));
+void configure_main_pll(const struct pll_init_data *data)
+{
+ u32 tmp, pllod;
- pllctl_reg_clrbits(data-pll, ctl, PLLCTL_PLLEN |
- PLLCTL_PLLENSRC);
- sdelay(340);
+ pllod = data-pll_od - 1;
- pllctl_reg_setbits(data-pll, secctl, PLLCTL_BYPASS);
- pllctl_reg_setbits(data-pll, ctl, PLLCTL_PLLPWRDN);
- sdelay(21000);
+ /* 100 micro sec for stabilization */
+ sdelay(21);
- pllctl_reg_clrbits(data-pll, ctl, PLLCTL_PLLPWRDN);
- } else {
- pllctl_reg_clrbits(data-pll, ctl, PLLCTL_PLLEN |
- PLLCTL_PLLENSRC);
- sdelay(340);
- }
+ tmp = pllctl_reg_read(data-pll, secctl);
- pllctl_reg_write(data-pll, mult, pllm PLLM_MULT_LO_MASK);
+ /* Check for Bypass */
+ if (tmp SECCTL_BYPASS_MASK) {
+ setbits_le32(keystone_pll_regs[data-pll].reg1,
+CFG_PLLCTL1_ENSAT_MASK);
- clrsetbits_le32(keystone_pll_regs[data-pll].reg0,
- PLLM_MULT_HI_SMASK, (pllm 6));
-
- /* Set the BWADJ (12 bit field) */
- tmp_ctl = pllm 1; /* Divide the pllm by 2 */
- clrsetbits_le32(keystone_pll_regs[data-pll].reg0,
- PLL_BWADJ_LO_SMASK,
- (tmp_ctl PLL_BWADJ_LO_SHIFT));
- clrsetbits_le32(keystone_pll_regs[data-pll].reg1,
- PLL_BWADJ_HI_MASK,
- (tmp_ctl 8));
-
- /*
-* Set the pll divider (6 bit field) *
-
[U-Boot] [PATCH 4/8] ARM: keystone2: Fix dev and arm speed detection
As per the Documentation for K2HK[1], K2L[2], K2E[3], the definition
of DEVSPEED register is same, only the supporting speeds are
different. Hence use the same speed definition for all platforms,
and read the DEVSPEED register to detect the supporting max speed.
[1] http://www.ti.com/lit/ds/symlink/66ak2h12.pdf
[2] http://www.ti.com/lit/ds/symlink/66ak2l06.pdf
[3] http://www.ti.com/lit/ds/symlink/am5k2e04.pdf
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
---
arch/arm/mach-keystone/clock-k2e.c | 16 --
arch/arm/mach-keystone/clock-k2hk.c | 32 ---
arch/arm/mach-keystone/clock-k2l.c | 32 ---
arch/arm/mach-keystone/clock.c | 71 ++--
arch/arm/mach-keystone/include/mach/clock-k2e.h | 15 ++---
arch/arm/mach-keystone/include/mach/clock-k2hk.h | 14 ++---
arch/arm/mach-keystone/include/mach/clock-k2l.h | 14 ++---
arch/arm/mach-keystone/include/mach/clock.h | 9 +++
arch/arm/mach-keystone/include/mach/hardware.h | 7 +++
board/ti/ks2_evm/board_k2e.c | 1 -
10 files changed, 73 insertions(+), 138 deletions(-)
diff --git a/arch/arm/mach-keystone/clock-k2e.c
b/arch/arm/mach-keystone/clock-k2e.c
index 31f6661..42092e1 100644
--- a/arch/arm/mach-keystone/clock-k2e.c
+++ b/arch/arm/mach-keystone/clock-k2e.c
@@ -17,22 +17,6 @@ const struct keystone_pll_regs keystone_pll_regs[] = {
[DDR3_PLL] = {KS2_DDR3APLLCTL0, KS2_DDR3APLLCTL1},
};
-int dev_speeds[] = {
- SPD800,
- SPD850,
- SPD1000,
- SPD1250,
- SPD1350,
- SPD1400,
- SPD1500,
- SPD1400,
- SPD1350,
- SPD1250,
- SPD1000,
- SPD850,
- SPD800
-};
-
/**
* pll_freq_get - get pll frequency
* Fout = Fref * NF(mult) / NR(prediv) / OD
diff --git a/arch/arm/mach-keystone/clock-k2hk.c
b/arch/arm/mach-keystone/clock-k2hk.c
index 1591960..96a9f72 100644
--- a/arch/arm/mach-keystone/clock-k2hk.c
+++ b/arch/arm/mach-keystone/clock-k2hk.c
@@ -19,38 +19,6 @@ const struct keystone_pll_regs keystone_pll_regs[] = {
[DDR3B_PLL] = {KS2_DDR3BPLLCTL0, KS2_DDR3BPLLCTL1},
};
-int dev_speeds[] = {
- SPD800,
- SPD1000,
- SPD1200,
- SPD800,
- SPD800,
- SPD800,
- SPD800,
- SPD800,
- SPD1200,
- SPD1000,
- SPD800,
- SPD800,
- SPD800,
-};
-
-int arm_speeds[] = {
- SPD800,
- SPD1000,
- SPD1200,
- SPD1350,
- SPD1400,
- SPD800,
- SPD1400,
- SPD1350,
- SPD1200,
- SPD1000,
- SPD800,
- SPD800,
- SPD800,
-};
-
/**
* pll_freq_get - get pll frequency
* Fout = Fref * NF(mult) / NR(prediv) / OD
diff --git a/arch/arm/mach-keystone/clock-k2l.c
b/arch/arm/mach-keystone/clock-k2l.c
index 1c5e4d5..80c1f51 100644
--- a/arch/arm/mach-keystone/clock-k2l.c
+++ b/arch/arm/mach-keystone/clock-k2l.c
@@ -18,38 +18,6 @@ const struct keystone_pll_regs keystone_pll_regs[] = {
[DDR3_PLL] = {KS2_DDR3APLLCTL0, KS2_DDR3APLLCTL1},
};
-int dev_speeds[] = {
- SPD800,
- SPD1000,
- SPD1200,
- SPD800,
- SPD800,
- SPD800,
- SPD800,
- SPD800,
- SPD1200,
- SPD1000,
- SPD800,
- SPD800,
- SPD800,
-};
-
-int arm_speeds[] = {
- SPD800,
- SPD1000,
- SPD1200,
- SPD1350,
- SPD1400,
- SPD800,
- SPD1400,
- SPD1350,
- SPD1200,
- SPD1000,
- SPD800,
- SPD800,
- SPD800,
-};
-
/**
* pll_freq_get - get pll frequency
* Fout = Fref * NF(mult) / NR(prediv) / OD
diff --git a/arch/arm/mach-keystone/clock.c b/arch/arm/mach-keystone/clock.c
index d8311ca..cad9ff3 100644
--- a/arch/arm/mach-keystone/clock.c
+++ b/arch/arm/mach-keystone/clock.c
@@ -11,7 +11,19 @@
#include asm/arch/clock.h
#include asm/arch/clock_defs.h
-#define MAX_SPEEDS 13
+/* DEV and ARM speed definitions as specified in DEVSPEED register */
+static int speeds[] = {
+ SPD1000,
+ SPD1200,
+ SPD1350,
+ SPD1400,
+ SPD1500,
+ SPD1400,
+ SPD1350,
+ SPD1200,
+ SPD1000,
+ SPD800,
+};
static void wait_for_completion(const struct pll_init_data *data)
{
@@ -179,43 +191,46 @@ void init_plls(int num_pll, struct pll_init_data *config)
init_pll(config[i]);
}
-static int get_max_speed(u32 val, int *speeds)
+static int get_max_speed(u32 val, u32 speed_supported)
{
- int j;
+ int speed;
- if (!val)
- return speeds[0];
-
- for (j = 1; j MAX_SPEEDS; j++) {
- if (val == 1)
- return speeds[j];
- val = 1;
+ /* Left most setbit gives tess the speed */
+ for (speed = DEVSPEED_NUMSPDS; speed = 0; speed--) {
+ if ((val BIT(speed)) speed_supported)
+ return speeds[speed];
}
+ /* If no bit is set,
[U-Boot] [PATCH 6/8] ARM: keystone2: Cleanup init_pll definition
This is just a cosmetic change that makes
the calling of pll init code looks much cleaner.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
---
arch/arm/mach-keystone/clock.c | 12 ++---
arch/arm/mach-keystone/include/mach/clock.h | 3 ++-
board/ti/ks2_evm/board_k2e.c| 33 +++
board/ti/ks2_evm/board_k2hk.c | 41 ++---
board/ti/ks2_evm/board_k2l.c| 41 ++---
5 files changed, 84 insertions(+), 46 deletions(-)
diff --git a/arch/arm/mach-keystone/clock.c b/arch/arm/mach-keystone/clock.c
index f60a0b8..824a6ce 100644
--- a/arch/arm/mach-keystone/clock.c
+++ b/arch/arm/mach-keystone/clock.c
@@ -191,12 +191,16 @@ void init_pll(const struct pll_init_data *data)
configure_secondary_pll(data);
}
-void init_plls(int num_pll, struct pll_init_data *config)
+void init_plls(void)
{
- int i;
+ struct pll_init_data *data;
+ int pll;
- for (i = 0; i num_pll; i++)
- init_pll(config[i]);
+ for (pll = MAIN_PLL; pll MAX_PLL_COUNT; pll++) {
+ data = get_pll_init_data(pll);
+ if (data)
+ init_pll(data);
+ }
}
static int get_max_speed(u32 val, u32 speed_supported)
diff --git a/arch/arm/mach-keystone/include/mach/clock.h
b/arch/arm/mach-keystone/include/mach/clock.h
index dc3c56a..ea7d8bc 100644
--- a/arch/arm/mach-keystone/include/mach/clock.h
+++ b/arch/arm/mach-keystone/include/mach/clock.h
@@ -73,8 +73,9 @@ extern const struct keystone_pll_regs keystone_pll_regs[];
extern int dev_speeds[];
extern int arm_speeds[];
-void init_plls(int num_pll, struct pll_init_data *config);
+void init_plls(void);
void init_pll(const struct pll_init_data *data);
+struct pll_init_data *get_pll_init_data(int pll);
unsigned long clk_get_rate(unsigned int clk);
unsigned long clk_round_rate(unsigned int clk, unsigned long hz);
int clk_set_rate(unsigned int clk, unsigned long hz);
diff --git a/board/ti/ks2_evm/board_k2e.c b/board/ti/ks2_evm/board_k2e.c
index 6d98b2a..82792ef 100644
--- a/board/ti/ks2_evm/board_k2e.c
+++ b/board/ti/ks2_evm/board_k2e.c
@@ -38,6 +38,26 @@ static struct pll_init_data core_pll_config[] = {
static struct pll_init_data pa_pll_config =
PASS_PLL_1000;
+struct pll_init_data *get_pll_init_data(int pll)
+{
+ int speed;
+ struct pll_init_data *data;
+
+ switch (pll) {
+ case MAIN_PLL:
+ speed = get_max_dev_speed();
+ data = core_pll_config[speed];
+ break;
+ case PASS_PLL:
+ data = pa_pll_config;
+ break;
+ default:
+ data = NULL;
+ }
+
+ return data;
+}
+
#ifdef CONFIG_DRIVER_TI_KEYSTONE_NET
struct eth_priv_t eth_priv_cfg[] = {
{
@@ -107,24 +127,15 @@ int get_num_eth_ports(void)
#if defined(CONFIG_BOARD_EARLY_INIT_F)
int board_early_init_f(void)
{
- int speed;
-
- speed = get_max_dev_speed();
- init_pll(core_pll_config[speed]);
-
- init_pll(pa_pll_config);
+ init_plls();
return 0;
}
#endif
#ifdef CONFIG_SPL_BUILD
-static struct pll_init_data spl_pll_config[] = {
- CORE_PLL_800,
-};
-
void spl_init_keystone_plls(void)
{
- init_plls(ARRAY_SIZE(spl_pll_config), spl_pll_config);
+ init_plls();
}
#endif
diff --git a/board/ti/ks2_evm/board_k2hk.c b/board/ti/ks2_evm/board_k2hk.c
index ed181f4..cec6c02 100644
--- a/board/ti/ks2_evm/board_k2hk.c
+++ b/board/ti/ks2_evm/board_k2hk.c
@@ -46,6 +46,30 @@ static struct pll_init_data tetris_pll_config[] = {
static struct pll_init_data pa_pll_config =
PASS_PLL_983;
+struct pll_init_data *get_pll_init_data(int pll)
+{
+ int speed;
+ struct pll_init_data *data;
+
+ switch (pll) {
+ case MAIN_PLL:
+ speed = get_max_dev_speed();
+ data = core_pll_config[speed];
+ break;
+ case TETRIS_PLL:
+ speed = get_max_arm_speed();
+ data = tetris_pll_config[speed];
+ break;
+ case PASS_PLL:
+ data = pa_pll_config;
+ break;
+ default:
+ data = NULL;
+ }
+
+ return data;
+}
+
#ifdef CONFIG_DRIVER_TI_KEYSTONE_NET
struct eth_priv_t eth_priv_cfg[] = {
{
@@ -87,28 +111,15 @@ int get_num_eth_ports(void)
#ifdef CONFIG_BOARD_EARLY_INIT_F
int board_early_init_f(void)
{
- int speed;
-
- speed = get_max_dev_speed();
- init_pll(core_pll_config[speed]);
-
- init_pll(pa_pll_config);
-
- speed = get_max_arm_speed();
- init_pll(tetris_pll_config[speed]);
+ init_plls();
return 0;
}
#endif
#ifdef CONFIG_SPL_BUILD
-static struct pll_init_data spl_pll_config[] = {
- CORE_PLL_799,
- TETRIS_PLL_500,
-};
-
void spl_init_keystone_plls(void)
{
-
[U-Boot] [PATCH 5/8] ARM: keystone2: Use common structure for PLLs
Register Base addresses are same for PLLs in all
keystone platforms. If a PLL is not available, the corresponding
register addresses are marked as reserved.
Hence use a common definition.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
---
arch/arm/mach-keystone/clock-k2e.c | 6 --
arch/arm/mach-keystone/clock-k2hk.c | 8
arch/arm/mach-keystone/clock-k2l.c | 7 ---
arch/arm/mach-keystone/clock.c | 8
arch/arm/mach-keystone/include/mach/clock-k2e.h | 8
arch/arm/mach-keystone/include/mach/clock-k2hk.h| 9 -
arch/arm/mach-keystone/include/mach/clock-k2l.h | 8
arch/arm/mach-keystone/include/mach/clock.h | 13 -
arch/arm/mach-keystone/include/mach/hardware-k2hk.h | 4
arch/arm/mach-keystone/include/mach/hardware.h | 2 ++
10 files changed, 22 insertions(+), 51 deletions(-)
diff --git a/arch/arm/mach-keystone/clock-k2e.c
b/arch/arm/mach-keystone/clock-k2e.c
index 42092e1..b23d2a5 100644
--- a/arch/arm/mach-keystone/clock-k2e.c
+++ b/arch/arm/mach-keystone/clock-k2e.c
@@ -11,12 +11,6 @@
#include asm/arch/clock.h
#include asm/arch/clock_defs.h
-const struct keystone_pll_regs keystone_pll_regs[] = {
- [CORE_PLL] = {KS2_MAINPLLCTL0, KS2_MAINPLLCTL1},
- [PASS_PLL] = {KS2_PASSPLLCTL0, KS2_PASSPLLCTL1},
- [DDR3_PLL] = {KS2_DDR3APLLCTL0, KS2_DDR3APLLCTL1},
-};
-
/**
* pll_freq_get - get pll frequency
* Fout = Fref * NF(mult) / NR(prediv) / OD
diff --git a/arch/arm/mach-keystone/clock-k2hk.c
b/arch/arm/mach-keystone/clock-k2hk.c
index 96a9f72..2e36891 100644
--- a/arch/arm/mach-keystone/clock-k2hk.c
+++ b/arch/arm/mach-keystone/clock-k2hk.c
@@ -11,14 +11,6 @@
#include asm/arch/clock.h
#include asm/arch/clock_defs.h
-const struct keystone_pll_regs keystone_pll_regs[] = {
- [CORE_PLL] = {KS2_MAINPLLCTL0, KS2_MAINPLLCTL1},
- [PASS_PLL] = {KS2_PASSPLLCTL0, KS2_PASSPLLCTL1},
- [TETRIS_PLL]= {KS2_ARMPLLCTL0, KS2_ARMPLLCTL1},
- [DDR3A_PLL] = {KS2_DDR3APLLCTL0, KS2_DDR3APLLCTL1},
- [DDR3B_PLL] = {KS2_DDR3BPLLCTL0, KS2_DDR3BPLLCTL1},
-};
-
/**
* pll_freq_get - get pll frequency
* Fout = Fref * NF(mult) / NR(prediv) / OD
diff --git a/arch/arm/mach-keystone/clock-k2l.c
b/arch/arm/mach-keystone/clock-k2l.c
index 80c1f51..0bd0fd6 100644
--- a/arch/arm/mach-keystone/clock-k2l.c
+++ b/arch/arm/mach-keystone/clock-k2l.c
@@ -11,13 +11,6 @@
#include asm/arch/clock.h
#include asm/arch/clock_defs.h
-const struct keystone_pll_regs keystone_pll_regs[] = {
- [CORE_PLL] = {KS2_MAINPLLCTL0, KS2_MAINPLLCTL1},
- [PASS_PLL] = {KS2_PASSPLLCTL0, KS2_PASSPLLCTL1},
- [TETRIS_PLL] = {KS2_ARMPLLCTL0, KS2_ARMPLLCTL1},
- [DDR3_PLL] = {KS2_DDR3APLLCTL0, KS2_DDR3APLLCTL1},
-};
-
/**
* pll_freq_get - get pll frequency
* Fout = Fref * NF(mult) / NR(prediv) / OD
diff --git a/arch/arm/mach-keystone/clock.c b/arch/arm/mach-keystone/clock.c
index cad9ff3..f60a0b8 100644
--- a/arch/arm/mach-keystone/clock.c
+++ b/arch/arm/mach-keystone/clock.c
@@ -25,6 +25,14 @@ static int speeds[] = {
SPD800,
};
+const struct keystone_pll_regs keystone_pll_regs[] = {
+ [CORE_PLL] = {KS2_MAINPLLCTL0, KS2_MAINPLLCTL1},
+ [PASS_PLL] = {KS2_PASSPLLCTL0, KS2_PASSPLLCTL1},
+ [TETRIS_PLL]= {KS2_ARMPLLCTL0, KS2_ARMPLLCTL1},
+ [DDR3A_PLL] = {KS2_DDR3APLLCTL0, KS2_DDR3APLLCTL1},
+ [DDR3B_PLL] = {KS2_DDR3BPLLCTL0, KS2_DDR3BPLLCTL1},
+};
+
static void wait_for_completion(const struct pll_init_data *data)
{
int i;
diff --git a/arch/arm/mach-keystone/include/mach/clock-k2e.h
b/arch/arm/mach-keystone/include/mach/clock-k2e.h
index 42be2ca..3bde6da 100644
--- a/arch/arm/mach-keystone/include/mach/clock-k2e.h
+++ b/arch/arm/mach-keystone/include/mach/clock-k2e.h
@@ -50,14 +50,6 @@ extern unsigned int external_clk[ext_clk_count];
#define KS2_CLK1_6 sys_clk0_6_clk
-/* PLL identifiers */
-enum pll_type_e {
- CORE_PLL,
- PASS_PLL,
- DDR3_PLL,
- TETRIS_PLL,
-};
-
#define CORE_PLL_800 {CORE_PLL, 16, 1, 2}
#define CORE_PLL_850 {CORE_PLL, 17, 1, 2}
#define CORE_PLL_1000 {CORE_PLL, 20, 1, 2}
diff --git a/arch/arm/mach-keystone/include/mach/clock-k2hk.h
b/arch/arm/mach-keystone/include/mach/clock-k2hk.h
index c41210c..366bf0e 100644
--- a/arch/arm/mach-keystone/include/mach/clock-k2hk.h
+++ b/arch/arm/mach-keystone/include/mach/clock-k2hk.h
@@ -55,15 +55,6 @@ extern unsigned int external_clk[ext_clk_count];
#define KS2_CLK1_6 sys_clk0_6_clk
-/* PLL identifiers */
-enum pll_type_e {
- CORE_PLL,
- PASS_PLL,
- TETRIS_PLL,
- DDR3A_PLL,
- DDR3B_PLL,
-};
-
#define CORE_PLL_799{CORE_PLL, 13, 1, 2}
#define CORE_PLL_983{CORE_PLL, 16, 1, 2}
#define CORE_PLL_999 {CORE_PLL, 122,15, 1}
diff --git
[U-Boot] [PATCH 2/8] ARM: keystone2: Enable CONFIG_DISPLAY_CPUINFO
Add print_cpuinfo() function and enable
CONFIG_DISPLAY_CPUINFO for keystone platforms,
so that cpu info can be displayed during boot.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
---
arch/arm/mach-keystone/init.c| 24
include/configs/ti_armv7_keystone2.h | 1 +
2 files changed, 25 insertions(+)
diff --git a/arch/arm/mach-keystone/init.c b/arch/arm/mach-keystone/init.c
index c96845c..d742ad3 100644
--- a/arch/arm/mach-keystone/init.c
+++ b/arch/arm/mach-keystone/init.c
@@ -149,3 +149,27 @@ void enable_caches(void)
dcache_enable();
#endif
}
+
+#if defined(CONFIG_DISPLAY_CPUINFO)
+int print_cpuinfo(void)
+{
+ u16 cpu = get_part_number();
+
+ puts(CPU: );
+ switch (cpu) {
+ case CPU_66AK2Hx:
+ puts(66AK2Hx\n);
+ break;
+ case CPU_66AK2Lx:
+ puts(66AK2Lx\n);
+ break;
+ case CPU_66AK2Ex:
+ puts(66AK2Ex\n);
+ break;
+ default:
+ puts(Unknown\n);
+ }
+
+ return 0;
+}
+#endif
diff --git a/include/configs/ti_armv7_keystone2.h
b/include/configs/ti_armv7_keystone2.h
index 198e365..056b938 100644
--- a/include/configs/ti_armv7_keystone2.h
+++ b/include/configs/ti_armv7_keystone2.h
@@ -15,6 +15,7 @@
/* U-Boot Build Configuration */
#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is a 2nd stage loader */
#define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_DISPLAY_CPUINFO
/* SoC Configuration */
#define CONFIG_ARCH_CPU_INIT
--
2.1.4
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Re: [U-Boot] [PATCH 0/8] ARM: keystone2: Clocls and PLLs cleanup
Hi, On Wednesday 22 July 2015 09:09 PM, Lokesh Vutla wrote: This seires does a several bunch of cleanups for clock and PLL related definitions. This helps a lot in adding data for new Keystone2 SoCs. And also adds support for CPU detection. Sorry about the typo in $subject. Will update it after the comments on this series. Thanks and regards, Lokesh This is based on Nishanth's config cleanup series: https://www.mail-archive.com/u-boot%40lists.denx.de/msg177822.html Tested on K2HK-evm: http://pastebin.ubuntu.com/11920541/ Lokesh Vutla (8): ARM: keystone2: Cleanup SoC detection ARM: keystone2: Enable CONFIG_DISPLAY_CPUINFO ARM: keystone2: Cleanup PLL init code ARM: keystone2: Fix dev and arm speed detection ARM: keystone2: Use common address for PLL ARM: keystone2: Cleanup pll calling ARM: keystone2: Remove unsed externalk clocks ARM: keystone2: Use common definition for clk_get_rate arch/arm/mach-keystone/Makefile| 3 - arch/arm/mach-keystone/clock-k2e.c | 117 - arch/arm/mach-keystone/clock-k2hk.c| 145 -- arch/arm/mach-keystone/clock-k2l.c | 138 -- arch/arm/mach-keystone/clock.c | 527 + arch/arm/mach-keystone/cmd_clock.c | 7 +- arch/arm/mach-keystone/include/mach/clock-k2e.h| 58 +-- arch/arm/mach-keystone/include/mach/clock-k2hk.h | 64 +-- arch/arm/mach-keystone/include/mach/clock-k2l.h| 59 +-- arch/arm/mach-keystone/include/mach/clock.h| 60 ++- arch/arm/mach-keystone/include/mach/clock_defs.h | 107 +++-- .../arm/mach-keystone/include/mach/hardware-k2hk.h | 4 - arch/arm/mach-keystone/include/mach/hardware.h | 51 +- arch/arm/mach-keystone/init.c | 24 + board/ti/ks2_evm/board.c | 1 - board/ti/ks2_evm/board_k2e.c | 41 +- board/ti/ks2_evm/board_k2hk.c | 47 +- board/ti/ks2_evm/board_k2l.c | 46 +- include/configs/ti_armv7_keystone2.h | 1 + 19 files changed, 603 insertions(+), 897 deletions(-) delete mode 100644 arch/arm/mach-keystone/clock-k2e.c delete mode 100644 arch/arm/mach-keystone/clock-k2hk.c delete mode 100644 arch/arm/mach-keystone/clock-k2l.c ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 47/48] x86: Gracefully disable the vesa driver when running from EFI
We cannot use this driver when running from EFI as we have no direct hardware
access. Coreboot uses a different driver which uses tables provided by
Coreboot. So far it does not seem possible to use a normal video driver when
booting from EFI.
Signed-off-by: Simon Glass s...@chromium.org
---
drivers/video/vesa_fb.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/video/vesa_fb.c b/drivers/video/vesa_fb.c
index 909f8e8..7a93443 100644
--- a/drivers/video/vesa_fb.c
+++ b/drivers/video/vesa_fb.c
@@ -24,6 +24,14 @@ void *video_hw_init(void)
int ret;
printf(Video: );
+ if (!ll_boot_init()) {
+ /*
+* If we are running from EFI or Coreboot, this driver can't
+* work.
+*/
+ printf(Not available (previous bootloader prevents it)\n);
+ return NULL;
+ }
if (vbe_get_video_info(gdev)) {
dev = pci_find_class(PCI_CLASS_DISPLAY_VGA 8, 0);
if (dev == -1) {
--
2.4.3.573.g4eafbef
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[U-Boot] [PATCH 44/48] x86: Add helper code for running from EFI
When U-Boot is running from EFI some of the x86 init is replaced with
EFI-specific init. For example, since DRAM has already been set up, we only
need to find it, not init it. Add these functions so that boards can easily
allow booting from EFI if required.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/x86/lib/Makefile | 1 +
arch/x86/lib/efi/Makefile | 9 +++
arch/x86/lib/efi/car.S| 12
arch/x86/lib/efi/efi.c| 151 ++
4 files changed, 173 insertions(+)
create mode 100644 arch/x86/lib/efi/Makefile
create mode 100644 arch/x86/lib/efi/car.S
create mode 100644 arch/x86/lib/efi/efi.c
diff --git a/arch/x86/lib/Makefile b/arch/x86/lib/Makefile
index fb4a73c..3db373c 100644
--- a/arch/x86/lib/Makefile
+++ b/arch/x86/lib/Makefile
@@ -31,6 +31,7 @@ obj-y += bios_interrupts.o
obj-$(CONFIG_CMD_BOOTM) += bootm.o
obj-y += cmd_boot.o
obj-$(CONFIG_HAVE_FSP) += cmd_hob.o
+obj-$(CONFIG_EFI_STUB) += efi/
obj-y += gcc.o
obj-y += init_helpers.o
obj-y += interrupts.o
diff --git a/arch/x86/lib/efi/Makefile b/arch/x86/lib/efi/Makefile
new file mode 100644
index 000..a308a0e
--- /dev/null
+++ b/arch/x86/lib/efi/Makefile
@@ -0,0 +1,9 @@
+#
+# (C) Copyright 2002-2006
+# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += car.o
+obj-y += efi.o
diff --git a/arch/x86/lib/efi/car.S b/arch/x86/lib/efi/car.S
new file mode 100644
index 000..6dda058
--- /dev/null
+++ b/arch/x86/lib/efi/car.S
@@ -0,0 +1,12 @@
+/*
+ * Copyright (c) 2015 Google, Inc
+ * Written by Simon Glass s...@chromium.org
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+.section .text
+
+.globl car_init
+car_init:
+ jmp car_init_ret
diff --git a/arch/x86/lib/efi/efi.c b/arch/x86/lib/efi/efi.c
new file mode 100644
index 000..ede5d56
--- /dev/null
+++ b/arch/x86/lib/efi/efi.c
@@ -0,0 +1,151 @@
+/*
+ * Copyright (c) 2015 Google, Inc
+ * Written by Simon Glass s...@chromium.org
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include debug_uart.h
+#include efi.h
+#include errno.h
+#include linux/err.h
+#include linux/types.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * This function looks for the highest region of memory lower than 4GB which
+ * has enough space for U-Boot where U-Boot is aligned on a page boundary.
+ * It overrides the default implementation found elsewhere which simply
+ * picks the end of ram, wherever that may be. The location of the stack,
+ * the relocation address, and how far U-Boot is moved by relocation are
+ * set in the global data structure.
+ */
+ulong board_get_usable_ram_top(ulong total_size)
+{
+ struct efi_mem_desc *desc, *end;
+ struct efi_entry_memmap *map;
+ int ret, size;
+ uintptr_t dest_addr = 0;
+ struct efi_mem_desc *largest = NULL;
+
+ /*
+* Find largest area of memory below 4GB. We could
+* call efi_build_mem_table() for a more accurate picture since it
+* merges areas together where possible. But that function uses more
+* pre-relocation memory, and it's not critical that we find the
+* absolute largest region.
+*/
+ ret = efi_info_get(EFIET_MEMORY_MAP, (void **)map, size);
+ if (ret) {
+ /* We should have stopped in dram_init(), something is wrong */
+ debug(%s: Missing memory map\n, __func__);
+ goto err;
+ }
+
+ end = (struct efi_mem_desc *)((ulong)map + size);
+ desc = map-desc;
+ for (; desc end; desc = efi_get_next_mem_desc(map, desc)) {
+ if (desc-type != EFI_CONVENTIONAL_MEMORY ||
+ desc-physical_start = 1ULL 32)
+ continue;
+ if (!largest || desc-num_pages largest-num_pages)
+ largest = desc;
+ }
+
+ /* If no suitable area was found, return an error. */
+ assert(largest);
+ if (!largest || (largest-num_pages EFI_PAGE_SHIFT) (2 20))
+ goto err;
+
+ dest_addr = largest-physical_start + (largest-num_pages
+ EFI_PAGE_SHIFT);
+
+ return (ulong)dest_addr;
+err:
+ panic(No available memory found for relocation);
+ return 0;
+}
+
+int dram_init(void)
+{
+ struct efi_mem_desc *desc, *end;
+ struct efi_entry_memmap *map;
+ int size, ret;
+
+ ret = efi_info_get(EFIET_MEMORY_MAP, (void **)map, size);
+ if (ret) {
+ printf(Cannot find EFI memory map tables, ret=%d\n, ret);
+
+ return -ENODEV;
+ }
+
+ end = (struct efi_mem_desc *)((ulong)map + size);
+ gd-ram_size = 0;
+ desc = map-desc;
+ for (; desc end; desc = efi_get_next_mem_desc(map, desc)) {
+ if (desc-type EFI_MMAP_IO)
+ gd-ram_size += desc-num_pages EFI_PAGE_SHIFT;
+ }
+
+ return 0;
+}
+
+void
[U-Boot] [PATCH 33/48] x86: Add relocation and link script for a 64-bit EFI application
Add a link script and relocation code for building 64-bit EFI applications.
This can be used for the EFI stub.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/x86/cpu/efi/elf_x86_64_efi.lds | 87 +++
arch/x86/lib/reloc_x86_64.c | 90 +
2 files changed, 177 insertions(+)
create mode 100644 arch/x86/cpu/efi/elf_x86_64_efi.lds
create mode 100644 arch/x86/lib/reloc_x86_64.c
diff --git a/arch/x86/cpu/efi/elf_x86_64_efi.lds
b/arch/x86/cpu/efi/elf_x86_64_efi.lds
new file mode 100644
index 000..369f146
--- /dev/null
+++ b/arch/x86/cpu/efi/elf_x86_64_efi.lds
@@ -0,0 +1,87 @@
+/*
+ * U-Boot EFI link script
+ *
+ * SPDX-License-Identifier:bsd-2-clause
+ *
+ * Modified from usr/lib32/elf_ia32_efi.lds in gnu-efi
+ */
+
+#include config.h
+
+OUTPUT_FORMAT(elf64-x86-64, elf64-x86-64, elf64-x86-64)
+OUTPUT_ARCH(i386:x86-64)
+ENTRY(_start)
+SECTIONS
+{
+ . = 0x0;
+ ImageBase = .;
+ .hash : { *(.hash) }/* this MUST come first! */
+ . = ALIGN(4096);
+ .eh_frame : {
+ *(.eh_frame)
+ }
+
+ . = ALIGN(4096);
+
+ .text : {
+ *(.text)
+ *(.text.*)
+ *(.gnu.linkonce.t.*)
+ }
+
+ . = ALIGN(4096);
+
+ .reloc : {
+ *(.reloc)
+ }
+
+ . = ALIGN(4096);
+
+ .data : {
+ *(.rodata*)
+ *(.got.plt)
+ *(.got)
+ *(.data*)
+ *(.sdata)
+ /* the EFI loader doesn't seem to like a .bss section, so we
stick
+* it all into .data: */
+ *(.sbss)
+ *(.scommon)
+ *(.dynbss)
+ *(.bss)
+ *(COMMON)
+ *(.rel.local)
+
+ /* U-Boot lists and device tree */
+ . = ALIGN(8);
+ KEEP(*(SORT(.u_boot_list*)));
+ . = ALIGN(8);
+ KEEP(*(.dtb*));
+ /* Keep U-Boot payload */
+ . = ALIGN(8);
+ KEEP(*(.u_boot_bin.*));
+ }
+
+ . = ALIGN(4096);
+ .dynamic : { *(.dynamic) }
+ . = ALIGN(4096);
+
+ .rela : {
+ *(.rela.data*)
+ *(.rela.got)
+ *(.rela.stab)
+ }
+
+ . = ALIGN(4096);
+ .dynsym : { *(.dynsym) }
+ . = ALIGN(4096);
+ .dynstr : { *(.dynstr) }
+ . = ALIGN(4096);
+ .ignored.reloc : {
+ *(.rela.reloc)
+ *(.eh_frame)
+ *(.note.GNU-stack)
+ }
+
+ .comment 0 : { *(.comment) }
+}
diff --git a/arch/x86/lib/reloc_x86_64.c b/arch/x86/lib/reloc_x86_64.c
new file mode 100644
index 000..70a2b2a
--- /dev/null
+++ b/arch/x86/lib/reloc_x86_64.c
@@ -0,0 +1,90 @@
+/* reloc_x86_64.c - position independent x86_64 ELF shared object relocator
+ Copyright (C) 1999 Hewlett-Packard Co.
+ Contributed by David Mosberger dav...@hpl.hp.com.
+ Copyright (C) 2005 Intel Co.
+ Contributed by Fenghua Yu fenghua...@intel.com.
+
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions
+are met:
+
+* Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+* Redistributions in binary form must reproduce the above
+ copyright notice, this list of conditions and the following
+ disclaimer in the documentation and/or other materials
+ provided with the distribution.
+* Neither the name of Hewlett-Packard Co. nor the names of its
+ contributors may be used to endorse or promote products derived
+ from this software without specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+CONTRIBUTORS AS IS AND ANY EXPRESS OR IMPLIED WARRANTIES,
+INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
+BE LIABLE FOR ANYDIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
+OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
+TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
+THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+SUCH DAMAGE.
+*/
+
+#include common.h
+#include efi.h
+#include elf.h
+#include asm/elf.h
+
+efi_status_t _relocate(long ldbase, Elf64_Dyn *dyn, efi_handle_t image,
+ struct efi_system_table *systab)
+{
+ long relsz = 0, relent = 0;
+ struct elf64_rel *rel = 0;
+ unsigned
Re: [U-Boot] [PATCH V3 6/8] ti_armv7_keystone2: switch to using kernel zImage
On 07/18/2015 12:40 PM, Nishanth Menon wrote:
Switch to using zImage instead of uImage. and while at it, start using
bootz as default. While at it, get rid of BOOTIMAGE define and start
using Linux upstream dtb file names.
Signed-off-by: Nishanth Menon n...@ti.com
---
New patch.
include/configs/k2e_evm.h| 2 +-
include/configs/k2hk_evm.h | 2 +-
include/configs/k2l_evm.h| 2 +-
include/configs/ti_armv7_keystone2.h | 5 ++---
4 files changed, 5 insertions(+), 6 deletions(-)
diff --git a/include/configs/k2e_evm.h b/include/configs/k2e_evm.h
index f1e650141ae1..afb289ca4bad 100644
--- a/include/configs/k2e_evm.h
+++ b/include/configs/k2e_evm.h
@@ -19,7 +19,7 @@
addr_mon=0x0c14\0 \
args_ubi=setenv bootargs ${bootargs} rootfstype=ubifs \
root=ubi0:rootfs rootflags=sync rw ubi.mtd=ubifs,2048\0 \
- name_fdt=uImage-k2e-evm.dtb\0 \
+ name_fdt=k2e-evm.dtb\0 \
name_mon=skern-k2e-evm.bin\0\
name_ubi=k2e-evm-ubifs.ubi\0\
name_uboot=u-boot-spi-k2e-evm.gph\0 \
diff --git a/include/configs/k2hk_evm.h b/include/configs/k2hk_evm.h
index f8e83de64b63..c2d3ec7c70cb 100644
--- a/include/configs/k2hk_evm.h
+++ b/include/configs/k2hk_evm.h
@@ -19,7 +19,7 @@
addr_mon=0x0c5f\0 \
args_ubi=setenv bootargs ${bootargs} rootfstype=ubifs \
root=ubi0:rootfs rootflags=sync rw ubi.mtd=ubifs,2048\0 \
- name_fdt=uImage-k2hk-evm.dtb\0 \
+ name_fdt=k2hk-evm.dtb\0 \
name_mon=skern-k2hk-evm.bin\0 \
name_ubi=k2hk-evm-ubifs.ubi\0 \
name_uboot=u-boot-spi-k2hk-evm.gph\0\
diff --git a/include/configs/k2l_evm.h b/include/configs/k2l_evm.h
index 395608a5f6db..1957287a57c7 100644
--- a/include/configs/k2l_evm.h
+++ b/include/configs/k2l_evm.h
@@ -19,7 +19,7 @@
addr_mon=0x0c14\0 \
args_ubi=setenv bootargs ${bootargs} rootfstype=ubifs \
root=ubi0:rootfs rootflags=sync rw ubi.mtd=ubifs,4096\0 \
- name_fdt=uImage-k2l-evm.dtb\0 \
+ name_fdt=k2l-evm.dtb\0 \
name_mon=skern-k2l-evm.bin\0\
name_ubi=k2l-evm-ubifs.ubi\0\
name_uboot=u-boot-spi-k2l-evm.gph\0 \
diff --git a/include/configs/ti_armv7_keystone2.h
b/include/configs/ti_armv7_keystone2.h
index ddc2e23f1370..e327f3e03073 100644
--- a/include/configs/ti_armv7_keystone2.h
+++ b/include/configs/ti_armv7_keystone2.h
@@ -210,7 +210,6 @@
/* EDMA3 */
#define CONFIG_TI_EDMA3
-#define CONFIG_BOOTFILEuImage
#define CONFIG_EXTRA_ENV_SETTINGS \
DEFAULT_LINUX_BOOT_ENV \
CONFIG_EXTRA_ENV_KS2_BOARD_SETTINGS \
@@ -221,9 +220,9 @@
mem_reserve=512M\0 \
addr_ubi=0x8200\0 \
addr_secdb_key=0xc00\0 \
- name_kern=uImage-keystone-evm.bin\0 \
+ name_kern=zImage\0 \
run_mon=mon_install ${addr_mon}\0 \
- run_kern=bootm ${loadaddr} - ${fdtaddr}\0 \
+ run_kern=bootz ${loadaddr} - ${fdtaddr}\0 \
init_net=run args_all args_net\0\
init_ubi=run args_all args_ubi; \
ubi part ubifs; ubifsmount ubi:boot;\
Reviewed-by: Murali Karicheri m-kariche...@ti.com
--
Murali Karicheri
Linux Kernel, Keystone
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Re: [U-Boot] [PATCH V3 7/8] configs: k2*_evm: rename skernel binary names to generated file names
On 07/18/2015 12:40 PM, Nishanth Menon wrote:
using http://git.ti.com/keystone-linux/boot-monitor/trees/master as
reference (tag K2_BM_15.07) the generated files do not have evm
extensions by default. So dont use -evm extension.
Signed-off-by: Nishanth Menon n...@ti.com
---
New patch
include/configs/k2e_evm.h | 2 +-
include/configs/k2hk_evm.h | 2 +-
include/configs/k2l_evm.h | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/include/configs/k2e_evm.h b/include/configs/k2e_evm.h
index afb289ca4bad..4f4ebf53ec59 100644
--- a/include/configs/k2e_evm.h
+++ b/include/configs/k2e_evm.h
@@ -20,7 +20,7 @@
args_ubi=setenv bootargs ${bootargs} rootfstype=ubifs \
root=ubi0:rootfs rootflags=sync rw ubi.mtd=ubifs,2048\0 \
name_fdt=k2e-evm.dtb\0 \
- name_mon=skern-k2e-evm.bin\0\
+ name_mon=skern-k2e.bin\0\
name_ubi=k2e-evm-ubifs.ubi\0\
name_uboot=u-boot-spi-k2e-evm.gph\0 \
name_fs=arago-console-image-k2e-evm.cpio.gz\0
diff --git a/include/configs/k2hk_evm.h b/include/configs/k2hk_evm.h
index c2d3ec7c70cb..6c6dcb1e5ed3 100644
--- a/include/configs/k2hk_evm.h
+++ b/include/configs/k2hk_evm.h
@@ -20,7 +20,7 @@
args_ubi=setenv bootargs ${bootargs} rootfstype=ubifs \
root=ubi0:rootfs rootflags=sync rw ubi.mtd=ubifs,2048\0 \
name_fdt=k2hk-evm.dtb\0 \
- name_mon=skern-k2hk-evm.bin\0 \
+ name_mon=skern-k2hk.bin\0 \
name_ubi=k2hk-evm-ubifs.ubi\0 \
name_uboot=u-boot-spi-k2hk-evm.gph\0\
name_fs=arago-console-image-k2hk-evm.cpio.gz\0
diff --git a/include/configs/k2l_evm.h b/include/configs/k2l_evm.h
index 1957287a57c7..9bacfa49c430 100644
--- a/include/configs/k2l_evm.h
+++ b/include/configs/k2l_evm.h
@@ -20,7 +20,7 @@
args_ubi=setenv bootargs ${bootargs} rootfstype=ubifs \
root=ubi0:rootfs rootflags=sync rw ubi.mtd=ubifs,4096\0 \
name_fdt=k2l-evm.dtb\0 \
- name_mon=skern-k2l-evm.bin\0\
+ name_mon=skern-k2l.bin\0\
name_ubi=k2l-evm-ubifs.ubi\0\
name_uboot=u-boot-spi-k2l-evm.gph\0 \
name_fs=arago-console-image-k2l-evm.cpio.gz\0
Reviewed-by: Murali Karicheri m-kariche...@ti.com
--
Murali Karicheri
Linux Kernel, Keystone
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Re: [U-Boot] [PATCH V3 8/8] configs: keystone2: remove distro specific ramdisk name
On Wed, Jul 22, 2015 at 10:32 AM, Tom Rini tr...@konsulko.com wrote: Instead of trying to whack this stuff to be more generic lets just punt on it and drop when moving to config_distro_bootcmd.h OK. will do so. -- --- Regards, Nishanth Menon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 09/19] ARM: zynq: DT: Clean up timer device tree nodes
Separate IRQ cells from each other for easier reading.
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
Sync with mainline kernel
---
arch/arm/dts/zynq-7000.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/dts/zynq-7000.dtsi b/arch/arm/dts/zynq-7000.dtsi
index 383ddd674b08..61256ee42393 100644
--- a/arch/arm/dts/zynq-7000.dtsi
+++ b/arch/arm/dts/zynq-7000.dtsi
@@ -288,7 +288,7 @@
ttc0: timer@f8001000 {
interrupt-parent = intc;
- interrupts = 0 10 4 0 11 4 0 12 4 ;
+ interrupts = 0 10 4, 0 11 4, 0 12 4;
compatible = cdns,ttc;
clocks = clkc 6;
reg = 0xF8001000 0x1000;
@@ -296,7 +296,7 @@
ttc1: timer@f8002000 {
interrupt-parent = intc;
- interrupts = 0 37 4 0 38 4 0 39 4 ;
+ interrupts = 0 37 4, 0 38 4, 0 39 4;
compatible = cdns,ttc;
clocks = clkc 6;
reg = 0xF8002000 0x1000;
--
2.3.5
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[U-Boot] [PATCH 24/48] x86: Add asm/elf.h for x86-specific ELF definitions
Bring in this file from Linux 4.1. It supports relocation features specific to x86. Signed-off-by: Simon Glass s...@chromium.org --- arch/x86/include/asm/elf.h | 50 ++ 1 file changed, 50 insertions(+) create mode 100644 arch/x86/include/asm/elf.h diff --git a/arch/x86/include/asm/elf.h b/arch/x86/include/asm/elf.h new file mode 100644 index 000..d6eff0e --- /dev/null +++ b/arch/x86/include/asm/elf.h @@ -0,0 +1,50 @@ +/* + * Brought in from Linux 4.1, removed things not useful to U-Boot. + * The definitions perhaps came from the GNU Library which is GPL. + * + * SPDX-License-Identifier:GPL-2.0+ + */ + +#ifndef _ASM_X86_ELF_H +#define _ASM_X86_ELF_H + +/* + * ELF register definitions.. + */ +#include asm/ptrace.h + +#define R_386_NONE 0 +#define R_386_32 1 +#define R_386_PC32 2 +#define R_386_GOT323 +#define R_386_PLT324 +#define R_386_COPY 5 +#define R_386_GLOB_DAT 6 +#define R_386_JMP_SLOT 7 +#define R_386_RELATIVE 8 +#define R_386_GOTOFF 9 +#define R_386_GOTPC10 +#define R_386_NUM 11 + +/* x86-64 relocation types */ +#define R_X86_64_NONE 0 /* No reloc */ +#define R_X86_64_641 /* Direct 64 bit */ +#define R_X86_64_PC32 2 /* PC relative 32 bit signed */ +#define R_X86_64_GOT32 3 /* 32 bit GOT entry */ +#define R_X86_64_PLT32 4 /* 32 bit PLT address */ +#define R_X86_64_COPY 5 /* Copy symbol at runtime */ +#define R_X86_64_GLOB_DAT 6 /* Create GOT entry */ +#define R_X86_64_JUMP_SLOT 7 /* Create PLT entry */ +#define R_X86_64_RELATIVE 8 /* Adjust by program base */ +#define R_X86_64_GOTPCREL 9 /* 32 bit signed pc relative + offset to GOT */ +#define R_X86_64_3210 /* Direct 32 bit zero extended */ +#define R_X86_64_32S 11 /* Direct 32 bit sign extended */ +#define R_X86_64_1612 /* Direct 16 bit zero extended */ +#define R_X86_64_PC16 13 /* 16 bit sign extended pc relative */ +#define R_X86_64_8 14 /* Direct 8 bit sign extended */ +#define R_X86_64_PC8 15 /* 8 bit sign extended pc relative */ + +#define R_X86_64_NUM 16 + +#endif /* _ASM_X86_ELF_H */ -- 2.4.3.573.g4eafbef ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 39/48] x86: Add Makefile settings for EFI build
This is not in a good place. I'm hoping that Masahiro can help figure this one out. Signed-off-by: Simon Glass s...@chromium.org --- scripts/Makefile.build | 8 1 file changed, 8 insertions(+) diff --git a/scripts/Makefile.build b/scripts/Makefile.build index ac0554e..9a7d28d 100644 --- a/scripts/Makefile.build +++ b/scripts/Makefile.build @@ -294,6 +294,14 @@ $(obj)/%.lst: $(src)/%.c FORCE # Compile assembler sources (.S) # --- +# TODO(s...@chromium.org): Move this to a sensible place. It does not seem to +# work if placed in arch/x86/config.mk, etc. It is placed here so that +# we use the correct flags when assembling u-boot-dtb.bin.S. +ifdef CONFIG_X86 +AFLAGS_REMOVE_u-boot-dtb.bin.o += -mregparm=3 -march=i386 -m32 +AFLAGS_u-boot-dtb.bin.o += -fpic -fshort-wchar +endif + modkern_aflags := $(KBUILD_AFLAGS_KERNEL) $(AFLAGS_KERNEL) $(real-objs-m) : modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE) -- 2.4.3.573.g4eafbef ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 28/48] x86: Allow use of global_data with EFI
On x86 the global_data pointer is provided through a somewhat-bizarre and
x86-specific mechanism: the frame segment is set to a pointer to the start
of global_data, so that accesses can use this build-in register.
When running as an EFI payload we don't want to mess with the Global
Descriptor Table (GDT) and there is little advantage (in terms of code size)
to doing so.
Allow global_data to be a simple variable in this case.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/x86/include/asm/global_data.h | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/x86/include/asm/global_data.h
b/arch/x86/include/asm/global_data.h
index abd70b9..6df6a78 100644
--- a/arch/x86/include/asm/global_data.h
+++ b/arch/x86/include/asm/global_data.h
@@ -76,6 +76,12 @@ struct arch_global_data {
#include asm-generic/global_data.h
#ifndef __ASSEMBLY__
+# ifdef CONFIG_ARCH_EFI
+
+#define gd global_data_ptr
+
+#define DECLARE_GLOBAL_DATA_PTR extern struct global_data *global_data_ptr
+# else
static inline __attribute__((no_instrument_function)) gd_t *get_fs_gd_ptr(void)
{
gd_t *gd_ptr;
@@ -88,6 +94,7 @@ static inline __attribute__((no_instrument_function)) gd_t
*get_fs_gd_ptr(void)
#define gd get_fs_gd_ptr()
#define DECLARE_GLOBAL_DATA_PTR
+# endif
#endif
--
2.4.3.573.g4eafbef
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[U-Boot] [PATCH 34/48] efi: Add support for loading U-Boot through an EFI stub
It is useful to be able to load U-Boot onto a board even it is it already
running EFI. This can allow access to the U-Boot command interface, flexible
booting options and easier development.
The easiest way to do this is to build U-Boot as a binary blob and have an
EFI stub copy it into RAM. Add support for this feature, targeting 32-bit
initially.
Also add a way to detect when U-Boot has been loaded via a stub. This goes
in common.h since it needs to be widely available so that we avoid redoing
initialisation that should be skipped.
Signed-off-by: Simon Glass s...@chromium.org
---
Makefile | 32 ++
include/common.h | 7 ++
include/efi.h | 4 +
lib/efi/Kconfig| 21
lib/efi/Makefile | 9 ++
lib/efi/efi_stub.c | 293 +
6 files changed, 366 insertions(+)
create mode 100644 lib/efi/efi_stub.c
diff --git a/Makefile b/Makefile
index 91ebc2e..9f863e1 100644
--- a/Makefile
+++ b/Makefile
@@ -753,6 +753,7 @@ ALL-$(CONFIG_SPL) += $(CONFIG_SPL_TARGET:%=%)
endif
ALL-$(CONFIG_REMAKE_ELF) += u-boot.elf
ALL-$(CONFIG_ARCH_EFI) += u-boot.efi
+ALL-$(CONFIG_EFI_STUB) += u-boot-payload.efi
ifneq ($(BUILD_ROM),)
ALL-$(CONFIG_X86_RESET_VECTOR) += u-boot.rom
@@ -1085,6 +1086,37 @@ OBJCOPYFLAGS_u-boot.efi := $(OBJCOPYFLAGS_EFI)
u-boot.efi: u-boot FORCE
$(call if_changed,zobjcopy)
+# Generate an assembly file to wrap a binary file
+quiet_cmd_bin_S = BIN $@
+cmd_bin_S =\
+( \
+ echo '.section .u_boot_bin.init.rodata,a';\
+ echo '.balign 16'; \
+ echo '.global __u_boot_bin_begin'; \
+ echo '__u_boot_bin_begin:'; \
+ echo '.incbin $ '; \
+ echo '__u_boot_bin_end:'; \
+ echo '.global __u_boot_bin_end';\
+ echo '.balign 16'; \
+) $@
+
+u-boot-dtb.bin.S: u-boot-dtb.bin FORCE
+ $(call if_changed,bin_S)
+
+u-boot-payload.lds: $(LDSCRIPT_EFI) FORCE
+ $(call if_changed_dep,cpp_lds)
+
+u-boot-payload: u-boot-dtb.bin.o u-boot-payload.lds \
+ FORCE
+ $(LD) $(LDFLAGS_EFI) -o $@ \
+ -T u-boot-payload.lds \
+ lib/efi/efi.o lib/efi/efi_stub.o u-boot-dtb.bin.o \
+ $(addprefix arch/$(ARCH)/lib/,$(EFISTUB))
+
+OBJCOPYFLAGS_u-boot-payload.efi := $(OBJCOPYFLAGS_EFI)
+u-boot-payload.efi: u-boot-payload FORCE
+ $(call if_changed,zobjcopy)
+
u-boot-img.bin: spl/u-boot-spl.bin u-boot.img FORCE
$(call if_changed,cat)
diff --git a/include/common.h b/include/common.h
index 8f4b2ec..406fb33 100644
--- a/include/common.h
+++ b/include/common.h
@@ -1010,6 +1010,13 @@ int cpu_release(int nr, int argc, char * const argv[]);
#define DEFINE_CACHE_ALIGN_BUFFER(type, name, size)\
DEFINE_ALIGN_BUFFER(type, name, size, ARCH_DMA_MINALIGN)
+/* Avoid using CONFIG_EFI_STUB directly as we may boot from other loaders */
+#ifdef CONFIG_EFI_STUB
+#define ll_boot_init() false
+#else
+#define ll_boot_init() true
+#endif
+
/* Pull in stuff for the build system */
#ifdef DO_DEPS_ONLY
# include environment.h
diff --git a/include/efi.h b/include/efi.h
index 66ef6c3..edc8cd9 100644
--- a/include/efi.h
+++ b/include/efi.h
@@ -268,11 +268,15 @@ struct efi_priv {
/* Base address of the EFI image */
extern char ImageBase[];
+/* Start and end of U-Boot image (for payload) */
+extern char __u_boot_bin_begin[], __u_boot_bin_end[];
+
/**
* efi_get_sys_table() - Get access to the main EFI system table
*
* @return pointer to EFI system table
*/
+
struct efi_system_table *efi_get_sys_table(void);
/**
diff --git a/lib/efi/Kconfig b/lib/efi/Kconfig
index 2b3dbd4..f1a8873 100644
--- a/lib/efi/Kconfig
+++ b/lib/efi/Kconfig
@@ -20,6 +20,11 @@ config ARCH_EFI
command problem and memory and I/O functions. Use 'reset' to return
to EFI.
+config EFI_STUB
+ bool Support running as an EFI payload
+
+endchoice
+
config EFI_RAM_SIZE
hex Amount of EFI RAM for U-Boot
depends on ARCH_EFI
@@ -30,4 +35,20 @@ config EFI_RAM_SIZE
other smaller amounts) and it can never be increased after that.
It is used as the RAM size in withU-Boot.
+choice
+ prompt EFI 32/64-bit selection
+ depends on EFI_STUB
+ help
+ EFI does not support mixing 32-bit and 64-bit modes. This is a
+ significant problem because it means that you must build a stub with
+ the correct type for EFI to load it correctly. If you are using
+ 32-bit EFI, select 32-bit here, else select 64-bit. Failure to do
+ this may produce no error message - it just won't start!
+
+config EFI_STUB_32BIT
+ bool Produce a stub for running with 32-bit EFI
+
+config EFI_STUB_64BIT
+ bool Produce a stub for running with
Re: [U-Boot] [PATCH 2/8] ARM: keystone2: Enable CONFIG_DISPLAY_CPUINFO
On 07/22/2015 11:39 AM, Lokesh Vutla wrote:
Add print_cpuinfo() function and enable
CONFIG_DISPLAY_CPUINFO for keystone platforms,
so that cpu info can be displayed during boot.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
---
arch/arm/mach-keystone/init.c| 24
include/configs/ti_armv7_keystone2.h | 1 +
2 files changed, 25 insertions(+)
diff --git a/arch/arm/mach-keystone/init.c b/arch/arm/mach-keystone/init.c
index c96845c..d742ad3 100644
--- a/arch/arm/mach-keystone/init.c
+++ b/arch/arm/mach-keystone/init.c
@@ -149,3 +149,27 @@ void enable_caches(void)
dcache_enable();
#endif
}
+
+#if defined(CONFIG_DISPLAY_CPUINFO)
+int print_cpuinfo(void)
+{
+ u16 cpu = get_part_number();
+
+ puts(CPU: );
+ switch (cpu) {
+ case CPU_66AK2Hx:
+ puts(66AK2Hx\n);
+ break;
+ case CPU_66AK2Lx:
+ puts(66AK2Lx\n);
+ break;
+ case CPU_66AK2Ex:
+ puts(66AK2Ex\n);
+ break;
+ default:
+ puts(Unknown\n);
+ }
+
+ return 0;
+}
+#endif
diff --git a/include/configs/ti_armv7_keystone2.h
b/include/configs/ti_armv7_keystone2.h
index 198e365..056b938 100644
--- a/include/configs/ti_armv7_keystone2.h
+++ b/include/configs/ti_armv7_keystone2.h
@@ -15,6 +15,7 @@
/* U-Boot Build Configuration */
#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is a 2nd stage loader */
#define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_DISPLAY_CPUINFO
/* SoC Configuration */
#define CONFIG_ARCH_CPU_INIT
Reviewed-by: Vitaly Andrianov vita...@ti.com
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[U-Boot] [PATCH 40/48] x86: Add support for passing tables into U-Boot
The EFI stub provides information to U-Boot in a table. This includes the
memory map which is needed to decide where to relocate U-Boot. Collect this
information in the early init code and store it in global_data.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/x86/cpu/start.S | 9 +
arch/x86/include/asm/global_data.h | 1 +
arch/x86/lib/asm-offsets.c | 1 +
3 files changed, 11 insertions(+)
diff --git a/arch/x86/cpu/start.S b/arch/x86/cpu/start.S
index 7ef8b88..356c1a5 100644
--- a/arch/x86/cpu/start.S
+++ b/arch/x86/cpu/start.S
@@ -53,6 +53,9 @@ _start:
/* Save BIST */
movl%eax, %ebp
+ /* Save table pointer */
+ movl%ecx, %esi
+
/* Load the segement registers to match the GDT loaded in start16.S */
movl$(X86_GDT_ENTRY_32BIT_DS * X86_GDT_ENTRY_SIZE), %eax
movw%ax, %fs
@@ -129,7 +132,13 @@ car_init_ret:
movl%esi, (%edx)
skip_hob:
+#else
+ /* Store table pointer */
+ movl%esp, %edx
+ addl$GD_TABLE, %edx
+ movl%esi, (%edx)
#endif
+
/* Setup first parameter to setup_gdt, pointer to global_data */
movl%esp, %eax
diff --git a/arch/x86/include/asm/global_data.h
b/arch/x86/include/asm/global_data.h
index 6df6a78..ca32046 100644
--- a/arch/x86/include/asm/global_data.h
+++ b/arch/x86/include/asm/global_data.h
@@ -69,6 +69,7 @@ struct arch_global_data {
char *mrc_output;
unsigned int mrc_output_len;
void *gdt; /* Global descriptor table */
+ ulong table;/* Table pointer from previous loader */
};
#endif
diff --git a/arch/x86/lib/asm-offsets.c b/arch/x86/lib/asm-offsets.c
index 70ccf1b..9da04dd 100644
--- a/arch/x86/lib/asm-offsets.c
+++ b/arch/x86/lib/asm-offsets.c
@@ -21,5 +21,6 @@ int main(void)
#ifdef CONFIG_HAVE_FSP
DEFINE(GD_HOB_LIST, offsetof(gd_t, arch.hob_list));
#endif
+ DEFINE(GD_TABLE, offsetof(gd_t, arch.table));
return 0;
}
--
2.4.3.573.g4eafbef
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Re: [U-Boot] [PATCH V3 3/8] configs: rename ks2_evm into ti_armv7_keystone2
On 07/18/2015 12:40 PM, Nishanth Menon wrote:
rename the keystone2 common header into an keystone2 architecture
specific header which can then reuse the common ti_armv7 config headers.
Acked-by: Vitaly Andrianov vita...@ti.com
Acked-By: Murali Karicheri m-kariche...@ti.com
Signed-off-by: Nishanth Menon n...@ti.com
---
V3: picked up acks, no change.
V2: https://patchwork.ozlabs.org/patch/496822/ (no change)
V1: https://patchwork.ozlabs.org/patch/496728/
include/configs/k2e_evm.h | 2 +-
include/configs/k2hk_evm.h | 2 +-
include/configs/k2l_evm.h | 2 +-
include/configs/{ks2_evm.h = ti_armv7_keystone2.h} | 0
4 files changed, 3 insertions(+), 3 deletions(-)
rename include/configs/{ks2_evm.h = ti_armv7_keystone2.h} (100%)
diff --git a/include/configs/k2e_evm.h b/include/configs/k2e_evm.h
index a28ceb7064a7..ac50a01b2980 100644
--- a/include/configs/k2e_evm.h
+++ b/include/configs/k2e_evm.h
@@ -27,7 +27,7 @@
name_uboot=u-boot-spi-k2e-evm.gph\0 \
name_fs=arago-console-image-k2e-evm.cpio.gz\0
-#include configs/ks2_evm.h
+#include configs/ti_armv7_keystone2.h
/* SPL SPI Loader Configuration */
#define CONFIG_SPL_TEXT_BASE 0x0c10
diff --git a/include/configs/k2hk_evm.h b/include/configs/k2hk_evm.h
index eae772178338..29e3403aa082 100644
--- a/include/configs/k2hk_evm.h
+++ b/include/configs/k2hk_evm.h
@@ -27,7 +27,7 @@
name_uboot=u-boot-spi-k2hk-evm.gph\0\
name_fs=arago-console-image-k2hk-evm.cpio.gz\0
-#include configs/ks2_evm.h
+#include configs/ti_armv7_keystone2.h
/* SPL SPI Loader Configuration */
#define CONFIG_SPL_TEXT_BASE 0x0c20
diff --git a/include/configs/k2l_evm.h b/include/configs/k2l_evm.h
index 57da0579255a..50d5c991a0bb 100644
--- a/include/configs/k2l_evm.h
+++ b/include/configs/k2l_evm.h
@@ -27,7 +27,7 @@
name_uboot=u-boot-spi-k2l-evm.gph\0 \
name_fs=arago-console-image-k2l-evm.cpio.gz\0
-#include configs/ks2_evm.h
+#include configs/ti_armv7_keystone2.h
/* SPL SPI Loader Configuration */
#define CONFIG_SPL_TEXT_BASE 0x0c10
diff --git a/include/configs/ks2_evm.h b/include/configs/ti_armv7_keystone2.h
similarity index 100%
rename from include/configs/ks2_evm.h
rename to include/configs/ti_armv7_keystone2.h
Reviewed-by: Murali Karicheri m-kariche...@ti.com
--
Murali Karicheri
Linux Kernel, Keystone
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[U-Boot] [PATCH 25/48] x86: Add support for U-Boot as an EFI application
From: Ben Stoltz sto...@google.com
Add the required x86 glue code. This includes the initial start-up,
relocation and jumping to efi_main(). We also need to avoid fiddling with
interrupts.
Signed-off-by: Ben Stoltz sto...@google.com
Signed-off-by: Simon Glass s...@chromium.org
---
arch/x86/Kconfig | 3 ++
arch/x86/Makefile| 2 +
arch/x86/cpu/Makefile| 1 +
arch/x86/cpu/efi/Makefile| 8 +++
arch/x86/cpu/efi/efi.c | 49 ++
arch/x86/cpu/efi/elf_ia32_efi.lds| 92 ++
arch/x86/cpu/efi/sdram.c | 29 +++
arch/x86/cpu/interrupts.c| 2 +
arch/x86/include/asm/arch-efi/gpio.h | 10
arch/x86/lib/Makefile| 6 +++
arch/x86/lib/crt0-efi-ia32.S | 77 +
arch/x86/lib/crt0-efi-x86_64.S | 77 +
arch/x86/lib/reloc_ia32.c| 96
13 files changed, 452 insertions(+)
create mode 100644 arch/x86/cpu/efi/Makefile
create mode 100644 arch/x86/cpu/efi/efi.c
create mode 100644 arch/x86/cpu/efi/elf_ia32_efi.lds
create mode 100644 arch/x86/cpu/efi/sdram.c
create mode 100644 arch/x86/include/asm/arch-efi/gpio.h
create mode 100644 arch/x86/lib/crt0-efi-ia32.S
create mode 100644 arch/x86/lib/crt0-efi-x86_64.S
create mode 100644 arch/x86/lib/reloc_ia32.c
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index e8968a7..7e6e89c 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -11,6 +11,9 @@ choice
config VENDOR_COREBOOT
bool coreboot
+config VENDOR_EFI
+ bool efi
+
config VENDOR_EMULATION
bool emulation
diff --git a/arch/x86/Makefile b/arch/x86/Makefile
index 36a6018..e842015 100644
--- a/arch/x86/Makefile
+++ b/arch/x86/Makefile
@@ -2,7 +2,9 @@
# SPDX-License-Identifier: GPL-2.0+
#
+ifeq ($(CONFIG_ARCH_EFI),)
head-y := arch/x86/cpu/start.o
+endif
ifeq ($(CONFIG_SPL_BUILD),y)
head-y += arch/x86/cpu/start16.o
head-y += arch/x86/cpu/resetvec.o
diff --git a/arch/x86/cpu/Makefile b/arch/x86/cpu/Makefile
index 8a8e63e..9678976 100644
--- a/arch/x86/cpu/Makefile
+++ b/arch/x86/cpu/Makefile
@@ -14,6 +14,7 @@ obj-y += interrupts.o cpu.o cpu_x86.o call64.o
obj-$(CONFIG_INTEL_BAYTRAIL) += baytrail/
obj-$(CONFIG_SYS_COREBOOT) += coreboot/
+obj-$(CONFIG_ARCH_EFI) += efi/
obj-$(CONFIG_QEMU) += qemu/
obj-$(CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE) += ivybridge/
obj-$(CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE) += ivybridge/
diff --git a/arch/x86/cpu/efi/Makefile b/arch/x86/cpu/efi/Makefile
new file mode 100644
index 000..e091637
--- /dev/null
+++ b/arch/x86/cpu/efi/Makefile
@@ -0,0 +1,8 @@
+#
+# Copyright (c) 2015 Google, Inc
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += efi.o
+obj-y += sdram.o
diff --git a/arch/x86/cpu/efi/efi.c b/arch/x86/cpu/efi/efi.c
new file mode 100644
index 000..0b1c54e
--- /dev/null
+++ b/arch/x86/cpu/efi/efi.c
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2015 Google, Inc
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include fdtdec.h
+#include netdev.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int arch_cpu_init(void)
+{
+#ifdef CONFIG_SYS_X86_TSC_TIMER
+ timer_set_base(rdtsc());
+#endif
+
+ return 0;
+}
+
+int board_early_init_f(void)
+{
+ return 0;
+}
+
+int print_cpuinfo(void)
+{
+ return default_print_cpuinfo();
+}
+
+int board_eth_init(bd_t *bis)
+{
+ return pci_eth_init(bis);
+}
+
+void board_final_cleanup(void)
+{
+}
+
+int misc_init_r(void)
+{
+ return 0;
+}
+
+int arch_misc_init(void)
+{
+ return 0;
+}
diff --git a/arch/x86/cpu/efi/elf_ia32_efi.lds
b/arch/x86/cpu/efi/elf_ia32_efi.lds
new file mode 100644
index 000..fca008b
--- /dev/null
+++ b/arch/x86/cpu/efi/elf_ia32_efi.lds
@@ -0,0 +1,92 @@
+/*
+ * U-Boot EFI link script
+ *
+ * SPDX-License-Identifier:bsd-2-clause
+ *
+ * Modified from usr/lib32/elf_ia32_efi.lds in gnu-efi
+ */
+
+#include config.h
+
+OUTPUT_FORMAT(elf32-i386, elf32-i386, elf32-i386)
+OUTPUT_ARCH(i386)
+ENTRY(_start)
+SECTIONS
+{
+ ImageBase = .;
+ .hash : { *(.hash) }/* this MUST come first! */
+ . = ALIGN(4096);
+ .text :
+ {
+ *(.text)
+ *(.text.*)
+ *(.gnu.linkonce.t.*)
+ }
+ . = ALIGN(4096);
+ .sdata :
+ {
+ *(.got.plt)
+ *(.got)
+ *(.srodata)
+ *(.sdata)
+ *(.sbss)
+ *(.scommon)
+ }
+ . = ALIGN(4096);
+ .data :
+ {
+ *(.rodata*)
+ *(.data)
+ *(.data1)
+ *(.data.*)
+ *(.sdata)
+ *(.got.plt)
+ *(.got)
+ /*
+* the EFI loader doesn't seem to like a .bss section, so we
+* stick it all into .data:
+*/
+
[U-Boot] [PATCH 19/48] efi: Display the correct initcall pre-relocation values
With EFI the start address of U-Boot is specified differently. We could consider just setting GD_FLG_RELOC and then setting up reloc_off. But that flag has other implementations and we are not able to use U-Boot relocation which this flag implies. Instead, just add a special case for EFI. Signed-off-by: Simon Glass s...@chromium.org --- lib/initcall.c | 4 1 file changed, 4 insertions(+) diff --git a/lib/initcall.c b/lib/initcall.c index 7142744..1931655 100644 --- a/lib/initcall.c +++ b/lib/initcall.c @@ -6,6 +6,7 @@ #include common.h #include initcall.h +#include efi.h DECLARE_GLOBAL_DATA_PTR; @@ -19,6 +20,9 @@ int initcall_run_list(const init_fnc_t init_sequence[]) if (gd-flags GD_FLG_RELOC) reloc_ofs = gd-reloc_off; +#ifdef CONFIG_ARCH_EFI + reloc_ofs = (unsigned long)ImageBase; +#endif debug(initcall: %p, (char *)*init_fnc_ptr - reloc_ofs); if (gd-flags GD_FLG_RELOC) debug( (relocated to %p)\n, (char *)*init_fnc_ptr); -- 2.4.3.573.g4eafbef ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 31/48] x86: Add definitions for the x86-efi board and plumb it in
From: Ben Stoltz sto...@google.com Add configuration and Kconfig changes for this board. Signed-off-by: Ben Stoltz sto...@google.com Signed-off-by: Simon Glass s...@chromium.org --- configs/efi-x86_defconfig | 16 include/configs/efi-x86.h | 37 + 2 files changed, 53 insertions(+) create mode 100644 configs/efi-x86_defconfig create mode 100644 include/configs/efi-x86.h diff --git a/configs/efi-x86_defconfig b/configs/efi-x86_defconfig new file mode 100644 index 000..f07305c --- /dev/null +++ b/configs/efi-x86_defconfig @@ -0,0 +1,16 @@ +CONFIG_X86=y +CONFIG_VENDOR_EFI=y +CONFIG_TARGET_EFI=y +CONFIG_TSC_CALIBRATION_BYPASS=y +CONFIG_OF_CONTROL=y +CONFIG_OF_EMBED=y +CONFIG_DM_PCI=y +CONFIG_DEFAULT_DEVICE_TREE=efi +CONFIG_EFI=y +CONFIG_ARCH_EFI=y +CONFIG_DEBUG_UART=y +CONFIG_DEBUG_UART_EFI=y +CONFIG_DEBUG_UART_BASE=0 +CONFIG_DEBUG_UART_CLOCK=0 +# CONFIG_CMD_NET is not set +# CONFIG_CMD_BOOTM is not set diff --git a/include/configs/efi-x86.h b/include/configs/efi-x86.h new file mode 100644 index 000..9ffc2ea --- /dev/null +++ b/include/configs/efi-x86.h @@ -0,0 +1,37 @@ +/* + * Copyright (c) 2015 Google, Inc + * + * SPDX-License-Identifier:GPL-2.0+ + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include configs/x86-common.h + +#undef CONFIG_CMD_SF_TEST + +#undef CONFIG_TPM +#undef CONFIG_TPM_TIS_LPC +#undef CONFIG_TPM_TIS_BASE_ADDRESS + +#undef CONFIG_CMD_IMLS + +#define CONFIG_SYS_EARLY_PCI_INIT +#define CONFIG_PCI_PNP + +#undef CONFIG_SYS_NS16550 +#undef CONFIG_X86_SERIAL +#undef CONFIG_ENV_IS_IN_SPI_FLASH +#define CONFIG_ENV_IS_NOWHERE +#undef CONFIG_VIDEO +#undef CONFIG_CFB_CONSOLE +#undef CONFIG_SCSI_AHCI +#undef CONFIG_CMD_SCSI +#undef CONFIG_INTEL_ICH6_GPIO + +#define CONFIG_STD_DEVICES_SETTINGS stdin=usbkbd,vga,serial\0 \ + stdout=vga,serial\0 \ + stderr=vga,serial\0 + +#endif -- 2.4.3.573.g4eafbef ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 29/48] x86: Allow relocation code to build without text base
This code currently requires CONFIG_SYS_TEXT_BASE but this should be
unnecessary. As a first step, remove the build-time limitation and report an
error instead.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/x86/lib/relocate.c | 17 +++--
1 file changed, 11 insertions(+), 6 deletions(-)
diff --git a/arch/x86/lib/relocate.c b/arch/x86/lib/relocate.c
index 0839f59..79c1af3 100644
--- a/arch/x86/lib/relocate.c
+++ b/arch/x86/lib/relocate.c
@@ -56,6 +56,7 @@ int do_elf_reloc_fixups(void)
Elf32_Addr *offset_ptr_rom, *last_offset = NULL;
Elf32_Addr *offset_ptr_ram;
+ unsigned int text_base;
/* The size of the region of u-boot that runs out of RAM. */
uintptr_t size = (uintptr_t)__bss_end - (uintptr_t)__text_start;
@@ -65,29 +66,33 @@ int do_elf_reloc_fixups(void)
if (re_src == re_end)
panic(No relocation data);
+#ifdef CONFIG_SYS_TEXT_BASE
+ text_base = CONFIG_SYS_TEXT_BASE;
+#else
+ panic(No CONFIG_SYS_TEXT_BASE);
+#endif
do {
/* Get the location from the relocation entry */
offset_ptr_rom = (Elf32_Addr *)re_src-r_offset;
/* Check that the location of the relocation is in .text */
- if (offset_ptr_rom = (Elf32_Addr *)CONFIG_SYS_TEXT_BASE
- offset_ptr_rom last_offset) {
+ if (offset_ptr_rom = (Elf32_Addr *)text_base
+ offset_ptr_rom last_offset) {
/* Switch to the in-RAM version */
offset_ptr_ram = (Elf32_Addr *)((ulong)offset_ptr_rom +
gd-reloc_off);
/* Check that the target points into .text */
- if (*offset_ptr_ram = CONFIG_SYS_TEXT_BASE
- *offset_ptr_ram =
- (CONFIG_SYS_TEXT_BASE + size)) {
+ if (*offset_ptr_ram = text_base
+ *offset_ptr_ram = text_base + size) {
*offset_ptr_ram += gd-reloc_off;
} else {
debug( %p: rom reloc %x, ram %p, value %x,
limit % PRIXPTR \n, re_src,
re_src-r_offset, offset_ptr_ram,
*offset_ptr_ram,
- CONFIG_SYS_TEXT_BASE + size);
+ text_base + size);
}
} else {
debug( %p: rom reloc %x, last %p\n, re_src,
--
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[U-Boot] [PATCH 26/48] x86: Add EFI board code
From: Ben Stoltz sto...@google.com
Add support for the efi-x86 board, which supports running U-Boot as an
EFI 32-bit application.
Signed-off-by: Ben Stoltz sto...@google.com
Signed-off-by: Simon Glass s...@chromium.org
---
arch/x86/Kconfig | 1 +
board/efi/Kconfig | 19 +++
board/efi/efi-x86/Kconfig | 27 +++
board/efi/efi-x86/MAINTAINERS | 6 ++
board/efi/efi-x86/Makefile| 7 +++
board/efi/efi-x86/efi.c | 18 ++
6 files changed, 78 insertions(+)
create mode 100644 board/efi/Kconfig
create mode 100644 board/efi/efi-x86/Kconfig
create mode 100644 board/efi/efi-x86/MAINTAINERS
create mode 100644 board/efi/efi-x86/Makefile
create mode 100644 board/efi/efi-x86/efi.c
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 7e6e89c..f124d58 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -27,6 +27,7 @@ endchoice
# board-specific options below
source board/coreboot/Kconfig
+source board/efi/Kconfig
source board/emulation/Kconfig
source board/google/Kconfig
source board/intel/Kconfig
diff --git a/board/efi/Kconfig b/board/efi/Kconfig
new file mode 100644
index 000..6f86a48
--- /dev/null
+++ b/board/efi/Kconfig
@@ -0,0 +1,19 @@
+if VENDOR_EFI
+
+choice
+ prompt Mainboard model
+ optional
+
+config TARGET_EFI
+ bool efi
+ help
+ This target is used for running U-Boot on top of EFI. In
+ this case EFI does the early initialisation, and U-Boot
+ takes over once the RAM, video and CPU are fully running.
+ U-Boot is loaded as an application from EFI.
+
+endchoice
+
+source board/efi/efi-x86/Kconfig
+
+endif
diff --git a/board/efi/efi-x86/Kconfig b/board/efi/efi-x86/Kconfig
new file mode 100644
index 000..330eb65
--- /dev/null
+++ b/board/efi/efi-x86/Kconfig
@@ -0,0 +1,27 @@
+if TARGET_EFI
+
+config SYS_BOARD
+ default efi-x86
+
+config SYS_VENDOR
+ default efi
+
+config SYS_SOC
+ default efi
+
+config SYS_CONFIG_NAME
+default efi-x86
+
+config SYS_CAR_ADDR
+hex Board specific Cache-As-RAM (CAR) address
+default 0x0192
+help
+ This option specifies the board specific Cache-As-RAM (CAR) address.
+
+config SYS_CAR_SIZE
+hex Board specific Cache-As-RAM (CAR) size
+default 0x4000
+help
+ This option specifies the board specific Cache-As-RAM (CAR) size.
+
+endif
diff --git a/board/efi/efi-x86/MAINTAINERS b/board/efi/efi-x86/MAINTAINERS
new file mode 100644
index 000..755247c
--- /dev/null
+++ b/board/efi/efi-x86/MAINTAINERS
@@ -0,0 +1,6 @@
+EFI-X86 BOARD
+M: Simon Glass s...@chromium.org
+S: Maintained
+F: board/efi/efi-x86/
+F: include/configs/efi-x86.h
+F: configs/efi-x86_defconfig
diff --git a/board/efi/efi-x86/Makefile b/board/efi/efi-x86/Makefile
new file mode 100644
index 000..9b1e0bd
--- /dev/null
+++ b/board/efi/efi-x86/Makefile
@@ -0,0 +1,7 @@
+#
+# Copyright (c) 2015 Google, Inc
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += efi.o
diff --git a/board/efi/efi-x86/efi.c b/board/efi/efi-x86/efi.c
new file mode 100644
index 000..08958f9
--- /dev/null
+++ b/board/efi/efi-x86/efi.c
@@ -0,0 +1,18 @@
+/*
+ * Copyright (C) 2015 Google, Inc
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include asm/gpio.h
+
+int arch_early_init_r(void)
+{
+ return 0;
+}
+
+void setup_pch_gpios(u16 gpiobase, const struct pch_gpio_map *gpio)
+{
+ return;
+}
--
2.4.3.573.g4eafbef
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[U-Boot] [PATCH 30/48] x86: Set up tool chain flags for running as EFI application
From: Ben Stoltz sto...@google.com Adjust the tool chain flags to build U-Boot as a relocatable shared library, as required by EFI. Signed-off-by: Ben Stoltz sto...@google.com Signed-off-by: Simon Glass s...@chromium.org --- arch/x86/config.mk | 35 --- 1 file changed, 32 insertions(+), 3 deletions(-) diff --git a/arch/x86/config.mk b/arch/x86/config.mk index 999143e..bb0b254 100644 --- a/arch/x86/config.mk +++ b/arch/x86/config.mk @@ -8,19 +8,48 @@ CONFIG_STANDALONE_LOAD_ADDR ?= 0x4 PLATFORM_CPPFLAGS += -fno-strict-aliasing -PLATFORM_CPPFLAGS += -mregparm=3 PLATFORM_CPPFLAGS += -fomit-frame-pointer PF_CPPFLAGS_X86 := $(call cc-option, -fno-toplevel-reorder, \ $(call cc-option, -fno-unit-at-a-time)) \ $(call cc-option, -mpreferred-stack-boundary=2) + PLATFORM_CPPFLAGS += $(PF_CPPFLAGS_X86) PLATFORM_CPPFLAGS += -fno-dwarf2-cfi-asm PLATFORM_CPPFLAGS += -march=i386 -m32 PLATFORM_RELFLAGS += -ffunction-sections -fvisibility=hidden -PLATFORM_LDFLAGS += --emit-relocs -Bsymbolic -Bsymbolic-functions -m elf_i386 +PLATFORM_LDFLAGS += -Bsymbolic -Bsymbolic-functions -LDFLAGS_FINAL += --gc-sections -pie LDFLAGS_FINAL += --wrap=__divdi3 --wrap=__udivdi3 LDFLAGS_FINAL += --wrap=__moddi3 --wrap=__umoddi3 + +LDFLAGS_EFI := -Bsymbolic -Bsymbolic-functions -znocombreloc -shared \ + --no-undefined + +OBJCOPYFLAGS_EFI := -j .text -j .sdata -j .data -j .dynamic -j .dynsym \ + -j .rel -j .rela -j .reloc + +CFLAGS_NON_EFI := -mregparm=3 +CFLAGS_EFI := -fpic -fshort-wchar $(call cc-option, -mno-red-zone) + +EFIARCH=ia32 + +LDSCRIPT_EFI := $(srctree)/$(CPUDIR)/efi/elf_$(EFIARCH)_efi.lds +OBJCOPYFLAGS_EFI += --target=efi-app-$(EFIARCH) + +ifeq ($(CONFIG_ARCH_EFI),y) + +PLATFORM_CPPFLAGS += $(CFLAGS_EFI) +PLATFORM_LDFLAGS += -m elf_i386 +LDFLAGS_FINAL += -znocombreloc -shared +OBJCOPYFLAGS_EFI += --target=efi-app-$(EFIARCH) +LDSCRIPT := $(LDSCRIPT_EFI) + +else + +PLATFORM_CPPFLAGS += $(CFLAGS_NON_EFI) +PLATFORM_LDFLAGS += --emit-relocs -m elf_i386 +LDFLAGS_FINAL += --gc-sections -pie + +endif -- 2.4.3.573.g4eafbef ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 22/48] efi: Support building a u-boot.efi executable
Add support for building U-Boot as an EFI application with a .efi suffix. This can be loaded by EFI provided that EFI has the same bit width (32- or 64-bit) as U-Boot. This unfortunate limitation is imposed by EFI. Signed-off-by: Simon Glass s...@chromium.org --- Makefile | 5 + 1 file changed, 5 insertions(+) diff --git a/Makefile b/Makefile index e0218b3..91ebc2e 100644 --- a/Makefile +++ b/Makefile @@ -752,6 +752,7 @@ ifneq ($(CONFIG_SPL_TARGET),) ALL-$(CONFIG_SPL) += $(CONFIG_SPL_TARGET:%=%) endif ALL-$(CONFIG_REMAKE_ELF) += u-boot.elf +ALL-$(CONFIG_ARCH_EFI) += u-boot.efi ifneq ($(BUILD_ROM),) ALL-$(CONFIG_X86_RESET_VECTOR) += u-boot.rom @@ -1080,6 +1081,10 @@ u-boot-dtb-tegra.bin: u-boot-nodtb-tegra.bin dts/dt.dtb FORCE endif endif +OBJCOPYFLAGS_u-boot.efi := $(OBJCOPYFLAGS_EFI) +u-boot.efi: u-boot FORCE + $(call if_changed,zobjcopy) + u-boot-img.bin: spl/u-boot-spl.bin u-boot.img FORCE $(call if_changed,cat) -- 2.4.3.573.g4eafbef ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 17/48] efi: Avoid using non-existent text base
From: Ben Stoltz sto...@google.com
When U-Boot runs as an EFI application is does not have a definition of
CONFIG_SYS_TEXT_BASE. U-Boot is a relocatable application and the relocation
is done by EFI. U-Boot can be loaded at any address.
This is similar to how sandbox works. Adjust the early board init to deal
with this.
Signed-off-by: Ben Stoltz sto...@google.com
Signed-off-by: Simon Glass s...@chromium.org
---
common/board_f.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/common/board_f.c b/common/board_f.c
index 5e09c5f..ad5500f 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -144,7 +144,7 @@ static int init_baud_rate(void)
static int display_text_info(void)
{
-#ifndef CONFIG_SANDBOX
+#if !defined(CONFIG_SANDBOX) !defined(CONFIG_ARCH_EFI)
ulong bss_start, bss_end, text_base;
bss_start = (ulong)__bss_start;
@@ -267,7 +267,7 @@ static int setup_mon_len(void)
{
#if defined(__ARM__) || defined(__MICROBLAZE__)
gd-mon_len = (ulong)__bss_end - (ulong)_start;
-#elif defined(CONFIG_SANDBOX)
+#elif defined(CONFIG_SANDBOX) || defined(CONFIG_ARCH_EFI)
gd-mon_len = (ulong)_end - (ulong)_init;
#elif defined(CONFIG_BLACKFIN) || defined(CONFIG_NIOS2)
gd-mon_len = CONFIG_SYS_MONITOR_LEN;
@@ -975,7 +975,8 @@ void board_init_f(ulong boot_flags)
if (initcall_run_list(init_sequence_f))
hang();
-#if !defined(CONFIG_ARM) !defined(CONFIG_SANDBOX)
+#if !defined(CONFIG_ARM) !defined(CONFIG_SANDBOX) \
+ !defined(CONFIG_ARCH_EFI)
/* NOTREACHED - jump_to_copy() does not return */
hang();
#endif
--
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[U-Boot] [PATCH 13/48] x86: Add some missing global_data declarations in files that use gd
Some files use global_data but don't declare it. Fix this.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/x86/cpu/mp_init.c | 2 ++
arch/x86/lib/bootm.c | 2 ++
arch/x86/lib/fsp/fsp_common.c | 2 ++
arch/x86/lib/lpc-uclass.c | 2 ++
arch/x86/lib/pch-uclass.c | 2 ++
drivers/gpio/intel_ich6_gpio.c | 2 ++
6 files changed, 12 insertions(+)
diff --git a/arch/x86/cpu/mp_init.c b/arch/x86/cpu/mp_init.c
index e686b28..3294a50 100644
--- a/arch/x86/cpu/mp_init.c
+++ b/arch/x86/cpu/mp_init.c
@@ -24,6 +24,8 @@
#include dm/uclass-internal.h
#include linux/linkage.h
+DECLARE_GLOBAL_DATA_PTR;
+
/* Total CPUs include BSP */
static int num_cpus;
diff --git a/arch/x86/lib/bootm.c b/arch/x86/lib/bootm.c
index 86030cf..445ee6e 100644
--- a/arch/x86/lib/bootm.c
+++ b/arch/x86/lib/bootm.c
@@ -22,6 +22,8 @@
#include asm/arch/timestamp.h
#endif
+DECLARE_GLOBAL_DATA_PTR;
+
#define COMMAND_LINE_OFFSET 0x9000
/*
diff --git a/arch/x86/lib/fsp/fsp_common.c b/arch/x86/lib/fsp/fsp_common.c
index 5b25632..c585710 100644
--- a/arch/x86/lib/fsp/fsp_common.c
+++ b/arch/x86/lib/fsp/fsp_common.c
@@ -11,6 +11,8 @@
#include asm/processor.h
#include asm/fsp/fsp_support.h
+DECLARE_GLOBAL_DATA_PTR;
+
int print_cpuinfo(void)
{
post_code(POST_CPU_INFO);
diff --git a/arch/x86/lib/lpc-uclass.c b/arch/x86/lib/lpc-uclass.c
index 6aeb4d4..c6e8f73 100644
--- a/arch/x86/lib/lpc-uclass.c
+++ b/arch/x86/lib/lpc-uclass.c
@@ -9,6 +9,8 @@
#include dm.h
#include dm/root.h
+DECLARE_GLOBAL_DATA_PTR;
+
static int lpc_uclass_post_bind(struct udevice *bus)
{
/*
diff --git a/arch/x86/lib/pch-uclass.c b/arch/x86/lib/pch-uclass.c
index d1082e1..20dfa81 100644
--- a/arch/x86/lib/pch-uclass.c
+++ b/arch/x86/lib/pch-uclass.c
@@ -9,6 +9,8 @@
#include dm.h
#include dm/root.h
+DECLARE_GLOBAL_DATA_PTR;
+
static int pch_uclass_post_bind(struct udevice *bus)
{
/*
diff --git a/drivers/gpio/intel_ich6_gpio.c b/drivers/gpio/intel_ich6_gpio.c
index 8a108f3..cb408a4 100644
--- a/drivers/gpio/intel_ich6_gpio.c
+++ b/drivers/gpio/intel_ich6_gpio.c
@@ -35,6 +35,8 @@
#include asm/io.h
#include asm/pci.h
+DECLARE_GLOBAL_DATA_PTR;
+
#define GPIO_PER_BANK 32
struct ich6_bank_priv {
--
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[U-Boot] [PATCH 38/48] efi: Add 64-bit payload support
Most EFI implementations use 64-bit. Add a way to build U-Boot as a 64-bit
EFI payload. The payload unpacks a (32-bit) U-Boot and starts it. This can
be enabled for x86 boards at present.
Signed-off-by: Simon Glass s...@chromium.org
---
Makefile | 2 +-
arch/x86/config.mk | 11 +
arch/x86/include/asm/types.h | 5 +++-
lib/efi/efi_stub.c | 58
4 files changed, 69 insertions(+), 7 deletions(-)
diff --git a/Makefile b/Makefile
index 9f863e1..6e3edb4 100644
--- a/Makefile
+++ b/Makefile
@@ -1109,7 +1109,7 @@ u-boot-payload.lds: $(LDSCRIPT_EFI) FORCE
u-boot-payload: u-boot-dtb.bin.o u-boot-payload.lds \
FORCE
$(LD) $(LDFLAGS_EFI) -o $@ \
- -T u-boot-payload.lds \
+ -T u-boot-payload.lds arch/x86/cpu/call32.o \
lib/efi/efi.o lib/efi/efi_stub.o u-boot-dtb.bin.o \
$(addprefix arch/$(ARCH)/lib/,$(EFISTUB))
diff --git a/arch/x86/config.mk b/arch/x86/config.mk
index bb0b254..5107b43 100644
--- a/arch/x86/config.mk
+++ b/arch/x86/config.mk
@@ -15,7 +15,10 @@ PF_CPPFLAGS_X86 := $(call cc-option,
-fno-toplevel-reorder, \
PLATFORM_CPPFLAGS += $(PF_CPPFLAGS_X86)
PLATFORM_CPPFLAGS += -fno-dwarf2-cfi-asm
+
+ifeq ($(CONFIG_X86_64),)
PLATFORM_CPPFLAGS += -march=i386 -m32
+endif
PLATFORM_RELFLAGS += -ffunction-sections -fvisibility=hidden
@@ -33,11 +36,19 @@ OBJCOPYFLAGS_EFI := -j .text -j .sdata -j .data -j .dynamic
-j .dynsym \
CFLAGS_NON_EFI := -mregparm=3
CFLAGS_EFI := -fpic -fshort-wchar $(call cc-option, -mno-red-zone)
+ifeq ($(CONFIG_X86_64)$(CONFIG_EFI_STUB_64BIT),)
EFIARCH=ia32
+else
+EFIARCH=x86_64
+endif
LDSCRIPT_EFI := $(srctree)/$(CPUDIR)/efi/elf_$(EFIARCH)_efi.lds
+EFISTUB := crt0-efi-$(EFIARCH).o reloc_$(EFIARCH).o
OBJCOPYFLAGS_EFI += --target=efi-app-$(EFIARCH)
+CPPFLAGS_REMOVE_crt0-efi-$(EFIARCH).o += $(CFLAGS_NON_EFI)
+CPPFLAGS_crt0-efi-$(EFIARCH).o += $(CFLAGS_EFI)
+
ifeq ($(CONFIG_ARCH_EFI),y)
PLATFORM_CPPFLAGS += $(CFLAGS_EFI)
diff --git a/arch/x86/include/asm/types.h b/arch/x86/include/asm/types.h
index e272c90..766617f 100644
--- a/arch/x86/include/asm/types.h
+++ b/arch/x86/include/asm/types.h
@@ -44,8 +44,11 @@ typedef __INT64_TYPE__ s64;
typedef __UINT64_TYPE__ u64;
#endif
+#ifdef CONFIG_EFI_STUB_64BIT
+#define BITS_PER_LONG 64
+#else
#define BITS_PER_LONG 32
-
+#endif
/* Dma addresses are 32-bits wide. */
typedef u32 dma_addr_t;
diff --git a/lib/efi/efi_stub.c b/lib/efi/efi_stub.c
index e3b7cdb..36f14ff 100644
--- a/lib/efi/efi_stub.c
+++ b/lib/efi/efi_stub.c
@@ -6,8 +6,8 @@
* EFI information obtained here:
* http://wiki.phoenix.com/wiki/index.php/EFI_BOOT_SERVICES
*
- * Loads a payload (U-Boot) within the EFI environment. This is built as a
- * 32-bit EFI application.
+ * Loads a payload (U-Boot) within the EFI environment. This is built as an
+ * EFI application. It can be built either in 32-bit or 64-bit mode.
*/
#include common.h
@@ -116,12 +116,12 @@ void *memset(void *inptr, int ch, size_t size)
static void jump_to_uboot(ulong cs32, ulong addr, ulong info)
{
+#ifdef CONFIG_EFI_STUB_32BIT
typedef void (*func_t)(int bist, int unused, ulong info);
-#ifdef CONFIG_EFI_STUB_32BIT
((func_t)addr)(bist, 0, info);
#else
- /* TODO: Implement this */
+ cpu_call32(cs32, CONFIG_SYS_TEXT_BASE, info);
#endif
}
@@ -151,7 +151,55 @@ static int get_codeseg32(void)
{
int cs32 = 0;
- /* TODO(sjg): Implement this for 64-bit mode */
+#ifdef CONFIG_EFI_STUB_64BIT
+ struct desctab_info gdt;
+ uint64_t *ptr;
+ int i;
+
+ get_gdt(gdt);
+ for (ptr = (uint64_t *)(unsigned long)gdt.addr, i = 0; i gdt.limit;
+i += 8, ptr++) {
+ uint64_t desc = *ptr;
+
+ if ((desc GDT_PRESENT) (desc GDT_NOTSYS)
+ !(desc GDT_LONG) (desc GDT_4GB)
+ (desc GDT_32BIT) (desc GDT_CODE)) {
+ cs32 = i;
+ break;
+ }
+ }
+
+#ifdef DEBUG
+ puts(\ngdt: );
+ printhex8(gdt.limit);
+ puts(, addr: );
+ printhex8(gdt.addr 32);
+ printhex8(gdt.addr);
+ for (i = 0; i gdt.limit; i += 8) {
+ uint32_t *ptr = (uint32_t *)((unsigned long)gdt.addr + i);
+
+ puts(\n);
+ printhex2(i);
+ puts(: );
+ printhex8(ptr[1]);
+ puts( );
+ printhex8(ptr[0]);
+ }
+ puts(\n );
+ puts(32-bit code segment: );
+ printhex2(cs32);
+ puts(\n );
+
+ puts(page_table: );
+ printhex8(read_cr3());
+ puts(\n );
+#endif
+ if (!cs32) {
+ puts(Can't find 32-bit code segment\n);
+ return -ENOENT;
+ }
+#endif
+
return cs32;
}
--
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[U-Boot] [PATCH 41/48] efi: Add functions for decoding the EFI tables
The EFI stub can pass a table to U-Boot with information about the memory map
Potentially other things will follow. Add a way to access this table.
Signed-off-by: Simon Glass s...@chromium.org
---
lib/efi/Makefile | 1 +
lib/efi/efi_info.c | 47 +++
2 files changed, 48 insertions(+)
create mode 100644 lib/efi/efi_info.c
diff --git a/lib/efi/Makefile b/lib/efi/Makefile
index ba2824e..84bc5e3 100644
--- a/lib/efi/Makefile
+++ b/lib/efi/Makefile
@@ -5,6 +5,7 @@
#
obj-$(CONFIG_ARCH_EFI) += efi_app.o efi.o
+obj-$(CONFIG_EFI_STUB) += efi_info.o
CFLAGS_REMOVE_efi_stub.o := -mregparm=3 \
$(if $(CONFIG_EFI_STUB_64BIT),-march=i386 -m32)
diff --git a/lib/efi/efi_info.c b/lib/efi/efi_info.c
new file mode 100644
index 000..0cd9a7e
--- /dev/null
+++ b/lib/efi/efi_info.c
@@ -0,0 +1,47 @@
+/*
+ * Copyright (c) 2015 Google, Inc
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ *
+ * Access to the EFI information table
+ */
+
+#include common.h
+#include efi.h
+#include errno.h
+#include mapmem.h
+
+int efi_info_get(enum efi_entry_t type, void **datap, int *sizep)
+{
+ struct efi_entry_hdr *entry;
+ struct efi_info_hdr *info;
+ int ret;
+
+ if (!gd-arch.table)
+ return -ENODATA;
+
+ info = map_sysmem(gd-arch.table, 0);
+ if (info-version != EFI_TABLE_VERSION) {
+ ret = -EPROTONOSUPPORT;
+ goto err;
+ }
+
+ entry = (struct efi_entry_hdr *)((ulong)info + info-hdr_size);
+ while (entry-type != EFIET_END) {
+ if (entry-type == type) {
+ if (entry-addr)
+ *datap = map_sysmem(entry-addr, entry-size);
+ else
+ *datap = entry + 1;
+ *sizep = entry-size;
+ return 0;
+ }
+ entry = (struct efi_entry_hdr *)((ulong)entry + entry-link);
+ }
+
+ ret = -ENOENT;
+err:
+ unmap_sysmem(info);
+
+ return ret;
+}
--
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[U-Boot] [PATCH 42/48] efi: Add a command to display the memory map
The EFI memory map is passed from the stub to U-Boot in a table. Add a
command to display it in a vaguely readable fashion.
Signed-off-by: Simon Glass s...@chromium.org
---
common/Makefile | 1 +
common/cmd_efi.c | 258 +++
2 files changed, 259 insertions(+)
create mode 100644 common/cmd_efi.c
diff --git a/common/Makefile b/common/Makefile
index d6c1d48..6dc4c89 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -90,6 +90,7 @@ obj-$(CONFIG_CMD_DTT) += cmd_dtt.o
obj-$(CONFIG_CMD_ECHO) += cmd_echo.o
obj-$(CONFIG_ENV_IS_IN_EEPROM) += cmd_eeprom.o
obj-$(CONFIG_CMD_EEPROM) += cmd_eeprom.o
+obj-$(CONFIG_EFI_STUB) += cmd_efi.o
obj-$(CONFIG_CMD_ELF) += cmd_elf.o
obj-$(CONFIG_SYS_HUSH_PARSER) += cmd_exit.o
obj-$(CONFIG_CMD_EXT4) += cmd_ext4.o
diff --git a/common/cmd_efi.c b/common/cmd_efi.c
new file mode 100644
index 000..cc8758b
--- /dev/null
+++ b/common/cmd_efi.c
@@ -0,0 +1,258 @@
+/*
+ * (C) Copyright 2015 Google, Inc
+ * Written by Simon Glass s...@chromium.org
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include command.h
+#include efi.h
+#include errno.h
+#include malloc.h
+
+static const char *const type_name[] = {
+ reserved,
+ loader_code,
+ loader_data,
+ bs_code,
+ bs_data,
+ rt_code,
+ rt_data,
+ conv,
+ unusable,
+ acpi_reclaim,
+ acpi_nvs,
+ io,
+ io_port,
+ pal_code,
+};
+
+static struct attr_info {
+ int shift;
+ const char *name;
+} mem_attr[] = {
+ { EFI_MEMORY_UC_SHIFT, uncached },
+ { EFI_MEMORY_WC_SHIFT, write-coalescing },
+ { EFI_MEMORY_WT_SHIFT, write-through },
+ { EFI_MEMORY_WB_SHIFT, write-back },
+ { EFI_MEMORY_UCE_SHIFT, uncached exported },
+ { EFI_MEMORY_WP_SHIFT, write-protect },
+ { EFI_MEMORY_RP_SHIFT, read-protect },
+ { EFI_MEMORY_XP_SHIFT, execute-protect },
+ { EFI_MEMORY_RUNTIME_SHIFT, needs runtime mapping }
+};
+
+/* Maximum different attribute values we can track */
+#define ATTR_SEEN_MAX 30
+
+static inline bool is_boot_services(int type)
+{
+ return type == EFI_LOADER_CODE || type == EFI_LOADER_DATA ||
+ type == EFI_BOOT_SERVICES_CODE ||
+ type == EFI_BOOT_SERVICES_DATA;
+}
+
+static int h_cmp_entry(const void *v1, const void *v2)
+{
+ const struct efi_mem_desc *desc1 = v1;
+ const struct efi_mem_desc *desc2 = v2;
+ int64_t diff = desc1-physical_start - desc2-physical_start;
+
+ /*
+* Manually calculate the difference to avoid sign loss in the 64-bit
+* to 32-bit conversion
+*/
+ return diff 0 ? -1 : diff 0 ? 1 : 0;
+}
+
+void *efi_build_mem_table(struct efi_entry_memmap *map, int size, bool skip_bs)
+{
+ struct efi_mem_desc *desc, *end, *base, *dest, *prev;
+ int count;
+ u64 addr;
+
+ base = malloc(size + sizeof(*desc));
+ if (!base) {
+ debug(%s: Cannot allocate %#x bytes\n, __func__, size);
+ return NULL;
+ }
+ end = (struct efi_mem_desc *)((ulong)map + size);
+ count = ((ulong)end - (ulong)map-desc) / map-desc_size;
+ memcpy(base, map-desc, (ulong)end - (ulong)map-desc);
+ qsort(base, count, map-desc_size, h_cmp_entry);
+ prev = NULL;
+ addr = 0;
+ dest = base;
+ end = base + count;
+ for (desc = base; desc end; desc = efi_get_next_mem_desc(map, desc)) {
+ bool merge = true;
+ int type = desc-type;
+
+ if (skip_bs is_boot_services(desc-type))
+ type = EFI_CONVENTIONAL_MEMORY;
+
+ memcpy(dest, desc, map-desc_size);
+ dest-type = type;
+ if (!skip_bs || !prev)
+ merge = false;
+ else if (desc-physical_start != addr)
+ merge = false;
+ else if (type != EFI_CONVENTIONAL_MEMORY)
+ merge = false;
+ else if (prev-type != EFI_CONVENTIONAL_MEMORY)
+ merge = false;
+
+ if (merge) {
+ prev-num_pages += desc-num_pages;
+ } else {
+ prev = dest;
+ dest = efi_get_next_mem_desc(map, dest);
+ }
+ addr = desc-physical_start + (desc-num_pages
+ EFI_PAGE_SHIFT);
+ }
+
+ /* Mark the end */
+ dest-type = EFI_TABLE_END;
+
+ return base;
+}
+
+static void efi_print_mem_table(struct efi_entry_memmap *map,
+ struct efi_mem_desc *desc, bool skip_bs)
+{
+ u64 attr_seen[ATTR_SEEN_MAX];
+ int attr_seen_count;
+ int upto, i;
+ u64 addr;
+
+ printf(# %-14s %10s %10s %10s %s\n, Type, Physical,
+ Virtual, Size, Attributes);
+
+ /* Keep track of all the
[U-Boot] [PATCH 23/48] x86: Support skipping relocation for EFI
When running as an EFI application we must skip relocation. Add support for
this in the x86 relocation code.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/x86/lib/relocate.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/arch/x86/lib/relocate.c b/arch/x86/lib/relocate.c
index 1a62142..0839f59 100644
--- a/arch/x86/lib/relocate.c
+++ b/arch/x86/lib/relocate.c
@@ -28,7 +28,8 @@ int copy_uboot_to_ram(void)
{
size_t len = (size_t)__data_end - (size_t)__text_start;
- memcpy((void *)gd-relocaddr, (void *)__text_start, len);
+ if (!(gd-flags GD_FLG_SKIP_RELOC))
+ memcpy((void *)gd-relocaddr, (void *)__text_start, len);
return 0;
}
@@ -38,7 +39,8 @@ int clear_bss(void)
ulong dst_addr = (ulong)__bss_start + gd-reloc_off;
size_t len = (size_t)__bss_end - (size_t)__bss_start;
- memset((void *)dst_addr, 0x00, len);
+ if (!(gd-flags GD_FLG_SKIP_RELOC))
+ memset((void *)dst_addr, 0x00, len);
return 0;
}
@@ -58,6 +60,8 @@ int do_elf_reloc_fixups(void)
/* The size of the region of u-boot that runs out of RAM. */
uintptr_t size = (uintptr_t)__bss_end - (uintptr_t)__text_start;
+ if (gd-flags GD_FLG_SKIP_RELOC)
+ return 0;
if (re_src == re_end)
panic(No relocation data);
--
2.4.3.573.g4eafbef
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[U-Boot] [PATCH 27/48] x86: dts: Add a device tree file for EFI
This contains just enough to bring up the serial UART.
Signed-off-by: Simon Glass s...@chromium.org
---
arch/x86/dts/Makefile | 1 +
arch/x86/dts/efi.dts | 22 ++
2 files changed, 23 insertions(+)
create mode 100644 arch/x86/dts/efi.dts
diff --git a/arch/x86/dts/Makefile b/arch/x86/dts/Makefile
index f86514c..53d0a04 100644
--- a/arch/x86/dts/Makefile
+++ b/arch/x86/dts/Makefile
@@ -1,6 +1,7 @@
dtb-y += chromebook_link.dtb \
chromebox_panther.dtb \
crownbay.dtb \
+ efi.dtb \
galileo.dtb \
minnowmax.dtb \
qemu-x86_i440fx.dtb \
diff --git a/arch/x86/dts/efi.dts b/arch/x86/dts/efi.dts
new file mode 100644
index 000..a6a5d38
--- /dev/null
+++ b/arch/x86/dts/efi.dts
@@ -0,0 +1,22 @@
+/*
++ * Copyright (c) 2015 Google, Inc
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+/dts-v1/;
+
+/include/ skeleton.dtsi
+
+/ {
+ model = EFI;
+ compatible = efi,payload;
+
+ chosen {
+ stdout-path = serial;
+ };
+
+ serial: serial {
+ compatible = efi,uart;
+ };
+};
--
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[U-Boot] [PATCH 00/48] Add support for running U-Boot as an EFI payload/application
This series allows U-Boot to be built as an EFI payload so that U-Boot can be started on almost any x86 platform that supports EFI. This is implemented as a stub which EFI can load plus a payload that is copied to RAM. The payload contains a normal U-Boot binary image and device tree. This allows U-Boot to run on platforms that have EFI support but are not supported natively by U-Boot. It also allows testing and fiddling with the board using U-Boots memory display and other commands. In addition, U-Boot can be built as an EFI application. This should work regardless of the board type since it only relies on EFI services. However only 32-bit EFI is supported in this case. Again it can be used to snoop around the platform. A README provides further details of how this series operates. Ben Stoltz (6): efi: Avoid using non-existent text base efi: Drop CONFIG_SYS_TEXT_BASE for EFI x86: Add support for U-Boot as an EFI application x86: Add EFI board code x86: Set up tool chain flags for running as EFI application x86: Add definitions for the x86-efi board and plumb it in Simon Glass (42): Support removing default assembler flags dm: core: Check for empty list in uclass_find_device() dm: serial: Correct logic in serial_find_console_or_panic() elf: Add a few definitions for 64-bit relocation Add a way to skip relocation Allow objcopy to work without filling gaps with 0xff Bring in __aligned_u64 and friends to linux/types.h x86: Add various minor tidy-ups to the 32-bit startup code x86: Use CR0 constants in CPU init x86: Tidy up global_data flags x86: Drop unused copy_fdt_to_ram() x86: Tidy up the 64-bit calling code x86: Add some missing global_data declarations in files that use gd x86: Tidy up a few minor issues with interrupts pci: Use debug() instead of DEBUGF() in pci_auto.c pci: Fix up code for CONFIG_PCI_ENUM_ONLY efi: Add start-up library code efi: Display the correct initcall pre-relocation values efi: Add a serial driver efi: Support building a u-boot.efi executable x86: Support skipping relocation for EFI x86: Add asm/elf.h for x86-specific ELF definitions x86: dts: Add a device tree file for EFI x86: Allow use of global_data with EFI x86: Allow relocation code to build without text base x86: Add a link script entry for U-Boot as a payload x86: Add relocation and link script for a 64-bit EFI application efi: Add support for loading U-Boot through an EFI stub x86: Support building the EFI stub x86: Add an enum for some commonly-used GDT bits x86: Add a way to call 32-bit code from 64-bit mode efi: Add 64-bit payload support x86: Add Makefile settings for EFI build x86: Add support for passing tables into U-Boot efi: Add functions for decoding the EFI tables efi: Add a command to display the memory map x86: Handle running as EFI payload x86: Add helper code for running from EFI x86: baytrail: Support operation as an EFI payload x86: qemu: Support operation as an EFI payload x86: Gracefully disable the vesa driver when running from EFI efi: Add a README to explain how things work Kconfig | 1 + Makefile | 45 - arch/x86/Kconfig | 20 ++ arch/x86/Makefile| 2 + arch/x86/config.mk | 46 - arch/x86/cpu/Makefile| 7 + arch/x86/cpu/baytrail/Kconfig| 2 +- arch/x86/cpu/baytrail/cpu.c | 2 + arch/x86/cpu/baytrail/valleyview.c | 2 + arch/x86/cpu/call32.S| 65 +++ arch/x86/cpu/call64.S| 4 +- arch/x86/cpu/cpu.c | 23 ++- arch/x86/cpu/efi/Makefile| 8 + arch/x86/cpu/efi/efi.c | 49 + arch/x86/cpu/efi/elf_ia32_efi.lds| 95 + arch/x86/cpu/efi/elf_x86_64_efi.lds | 87 + arch/x86/cpu/efi/sdram.c | 29 +++ arch/x86/cpu/interrupts.c| 21 +- arch/x86/cpu/mp_init.c | 2 + arch/x86/cpu/qemu/Makefile | 5 +- arch/x86/cpu/qemu/qemu.c | 2 + arch/x86/cpu/start.S | 55 -- arch/x86/dts/Makefile| 1 + arch/x86/dts/efi.dts | 22 +++ arch/x86/include/asm/arch-efi/gpio.h | 10 + arch/x86/include/asm/cpu.h | 19 ++ arch/x86/include/asm/elf.h | 50 + arch/x86/include/asm/fsp/fsp_hob.h | 59 +- arch/x86/include/asm/global_data.h | 16 +- arch/x86/include/asm/relocate.h | 1 - arch/x86/include/asm/types.h | 5 +- arch/x86/lib/Makefile| 23 ++- arch/x86/lib/asm-offsets.c | 1 + arch/x86/lib/bootm.c | 4 + arch/x86/lib/crt0-efi-ia32.S | 77 arch/x86/lib/crt0-efi-x86_64.S | 77 arch/x86/lib/efi/Makefile| 9 + arch/x86/lib/efi/car.S | 12 ++ arch/x86/lib/efi/efi.c
Re: [U-Boot] [PATCH V3 5/8] configs: ti_armv7_keystone2: switch addresses to generic addresses
On 07/18/2015 12:40 PM, Nishanth Menon wrote:
Use the defaults defined in DEFAULT_LINUX_BOOT_ENV
Signed-off-by: Nishanth Menon n...@ti.com
---
new patch based on review comments on https://patchwork.ozlabs.org/patch/496823/
include/configs/ti_armv7_keystone2.h | 22 +-
1 file changed, 9 insertions(+), 13 deletions(-)
diff --git a/include/configs/ti_armv7_keystone2.h
b/include/configs/ti_armv7_keystone2.h
index 0e67cf0ebd75..ddc2e23f1370 100644
--- a/include/configs/ti_armv7_keystone2.h
+++ b/include/configs/ti_armv7_keystone2.h
@@ -212,30 +212,26 @@
#define CONFIG_BOOTFILE uImage
#define CONFIG_EXTRA_ENV_SETTINGS \
+ DEFAULT_LINUX_BOOT_ENV \
CONFIG_EXTRA_ENV_KS2_BOARD_SETTINGS \
boot=ubi\0 \
tftp_root=/\0 \
nfs_root=/export\0 \
mem_lpae=1\0\
mem_reserve=512M\0 \
- addr_fdt=0x8700\0 \
- addr_kern=0x8800\0 \
- addr_uboot=0x8700\0 \
- addr_fs=0x8200\0\
addr_ubi=0x8200\0 \
addr_secdb_key=0xc00\0 \
- fdt_high=0x\0 \
name_kern=uImage-keystone-evm.bin\0 \
run_mon=mon_install ${addr_mon}\0 \
- run_kern=bootm ${addr_kern} - ${addr_fdt}\0 \
+ run_kern=bootm ${loadaddr} - ${fdtaddr}\0 \
init_net=run args_all args_net\0\
init_ubi=run args_all args_ubi; \
ubi part ubifs; ubifsmount ubi:boot;\
ubifsload ${addr_secdb_key} securedb.key.bin;\0 \
- get_fdt_net=dhcp ${addr_fdt} ${tftp_root}/${name_fdt}\0 \
- get_fdt_ubi=ubifsload ${addr_fdt} ${name_fdt}\0 \
- get_kern_net=dhcp ${addr_kern} ${tftp_root}/${name_kern}\0 \
- get_kern_ubi=ubifsload ${addr_kern} ${name_kern}\0 \
+ get_fdt_net=dhcp ${fdtaddr} ${tftp_root}/${name_fdt}\0 \
+ get_fdt_ubi=ubifsload ${fdtaddr} ${name_fdt}\0 \
+ get_kern_net=dhcp ${loadaddr} ${tftp_root}/${name_kern}\0 \
+ get_kern_ubi=ubifsload ${loadaddr} ${name_kern}\0 \
get_mon_net=dhcp ${addr_mon} ${tftp_root}/${name_mon}\0 \
get_mon_ubi=ubifsload ${addr_mon} ${name_mon}\0 \
get_uboot_net=dhcp ${addr_uboot} ${tftp_root}/${name_uboot}\0 \
@@ -248,10 +244,10 @@
root=/dev/nfs rw nfsroot=${serverip}:${nfs_root}, \
${nfs_options} ip=dhcp\0\
nfs_options=v3,tcp,rsize=4096,wsize=4096\0 \
- get_fdt_ramfs=dhcp ${addr_fdt} ${tftp_root}/${name_fdt}\0 \
- get_kern_ramfs=dhcp ${addr_kern} ${tftp_root}/${name_kern}\0\
+ get_fdt_ramfs=dhcp ${fdtaddr} ${tftp_root}/${name_fdt}\0\
+ get_kern_ramfs=dhcp ${loadaddr} ${tftp_root}/${name_kern}\0 \
get_mon_ramfs=dhcp ${addr_mon} ${tftp_root}/${name_mon}\0 \
- get_fs_ramfs=dhcp ${addr_fs} ${tftp_root}/${name_fs}\0 \
+ get_fs_ramfs=dhcp ${rdaddr} ${tftp_root}/${name_fs}\0 \
get_ubi_net=dhcp ${addr_ubi} ${tftp_root}/${name_ubi}\0 \
burn_ubi=nand erase.part ubifs; \
nand write ${addr_ubi} ubifs ${filesize}\0 \
Reviewed-by: Murali Karicheri m-kariche...@ti.com
--
Murali Karicheri
Linux Kernel, Keystone
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Re: [U-Boot] [PATCH V3 8/8] configs: keystone2: remove distro specific ramdisk name
On Sat, Jul 18, 2015 at 11:40:36AM -0500, Nishanth Menon wrote: u-boot should support multiple distros as necessary. So, DONOT hardcode distro specific image name in package. Instead we use a generic ramdisk.gz as image name which can be modified by distro specific logic. Signed-off-by: Nishanth Menon n...@ti.com Instead of trying to whack this stuff to be more generic lets just punt on it and drop when moving to config_distro_bootcmd.h -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 01/19] ARM: zynq: DT: Use the right names for nodes
Based on SPEC you right names with addresses.
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
Sync with the kernel
---
arch/arm/dts/zynq-7000.dtsi | 20 ++--
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/arch/arm/dts/zynq-7000.dtsi b/arch/arm/dts/zynq-7000.dtsi
index 920715989e95..6faac4044627 100644
--- a/arch/arm/dts/zynq-7000.dtsi
+++ b/arch/arm/dts/zynq-7000.dtsi
@@ -51,7 +51,7 @@
interrupt-parent = intc;
ranges;
- i2c0: zynq-i2c@e0004000 {
+ i2c0: i2c@e0004000 {
compatible = cdns,i2c-r1p10;
status = disabled;
clocks = clkc 38;
@@ -62,7 +62,7 @@
#size-cells = 0;
};
- i2c1: zynq-i2c@e0005000 {
+ i2c1: i2c@e0005000 {
compatible = cdns,i2c-r1p10;
status = disabled;
clocks = clkc 39;
@@ -82,7 +82,7 @@
0xF8F00100 0x100;
};
- L2: cache-controller {
+ L2: cache-controller@f8f02000 {
compatible = arm,pl310-cache;
reg = 0xF8F02000 0x1000;
arm,data-latency = 3 2 2;
@@ -91,7 +91,7 @@
cache-level = 2;
};
- uart0: uart@e000 {
+ uart0: serial@e000 {
compatible = xlnx,xuartps;
status = disabled;
clocks = clkc 23, clkc 40;
@@ -100,7 +100,7 @@
interrupts = 0 27 4;
};
- uart1: uart@e0001000 {
+ uart1: serial@e0001000 {
compatible = xlnx,xuartps;
status = disabled;
clocks = clkc 24, clkc 41;
@@ -153,7 +153,7 @@
clock-names = pclk, hclk, tx_clk;
};
- sdhci0: ps7-sdhci@e010 {
+ sdhci0: sdhci@e010 {
compatible = arasan,sdhci-8.9a;
status = disabled;
clock-names = clk_xin, clk_ahb;
@@ -163,7 +163,7 @@
reg = 0xe010 0x1000;
} ;
- sdhci1: ps7-sdhci@e0101000 {
+ sdhci1: sdhci@e0101000 {
compatible = arasan,sdhci-8.9a;
status = disabled;
clock-names = clk_xin, clk_ahb;
@@ -207,7 +207,7 @@
clocks = clkc 4;
};
- ttc0: ttc0@f8001000 {
+ ttc0: timer@f8001000 {
interrupt-parent = intc;
interrupts = 0 10 4 0 11 4 0 12 4 ;
compatible = cdns,ttc;
@@ -215,14 +215,14 @@
reg = 0xF8001000 0x1000;
};
- ttc1: ttc1@f8002000 {
+ ttc1: timer@f8002000 {
interrupt-parent = intc;
interrupts = 0 37 4 0 38 4 0 39 4 ;
compatible = cdns,ttc;
clocks = clkc 6;
reg = 0xF8002000 0x1000;
};
- scutimer: scutimer@f8f00600 {
+ scutimer: timer@f8f00600 {
interrupt-parent = intc;
interrupts = 1 13 0x301 ;
compatible = arm,cortex-a9-twd-timer;
--
2.3.5
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[U-Boot] [PATCH 02/19] ARM: zynq: DT: Add missing nodes to DTSI
Add ADC, CAN, GPIO, MC, DMA, DEVCFG, USB, Watchdog IPs to DTSI.
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
Sync with the kernel.
---
arch/arm/dts/zynq-7000.dtsi | 100
1 file changed, 100 insertions(+)
diff --git a/arch/arm/dts/zynq-7000.dtsi b/arch/arm/dts/zynq-7000.dtsi
index 6faac4044627..fc5dd4d4a38e 100644
--- a/arch/arm/dts/zynq-7000.dtsi
+++ b/arch/arm/dts/zynq-7000.dtsi
@@ -51,6 +51,48 @@
interrupt-parent = intc;
ranges;
+ adc: adc@f8007100 {
+ compatible = xlnx,zynq-xadc-1.00.a;
+ reg = 0xf8007100 0x20;
+ interrupts = 0 7 4;
+ interrupt-parent = intc;
+ clocks = clkc 12;
+ };
+
+ can0: can@e0008000 {
+ compatible = xlnx,zynq-can-1.0;
+ status = disabled;
+ clocks = clkc 19, clkc 36;
+ clock-names = can_clk, pclk;
+ reg = 0xe0008000 0x1000;
+ interrupts = 0 28 4;
+ interrupt-parent = intc;
+ tx-fifo-depth = 0x40;
+ rx-fifo-depth = 0x40;
+ };
+
+ can1: can@e0009000 {
+ compatible = xlnx,zynq-can-1.0;
+ status = disabled;
+ clocks = clkc 20, clkc 37;
+ clock-names = can_clk, pclk;
+ reg = 0xe0009000 0x1000;
+ interrupts = 0 51 4;
+ interrupt-parent = intc;
+ tx-fifo-depth = 0x40;
+ rx-fifo-depth = 0x40;
+ };
+
+ gpio0: gpio@e000a000 {
+ compatible = xlnx,zynq-gpio-1.0;
+ #gpio-cells = 2;
+ clocks = clkc 42;
+ gpio-controller;
+ interrupt-parent = intc;
+ interrupts = 0 20 4;
+ reg = 0xe000a000 0x1000;
+ };
+
i2c0: i2c@e0004000 {
compatible = cdns,i2c-r1p10;
status = disabled;
@@ -91,6 +133,11 @@
cache-level = 2;
};
+ mc: memory-controller@f8006000 {
+ compatible = xlnx,zynq-ddrc-a05;
+ reg = 0xf8006000 0x1000;
+ };
+
uart0: serial@e000 {
compatible = xlnx,xuartps;
status = disabled;
@@ -199,6 +246,29 @@
};
};
+ dmac_s: dmac@f8003000 {
+ compatible = arm,pl330, arm,primecell;
+ reg = 0xf8003000 0x1000;
+ interrupt-parent = intc;
+ interrupt-names = abort, dma0, dma1, dma2,
dma3,
+ dma4, dma5, dma6, dma7;
+ interrupts = 0 13 4,
+0 14 4, 0 15 4,
+0 16 4, 0 17 4,
+0 40 4, 0 41 4,
+0 42 4, 0 43 4;
+ #dma-cells = 1;
+ #dma-channels = 8;
+ #dma-requests = 4;
+ clocks = clkc 27;
+ clock-names = apb_pclk;
+ };
+
+ devcfg: devcfg@f8007000 {
+ compatible = xlnx,zynq-devcfg-1.0;
+ reg = 0xf8007000 0x100;
+ };
+
global_timer: timer@f8f00200 {
compatible = arm,cortex-a9-global-timer;
reg = 0xf8f00200 0x20;
@@ -222,6 +292,7 @@
clocks = clkc 6;
reg = 0xF8002000 0x1000;
};
+
scutimer: timer@f8f00600 {
interrupt-parent = intc;
interrupts = 1 13 0x301 ;
@@ -229,5 +300,34 @@
reg = 0xf8f00600 0x20 ;
clocks = clkc 4;
} ;
+
+ usb0: usb@e0002000 {
+ compatible = xlnx,zynq-usb-2.20a, chipidea,usb2;
+ status = disabled;
+ clocks = clkc 28;
+ interrupt-parent = intc;
+ interrupts = 0 21 4;
+ reg = 0xe0002000 0x1000;
+ phy_type = ulpi;
+ };
+
+ usb1: usb@e0003000 {
+ compatible = xlnx,zynq-usb-2.20a, chipidea,usb2;
+ status = disabled;
+ clocks = clkc 29;
+ interrupt-parent =
[U-Boot] [PATCH 13/19] ARM: zynq: DT: Sync zc702/zc706/zed/zybo DT with kernel
Syncup with the latest DT from the Linux kernel.
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
arch/arm/dts/zynq-zc702.dts | 351 +++-
arch/arm/dts/zynq-zc706.dts | 293 +++-
arch/arm/dts/zynq-zed.dts | 46 +-
arch/arm/dts/zynq-zybo.dts | 38 -
4 files changed, 715 insertions(+), 13 deletions(-)
diff --git a/arch/arm/dts/zynq-zc702.dts b/arch/arm/dts/zynq-zc702.dts
index 4fa0b00b318b..1c879846813e 100644
--- a/arch/arm/dts/zynq-zc702.dts
+++ b/arch/arm/dts/zynq-zc702.dts
@@ -1,7 +1,8 @@
/*
* Xilinx ZC702 board DTS
*
- * Copyright (C) 2013 Xilinx, Inc.
+ * Copyright (C) 2011 - 2015 Xilinx
+ * Copyright (C) 2012 National Instruments Corp.
*
* SPDX-License-Identifier:GPL-2.0+
*/
@@ -9,15 +10,359 @@
#include zynq-7000.dtsi
/ {
- model = Zynq ZC702 Board;
+ model = Zynq ZC702 Development Board;
compatible = xlnx,zynq-zc702, xlnx,zynq-7000;
aliases {
+ ethernet0 = gem0;
+ i2c0 = i2c0;
serial0 = uart1;
};
memory {
device_type = memory;
- reg = 0 0x4000;
+ reg = 0x0 0x4000;
};
+
+ chosen {
+ bootargs = earlyprintk;
+ stdout-path = serial0:115200n8;
+ };
+
+ leds {
+ compatible = gpio-leds;
+
+ ds23 {
+ label = ds23;
+ gpios = gpio0 10 0;
+ linux,default-trigger = heartbeat;
+ };
+ };
+
+ usb_phy0: phy0 {
+ compatible = usb-nop-xceiv;
+ #phy-cells = 0;
+ };
+};
+
+amba {
+ ocm: sram@fffc {
+ compatible = mmio-sram;
+ reg = 0xfffc 0x1;
+ };
+};
+
+can0 {
+ status = okay;
+ pinctrl-names = default;
+ pinctrl-0 = pinctrl_can0_default;
+};
+
+clkc {
+ ps-clk-frequency = ;
+};
+
+gem0 {
+ status = okay;
+ phy-mode = rgmii-id;
+ phy-handle = ethernet_phy;
+ pinctrl-names = default;
+ pinctrl-0 = pinctrl_gem0_default;
+
+ ethernet_phy: ethernet-phy@7 {
+ reg = 7;
+ };
+};
+
+gpio0 {
+ pinctrl-names = default;
+ pinctrl-0 = pinctrl_gpio0_default;
+};
+
+i2c0 {
+ status = okay;
+ clock-frequency = 40;
+ pinctrl-names = default;
+ pinctrl-0 = pinctrl_i2c0_default;
+
+ i2cswitch@74 {
+ compatible = nxp,pca9548;
+ #address-cells = 1;
+ #size-cells = 0;
+ reg = 0x74;
+
+ i2c@0 {
+ #address-cells = 1;
+ #size-cells = 0;
+ reg = 0;
+ si570: clock-generator@5d {
+ #clock-cells = 0;
+ compatible = silabs,si570;
+ temperature-stability = 50;
+ reg = 0x5d;
+ factory-fout = 15625;
+ clock-frequency = 14850;
+ };
+ };
+
+ i2c@2 {
+ #address-cells = 1;
+ #size-cells = 0;
+ reg = 2;
+ eeprom@54 {
+ compatible = at,24c08;
+ reg = 0x54;
+ };
+ };
+
+ i2c@3 {
+ #address-cells = 1;
+ #size-cells = 0;
+ reg = 3;
+ gpio@21 {
+ compatible = ti,tca6416;
+ reg = 0x21;
+ gpio-controller;
+ #gpio-cells = 2;
+ };
+ };
+
+ i2c@4 {
+ #address-cells = 1;
+ #size-cells = 0;
+ reg = 4;
+ rtc@51 {
+ compatible = nxp,pcf8563;
+ reg = 0x51;
+ };
+ };
+
+ i2c@7 {
+ #address-cells = 1;
+ #size-cells = 0;
+ reg = 7;
+ hwmon@52 {
+ compatible = ti,ucd9248;
+ reg = 52;
+ };
+ hwmon@53 {
+ compatible = ti,ucd9248;
+ reg = 53;
+ };
+ hwmon@54 {
+ compatible = ti,ucd9248;
+ reg = 54;
+ };
+ };
+ };
[U-Boot] [PATCH 11/19] ARM: zynq: DT: Add pinctrl node
Add pinctrl node to DTSI.
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
Sync with mainline.
---
arch/arm/dts/zynq-7000.dtsi | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/arch/arm/dts/zynq-7000.dtsi b/arch/arm/dts/zynq-7000.dtsi
index 276aa75097fc..109b7dc4dbe9 100644
--- a/arch/arm/dts/zynq-7000.dtsi
+++ b/arch/arm/dts/zynq-7000.dtsi
@@ -235,7 +235,7 @@
slcr: slcr@f800 {
#address-cells = 1;
#size-cells = 1;
- compatible = xlnx,zynq-slcr, syscon;
+ compatible = xlnx,zynq-slcr, syscon, simple-bus;
reg = 0xF800 0x1000;
ranges;
clkc: clkc@100 {
@@ -256,6 +256,12 @@
dbg_trc, dbg_apb;
reg = 0x100 0x100;
};
+
+ pinctrl0: pinctrl@700 {
+ compatible = xlnx,pinctrl-zynq;
+ reg = 0x700 0x200;
+ syscon = slcr;
+ };
};
dmac_s: dmac@f8003000 {
--
2.3.5
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[U-Boot] [PATCH 16/19] ARM: zynq: DT: Add missing interrupt for L2 pl310
Add pl310 interrupt to the Zynq devicetree.
Signed-off-by: Alex Wilson alex.david.wil...@gmail.com
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
arch/arm/dts/zynq-7000.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/dts/zynq-7000.dtsi b/arch/arm/dts/zynq-7000.dtsi
index 095c0f67e167..0b62cb093658 100644
--- a/arch/arm/dts/zynq-7000.dtsi
+++ b/arch/arm/dts/zynq-7000.dtsi
@@ -135,6 +135,7 @@
L2: cache-controller@f8f02000 {
compatible = arm,pl310-cache;
reg = 0xF8F02000 0x1000;
+ interrupts = 0 2 4;
arm,data-latency = 3 2 2;
arm,tag-latency = 2 2 2;
cache-unified;
--
2.3.5
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[U-Boot] [PATCH 12/19] ARM: zynq: DT: Add reference to bus node
For adding OCM memory in platform DTS is necessary to have reference to
amba bus.
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
Sync with mainline.
---
arch/arm/dts/zynq-7000.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/dts/zynq-7000.dtsi b/arch/arm/dts/zynq-7000.dtsi
index 109b7dc4dbe9..21b8c98ab2b3 100644
--- a/arch/arm/dts/zynq-7000.dtsi
+++ b/arch/arm/dts/zynq-7000.dtsi
@@ -53,7 +53,7 @@
regulator-always-on;
};
- amba {
+ amba: amba {
compatible = simple-bus;
#address-cells = 1;
#size-cells = 1;
--
2.3.5
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[U-Boot] [PATCH 15/19] ARM: zynq: DT: Get rid of ps-clk-frequency
ps-clk-frequency is platform specific setting and shouldn't be the part
of DTSI.
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
Sync with mainline.
---
arch/arm/dts/zynq-7000.dtsi | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/dts/zynq-7000.dtsi b/arch/arm/dts/zynq-7000.dtsi
index a1de993b9812..095c0f67e167 100644
--- a/arch/arm/dts/zynq-7000.dtsi
+++ b/arch/arm/dts/zynq-7000.dtsi
@@ -241,7 +241,6 @@
clkc: clkc@100 {
#clock-cells = 1;
compatible = xlnx,ps7-clkc;
- ps-clk-frequency = ;
fclk-enable = 0;
clock-output-names = armpll, ddrpll,
iopll, cpu_6or4x,
cpu_3or2x, cpu_2x,
cpu_1x, ddr2x, ddr3x,
--
2.3.5
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[U-Boot] [PATCH 14/19] ARM: zynq: DT: Update years in copyright
Trivial. Signed-off-by: Michal Simek michal.si...@xilinx.com --- DTSI are coming from the same source that's why I have synced years according the Linux kernel. --- arch/arm/dts/zynq-7000.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/dts/zynq-7000.dtsi b/arch/arm/dts/zynq-7000.dtsi index 21b8c98ab2b3..a1de993b9812 100644 --- a/arch/arm/dts/zynq-7000.dtsi +++ b/arch/arm/dts/zynq-7000.dtsi @@ -2,7 +2,7 @@ * Xilinx Zynq 7000 DTSI * Describes the hardware common to all Zynq 7000-based boards. * - * Copyright (C) 2013 Xilinx, Inc. + * Copyright (C) 2011 - 2015 Xilinx * * SPDX-License-Identifier:GPL-2.0+ */ -- 2.3.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/3] crypto/fsl: fix era property value on LE platforms
Acked-by: Ruchika Guptaruchika.gu...@freescale.com
-Original Message-
From: Sun York-R58495
Sent: Sunday, July 19, 2015 3:44 AM
To: Gupta Ruchika-R66431
Subject: Re: [PATCH 1/3] crypto/fsl: fix era property value on LE platforms
Ruchika,
Please comment/ack.
York
On 07/08/2015 07:24 AM, Horia Geantă wrote:
Use fdt_setprop_u32() instead of fdt_setprop().
Fixes: 0181937fa371a (crypto/fsl: Add fixup for crypto node)
Signed-off-by: Horia Geantă horia.gea...@freescale.com
Reviewed-by: Mingkai Hu mingkai...@freescale.com
---
drivers/crypto/fsl/sec.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/crypto/fsl/sec.c b/drivers/crypto/fsl/sec.c index
443ee964feae..b25b1a4052d2 100644
--- a/drivers/crypto/fsl/sec.c
+++ b/drivers/crypto/fsl/sec.c
@@ -155,8 +155,7 @@ static void fdt_fixup_crypto_era(void *blob, u32
era)
return;
}
- err = fdt_setprop(blob, crypto_node, fsl,sec-era, era,
- sizeof(era));
+ err = fdt_setprop_u32(blob, crypto_node, fsl,sec-era, era);
if (err 0) {
printf(ERROR: could not set fsl,sec-era property: %s\n,
fdt_strerror(err));
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