On 07/30/2015 11:04 AM, Vignesh R wrote:
>
> This patch series enables DMA for QSPI on dra7xx and am43xx.
> Patch 1 and 2 make sure the buffers are mem aligned for dma operation.
> Patch 3-6 add support for enabling and disabling of edma3 clocks on
> am43xx and dra7xx. Patch 7-9 add dma function
Along with SOURCE_DATE_EPOCH SOURCE_DATE_TZ can be used to recreate a
build with a specific date timestamp. This allows the verification of
source supplied with a pre-compiled binary.
If SOURCE_DATE_EPOCH is supplied SOURCE_DATE_TZ can be used to specify
what will appear in the output of the versi
When building with SOURCE_DATE_EPOCH the timezone is in UTC. When
building normally the timezone is taken from the build machine's locale
setting.
Signed-off-by: Chris Packham
Tested-by: Bin Meng
Tested-by: Paul Kocialkowski
---
Changes in v3:
- None
Changes in v2:
- Collect some tested-by ta
On Thu, Aug 13, 2015 at 4:40 AM, Tom Rini wrote:
> On Sat, Aug 01, 2015 at 10:32:49PM +1200, Chris Packham wrote:
>
>> Along with SOURCE_DATE_EPOCH SOURCE_DATE_TZ can be used to recreate a
>> build with a specific date timestamp. This allows the verification of
>> source supplied with a pre-compil
For ACPI, on QEMU x86 emulated platform things like control and/or check
thermal zones (temperature sensors, fan speeds, etc), battery levels & power
levels do not exist but we can emulate PCI IRQ routing, CPUs, NUMA domains.
Signed-off-by: Saket Sinha
---
arch/x86/cpu/qemu/Makefile
Signed-off-by: Saket Sinha
---
arch/x86/include/asm/acpi_table.h | 387 +++
arch/x86/lib/Makefile | 1 +
arch/x86/lib/acpi_table.c | 413 ++
arch/x86/lib/tables.c | 5 +
scripts/Makefile.lib
Signed-off-by: Saket Sinha
---
arch/x86/cpu/qemu/Makefile | 1 +
arch/x86/cpu/qemu/acpi.c | 157 +
2 files changed, 158 insertions(+)
create mode 100644 arch/x86/cpu/qemu/acpi.c
diff --git a/arch/x86/cpu/qemu/Makefile b/arch/x86/cpu/qemu/Makefile
ACPI(Advanced Configuration and Power Interface), a Power Management and
configuration standard allowing the operating system to controlthe amount
of power each device is given (allowing it to put certain devices on standby or
power-off for example). It is also used to control and/or check
Signed-off-by: Saket Sinha
---
arch/x86/Kconfig | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 01ed760..36eae6d 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -346,6 +346,12 @@ config GENERATE_MP_TABLE
endmenu
+config GENERATE_AC
Move most macro definitions and prototypes into
"arch/arm/include/asm/imx-common/sys_proto.h" to avoid duplicated
function prototypes and marco definitions for different i.MX SoCs.
This patch do not remove the sys_proto.h for different i.MX SoCs,
because we need to modify lots of driver code and o
Hi Stephen,
On 11 August 2015 at 08:55, Stephen Warren wrote:
> The existing FAT filesystem implementation in U-Boot has some bugs that
> are tricky to fix cleanly without significant rework of the code. For
> example, see:
>
> http://lists.denx.de/pipermail/u-boot/2015-July/221054.html
> [PATCH]
Hi,
On 3 August 2015 at 12:41, Masahiro Yamada
wrote:
> 2015-08-03 21:28 GMT+09:00 Thomas Abraham :
>> Move arch/arm/cpu/armv7/exynos/* to arch/arm/mach-exynos/* to allow
>> reuse of existing code for ARMv8 based Exynos platforms.
>>
>> Cc: Minkyu Kang
>> Cc: Albert Aribaud
>> Cc: Masahiro Yama
Rewrite get_cpu_rev, from "static const char *get_cpu_rev(void)" to
"u32 get_cpu_rev(void)". To align with get_cpu_rev of other i.MXes.
Also write get_imx_type to replace get_cpu_type, since we have
macro named get_cpu_type.
Signed-off-by: Peng Fan
Cc: Stefano Babic
Reviewed-by: Stefano Babic
Hi,
On 10 August 2015 at 06:20, 魏晓萌 wrote:
> Does anyone know the location of "start" label?
> i find that arch/arm/cpu/armXXX/start.S starts with a "reset" label. It
> spend me a lot of time to find where the "start" lable is.
>
> my u-boot version is 2015.07.
Do you mean _start?
You can use '
Use new formula for get_cpu_rev, since we need to use this formula
to do runtime check for all i.MXes.
Signed-off-by: Peng Fan
Cc: Stefano Babic
Reviewed-by: Stefano Babic
---
Changes v2:
none
arch/arm/cpu/arm1136/mx31/generic.c| 2 +-
arch/arm/include/asm/arch-mx31/sys_proto.h | 2
Implement get_cpu_rev to support runtime check using is_cpu_type.
Signed-off-by: Peng Fan
Cc: Stefano Babic
Reviewed-by: Stefano Babic
---
Changes v2:
New patch.
arch/arm/cpu/arm926ejs/mx27/generic.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/cpu/arm926ejs/mx27/gener
Add cpu types for i.MX2/3.
Signed-off-by: Peng Fan
Cc: Stefano Babic
Reviewed-by: Stefano Babic
---
Changes v2:
Add mx27 cpu type.
arch/arm/include/asm/arch-imx/cpu.h | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/include/asm/arch-imx/cpu.h
b/arch/arm/include/asm/arch-i
On Thu, Aug 13, 2015 at 10:09 AM, Simon Glass wrote:
> This can fail for internal reasons, so return a sensible value rather than
> a random one.
>
> Signed-off-by: Simon Glass
> ---
>
> arch/x86/cpu/pci.c | 9 ++---
> 1 file changed, 6 insertions(+), 3 deletions(-)
>
> diff --git a/arch/x86
Hi Simon,
On Thu, Aug 13, 2015 at 10:09 AM, Simon Glass wrote:
> At present, until a PCI bus is probed, it cannot be found by its sequence
> number unless it has an alias. This is the same with any device.
>
> However with PCI this is more annoying than usual, since bus 0 is always the
> same dev
Hi Simon,
On Thu, Aug 13, 2015 at 10:09 AM, Simon Glass wrote:
> These functions are defined by macros so do not show up with grep. Add
> a comment to help.
>
> Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
One issue below:
> ---
>
> include/pci.h | 1 +
> 1 file changed, 1 insertion(+)
On Thursday, July 16, 2015 at 04:27:31 AM, Vikas Manocha wrote:
> There is no need to poll sram level before writing to flash, data going to
> SRAM till sram is full, after that backpressure will take over.
Please see the question I posed in 2/6 v2 .
> Signed-off-by: Vikas Manocha
> ---
>
> Cha
On Thursday, July 16, 2015 at 04:27:30 AM, Vikas Manocha wrote:
> There is no need to check for sram fill level. If sram is empty, cpu will
> go in the wait state till the time data is available from flash.
Consider the following scenario:
- CPU core reads some memory area, but there are no data
On Thursday, July 16, 2015 at 04:27:33 AM, Vikas Manocha wrote:
> This patch is to separate the base trigger from the read/write transfer
> start addresses.
This patch breaks the QSPI support on SoCFPGA.
> Base trigger register address (0x1c register) corresponds to the address
> which should be
On Thursday, July 16, 2015 at 04:27:29 AM, Vikas Manocha wrote:
Commit message is missing.
> Signed-off-by: Vikas Manocha
> ---
>
> Changes in v2: Rebased to master
>
> drivers/spi/cadence_qspi_apb.c |9 ++---
> 1 file changed, 2 insertions(+), 7 deletions(-)
>
> diff --git a/drivers
On Thursday, August 13, 2015 at 02:36:27 AM, vikasm wrote:
> Hi Marek,
Hi!
> On 08/12/2015 05:26 PM, Marek Vasut wrote:
> > On Thursday, August 13, 2015 at 02:16:21 AM, vikasm wrote:
> >> Hi Marek,
> >>
> >> On 08/12/2015 01:22 PM, Marek Vasut wrote:
> >>> On Wednesday, August 12, 2015 at 07:52:
Hi,
On 11 August 2015 at 11:41, Simon Glass wrote:
> Hi Stephen,
>
> On 11 August 2015 at 11:33, Stephen Warren wrote:
>>
>> On 08/11/2015 08:33 AM, Simon Glass wrote:
>>>
>>> This is a convenient way for a driver to get the hardware address of a
>>> device, when regmap or syscon are not being u
The ICH GPIO driver does not work correctly at present. This series tidies
things up and fixes a few bugs.
One issue remaining is that reading from output GPIOs does not work - it
always returns 0.
Simon Glass (10):
x86: Return -1 when reading a PCI config register fails
x86: minnowmax: Add
This function can return an error. Correct the detection of this error so
that it works even with large 32-bit addresses.
The return value is set up for returning an I/O address but the function is
also used to return a memory-mapped address. Adjust the return code to make
this work.
Also add a b
Some controllers do not allow the output value to be read. Detect this and
report the error in that case.
Signed-off-by: Simon Glass
---
common/cmd_gpio.c | 34 +++---
1 file changed, 27 insertions(+), 7 deletions(-)
diff --git a/common/cmd_gpio.c b/common/cmd_gpio.
It should be possible to read an output GPIO. For now it is not clear
how to do this. Perhaps the driver should be adjusted to use memory-mapped
access throughout. For now, return an error to avoid confusion.
Not to apply.
Signed-off-by: Simon Glass
---
drivers/gpio/intel_ich6_gpio.c | 15
The datasheet suggests that the state of an output pin can be read. In fact
this does not seem to work, perhaps because we are also accessing the GPIO
state through I/O instead of just memory-mapped.
Not to apply.
Signed-off-by: Simon Glass
---
drivers/gpio/intel_ich6_gpio.c | 13 +++--
These calls seem to be incorrect. The function expects an I/O address but
the existing callers pass the value at an I/O address. Fix it.
Signed-off-by: Simon Glass
---
drivers/gpio/intel_ich6_gpio.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpio/intel_ich6_
This should be 0x250, not 0x258. Fix it.
Reported-by: Andrew Bradford
Signed-off-by: Simon Glass
---
arch/x86/dts/minnowmax.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/dts/minnowmax.dts b/arch/x86/dts/minnowmax.dts
index 33fb009..7d4b309 100644
--- a/arch/x
These functions are defined by macros so do not show up with grep. Add
a comment to help.
Signed-off-by: Simon Glass
---
include/pci.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/pci.h b/include/pci.h
index 488ff44..68df5cb 100644
--- a/include/pci.h
+++ b/include/pci.h
@@ -653,
These GPIOs are accessible on the pin header. Add pinctrl settings for them
so that we they can be adjusted using the 'gpio' command.
Signed-off-by: Simon Glass
---
arch/x86/dts/minnowmax.dts | 27 +++
1 file changed, 27 insertions(+)
diff --git a/arch/x86/dts/minnowmax
This can fail for internal reasons, so return a sensible value rather than
a random one.
Signed-off-by: Simon Glass
---
arch/x86/cpu/pci.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/arch/x86/cpu/pci.c b/arch/x86/cpu/pci.c
index f8da080..d2ec45a 100644
--- a/arc
At present, until a PCI bus is probed, it cannot be found by its sequence
number unless it has an alias. This is the same with any device.
However with PCI this is more annoying than usual, since bus 0 is always the
same device.
Add a function that tries a little harder to locate PCI bus 0. This
On Thu, Aug 13, 2015 at 9:33 AM, Simon Glass wrote:
> Now that we have an efi.h header we can use that for FSP error defines.
> Drop the FSP ones.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v3:
> - Drop #include of efi.h since it is not needed
>
> Changes in v2:
> - Drop checking against
Hi Stefano,
On Wed, Aug 12, 2015 at 05:49:15PM +0200, Stefano Babic wrote:
>Hi Peng,
>
>On 10/08/2015 14:53, Peng Fan wrote:
>> Move most macro definitions and prototypes into
>> "arch/arm/include/asm/imx-common/sys_proto.h" to avoid duplicated
>> function prototypes and marco definitions for diffe
Hi Stefano,
On Wed, Aug 12, 2015 at 05:50:36PM +0200, Stefano Babic wrote:
>On 12/08/2015 11:40, Peng Fan wrote:
>> Write a function named get_cpu_rev to make it support
>> runtime checking using "is_cpu_type(MXC_CPU_xx)".
>>
>> Also introduce a macro MXC_CPU_MX27 with value 0x27.
>>
>> Signed-of
Now that we have an efi.h header we can use that for FSP error defines.
Drop the FSP ones.
Signed-off-by: Simon Glass
---
Changes in v3:
- Drop #include of efi.h since it is not needed
Changes in v2:
- Drop checking against EFI_STATUS since this reduces code readability
arch/x86/include/asm/f
Hi Christophe,
On 11 August 2015 at 15:42, christophe.ricard
wrote:
> Hi Simon,
>
> I would basically disagree with this one.
> The code from tpm.c you are merging into tpm_tis_i2c may not only be used by
> tpm_tis_i2c as it is using data from TPM standards (e.g: Trusted computing
> group) that s
Hi Christophe,
On 11 August 2015 at 15:47, christophe.ricard
wrote:
> Hi Simon,
>
> Locality concept are valid almost on any chip assuming if no locality are
> supported the default one is locality 0.
> I would leave this change open for discussion.
>
> However, as per patch 06 & 07, i would keep
Hi Christophe,
On 11 August 2015 at 15:47, christophe.ricard
wrote:
> Hi Simon,
>
> As per my comment on patch 6, i would disagree as well on this one.
> It tpm_vendor_specific structure is convenient for ST33ZP24 for example.
>
> Best Regards
> Christophe
>
As things stand they are only used in
On 11 August 2015 at 15:45, christophe.ricard
wrote:
> Hi Simon,
>
>
> On 11/08/2015 16:47, Simon Glass wrote:
>>
>> Add new Kconfig options for TPMs in preparation for moving boards to use
>> Kconfig for TPM configuration.
>>
>> Signed-off-by: Simon Glass
>> ---
>>
>> common/Kconfig | 12
Hi Christophe,
On 11 August 2015 at 15:41, christophe.ricard
wrote:
> Hi Simon,
>
> In here you are removing usage of i2c_read/i2c_write for
> dm_i2c_read/dm_i2c_write.
> This require boards to support DM_I2C which is not the case with example
> beagleboard or boards using omap.
As far as I know
Hi Christophe,
On 11 August 2015 at 15:50, christophe.ricard
wrote:
> Hi Simon,
>
> I pretty much like the move to driver model for TPM.
> However, i have some few remarks:
>
> The current i2c driver stick to Infineon TPMs and will not support any other
> vendors like ST(in my case).
> The main r
Hi Marek,
On 08/12/2015 05:26 PM, Marek Vasut wrote:
> On Thursday, August 13, 2015 at 02:16:21 AM, vikasm wrote:
>> Hi Marek,
>>
>> On 08/12/2015 01:22 PM, Marek Vasut wrote:
>>> On Wednesday, August 12, 2015 at 07:52:28 PM, vikasm wrote:
Thanks Jagan,
On 08/12/2015 05:01 AM, Jagan
On Thursday, August 13, 2015 at 02:16:21 AM, vikasm wrote:
> Hi Marek,
>
> On 08/12/2015 01:22 PM, Marek Vasut wrote:
> > On Wednesday, August 12, 2015 at 07:52:28 PM, vikasm wrote:
> >> Thanks Jagan,
> >>
> >> On 08/12/2015 05:01 AM, Jagan Teki wrote:
> >>> Vikas,
> >>>
> >>> Did you verified o
Hi Marek,
On 08/12/2015 01:22 PM, Marek Vasut wrote:
> On Wednesday, August 12, 2015 at 07:52:28 PM, vikasm wrote:
>> Thanks Jagan,
>>
>> On 08/12/2015 05:01 AM, Jagan Teki wrote:
>>> Vikas,
>>>
>>> Did you verified on board, can you just verified with 'sf update' before
>>> and after.. I just wan
Hi Sylvain,
On 12.08.2015 23:00, LEMIEUX, SYLVAIN wrote:
> Hi Vladimir and Marek,
>
>> -Original Message-
>> From: Vladimir Zapolskiy [mailto:v...@mleia.com]
>> Sent: 12-Aug-15 1:55 PM
>>
>> Hi Sylvain,
>>
>> On 10.08.2015 15:16, slemieux.t...@gmail.com wrote:
>>> From: Sylvain Lemieux
>
In the dfu-util it is possible to set major:minor number by unsing -d flag
(-d 0451:d022).
Such option is very handy when many DFU devices are connected to a single
host PC. This commit allows testing when above situation emerges.
Signed-off-by: Lukasz Majewski
Reviewed-by: Simon Glass
Tested-b
Hi Hans,
On Sat, 8 Aug 2015 16:24:59 +0200
Hans de Goede wrote:
...
> Anatolij, can we have your ack for merging this new video bridge chip
> driver via the sunxi tree ?
just replied with ack, please merge.
Thanks,
Anatolij
___
U-Boot mailing list
U
On Sat, 8 Aug 2015 16:25:03 +0200
Hans de Goede wrote:
> Add support for the ANX9804 bridge chip, which can take pixel data coming
> from a parallel LCD interface and translate it on the flight into a DP
> interface for driving eDP TFT displays. It uses I2C for configuration.
>
> Signed-off-by:
On Sat, 8 Aug 2015 16:25:02 +0200
Hans de Goede wrote:
> Add support for using the mipi pll as lcd clock source, this is
> necessary for getting higher dotclocks with lcd panels.
>
> Signed-off-by: Hans de Goede
Acked-by: Anatolij Gustschin
___
U-B
Hi Hans,
On Wed, 5 Aug 2015 17:17:28 +0200
Hans de Goede wrote:
...
> The first 2 patches are preparation patches adding support for stride !=
> width to the cfbconsole code. Anatolij, can you either merge these 2
> through your tree, or give us your ack for merging these through the
> sunxi tr
On Wed, 5 Aug 2015 17:17:31 +0200
Hans de Goede wrote:
> Add support for making the visual area of the framebuffer smaller and
> drawing a black border around it. This is intended for use with
> overscanning monitors (esp. with composite video out), to avoid part
> of the picture being invisible
On Wednesday, August 12, 2015 at 11:09:15 PM, Simon Glass wrote:
> Hi Marek,
>
> On 12 August 2015 at 08:40, Marek Vasut wrote:
> > On Wednesday, August 12, 2015 at 03:55:59 PM, Simon Glass wrote:
> >> Hi Marek,
> >>
> >> On 12 August 2015 at 07:53, Marek Vasut wrote:
> >> > On Wednesday, Augus
On Wednesday, August 12, 2015 at 11:35:25 PM, Vladimir Zapolskiy wrote:
> On 12.08.2015 22:47, LEMIEUX, SYLVAIN wrote:
> > Hi Vladimir,
> >
> >> -Original Message-
> >> From: Marek Vasut [mailto:ma...@denx.de]
> >> Sent: 12-Aug-15 3:42 PM
> >>
> >> On Wednesday, August 12, 2015 at 07:55:2
On Wed, 5 Aug 2015 17:17:30 +0200
Hans de Goede wrote:
> cfbconsole currently assumes that the width and stride of the framebuffer
> are the same, in most places where stride matters it uses a VIDEO_LINE_LEN
> helper macro.
>
> This commit changes the few places not using VIDEO_LINE_LEN to also
On Wed, 5 Aug 2015 17:17:29 +0200
Hans de Goede wrote:
> The passed in width is always VIDEO_COLS. This is a preparation patch
> for adding stride != width support to the cfbconsole code.
>
> Signed-off-by: Hans de Goede
Acked-by: Anatolij Gustschin
_
On 07/08/2015 14:35, Peng Fan wrote:
> Move TARGET_xx Kconfig option based on mx6 to arch/arm/cpu/armv7/mx6/Kconfig.
> Add enable "CONFIG_ARCH_MX6" for boards based on mx6.
> Then we can choose target boards using "make ARCH=arm menuconfig"
> with ARCH_MX6 defined.
>
> If using original way, we
On 12.08.2015 22:47, LEMIEUX, SYLVAIN wrote:
> Hi Vladimir,
>
>> -Original Message-
>> From: Marek Vasut [mailto:ma...@denx.de]
>> Sent: 12-Aug-15 3:42 PM
>>
>> On Wednesday, August 12, 2015 at 07:55:29 PM, Vladimir Zapolskiy wrote:
>>> Hi Sylvain,
>>>
>>> On 10.08.2015 15:16, slemieux.t..
> -Original Message-
> From: Vladimir Zapolskiy [mailto:v...@mleia.com]
> Sent: 12-Aug-15 1:22 PM
>
> LPC32xx has 3 I2C bus controllers, 2 of them are used as generic ones
> and their parent clock is HCLK and CLK_HI/CLK_LO registers are 10 bit
> wide. This means that if HCLK is 104MHz, the
On 12/07/2015 15:00, Marek Vasut wrote:
> From: Chris Smith
>
> When the original HBUS divider value is retrieved in mxs_ocotp_scale_hclk()
> for the purpose or restoring it back later, the value is not shifted by the
> HBUS divider offset in that register. This is not a problem, since the shif
On 30/06/2015 23:17, Damien Riegel wrote:
> From: Lucile Quirion
>
> This commit adds basic support including:
> MMC, Serial console, TS4800 watchdog
>
> The config use CONFIG_SKIP_LOWLEVEL_INIT as U-boot is used as a second
> stage bootloader.
>
> Signed-off-by: Lucile Quirion
> signed-off-
On 30/06/2015 23:17, Damien Riegel wrote:
> This commit adds ethernet support to the TS4800. Note that the
> MAC address is not fused on this board and have to be read from
> FEC PALR PAUR registers (this is how the kernel provided by
> Technologic Systems does it).
>
> signed-off-by: Damien Rie
Hi Marek,
On 12 August 2015 at 08:40, Marek Vasut wrote:
> On Wednesday, August 12, 2015 at 03:55:59 PM, Simon Glass wrote:
>> Hi Marek,
>>
>> On 12 August 2015 at 07:53, Marek Vasut wrote:
>> > On Wednesday, August 12, 2015 at 03:51:07 PM, Simon Glass wrote:
>> >> Hi Marek,
>> >>
>> >> On 12 Au
On 30/06/2015 18:52, Troy Kisky wrote:
> On 6/30/2015 7:48 AM, Eric Nelson wrote:
>> Troy Kisky will be maintaining the Nitrogen6x board going forward.
>>
>> Signed-off-by: Eric Nelson
>> ---
>> board/boundary/nitrogen6x/MAINTAINERS | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>>
Hi Otavio,
On 29/07/2015 01:24, Otavio Salvador wrote:
> cgtqmx6eval can be populated with a AR8035 or KSZ9031 depending on the
> board revision.
>
> Add Ethernet support.
>
> Signed-off-by: Otavio Salvador
> ---
Applied to u-boot-imx, thanks !
Best regards,
Stefano Babic
--
===
On Wednesday, August 12, 2015 at 09:35:22 AM, Pantelis Antoniou wrote:
> Hi Marek,
Hi!
> > On Jul 27, 2015, at 23:39 , Marek Vasut wrote:
> >
> > Rework the driver to probe the MMC controller from Device Tree
> > and make it mandatory. There is no longer support for probing
> > from the ancient
Rework the driver to probe the MMC controller from Device Tree
and make it mandatory. There is no longer support for probing
from the ancient qts-generated header files.
Signed-off-by: Marek Vasut
Cc: Dinh Nguyen
Cc: Pantelis Antoniou
Cc: Tom Rini
---
arch/arm/mach-socfpga/include/mach/dwmmc.
On Wednesday, August 12, 2015 at 10:19:43 PM, Andrew Ruder wrote:
> > On Aug 12, 2015, at 2:34 PM, Marek Vasut wrote:
> >
> > On Wednesday, August 12, 2015 at 08:43:52 PM, Andrew Ruder wrote:
> >
> > Commit message is missing :'-(
>
> I actually was going with subject being sufficient on this o
On Wednesday, August 12, 2015 at 10:19:30 PM, Marek Vasut wrote:
> There is no longer any need to hard-code the USB controller address
> into the board config file, since the address and all other config
> for the USB controller are now retrieved from device tree.
>
> Signed-off-by: Marek Vasut
On Wednesday, August 12, 2015 at 04:15:00 PM, Simon Glass wrote:
> Hi Marek,
>
> On 10 August 2015 at 09:30, Marek Vasut wrote:
> > Add driver for the DesignWare APB GPIO IP block.
> > This driver is DM capable and probes from DT.
> >
> > Signed-off-by: Marek Vasut
> > Cc: Simon Glass
> > ---
Add driver for the DesignWare APB GPIO IP block.
This driver is DM capable and probes from DT.
Signed-off-by: Marek Vasut
Cc: Simon Glass
---
drivers/gpio/Kconfig | 10 +++
drivers/gpio/Makefile | 1 +
drivers/gpio/dwapb_gpio.c | 167 ++
3
On Wednesday, August 12, 2015 at 07:52:28 PM, vikasm wrote:
> Thanks Jagan,
>
> On 08/12/2015 05:01 AM, Jagan Teki wrote:
> > Vikas,
> >
> > Did you verified on board, can you just verified with 'sf update' before
> > and after.. I just wanted to see if you get any performance
> > improvement wit
> On Aug 12, 2015, at 2:34 PM, Marek Vasut wrote:
>
> On Wednesday, August 12, 2015 at 08:43:52 PM, Andrew Ruder wrote:
>
> Commit message is missing :'-(
I actually was going with subject being sufficient on this one. I'll fill in
some more info on this as far as origin and what it has been
This patch enables the USB DM support, which in turn lets us probe
the DWC2 USB from device tree. Thus, we again trim down on the amount
of hard-coded stuff.
Signed-off-by: Marek Vasut
---
include/configs/socfpga_common.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/configs/socfpg
Add the Synopsys compatible string. This is used in SoCFPGA DT files.
Signed-off-by: Marek Vasut
---
drivers/usb/host/dwc2.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/usb/host/dwc2.c b/drivers/usb/host/dwc2.c
index 09f91f1..7b29134 100644
--- a/drivers/usb/host/dwc2.c
+++ b/dri
There is no longer any need to hard-code the USB controller address
into the board config file, since the address and all other config
for the USB controller are now retrieved from device tree.
Signed-off-by: Marek Vasut
---
include/configs/socfpga_arria5.h | 3 ---
include/configs/socfpga_cyc
This driver is not used only on exynos, but also on Altera SoCFPGA,
HiSilicon SoCs, RPi etc, so rename it accordingly to prevent confusion.
Signed-off-by: Marek Vasut
---
drivers/usb/host/dwc2.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/usb/host/dwc2.c b/drivers
On Tuesday, August 11, 2015 at 01:10:38 AM, Marek Vasut wrote:
> This series cleans up the QTS-generated header files and cleans up
> the SoCDK support such that they fit into the framework just like
> any other SoCFPGA boards.
>
> Marek Vasut (8):
> arm: socfpga: Move wrappers into platform dir
Hi Vladimir and Marek,
> -Original Message-
> From: Vladimir Zapolskiy [mailto:v...@mleia.com]
> Sent: 12-Aug-15 1:55 PM
>
> Hi Sylvain,
>
> On 10.08.2015 15:16, slemieux.t...@gmail.com wrote:
> > From: Sylvain Lemieux
> >
> > Incorporate USB driver from legacy LPCLinux NXP BSP.
> > The f
+Codrin
Somehow I dropped Codrin in last reply.
On 08/10/2015 01:45 PM, York Sun wrote:
>
>
> On 08/10/2015 01:05 PM, Joe Hershberger wrote:
>> Hi York,
>>
>> On Mon, Aug 10, 2015 at 3:03 PM, York Sun wrote:
>>>
>>>
>>> On 08/10/2015 12:57 PM, Joe Hershberger wrote:
Too much top-posting.
Hi Vladimir,
> -Original Message-
> From: Marek Vasut [mailto:ma...@denx.de]
> Sent: 12-Aug-15 3:42 PM
>
> On Wednesday, August 12, 2015 at 07:55:29 PM, Vladimir Zapolskiy wrote:
> > Hi Sylvain,
> >
> > On 10.08.2015 15:16, slemieux.t...@gmail.com wrote:
> > > From: Sylvain Lemieux
> > >
On Wed, Aug 05, 2015 at 05:17:04PM +0200, Marcel Ziswiler wrote:
> From: Marcel Ziswiler
>
> Various U-Boot adoptions/extensions to MTD/NAND/UBI did not take buffer
> alignment into account which led to failures of the following form:
>
> ERROR: v7_dcache_inval_range - start address is not alig
On Wednesday, August 12, 2015 at 07:55:29 PM, Vladimir Zapolskiy wrote:
> Hi Sylvain,
>
> On 10.08.2015 15:16, slemieux.t...@gmail.com wrote:
> > From: Sylvain Lemieux
> >
> > Incorporate USB driver from legacy LPCLinux NXP BSP.
> > The files taken from the legacy patch are:
> > - lpc32xx USB dr
> -Original Message-
> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Albert ARIBAUD
> Sent: 29-Jun-15 4:25 AM
>
> Bonjour Vladimir,
>
> Le Mon, 29 Jun 2015 03:35:12 +0300, Vladimir Zapolskiy a
> écrit :
>
> > The lpc32xx_eth_phylib_init() function is capable to connect L
The following changes since commit e2c1c5bae619d2e87505de99f907a26237640bc9:
Merge git://git.denx.de/u-boot-dm (2015-08-10 10:06:07 -0400)
are available in the git repository at:
git://git.denx.de/u-boot-net.git master
for you to fetch changes up to faa765d40760d84bff0de26a5a5f605621dbff39
Hi Josh,
On Wed, Jun 3, 2015 at 3:45 AM, Josh Wu wrote:
> This patch refer to linux kernel commit: d8b763e1e79f
> net/macb: add TX multiqueue support for gem
> by: Cyrille Pitchen
>
> 1. macb driver will check the register to find how many queues support for
> this chip.
>
> 2. Then as we onl
On Wednesday, August 12, 2015 at 08:43:52 PM, Andrew Ruder wrote:
Commit message is missing :'-(
> Cc: Marek Vasut
> Cc: Heiko Schocher
> Signed-off-by: Andrew Ruder
> ---
>
> This driver was written before the driver model stuff was really around (or
> at least based on a U-Boot version that
Hi Vladimir,
On Sun, Jul 5, 2015 at 11:22 PM, Vladimir Zapolskiy wrote:
> LPC32xx MAC and clock control configuration requires some minor quirks
> to deal with a phy connected by RMII.
>
> It's worth to mention that the kernel and legacy BSP from NXP sets
> SUPP_RESET_RMII == (1 << 11) bit, howev
On Wednesday, August 12, 2015 at 08:18:31 PM, Andrew Ruder wrote:
> This patch moves pxa to the common timer functions added in commit
>
> 8dfafdd - Introduce common timer functions
>
> The (removed) pxa timer code (specifically __udelay()) could deadlock at
> the 32-bit boundary of get_ticks(
Hi Vladimir,
On Sun, Jul 5, 2015 at 11:22 PM, Vladimir Zapolskiy wrote:
> This change rearranges general MAC configuration and PHY specific
> configuration of MAC registers (duplex mode and speed), before this
> change set bits related to PHY configuration in MAC2 and COMMAND
> registers are rewr
On Wednesday, August 12, 2015 at 07:55:47 PM, Andrew Ruder wrote:
> Since commit 3ff46cc42b9d73d0 ("arm: relocate the exception vectors")
> pxa does not boot anymore.
>
> Add a specific relocate_vectors macro that skips the vector relocation,
> as the pxa SoC does not provide RAM at the high vecto
Hi Vladimir,
On Sun, Jun 28, 2015 at 7:35 PM, Vladimir Zapolskiy wrote:
> The lpc32xx_eth_phylib_init() function is capable to connect LPC32XX
> MAC to some specified phy by phy id, by chance the single user of
> lpc32xx_eth has CONFIG_PHY_ADDR set to 0, however other boards may
> have non-zero C
Hi Vladimir,
On Sat, Jun 27, 2015 at 10:03 PM, Vladimir Zapolskiy wrote:
> According to LPC32x0 User Manual the following bits in Command
> register 0x3106_0100 are defined:
>
> BitSymbol
> 2 - Unused
> 3 RegReset
> 4 TxReset
> 5 RxReset
>
> Fix wrong (1-bit shifted ri
Hi Tim,
On Tue, May 19, 2015 at 12:01 PM, Tim Harvey wrote:
> remove unnecessary clearing of SWSM.SWSM_SMBI when obtaining the SW
> semaphore. This was introduced in 951860634fdb557bbb58e0f99215391bc0c29779
> while adding i210 support and should be now resolved by releasing the
> semaphore when n
Hi Tim,
On Tue, May 19, 2015 at 12:01 PM, Tim Harvey wrote:
> This reverts commit 17da7120249bfdef877f46be5bbcb3cc01212eb9.
>
> The i210/i211 do have the SW_FW_SYNC (0x5b5c) register and this is what should
> be used when acquiring the semaphore.
>
> I believe the issue that this patch was trying
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