Re: [U-Boot] [PATCH 2/6] usb: dwc2: Handle NAK during CONTROL DATA and STATUS stage
On Sunday, December 13, 2015 at 05:17:54 AM, Stefan Brüns wrote:
> A function is allowed to return NAKs during the DATA stage to control
> data flow control. NAKs during the STATUS stage signal the function
> is still processing the request.
>
> Signed-off-by: Stefan Brüns
> ---
> drivers/usb/host/dwc2.c | 37 -
> 1 file changed, 24 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/usb/host/dwc2.c b/drivers/usb/host/dwc2.c
> index 5ef6deb..db3acd4 100644
> --- a/drivers/usb/host/dwc2.c
> +++ b/drivers/usb/host/dwc2.c
> @@ -892,8 +892,8 @@ static int _submit_control_msg(struct dwc2_priv *priv,
> struct usb_device *dev, {
> int devnum = usb_pipedevice(pipe);
> int pid, ret, act_len;
> - /* For CONTROL endpoint pid should start with DATA1 */
> int status_direction;
> + unsigned long timeout;
>
> if (devnum == priv->root_hub_devnum) {
> dev->status = 0;
> @@ -907,26 +907,37 @@ static int _submit_control_msg(struct dwc2_priv
> *priv, struct usb_device *dev, if (ret)
> return ret;
>
> + timeout = get_timer(0) + USB_TIMEOUT_MS(pipe);
> if (buffer) {
> + /* DATA stage */
> pid = DWC2_HC_PID_DATA1;
> - ret = chunk_msg(priv, dev, pipe, &pid, usb_pipein(pipe), buffer,
> - len, false);
> + act_len = 0;
> + do {
> + if (get_timer(0) > timeout) {
> + printf("Timeout during CONTROL DATA stage\n");
> + return -ETIMEDOUT;
> + }
> + ret = chunk_msg(priv, dev, pipe, &pid, usb_pipein(pipe),
> + buffer, len, false);
> + act_len += dev->act_len;
> + buffer += dev->act_len;
> + len -= dev->act_len;
> + } while (len && (ret == -EAGAIN));
I can't say I'm a big fan of these conditions ^ . Can you rework a bit so it's
more obvious what the code does ? The condition in the while (cond) is really
inobvious at a first glance.
> if (ret)
> return ret;
> - act_len = dev->act_len;
> - } /* End of DATA stage */
> - else
> + status_direction = usb_pipeout(pipe);
> + } else {
> + /* No-data CONTROL always ends with an IN transaction */
> + status_direction = 1;
> act_len = 0;
> + }
Otherwise:
Acked-by: Marek Vasut
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Re: [U-Boot] [PATCH 1/7] usb: increase USB descriptor buffer size
On Sunday, December 13, 2015 at 05:47:18 AM, Stefan Brüns wrote: > The configuration descriptor includes all interface, endpoint and > auxiliary descriptors (e.g. report, union) so 512 may not be enough. > > Signed-off-by: Stefan Brüns Can the size be determined in a dynamic manner instead of this ad-hoc random number ? Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 6/6] usb: dwc2: remove no longer used wait_for_chhltd()
On Sunday, December 13, 2015 at 05:17:58 AM, Stefan Brüns wrote: > Signed-off-by: Stefan Brüns Acked-by: Marek Vasut Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/6] usb: dwc2: determine TT hub address and port for split transactions
On Sunday, December 13, 2015 at 05:17:55 AM, Stefan Brüns wrote: > Start split and complete split tokens need the hub address and the > downstream port of the first HS hub (device view). > Code copied from host/ehci_hcd.c > > Signed-off-by: Stefan Brüns Acked-by: Marek Vasut Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 5/6] usb: dwc2: add support for SPLIT transactions
On Sunday, December 13, 2015 at 05:17:57 AM, Stefan Brüns wrote: > In contrast to non-SPLIT transfers each transaction has to be submitted > as an individual chunk. Handling of ACK/NAk/NYET handshakes depends on > transaction (non-SPLIT/SSPLIT/CSPLIT), thus inline the HCINT flag handling. > > Signed-off-by: Stefan Brüns > --- > drivers/usb/host/dwc2.c | 96 > ++--- 1 file changed, 83 > insertions(+), 13 deletions(-) > Reviewed-by: Marek Vasut Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 4/6] usb: dwc2: add helper function for setting SPLIT HC registers
On Sunday, December 13, 2015 at 05:17:56 AM, Stefan Brüns wrote: > Signed-off-by: Stefan Brüns Commit message would be nice, otherwise: Acked-by: Marek Vasut Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/6] usb: dwc2: avoid out of bounds access
On Sunday, December 13, 2015 at 05:17:53 AM, Stefan Brüns wrote: > flush_dcache_range may access data after priv->aligned_buffer end if > len > DWC2_DATA_BUF_SIZE. > memcpy may access data after buffer end if done > 0 > > Signed-off-by: Stefan Brüns Acked-by: Marek Vasut Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/7] usb: increase USB descriptor buffer size
The configuration descriptor includes all interface, endpoint and auxiliary descriptors (e.g. report, union) so 512 may not be enough. Signed-off-by: Stefan Brüns --- common/usb.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/common/usb.c b/common/usb.c index 700bfc3..c276bf2 100644 --- a/common/usb.c +++ b/common/usb.c @@ -41,7 +41,7 @@ #include #endif -#define USB_BUFSIZ 512 +#define USB_BUFSIZ 1024 static int asynch_allowed; char usb_started; /* flag for the started/stopped USB status */ -- 2.1.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 0/6] usb: dwc2: add SPLIT transaction support
On Sunday, December 13, 2015 at 05:17:52 AM, Stefan Brüns wrote: > First two patches are preparatory work. 3rd and 4th introduce helper > functions. Patch 5 contains the core changes. Patch 6 is cleanup. > > The patch has been tested on RPi 1 B with several full speed and low speed > devices. All devices enumerated successfully, with good output from > "usb info". High speed devices, e.g. the SMSC9514 ethernet and mass storage > devices still work. > > Neither CONFIG_DM_USB nor LS/FS devices directly connected to the root > hub/hc have been tested, although both should be handled by the patches. On SoCFPGA Cyclone V (SoCkit), with CONFIG_DM_USB enabled: Tested-by: Marek Vasut Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 3/6] usb: dwc2: determine TT hub address and port for split transactions
Start split and complete split tokens need the hub address and the
downstream port of the first HS hub (device view).
Code copied from host/ehci_hcd.c
Signed-off-by: Stefan Brüns
---
drivers/usb/host/dwc2.c | 60 +
1 file changed, 60 insertions(+)
diff --git a/drivers/usb/host/dwc2.c b/drivers/usb/host/dwc2.c
index db3acd4..2d97546 100644
--- a/drivers/usb/host/dwc2.c
+++ b/drivers/usb/host/dwc2.c
@@ -404,6 +404,66 @@ static void dwc_otg_core_init(struct dwc2_core_regs *regs)
}
/*
+ * Searches for the first HS hub above the given device. If a
+ * HS hub is found, the hub address and the port the device is
+ * connected to is return, as required for SPLIT transactions
+ *
+ * @param: udev full speed or low speed device
+ */
+#ifdef CONFIG_DM_USB
+static void dwc_find_hub_address_port(struct usb_device *udev,
+ uint8_t *hub_address, uint8_t *hub_port)
+{
+ struct udevice *parent;
+ struct usb_device *uparent, *ttdev;
+
+ /*
+* When called from usb-uclass.c: usb_scan_device() udev->dev points
+* to the parent udevice, not the actual udevice belonging to the
+* udev as the device is not instantiated yet. So when searching
+* for the first usb-2 parent start with udev->dev not
+* udev->dev->parent .
+*/
+ ttdev = udev;
+ parent = udev->dev;
+ uparent = dev_get_parent_priv(parent);
+
+ while (uparent->speed != USB_SPEED_HIGH) {
+ struct udevice *dev = parent;
+
+ if (device_get_uclass_id(dev->parent) != UCLASS_USB_HUB) {
+ printf("dwc2: Error cannot find high speed parent of
usb-1 device\n");
+ *hub_address = *hub_port = 0;
+ return;
+ }
+
+ ttdev = dev_get_parent_priv(dev);
+ parent = dev->parent;
+ uparent = dev_get_parent_priv(parent);
+ }
+ *hub_address = uparent->devnum;
+ *hub_port = ttdev->portnr;
+}
+#else
+static void dwc_find_hub_address_port(struct usb_device *udev,
+ uint8_t *hub_address, uint8_t *hub_port)
+{
+ /* Find out the nearest parent which is high speed */
+ while (udev->parent->parent != NULL)
+ if (udev->parent->speed != USB_SPEED_HIGH) {
+ udev = udev->parent;
+ } else {
+ *hub_address = udev->parent->devnum;
+ *hub_port = udev->portnr;
+ return;
+ }
+
+ printf("dwc2: Error cannot find high speed parent of usb-1 device\n");
+ *hub_address = *hub_port = 0;
+}
+#endif
+
+/*
* Prepares a host channel for transferring packets to/from a specific
* endpoint. The HCCHARn register is set up with the characteristics specified
* in _hc. Host channel interrupts that may need to be serviced while this
--
2.1.4
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[U-Boot] [PATCH 5/6] usb: dwc2: add support for SPLIT transactions
In contrast to non-SPLIT transfers each transaction has to be submitted
as an individual chunk. Handling of ACK/NAk/NYET handshakes depends on
transaction (non-SPLIT/SSPLIT/CSPLIT), thus inline the HCINT flag handling.
Signed-off-by: Stefan Brüns
---
drivers/usb/host/dwc2.c | 96 ++---
1 file changed, 83 insertions(+), 13 deletions(-)
diff --git a/drivers/usb/host/dwc2.c b/drivers/usb/host/dwc2.c
index 6496fcf..0bf3ee5 100644
--- a/drivers/usb/host/dwc2.c
+++ b/drivers/usb/host/dwc2.c
@@ -848,8 +848,7 @@ static int dwc2_eptype[] = {
};
int chunk_msg(struct dwc2_priv *priv, struct usb_device *dev,
- unsigned long pipe, int *pid, int in, void *buffer, int len,
- bool ignore_ack)
+ unsigned long pipe, int *pid, int in, void *buffer, int len)
{
struct dwc2_core_regs *regs = priv->regs;
struct dwc2_hc_regs *hc_regs = ®s->hc_regs[DWC2_HC_CHANNEL];
@@ -863,23 +862,50 @@ int chunk_msg(struct dwc2_priv *priv, struct usb_device
*dev,
uint32_t xfer_len;
uint32_t num_packets;
int stop_transfer = 0;
+ uint32_t hctsiz;
+ uint32_t hcint;
+ uint32_t hcint_rem;
+ uint8_t do_split = 0;
+ uint8_t complete_split = 0;
+ uint8_t start_again = 0;
+ uint8_t hub_addr = 0;
+ uint8_t hub_port = 0;
debug("%s: msg: pipe %lx pid %d in %d len %d\n", __func__, pipe, *pid,
in, len);
+ /* Initialize channel */
+ dwc_otg_hc_init(regs, DWC2_HC_CHANNEL, dev, devnum, ep, in,
+ eptype, max);
+
+ /* Check if the target is a FS/LS device behind a HS hub */
+ if (dev->speed != USB_SPEED_HIGH) {
+ uint32_t hprt0 = readl(®s->hprt0);
+ if ((hprt0 & DWC2_HPRT0_PRTSPD_MASK) ==
+ DWC2_HPRT0_PRTSPD_HIGH) {
+ do_split = 1;
+ dwc_find_hub_address_port(dev, &hub_addr, &hub_port);
+ }
+ }
+
do {
- /* Initialize channel */
- dwc_otg_hc_init(regs, DWC2_HC_CHANNEL, dev, devnum, ep, in,
- eptype, max);
+ /* Clear old interrupt conditions for this host channel. */
+ writel(0x3fff, &hc_regs->hcint);
+
+ if (do_split)
+ dwc_otg_hc_init_split(regs, DWC2_HC_CHANNEL, hub_addr,
+ hub_port, complete_split);
xfer_len = len - done;
+ if (do_split && xfer_len > max)
+ xfer_len = max;
if (xfer_len > CONFIG_DWC2_MAX_TRANSFER_SIZE)
xfer_len = CONFIG_DWC2_MAX_TRANSFER_SIZE - max + 1;
if (xfer_len > DWC2_DATA_BUF_SIZE)
xfer_len = DWC2_DATA_BUF_SIZE - max + 1;
/* Make sure that xfer_len is a multiple of max packet size. */
- if (xfer_len > 0) {
+ if (xfer_len > max) {
num_packets = (xfer_len + max - 1) / max;
if (num_packets > CONFIG_DWC2_MAX_PACKET_COUNT) {
num_packets = CONFIG_DWC2_MAX_PACKET_COUNT;
@@ -918,10 +944,54 @@ int chunk_msg(struct dwc2_priv *priv, struct usb_device
*dev,
(1 << DWC2_HCCHAR_MULTICNT_OFFSET) |
DWC2_HCCHAR_CHEN);
- ret = wait_for_chhltd(regs, &sub, pid, ignore_ack);
+ ret = wait_for_bit(&hc_regs->hcint, DWC2_HCINT_CHHLTD, true);
if (ret)
break;
+ hcint = readl(&hc_regs->hcint);
+ hcint_rem = hcint & ~(DWC2_HCINT_XFERCOMP | DWC2_HCINT_CHHLTD);
+
+ hctsiz = readl(&hc_regs->hctsiz);
+ sub = (hctsiz & DWC2_HCTSIZ_XFERSIZE_MASK) >>
+ DWC2_HCTSIZ_XFERSIZE_OFFSET;
+ *pid = (hctsiz & DWC2_HCTSIZ_PID_MASK) >>
+ DWC2_HCTSIZ_PID_OFFSET;
+
+ start_again = 0;
+ if (complete_split) {
+ complete_split = 0;
+ if (hcint_rem & DWC2_HCINT_NYET) {
+ hcint_rem &= ~DWC2_HCINT_NYET;
+ start_again = 1;
+ }
+ } else if (do_split) {
+ if (hcint_rem & DWC2_HCINT_NAK) {
+ hcint_rem &= ~DWC2_HCINT_NAK;
+ /* should never happen, as there are no
+* concurrent transactions */
+ printf("TT busy\n");
+ ret = -EINVAL;
+ } else if (hcint_rem & DWC2_HCINT_ACK) {
+ complete_split = 1;
+ start_again = 1;
+ }
+ }
[U-Boot] [PATCH 4/6] usb: dwc2: add helper function for setting SPLIT HC registers
Signed-off-by: Stefan Brüns
---
drivers/usb/host/dwc2.c | 19 ++-
1 file changed, 18 insertions(+), 1 deletion(-)
diff --git a/drivers/usb/host/dwc2.c b/drivers/usb/host/dwc2.c
index 2d97546..6496fcf 100644
--- a/drivers/usb/host/dwc2.c
+++ b/drivers/usb/host/dwc2.c
@@ -495,10 +495,27 @@ static void dwc_otg_hc_init(struct dwc2_core_regs *regs,
uint8_t hc_num,
*/
writel(hcchar, &hc_regs->hcchar);
- /* Program the HCSPLIT register for SPLITs */
+ /* Program the HCSPLIT register, default to no SPLIT */
writel(0, &hc_regs->hcsplt);
}
+static void dwc_otg_hc_init_split(struct dwc2_core_regs *regs,
+ uint8_t hc_num, uint8_t hub_devnum,
+ uint8_t hub_port, uint8_t complete_split)
+{
+ struct dwc2_hc_regs *hc_regs = ®s->hc_regs[hc_num];
+ uint32_t hcsplt = 0;
+
+ hcsplt = DWC2_HCSPLT_SPLTENA;
+ hcsplt |= hub_devnum << DWC2_HCSPLT_HUBADDR_OFFSET;
+ hcsplt |= hub_port << DWC2_HCSPLT_PRTADDR_OFFSET;
+ if (complete_split)
+ hcsplt |= 1 << DWC2_HCSPLT_COMPSPLT_OFFSET;
+
+ /* Program the HCSPLIT register for SPLITs */
+ writel(hcsplt, &hc_regs->hcsplt);
+}
+
/*
* DWC2 to USB API interface
*/
--
2.1.4
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[U-Boot] [PATCH 2/6] usb: dwc2: Handle NAK during CONTROL DATA and STATUS stage
A function is allowed to return NAKs during the DATA stage to control
data flow control. NAKs during the STATUS stage signal the function
is still processing the request.
Signed-off-by: Stefan Brüns
---
drivers/usb/host/dwc2.c | 37 -
1 file changed, 24 insertions(+), 13 deletions(-)
diff --git a/drivers/usb/host/dwc2.c b/drivers/usb/host/dwc2.c
index 5ef6deb..db3acd4 100644
--- a/drivers/usb/host/dwc2.c
+++ b/drivers/usb/host/dwc2.c
@@ -892,8 +892,8 @@ static int _submit_control_msg(struct dwc2_priv *priv,
struct usb_device *dev,
{
int devnum = usb_pipedevice(pipe);
int pid, ret, act_len;
- /* For CONTROL endpoint pid should start with DATA1 */
int status_direction;
+ unsigned long timeout;
if (devnum == priv->root_hub_devnum) {
dev->status = 0;
@@ -907,26 +907,37 @@ static int _submit_control_msg(struct dwc2_priv *priv,
struct usb_device *dev,
if (ret)
return ret;
+ timeout = get_timer(0) + USB_TIMEOUT_MS(pipe);
if (buffer) {
+ /* DATA stage */
pid = DWC2_HC_PID_DATA1;
- ret = chunk_msg(priv, dev, pipe, &pid, usb_pipein(pipe), buffer,
- len, false);
+ act_len = 0;
+ do {
+ if (get_timer(0) > timeout) {
+ printf("Timeout during CONTROL DATA stage\n");
+ return -ETIMEDOUT;
+ }
+ ret = chunk_msg(priv, dev, pipe, &pid, usb_pipein(pipe),
+ buffer, len, false);
+ act_len += dev->act_len;
+ buffer += dev->act_len;
+ len -= dev->act_len;
+ } while (len && (ret == -EAGAIN));
if (ret)
return ret;
- act_len = dev->act_len;
- } /* End of DATA stage */
- else
+ status_direction = usb_pipeout(pipe);
+ } else {
+ /* No-data CONTROL always ends with an IN transaction */
+ status_direction = 1;
act_len = 0;
+ }
/* STATUS stage */
- if ((len == 0) || usb_pipeout(pipe))
- status_direction = 1;
- else
- status_direction = 0;
-
pid = DWC2_HC_PID_DATA1;
- ret = chunk_msg(priv, dev, pipe, &pid, status_direction,
- priv->status_buffer, 0, false);
+ do {
+ ret = chunk_msg(priv, dev, pipe, &pid, status_direction,
+ priv->status_buffer, 0, false);
+ } while (ret == -EAGAIN);
if (ret)
return ret;
--
2.1.4
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[U-Boot] [PATCH 6/6] usb: dwc2: remove no longer used wait_for_chhltd()
Signed-off-by: Stefan Brüns
---
drivers/usb/host/dwc2.c | 34 --
1 file changed, 34 deletions(-)
diff --git a/drivers/usb/host/dwc2.c b/drivers/usb/host/dwc2.c
index 0bf3ee5..baf78d8 100644
--- a/drivers/usb/host/dwc2.c
+++ b/drivers/usb/host/dwc2.c
@@ -806,40 +806,6 @@ static int dwc_otg_submit_rh_msg(struct dwc2_priv *priv,
struct usb_device *dev,
return stat;
}
-int wait_for_chhltd(struct dwc2_core_regs *regs, uint32_t *sub, int *toggle,
- bool ignore_ack)
-{
- uint32_t hcint_comp_hlt_ack = DWC2_HCINT_XFERCOMP | DWC2_HCINT_CHHLTD;
- struct dwc2_hc_regs *hc_regs = ®s->hc_regs[DWC2_HC_CHANNEL];
- int ret;
- uint32_t hcint, hctsiz;
-
- ret = wait_for_bit(&hc_regs->hcint, DWC2_HCINT_CHHLTD, true);
- if (ret)
- return ret;
-
- hcint = readl(&hc_regs->hcint);
- if (hcint & (DWC2_HCINT_NAK | DWC2_HCINT_FRMOVRUN))
- return -EAGAIN;
- if (ignore_ack)
- hcint &= ~DWC2_HCINT_ACK;
- else
- hcint_comp_hlt_ack |= DWC2_HCINT_ACK;
- if (hcint != hcint_comp_hlt_ack) {
- debug("%s: Error (HCINT=%08x)\n", __func__, hcint);
- return -EINVAL;
- }
-
- hctsiz = readl(&hc_regs->hctsiz);
- *sub = (hctsiz & DWC2_HCTSIZ_XFERSIZE_MASK) >>
- DWC2_HCTSIZ_XFERSIZE_OFFSET;
- *toggle = (hctsiz & DWC2_HCTSIZ_PID_MASK) >> DWC2_HCTSIZ_PID_OFFSET;
-
- debug("%s: sub=%u toggle=%d\n", __func__, *sub, *toggle);
-
- return 0;
-}
-
static int dwc2_eptype[] = {
DWC2_HCCHAR_EPTYPE_ISOC,
DWC2_HCCHAR_EPTYPE_INTR,
--
2.1.4
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[U-Boot] [PATCH 0/6] usb: dwc2: add SPLIT transaction support
First two patches are preparatory work. 3rd and 4th introduce helper functions. Patch 5 contains the core changes. Patch 6 is cleanup. The patch has been tested on RPi 1 B with several full speed and low speed devices. All devices enumerated successfully, with good output from "usb info". High speed devices, e.g. the SMSC9514 ethernet and mass storage devices still work. Neither CONFIG_DM_USB nor LS/FS devices directly connected to the root hub/hc have been tested, although both should be handled by the patches. Stefan Brüns (6): usb: dwc2: avoid out of bounds access usb: dwc2: Handle NAK during CONTROL DATA and STATUS stage usb: dwc2: determine TT hub address and port for split transactions usb: dwc2: add helper function for setting SPLIT HC registers usb: dwc2: add support for SPLIT transactions usb: dwc2: remove no longer used wait_for_chhltd() drivers/usb/host/dwc2.c | 240 +++- 1 file changed, 178 insertions(+), 62 deletions(-) -- 2.1.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/6] usb: dwc2: avoid out of bounds access
flush_dcache_range may access data after priv->aligned_buffer end if
len > DWC2_DATA_BUF_SIZE.
memcpy may access data after buffer end if done > 0
Signed-off-by: Stefan Brüns
---
drivers/usb/host/dwc2.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/usb/host/dwc2.c b/drivers/usb/host/dwc2.c
index 541c0f9..5ef6deb 100644
--- a/drivers/usb/host/dwc2.c
+++ b/drivers/usb/host/dwc2.c
@@ -823,12 +823,13 @@ int chunk_msg(struct dwc2_priv *priv, struct usb_device
*dev,
(*pid << DWC2_HCTSIZ_PID_OFFSET),
&hc_regs->hctsiz);
- if (!in) {
- memcpy(priv->aligned_buffer, (char *)buffer + done,
len);
+ if (!in && xfer_len) {
+ memcpy(priv->aligned_buffer, (char *)buffer + done,
+ xfer_len);
flush_dcache_range((unsigned long)priv->aligned_buffer,
(unsigned long)((void *)priv->aligned_buffer +
- roundup(len, ARCH_DMA_MINALIGN)));
+ roundup(xfer_len, ARCH_DMA_MINALIGN)));
}
writel(phys_to_bus((unsigned long)priv->aligned_buffer),
--
2.1.4
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Re: [U-Boot] [PATCH 1/6] arm: socfpga: cyclone5-socdk: Enabling mtd partitioning layout
On Sunday, December 13, 2015 at 01:49:06 AM, Chin Liang See wrote: > On Sun, 2015-12-13 at 01:01 +0100, Marek Vasut wrote: > > On Sunday, December 13, 2015 at 12:59:48 AM, Chin Liang See wrote: > > > On Sat, 2015-12-12 at 16:36 +0100, Marek Vasut wrote: > > > > On Saturday, December 12, 2015 at 07:30:46 AM, Chin Liang See > > > > > > > wrote: > > > [...] > > > > > > > > > Can you share the final layout before you roll out patches ? > > > > > > > > > > Sure, plan to do so but need to away from desk just now. > > > > > > > > > > Here is the old layout > > > > > 256k(spl) > > > > > 64k(env) > > > > > 64k(dtb) > > > > > 256k(boot) > > > > > 16m(kernel) > > > > > 16m(rootfs) > > > > > > > > > > The new one would like this > > > > > 256k(spl) > > > > > > > > I'd say you should just call this u-boot, see above for the > > > > rationale. > > > > > > > > > 256k(env) > > > > > 15872k(boot) > > > > > 16m(rootfs) > > > > > > > > > > The boot partition can be used as ubi part or raw partition. > > > > > It contains the linux dtb, u-boot and linux images. > > > > > > > > Is that an UBIFS partition ? If so, why don't you just use two > > > > UBI > > > > volumes ? > > > > > > For backward compatibility, it can be raw if user want to stick > > > with > > > old way. > > > > If you're breaking the partitioning layout anyway, you don't have to > > care about the "old way", right ? > > Actually this partition can be used as raw partition if user don't want > to store zimage and dtb as raw binary. You should never store raw zImage/dtb in a flash on a production system. This is real bad and can result in a corruption in the future when the system is in the field for a long time. I'd suggest to just use two UBI volumes, one for fitImage and the other for rootfs. > But the rootfs partition still can be presented to Linux as ubifs. That's for sure :) Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/6] arm: socfpga: cyclone5-socdk: Enabling mtd partitioning layout
On Sun, 2015-12-13 at 01:01 +0100, Marek Vasut wrote: > On Sunday, December 13, 2015 at 12:59:48 AM, Chin Liang See wrote: > > On Sat, 2015-12-12 at 16:36 +0100, Marek Vasut wrote: > > > On Saturday, December 12, 2015 at 07:30:46 AM, Chin Liang See > > > wrote: > > [...] > > > > > > > Can you share the final layout before you roll out patches ? > > > > > > > > Sure, plan to do so but need to away from desk just now. > > > > > > > > Here is the old layout > > > > 256k(spl) > > > > 64k(env) > > > > 64k(dtb) > > > > 256k(boot) > > > > 16m(kernel) > > > > 16m(rootfs) > > > > > > > > The new one would like this > > > > 256k(spl) > > > > > > I'd say you should just call this u-boot, see above for the > > > rationale. > > > > > > > 256k(env) > > > > 15872k(boot) > > > > 16m(rootfs) > > > > > > > > The boot partition can be used as ubi part or raw partition. > > > > It contains the linux dtb, u-boot and linux images. > > > > > > Is that an UBIFS partition ? If so, why don't you just use two > > > UBI > > > volumes ? > > > > For backward compatibility, it can be raw if user want to stick > > with > > old way. > > If you're breaking the partitioning layout anyway, you don't have to > care about the "old way", right ? Actually this partition can be used as raw partition if user want to store zimage and dtb as raw binary. But the rootfs partition still can be presented to Linux as ubifs. Thanks Chin Liang > > Best regards, > Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/6] arm: socfpga: cyclone5-socdk: Enabling mtd partitioning layout
On Sun, 2015-12-13 at 01:01 +0100, Marek Vasut wrote: > On Sunday, December 13, 2015 at 12:59:48 AM, Chin Liang See wrote: > > On Sat, 2015-12-12 at 16:36 +0100, Marek Vasut wrote: > > > On Saturday, December 12, 2015 at 07:30:46 AM, Chin Liang See > > > wrote: > > [...] > > > > > > > Can you share the final layout before you roll out patches ? > > > > > > > > Sure, plan to do so but need to away from desk just now. > > > > > > > > Here is the old layout > > > > 256k(spl) > > > > 64k(env) > > > > 64k(dtb) > > > > 256k(boot) > > > > 16m(kernel) > > > > 16m(rootfs) > > > > > > > > The new one would like this > > > > 256k(spl) > > > > > > I'd say you should just call this u-boot, see above for the > > > rationale. > > > > > > > 256k(env) > > > > 15872k(boot) > > > > 16m(rootfs) > > > > > > > > The boot partition can be used as ubi part or raw partition. > > > > It contains the linux dtb, u-boot and linux images. > > > > > > Is that an UBIFS partition ? If so, why don't you just use two > > > UBI > > > volumes ? > > > > For backward compatibility, it can be raw if user want to stick > > with > > old way. > > If you're breaking the partitioning layout anyway, you don't have to > care about the "old way", right ? Actually this partition can be used as raw partition if user don't want to store zimage and dtb as raw binary. But the rootfs partition still can be presented to Linux as ubifs. Thanks Chin Liang > > Best regards, > Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/2] arm: lpc32xx: switch serial console to driver model
On NXP LPC32xx platform for non-SPL builds the change adds
standard (NS16550) and high-speed UARTs to driver model.
Due to specific of DM NS16550 device description UART clock can not be
got in runtime and by default it is set to 13MHz, if board PERIPH_CLK
is different, this should be specified in board configuration file.
For SPL builds HSUARTs are disabled and non-DM NS16550 driver is
compiled, if needed.
The change also updates default configs of devkit3250 and work_92105
boards to reflect updates in platform files.
Signed-off-by: Vladimir Zapolskiy
---
arch/arm/cpu/arm926ejs/lpc32xx/devices.c | 37 --
arch/arm/include/asm/arch-lpc32xx/config.h | 32 +++---
configs/devkit3250_defconfig | 1 +
configs/work_92105_defconfig | 1 +
4 files changed, 56 insertions(+), 15 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/lpc32xx/devices.c
b/arch/arm/cpu/arm926ejs/lpc32xx/devices.c
index b1c3f8f..447d0cd 100644
--- a/arch/arm/cpu/arm926ejs/lpc32xx/devices.c
+++ b/arch/arm/cpu/arm926ejs/lpc32xx/devices.c
@@ -5,12 +5,14 @@
*/
#include
-#include
+#include
+#include
+#include
+
#include
#include
#include
#include
-#include
static struct clk_pm_regs*clk = (struct clk_pm_regs *)CLK_PM_BASE;
static struct uart_ctrl_regs *ctrl = (struct uart_ctrl_regs *)UART_CTRL_BASE;
@@ -41,6 +43,37 @@ void lpc32xx_uart_init(unsigned int uart_id)
&clk->u3clk + (uart_id - 3));
}
+#if !CONFIG_IS_ENABLED(OF_CONTROL) && !defined(CONFIG_SPL_BUILD)
+static const struct ns16550_platdata lpc32xx_uart[] = {
+ { UART3_BASE, 2, CONFIG_SYS_NS16550_CLK },
+ { UART4_BASE, 2, CONFIG_SYS_NS16550_CLK },
+ { UART5_BASE, 2, CONFIG_SYS_NS16550_CLK },
+ { UART6_BASE, 2, CONFIG_SYS_NS16550_CLK },
+};
+
+#if defined(CONFIG_LPC32XX_HSUART)
+static const struct lpc32xx_hsuart_platdata lpc32xx_hsuart[] = {
+ { HS_UART1_BASE, },
+ { HS_UART2_BASE, },
+ { HS_UART7_BASE, },
+};
+#endif
+
+U_BOOT_DEVICES(lpc32xx_uarts) = {
+#if defined(CONFIG_LPC32XX_HSUART)
+ { "lpc32xx_hsuart", &lpc32xx_hsuart[0], },
+ { "lpc32xx_hsuart", &lpc32xx_hsuart[1], },
+#endif
+ { "ns16550_serial", &lpc32xx_uart[0], },
+ { "ns16550_serial", &lpc32xx_uart[1], },
+ { "ns16550_serial", &lpc32xx_uart[2], },
+ { "ns16550_serial", &lpc32xx_uart[3], },
+#if defined(CONFIG_LPC32XX_HSUART)
+ { "lpc32xx_hsuart", &lpc32xx_hsuart[2], },
+#endif
+};
+#endif
+
void lpc32xx_dma_init(void)
{
/* Enable DMA interface */
diff --git a/arch/arm/include/asm/arch-lpc32xx/config.h
b/arch/arm/include/asm/arch-lpc32xx/config.h
index 521bff1..27e60e1 100644
--- a/arch/arm/include/asm/arch-lpc32xx/config.h
+++ b/arch/arm/include/asm/arch-lpc32xx/config.h
@@ -16,16 +16,21 @@
#define CONFIG_NR_DRAM_BANKS_MAX 2
/* UART configuration */
-#if (CONFIG_SYS_LPC32XX_UART >= 3) && (CONFIG_SYS_LPC32XX_UART <= 6)
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_CONS_INDEX (CONFIG_SYS_LPC32XX_UART - 2)
-#elif (CONFIG_SYS_LPC32XX_UART == 1) || (CONFIG_SYS_LPC32XX_UART == 2) || \
+#if(CONFIG_SYS_LPC32XX_UART == 1) || (CONFIG_SYS_LPC32XX_UART == 2) || \
(CONFIG_SYS_LPC32XX_UART == 7)
+#if defined(CONFIG_SPL_BUILD)
+/* SPL images do not support LPC32xx HSUART, UART5 is selected for SPL */
+#undef CONFIG_SYS_LPC32XX_UART
+#define CONFIG_SYS_LPC32XX_UART5
+#endif
+
+#if !defined(CONFIG_LPC32XX_HSUART)
#define CONFIG_LPC32XX_HSUART
-#else
-#error "define CONFIG_SYS_LPC32XX_UART in the range from 1 to 7"
+#endif
#endif
+#if defined(CONFIG_SPL_BUILD)
+#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE-4
#define CONFIG_SYS_NS16550_CLK get_serial_clock()
@@ -33,15 +38,16 @@
#define CONFIG_SYS_NS16550_COM2UART4_BASE
#define CONFIG_SYS_NS16550_COM3UART5_BASE
#define CONFIG_SYS_NS16550_COM4UART6_BASE
+#endif
-#if defined(CONFIG_LPC32XX_HSUART)
-#ifCONFIG_SYS_LPC32XX_UART == 1
-#define HS_UART_BASE HS_UART1_BASE
-#elif CONFIG_SYS_LPC32XX_UART == 2
-#define HS_UART_BASE HS_UART2_BASE
-#else /* CONFIG_SYS_LPC32XX_UART == 7 */
-#define HS_UART_BASE HS_UART7_BASE
+#if !defined(CONFIG_SYS_NS16550_CLK)
+#define CONFIG_SYS_NS16550_CLK 1300
#endif
+
+#if !defined(CONFIG_LPC32XX_HSUART) || defined(CONFIG_SPL_BUILD)
+#define CONFIG_CONS_INDEX (CONFIG_SYS_LPC32XX_UART - 2)
+#else
+#define CONFIG_CONS_INDEX CONFIG_SYS_LPC32XX_UART
#endif
#define CONFIG_SYS_BAUDRATE_TABLE \
diff --git a/configs/devkit3250_defconfig b/configs/devkit3250_defconfig
index 64a0fb0..0abb8e0 100644
--- a/configs/devkit3250_defconfig
+++ b/configs/devkit3250_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_TARGET_DEVKIT3250=y
+CONFIG_DM_SERIAL=y
CONFIG_DM_GPIO=y
CONFIG_SPL=y
# CONFIG_CMD_FPGA is not set
[U-Boot] [PATCH 2/2] arm: lpc32xx: switch SPL builds to driver model
For NXP LPC32xx boards the change enables SPL_DM option, this allows
to use any driver model UART driver in SPL images, hence a restriction
on HSUART in SPL image is removed and well as definitions for non-DM
NS16550 driver, its DM version is used instead.
Note, CONFIG_SPL_DM option noticeably increases SPL image, if just
NAND SLC and DM version of NS16650 are included to the image, the size
of SPL image is increased almost in two times from 10672 bytes to
19704 bytes.
If SPL image is downloaded from a small page NAND device, then this
can cause a problem, according to the LPC32xx User's Manual the
maximum size of a secondary bootloader stored on small page NAND flash
should not exceed 15.5KB (maximum size of a secondary bootloader on a
large page NAND is 54KB).
Because SPL_DM requires malloc(), enable CONFIG_SYS_MALLOC_SIMPLE for
all LPC32xx boards in shared config.h file.
Signed-off-by: Vladimir Zapolskiy
---
arch/arm/cpu/arm926ejs/lpc32xx/devices.c | 2 +-
arch/arm/include/asm/arch-lpc32xx/config.h | 24 ++--
configs/devkit3250_defconfig | 1 +
configs/work_92105_defconfig | 1 +
4 files changed, 9 insertions(+), 19 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/lpc32xx/devices.c
b/arch/arm/cpu/arm926ejs/lpc32xx/devices.c
index 447d0cd..1fab875 100644
--- a/arch/arm/cpu/arm926ejs/lpc32xx/devices.c
+++ b/arch/arm/cpu/arm926ejs/lpc32xx/devices.c
@@ -43,7 +43,7 @@ void lpc32xx_uart_init(unsigned int uart_id)
&clk->u3clk + (uart_id - 3));
}
-#if !CONFIG_IS_ENABLED(OF_CONTROL) && !defined(CONFIG_SPL_BUILD)
+#if !CONFIG_IS_ENABLED(OF_CONTROL)
static const struct ns16550_platdata lpc32xx_uart[] = {
{ UART3_BASE, 2, CONFIG_SYS_NS16550_CLK },
{ UART4_BASE, 2, CONFIG_SYS_NS16550_CLK },
diff --git a/arch/arm/include/asm/arch-lpc32xx/config.h
b/arch/arm/include/asm/arch-lpc32xx/config.h
index 27e60e1..a9f057e 100644
--- a/arch/arm/include/asm/arch-lpc32xx/config.h
+++ b/arch/arm/include/asm/arch-lpc32xx/config.h
@@ -15,36 +15,24 @@
#define CONFIG_NR_DRAM_BANKS_MAX 2
-/* UART configuration */
-#if(CONFIG_SYS_LPC32XX_UART == 1) || (CONFIG_SYS_LPC32XX_UART == 2) || \
- (CONFIG_SYS_LPC32XX_UART == 7)
+/* SPL build configuration */
#if defined(CONFIG_SPL_BUILD)
-/* SPL images do not support LPC32xx HSUART, UART5 is selected for SPL */
-#undef CONFIG_SYS_LPC32XX_UART
-#define CONFIG_SYS_LPC32XX_UART5
+#define CONFIG_SYS_MALLOC_SIMPLE
#endif
+/* UART configuration */
+#if(CONFIG_SYS_LPC32XX_UART == 1) || (CONFIG_SYS_LPC32XX_UART == 2) || \
+ (CONFIG_SYS_LPC32XX_UART == 7)
#if !defined(CONFIG_LPC32XX_HSUART)
#define CONFIG_LPC32XX_HSUART
#endif
#endif
-#if defined(CONFIG_SPL_BUILD)
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE-4
-#define CONFIG_SYS_NS16550_CLK get_serial_clock()
-
-#define CONFIG_SYS_NS16550_COM1UART3_BASE
-#define CONFIG_SYS_NS16550_COM2UART4_BASE
-#define CONFIG_SYS_NS16550_COM3UART5_BASE
-#define CONFIG_SYS_NS16550_COM4UART6_BASE
-#endif
-
#if !defined(CONFIG_SYS_NS16550_CLK)
#define CONFIG_SYS_NS16550_CLK 1300
#endif
-#if !defined(CONFIG_LPC32XX_HSUART) || defined(CONFIG_SPL_BUILD)
+#if !defined(CONFIG_LPC32XX_HSUART)
#define CONFIG_CONS_INDEX (CONFIG_SYS_LPC32XX_UART - 2)
#else
#define CONFIG_CONS_INDEX CONFIG_SYS_LPC32XX_UART
diff --git a/configs/devkit3250_defconfig b/configs/devkit3250_defconfig
index 0abb8e0..87c137d 100644
--- a/configs/devkit3250_defconfig
+++ b/configs/devkit3250_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_TARGET_DEVKIT3250=y
+CONFIG_SPL_DM=y
CONFIG_DM_SERIAL=y
CONFIG_DM_GPIO=y
CONFIG_SPL=y
diff --git a/configs/work_92105_defconfig b/configs/work_92105_defconfig
index a5a108e..db69345 100644
--- a/configs/work_92105_defconfig
+++ b/configs/work_92105_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_TARGET_WORK_92105=y
+CONFIG_SPL_DM=y
CONFIG_DM_SERIAL=y
CONFIG_DM_GPIO=y
CONFIG_SPL=y
--
2.1.4
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[U-Boot] [PATCH 0/2] arm: lpc32xx: use driver model serial console drivers
The change enables DM versions of NXP LPC32xx standard (NS16550) and high-speed UART drivers for both ordinary and SPL U-boot images. The change increases the size of SPL images over a maximum size limit for a secondary bootloader, if it is downloaded from a small page NAND flash, but this does not concern any maintained LPC32xx boards. Anyhow this SPL_DM specific change is separated to a stand alone commit. The change depends on high-speed UART driver switched to DM: https://patchwork.ozlabs.org/patch/556061/ Albert, I send the change to you before completion of DM HSUART review in case if you have any comments and because the change touches one board, which is maintained by you. Vladimir Zapolskiy (2): arm: lpc32xx: switch serial console to driver model arm: lpc32xx: switch SPL builds to driver model arch/arm/cpu/arm926ejs/lpc32xx/devices.c | 37 -- arch/arm/include/asm/arch-lpc32xx/config.h | 36 - configs/devkit3250_defconfig | 2 ++ configs/work_92105_defconfig | 2 ++ 4 files changed, 54 insertions(+), 23 deletions(-) -- 2.1.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 10/11] mvebu: Support Synology DS414
This adds support for the MV78230 based DS414 NAS by Synology. The relevant bits have been extracted from the 'synogpl-5004-armadaxp' package Synology kindly published, garnished with a fair amount of trial-and-error. Sadly, support is far from perfect. The major parts I have failed in are SATA and XHCI support. Details about these and some other things follow: SATA Support There is a Marvell 88SX7042 controller attached to PCIe which is supported by Linux's sata_mv driver but sadly not U-Boot's mvsata_ide. I'm not sure if extending the latter to support PCI devices is worth the effort at all. Porting sata_mv from Linux exceeded my brain's capacities. :( XHCI Support There is an EtronTech EJ168A XHCI controller attached to PCIe which drives the two rear USB3 ports. After a bit of playing around I managed to get it recognized by xhci-pci, but never was able to access any devices attached to it. Enabling it in ds414 board config shows that it does not respond to commands for whatever reason. The (somewhat) bright side to it is that it is not even supported in Synology's customized U-Boot, but that also means nowhere to steal the relevant bits from. EHCI Support This seems functional after issuing 'usb start'. At least it detects USB storage devices, and IIRC reading from them was OK. OTOH Linux fails to register the controller if 'usb start' wasn't given before in U-Boot. According to Synology sources, this board seems to support USB device (gadget?) mode. Though I didn't play around with it. PCIe Support This is fine, but trying to gate the clocks of unused lanes will hang PCI enum. In addition to that, pci_mvebu seems not to support DM_PCI. DDR3 Training - Marvell/Synology uses eight PUPs instead of four. Does not look like this is meant to be customized in mainline U-Boot at all. OTOH I have no idea what a "PUP" actually is. PEX Init Synology uses different values than mainline U-Boot with this patch: pex_max_unit_get returns 2, pex_max_if_get returns 7 and max_serdes_lines is set to 7. Not changing this seems to not have an impact, although I'm not entirely sure it does not cause issues I am not aware of. Signed-off-by: Phil Sutter --- arch/arm/Kconfig | 1 + arch/arm/dts/Makefile | 2 + arch/arm/dts/armada-xp-synology-ds414.dts | 330 + arch/arm/mach-mvebu/Kconfig| 3 + arch/arm/mach-mvebu/serdes/axp/board_env_spec.h| 5 +- .../arm/mach-mvebu/serdes/axp/high_speed_env_lib.c | 8 +- board/Synology/ds414/Kconfig | 12 + board/Synology/ds414/Makefile | 1 + board/Synology/ds414/ds414.c | 173 +++ board/Synology/ds414/kwbimage.cfg | 12 + configs/ds414_defconfig| 12 + include/configs/ds414.h| 153 ++ 12 files changed, 709 insertions(+), 3 deletions(-) create mode 100644 arch/arm/dts/armada-xp-synology-ds414.dts create mode 100644 board/Synology/ds414/Kconfig create mode 100644 board/Synology/ds414/Makefile create mode 100644 board/Synology/ds414/ds414.c create mode 100644 board/Synology/ds414/kwbimage.cfg create mode 100644 configs/ds414_defconfig create mode 100644 include/configs/ds414.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 7383975..4ea56e7 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -807,6 +807,7 @@ source "board/hisilicon/hikey/Kconfig" source "board/imx31_phycore/Kconfig" source "board/isee/igep0033/Kconfig" source "board/maxbcm/Kconfig" +source "board/Synology/ds414/Kconfig" source "board/mpl/vcma9/Kconfig" source "board/olimex/mx23_olinuxino/Kconfig" source "board/phytec/pcm051/Kconfig" diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 03f984a..d6fc0bb 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -51,6 +51,8 @@ dtb-$(CONFIG_ARCH_MVEBU) += \ armada-388-gp.dtb \ armada-xp-gp.dtb +dtb-$(CONFIG_TARGET_DS414) += armada-xp-synology-ds414.dtb + dtb-$(CONFIG_ARCH_UNIPHIER) += \ uniphier-ph1-ld4-ref.dtb \ uniphier-ph1-ld6b-ref.dtb \ diff --git a/arch/arm/dts/armada-xp-synology-ds414.dts b/arch/arm/dts/armada-xp-synology-ds414.dts new file mode 100644 index 000..749fdba --- /dev/null +++ b/arch/arm/dts/armada-xp-synology-ds414.dts @@ -0,0 +1,330 @@ +/* + * Device Tree file for Synology DS414 + * + * Copyright (C) 2014, Arnaud EBALARD + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + * + * Note: this Device Tree assumes that the bootloader has remapped the + * internal reg
[U-Boot] [PATCH 11/11] common: Implement Synology specific command set
Synology keeps per item configuration in a dedicated 'partition' in SPI
flash, namely the one named 'vendor' in DTS file. It contains the two
NICs MAC addresses as well as the item's serial number. I didn't find a
way to have this information extracted automatically, therefore
implemented 'syno populate_env' command which extracts the three values
and puts them into environment. To make things permanent though, one has
to 'saveenv'.
Another command is 'syno clk_gate', which allows to change the clock
gating which is done in DS414 board file.
Signed-off-by: Phil Sutter
---
common/Makefile | 1 +
common/cmd_syno.c | 225
include/configs/ds414.h | 1 +
3 files changed, 227 insertions(+)
create mode 100644 common/cmd_syno.c
diff --git a/common/Makefile b/common/Makefile
index 2a1d9f8..36b65fd 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -217,6 +217,7 @@ obj-$(CONFIG_USB_KEYBOARD) += usb_kbd.o
obj-$(CONFIG_CMD_DFU) += cmd_dfu.o
obj-$(CONFIG_CMD_GPT) += cmd_gpt.o
obj-$(CONFIG_CMD_ETHSW) += cmd_ethsw.o
+obj-$(CONFIG_CMD_SYNO) += cmd_syno.o
# Power
obj-$(CONFIG_CMD_PMIC) += cmd_pmic.o
diff --git a/common/cmd_syno.c b/common/cmd_syno.c
new file mode 100644
index 000..166f0d5
--- /dev/null
+++ b/common/cmd_syno.c
@@ -0,0 +1,225 @@
+/*
+ * Commands to deal with Synology specifics.
+ *
+ * Copyright (C) 2015 Phil Sutter
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include "../drivers/ddr/marvell/axp/ddr3_init.h"
+
+#define ETH_ALEN 6
+#define ETHADDR_MAX4
+#define SYNO_SN_TAG"SN="
+#define SYNO_CHKSUM_TAG"CHK="
+
+
+static int do_syno_populate(int argc, char * const argv[])
+{
+ unsigned int bus = CONFIG_SF_DEFAULT_BUS;
+ unsigned int cs = CONFIG_SF_DEFAULT_CS;
+ unsigned int speed = CONFIG_SF_DEFAULT_SPEED;
+ unsigned int mode = CONFIG_SF_DEFAULT_MODE;
+ struct spi_flash *flash;
+ unsigned long addr = 0x8; /* XXX: parameterize this? */
+ loff_t offset = 0x007d;
+ loff_t len = 0x0001;
+ char *buf, *bufp;
+ char var[128];
+ char val[128];
+ int ret, n;
+
+ /* XXX: arg parsing to select flash here? */
+
+ flash = spi_flash_probe(bus, cs, speed, mode);
+ if (!flash) {
+ printf("Failed to initialize SPI flash at %u:%u\n", bus, cs);
+ return 1;
+ }
+
+ buf = map_physmem(addr, len, MAP_WRBACK);
+ if (!buf) {
+ puts("Failed to map physical memory\n");
+ return 1;
+ }
+
+ ret = spi_flash_read(flash, offset, len, buf);
+ if (ret) {
+ puts("Failed to read from SPI flash\n");
+ goto out_unmap;
+ }
+
+ for (n = 0; n < ETHADDR_MAX; n++) {
+ char ethaddr[ETH_ALEN];
+ int i, sum = 0;
+ unsigned char csum = 0;
+
+ for (i = 0, bufp = buf + n * 7; i < ETH_ALEN; i++) {
+ sum += bufp[i];
+ csum += bufp[i];
+ ethaddr[i] = bufp[i];
+ }
+ if (!sum) /* MAC address empty */
+ continue;
+ if (csum != bufp[i]) { /* seventh byte is checksum value */
+ printf("Invalid MAC address for interface %d!\n", n);
+ continue;
+ }
+ if (n == 0)
+ sprintf(var, "ethaddr");
+ else
+ sprintf(var, "eth%daddr", n);
+ snprintf(val, sizeof(val) - 1,
+"%02x:%02x:%02x:%02x:%02x:%02x",
+ethaddr[0], ethaddr[1], ethaddr[2],
+ethaddr[3], ethaddr[4], ethaddr[5]);
+ printf("parsed %s = %s\n", var, val);
+ setenv(var, val);
+ }
+ if (!strncmp(buf + 32, SYNO_SN_TAG, strlen(SYNO_SN_TAG))) {
+ char *snp, *csump;
+ int csum = 0;
+ unsigned long c;
+
+ snp = bufp = buf + 32 + strlen(SYNO_SN_TAG);
+ for (n = 0; bufp[n] && bufp[n] != ','; n++)
+ csum += bufp[n];
+ bufp[n] = '\0';
+
+ /* should come right after, but you never know */
+ bufp = strstr(bufp + n + 1, SYNO_CHKSUM_TAG);
+ if (!bufp) {
+ printf("Serial number checksum tag missing!\n");
+ goto out_unmap;
+ }
+
+ csump = bufp += strlen(SYNO_CHKSUM_TAG);
+ for (n = 0; bufp[n] && bufp[n] != ','; n++)
+ ;
+ bufp[n] = '\0';
+
+ if (strict_strtoul(csump, 10, &c) || c != csum) {
+ puts("Invalid serial number found!\n");
+ ret = 1;
+
[U-Boot] [PATCH 09/11] mvebu: Add rudimental MV78320 support
Signed-off-by: Phil Sutter
---
arch/arm/mach-mvebu/cpu.c | 5 -
arch/arm/mach-mvebu/include/mach/soc.h | 1 +
2 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-mvebu/cpu.c b/arch/arm/mach-mvebu/cpu.c
index d3b9789..b485be7 100644
--- a/arch/arm/mach-mvebu/cpu.c
+++ b/arch/arm/mach-mvebu/cpu.c
@@ -71,7 +71,7 @@ int mvebu_soc_family(void)
{
u16 devid = (readl(MVEBU_REG_PCIE_DEVID) >> 16) & 0x;
- if (devid == SOC_MV78460_ID)
+ if (devid == SOC_MV78460_ID || devid == SOC_MV78230_ID)
return MVEBU_SOC_AXP;
if (devid == SOC_88F6810_ID || devid == SOC_88F6820_ID ||
@@ -90,6 +90,9 @@ int print_cpuinfo(void)
puts("SoC: ");
switch (devid) {
+ case SOC_MV78230_ID:
+ puts("MV78230-");
+ break;
case SOC_MV78460_ID:
puts("MV78460-");
break;
diff --git a/arch/arm/mach-mvebu/include/mach/soc.h
b/arch/arm/mach-mvebu/include/mach/soc.h
index a62a220..167446c 100644
--- a/arch/arm/mach-mvebu/include/mach/soc.h
+++ b/arch/arm/mach-mvebu/include/mach/soc.h
@@ -11,6 +11,7 @@
#ifndef _MVEBU_SOC_H
#define _MVEBU_SOC_H
+#define SOC_MV78230_ID 0x7823
#define SOC_MV78460_ID 0x7846
#define SOC_88F6810_ID 0x6810
#define SOC_88F6820_ID 0x6820
--
2.5.3
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[U-Boot] [PATCH 02/11] drivers/spi/kirkwood_spi: Fix debugging with CONFIG_DM_SPI
The debug printing tries to reference slave->bus and slave->cs which
don't exist when CONFIG_DM_SPI is defined.
Signed-off-by: Phil Sutter
---
drivers/spi/kirkwood_spi.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/spi/kirkwood_spi.c b/drivers/spi/kirkwood_spi.c
index e7b0982..0439bb2 100644
--- a/drivers/spi/kirkwood_spi.c
+++ b/drivers/spi/kirkwood_spi.c
@@ -161,8 +161,10 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen,
const void *dout,
unsigned int tmpdout, tmpdin;
int tm, isread = 0;
+#ifndef CONFIG_DM_SPI
debug("spi_xfer: slave %u:%u dout %p din %p bitlen %u\n",
slave->bus, slave->cs, dout, din, bitlen);
+#endif
if (flags & SPI_XFER_BEGIN)
spi_cs_activate(slave);
--
2.5.3
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[U-Boot] [PATCH 01/11] drivers/pci: Fix for debug builds without CONFIG_PCI_ENUM_ONLY
The debug printing references bar_res, which exists only if
CONFIG_PCI_ENUM_ONLY is not defined. Therefore move it into the ifdef'd
area.
Signed-off-by: Phil Sutter
---
drivers/pci/pci_auto_old.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/pci/pci_auto_old.c b/drivers/pci/pci_auto_old.c
index 932eab8..8f17779 100644
--- a/drivers/pci/pci_auto_old.c
+++ b/drivers/pci/pci_auto_old.c
@@ -98,11 +98,11 @@ void pciauto_setup_device(struct pci_controller *hose,
bar_res = prefetch;
else
bar_res = mem;
-#endif
debug("PCI Autoconfig: BAR %d, %s, size=0x%llx, ",
bar_nr, bar_res == prefetch ? "Prf" : "Mem",
(unsigned long long)bar_size);
+#endif
}
#ifndef CONFIG_PCI_ENUM_ONLY
--
2.5.3
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[U-Boot] [PATCH 04/11] README: Review the u-boot porting guide list
* There is no boards.cfg anymore, so drop (1). * Creating flash.c and u-boot.lds seems not mandatory as well. * Adjusting the enumerators for the above implicitly fixed for double items numbered (3). Signed-off-by: Phil Sutter --- README | 11 --- 1 file changed, 4 insertions(+), 7 deletions(-) diff --git a/README b/README index 4fee706..dcc9478 100644 --- a/README +++ b/README @@ -5153,14 +5153,11 @@ If the system board that you have is not listed, then you will need to port U-Boot to your hardware platform. To do this, follow these steps: -1. Add a new configuration option for your board to the toplevel -"boards.cfg" file, using the existing entries as examples. -Follow the instructions there to keep the boards in order. -2. Create a new directory to hold your board specific code. Add any +1. Create a new directory to hold your board specific code. Add any files you need. In your board directory, you will need at least -the "Makefile", a ".c", "flash.c" and "u-boot.lds". -3. Create a new configuration file "include/configs/.h" for -your board +the "Makefile" and a ".c". +2. Create a new configuration file "include/configs/.h" for +your board. 3. If you're porting U-Boot to a new CPU, then also create a new directory to hold your CPU specific code. Add any files you need. 4. Run "make _defconfig" with your new name. -- 2.5.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 00/11] Add support for Synology DS414 and some related fixes
This patch series ultimately adds support for Synology DS414 NAS after a few fixes: * Patches 1-3 and 5 fix various files for enabled debugging. * Patch 4 updates the board porting guide in README file. * Patches 6-8 hold crucial fixes necessary for DS414 support. * Patches 9 and 10 contain the actual board support, split into a generic part for MV78230 SoC and a board specific part for clarity. * Patch 11 adds a new command to deal with Synology specialties. In case you would like me to split this into multiple series, just let me know and I will resend. Phil Sutter (11): drivers/pci: Fix for debug builds without CONFIG_PCI_ENUM_ONLY drivers/spi/kirkwood_spi: Fix debugging with CONFIG_DM_SPI mvebu: Fix for non-DM ehci-marvell support README: Review the u-boot porting guide list axp: Fix debugging support in DDR3 write leveling drivers/pci/pci_mvebu: Fix for boards with X4 lanes mvebu: Fix shortcoming of Marvell BSP board detection drivers/ddr/marvell: Default DRAM_ECC to 0 mvebu: Add rudimental MV78320 support mvebu: Support Synology DS414 common: Implement Synology specific command set README | 11 +- arch/arm/Kconfig | 1 + arch/arm/dts/Makefile | 2 + arch/arm/dts/armada-xp-synology-ds414.dts | 330 + arch/arm/mach-mvebu/Kconfig| 3 + arch/arm/mach-mvebu/cpu.c | 26 +- arch/arm/mach-mvebu/include/mach/cpu.h | 3 + arch/arm/mach-mvebu/include/mach/soc.h | 10 +- arch/arm/mach-mvebu/serdes/axp/board_env_spec.h| 5 +- .../arm/mach-mvebu/serdes/axp/high_speed_env_lib.c | 11 +- board/Synology/ds414/Kconfig | 12 + board/Synology/ds414/Makefile | 1 + board/Synology/ds414/ds414.c | 173 +++ board/Synology/ds414/kwbimage.cfg | 12 + common/Makefile| 1 + common/cmd_syno.c | 225 ++ configs/ds414_defconfig| 12 + drivers/ddr/marvell/axp/ddr3_axp_config.h | 2 +- drivers/ddr/marvell/axp/ddr3_write_leveling.c | 4 +- drivers/pci/pci_auto_old.c | 2 +- drivers/pci/pci_mvebu.c| 21 ++ drivers/spi/kirkwood_spi.c | 2 + include/configs/ds414.h| 154 ++ 23 files changed, 1006 insertions(+), 17 deletions(-) create mode 100644 arch/arm/dts/armada-xp-synology-ds414.dts create mode 100644 board/Synology/ds414/Kconfig create mode 100644 board/Synology/ds414/Makefile create mode 100644 board/Synology/ds414/ds414.c create mode 100644 board/Synology/ds414/kwbimage.cfg create mode 100644 common/cmd_syno.c create mode 100644 configs/ds414_defconfig create mode 100644 include/configs/ds414.h -- 2.5.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 06/11] drivers/pci/pci_mvebu: Fix for boards with X4 lanes
Armada XP has support for X4 lanes, boards specify this in their
serdes_cfg. During PEX init in high_speed_env_lib.c, the configuration
is stored in GEN_PURP_RES_2_REG.
When enumerating PEX, subsequent interfaces of an X4 lane must be
skipped. Otherwise the enumeration hangs up the board.
The way this is implemented here is not exactly beautiful, but it mimics
how Marvell's BSP does it. Alternatively we could get the information
using board_serdes_cfg_get(), but that won't lead to clean code, either.
Especially since the ugly includes will have to be done anyway.
Signed-off-by: Phil Sutter
---
drivers/pci/pci_mvebu.c | 21 +
1 file changed, 21 insertions(+)
diff --git a/drivers/pci/pci_mvebu.c b/drivers/pci/pci_mvebu.c
index fd2744d..aab53f4 100644
--- a/drivers/pci/pci_mvebu.c
+++ b/drivers/pci/pci_mvebu.c
@@ -18,6 +18,11 @@
#include
#include
+#if defined(CONFIG_ARMADA_XP)
+#include "../ddr/marvell/axp/ddr3_init.h"
+#include "../../arch/arm/mach-mvebu/serdes/axp/board_env_spec.h"
+#endif
+
DECLARE_GLOBAL_DATA_PTR;
/* PCIe unit register offsets */
@@ -155,6 +160,16 @@ static void mvebu_get_port_lane(struct mvebu_pcie *pcie,
int pex_idx,
}
#endif
+#if defined(CONFIG_ARMADA_XP)
+static int mvebu_pex_unit_is_x4(int pex_idx)
+{
+ int pex_unit = pex_idx < 9 ? pex_idx >> 2 : 3;
+ u32 mask = (0x0f << (pex_unit * 8));
+
+ return (reg_read(GEN_PURP_RES_2_REG) & mask) == mask;
+}
+#endif
+
static inline bool mvebu_pcie_link_up(struct mvebu_pcie *pcie)
{
u32 val;
@@ -419,5 +434,11 @@ void pci_init_board(void)
writel(0, pcie->base + PCIE_BAR_HI_OFF(0));
bus = hose->last_busno + 1;
+
+#if defined(CONFIG_ARMADA_XP)
+ /* need to skip more for X4 links, otherwise scan will hang */
+ if (mvebu_pex_unit_is_x4(i))
+ i += 3;
+#endif
}
}
--
2.5.3
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[U-Boot] [PATCH 07/11] mvebu: Fix shortcoming of Marvell BSP board detection
Signed-off-by: Phil Sutter --- arch/arm/mach-mvebu/serdes/axp/high_speed_env_lib.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-mvebu/serdes/axp/high_speed_env_lib.c b/arch/arm/mach-mvebu/serdes/axp/high_speed_env_lib.c index 702273a..6c7738c 100644 --- a/arch/arm/mach-mvebu/serdes/axp/high_speed_env_lib.c +++ b/arch/arm/mach-mvebu/serdes/axp/high_speed_env_lib.c @@ -70,8 +70,9 @@ static u32 board_id_get(void) /* * Return 0 here for custom board as this should not be used * for custom boards. +* -- Spoke Marvell and forgot that DB_88F78XX0_BP_ID == 0. */ - return 0; + return INVALID_BOARD_ID; #endif } -- 2.5.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 03/11] mvebu: Fix for non-DM ehci-marvell support
This mimics the relevant code in mach-kirkwood headers. The
*_winctrl_calcsize functions are identical, as well as the MVCPU_WIN_*
macros. Implementing shared headers/code between mvebu and kirkwood is
left for someone with a better knowledge of how u-boot is organized
internally.
Signed-off-by: Phil Sutter
---
arch/arm/mach-mvebu/cpu.c | 21 +
arch/arm/mach-mvebu/include/mach/cpu.h | 3 +++
arch/arm/mach-mvebu/include/mach/soc.h | 9 -
3 files changed, 32 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-mvebu/cpu.c b/arch/arm/mach-mvebu/cpu.c
index 895ad92..d3b9789 100644
--- a/arch/arm/mach-mvebu/cpu.c
+++ b/arch/arm/mach-mvebu/cpu.c
@@ -46,6 +46,27 @@ void reset_cpu(unsigned long ignored)
;
}
+/*
+ * Window Size
+ * Used with the Base register to set the address window size and location.
+ * Must be programmed from LSB to MSB as sequence of ones followed by
+ * sequence of zeros. The number of ones specifies the size of the window in
+ * 64 KByte granularity (e.g., a value of 0x00FF specifies 256 = 16 MByte).
+ * NOTE: A value of 0x0 specifies 64-KByte size.
+ */
+unsigned int mvebu_winctrl_calcsize(unsigned int sizeval)
+{
+ int i;
+ unsigned int j = 0;
+ u32 val = sizeval >> 1;
+
+ for (i = 0; val >= 0x1; i++) {
+ j |= (1 << i);
+ val = val >> 1;
+ }
+ return 0x & j;
+}
+
int mvebu_soc_family(void)
{
u16 devid = (readl(MVEBU_REG_PCIE_DEVID) >> 16) & 0x;
diff --git a/arch/arm/mach-mvebu/include/mach/cpu.h
b/arch/arm/mach-mvebu/include/mach/cpu.h
index 5e8bf0c..484638b 100644
--- a/arch/arm/mach-mvebu/include/mach/cpu.h
+++ b/arch/arm/mach-mvebu/include/mach/cpu.h
@@ -13,6 +13,9 @@
#ifndef __ASSEMBLY__
+#define MVEBU_CPU_WIN_CTRL_DATA(size, target, attr, en) (en | (target << 4) \
+ | (attr << 8) | (mvebu_winctrl_calcsize(size) << 16))
+
#define MVEBU_REG_PCIE_DEVID (MVEBU_REG_PCIE_BASE + 0x00)
#define MVEBU_REG_PCIE_REVID (MVEBU_REG_PCIE_BASE + 0x08)
diff --git a/arch/arm/mach-mvebu/include/mach/soc.h
b/arch/arm/mach-mvebu/include/mach/soc.h
index 22abde0..a62a220 100644
--- a/arch/arm/mach-mvebu/include/mach/soc.h
+++ b/arch/arm/mach-mvebu/include/mach/soc.h
@@ -96,8 +96,15 @@
#define SDRAM_MAX_CS 4
#define SDRAM_ADDR_MASK0xFF00
+/* MVEBU USB Host controller */
+#define MVUSB0_BASEMVEBU_AXP_USB_BASE
+#define MVUSB0_CPU_ATTR_DRAM_CS0 CPU_ATTR_DRAM_CS0
+#define MVUSB0_CPU_ATTR_DRAM_CS1 CPU_ATTR_DRAM_CS1
+#define MVUSB0_CPU_ATTR_DRAM_CS2 CPU_ATTR_DRAM_CS2
+#define MVUSB0_CPU_ATTR_DRAM_CS3 CPU_ATTR_DRAM_CS3
+
/* MVEBU CPU memory windows */
-#define MVCPU_WIN_CTRL_DATACPU_WIN_CTRL_DATA
+#define MVCPU_WIN_CTRL_DATAMVEBU_CPU_WIN_CTRL_DATA
#define MVCPU_WIN_ENABLE CPU_WIN_ENABLE
#define MVCPU_WIN_DISABLE CPU_WIN_DISABLE
--
2.5.3
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[U-Boot] [PATCH 05/11] axp: Fix debugging support in DDR3 write leveling
If MV_DEBUG_WL is defined, DEBUG_WL_S and DEBUG_WL_D macros are missing.
In addition to that, get rid of debug output printing non-existent
counter variable.
Signed-off-by: Phil Sutter
---
drivers/ddr/marvell/axp/ddr3_write_leveling.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/ddr/marvell/axp/ddr3_write_leveling.c
b/drivers/ddr/marvell/axp/ddr3_write_leveling.c
index df3a3df..da384f3 100644
--- a/drivers/ddr/marvell/axp/ddr3_write_leveling.c
+++ b/drivers/ddr/marvell/axp/ddr3_write_leveling.c
@@ -22,6 +22,8 @@
DEBUG_WL_FULL_S(s); DEBUG_WL_FULL_D(d, l); DEBUG_WL_FULL_S("\n")
#ifdef MV_DEBUG_WL
+#define DEBUG_WL_S(s) puts(s)
+#define DEBUG_WL_D(d, l) printf("%x", d)
#define DEBUG_RL_S(s) \
debug_cond(ddr3_get_log_level() >= MV_LOG_LEVEL_2, "%s", s)
#define DEBUG_RL_D(d, l) \
@@ -1229,8 +1231,6 @@ static int ddr3_write_leveling_single_cs(u32 cs, u32
freq, int ratio_2to1,
DEBUG_WL_FULL_D((u32) phase, 1);
DEBUG_WL_FULL_S(", Delay = ");
DEBUG_WL_FULL_D((u32) delay, 1);
- DEBUG_WL_FULL_S(", Counter = ");
- DEBUG_WL_FULL_D((u32) i, 1);
DEBUG_WL_FULL_S("\n");
/* Drive DQS high for one cycle - All data PUPs */
--
2.5.3
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[U-Boot] [PATCH 08/11] drivers/ddr/marvell: Default DRAM_ECC to 0
Not all boards implementing an Armada XP chip are equipped with ECC RAM. Defining DRAM_ECC to 1 enables ECC without a chance to turn it off in board configs, which breaks DDR training for them. Signed-off-by: Phil Sutter --- drivers/ddr/marvell/axp/ddr3_axp_config.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/ddr/marvell/axp/ddr3_axp_config.h b/drivers/ddr/marvell/axp/ddr3_axp_config.h index a672044..800d2d1 100644 --- a/drivers/ddr/marvell/axp/ddr3_axp_config.h +++ b/drivers/ddr/marvell/axp/ddr3_axp_config.h @@ -44,7 +44,7 @@ * DDR3_TRAINING_DEBUG - Debug prints of internal code */ #define DDR_TARGET_FABRIC 5 -#define DRAM_ECC 1 +#define DRAM_ECC 0 #ifdef MV_DDR_32BIT #define BUS_WIDTH 32 -- 2.5.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/6] arm: socfpga: cyclone5-socdk: Enabling mtd partitioning layout
On Sunday, December 13, 2015 at 12:59:48 AM, Chin Liang See wrote: > On Sat, 2015-12-12 at 16:36 +0100, Marek Vasut wrote: > > On Saturday, December 12, 2015 at 07:30:46 AM, Chin Liang See wrote: > [...] > > > > > Can you share the final layout before you roll out patches ? > > > > > > Sure, plan to do so but need to away from desk just now. > > > > > > Here is the old layout > > > 256k(spl) > > > 64k(env) > > > 64k(dtb) > > > 256k(boot) > > > 16m(kernel) > > > 16m(rootfs) > > > > > > The new one would like this > > > 256k(spl) > > > > I'd say you should just call this u-boot, see above for the > > rationale. > > > > > 256k(env) > > > 15872k(boot) > > > 16m(rootfs) > > > > > > The boot partition can be used as ubi part or raw partition. > > > It contains the linux dtb, u-boot and linux images. > > > > Is that an UBIFS partition ? If so, why don't you just use two UBI > > volumes ? > > For backward compatibility, it can be raw if user want to stick with > old way. If you're breaking the partitioning layout anyway, you don't have to care about the "old way", right ? Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 4/4] arm: socfpga: socrates: Enabling U-Boot environment in QSPI
On Sat, 2015-12-12 at 23:50 +0100, Pavel Machek wrote: > On Sat 2015-12-12 08:47:41, Chin Liang See wrote: > > Enabling the support of storing U-Boot environment > > within serial NOR flash. By default, its still > > store into SDMMC > > > > Signed-off-by: Chin Liang See > > Cc: Dinh Nguyen > > Cc: Dinh Nguyen > > Cc: Pavel Machek > > Cc: Marek Vasut > > Cc: Stefan Roese > > > > > --- a/include/configs/socfpga_socrates.h > > +++ b/include/configs/socfpga_socrates.h > > @@ -54,9 +54,15 @@ > > > > #endif > > > > +/* U-Boot environment */ > > #define CONFIG_ENV_IS_IN_MMC > > +#ifdef CONFIG_ENV_IS_IN_MMC > > #define CONFIG_SYS_MMC_ENV_DEV 0 /* device 0 > > */ > > #define CONFIG_ENV_OFFSET 512 /* just after > > the MBR */ > > +#elif CONFIG_ENV_IS_IN_SPI_FLASH > > +#define CONFIG_ENV_SECT_SIZE (64 * 1024) > > +#define CONFIG_ENV_OFFSET 0x40 > > +#endif > > This configuration is again shared with all the boards that have NOR, > right? So time to create include/configs/socfpga_spi_nor.h or > something like that? > I can consolidate too into socfpga_common.h Thanks Chin Liang > Thanks, > Pavel ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/6] arm: socfpga: de0-nano-soc: Enabling mtd partitioning layout
On Sat, 2015-12-12 at 22:10 +0100, Pavel Machek wrote: > On Fri 2015-12-11 17:15:50, Chin Liang See wrote: > > Enabling mtd partitioning layout which indicate partition > > for various boot partition > > > > Signed-off-by: Chin Liang See > > Cc: Dinh Nguyen > > Cc: Dinh Nguyen > > Cc: Pavel Machek > > Cc: Marek Vasut > > Cc: Stefan Roese > > --- > > include/configs/socfpga_de0_nano_soc.h | 12 > > 1 file changed, 12 insertions(+) > > > > diff --git a/include/configs/socfpga_de0_nano_soc.h > > b/include/configs/socfpga_de0_nano_soc.h > > index 16e146c..c42175d 100644 > > --- a/include/configs/socfpga_de0_nano_soc.h > > +++ b/include/configs/socfpga_de0_nano_soc.h > > @@ -86,4 +86,16 @@ > > /* The rest of the configuration is shared */ > > #include > > > > +/* mtd partitioning for serial NOR flash */ > > +#if defined(CONFIG_CMD_UBI) || defined(CONFIG_CMD_SF) > > +#define MTDPARTS_DEFAULT "mtdparts=ff705000.spi:"\ > > + "256k(spl),"\ > > + "64k(env)," \ > > + "64k(dtb)," \ > > + "256k(boot)," \ > > + "16m(kernel)," \ > > + "16m(rootfs)," \ > > + "-(UBI)\0" > > +#endif > > + > > #endif /* __CONFIG_TERASIC_DE0_H__ */ > > Ok, three copies of the same table. Should it go to socfpga common? > You could at least do > > MTDPARTS_DEFAULT_SOCDK > > and then use > > #define MTDPARTS_DEFAULT MTDPARTS_DEFAULT_SOCDK > > in the socfpga_de0_nano_soc.h, so we don't have 3 copies of the same > table. > Yup, let me do that by putting them into socfpga_common.h Thanks Chin Liang > > Pavel > ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/6] arm: socfpga: de0-nano-soc: Enabling mtd partitioning layout
On Sat, 2015-12-12 at 22:45 +0100, Marek Vasut wrote: > On Saturday, December 12, 2015 at 10:10:00 PM, Pavel Machek wrote: > > On Fri 2015-12-11 17:15:50, Chin Liang See wrote: > > > Enabling mtd partitioning layout which indicate partition > > > for various boot partition > > > > > > Signed-off-by: Chin Liang See > > > Cc: Dinh Nguyen > > > Cc: Dinh Nguyen > > > Cc: Pavel Machek > > > Cc: Marek Vasut > > > Cc: Stefan Roese > > > --- > > > > > > include/configs/socfpga_de0_nano_soc.h | 12 > > > 1 file changed, 12 insertions(+) > > > > > > diff --git a/include/configs/socfpga_de0_nano_soc.h > > > b/include/configs/socfpga_de0_nano_soc.h index 16e146c..c42175d > > > 100644 > > > --- a/include/configs/socfpga_de0_nano_soc.h > > > +++ b/include/configs/socfpga_de0_nano_soc.h > > > @@ -86,4 +86,16 @@ > > > > > > /* The rest of the configuration is shared */ > > > #include > > > > > > +/* mtd partitioning for serial NOR flash */ > > > +#if defined(CONFIG_CMD_UBI) || defined(CONFIG_CMD_SF) > > > +#define MTDPARTS_DEFAULT "mtdparts=ff705000.spi:"\ > > > + "256k(spl),"\ > > > + "64k(env)," \ > > > + "64k(dtb)," \ > > > + "256k(boot)," \ > > > + "16m(kernel)," \ > > > + "16m(rootfs)," \ > > > + "-(UBI)\0" > > > +#endif > > > + > > > > > > #endif /* __CONFIG_TERASIC_DE0_H__ */ > > > > Ok, three copies of the same table. Should it go to socfpga common? > > You could at least do > > > > MTDPARTS_DEFAULT_SOCDK > > > > and then use > > > > #define MTDPARTS_DEFAULT MTDPARTS_DEFAULT_SOCDK > > > > in the socfpga_de0_nano_soc.h, so we don't have 3 copies of the > > same > > table. > > I'd rather suggest to do something like > > #ifndef MTDPARTS_DEFAULT > #define ... > #endif > > in socfpga_common.h . Even better would obviously be if we could just > scrap > this altogether and parse the MTD layout from OF. I dunno if we can > do that > nowadays, but that'd be great. > Yah this sound good. Let me do that by having them definied into socfpga_common.h Thanks Chin Liang > Best regards, > Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/6] arm: socfpga: cyclone5-socdk: Enabling mtd partitioning layout
On Sat, 2015-12-12 at 16:36 +0100, Marek Vasut wrote: > On Saturday, December 12, 2015 at 07:30:46 AM, Chin Liang See wrote: [...] > > > Can you share the final layout before you roll out patches ? > > > > Sure, plan to do so but need to away from desk just now. > > > > Here is the old layout > > 256k(spl) > > 64k(env) > > 64k(dtb) > > 256k(boot) > > 16m(kernel) > > 16m(rootfs) > > > > The new one would like this > > 256k(spl) > > I'd say you should just call this u-boot, see above for the > rationale. > > > 256k(env) > > 15872k(boot) > > 16m(rootfs) > > > > The boot partition can be used as ubi part or raw partition. > > It contains the linux dtb, u-boot and linux images. > > Is that an UBIFS partition ? If so, why don't you just use two UBI > volumes ? For backward compatibility, it can be raw if user want to stick with old way. Thanks Chin Liang > > > The environment will be used to determine the image offset for > > mentioned boot images from boot partition. > > > > Thanks > > Chin Liang ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V2] arm: novena: Switch novena to config_distro_bootcmd
On 2015-11-24, Marek Vasut wrote:
> From: Vagrant Cascadian
>
> Switch Novena to distro bootcmd
Anything remaining on this? Can we hope to see it in 2016.01?
> so it can be used with debian easily.
I suspect other distros would appreciate this too. :)
live well,
vagrant
> Signed-off-by: Vagrant Cascadian
> Signed-off-by: Marek Vasut
> Cc: Sean Cross
> Cc: Stefano Babic
> ---
> include/configs/novena.h | 23 ++-
> 1 file changed, 22 insertions(+), 1 deletion(-)
>
> V2: Add fdtfile to specify the device tree blob.
> Fix fdt_addr_r to point past kernel address.
>
> diff --git a/include/configs/novena.h b/include/configs/novena.h
> index 718989f..fc953f6 100644
> --- a/include/configs/novena.h
> +++ b/include/configs/novena.h
> @@ -16,6 +16,7 @@
> #define CONFIG_FIT
> #define CONFIG_KEYBOARD
>
> +#include
> #include "mx6_common.h"
>
> /* U-Boot Commands */
> @@ -58,7 +59,7 @@
> /* Booting Linux */
> #define CONFIG_BOOTFILE "fitImage"
> #define CONFIG_BOOTARGS "console=ttymxc1,115200 "
> -#define CONFIG_BOOTCOMMAND "run net_nfs"
> +#define CONFIG_BOOTCOMMAND "run distro_bootcmd ; run net_nfs"
> #define CONFIG_HOSTNAME novena
>
> /* Physical Memory Map */
> @@ -190,6 +191,7 @@
> #endif
>
> /* Extra U-Boot environment. */
> +#ifndef CONFIG_SPL_BUILD
> #define CONFIG_EXTRA_ENV_SETTINGS\
> "fdt_high=0x\0" \
> "initrd_high=0x\0" \
> @@ -199,6 +201,11 @@
> "rootdev=/dev/mmcblk0p2\0" \
> "netdev=eth0\0" \
> "kernel_addr_r="__stringify(CONFIG_LOADADDR)"\0"\
> + "pxefile_addr_r="__stringify(CONFIG_LOADADDR)"\0" \
> + "scriptaddr="__stringify(CONFIG_LOADADDR)"\0" \
> + "ramdisk_addr_r=0x2800\0" \
> + "fdt_addr_r=0x1800\0" \
> + "fdtfile=imx6q-novena.dtb\0"\
> "addcons=" \
> "setenv bootargs ${bootargs} " \
> "console=${consdev},${baudrate}\0" \
> @@ -242,5 +249,19 @@
> "fatwrite mmc 0:1 ${loadaddr} u-boot.img ${filesize} ; "\
> "fi ; " \
> "fi\0" \
> + BOOTENV
> +
> +#define BOOT_TARGET_DEVICES(func) \
> + func(MMC, mmc, 0) \
> + func(USB, usb, 0) \
> + func(SATA, sata, 0) \
> + func(PXE, pxe, na) \
> + func(DHCP, dhcp, na)
> +
> +#include
> +
> +#else
> +#define CONFIG_EXTRA_ENV_SETTINGS
> +#endif /* CONFIG_SPL_BUILD */
>
> #endif /* __CONFIG_H */
> --
> 2.1.4
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Re: [U-Boot] [PATCH 3/6] arm: socfpga: de0-nano-soc: Enabling mtd partitioning layout
On Saturday, December 12, 2015 at 10:10:00 PM, Pavel Machek wrote: > On Fri 2015-12-11 17:15:50, Chin Liang See wrote: > > Enabling mtd partitioning layout which indicate partition > > for various boot partition > > > > Signed-off-by: Chin Liang See > > Cc: Dinh Nguyen > > Cc: Dinh Nguyen > > Cc: Pavel Machek > > Cc: Marek Vasut > > Cc: Stefan Roese > > --- > > > > include/configs/socfpga_de0_nano_soc.h | 12 > > 1 file changed, 12 insertions(+) > > > > diff --git a/include/configs/socfpga_de0_nano_soc.h > > b/include/configs/socfpga_de0_nano_soc.h index 16e146c..c42175d 100644 > > --- a/include/configs/socfpga_de0_nano_soc.h > > +++ b/include/configs/socfpga_de0_nano_soc.h > > @@ -86,4 +86,16 @@ > > > > /* The rest of the configuration is shared */ > > #include > > > > +/* mtd partitioning for serial NOR flash */ > > +#if defined(CONFIG_CMD_UBI) || defined(CONFIG_CMD_SF) > > +#define MTDPARTS_DEFAULT "mtdparts=ff705000.spi:"\ > > + "256k(spl),"\ > > + "64k(env)," \ > > + "64k(dtb)," \ > > + "256k(boot)," \ > > + "16m(kernel)," \ > > + "16m(rootfs)," \ > > + "-(UBI)\0" > > +#endif > > + > > > > #endif /* __CONFIG_TERASIC_DE0_H__ */ > > Ok, three copies of the same table. Should it go to socfpga common? > You could at least do > > MTDPARTS_DEFAULT_SOCDK > > and then use > > #define MTDPARTS_DEFAULT MTDPARTS_DEFAULT_SOCDK > > in the socfpga_de0_nano_soc.h, so we don't have 3 copies of the same > table. I'd rather suggest to do something like #ifndef MTDPARTS_DEFAULT #define ... #endif in socfpga_common.h . Even better would obviously be if we could just scrap this altogether and parse the MTD layout from OF. I dunno if we can do that nowadays, but that'd be great. Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 4/4] arm: socfpga: socrates: Enabling U-Boot environment in QSPI
On Sat 2015-12-12 08:47:41, Chin Liang See wrote: > Enabling the support of storing U-Boot environment > within serial NOR flash. By default, its still > store into SDMMC > > Signed-off-by: Chin Liang See > Cc: Dinh Nguyen > Cc: Dinh Nguyen > Cc: Pavel Machek > Cc: Marek Vasut > Cc: Stefan Roese > --- a/include/configs/socfpga_socrates.h > +++ b/include/configs/socfpga_socrates.h > @@ -54,9 +54,15 @@ > > #endif > > +/* U-Boot environment */ > #define CONFIG_ENV_IS_IN_MMC > +#ifdef CONFIG_ENV_IS_IN_MMC > #define CONFIG_SYS_MMC_ENV_DEV 0 /* device 0 */ > #define CONFIG_ENV_OFFSET512 /* just after the MBR */ > +#elif CONFIG_ENV_IS_IN_SPI_FLASH > +#define CONFIG_ENV_SECT_SIZE (64 * 1024) > +#define CONFIG_ENV_OFFSET0x40 > +#endif This configuration is again shared with all the boards that have NOR, right? So time to create include/configs/socfpga_spi_nor.h or something like that? Thanks, Pavel -- (english) http://www.livejournal.com/~pavelmachek (cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Very confusing variable=name behaviour
In u-boot there are two types of variables, local and persistent variables.
Persistent variables are assigned via "setenv", can be saved (the whole
environment) via "saveenv", restored (to default values) via "env
default -f".
Hush variables are assigned via "=" and can aren't saved.
Both are accessed via "$variable" or "${variable}"
What you are seeing is normal.
On 12/12/2015 03:53 PM, Pavel Machek wrote:
> Hi!
>
> I'm getting quite crazy behaviour of variables in recent u-boot:
>
> VERSION = 2016
> PATCHLEVEL = 01
> SUBLEVEL =
> EXTRAVERSION = -rc1
>
>
> Bytes transferred = 104656 (198d0 hex)
> => bootm_boot_mode=nonsec
> => echo $bootm_boot_mode
> nonsec
> => prinetenv bootm_boot_mode
> Unknown command 'prinetenv' - try 'help'
> => printenv bootm_boot_mode
> ## Error: "bootm_boot_mode" not defined
> => echo $bootm_boot_mode
> nonsec
> =>
>
> What is going on there? C-level "getenv" fails on such variable, too.
>
> bootm_boot_mode = ''
>
> Explicit setenv behaves as expected:
>
> => setenv bootm_boot_mode nonsec
> => echo $bootm_boot_mode
> nonsec
> => printenv bootm_boot_mode
> bootm_boot_mode=nonsec
> =>
>
> Best regards,
>
>Pavel
--
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peter.bar...@logicpd.com
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Re: [U-Boot] [PATCH 3/6] arm: socfpga: de0-nano-soc: Enabling mtd partitioning layout
On Fri 2015-12-11 17:15:50, Chin Liang See wrote: > Enabling mtd partitioning layout which indicate partition > for various boot partition > > Signed-off-by: Chin Liang See > Cc: Dinh Nguyen > Cc: Dinh Nguyen > Cc: Pavel Machek > Cc: Marek Vasut > Cc: Stefan Roese > --- > include/configs/socfpga_de0_nano_soc.h | 12 > 1 file changed, 12 insertions(+) > > diff --git a/include/configs/socfpga_de0_nano_soc.h > b/include/configs/socfpga_de0_nano_soc.h > index 16e146c..c42175d 100644 > --- a/include/configs/socfpga_de0_nano_soc.h > +++ b/include/configs/socfpga_de0_nano_soc.h > @@ -86,4 +86,16 @@ > /* The rest of the configuration is shared */ > #include > > +/* mtd partitioning for serial NOR flash */ > +#if defined(CONFIG_CMD_UBI) || defined(CONFIG_CMD_SF) > +#define MTDPARTS_DEFAULT "mtdparts=ff705000.spi:"\ > + "256k(spl),"\ > + "64k(env)," \ > + "64k(dtb)," \ > + "256k(boot)," \ > + "16m(kernel)," \ > + "16m(rootfs)," \ > + "-(UBI)\0" > +#endif > + > #endif /* __CONFIG_TERASIC_DE0_H__ */ Ok, three copies of the same table. Should it go to socfpga common? You could at least do MTDPARTS_DEFAULT_SOCDK and then use #define MTDPARTS_DEFAULT MTDPARTS_DEFAULT_SOCDK in the socfpga_de0_nano_soc.h, so we don't have 3 copies of the same table. Pavel -- (english) http://www.livejournal.com/~pavelmachek (cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Very confusing variable=name behaviour
Hi! I'm getting quite crazy behaviour of variables in recent u-boot: VERSION = 2016 PATCHLEVEL = 01 SUBLEVEL = EXTRAVERSION = -rc1 Bytes transferred = 104656 (198d0 hex) => bootm_boot_mode=nonsec => echo $bootm_boot_mode nonsec => prinetenv bootm_boot_mode Unknown command 'prinetenv' - try 'help' => printenv bootm_boot_mode ## Error: "bootm_boot_mode" not defined => echo $bootm_boot_mode nonsec => What is going on there? C-level "getenv" fails on such variable, too. bootm_boot_mode = '' Explicit setenv behaves as expected: => setenv bootm_boot_mode nonsec => echo $bootm_boot_mode nonsec => printenv bootm_boot_mode bootm_boot_mode=nonsec => Best regards, Pavel -- (english) http://www.livejournal.com/~pavelmachek (cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/2] sunxi: A20-Olimex-SOM-EVB defconfig: enable mmc3
The Olimex A20-SOM-EVB is an evaluation board for the Olimex A20-SOM system-on-module. The baseboard provides a full-size SD socket (connected to mmc3) in addition to the micro-SD socket on the SOM itself (which is connected to mmc0). Enable the mmc3 controller in the board defconfig. Signed-off-by: Karsten Merker --- configs/A20-Olimex-SOM-EVB_defconfig | 3 +++ 1 file changed, 3 insertions(+) diff --git a/configs/A20-Olimex-SOM-EVB_defconfig b/configs/A20-Olimex-SOM-EVB_defconfig index 5166c06..34b3f36 100644 --- a/configs/A20-Olimex-SOM-EVB_defconfig +++ b/configs/A20-Olimex-SOM-EVB_defconfig @@ -3,6 +3,9 @@ CONFIG_ARCH_SUNXI=y CONFIG_MACH_SUN7I=y CONFIG_DRAM_CLK=480 CONFIG_MMC0_CD_PIN="PH1" +CONFIG_MMC3_CD_PIN="PH0" +CONFIG_MMC3_PINS="PH" +CONFIG_MMC_SUNXI_SLOT_EXTRA=3 CONFIG_USB0_VBUS_PIN="PB9" CONFIG_USB0_VBUS_DET="PH5" CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olimex-som-evb" -- 2.1.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 0/2] sunxi: support for a second SD card socket
Hello, this patchset enables the full-size SD card socket on the A20-Olimex-SOM-EVB baseboard in u-boot and adds support for including this kind of secondary socket into the boot process provided by config_distro_bootcmd.h. The latter is particularly useful on the A20-Olimex-SOM-EVB as changing the card in the primary micro-SD socket is kind of fiddly when the SOM is plugged into the baseboard. Regards, Karsten Karsten Merker (2): sunxi: A20-Olimex-SOM-EVB defconfig: enable mmc3 sunxi: Enable a second mmc socket as boot target in the environment configs/A20-Olimex-SOM-EVB_defconfig | 3 +++ include/configs/sunxi-common.h | 6 ++ 2 files changed, 9 insertions(+) -- 2.1.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/2] sunxi: Enable a second mmc socket as boot target in the environment
Some sunxi-based boards (such as the Olimex A20-SOM-EVB) have a second MMC socket. This socket is not bootable hardware-wise, i.e. u-boot itself cannot be loaded from it, but once u-boot has started, the second socket can be used in the boot process provided by config_distro_bootcmd.h. If a second MMC socket is present, place it in the boot order after the first MMC socket. Signed-off-by: Karsten Merker --- include/configs/sunxi-common.h | 6 ++ 1 file changed, 6 insertions(+) diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 98a2c74..53ad6d2 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -418,6 +418,11 @@ extern int soft_i2c_gpio_scl; #ifdef CONFIG_MMC #define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0) +#if CONFIG_MMC_SUNXI_SLOT_EXTRA != -1 +#define BOOT_TARGET_DEVICES_MMC_EXTRA(func) func(MMC, mmc, 1) +#else +#define BOOT_TARGET_DEVICES_MMC_EXTRA(func) +#endif #else #define BOOT_TARGET_DEVICES_MMC(func) #endif @@ -447,6 +452,7 @@ extern int soft_i2c_gpio_scl; #define BOOT_TARGET_DEVICES(func) \ func(FEL, fel, na) \ BOOT_TARGET_DEVICES_MMC(func) \ + BOOT_TARGET_DEVICES_MMC_EXTRA(func) \ BOOT_TARGET_DEVICES_SCSI(func) \ BOOT_TARGET_DEVICES_USB(func) \ func(PXE, pxe, na) \ -- 2.1.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3] spi: fsl_espi: Return all data read from device unmodified
On Fri, 2015-12-11 at 21:19 -0500, Dale P. Smith wrote:
> Signed-off-by: Dale P. Smith
> ---
> Changes for v2:
> - First attempt at using git format-patch
> Changes for v3:
> - Fix subject.
> - Add changelog
While this is a step in the right direction, this driver needs a rewrite.
- The malloc/memcpy crap need to go.
- TXing 4 bytes a time while while word size is still one byte makes Not
full/Not empty
HW flags useless.
There is no real maintainer of this driver though so I am afraid nobody will do
make this happen.
>
> drivers/spi/fsl_espi.c | 10 ++
> 1 file changed, 2 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/spi/fsl_espi.c b/drivers/spi/fsl_espi.c
> index b1586d1..c84a7ea 100644
> --- a/drivers/spi/fsl_espi.c
> +++ b/drivers/spi/fsl_espi.c
> @@ -345,17 +345,11 @@ int spi_xfer(struct spi_slave *slave, unsigned int
> bitlen, const void *data_out,
> }
> }
> }
> - if (data_in) {
> - memcpy(data_in, buffer + 2 * cmd_len, tran_len);
> - if (*buffer == 0x0b) {
> - data_in += tran_len;
> - data_len -= tran_len;
> - *(int *)buffer += tran_len;
> - }
> - }
> spi_cs_deactivate(slave);
> }
>
> + if (data_in)
> + memcpy(data_in, buffer + rx_offset, len);
> free(buffer);
> return 0;
> }
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[U-Boot] [PATCH] serial: lpc32xx hsuart: port driver to driver model
The change ports NXP LPC32xx 14-clock UART device driver to driver
model.
Signed-off-by: Vladimir Zapolskiy
---
drivers/serial/lpc32xx_hsuart.c | 103 +++---
include/dm/platform_data/lpc32xx_hsuart.h | 18 ++
2 files changed, 82 insertions(+), 39 deletions(-)
create mode 100644 include/dm/platform_data/lpc32xx_hsuart.h
diff --git a/drivers/serial/lpc32xx_hsuart.c b/drivers/serial/lpc32xx_hsuart.c
index c8926a8..c199c9b 100644
--- a/drivers/serial/lpc32xx_hsuart.c
+++ b/drivers/serial/lpc32xx_hsuart.c
@@ -1,89 +1,114 @@
/*
- * Copyright (C) 2011 Vladimir Zapolskiy
+ * Copyright (C) 2011-2015 Vladimir Zapolskiy
*
* SPDX-License-Identifier:GPL-2.0+
*/
#include
-#include
-#include
-#include
-#include
+#include
+#include
#include
+
+#include
#include
DECLARE_GLOBAL_DATA_PTR;
-static struct hsuart_regs *hsuart = (struct hsuart_regs *)HS_UART_BASE;
+struct lpc32xx_hsuart_priv {
+ struct hsuart_regs *hsuart;
+};
-static void lpc32xx_serial_setbrg(void)
+static int lpc32xx_serial_setbrg(struct udevice *dev, int baudrate)
{
+ struct lpc32xx_hsuart_priv *priv = dev_get_priv(dev);
+ struct hsuart_regs *hsuart = priv->hsuart;
u32 div;
/* UART rate = PERIPH_CLK / ((HSU_RATE + 1) x 14) */
- div = (get_serial_clock() / 14 + gd->baudrate / 2) / gd->baudrate - 1;
+ div = (get_serial_clock() / 14 + baudrate / 2) / baudrate - 1;
if (div > 255)
div = 255;
writel(div, &hsuart->rate);
+
+ return 0;
}
-static int lpc32xx_serial_getc(void)
+static int lpc32xx_serial_getc(struct udevice *dev)
{
- while (!(readl(&hsuart->level) & HSUART_LEVEL_RX))
- /* NOP */;
+ struct lpc32xx_hsuart_priv *priv = dev_get_priv(dev);
+ struct hsuart_regs *hsuart = priv->hsuart;
+
+ if (!(readl(&hsuart->level) & HSUART_LEVEL_RX))
+ return -EAGAIN;
return readl(&hsuart->rx) & HSUART_RX_DATA;
}
-static void lpc32xx_serial_putc(const char c)
+static int lpc32xx_serial_putc(struct udevice *dev, const char c)
{
- if (c == '\n')
- serial_putc('\r');
+ struct lpc32xx_hsuart_priv *priv = dev_get_priv(dev);
+ struct hsuart_regs *hsuart = priv->hsuart;
+
+ /* Wait for empty FIFO */
+ if (readl(&hsuart->level) & HSUART_LEVEL_TX)
+ return -EAGAIN;
writel(c, &hsuart->tx);
- /* Wait for character to be sent */
- while (readl(&hsuart->level) & HSUART_LEVEL_TX)
- /* NOP */;
+ return 0;
}
-static int lpc32xx_serial_tstc(void)
+static int lpc32xx_serial_pending(struct udevice *dev, bool input)
{
- if (readl(&hsuart->level) & HSUART_LEVEL_RX)
- return 1;
+ struct lpc32xx_hsuart_priv *priv = dev_get_priv(dev);
+ struct hsuart_regs *hsuart = priv->hsuart;
+
+ if (input) {
+ if (readl(&hsuart->level) & HSUART_LEVEL_RX)
+ return 1;
+ } else {
+ if (readl(&hsuart->level) & HSUART_LEVEL_TX)
+ return 1;
+ }
return 0;
}
-static int lpc32xx_serial_init(void)
+static int lpc32xx_serial_init(struct hsuart_regs *hsuart)
{
- lpc32xx_serial_setbrg();
-
/* Disable hardware RTS and CTS flow control, set up RX and TX FIFO */
writel(HSUART_CTRL_TMO_16 | HSUART_CTRL_HSU_OFFSET(20) |
HSUART_CTRL_HSU_RX_TRIG_32 | HSUART_CTRL_HSU_TX_TRIG_0,
&hsuart->ctrl);
+
return 0;
}
-static struct serial_device lpc32xx_serial_drv = {
- .name = "lpc32xx_serial",
- .start = lpc32xx_serial_init,
- .stop = NULL,
+static int lpc32xx_hsuart_probe(struct udevice *dev)
+{
+ struct lpc32xx_hsuart_platdata *platdata = dev_get_platdata(dev);
+ struct lpc32xx_hsuart_priv *priv = dev_get_priv(dev);
+
+ priv->hsuart = (struct hsuart_regs *)platdata->base;
+
+ lpc32xx_serial_init(priv->hsuart);
+
+ return 0;
+}
+
+static const struct dm_serial_ops lpc32xx_hsuart_ops = {
.setbrg = lpc32xx_serial_setbrg,
- .putc = lpc32xx_serial_putc,
- .puts = default_serial_puts,
.getc = lpc32xx_serial_getc,
- .tstc = lpc32xx_serial_tstc,
+ .putc = lpc32xx_serial_putc,
+ .pending = lpc32xx_serial_pending,
};
-void lpc32xx_serial_initialize(void)
-{
- serial_register(&lpc32xx_serial_drv);
-}
-
-__weak struct serial_device *default_serial_console(void)
-{
- return &lpc32xx_serial_drv;
-}
+U_BOOT_DRIVER(lpc32xx_hsuart) = {
+ .name = "lpc32xx_hsuart",
+ .id = UCLASS_SERIAL,
+ .probe = lpc32xx_hsuart_probe,
+ .ops= &lpc32xx_hsuart_ops,
+ .priv_auto_alloc_size = sizeof(struct lpc32xx_hsuart_priv),
+ .flags = DM_FLAG_PRE_RELOC,
+};
diff --git a/include/dm/platform_data/lpc32xx_hsuart.h
b/include/dm/platform_data/lpc32xx_hsuart.h
new file mod
Re: [U-Boot] [PATCH 1/2] spl: dm: Add SPL_DM_SEQ_ALIAS config option
On Saturday, December 12, 2015 at 03:08:21 PM, Nathan Rossi wrote: > On Sat, Dec 12, 2015 at 10:05 PM, Stefan Roese wrote: > > On 11.12.2015 18:32, Marek Vasut wrote: > >> On Friday, December 11, 2015 at 04:46:40 PM, Michal Simek wrote: > >>> On 11.12.2015 16:07, Marek Vasut wrote: > On Friday, December 11, 2015 at 03:48:09 PM, Nathan Rossi wrote: > > The Device Model sequence alias feature is required by some Uclasses. > > Instead of disabling the feature for all SPL targets allow it to be > > configured. > > > > The config option is disabled by default to reduce code size for > > targets > > that are not interested or do not require this feature. > > > > Signed-off-by: Nathan Rossi > > Cc: Simon Glass > > Cc: Masahiro Yamada > > Cc: Linus Walleij > > Cc: Marek Vasut > > Cc: Michal Simek > > --- > > Based on a small amount of inspection for the Zynq platform, enabling > > this config option adds ~1KB of code size. > > > > Also on a side note, this might affect the socfpga target as it > > forcibly > > overrides the #undef from config_uncmd_spl.h in its common header. I > > have Cc'd the respective maintainer for this reason. > > The fix for SoCFPGA is easy -- enable the SPL_DM_SEQ_ALIAS in > configs/socfpga*. It is needed for booting from QSPI NOR. > > I will add a patch to this series, depending on how it is agreed to > enable this option. > > >>> That's probably not the best solution. But of course we can use it. > >>> IRC Stefan had the same problem. > > So would a better solution be to force the ARCH_ZYNQ config (and > others ARCH_SOCFPGA/ARCH_MVEBU) to 'select SPL_DM_SEQ_ALIAS' instead > of enabling them separately for each defconfig? like is done for > SPL_OF_CONTROL/etc. That might make sense, yes. But, I wonder if we can do without DM_SEQ_ALIAS altogether for the SPI NOR boot? > >> So what is the solution ? > > > > I added > > > > #define CONFIG_DM_SEQ_ALIAS1 > > > > to the common config header for MVEBU. If its possible to set this > > via Kconfig in a way where its not #undef'ed by config_uncmd_spl.h, > > that would be even better. > > As with socfpga, would you like me to do the same for MVEBU, add a > patch to this series to enable it for MVEBU? > > Regards, > Nathan Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 1/4] arm: socfpga: cyclone5-socdk: Enabling U-Boot environment in QSPI
On Saturday, December 12, 2015 at 07:17:13 AM, Chin Liang See wrote: > On Sat, 2015-12-12 at 04:23 +0100, Marek Vasut wrote: > > On Saturday, December 12, 2015 at 01:47:38 AM, Chin Liang See wrote: > > > Enabling the support of storing U-Boot environment > > > within serial NOR flash. By default, its still > > > store into SDMMC > > > > > > Signed-off-by: Chin Liang See > > > Cc: Dinh Nguyen > > > Cc: Dinh Nguyen > > > Cc: Pavel Machek > > > Cc: Marek Vasut > > > Cc: Stefan Roese > > > --- > > > Changes for v2 > > > - remove the undef > > > --- > > > > > > include/configs/socfpga_cyclone5_socdk.h | 6 ++ > > > 1 file changed, 6 insertions(+) > > > > > > diff --git a/include/configs/socfpga_cyclone5_socdk.h > > > b/include/configs/socfpga_cyclone5_socdk.h index 67bb35f..340b2c7 > > > 100644 > > > --- a/include/configs/socfpga_cyclone5_socdk.h > > > +++ b/include/configs/socfpga_cyclone5_socdk.h > > > @@ -58,9 +58,15 @@ > > > > > > #endif > > > > > > +/* U-Boot environment */ > > > > > > #define CONFIG_ENV_IS_IN_MMC > > > > > > +#ifdef CONFIG_ENV_IS_IN_MMC > > > > > > #define CONFIG_SYS_MMC_ENV_DEV 0 /* device 0 > > > > > > */ > > > > > > #define CONFIG_ENV_OFFSET512 /* just after > > > > > > the MBR */ > > > +#elif CONFIG_ENV_IS_IN_SPI_FLASH > > > +#define CONFIG_ENV_SECT_SIZE (64 * 1024) > > > +#define CONFIG_ENV_OFFSET0x40 > > > > The offset of the env is therefore 4 MiB, right ? This does not match > > with > > the other patch: > > > > [PATCH 1/6] arm: socfpga: cyclone5-socdk: Enabling mtd partitioning > > layout > > Oops good catch as I should use 256kB, not 4MB. Let fix that. > > > Please be more careful next time. Also, it might make sense to enable > > redundant environment in QSPI NOR. > > Yah, I plan to put the environment to be larger so this is possible in > the future. I think 2x 64k env partition is enough. Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/6] arm: socfpga: cyclone5-socdk: Enabling mtd partitioning layout
On Saturday, December 12, 2015 at 07:30:46 AM, Chin Liang See wrote: [...] > > > > Is this the default Altera layout ? > > > > > > Yah but believe it need to be updated > > > > So you're not worried about compatibility I presume ? > > I still need to care of compatiblity. Some of them will break due to > size increase. But through the use of partition name and environment, > user will be abstracted from this. OK > > > > > +#define MTDPARTS_DEFAULT "mtdparts=ff705000.spi:"\ > > > > > + "256k(spl),"\ > > > > > + "64k(env)," \ > > > > > + "64k(dtb)," \ > > > > > > > > What happens if the DT grows over 64k ? > > > > > > Hmmm rethinking of this, I will make Linux dtb, U-Boot and kernel > > > as > > > part of one big UBI partition called boot. > > > > I am using this sort of layout on SoCkit internally: > > "mtdparts=ff705000.spi:"\ > > > > "1m(u-boot)," \ > > "64k(env1),"\ > > "64k(env2),"\ > > "-(UBI)\0" > > Hmmm I didn't see the area for SPL. Wonder is it part of u-boot > partition? Yes, the u-boot-with-spl-dtb.sfp (which contains 4 copies of SPL and U-Boot image) goes into the 'u-boot' partition. > > I have two environment blocks to implement redundant env, which is > > useful > > when deploying the system. It makes the system slightly more > > resilient > > against problems of aging flash. > > Nice thought, will increase the environment partition to 256kB to cater > this. I am using env1 and env2, see above. That should be enough. > > > > > + "256k(boot)," \ > > > > > > > > 256k is not enough for U-Boot (considering this is U-Boot). > > > > > > Will create boot region to avoid worrying the size issue > > > > > > > > + "16m(kernel)," > > > > > \ > > > > > + "16m(rootfs)," > > > > > \ > > > > > > > > Why don't you put kernel and rootfs onto the UBI volume instead ? > > > > > > Yup, kernel will go into boot partition. It will be separated from > > > rootfs as user might choose nfs. > > > > Can you share the final layout before you roll out patches ? > > Sure, plan to do so but need to away from desk just now. > > Here is the old layout > 256k(spl) > 64k(env) > 64k(dtb) > 256k(boot) > 16m(kernel) > 16m(rootfs) > > The new one would like this > 256k(spl) I'd say you should just call this u-boot, see above for the rationale. > 256k(env) > 15872k(boot) > 16m(rootfs) > > The boot partition can be used as ubi part or raw partition. > It contains the linux dtb, u-boot and linux images. Is that an UBIFS partition ? If so, why don't you just use two UBI volumes ? > The environment will be used to determine the image offset for > mentioned boot images from boot partition. > > Thanks > Chin Liang ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2] ARM: mxs: allow boards to select DC-DC switching clock source
On Saturday, December 12, 2015 at 10:02:30 AM, Michael Heimpold wrote:
> Hi Marek,
Hi!
> Am Saturday 12 December 2015, 02:42:47 schrieb Marek Vasut:
> > On Friday, December 11, 2015 at 12:05:36 AM, Michael Heimpold wrote:
> > > For some board designs, it might be useful to switch the DC-DC
> > > clock source to something else rather the default 24 MHz, e.g.
> > > for EMI reasons.
> >
> > Can you elaborate on this ? Also, is there gonna be a user for this?
>
> Sure. Every DC-DC switching frequency also generates some harmonics.
> On usual board design, this is not a huge problem, but on our I2SE
> Duckbill EnOcean devices, the EnOcean transceiver sits very close to the
> i.MX because of stacked PCBs. Our hardware guys measured, that the
> harmonics overlaps a little bit with the EnOcean spectrum. Changing
> the DC-DC frequency results in others harmonics, which do not interfere
> anymore.
> I already sent a patch for adding Duckbill support and I'm preparing a v2
> which would include this topic, so this would be the first user of this
> feature.
Ah, thanks for the detailed explanation, got it.
> > > For this, override the mxs_power_setup_dcdc_clocksource function
> > > in your board support files.
> > >
> > > Example:
> > > void mxs_power_setup_dcdc_clocksource(void)
> > > {
> > >
> > > mxs_power_select_dcdc_clocksource(POWER_MISC_FREQSEL_20MHZ);
> > >
> > > }
> > >
> > > Signed-off-by: Michael Heimpold
> > > Cc: Marek Vasut
> > > Cc: Otavio Salvador
> > > Cc: Fabio Estevam
> > > ---
> > >
> > > Changes in v2:
> > > - use a weak function approach instead of ifdef'ery as suggested
> > >
> > > by Marek Vasut
> > >
> > > arch/arm/cpu/arm926ejs/mxs/spl_power_init.c | 31
> > >
> > > + arch/arm/include/asm/arch-mxs/sys_proto.h
> > >
> > > | 2 ++
> > >
> > > 2 files changed, 33 insertions(+)
> > >
> > > diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c
> > > b/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c index 1972de8..64e215c
> > > 100644
> > > --- a/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c
> > > +++ b/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c
> > > @@ -248,6 +248,36 @@ static void mxs_power_setup_5v_detect(void)
> > >
> > > }
> > >
> > > /**
> > >
> > > + * mxs_power_switch_dcdc_clocksource() - Switch PLL clock for DC-DC
> > > converters + *
> > > + * This function configures and then enables an alternative PLL clock
> > > source + * for the DC-DC converters.
> > > + */
> > > +void mxs_power_select_dcdc_clocksource(uint32_t freqsel)
> > > +{
Looks like the comment and name of the function do not match here ("select" vs
"switch").
> > > + struct mxs_power_regs *power_regs =
> > > + (struct mxs_power_regs *)MXS_POWER_BASE;
> > > +
> > > + /* Select clocksource for DC-DC converters */
> > > + clrsetbits_le32(&power_regs->hw_power_misc,
> > > + POWER_MISC_FREQSEL_MASK,
> > > + freqsel);
> > > + setbits_le32(&power_regs->hw_power_misc,
> > > + POWER_MISC_SEL_PLLCLK);
> > > +}
> > > +
> > > +/**
> > > + * mxs_power_setup_dcdc_clocksource()
> >
> > Please make sure this is compatible with kerneldoc.
>
> Ah, yes. Will do in v3.
>
> > > + * Normally, there is no need to switch DC-DC clocksource. However,
> > > boards
> > > + * can implement this function when required.
> > > + */
> > > +__weak void mxs_power_setup_dcdc_clocksource(void)
> > > +{
> > > + debug("SPL: Using default DC-DC clocksource\n");
Shouldn't this call the mxs_power_select_dcdc_clocksource() then somehow ?
> > > +}
> > > +
> > > +/**
> > >
> > > * mxs_src_power_init() - Preconfigure the power block
> > > *
> > > * This function configures reasonable values for the DC-DC control
> > > loop
> > >
> > > @@ -872,6 +902,7 @@ static void mxs_power_configure_power_source(void)
> > >
> > > debug("SPL: Configuring power source\n");
> > >
> > > + mxs_power_setup_dcdc_clocksource();
> > >
> > > mxs_src_power_init();
> > >
> > > if (readl(&power_regs->hw_power_sts) & POWER_STS_VDD5V_GT_VDDIO) {
> > >
> > > diff --git a/arch/arm/include/asm/arch-mxs/sys_proto.h
> > > b/arch/arm/include/asm/arch-mxs/sys_proto.h index 20ff101..4160e43
> > > 100644 --- a/arch/arm/include/asm/arch-mxs/sys_proto.h
> > > +++ b/arch/arm/include/asm/arch-mxs/sys_proto.h
> > > @@ -25,6 +25,8 @@ int mxsmmc_initialize(bd_t *bis, int id, int
> > > (*wp)(int), int (*cd)(int)); void mxs_common_spl_init(const uint32_t
> > > arg, const uint32_t *resptr, const iomux_cfg_t *iomux_setup,
> > >
> > >const unsigned int iomux_size);
> > >
> > > +
> > > +void mxs_power_select_dcdc_clocksource(uint32_t freqsel);
> >
> > This function does not need to be exported if it's __weak I believe.
>
> mxs_power_setup_dcdc_clocksource is the weak function, not
> mxs_power_select_dcdc_clocksource so I think this is needed.
So the user is supposed to call this function from the board code, right?
Best regards,
Marek Vasut
__
Re: [U-Boot] [PATCH 1/2] spl: dm: Add SPL_DM_SEQ_ALIAS config option
On Sat, Dec 12, 2015 at 10:05 PM, Stefan Roese wrote: > On 11.12.2015 18:32, Marek Vasut wrote: >> >> On Friday, December 11, 2015 at 04:46:40 PM, Michal Simek wrote: >>> >>> On 11.12.2015 16:07, Marek Vasut wrote: On Friday, December 11, 2015 at 03:48:09 PM, Nathan Rossi wrote: > > The Device Model sequence alias feature is required by some Uclasses. > Instead of disabling the feature for all SPL targets allow it to be > configured. > > The config option is disabled by default to reduce code size for > targets > that are not interested or do not require this feature. > > Signed-off-by: Nathan Rossi > Cc: Simon Glass > Cc: Masahiro Yamada > Cc: Linus Walleij > Cc: Marek Vasut > Cc: Michal Simek > --- > Based on a small amount of inspection for the Zynq platform, enabling > this config option adds ~1KB of code size. > > Also on a side note, this might affect the socfpga target as it > forcibly > overrides the #undef from config_uncmd_spl.h in its common header. I > have Cc'd the respective maintainer for this reason. The fix for SoCFPGA is easy -- enable the SPL_DM_SEQ_ALIAS in configs/socfpga*. It is needed for booting from QSPI NOR. I will add a patch to this series, depending on how it is agreed to enable this option. >>> >>> >>> That's probably not the best solution. But of course we can use it. >>> IRC Stefan had the same problem. So would a better solution be to force the ARCH_ZYNQ config (and others ARCH_SOCFPGA/ARCH_MVEBU) to 'select SPL_DM_SEQ_ALIAS' instead of enabling them separately for each defconfig? like is done for SPL_OF_CONTROL/etc. >> >> >> So what is the solution ? > > > I added > > #define CONFIG_DM_SEQ_ALIAS1 > > to the common config header for MVEBU. If its possible to set this > via Kconfig in a way where its not #undef'ed by config_uncmd_spl.h, > that would be even better. As with socfpga, would you like me to do the same for MVEBU, add a patch to this series to enable it for MVEBU? Regards, Nathan ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3] spi: fsl_espi: Return all data read from device unmodified
Signed-off-by: Dale P. Smith
---
Changes for v2:
- First attempt at using git format-patch
Changes for v3:
- Fix subject.
- Add changelog
drivers/spi/fsl_espi.c | 10 ++
1 file changed, 2 insertions(+), 8 deletions(-)
diff --git a/drivers/spi/fsl_espi.c b/drivers/spi/fsl_espi.c
index b1586d1..c84a7ea 100644
--- a/drivers/spi/fsl_espi.c
+++ b/drivers/spi/fsl_espi.c
@@ -345,17 +345,11 @@ int spi_xfer(struct spi_slave *slave, unsigned int
bitlen, const void *data_out,
}
}
}
- if (data_in) {
- memcpy(data_in, buffer + 2 * cmd_len, tran_len);
- if (*buffer == 0x0b) {
- data_in += tran_len;
- data_len -= tran_len;
- *(int *)buffer += tran_len;
- }
- }
spi_cs_deactivate(slave);
}
+ if (data_in)
+ memcpy(data_in, buffer + rx_offset, len);
free(buffer);
return 0;
}
--
2.1.4
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] spl: dm: Add SPL_DM_SEQ_ALIAS config option
On 11.12.2015 18:32, Marek Vasut wrote: On Friday, December 11, 2015 at 04:46:40 PM, Michal Simek wrote: On 11.12.2015 16:07, Marek Vasut wrote: On Friday, December 11, 2015 at 03:48:09 PM, Nathan Rossi wrote: The Device Model sequence alias feature is required by some Uclasses. Instead of disabling the feature for all SPL targets allow it to be configured. The config option is disabled by default to reduce code size for targets that are not interested or do not require this feature. Signed-off-by: Nathan Rossi Cc: Simon Glass Cc: Masahiro Yamada Cc: Linus Walleij Cc: Marek Vasut Cc: Michal Simek --- Based on a small amount of inspection for the Zynq platform, enabling this config option adds ~1KB of code size. Also on a side note, this might affect the socfpga target as it forcibly overrides the #undef from config_uncmd_spl.h in its common header. I have Cc'd the respective maintainer for this reason. The fix for SoCFPGA is easy -- enable the SPL_DM_SEQ_ALIAS in configs/socfpga*. It is needed for booting from QSPI NOR. That's probably not the best solution. But of course we can use it. IRC Stefan had the same problem. So what is the solution ? I added #define CONFIG_DM_SEQ_ALIAS1 to the common config header for MVEBU. If its possible to set this via Kconfig in a way where its not #undef'ed by config_uncmd_spl.h, that would be even better. Thanks, Stefan ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] am335x_evm: Don't undef CONFIG_BOOTDELAY
config_distro_defaults.h is already included in configs/ti_am335x_common.h (by means of ti_armv7_common.h) We don't need to #undef CONFIG_BOOTDELAY because it drops default bootdelay which already defined on this line. Signed-off-by: Matwey V. Kornilov --- include/configs/am335x_evm.h | 4 1 file changed, 4 deletions(-) diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index c51db8c..cf6a606 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -18,10 +18,6 @@ #include -/* Don't override the distro default bootdelay */ -#undef CONFIG_BOOTDELAY -#include - #ifndef CONFIG_SPL_BUILD #ifndef CONFIG_FIT # define CONFIG_FIT -- 2.1.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] u-boot 2016.01-rc2 detects BeagleBone Black incorrectly
Hello, I am running 2016.01-rc on BBB (Embest replica) printenv shows the following: findfdt=if test $board_name = A335BONE; then setenv fdtfile am335x-bone.dtb; fi; if test $board_name = A335BNLT; then if test $board_rev = BBG1; then setenv fdtfile am335x-bonegreen.dtb; else setenv fdtfile am335x-boneblack.dtb; fi; fi; if test $board_name = A33515BB; then setenv fdtfile am335x-evm.dtb; fi; if test $board_name = A335X_SK; then setenv fdtfile am335x-evmsk.dtb; fi; if test $fdtfile = undefined; then echo WARNING: Could not determine device tree to use; fi; after findfdt has been run, fdtfile=am335x-bonegreen.dtb But it is not correct. My $board_rev is the following, I have no idea why does it contain line break. board_name=A335BNLT board_rev=t\ ue ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2] ARM: mxs: allow boards to select DC-DC switching clock source
Hi Marek,
Am Saturday 12 December 2015, 02:42:47 schrieb Marek Vasut:
> On Friday, December 11, 2015 at 12:05:36 AM, Michael Heimpold wrote:
> > For some board designs, it might be useful to switch the DC-DC
> > clock source to something else rather the default 24 MHz, e.g.
> > for EMI reasons.
>
> Can you elaborate on this ? Also, is there gonna be a user for this?
Sure. Every DC-DC switching frequency also generates some harmonics.
On usual board design, this is not a huge problem, but on our I2SE
Duckbill EnOcean devices, the EnOcean transceiver sits very close to the
i.MX because of stacked PCBs. Our hardware guys measured, that the
harmonics overlaps a little bit with the EnOcean spectrum. Changing
the DC-DC frequency results in others harmonics, which do not interfere
anymore.
I already sent a patch for adding Duckbill support and I'm preparing a v2
which would include this topic, so this would be the first user of this
feature.
>
> > For this, override the mxs_power_setup_dcdc_clocksource function
> > in your board support files.
> >
> > Example:
> > void mxs_power_setup_dcdc_clocksource(void)
> > {
> >
> > mxs_power_select_dcdc_clocksource(POWER_MISC_FREQSEL_20MHZ);
> >
> > }
> >
> > Signed-off-by: Michael Heimpold
> > Cc: Marek Vasut
> > Cc: Otavio Salvador
> > Cc: Fabio Estevam
> > ---
> >
> > Changes in v2:
> > - use a weak function approach instead of ifdef'ery as suggested
> >
> > by Marek Vasut
> >
> > arch/arm/cpu/arm926ejs/mxs/spl_power_init.c | 31
> >
> > + arch/arm/include/asm/arch-mxs/sys_proto.h
> >
> > | 2 ++
> >
> > 2 files changed, 33 insertions(+)
> >
> > diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c
> > b/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c index 1972de8..64e215c
> > 100644
> > --- a/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c
> > +++ b/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c
> > @@ -248,6 +248,36 @@ static void mxs_power_setup_5v_detect(void)
> >
> > }
> >
> > /**
> >
> > + * mxs_power_switch_dcdc_clocksource() - Switch PLL clock for DC-DC
> > converters + *
> > + * This function configures and then enables an alternative PLL clock
> > source + * for the DC-DC converters.
> > + */
> > +void mxs_power_select_dcdc_clocksource(uint32_t freqsel)
> > +{
> > + struct mxs_power_regs *power_regs =
> > + (struct mxs_power_regs *)MXS_POWER_BASE;
> > +
> > + /* Select clocksource for DC-DC converters */
> > + clrsetbits_le32(&power_regs->hw_power_misc,
> > + POWER_MISC_FREQSEL_MASK,
> > + freqsel);
> > + setbits_le32(&power_regs->hw_power_misc,
> > + POWER_MISC_SEL_PLLCLK);
> > +}
> > +
> > +/**
> > + * mxs_power_setup_dcdc_clocksource()
>
> Please make sure this is compatible with kerneldoc.
Ah, yes. Will do in v3.
>
> > + * Normally, there is no need to switch DC-DC clocksource. However,
> > boards
> > + * can implement this function when required.
> > + */
> > +__weak void mxs_power_setup_dcdc_clocksource(void)
> > +{
> > + debug("SPL: Using default DC-DC clocksource\n");
> > +}
> > +
> > +/**
> >
> > * mxs_src_power_init() - Preconfigure the power block
> > *
> > * This function configures reasonable values for the DC-DC control loop
> >
> > @@ -872,6 +902,7 @@ static void mxs_power_configure_power_source(void)
> >
> > debug("SPL: Configuring power source\n");
> >
> > + mxs_power_setup_dcdc_clocksource();
> >
> > mxs_src_power_init();
> >
> > if (readl(&power_regs->hw_power_sts) & POWER_STS_VDD5V_GT_VDDIO) {
> >
> > diff --git a/arch/arm/include/asm/arch-mxs/sys_proto.h
> > b/arch/arm/include/asm/arch-mxs/sys_proto.h index 20ff101..4160e43 100644
> > --- a/arch/arm/include/asm/arch-mxs/sys_proto.h
> > +++ b/arch/arm/include/asm/arch-mxs/sys_proto.h
> > @@ -25,6 +25,8 @@ int mxsmmc_initialize(bd_t *bis, int id, int (*wp)(int),
> > int (*cd)(int)); void mxs_common_spl_init(const uint32_t arg, const
> > uint32_t *resptr, const iomux_cfg_t *iomux_setup,
> >
> > const unsigned int iomux_size);
> >
> > +
> > +void mxs_power_select_dcdc_clocksource(uint32_t freqsel);
>
> This function does not need to be exported if it's __weak I believe.
mxs_power_setup_dcdc_clocksource is the weak function, not
mxs_power_select_dcdc_clocksource so I think this is needed.
Regards,
Michael
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