[U-Boot] [PATCH] rockchip: set scan_dev_for_boot_part env for rockchip SoC

[Eddie Cai]

Auto write GPT table if fail to get GPT table when scan_dev_for_boot_part

Signed-off-by: Eddie Cai 
---
 arch/arm/mach-rockchip/rk3036-board.c | 20 ++-
 arch/arm/mach-rockchip/rk3288-board.c | 20 ++-
 arch/arm/mach-rockchip/rk3399-board.c | 46 +++
 3 files changed, 84 insertions(+), 2 deletions(-)
 create mode 100644 arch/arm/mach-rockchip/rk3399-board.c

diff --git a/arch/arm/mach-rockchip/rk3036-board.c 
b/arch/arm/mach-rockchip/rk3036-board.c
index bf2b268..e9aeaff 100644
--- a/arch/arm/mach-rockchip/rk3036-board.c
+++ b/arch/arm/mach-rockchip/rk3036-board.c
@@ -51,7 +51,25 @@ __weak int rk_board_late_init(void)
 int board_late_init(void)
 {
setup_boot_mode();
-
+   setenv("scan_dev_for_boot_part",
+   "part list ${devtype} ${devnum} -bootable test; "
+   "if env exists test; then "
+  "echo Found valid partition table; "
+   "else "
+  "echo No valid partition table, write the original 
partition table; "
+  "gpt write ${devtype} ${devnum} ${partitions}; "
+  "mmc rescan;"
+   "fi;"
+   "part list ${devtype} ${devnum} -bootable devplist; "
+   "env exists devplist || setenv devplist 1; "
+   "for distro_bootpart in ${devplist}; do "
+   "if fstype ${devtype} "
+   "${devnum}:${distro_bootpart} "
+   "bootfstype; then "
+   "run scan_dev_for_boot; "
+ "fi; "
+   "done\0"
+   );
return rk_board_late_init();
 }
 
diff --git a/arch/arm/mach-rockchip/rk3288-board.c 
b/arch/arm/mach-rockchip/rk3288-board.c
index 9894a25..386b155 100644
--- a/arch/arm/mach-rockchip/rk3288-board.c
+++ b/arch/arm/mach-rockchip/rk3288-board.c
@@ -74,7 +74,25 @@ int board_late_init(void)
 {
setup_boot_mode();
rk3288_qos_init();
-
+   setenv("scan_dev_for_boot_part",
+   "part list ${devtype} ${devnum} -bootable test; "
+   "if env exists test; then "
+  "echo Found valid partition table; "
+   "else "
+  "echo No valid partition table, write the original 
partition table; "
+  "gpt write ${devtype} ${devnum} ${partitions}; "
+  "mmc rescan;"
+   "fi;"
+   "part list ${devtype} ${devnum} -bootable devplist; "
+   "env exists devplist || setenv devplist 1; "
+   "for distro_bootpart in ${devplist}; do "
+   "if fstype ${devtype} "
+   "${devnum}:${distro_bootpart} "
+   "bootfstype; then "
+   "run scan_dev_for_boot; "
+ "fi; "
+   "done\0"
+   );
return rk_board_late_init();
 }
 
diff --git a/arch/arm/mach-rockchip/rk3399-board.c 
b/arch/arm/mach-rockchip/rk3399-board.c
new file mode 100644
index 000..3777643
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk3399-board.c
@@ -0,0 +1,46 @@
+/*
+ * (C) Copyright 2017 ockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+__weak int rk_board_late_init(void)
+{
+   return 0;
+}
+
+int board_late_init(void)
+{
+   setenv("scan_dev_for_boot_part",
+   "part list ${devtype} ${devnum} -bootable test; "
+   "if env exists test; then "
+  "echo Found valid partition table; "
+   "else "
+  "echo No valid partition table, write the original 
partition table; "
+  "gpt write ${devtype} ${devnum} ${partitions}; "
+  "mmc rescan;"
+   "fi;"
+   "part list ${devtype} ${devnum} -bootable devplist; "
+   "env exists devplist || setenv devplist 1; "
+   "for distro_bootpart in ${devplist}; do "
+   "if fstype ${devtype} "
+   "${devnum}:${distro_bootpart} "
+   "bootfstype; then "
+   "run scan_dev_for_boot; "
+ "fi; "
+   "done\0"
+   );
+   return rk_board_late_init();
+}
+
-- 
2.7.4

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Re: [U-Boot] [PATCH v2 00/10] zynq: clk: Move zynq platform to clock framework

[Stefan.Herbrechtsmeier]

Hi Michal,

> -Ursprüngliche Nachricht-
> Von: Michal Simek [mailto:michal.si...@xilinx.com]
> > 
> Hi Stefan,
> 
> On 6.2.2017 11:14, stefan.herbrechtsme...@weidmueller.com wrote:
> > Hi Michal,
> >
> >> -Ursprüngliche Nachricht-
> >> Von: stefan.herbrechtsme...@weidmueller.com
> >>
> >> The old platform clock driver use a dynamic array which is filled at
> >> every boot with static clock tree information and unused clock
> rates.
> >> This needs much memory and complicates the strip down for the SPL.
> >> The new clock framework driver contains the tree information in
> >> functions and reads clock rates on demand.
> >>
> >
> > Any comments on this patch series?
> 
> I was sick the whole last week and catching emails.
> I have tried it on zc702 and it didn't work for me that's why I will
> have closer look hopefully this week. Definitely sorry for delay.

Could you describe the problem. Maybe I could help.

Regards
  Stefan



Kommanditgesellschaft - Sitz: Detmold - Amtsgericht Lemgo HRA 2790 - 
Komplementärin: Weidmüller Interface Führungsgesellschaft mbH - 
Sitz: Detmold - Amtsgericht Lemgo HRB 3924; 
Geschäftsführer: José Carlos Álvarez Tobar, Elke Eckstein, Dr. Peter Köhler, 
Jörg Timmermann;
USt-ID-Nr. DE124599660
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[U-Boot] [PATCH] ARM: uniphier: enable CONFIG_CMD_GPT

[Masahiro Yamada]

Enable CONFIG_CMD_GPT, keeping CONFIG_SPL_EFI_PARTITION because the
SPL for UniPhier platform does not recognize any partitions.

Signed-off-by: Masahiro Yamada 
---

 configs/uniphier_ld11_defconfig  | 2 ++
 configs/uniphier_ld20_defconfig  | 2 ++
 configs/uniphier_ld4_sld8_defconfig  | 2 ++
 configs/uniphier_pro4_defconfig  | 2 ++
 configs/uniphier_pxs2_ld6b_defconfig | 2 ++
 configs/uniphier_sld3_defconfig  | 2 ++
 configs/uniphier_v8_defconfig| 1 +
 7 files changed, 13 insertions(+)

diff --git a/configs/uniphier_ld11_defconfig b/configs/uniphier_ld11_defconfig
index dcad73d..a0aa87b 100644
--- a/configs/uniphier_ld11_defconfig
+++ b/configs/uniphier_ld11_defconfig
@@ -12,6 +12,7 @@ CONFIG_SPL_NOR_SUPPORT=y
 CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_XIMG is not set
 # CONFIG_CMD_ENV_EXISTS is not set
+CONFIG_CMD_GPT=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_USB=y
@@ -24,6 +25,7 @@ CONFIG_CMD_TIME=y
 # CONFIG_CMD_MISC is not set
 CONFIG_CMD_FAT=y
 # CONFIG_SPL_DOS_PARTITION is not set
+# CONFIG_SPL_EFI_PARTITION is not set
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_SPL_OF_TRANSLATE=y
 CONFIG_GPIO_UNIPHIER=y
diff --git a/configs/uniphier_ld20_defconfig b/configs/uniphier_ld20_defconfig
index 4c522b9..7e3ff5c 100644
--- a/configs/uniphier_ld20_defconfig
+++ b/configs/uniphier_ld20_defconfig
@@ -12,6 +12,7 @@ CONFIG_SPL_NOR_SUPPORT=y
 CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_XIMG is not set
 # CONFIG_CMD_ENV_EXISTS is not set
+CONFIG_CMD_GPT=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_USB=y
@@ -24,6 +25,7 @@ CONFIG_CMD_TIME=y
 # CONFIG_CMD_MISC is not set
 CONFIG_CMD_FAT=y
 # CONFIG_SPL_DOS_PARTITION is not set
+# CONFIG_SPL_EFI_PARTITION is not set
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_SPL_OF_TRANSLATE=y
 CONFIG_GPIO_UNIPHIER=y
diff --git a/configs/uniphier_ld4_sld8_defconfig 
b/configs/uniphier_ld4_sld8_defconfig
index 4446bd1..44cf4e5 100644
--- a/configs/uniphier_ld4_sld8_defconfig
+++ b/configs/uniphier_ld4_sld8_defconfig
@@ -15,6 +15,7 @@ CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_XIMG is not set
 # CONFIG_CMD_ENV_EXISTS is not set
+CONFIG_CMD_GPT=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_NAND=y
 CONFIG_CMD_I2C=y
@@ -28,6 +29,7 @@ CONFIG_CMD_TIME=y
 # CONFIG_CMD_MISC is not set
 CONFIG_CMD_FAT=y
 # CONFIG_SPL_DOS_PARTITION is not set
+# CONFIG_SPL_EFI_PARTITION is not set
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_GPIO_UNIPHIER=y
 CONFIG_MISC=y
diff --git a/configs/uniphier_pro4_defconfig b/configs/uniphier_pro4_defconfig
index 1a5e66d..30be50f 100644
--- a/configs/uniphier_pro4_defconfig
+++ b/configs/uniphier_pro4_defconfig
@@ -14,6 +14,7 @@ CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_XIMG is not set
 # CONFIG_CMD_ENV_EXISTS is not set
+CONFIG_CMD_GPT=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_NAND=y
 CONFIG_CMD_I2C=y
@@ -27,6 +28,7 @@ CONFIG_CMD_TIME=y
 # CONFIG_CMD_MISC is not set
 CONFIG_CMD_FAT=y
 # CONFIG_SPL_DOS_PARTITION is not set
+# CONFIG_SPL_EFI_PARTITION is not set
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_GPIO_UNIPHIER=y
 CONFIG_MISC=y
diff --git a/configs/uniphier_pxs2_ld6b_defconfig 
b/configs/uniphier_pxs2_ld6b_defconfig
index 303098f..00db8b0 100644
--- a/configs/uniphier_pxs2_ld6b_defconfig
+++ b/configs/uniphier_pxs2_ld6b_defconfig
@@ -15,6 +15,7 @@ CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_XIMG is not set
 # CONFIG_CMD_ENV_EXISTS is not set
+CONFIG_CMD_GPT=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_NAND=y
 CONFIG_CMD_I2C=y
@@ -28,6 +29,7 @@ CONFIG_CMD_TIME=y
 # CONFIG_CMD_MISC is not set
 CONFIG_CMD_FAT=y
 # CONFIG_SPL_DOS_PARTITION is not set
+# CONFIG_SPL_EFI_PARTITION is not set
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_GPIO_UNIPHIER=y
 CONFIG_MISC=y
diff --git a/configs/uniphier_sld3_defconfig b/configs/uniphier_sld3_defconfig
index d4e3eed..0be715f 100644
--- a/configs/uniphier_sld3_defconfig
+++ b/configs/uniphier_sld3_defconfig
@@ -15,6 +15,7 @@ CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_XIMG is not set
 # CONFIG_CMD_ENV_EXISTS is not set
+CONFIG_CMD_GPT=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_NAND=y
 CONFIG_CMD_I2C=y
@@ -28,6 +29,7 @@ CONFIG_CMD_TIME=y
 # CONFIG_CMD_MISC is not set
 CONFIG_CMD_FAT=y
 # CONFIG_SPL_DOS_PARTITION is not set
+# CONFIG_SPL_EFI_PARTITION is not set
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_GPIO_UNIPHIER=y
 CONFIG_MISC=y
diff --git a/configs/uniphier_v8_defconfig b/configs/uniphier_v8_defconfig
index 5dadc4c..cb972b2 100644
--- a/configs/uniphier_v8_defconfig
+++ b/configs/uniphier_v8_defconfig
@@ -9,6 +9,7 @@ CONFIG_DEFAULT_DEVICE_TREE="uniphier-ld20-ref"
 CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_XIMG is not set
 # CONFIG_CMD_ENV_EXISTS is not set
+CONFIG_CMD_GPT=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_USB=y
-- 
2.7.4

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[U-Boot] [PATCH] ARM: uniphier: deassert RST_n of eMMC device for LD11/LD20

[Masahiro Yamada]

For LD11 and LD20 SoCs, the RST_n pin is asserted by default.  If
the EXT_CSD[162], bit[1:0] (RST_n_ENABLE) is fused, the eMMC device
would stay in the reset state until its RST_n pin is deasserted by
software.

Currently, this is cared by an ad-hoc way because the eMMC hardware
reset provider is not supported in U-Boot for now.  This code should
be re-written once the "mmc-pwrseq-emmc" binding is supported.

Signed-off-by: Masahiro Yamada 
---

 arch/arm/mach-uniphier/board_init.c   |  1 +
 arch/arm/mach-uniphier/clk/Makefile   |  2 +-
 arch/arm/mach-uniphier/clk/clk-ld11.c |  5 +
 arch/arm/mach-uniphier/clk/clk-ld20.c | 17 +
 arch/arm/mach-uniphier/init.h |  1 +
 5 files changed, 25 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/mach-uniphier/clk/clk-ld20.c

diff --git a/arch/arm/mach-uniphier/board_init.c 
b/arch/arm/mach-uniphier/board_init.c
index e89a4c5..2564a02 100644
--- a/arch/arm/mach-uniphier/board_init.c
+++ b/arch/arm/mach-uniphier/board_init.c
@@ -165,6 +165,7 @@ static const struct uniphier_initdata uniphier_initdata[] = 
{
.nand_2cs = false,
.sbc_init = uniphier_ld11_sbc_init,
.pll_init = uniphier_ld20_pll_init,
+   .clk_init = uniphier_ld20_clk_init,
.misc_init = uniphier_ld20_misc_init,
},
 #endif
diff --git a/arch/arm/mach-uniphier/clk/Makefile 
b/arch/arm/mach-uniphier/clk/Makefile
index 43df670..4134197 100644
--- a/arch/arm/mach-uniphier/clk/Makefile
+++ b/arch/arm/mach-uniphier/clk/Makefile
@@ -24,7 +24,7 @@ obj-$(CONFIG_ARCH_UNIPHIER_PRO5)  += clk-pro5.o
 obj-$(CONFIG_ARCH_UNIPHIER_PXS2)   += clk-pxs2.o
 obj-$(CONFIG_ARCH_UNIPHIER_LD6B)   += clk-pxs2.o
 obj-$(CONFIG_ARCH_UNIPHIER_LD11)   += clk-ld11.o pll-ld11.o
-obj-$(CONFIG_ARCH_UNIPHIER_LD20)   += pll-ld20.o
+obj-$(CONFIG_ARCH_UNIPHIER_LD20)   += clk-ld20.o pll-ld20.o
 obj-$(CONFIG_ARCH_UNIPHIER_PXS3)   += pll-pxs3.o
 
 endif
diff --git a/arch/arm/mach-uniphier/clk/clk-ld11.c 
b/arch/arm/mach-uniphier/clk/clk-ld11.c
index b1e82a1..a4dcde7 100644
--- a/arch/arm/mach-uniphier/clk/clk-ld11.c
+++ b/arch/arm/mach-uniphier/clk/clk-ld11.c
@@ -13,6 +13,8 @@
 #include "../sc64-regs.h"
 #include "../sg-regs.h"
 
+#define SDCTRL_EMMC_HW_RESET   0x59810280
+
 void uniphier_ld11_clk_init(void)
 {
/* if booted from a device other than USB, without stand-by MPU */
@@ -28,6 +30,9 @@ void uniphier_ld11_clk_init(void)
writel(7, SG_ETPHYCNT);
}
 
+   /* TODO: use "mmc-pwrseq-emmc" */
+   writel(1, SDCTRL_EMMC_HW_RESET);
+
 #ifdef CONFIG_USB_EHCI
{
/* FIXME: the current clk driver can not handle parents */
diff --git a/arch/arm/mach-uniphier/clk/clk-ld20.c 
b/arch/arm/mach-uniphier/clk/clk-ld20.c
new file mode 100644
index 000..5bb560c
--- /dev/null
+++ b/arch/arm/mach-uniphier/clk/clk-ld20.c
@@ -0,0 +1,17 @@
+/*
+ * Copyright (C) 2017 Socionext Inc.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+
+#include "../init.h"
+
+#define SDCTRL_EMMC_HW_RESET   0x59810280
+
+void uniphier_ld20_clk_init(void)
+{
+   /* TODO: use "mmc-pwrseq-emmc" */
+   writel(1, SDCTRL_EMMC_HW_RESET);
+}
diff --git a/arch/arm/mach-uniphier/init.h b/arch/arm/mach-uniphier/init.h
index be0ad6c..5c45f2d 100644
--- a/arch/arm/mach-uniphier/init.h
+++ b/arch/arm/mach-uniphier/init.h
@@ -118,6 +118,7 @@ void uniphier_pro4_clk_init(void);
 void uniphier_pro5_clk_init(void);
 void uniphier_pxs2_clk_init(void);
 void uniphier_ld11_clk_init(void);
+void uniphier_ld20_clk_init(void);
 
 unsigned int uniphier_boot_device_raw(void);
 int uniphier_pin_init(const char *pinconfig_name);
-- 
2.7.4

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[U-Boot] [PATCH] dm: rtc: Add 16-bit read/write support

[Bin Meng]

At present there are only 8-bit and 32-bit read/write routines in
the rtc uclass driver. This adds the 16-bit support.

Signed-off-by: Bin Meng 
---

 drivers/rtc/rtc-uclass.c | 30 ++
 include/rtc.h| 20 
 2 files changed, 50 insertions(+)

diff --git a/drivers/rtc/rtc-uclass.c b/drivers/rtc/rtc-uclass.c
index 300e9b3..89312c5 100644
--- a/drivers/rtc/rtc-uclass.c
+++ b/drivers/rtc/rtc-uclass.c
@@ -60,6 +60,36 @@ int rtc_write8(struct udevice *dev, unsigned int reg, int 
val)
return ops->write8(dev, reg, val);
 }
 
+int rtc_read16(struct udevice *dev, unsigned int reg, u16 *valuep)
+{
+   u16 value = 0;
+   int ret;
+   int i;
+
+   for (i = 0; i < sizeof(value); i++) {
+   ret = rtc_read8(dev, reg + i);
+   if (ret < 0)
+   return ret;
+   value |= ret << (i << 3);
+   }
+
+   *valuep = value;
+   return 0;
+}
+
+int rtc_write16(struct udevice *dev, unsigned int reg, u16 value)
+{
+   int i, ret;
+
+   for (i = 0; i < sizeof(value); i++) {
+   ret = rtc_write8(dev, reg + i, (value >> (i << 3)) & 0xff);
+   if (ret)
+   return ret;
+   }
+
+   return 0;
+}
+
 int rtc_read32(struct udevice *dev, unsigned int reg, u32 *valuep)
 {
u32 value = 0;
diff --git a/include/rtc.h b/include/rtc.h
index 69fe8d4..49142b6 100644
--- a/include/rtc.h
+++ b/include/rtc.h
@@ -128,6 +128,26 @@ int rtc_read8(struct udevice *dev, unsigned int reg);
 int rtc_write8(struct udevice *dev, unsigned int reg, int val);
 
 /**
+ * rtc_read16() - Read a 16-bit value from the RTC
+ *
+ * @dev:   Device to read from
+ * @reg:   Offset to start reading from
+ * @valuep:Place to put the value that is read
+ * @return 0 if OK, -ve on error
+ */
+int rtc_read16(struct udevice *dev, unsigned int reg, u16 *valuep);
+
+/**
+ * rtc_write16() - Write a 16-bit value to the RTC
+ *
+ * @dev:   Device to write to
+ * @reg:   Register to start writing to
+ * @value: Value to write
+ * @return 0 if OK, -ve on error
+ */
+int rtc_write16(struct udevice *dev, unsigned int reg, u16 value);
+
+/**
  * rtc_read32() - Read a 32-bit value from the RTC
  *
  * @dev:   Device to read from
-- 
2.9.2

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Re: [U-Boot] [PATCH v4 24/28] arm: socfpga: arria10: Added miscellaneous drivers for Arria 10

[Ley Foon Tan]

On Mon, Jan 23, 2017 at 12:16 PM, Marek Vasut  wrote:
> On 01/10/2017 06:20 AM, Chee Tien Fong wrote:
>> From: Tien Fong Chee 
>>
>> The drivers is restructured such common functions, gen5 functions. and
>> arria10 functions are moved to misc.c, misc_gen5 and misc_arria10
>> respectively.
>>
>> Signed-off-by: Tien Fong Chee 
>> Cc: Marek Vasut 
>> Cc: Dinh Nguyen 
>> Cc: Ching Liang See 
>> Cc: Tien Fong 
>> ---
>>  arch/arm/mach-socfpga/Makefile|   6 +-
>>  arch/arm/mach-socfpga/include/mach/misc.h |  32 ++
>>  arch/arm/mach-socfpga/misc.c  | 427 
>> +-
>>  arch/arm/mach-socfpga/misc_arria10.c  | 255 +++
>>  arch/arm/mach-socfpga/{misc.c => misc_gen5.c} | 232 ++
>>  5 files changed, 337 insertions(+), 615 deletions(-)
>>  create mode 100644 arch/arm/mach-socfpga/include/mach/misc.h
>>  create mode 100644 arch/arm/mach-socfpga/misc_arria10.c
>>  copy arch/arm/mach-socfpga/{misc.c => misc_gen5.c} (66%)
>>
>> diff --git a/arch/arm/mach-socfpga/Makefile b/arch/arm/mach-socfpga/Makefile
>> index b8fcf6e..1ab68be 100644
>> --- a/arch/arm/mach-socfpga/Makefile
>> +++ b/arch/arm/mach-socfpga/Makefile
>> @@ -9,9 +9,11 @@
>>
>>  obj-y+= misc.o timer.o reset_manager.o system_manager.o 
>> clock_manager.o \
>>  fpga_manager.o board.o
>> -obj-$(CONFIG_TARGET_SOCFPGA_ARRIA10) += reset_manager_arria10.o
>> +obj-$(CONFIG_TARGET_SOCFPGA_ARRIA10) += reset_manager_arria10.o 
>> misc_arria10.o \
>> + clock_manager_arria10.o pinmux.o
>>  obj-$(CONFIG_TARGET_SOCFPGA_GEN5) += scan_manager.o wrap_pll_config.o \
>> - reset_manager_gen5.o
>> + reset_manager_gen5.o misc_gen5.o \
>> + clock_manager_gen5.o
>>
>>  ifdef CONFIG_SPL_BUILD
>>  obj-y += spl.o
>> diff --git a/arch/arm/mach-socfpga/include/mach/misc.h 
>> b/arch/arm/mach-socfpga/include/mach/misc.h
>> new file mode 100644
>> index 000..045268d
>> --- /dev/null
>> +++ b/arch/arm/mach-socfpga/include/mach/misc.h
>> @@ -0,0 +1,32 @@
>> +/*
>> + * Copyright (C) 2016, Intel Corporation
>> + *
>> + * SPDX-License-Identifier:GPL-2.0
>> + */
>> +
>> +#ifndef _MISC_H_
>> +#define  _MISC_H_
>
> Use tabs and spaces consistently.
okay.
>
>> +extern void dwmac_deassert_reset(const unsigned int of_reset_id,
>> +  const u32 phymode);
>> +
>> +struct bsel{
>> + const char  *mode;
>> + const char  *name;
>> +};
>> +
>> +extern struct bsel bsel_str[];
>> +
>> +#ifdef CONFIG_FPGA
>> +extern void socfpga_fpga_add(void);
>
> This MUST be declared in some header file, so there should be no need
> for any such crap like extern in C file.
Yes, you are right.
>
>> +#else
>> +inline void socfpga_fpga_add(void) {}
>
> This should be fixed in some fpga.h or whereever this function comes from.
This function is in misc.c now.
>
>> +#endif
>
> This patch probably needs to be dispersed into the other A10 misc patches.
Yes, will restructure this.
>
>> +#if defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
>> +unsigned int dedicated_uart_com_port(const void *blob);
>> +unsigned int shared_uart_com_port(const void *blob);
>> +unsigned int uart_com_port(const void *blob);
>> +#endif
>> +
>> +#endif /* _MISC_H_ */
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Re: [U-Boot] [PATCH v3 04/16] rockchip: mkimage: Add support rk3188 serial

[Kever Yang]

Hi Heiko,

On 02/04/2017 12:09 AM, Heiko Stuebner wrote:

Add the entry for the rk3188 requiring rc4-encryption of the SPL.

Signed-off-by: Heiko Stuebner 
---
  tools/rkcommon.c | 1 +
  1 file changed, 1 insertion(+)

diff --git a/tools/rkcommon.c b/tools/rkcommon.c
index ed9b24137a..6595e02c1c 100644
--- a/tools/rkcommon.c
+++ b/tools/rkcommon.c
@@ -57,6 +57,7 @@ struct spl_info {
  
  static struct spl_info spl_infos[] = {

{ "rk3036", "RK30", 0x1000, false },
+   { "rk3188", "RK31", 0x8000 - 0x800, true },
{ "rk3288", "RK32", 0x8000, false },
{ "rk3399", "RK33", 0x2, false },
  };


Reviewed-by: Kever Yang 

Thanks,
- Kever

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Re: [U-Boot] [PATCH v3 03/16] rockchip: mkimage: Allow encoding of loader code in spl images

[Kever Yang]

Hi Heiko,

On 02/04/2017 12:09 AM, Heiko Stuebner wrote:

Rockchip SoCs allow the spl code to be rc4-encoded, not only the
image header, but only newer SoCs allow this encoding to be disabled.

The rk3188 is not part of those and requires its boot code to be
rc4-encoded with the regular key. So add the ability to do this
encoding via a setting on a per-soc basis when building spl images.

Signed-off-by: Heiko Stuebner 
---
  tools/rkcommon.c | 33 +
  tools/rkcommon.h | 22 ++
  tools/rkimage.c  |  3 +++
  tools/rksd.c |  4 
  tools/rkspi.c|  4 
  5 files changed, 62 insertions(+), 4 deletions(-)

diff --git a/tools/rkcommon.c b/tools/rkcommon.c
index 0a072aa83c..ed9b24137a 100644
--- a/tools/rkcommon.c
+++ b/tools/rkcommon.c
@@ -46,17 +46,19 @@ struct header0_info {
   * @imagename:Image name(passed by "mkimage -n")
   * @spl_hdr:  Boot ROM requires a 4-bytes spl header
   * @spl_size: Spl size(include extra 4-bytes spl header)
+ * @spl_rc4:   RC4 encode the SPL binary (same key as header)
   */
  struct spl_info {
const char *imagename;
const char *spl_hdr;
const uint32_t spl_size;
+   const bool spl_rc4;
  };
  
  static struct spl_info spl_infos[] = {

-   { "rk3036", "RK30", 0x1000 },
-   { "rk3288", "RK32", 0x8000 },
-   { "rk3399", "RK33", 0x2 },
+   { "rk3036", "RK30", 0x1000, false },
+   { "rk3288", "RK32", 0x8000, false },
+   { "rk3399", "RK33", 0x2, false },
  };
  
  static unsigned char rc4_key[16] = {

@@ -113,6 +115,16 @@ int rkcommon_get_spl_size(struct image_tool_params *params)
return info->spl_size;
  }
  
+bool rkcommon_need_rc4_spl(struct image_tool_params *params)

+{
+   struct spl_info *info = rkcommon_get_spl_info(params->imagename);
+
+   /*
+* info would not be NULL, because of we checked params before.
+*/
+   return info->spl_rc4;
+}
+
  int rkcommon_set_header(void *buf, uint file_size,
struct image_tool_params *params)
  {
@@ -124,7 +136,7 @@ int rkcommon_set_header(void *buf, uint file_size,
memset(buf,  '\0', RK_INIT_OFFSET * RK_BLK_SIZE);
hdr = (struct header0_info *)buf;
hdr->signature = RK_SIGNATURE;
-   hdr->disable_rc4 = 1;
+   hdr->disable_rc4 = !rkcommon_need_rc4_spl(params);
hdr->init_offset = RK_INIT_OFFSET;
  
  	hdr->init_size = (file_size + RK_BLK_SIZE - 1) / RK_BLK_SIZE;

@@ -135,3 +147,16 @@ int rkcommon_set_header(void *buf, uint file_size,
  
  	return 0;

  }
+
+void rkcommon_rc4_encode_spl(void *buf, unsigned int offset, unsigned int size)
+{
+   unsigned int remaining = size;
+
+   while (remaining > 0) {
+   int step = (remaining > RK_BLK_SIZE) ? RK_BLK_SIZE : remaining;
+
+   rc4_encode(buf + offset, step, rc4_key);
+   offset += RK_BLK_SIZE;
+   remaining -= step;
+   }
+}
diff --git a/tools/rkcommon.h b/tools/rkcommon.h
index c69540f5f3..b4f6f327dc 100644
--- a/tools/rkcommon.h
+++ b/tools/rkcommon.h
@@ -55,4 +55,26 @@ int rkcommon_get_spl_size(struct image_tool_params *params);
  int rkcommon_set_header(void *buf, uint file_size,
struct image_tool_params *params);
  
+/**

+ * rkcommon_need_rc4_spl() - check if rc4 encoded spl is required
+ *
+ * Some socs cannot disable the rc4-encryption of the spl binary.
+ * rc4 encryption is disabled normally except on socs that cannot
+ * handle unencrypted binaries.
+ * @return true or false depending on rc4 being required.
+ */
+bool rkcommon_need_rc4_spl(struct image_tool_params *params);
+
+/**
+ * rkcommon_rc4_encode_spl() - encode the spl binary
+ *
+ * Encrypts the SPL binary using the generic rc4 key as required
+ * by some socs.
+ *
+ * @buf:   Pointer to the SPL data (header and SPL binary)
+ * @offset:offset inside buf to start at
+ * @size:  number of bytes to encode
+ */
+void rkcommon_rc4_encode_spl(void *buf, unsigned int offset, unsigned int 
size);
+
  #endif
diff --git a/tools/rkimage.c b/tools/rkimage.c
index ef31cb6944..44d098c775 100644
--- a/tools/rkimage.c
+++ b/tools/rkimage.c
@@ -28,6 +28,9 @@ static void rkimage_set_header(void *buf, struct stat *sbuf, 
int ifd,
  {
memcpy(buf + RK_SPL_HDR_START, rkcommon_get_spl_hdr(params),
   RK_SPL_HDR_SIZE);
+
+   if (rkcommon_need_rc4_spl(params))
+   rkcommon_rc4_encode_spl(buf, 4, params->file_size);
  }
  
  static int rkimage_extract_subimage(void *buf, struct image_tool_params *params)

diff --git a/tools/rksd.c b/tools/rksd.c
index a2baa74d31..ff2233ff2d 100644
--- a/tools/rksd.c
+++ b/tools/rksd.c
@@ -41,6 +41,10 @@ static void rksd_set_header(void *buf,  struct stat *sbuf,  
int ifd,
  
  	memcpy(buf + RK_SPL_HDR_START, rkcommon_get_spl_hdr(params),

   RK_SPL_HDR_SIZE);
+
+   if (rkcommon_need_rc4_spl(params))

Re: [U-Boot] [PATCH v3 00/16] rk3188 uboot support

[Kever Yang]

Hi Heiko,

For this patch series, I have test and works on my NAND based rodxa board.

For the sd-card, you will need one patch to fix the problem which I have 
send

to you offline.

Tested-by: Kever Yang 

Thanks,
- Kever
On 02/04/2017 12:09 AM, Heiko Stuebner wrote:

Hi,

this is meant as a status update and possible discussion for
the core parts if needed.

After talking with Simon and Tom the order is now also correct
with tpl -> spl -> uboot.


Status right now is:
- the full uboot still works
- the tpl/spl does start and is able to configure the ddr
   into a working state
- The jump spl -> bootrom -> uboot doesn't work though

On the other hand, Kever was able to make this work, booting
from nand when building the image with a very ancient tool.

All newer tools (including boot_merger.c from Rockchip's uboot)
do not produce working images. But it is possible to produce
a working sd-boot image using the proprietary 1st-stage loader.

See the temporary mkuboot script in the last patch, which can
create both types of images now (especially wrt. the needed
rc4 encryption of everything).

Combining this (it does work using some special tool), it looks
like there is still some minor glitch in the way we build the
spl image somewhere.


Heiko Stuebner (16):
   dm: allow limiting pre-reloc markings to spl or tpl
   rockchip: move bootrom helper compilation to a hidden option
   rockchip: mkimage: Allow encoding of loader code in spl images
   rockchip: mkimage: Add support rk3188 serial
   rockchip: serial: Adapt rockchip of-platdata driver for rk3188
   rockchip: rk3188: Add header files for PMU and GRF
   rockchip: rk3188: Add pinctrl driver
   rockchip: rk3188: Add sysreset driver
   rockchip: rk3188: Add rk3066/rk3188 clock bindings
   rockchip: rk3188: Add clock driver
   rockchip: rk3188: Add core devicetree files
   rockchip: rk3188: Add core support
   rockchip: rk3188: Add sdram driver
   rockchip: rk3188: Add main, spl and tpl boards
   rockchip: rk3188: Add Radxa Rock board
   Add a temporary script that can create a bootimage for rk3188

  arch/arm/dts/Makefile   |   1 +
  arch/arm/dts/rk3188-radxarock.dts   | 382 +
  arch/arm/dts/rk3188.dtsi| 601 +++
  arch/arm/dts/rk3xxx.dtsi| 417 ++
  arch/arm/include/asm/arch-rockchip/cru_rk3188.h | 191 +
  arch/arm/include/asm/arch-rockchip/ddr_rk3188.h |  22 +
  arch/arm/include/asm/arch-rockchip/grf_rk3188.h | 589 ++
  arch/arm/include/asm/arch-rockchip/pmu_rk3188.h |  36 +
  arch/arm/mach-rockchip/Kconfig  |  20 +
  arch/arm/mach-rockchip/Makefile |  14 +-
  arch/arm/mach-rockchip/rk3188-board-spl.c   | 220 ++
  arch/arm/mach-rockchip/rk3188-board-tpl.c   |  87 +++
  arch/arm/mach-rockchip/rk3188-board.c   |  71 ++
  arch/arm/mach-rockchip/rk3188/Kconfig   |  35 +
  arch/arm/mach-rockchip/rk3188/Makefile  |  11 +
  arch/arm/mach-rockchip/rk3188/clk_rk3188.c  |  33 +
  arch/arm/mach-rockchip/rk3188/sdram_rk3188.c| 985 
  arch/arm/mach-rockchip/rk3188/syscon_rk3188.c   |  55 ++
  board/radxa/rock/Kconfig|  15 +
  board/radxa/rock/MAINTAINERS|   6 +
  board/radxa/rock/Makefile   |   7 +
  board/radxa/rock/rock.c |   7 +
  configs/rock_defconfig  |  56 ++
  doc/driver-model/README.txt |   4 +
  drivers/clk/at91/pmc.c  |   3 +-
  drivers/clk/rockchip/Makefile   |   1 +
  drivers/clk/rockchip/clk_rk3188.c   | 523 +
  drivers/core/root.c |   2 +-
  drivers/core/util.c |  29 +
  drivers/pinctrl/Kconfig |   9 +
  drivers/pinctrl/pinctrl-uclass.c|   3 +-
  drivers/pinctrl/rockchip/Makefile   |   1 +
  drivers/pinctrl/rockchip/pinctrl_rk3188.c   | 611 +++
  drivers/serial/serial_rockchip.c|  19 +-
  drivers/sysreset/Makefile   |   1 +
  drivers/sysreset/sysreset_rk3188.c  |  47 ++
  include/configs/rk3188_common.h | 125 +++
  include/configs/rock.h  |  30 +
  include/dm/util.h   |   2 +
  include/dt-bindings/clock/rk3066a-cru.h |  32 +
  include/dt-bindings/clock/rk3188-cru-common.h   | 256 ++
  include/dt-bindings/clock/rk3188-cru.h  |  48 ++
  mkuboot |  35 +
  scripts/Makefile.spl|   7 +-
  tools/dtoc/dtoc.py  |   2 +
  tools/rkcommon.c|  34 +-
  tools/rkcommon.h|  22 +
  tools/rkimage.c   

Re: [U-Boot] [PATCH] ARM: uniphier: disable CONFIG_MTD_NOR_FLASH

[Masahiro Yamada]

2017-02-13 10:29 GMT+09:00 Masahiro Yamada :
> This feature is seldom used these days on UniPhier boards.
>
> Signed-off-by: Masahiro Yamada 

Applied to u-boot-uniphier.

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Re: [U-Boot] [PATCH] ARM: dts: uniphier: drop u-boot, dm-pre-reloc from system-bus pinctrl node

[Masahiro Yamada]

2017-02-12 23:44 GMT+09:00 Masahiro Yamada :
> Since commit 26b09c022ab6 ("ARM: uniphier: move SBC and Support Card
> init code to U-Boot proper"), SPL does not need pin-mux settings for
> the System Bus.
>
> Signed-off-by: Masahiro Yamada 


Applied to u-boot-uniphier.



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Re: [U-Boot] [PATCH 2/2] ARM: uniphier: rename second stage loader name

[Masahiro Yamada]

2017-02-12 18:21 GMT+09:00 Masahiro Yamada :
> For the memory footprint reason, the Boot ROM can not load the ARM
> Trusted Firmware BL1 directly when Trusted Board Boot is enabled.
> The second stage loader is Socionext's own firmware, so rename it
> for clarification.
>
> Signed-off-by: Masahiro Yamada 


Applied to u-boot-uniphier.


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Re: [U-Boot] [PATCH 1/2] pinctrl: uniphier: support pin configuration

[Masahiro Yamada]

2017-02-12 18:21 GMT+09:00 Masahiro Yamada :
> Support the following DT properties:
>   "bias-disable"
>   "bias-pull-up"
>   "bias-pull-down"
>   "bias-pull-pin-default"
>   "input-enable"
>   "input-disable"
>
> My main motivation is to support pull up/down biasing.  For Pro5 and
> later SoCs, the pupdctrl register number is the same as the pinmux
> number, so this feature can be supported without having big pin
> tables.
>
> Signed-off-by: Masahiro Yamada 

Applied to u-boot-uniphier.


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Re: [U-Boot] [PATCH] ARM: uniphier: remove DRAM base address from board parameters

[Masahiro Yamada]

2017-02-05 10:52 GMT+09:00 Masahiro Yamada :
> The base address of each DRAM channel can be calculated from other
> parameters, so does not need hard-coding.  What we need is the size
> of each DRAM channel and DRAM_SPARSE flag to decide the start address
> of DRAM channel 1.
>
> Signed-off-by: Masahiro Yamada 

Applied to u-boot-uniphier.


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Re: [U-Boot] [PATCH] ARM: uniphier: enable generic EHCI driver for uniphier_v8_defconfig

[Masahiro Yamada]

2017-02-07 21:25 GMT+09:00 Masahiro Yamada :
> The LD11 SoC is equipped with USB EHCI controllers.
>
> Signed-off-by: Masahiro Yamada 


Applied to u-boot-uniphier.


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Re: [U-Boot] [PATCH] ARM: uniphier: update README.uniphier for latest build instruction

[Masahiro Yamada]

2017-01-30 13:12 GMT+09:00 Masahiro Yamada :
> Since commit c0efc3140e75 ("ARM: uniphier: change CONFIG_SPL_PAD_TO
> to 128KB"), the u-boot.bin should be burned at the offset 0x2.
> I missed to update README.uniphier in that commit.  Now updating.
>
> Signed-off-by: Masahiro Yamada 


Applied to u-boot-uniphier.




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Re: [U-Boot] [PATCH v1 3/3] x86: Intel MID platforms has no microcode update

[Bin Meng]

Hi Andy,

On Wed, Feb 15, 2017 at 5:52 PM, Andy Shevchenko
 wrote:
> On Wed, 2017-02-15 at 11:10 +0800, Bin Meng wrote:
>> Hi Andy,
>>
>> On Tue, Feb 14, 2017 at 10:47 PM, Andy Shevchenko
>>  wrote:
>> > There is no microcode update available for SoCs used on Intel MID
>> > platforms.
>> >
>> > Use conditional to bypass it.
>> >
>> > Signed-off-by: Andy Shevchenko 
>> > ---
>> >  arch/x86/cpu/mp_init.c | 2 +-
>> >  1 file changed, 1 insertion(+), 1 deletion(-)
>> >
>> > diff --git a/arch/x86/cpu/mp_init.c b/arch/x86/cpu/mp_init.c
>> > index 988073cc79..4e2f000f75 100644
>> > --- a/arch/x86/cpu/mp_init.c
>> > +++ b/arch/x86/cpu/mp_init.c
>> > @@ -248,7 +248,7 @@ static int load_sipi_vector(atomic_t
>> > **ap_countp, int num_cpus)
>> > if (!stack)
>> > return -ENOMEM;
>> > params->stack_top = (u32)(stack + size);
>> > -#if !defined(CONFIG_QEMU) && !defined(CONFIG_HAVE_FSP)
>> > +#if !defined(CONFIG_QEMU) && !defined(CONFIG_HAVE_FSP) &&
>> > !defined(CONFIG_INTEL_MID)
>> > params->microcode_ptr = ucode_base;
>> > debug("Microcode at %x\n", params->microcode_ptr);
>> >  #endif
>>
>> Is this patch necessary? If Intel MID does not define CONFIG_QEMU or
>> CONFIG_HAVE_FSP, current logic should work.
>
> This code is executed when neither of option is defined. For Intel MID
> we do *not* need to have this code executed.
>
> I dunno how it possible can work otherwise (ucode_base is not defined).
>

OK, is this common feature for all Intel MID device? This mp_init.c is
conditionally built by CONFIG_SMP. So I believe this Tangier SoC is a
multi-core processor, but does not have any microcode.

Regards,
Bin
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Re: [U-Boot] [PATCH v1 1/3] x86: Introduce INTEL_MID quirk option

[Bin Meng]

Hi Andy,

On Wed, Feb 15, 2017 at 6:15 PM, Andy Shevchenko
 wrote:
> On Wed, 2017-02-15 at 18:09 +0800, Bin Meng wrote:
>> Hi Andy,
>>
>> On Wed, Feb 15, 2017 at 5:50 PM, Andy Shevchenko
>>  wrote:
>> > On Wed, 2017-02-15 at 11:00 +0800, Bin Meng wrote:
>> > > On Tue, Feb 14, 2017 at 10:47 PM, Andy Shevchenko
>> > >  wrote:
>
>> > > What's the architecture of Intel Edison? Normally such platform
>> > > Kconfig option should go to arch/x86/cpu//Kconfig
>> >
>> > What do you mean?
>> > x86_64.
>>
>> Sorry I should say what the platform is, like Ivybridge, Baytrail,
>> Quark that U-Boot currently supports.
>
> It's misunderstanding here.
> arch/x86/cpu//
> So, all of above either SoC or platform. A little mess.
>

Yes, it's either SoC (single chipset), or platform (CPU plus platform
controller).

> So, we will put the code to tangier folder because Intel Tangier is SoC.
> Platform is Intel Merrifield.
>
>>  If this is a new platform,
>
> Yes.
>
>>  we
>> should probably move it to arch/x86/cpu//Kconfig.
>
> Probably not. Intel MID covers more than one SoC/platform. This option
> is x86 scope.
>

OK, so can you please add a help text for the new config to describe
what MID is and its features? I assume it has some difference that
worth introducing such a sub-arch option.

> I dunno that U-Boot will run on the rest MID devices, but for sake of
> logic and consistency it is not about Edison or Merrifield or Tangier.

Regards,
Bin
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Re: [U-Boot] [PATCH v3 00/16] rk3188 uboot support

[Heiko Stübner]

Hi Simon,

Am Donnerstag, 16. Februar 2017, 13:43:45 CET schrieb Simon Glass:
> On 3 February 2017 at 09:09, Heiko Stuebner  wrote:
> > this is meant as a status update and possible discussion for
> > the core parts if needed.
> > 
> > After talking with Simon and Tom the order is now also correct
> > with tpl -> spl -> uboot.
> > 
> > 
> > Status right now is:
> > - the full uboot still works
> > - the tpl/spl does start and is able to configure the ddr
> > 
> >   into a working state
> > 
> > - The jump spl -> bootrom -> uboot doesn't work though
> > 
> > On the other hand, Kever was able to make this work, booting
> > from nand when building the image with a very ancient tool.
> > 
> > All newer tools (including boot_merger.c from Rockchip's uboot)
> > do not produce working images. But it is possible to produce
> > a working sd-boot image using the proprietary 1st-stage loader.
> > 
> > See the temporary mkuboot script in the last patch, which can
> > create both types of images now (especially wrt. the needed
> > rc4 encryption of everything).
> > 
> > Combining this (it does work using some special tool), it looks
> > like there is still some minor glitch in the way we build the
> > spl image somewhere.
> 
> What should we do with this series? There are a few minor things to
> resolve but other than that, do you think it is ready to apply?

It's somehow always on the backburner, but I already started fixing the things 
you pointed out. Though I'll be in Portland, Mountain View and San Francisco 
for the next two weeks, so will only be able to resend the fixes after that.


> The above problem could perhaps be resolved later if there is a
> suitable README describing it?

Kever  already found out, that the sd read the bootrom does fails when trying 
to load the uboot from the spl. I'm still trying to investigate this [same 
Portland remark applies], but if you're ok with stuff going in in this state, 
that is definitly fine by me, as it spares me from sending the full series all 
the time ;-)


Heiko

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Re: [U-Boot] [PATCH v3 01/16] dm: allow limiting pre-reloc markings to spl or tpl

[Heiko Stübner]

Hi Simon,

Am Montag, 6. Februar 2017, 07:34:54 CET schrieb Simon Glass:
> On 3 February 2017 at 08:09, Heiko Stuebner  wrote:
> > Right now the u-boot,dm-pre-reloc flag will make each marked node
> > always appear in both spl and tpl. But systems needing an additional
> > tpl might have special constraints for each, like the spl needing to
> > be very tiny.
> > 
> > So introduce two additional flags to mark nodes for only spl or tpl
> > environments and introduce a function dm_fdt_pre_reloc to automate
> > the necessary checks in code instances checking for pre-relocation
> > flags.
> > 
> > The behaviour of the original flag stays untouched and still marks
> > a node for both spl and tpl.
> > 
> > Signed-off-by: Heiko Stuebner 
> > ---
> > 
> >  doc/driver-model/README.txt  |  4 
> >  drivers/clk/at91/pmc.c   |  3 ++-
> >  drivers/core/root.c  |  2 +-
> >  drivers/core/util.c  | 29 +
> >  drivers/pinctrl/pinctrl-uclass.c |  3 ++-
> >  include/dm/util.h|  2 ++
> >  scripts/Makefile.spl |  7 ++-
> >  tools/dtoc/dtoc.py   |  2 ++
> >  8 files changed, 48 insertions(+), 4 deletions(-)
> 
> Reviewed-by: Simon Glass 
> 
> s/u-boot/U-Boot
> 
> Please add a comment for dm_fdt_pre_reloc() in the header file.
> 
> Two things to consider:
> 
> - Should we drop the use of u-boot,dm-pre-reloc in Makefile.spl, and
> convert all users to your version? This would mean having both
> u-boot,dm-pre-reloc and u-boot,dm-spl in some cases, I suspect.
^^ u-boot,dm-spl and u-boot,dm-tpl I guess

Dropping u-boot,dm-pre-reloc is for you to decide, as you wrote the original 
implementation ;-) . It will save one fdt-query but might need several 
iterations as I guess new boards will add new ones after we remove the old 
ones.

> - Can you use #ifdef in SPL/TPL to reduce code size fractionally in
> dm_fdt_pre_reloc()?

Do you mean moving the
+   dm_spl = fdt_getprop(blob, offset, "u-boot,dm-spl", NULL);
+   dm_tpl = fdt_getprop(blob, offset, "u-boot,dm-tpl", NULL);

into the existing #ifdef CONFIG_TPL_BUILD / SPL_BUILD blocks or something 
else?


Thanks
Heiko
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[U-Boot] socfpga qspi issues on SoCKit devkit

[Rush, Jason A.]

The QSPI NOR interface on the Altera Cyclone V SoCKit devkit (Rev B) appears to 
be broken in the current release.  I've tracked it down to working in the 
v2016.07 release, but broken in the the v2016.09 release.  With the help of git 
bisect, I tracked down the commit that breaks the QSPI to the following:

  commit dac3bf20fb2c9b03476be0d73db620f62ab3cee1
  Author: Vignesh R 
  Date:   Wed Jul 6 10:20:55 2016 +0530

  spi: cadence_qspi_apb: Support 32 bit AHB address

  AHB address can be as long as 32 bit, hence remove the
  CQSPI_REG_INDIRECTRDSTARTADDR mask. Since AHB address is passed from DT
  and read as u32 value, it anyway does not make sense to mask upper bits.

  Signed-off-by: Vignesh R 
  Tested-by: Marek Vasut 
  Acked-by: Marek Vasut 
  Reviewed-by: Jagan Teki 

When I try and read anything from the QSPI on the 
dac3bf20fb2c9b03476be0d73db620f62ab3cee1 commit I get a "data abort" and the 
CPU resets.  Example output below is from a clean build of U-Boot configured 
with socfpga_sockit_defconfig:

 => sf probe
  SF: Detected N25Q1024 with page size 256 Bytes, erase size 64 KiB, total 128 
MiB
  => sf read 0x200 0x5 0x5000
  device 0 offset 0x5, size 0x5000
  data abort
  pc : [<3ff7a9bc>]  lr : [<3ff98359>]
  reloc pc : [<010249fc>]lr : [<01042399>]
  sp : 3bf4fde8  ip : 3ff7a371 fp : 0002
  r10:   r9 : 3bf54ee8 r8 : 3bf55530
  r7 : 270d  r6 : 0200 r5 : 5000  r4 : 3bf55530
  r3 : 0004  r2 :  r1 : 0200  r0 : ffa0
  Flags: nZCv  IRQs off  FIQs off  Mode SVC_32
  Resetting CPU ...

When I run the same commands with the previous commit in the git log 
(fdf02a36c52cb96717b64113775c4251ecd49596) I get the following output:

  => sf probe
  SF: Detected N25Q1024 with page size 256 Bytes, erase size 64 KiB, total 128 
MiB
  => sf read 0x200 0x5 0x5000
  device 0 offset 0x5, size 0x5000
  SF: 20480 bytes @ 0x5 Read: OK
  =>

I've done some investigation, and previously the ahbbase was masked so the 
value 0xFFA0_ results in 0x0 when writing the CQSPI_REG_INDIRECTTRIGGER 
register.  I assume the above commit works on some boards, but it appears to 
break the socfpga arch.

Is there someone that could help investigate or confirm this?

Thanks,
Jason

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Re: [U-Boot] [PATCH 3/9] zymqmp: Replace home grown mmu code with generic table approach

[brettstahlman]

I'm trying to boot on a Zynq Ultrascale+ (ARM Cortex-A53 64-bit), and u-boot
is panicking in create_table with "Insufficient RAM for page table", along
with the recommendation "Please increase the size in get_page_table_size()".

What is the likely root cause, and what's the best way to increase the size?



--
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Re: [U-Boot] ARMv7 EFI loader broken?

[Michal Suchanek]

On 14 February 2017 at 15:50, Michal Suchanek  wrote:
> Hello,
>
> I tired to build u-boot master for Snow board, install grub, chainload grub.
>
> In short, it fails.
>
> First, u-boot searches for EFI loader in ${distro_bootpart} which
> defaults to unset and is interpreted as 1. grub wants the partition it
> installs to to have the EFI System GUID. So to boot you need to set
> the first partition to EFI System GUID and install grub there.
> Further, grub installs as EFI/debian/grubarm.efi while u-boot searches
> for /efi/boot/bootarm.efi. This is not even a  variable - it's
> hardcoded in several places in the default efi boot script. Given that
> saving environment does not work on Snow changing the environment
> requires rebuild either way. Or change what is on the disk.
>
> Finally, when grub loads I get this:
>
> snow # setenv distro_bootpart 4
> snow # boot
> switch to partitions #0, OK
> mmc1 is current device
> Scanning mmc 1:4...
> Found EFI removebla media binary efi/boot/bootarm.efi
> reading efi/boot/bootarm.efi
> 88576 bytes read in 42 ms (2 MiB/s)
> libfdt fdt_check_header(): FDT_ERR_BADMAGIC
> ## Starting EFI application at 4200 ...
> Scanning disks on usb...
> Scanning disks on mmc...
> MMC Device 2 not found
> MMC Device 3 not found
> Found 6 disks
> ←[?25h←[?25l←[?25l
>
> And that is all.
>
> No reaction to keypresses.
>
> Any idea what is wrong in this case? It seems like grub starts and
> then fails to do whatever it is supposed to do. Is there some special
> support in grub needed? I would expect that would be against the point
> of having an EFI emulation, right?

OK, so I tried to use EFI/opensuse/grubarm.efi instead of
EFI/debian/grubarm.efi and now I see that garbage as well as grub
welcome header. So I guess the Debian grub uses defaults even less
compatible with the u-boot EFI emulation than openSUSE.

Since the Snow board does not have a known serial port and the EFI
terminal emulation on efifb is not working with grub I will try to
stick to the known working syslinux emulation on Snow.

Best regards

Michal
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Re: [U-Boot] [PATCH v2] spl: net: Add FIT image support over network boot

[Andrew F. Davis]

On 02/15/2017 05:07 AM, Vignesh R wrote:
> Hi,
> 
> On Wednesday 08 February 2017 11:21 PM, Davis, Andrew wrote:
>> FIT support in the net boot case is much like the RAM boot case in that
>> we load our image to "load_addr" and pass a dummy read function into
>> "spl_load_simple_fit()". As the load address is no longer hard-coded to
>> the final execution address, RAW image loading will rely on "load_addr"
>> pointing to the execution address as they should have before.
>>
> 
> [...]
> 
>>  #if defined(CONFIG_SPL_ETH_SUPPORT) || defined(CONFIG_SPL_USBETH_SUPPORT)
>> +static ulong spl_net_load_read(struct spl_load_info *load, ulong sector,
>> +   ulong count, void *buf)
>> +{
>> +debug("%s: sector %lx, count %lx, buf %lx\n",
>> +  __func__, sector, count, (ulong)buf);
>> +memcpy(buf, (void *)(load_addr + sector), count);
>> +return count;
>> +}
>> +
>>  static int spl_net_load_image(struct spl_image_info *spl_image,
>>struct spl_boot_device *bootdev)
>>  {
>> +struct image_header *header = (struct image_header *)load_addr;
>>  int rv;
>>  
>>  env_init();
>>  env_relocate();
>>  setenv("autoload", "yes");
>> -load_addr = CONFIG_SYS_TEXT_BASE - sizeof(struct image_header);
> 
> This breaks when FIT image is not used (For example, breaks
> am335x_evm_usbspl_defconfig)
> 
> Below snippet helps non FIT case:
> 
> +   if (!IS_ENABLED(CONFIG_SPL_LOAD_FIT))
> +   load_addr = CONFIG_SYS_TEXT_BASE - sizeof(struct
> image_header);
> +
> 

This isn't right, it may happen that the image is not a FIT image but
support for FIT loading is till enabled. This will break that case.

It doesn't seem there is a good standard for where to load the image
header before we know what type of image it is.

Andrew

> 
> 
>>  rv = eth_initialize();
>>  if (rv == 0) {
>>  printf("No Ethernet devices found\n");
>> @@ -36,8 +46,22 @@ static int spl_net_load_image(struct spl_image_info 
>> *spl_image,
>>  printf("Problem booting with BOOTP\n");
>>  return rv;
>>  }
>> -return spl_parse_image_header(spl_image,
>> -  (struct image_header *)load_addr);
>> +
>> +if (IS_ENABLED(CONFIG_SPL_LOAD_FIT) &&
>> +image_get_magic(header) == FDT_MAGIC) {
>> +struct spl_load_info load;
>> +
>> +debug("Found FIT\n");
>> +load.bl_len = 1;
>> +load.read = spl_net_load_read;
>> +rv = spl_load_simple_fit(spl_image, , 0, header);
>> +} else {
>> +debug("Legacy image\n");
>> +
>> +rv = spl_parse_image_header(spl_image, header);
>> +}
>> +
>> +return rv;
>>  }
>>  #endif
>>  
>>
> 
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Re: [U-Boot] [PATCH v3 4/8] armv8: Add workaround for USB erratum A-009007

[york sun]

On 02/03/2017 06:08 AM, Suresh Gupta wrote:
> Rx Compliance tests  may fail intermittently at high
> jitter frequencies using default register values
>
> Changes identified in test setup makes the Rx compliance test pass
>
> Signed-off-by: Sriram Dash 
> Signed-off-by: Rajesh Bhagat 
> Signed-off-by: Suresh Gupta 
> ---
> Changes in v2:
>   Clean up the code after Scott comments,
>   Previously in v1, we was defining the pointer as u32,
>   then casting it to u8, and then passing it to
>   a 16-bit accessor.
> Changes in v3:
>   Change CONFIG_XXX to CONFIG_ARCH_XXX
>
>
>  arch/arm/cpu/armv8/fsl-layerscape/Kconfig  |  6 
>  arch/arm/cpu/armv8/fsl-layerscape/soc.c| 42 
> ++
>  .../include/asm/arch-fsl-layerscape/immap_lsch2.h  |  9 +
>  .../include/asm/arch-fsl-layerscape/immap_lsch3.h  |  9 +
>  4 files changed, 66 insertions(+)
>
> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig 
> b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
> index d5d6040..a27e310 100644
> --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
> +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
> @@ -25,6 +25,7 @@ config ARCH_LS1043A
>   select SYS_FSL_ERRATUM_A009008
>   select SYS_FSL_ERRATUM_A009798
>   select SYS_FSL_ERRATUM_A008997
> + select SYS_FSL_ERRATUM_A009007
>   select SYS_FSL_HAS_DDR3
>   select SYS_FSL_HAS_DDR4
>   select ARCH_EARLY_INIT_R
> @@ -46,6 +47,7 @@ config ARCH_LS1046A
>   select SYS_FSL_ERRATUM_A009008
>   select SYS_FSL_ERRATUM_A009798
>   select SYS_FSL_ERRATUM_A008997
> + select SYS_FSL_ERRATUM_A009007
>   select SYS_FSL_HAS_DDR4
>   select SYS_FSL_SRDS_2
>   select ARCH_EARLY_INIT_R
> @@ -77,6 +79,7 @@ config ARCH_LS2080A
>   select SYS_FSL_ERRATUM_A009008
>   select SYS_FSL_ERRATUM_A009798
>   select SYS_FSL_ERRATUM_A008997
> + select SYS_FSL_ERRATUM_A009007
>   select ARCH_EARLY_INIT_R
>   select BOARD_EARLY_INIT_F
>
> @@ -167,6 +170,9 @@ config SYS_FSL_ERRATUM_A009798
>  config SYS_FSL_ERRATUM_A008997
>   bool "Workaround for USB PHY erratum A008997"
>
> +config SYS_FSL_ERRATUM_A009007
> + bool "Workaround for USB PHY erratum A009007"
> +
>  config MAX_CPUS
>   int "Maximum number of CPUs permitted for Layerscape"
>   default 4 if ARCH_LS1043A
> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c 
> b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
> index c56cb72..9aab8a7 100644
> --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
> +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
> @@ -120,6 +120,46 @@ static void erratum_a008997(void)
>  #endif
>  #endif /* CONFIG_SYS_FSL_ERRATUM_A008997 */
>  }
> +static void erratum_a009007(void)
> +{
> +/* TODO:implement the out_be16 instead of writew which is taking
> +little endian style */

Did you mean to remind yourself to finish this before sending this 
patch? You know we already have out_be16(), don't you?

York
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Re: [U-Boot] [PATCH v1 1/3] x86: Introduce INTEL_MID quirk option

[Simon Glass]

On 14 February 2017 at 07:47, Andy Shevchenko
 wrote:
> Intel Mobile Internet Device (MID) platforms have special treatment in
> some cases, such as CPU enumeration or boot parameters configuration.
>
> Here we introduce specific quirk option for such cases.
>
> It is supposed to be selected by Intel MID platform boards, for example,
> Intel Edison.
>
> Signed-off-by: Andy Shevchenko 
> ---
>  arch/x86/Kconfig | 4 
>  1 file changed, 4 insertions(+)

Reviewed-by: Simon Glass 
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Re: [U-Boot] Veyron-speedy u-boot

[Simon Glass]

Hi Riley,

On 15 February 2017 at 17:31, Riley Baird  wrote:
>
> Hi Simon,
>
> I've tried porting u-boot to the veyron-speedy Chromebook, based upon
> the veyron-minnie patch.
>
> I've attached a patch with my changes to this email.
>
> However, when I boot, all I get is a black screen. So, I have some
> questions:
>
> 1. Does u-boot show output to the laptop's screen, or do I have to make
> a serial console?

It should show on both if all is well.

> 2. If I have to make a serial console, where do I do this/what is the
> pin layout?

You need a servo connector on the board - see here:
https://www.chromium.org/chromium-os/servo

> 3. Do I just have to sign u-boot-dtb.img with vbutil_kernel before
> dd-ing it onto a USB, or do I have to do something else to make the
> right image?

I normally start up U-Boot from scratch, but it sounds like you are
chain-loading it.

In that case I'm not sure what to do as I have not tried it. Your
steps sound correct.

I've copied Tomeu who may know how to do this. If you figure it out it
would be great to get a patch to README.rockchip.

Regards,
Simon
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Re: [U-Boot] [PATCH v1 2/3] x86: zImage: add Intel MID platforms support

[Simon Glass]

On 14 February 2017 at 20:08, Bin Meng  wrote:
> On Tue, Feb 14, 2017 at 10:47 PM, Andy Shevchenko
>  wrote:
>> From: Vincent Tinelli 
>>
>> Intel MID platform boards have special treatment, such as boot parameter
>> setting.
>>
>> Assign hardware_subarch accordingly if CONFIG_INTEL_MID is set.
>>
>> Signed-off-by: Vincent Tinelli 
>> Signed-off-by: Andy Shevchenko 
>> ---
>>  arch/x86/lib/zimage.c | 4 
>>  1 file changed, 4 insertions(+)
>>
>
> Reviewed-by: Bin Meng 

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH v4 8/9] STiH410-B2260: Add device tree

[Simon Glass]

On 14 February 2017 at 07:38,   wrote:
> From: Patrice Chotard 
>
> This device tree has been extracted from v4.9 kernel
>
> Signed-off-by: Patrice Chotard 
> Reviewed-by: Tom Rini 
> ---
>
> v4 : _ Add mising "stdout-path" property in arch/arm/dts/stih410-b2260.dts
>which allow serial driver to be probed
>
>  arch/arm/dts/Makefile |2 +
>  arch/arm/dts/st-pincfg.h  |   71 ++
>  arch/arm/dts/stih407-clock.dtsi   |  326 ++
>  arch/arm/dts/stih407-family.dtsi  |  977 +++
>  arch/arm/dts/stih407-pinctrl.dtsi | 1303 
> +
>  arch/arm/dts/stih410-b2260.dts|  226 
>  arch/arm/dts/stih410-clock.dtsi   |  347 ++
>  arch/arm/dts/stih410-pinctrl.dtsi |   34 +
>  arch/arm/dts/stih410.dtsi |  454 +++
>  drivers/mmc/Kconfig   |2 +-
>  include/dt-bindings/clock/stih407-clks.h  |   90 ++
>  include/dt-bindings/clock/stih410-clks.h  |   25 +
>  include/dt-bindings/interrupt-controller/irq-st.h |   30 +
>  include/dt-bindings/mfd/st-lpc.h  |   16 +
>  include/dt-bindings/reset/stih407-resets.h|   65 +
>  15 files changed, 3967 insertions(+), 1 deletion(-)
>  create mode 100644 arch/arm/dts/st-pincfg.h
>  create mode 100644 arch/arm/dts/stih407-clock.dtsi
>  create mode 100644 arch/arm/dts/stih407-family.dtsi
>  create mode 100644 arch/arm/dts/stih407-pinctrl.dtsi
>  create mode 100644 arch/arm/dts/stih410-b2260.dts
>  create mode 100644 arch/arm/dts/stih410-clock.dtsi
>  create mode 100644 arch/arm/dts/stih410-pinctrl.dtsi
>  create mode 100644 arch/arm/dts/stih410.dtsi
>  create mode 100644 include/dt-bindings/clock/stih407-clks.h
>  create mode 100644 include/dt-bindings/clock/stih410-clks.h
>  create mode 100644 include/dt-bindings/interrupt-controller/irq-st.h
>  create mode 100644 include/dt-bindings/mfd/st-lpc.h
>  create mode 100644 include/dt-bindings/reset/stih407-resets.h

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH v4 7/9] STiH410: Add STi pinctrl driver

[Simon Glass]

On 14 February 2017 at 07:38,   wrote:
> From: Patrice Chotard 
>
> Add STMicroelectronics STiH410 pinctrl driver
>
> Signed-off-by: Patrice Chotard 
> Reviewed-by: Tom Rini 
> ---
>  drivers/pinctrl/Kconfig   |  10 ++
>  drivers/pinctrl/Makefile  |   1 +
>  drivers/pinctrl/pinctrl-sti.c | 320 
> ++
>  3 files changed, 331 insertions(+)
>  create mode 100644 drivers/pinctrl/pinctrl-sti.c

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH] rockchip: firefly: configs: remove config_spl_of_platdata

[Simon Glass]

Hi,

On 14 February 2017 at 23:41, Jacob Chen  wrote:
> Hi Kever,
>
>
> Kever Yang wrote on 2017年02月15日 14:13:
>>
>> Hi Jacob,
>>
>> On 02/15/2017 11:06 AM, Jacob Chen wrote:
>>>
>>> We should remove config_spl_of_platdata to build u-boot-spl-dtb.bin
>>> rather than u-boot-spl-nodtb.bin
>>> since we use spl_back_to_brom.
>>
>>
>> Have you try with CONFIG_SPL_OF_PLATDATA on and without SPL_BACK_TO_BROM?
>>
>> If this works on firefly, then we can still leave it as an example to show
>> how both way works.
>>
>
> Firefly had been using CONFIG_SPL_OF_PLATDATA and it works well.
> Just it will make trouble for other things to generate the u-boot blob,
> like yocto, sdk build scripts, guides...
>
> At first, I also want to keep  CONFIG_SPL_OF_PLATDATA in firefly, but later
> I find that i have to do a lot of unnecessary work to deal with it,
> so now I would like one chip use one way to generate the u-boot blob.

How about having a separate board config like firefly-rk3288-dt so
that we keep the non-of-platdata alive? It only needs a separate
defconfig, which is pretty esay.

Regards,
Simon
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Re: [U-Boot] [PATCH v4 9/9] board: Add STMicroelectronics STiH410-B2260 support

[Simon Glass]

On 14 February 2017 at 07:38,   wrote:
> From: Patrice Chotard 
>
> This is a 96Board compliant board based on STiH410 SoC:
>   - 1GB DDR
>   - On-Board USB combo WiFi/Bluetooth RTL8723BU
> with PCB soldered antenna
>   - Ethernet 1000-BaseT
>   - SATA
>   - HDMI
>   - 2 x USB2.0 type A
>   - 1 x USB2.0 type micro-AB
>   - SD card slot
>   - High speed connector (SD/I2C/USB interfaces)
>   - Low speed connector (UART/I2C/GPIO/SPI/PCM interfaces)

This is great info - you might consider adding it to Kconfig help?

>
> Signed-off-by: Patrice Chotard 
> Reviewed-by: Tom Rini 
> ---
>
> v4: _ board.c cleanup, remove serial useless platdata
>
> v3: _ add entry in board MAINTAINERS
> _ remove useless arch/arm/include/asm/arch-stih410/syscfg.h
> _ remove useless arch/arm/include/asm/arch-stih410/gpio.h
>
>
>  arch/arm/mach-sti/Kconfig  |  2 ++
>  board/st/stih410-b2260/Kconfig | 19 
>  board/st/stih410-b2260/MAINTAINERS |  7 +
>  board/st/stih410-b2260/Makefile|  8 +
>  board/st/stih410-b2260/board.c | 28 ++
>  configs/stih410-b2260_defconfig| 26 +
>  include/configs/stih410-b2260.h| 60 
> ++
>  7 files changed, 150 insertions(+)
>  create mode 100644 board/st/stih410-b2260/Kconfig
>  create mode 100644 board/st/stih410-b2260/MAINTAINERS
>  create mode 100644 board/st/stih410-b2260/Makefile
>  create mode 100644 board/st/stih410-b2260/board.c
>  create mode 100644 configs/stih410-b2260_defconfig
>  create mode 100644 include/configs/stih410-b2260.h

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH v1 3/3] x86: Intel MID platforms has no microcode update

[Simon Glass]

On 14 February 2017 at 07:47, Andy Shevchenko
 wrote:
> There is no microcode update available for SoCs used on Intel MID
> platforms.
>
> Use conditional to bypass it.
>
> Signed-off-by: Andy Shevchenko 
> ---
>  arch/x86/cpu/mp_init.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH v4 4/9] STiH410: Add STi serial driver

[Simon Glass]

On 14 February 2017 at 07:38,   wrote:
> From: Patrice Chotard 
>
> This patch adds support to ASC (asynchronous serial controller)
> driver, which is basically a standard serial driver. This IP
> is common across other STMicroelectronics SoCs
>
> Signed-off-by: Patrice Chotard 
> ---
>
> v4: _ fix STi serial driver to be fully DT compliant
> _ remove useless code already supported by serial uclass
> _ remove useless arch/arm/include/asm/arch-stih410/sti.h
>
> v3: _ use the fallback table from include/config_fallbacks.h
>
>
>  arch/arm/Kconfig|   2 +
>  drivers/serial/Kconfig  |   8 ++
>  drivers/serial/Makefile |   1 +
>  drivers/serial/serial_sti_asc.c | 211 
> 
>  4 files changed, 222 insertions(+)
>  create mode 100644 drivers/serial/serial_sti_asc.c
>

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Re: [U-Boot] [PATCH v4 5/9] gpio: do not include for ARCH_STI

[Simon Glass]

On 14 February 2017 at 07:38,   wrote:
> From: Patrice Chotard 
>
> As no gpio.h is defined in arch/arm/include/asm/arch-stih410,
> to avoid compilation failure, do not include asm/arch/gpio.h.
>
> This is needed for example when including sdhci.h, which include
> asm/gpio.h>.
>
> Signed-off-by: Patrice Chotard 
> ---
>  arch/arm/include/asm/gpio.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

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Re: [U-Boot] [PATCH v4 2/9] STiH410: Add STi timer driver

[Simon Glass]

On 14 February 2017 at 07:38,   wrote:
> From: Patrice Chotard 
>
> Add ARM global timer based timer
>
> Signed-off-by: Patrice Chotard 
> ---
>
> v3 : _ convert previous arch/arm/mach-sti/timer.c into STi timer driver
>
>
>  drivers/timer/Kconfig |  7 +
>  drivers/timer/Makefile|  1 +
>  drivers/timer/sti-timer.c | 78 
> +++
>  3 files changed, 86 insertions(+)
>  create mode 100644 drivers/timer/sti-timer.c

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Re: [U-Boot] [PATCH v3 00/16] rk3188 uboot support

[Simon Glass]

Hi Heiko,

On 3 February 2017 at 09:09, Heiko Stuebner  wrote:
> Hi,
>
> this is meant as a status update and possible discussion for
> the core parts if needed.
>
> After talking with Simon and Tom the order is now also correct
> with tpl -> spl -> uboot.
>
>
> Status right now is:
> - the full uboot still works
> - the tpl/spl does start and is able to configure the ddr
>   into a working state
> - The jump spl -> bootrom -> uboot doesn't work though
>
> On the other hand, Kever was able to make this work, booting
> from nand when building the image with a very ancient tool.
>
> All newer tools (including boot_merger.c from Rockchip's uboot)
> do not produce working images. But it is possible to produce
> a working sd-boot image using the proprietary 1st-stage loader.
>
> See the temporary mkuboot script in the last patch, which can
> create both types of images now (especially wrt. the needed
> rc4 encryption of everything).
>
> Combining this (it does work using some special tool), it looks
> like there is still some minor glitch in the way we build the
> spl image somewhere.

What should we do with this series? There are a few minor things to
resolve but other than that, do you think it is ready to apply?

The above problem could perhaps be resolved later if there is a
suitable README describing it?

Regards,
Simon
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Re: [U-Boot] [PATCH v2 2/4] regmap: use fdt address translation

[Simon Glass]

On 14 February 2017 at 03:20, Jean-Jacques Hiblot  wrote:
>
>
> On 14/02/2017 06:23, Simon Glass wrote:
>>
>> Hi,
>>
>> On 13 February 2017 at 08:17, Jean-Jacques Hiblot  wrote:
>>>
>>> In the DTS, the addresses are defined relative to the parent bus. We need
>>> to translate them to get the address as seen by the CPU core.
>>>
>>> Signed-off-by: Jean-Jacques Hiblot 
>>> ---
>>>
>>> to: s...@chromium.org
>>>
>>>   drivers/core/regmap.c | 14 --
>>>   1 file changed, 8 insertions(+), 6 deletions(-)
>>
>> This says v2 but I don't see a change log. Can you please resend this?
>
> Hi Simon,
>
> Sorry, I didn't think about sending the whole series to you. The series is
> marked v2 but this particular patch that you and stephen warren have already
> reviewed hasn't changed a bit.
>
> Jean-Jacques

OK thanks. It's good to have 'v2: no changes' in the patch for this
sort of situation. E.g. patman will do this for you.

Regards,
Simon
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Re: [U-Boot] [PATCH v2 1/9] arm64: rk3399: add ddr controller driver

[Simon Glass]

Hi Kever,

On 13 February 2017 at 02:38, Kever Yang  wrote:
> RK3399 support DDR3, LPDDR3, DDR4 sdram, this patch is porting from
> coreboot, support 4GB lpddr3 in this version.
>
> Signed-off-by: Kever Yang 
> ---
>
> Changes in v2:
> - use lower-case hex for input dts data
> - using rk3288 like style to encode/decode sys_reg
> - gather some parameters as base params in rk3399_sdram_params
> - add some missing comment
>
> Changes in v1:
> - use dts for parameter
> - get all controller base address from dts instead of hard code
> - gather all controller into dram_info instead of separate global
>   variables.
> - add return value for error case
>
>  arch/arm/dts/rk3399-sdram-lpddr3-4GB-1600.dtsi| 1536 
> +
>  arch/arm/include/asm/arch-rockchip/sdram_rk3399.h |  124 ++
>  arch/arm/mach-rockchip/rk3399/Makefile|1 +
>  arch/arm/mach-rockchip/rk3399/sdram_rk3399.c  | 1259 +
>  4 files changed, 2920 insertions(+)
>  create mode 100644 arch/arm/dts/rk3399-sdram-lpddr3-4GB-1600.dtsi
>  create mode 100644 arch/arm/include/asm/arch-rockchip/sdram_rk3399.h
>  create mode 100644 arch/arm/mach-rockchip/rk3399/sdram_rk3399.c

Looks good, one more thing to do, plus some nits below.

>
> diff --git a/arch/arm/dts/rk3399-sdram-lpddr3-4GB-1600.dtsi 
> b/arch/arm/dts/rk3399-sdram-lpddr3-4GB-1600.dtsi
> new file mode 100644
> index 000..65dfc38
> --- /dev/null
> +++ b/arch/arm/dts/rk3399-sdram-lpddr3-4GB-1600.dtsi
> @@ -0,0 +1,1536 @@
> +/*
> + * (C) Copyright 2016 Rockchip Electronics Co., Ltd
> + *
> + * SPDX-License-Identifier: GPL-2.0+
> + */
> +
> + {
> +   rockchip,sdram-params = <
> +   0x2
> +   0xa
> +   0x3

[...]

> +   >;
> +}

Please can you add a binding file with the meaning of this, like
doc/device-tree-bindings/clock/rockchip,rk3288-dmc.txt:.

;
> diff --git a/arch/arm/include/asm/arch-rockchip/sdram_rk3399.h 
> b/arch/arm/include/asm/arch-rockchip/sdram_rk3399.h
> new file mode 100644
> index 000..0b7cb1f
> --- /dev/null
> +++ b/arch/arm/include/asm/arch-rockchip/sdram_rk3399.h
> @@ -0,0 +1,124 @@
> +/*
> + * Copyright (C) 2015 Rockchip Electronics Co., Ltd

Is 2015 correct?

> + *
> + * SPDX-License-Identifier: GPL-2.0+
> + */
> +
> +#ifndef _ASM_ARCH_SDRAM_RK3399_H
> +#define _ASM_ARCH_SDRAM_RK3399_H
> +
> +enum {
> +   DDR3 = 0x3,
> +   LPDDR2 = 0x5,
> +   LPDDR3 = 0x6,
> +   LPDDR4 = 0x7,
> +   UNUSED = 0xFF
> +};
> +
> +struct rk3399_ddr_pctl_regs {
> +   u32 denali_ctl[332];
> +};
> +
> +struct rk3399_ddr_publ_regs {
> +   u32 denali_phy[959];
> +};
> +
> +struct rk3399_ddr_pi_regs {
> +   u32 denali_pi[200];
> +};
> +
> +struct rk3399_msch_regs {
> +   u32 coreid;
> +   u32 revisionid;
> +   u32 ddrconf;
> +   u32 ddrsize;
> +   u32 ddrtiminga0;
> +   u32 ddrtimingb0;
> +   u32 ddrtimingc0;
> +   u32 devtodev0;
> +   u32 reserved0[(0x110 - 0x20) / 4];
> +   u32 ddrmode;
> +   u32 reserved1[(0x1000 - 0x114) / 4];
> +   u32 agingx0;
> +};
> +
> +struct rk3399_msch_timings {
> +   u32 ddrtiminga0;
> +   u32 ddrtimingb0;
> +   u32 ddrtimingc0;
> +   u32 devtodev0;
> +   u32 ddrmode;
> +   u32 agingx0;
> +};
> +
> +struct rk3399_ddr_cic_regs {
> +   u32 cic_ctrl0;
> +   u32 cic_ctrl1;
> +   u32 cic_idle_th;
> +   u32 cic_cg_wait_th;
> +   u32 cic_status0;
> +   u32 cic_status1;
> +   u32 cic_ctrl2;
> +   u32 cic_ctrl3;
> +   u32 cic_ctrl4;
> +};
> +
> +/* DENALI_CTL_00 */
> +#define START  1
> +
> +/* DENALI_CTL_68 */
> +#define PWRUP_SREFRESH_EXIT(1 << 16)
> +
> +/* DENALI_CTL_274 */
> +#define MEM_RST_VALID  1
> +
> +struct rk3399_sdram_channel {
> +   unsigned int rank;
> +   /* dram column number, 0 means this channel is invalid */
> +   unsigned int col;
> +   /* dram bank number, 3:8bank, 2:4bank */
> +   unsigned int bk;
> +   /* channel buswidth, 2:32bit, 1:16bit, 0:8bit */
> +   unsigned int bw;
> +   /* die buswidth, 2:32bit, 1:16bit, 0:8bit */
> +   unsigned int dbw;
> +   /*
> +* row_3_4 = 1: 6Gb or 12Gb die
> +* row_3_4 = 0: normal die, power of 2
> +*/
> +   unsigned int row_3_4;
> +   unsigned int cs0_row;
> +   unsigned int cs1_row;
> +   unsigned int ddrconfig;
> +   struct rk3399_msch_timings noc_timings;
> +};
> +
> +struct rk3399_base_params {
> +   unsigned int ddr_freq;
> +   unsigned int dramtype;
> +   unsigned int num_channels;
> +   unsigned int stride;
> +   unsigned int odt;
> +};
> +
> +struct rk3399_sdram_params {
> +   struct rk3399_sdram_channel ch[2];
> +   struct rk3399_base_params base;
> +   /* align 8 byte */
> +   struct rk3399_ddr_pctl_regs pctl_regs;
> +   /* align 8 byte */
> +   struct rk3399_ddr_pi_regs pi_regs;
> +  

Re: [U-Boot] [PATCH v2 0/9] rk3399: enable SPL driver

[Simon Glass]

Hi Kever,

On 13 February 2017 at 02:38, Kever Yang  wrote:
>
> This series patch enable basic driver for rk3399 SPL, the ATF support
> has been split as a separate patch.
>
> SPL_OF_PLATDATA is consider to be must because the dram driver has much
> configuration parameter from dts, but we don't want to do the copy.

I still don't think we should be using it on devices which don't need it.

For the copy I think you are referring to fdtdec_get_int_array(). I
showed you some code that avoids copying and I suspect is just as fast
as what you have.

Anyway let's compare the two options when you have them.

>
> Other driver like clock, pinctrl, sdhci has update to support
> OF-PLATDATA.
>
>
> Changes in v2:
> - use lower-case hex for input dts data
> - using rk3288 like style to encode/decode sys_reg
> - gather some parameters as base params in rk3399_sdram_params
> - add some missing comment
> - split SPL patch into 4 patches
>
> Changes in v1:
> - use dts for parameter
> - get all controller base address from dts instead of hard code
> - gather all controller into dram_info instead of separate global
>   variables.
> - add return value for error case
>
> Kever Yang (9):
>   arm64: rk3399: add ddr controller driver
>   arm64: rk3399: move grf register definitions to grf_rk3399.h
>   clk: rk3399: update driver for spl
>   sdhci: rk3399: update driver to support of-platdata
>   pinctrl: rk3399: add the of-platdata support
>   arm64: rk3399: syscon addition for rk3399
>   dts: rk3399: update for spl require driver
>   arm64: rk3399: add SPL support
>   config: rk3399: enable SPL config for evb-rk3399
>
>  arch/arm/Kconfig  |1 +
>  arch/arm/dts/rk3399-evb.dts   |2 +
>  arch/arm/dts/rk3399-sdram-lpddr3-4GB-1600.dtsi| 1536 
> +
>  arch/arm/dts/rk3399.dtsi  |   44 +
>  arch/arm/include/asm/arch-rockchip/clock.h|9 +
>  arch/arm/include/asm/arch-rockchip/cru_rk3399.h   |5 +
>  arch/arm/include/asm/arch-rockchip/grf_rk3399.h   |  118 ++
>  arch/arm/include/asm/arch-rockchip/sdram_rk3399.h |  124 ++
>  arch/arm/mach-rockchip/Kconfig|2 +
>  arch/arm/mach-rockchip/Makefile   |1 +
>  arch/arm/mach-rockchip/rk3399-board-spl.c |  158 +++
>  arch/arm/mach-rockchip/rk3399/Makefile|1 +
>  arch/arm/mach-rockchip/rk3399/clk_rk3399.c|   21 +
>  arch/arm/mach-rockchip/rk3399/sdram_rk3399.c  | 1259 +
>  arch/arm/mach-rockchip/rk3399/syscon_rk3399.c |   40 +
>  configs/evb-rk3399_defconfig  |   18 +
>  drivers/clk/rockchip/clk_rk3399.c |   89 +-
>  drivers/mmc/rockchip_sdhci.c  |   17 +-
>  drivers/pinctrl/rockchip/pinctrl_rk3399.c |  111 +-
>  include/configs/rk3399_common.h   |   11 +
>  include/dt-bindings/clock/rk3399-cru.h|   16 +-
>  21 files changed, 3460 insertions(+), 123 deletions(-)
>  create mode 100644 arch/arm/dts/rk3399-sdram-lpddr3-4GB-1600.dtsi
>  create mode 100644 arch/arm/include/asm/arch-rockchip/sdram_rk3399.h
>  create mode 100644 arch/arm/mach-rockchip/rk3399-board-spl.c
>  create mode 100644 arch/arm/mach-rockchip/rk3399/sdram_rk3399.c
>
> --
> 1.9.1
>

Regards,
Simon
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Re: [U-Boot] [PATCH v2 8/9] arm64: rk3399: add SPL support

[Simon Glass]

On 13 February 2017 at 02:39, Kever Yang  wrote:
> Add SPL support for rk3399, default with of-platdata enabled.
>
> Signed-off-by: Kever Yang 
> ---
>
> Changes in v2:
> - split SPL patch into 4 patches
>
> Changes in v1: None
>
>  arch/arm/Kconfig  |   1 +
>  arch/arm/mach-rockchip/Kconfig|   2 +
>  arch/arm/mach-rockchip/Makefile   |   1 +
>  arch/arm/mach-rockchip/rk3399-board-spl.c | 158 
> ++
>  include/configs/rk3399_common.h   |   6 ++
>  5 files changed, 168 insertions(+)
>  create mode 100644 arch/arm/mach-rockchip/rk3399-board-spl.c

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH v2 7/9] dts: rk3399: update for spl require driver

[Simon Glass]

On 13 February 2017 at 02:39, Kever Yang  wrote:
> Add syscon and dmc node, and 'u-boot,dm-pre-reloc' option for
> required driver.
>
> Signed-off-by: Kever Yang 
> ---
>
> Changes in v2: None
> Changes in v1: None
>
>  arch/arm/dts/rk3399-evb.dts |  2 ++
>  arch/arm/dts/rk3399.dtsi| 44 
>  2 files changed, 46 insertions(+)

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Re: [U-Boot] [PATCH v2 9/9] config: rk3399: enable SPL config for evb-rk3399

[Simon Glass]

On 13 February 2017 at 02:39, Kever Yang  wrote:
> Enable all the CONFIGs which need by SPL.
>
> Signed-off-by: Kever Yang 
> ---
>
> Changes in v2: None
> Changes in v1: None
>
>  configs/evb-rk3399_defconfig| 18 ++
>  include/configs/rk3399_common.h |  5 +
>  2 files changed, 23 insertions(+)

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Re: [U-Boot] U-Boot of-platdata issue

[Simon Glass]

Hi Kever,

On 13 February 2017 at 18:09, Kever Yang  wrote:
> Hi Simon, Jaehoon,
>
>
> On 02/13/2017 05:51 PM, Jaehoon Chung wrote:
>>
>> On 02/13/2017 06:23 PM, Kever Yang wrote:
>>>
>>> Hi Simon,
>>>
>>> On 01/16/2017 12:15 PM, Simon Glass wrote:

 Hi Kever,

 On 15 January 2017 at 18:28, Kever Yang 
 wrote:
>
> Hi Simon,
>
>   I met two issue when using of-platdata
>
> 1. compitable name with '.'
> I get compile error as below:
> In file included from include/dt-structs.h:16:0,
>from spl/dts/dt-platdata.c:3:
> include/generated/dt-structs.h:26:35: error: expected identifier or ‘(’
> before numeric constant
>struct dtd_rockchip_rk3399_sdhci_5.1 {
>  ^
> spl/dts/dt-platdata.c:41:42: error: expected identifier or ‘(’ before
> numeric constant
>static struct dtd_rockchip_rk3399_sdhci_5.1 dtv_sdhci_at_fe33 =
> {
> ^
> spl/dts/dt-platdata.c:55:15: error: ‘dtv_sdhci_at_fe33’ undeclared
> here
> (not in a function)
> .platdata = _sdhci_at_fe33,
>  ^
> make[2]: *** [spl/dts/dt-platdata.o] Error 1
> make[1]: *** [spl/u-boot-spl] Error 2
> make: *** [__build_one_by_one] Error 2
>
> The dts node starts like this:
>   sdhci: sdhci@fe33 {
>   u-boot,dm-pre-reloc;
>   compatible = "rockchip,rk3399-sdhci-5.1",
> "arasan,sdhci-5.1";
> ...

 That just involves replacing '.' with '_'. I sent a patch.

> 2. multi compatible name
> When a dts node have more than one compatible name, which is prefer to
> use?
> for example, we have two dwmmc compatible name in rk3399, the tool is
> using
> the first one,
> while the source code using the last one.
>
> "drivers/mmc/rockchip_dw_mmc.c"
>23 struct rockchip_mmc_plat {
>24 #if CONFIG_IS_ENABLED(OF_PLATDATA)
>25 struct dtd_rockchip_rk3288_dw_mshc dtplat;
>26 #endif
>27 struct mmc_config cfg;
>28 struct mmc mmc;
>29 };
> ...
> dts node
>   sdmmc: dwmmc@fe32 {
>  compatible = "rockchip,rk3399-dw-mshc",
>"rockchip,rk3288-dw-mshc";

 I'm not sure of the best solution here (other than putting more
 on-chip SRAM in your devices hint hint :-)

 One option is something like:

 struct rockchip_mmc_plat {
 #if CONFIG_IS_ENABLED(OF_PLATDATA)
 #ifdef CONFIG_ROCKCHIP_RK3288
   struct dtd_rockchip_rk3288_dw_mshc dtplat;
 #elif defined(CONFIG_ROCKCHIP_RK399)
   struct dtd_rockchip_rk399_dw_mshc dtplat;
 #endif
 #endif

 Obviously we don't want that as it is putting SoC-specific stuff in the
 driver.

 IMO the compatible strings are being misused a bit. Can there not be a
 compatible string which is common to all rockchip devices which use
 this IP? Something like "rockchip,dw-mshc-v1"? Then you can avoid
 adding a new compatible string every time you use the same IP in a
 device.
>>>
>>> Agree, but... this is from kernel, we can't control it unless all kernel
>>> maintainers
>>> have the same idea.
>>
>> does it use just "rockchip,dw-mshc"? Maybe this can be common compatible
>> for rockchip.
>> If it needs add the other compatible in future, it should be added the
>> specific compatible at that time.
>>
>
> I don't think we will have a change in dts compatible for U-Boot dts,
> because we will always using dts
> file from kernel, so we will use it as is.
>
> We can use "rockchip,rk3288-dw-mshc" for rk3288 and rk3399, here is the
> document.
> and for dw-mshc:
> Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.txt
> * compatible: should be
> - "rockchip,rk2928-dw-mshc": for Rockchip RK2928 and following,
> before RK3288
> - "rockchip,rk3288-dw-mshc": for Rockchip RK3288
> - "rockchip,rk3399-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip
> RK3399
>
> For the compatible name, there had some discuss before, like this patch:
> https://lists.gt.net/linux/kernel/2372182
>
> So for the of-platdata, we can use "rockchip,rk3288-dw-mshc" to generate the
> structure.

So in this case, as you saying that you need dtoc to #define the
structs to be the same? Or can you do this yourself in a header file?

 [..]

Regards,
Simon
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Re: [U-Boot] [PATCH v2 6/9] arm64: rk3399: syscon addition for rk3399

[Simon Glass]

On 13 February 2017 at 02:38, Kever Yang  wrote:
> rk3399 has different syscon registers which may used in spl,
> add to support rk3399 spl.
>
> Signed-off-by: Kever Yang 
> ---
>
> Changes in v2: None
> Changes in v1: None
>
>  arch/arm/include/asm/arch-rockchip/clock.h|  2 ++
>  arch/arm/mach-rockchip/rk3399/syscon_rk3399.c | 40 
> +++
>  2 files changed, 42 insertions(+)

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Re: [U-Boot] [PATCH] regmap: add support for address cell 2

[Simon Glass]

Hi Kever,

On 13 February 2017 at 01:28, Kever Yang  wrote:
> ARM64 is using 64bit address which address cell is 2 instead of 1,
> update to support it when of-platdata enabled.
>
> Signed-off-by: Kever Yang 
> ---
>
>  drivers/core/regmap.c | 20 ++--
>  1 file changed, 18 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/core/regmap.c b/drivers/core/regmap.c
> index c68bcba..a1c0983 100644
> --- a/drivers/core/regmap.c
> +++ b/drivers/core/regmap.c
> @@ -39,6 +39,16 @@ static struct regmap *regmap_alloc_count(int count)
>  }
>
>  #if CONFIG_IS_ENABLED(OF_PLATDATA)
> +u64 fdtdec_get_number(const u32 *ptr, unsigned int cells)

This name is already used and seems misleading. How about of_plat_get_number()?

> +{
> +   u64 number = 0;
> +
> +   while (cells--)
> +   number = (number << 32) | (*ptr++);
> +
> +   return number;
> +}
> +
>  int regmap_init_mem_platdata(struct udevice *dev, u32 *reg, int count,
>  struct regmap **mapp)
>  {
> @@ -48,13 +58,19 @@ int regmap_init_mem_platdata(struct udevice *dev, u32 
> *reg, int count,
> map = regmap_alloc_count(count);
> if (!map)
> return -ENOMEM;
> -
> +#ifdef CONFIG_ARM64

Can you use #ifdef CONFIG_PHYS_64BIT?

> +   map->base = fdtdec_get_number(reg, 2);
> +   for (range = map->range; count > 0; reg += 4, range++, count--) {
> +   range->start = fdtdec_get_number(reg, 2);
> +   range->size = fdtdec_get_number(reg + 2, 2);
> +   }
> +#else
> map->base = *reg;
> for (range = map->range; count > 0; reg += 2, range++, count--) {
> range->start = *reg;
> range->size = reg[1];
> }
> -
> +#endif
> *mapp = map;
>
> return 0;
> --
> 1.9.1
>

Regards,
Simon
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Re: [U-Boot] [PATCH] wandboard: Enable SATA for quad

[Peter Robinson]

On Thu, Feb 16, 2017 at 6:20 PM, Nicolas Chauvet  wrote:
> Having sata first will makes preference to sata boot if
> both sata0 and mmc0 have a boot partition
>
> This change was not tested against wanboard solo/dual,
> but it does operate correctly when there is no sata disk
> connected on quad.
> (it falls back to mmc0 boot)
>
> Tested with current u-boot 2017.03-rc2
> with Fedora 25 workstation armhfp

Have you tested with a non quad device that doesn't have sata? It
doesn't appear to be special cased, just blanket added.

> Signed-off-by: Nicolas Chauvet 
> ---
>  include/configs/wandboard.h | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/include/configs/wandboard.h b/include/configs/wandboard.h
> index 7e9757a..3101d1b 100644
> --- a/include/configs/wandboard.h
> +++ b/include/configs/wandboard.h
> @@ -128,6 +128,7 @@
> BOOTENV
>
>  #define BOOT_TARGET_DEVICES(func) \
> +   func(SATA, sata, 0) \
> func(MMC, mmc, 0) \
> func(MMC, mmc, 1) \
> func(USB, usb, 0) \
> --
> 2.7.4
>
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[U-Boot] [PATCH] wandboard: Enable SATA for quad

[Nicolas Chauvet]

Having sata first will makes preference to sata boot if
both sata0 and mmc0 have a boot partition

This change was not tested against wanboard solo/dual,
but it does operate correctly when there is no sata disk
connected on quad.
(it falls back to mmc0 boot)

Tested with current u-boot 2017.03-rc2
with Fedora 25 workstation armhfp

Signed-off-by: Nicolas Chauvet 
---
 include/configs/wandboard.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/configs/wandboard.h b/include/configs/wandboard.h
index 7e9757a..3101d1b 100644
--- a/include/configs/wandboard.h
+++ b/include/configs/wandboard.h
@@ -128,6 +128,7 @@
BOOTENV
 
 #define BOOT_TARGET_DEVICES(func) \
+   func(SATA, sata, 0) \
func(MMC, mmc, 0) \
func(MMC, mmc, 1) \
func(USB, usb, 0) \
-- 
2.7.4

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Re: [U-Boot] [RFC PATCH] armv8: Extend modification of MMU tables

[york sun]

On 02/03/2017 02:24 PM, York Sun wrote:
> Device memory needs to be set along with PXN and UNX bits. Normal memory
> must clear these bits. To support modification of PXN, UXN bits, extend
> existing function mmu_set_region_dcache_behaviour() to accept attributes
> directly. Also fix parsing d-cache option by removing extra shifting.
>
> Signed-off-by: York Sun 
> CC: Alexander Graf 
> ---
> Looks like original function mmu_set_region_dcache_behaviour() was written
> to support changing d-cache option. However the PMD_ATTRINDX(option) shifts
> it further higher. Maybe this function wasn't really used for ARMv8.
> I have a need to update existing MMU table with a little bit more than
> d-cache options. With a recent debug on memory barrier, it came to my
> attention that code should run on "normal" memory, while "device" memory
> should have PXN and UXN bits set. A new function mmu_set_region_attr() is
> hence introduced and mmu_set_region_dcache_behaviour() becomes a wrapper.
>
> BTW, if we don't plan to use "read_start" and "real_size" variables, they
> should be removed.
>


Let's skip this patch for now. I have sent another set to address my 
issue with MMU update. We will need another patch to address the 
mistaken index.

York

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[U-Boot] [PATCH v6 3/3] Kconfig: Disable non-FIT SPL loading for TI secure devices

[Andrew F. Davis]

Non-FIT SPL image loading support should be disabled for TI secure
devices as the image handlers for those image types do not follow
our secure boot flow.

Signed-off-by: Andrew F. Davis 
---
 Kconfig | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Kconfig b/Kconfig
index 8504199493..e238b8076b 100644
--- a/Kconfig
+++ b/Kconfig
@@ -293,7 +293,7 @@ config SYS_TEXT_BASE
 
 config SPL_RAW_IMAGE_SUPPORT
bool "Support SPL loading and booting of RAW images"
-   default y
+   default y if !TI_SECURE_DEVICE
help
  SPL will support loading and booting a RAW image when this option
  is y. If this is not set, SPL will move on to other available
@@ -301,7 +301,7 @@ config SPL_RAW_IMAGE_SUPPORT
 
 config SPL_LEGACY_IMAGE_SUPPORT
bool "Support SPL loading and booting of Legacy images"
-   default y
+   default y if !TI_SECURE_DEVICE
help
  SPL will support loading and booting Legacy images when this option
  is y. If this is not set, SPL will move on to other available
-- 
2.11.0

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[U-Boot] [PATCH v6 1/3] spl: Convert CONFIG_SPL_ABORT_ON_RAW_IMAGE into a positive option

[Andrew F. Davis]

CONFIG_SPL_ABORT_ON_RAW_IMAGE causes SPL to abort and move on when it
encounters RAW images, express this same functionality as a positive
option enabling support for RAW images: CONFIG_SPL_RAW_IMAGE_SUPPORT

Also move uses of this to defconfigs.

Signed-off-by: Andrew F. Davis 
---
 Kconfig|  7 +++
 README |  4 
 common/spl/spl.c   | 10 ++
 configs/apalis_imx6_defconfig  |  1 +
 configs/cgtqmx6eval_defconfig  |  1 +
 configs/cm_fx6_defconfig   |  1 +
 configs/colibri_imx6_defconfig |  1 +
 configs/gwventana_defconfig|  1 +
 configs/imx6dl_icore_mmc_defconfig |  1 +
 configs/imx6dl_icore_rqs_mmc_defconfig |  1 +
 configs/imx6q_icore_mmc_defconfig  |  1 +
 configs/imx6q_icore_rqs_mmc_defconfig  |  1 +
 configs/imx6ul_geam_mmc_defconfig  |  1 +
 configs/liteboard_defconfig|  1 +
 configs/mccmon6_sd_defconfig   |  1 +
 configs/mx6cuboxi_defconfig|  1 +
 configs/mx6sabresd_spl_defconfig   |  1 +
 configs/mx6slevk_spl_defconfig |  1 +
 configs/mx6sxsabresd_spl_defconfig |  1 +
 configs/mx6ul_14x14_evk_defconfig  |  1 +
 configs/mx6ul_9x9_evk_defconfig|  1 +
 configs/novena_defconfig   |  1 +
 configs/pcm058_defconfig   |  1 +
 configs/platinum_picon_defconfig   |  1 +
 configs/platinum_titanium_defconfig|  1 +
 configs/socfpga_de1_soc_defconfig  |  1 +
 configs/udoo_defconfig |  1 +
 configs/udoo_neo_defconfig |  1 +
 configs/wandboard_defconfig|  1 +
 configs/xpress_spl_defconfig   |  1 +
 configs/zc5202_defconfig   |  1 +
 configs/zc5601_defconfig   |  1 +
 include/configs/imx6_spl.h |  2 --
 include/configs/socfpga_de1_soc.h  |  2 --
 include/spl.h  |  2 +-
 35 files changed, 43 insertions(+), 13 deletions(-)

diff --git a/Kconfig b/Kconfig
index 81b4226463..cfc8f929ee 100644
--- a/Kconfig
+++ b/Kconfig
@@ -291,6 +291,13 @@ config SYS_TEXT_BASE
help
  TODO: Move CONFIG_SYS_TEXT_BASE for all the architecture
 
+config SPL_RAW_IMAGE_SUPPORT
+   bool "Support SPL loading and booting of RAW images"
+   default y
+   help
+ SPL will support loading and booting a RAW image when this option
+ is y. If this is not set, SPL will move on to other available
+ boot media to find a suitable image.
 
 config SYS_CLK_FREQ
depends on ARC || ARCH_SUNXI
diff --git a/README b/README
index 4f0dbd4fca..a45c6b88bf 100644
--- a/README
+++ b/README
@@ -3279,10 +3279,6 @@ FIT uImage format:
consider that a completely unreadable NAND block is bad,
and thus should be skipped silently.
 
-   CONFIG_SPL_ABORT_ON_RAW_IMAGE
-   When defined, SPL will proceed to another boot method
-   if the image it has loaded does not have a signature.
-
CONFIG_SPL_RELOC_STACK
Adress of the start of the stack SPL will use after
relocation.  If unspecified, this is equal to
diff --git a/common/spl/spl.c b/common/spl/spl.c
index 766fb3d6f4..da8f55eef6 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -146,16 +146,18 @@ int spl_parse_image_header(struct spl_image_info 
*spl_image,
}
 #endif
 
-#ifdef CONFIG_SPL_ABORT_ON_RAW_IMAGE
-   /* Signature not found, proceed to other boot methods. */
-   return -EINVAL;
-#else
+#ifdef CONFIG_SPL_RAW_IMAGE_SUPPORT
/* Signature not found - assume u-boot.bin */
debug("mkimage signature not found - ih_magic = %x\n",
header->ih_magic);
spl_set_header_raw_uboot(spl_image);
+#else
+   /* RAW image not supported, proceed to other boot methods. */
+   debug("Raw boot image support not enabled, proceeding to other 
boot methods");
+   return -EINVAL;
 #endif
}
+
return 0;
 }
 
diff --git a/configs/apalis_imx6_defconfig b/configs/apalis_imx6_defconfig
index 6b2daa9b47..d76b828c7d 100644
--- a/configs/apalis_imx6_defconfig
+++ b/configs/apalis_imx6_defconfig
@@ -9,6 +9,7 @@ CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_VIDEO=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6Q"
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
 CONFIG_BOOTDELAY=1
 # CONFIG_CONSOLE_MUX is not set
 # CONFIG_DISPLAY_BOARDINFO is not set
diff --git a/configs/cgtqmx6eval_defconfig b/configs/cgtqmx6eval_defconfig
index 2e4ed36cc1..7c73ac185a 100644
--- a/configs/cgtqmx6eval_defconfig
+++ b/configs/cgtqmx6eval_defconfig
@@ -14,6 +14,7 @@ CONFIG_SPL_SPI_SUPPORT=y
 CONFIG_SPL_WATCHDOG_SUPPORT=y
 CONFIG_VIDEO=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,SPL,MX6QDL"
+# 

[U-Boot] [PATCH v6 2/3] spl: Add option to enable SPL Legacy image support

[Andrew F. Davis]

Add a Kconfig option that enables Legacy image support, this allows
boards to explicitly disable this, for instance when needed for
security reasons.

Signed-off-by: Andrew F. Davis 
Reviewed-by: Simon Glass 
---
 Kconfig  |  8 
 common/spl/spl.c | 10 --
 2 files changed, 16 insertions(+), 2 deletions(-)

diff --git a/Kconfig b/Kconfig
index cfc8f929ee..8504199493 100644
--- a/Kconfig
+++ b/Kconfig
@@ -299,6 +299,14 @@ config SPL_RAW_IMAGE_SUPPORT
  is y. If this is not set, SPL will move on to other available
  boot media to find a suitable image.
 
+config SPL_LEGACY_IMAGE_SUPPORT
+   bool "Support SPL loading and booting of Legacy images"
+   default y
+   help
+ SPL will support loading and booting Legacy images when this option
+ is y. If this is not set, SPL will move on to other available
+ boot media to find a suitable image.
+
 config SYS_CLK_FREQ
depends on ARC || ARCH_SUNXI
int "CPU clock frequency"
diff --git a/common/spl/spl.c b/common/spl/spl.c
index da8f55eef6..3d6c0ecba1 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -93,9 +93,10 @@ void spl_set_header_raw_uboot(struct spl_image_info 
*spl_image)
 int spl_parse_image_header(struct spl_image_info *spl_image,
   const struct image_header *header)
 {
-   u32 header_size = sizeof(struct image_header);
-
if (image_get_magic(header) == IH_MAGIC) {
+#ifdef CONFIG_SPL_LEGACY_IMAGE_SUPPORT
+   u32 header_size = sizeof(struct image_header);
+
if (spl_image->flags & SPL_COPY_PAYLOAD_ONLY) {
/*
 * On some system (e.g. powerpc), the load-address and
@@ -118,6 +119,11 @@ int spl_parse_image_header(struct spl_image_info 
*spl_image,
debug("spl: payload image: %.*s load addr: 0x%lx size: %d\n",
(int)sizeof(spl_image->name), spl_image->name,
spl_image->load_addr, spl_image->size);
+#else
+   /* LEGACY image not supported */
+   debug("Legacy boot image support not enabled, proceeding to 
other boot methods");
+   return -EINVAL;
+#endif
} else {
 #ifdef CONFIG_SPL_PANIC_ON_RAW_IMAGE
/*
-- 
2.11.0

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[U-Boot] [PATCH v6 0/3] Allow disabling non-FIT image loading from SPL

[Andrew F. Davis]

Hello all,

To address a needed feature brought up by Andreas[0], we need a way to
disable SPL from loading non-FIT images.

The function spl_parse_image_header is common to all SPL loading paths
(common/spl/spl_(nand|net|nor|etc..)) so we add the check here.

This version of the series is a bit different than the first few due
to suggestions by Simon, instead of a negative option disabling
non-FIT images, we allow the other image format's support to be
toggled off, and do that on HS boards.

Thanks,
Andrew

[0] https://www.mail-archive.com/u-boot@lists.denx.de/msg219253.html

Changes from v5:
 - Set the default to y only on non-HS boards

Changes from v4:
 - Finish conversion of SPL_RAW_IMAGE_SUPPORT

Changes from v3:
 - Add debug print as suggested by Simon

Andrew F. Davis (3):
  spl: Convert CONFIG_SPL_ABORT_ON_RAW_IMAGE into a positive option
  spl: Add option to enable SPL Legacy image support
  Kconfig: Disable non-FIT SPL loading for TI secure devices

 Kconfig| 15 +++
 README |  4 
 common/spl/spl.c   | 20 ++--
 configs/apalis_imx6_defconfig  |  1 +
 configs/cgtqmx6eval_defconfig  |  1 +
 configs/cm_fx6_defconfig   |  1 +
 configs/colibri_imx6_defconfig |  1 +
 configs/gwventana_defconfig|  1 +
 configs/imx6dl_icore_mmc_defconfig |  1 +
 configs/imx6dl_icore_rqs_mmc_defconfig |  1 +
 configs/imx6q_icore_mmc_defconfig  |  1 +
 configs/imx6q_icore_rqs_mmc_defconfig  |  1 +
 configs/imx6ul_geam_mmc_defconfig  |  1 +
 configs/liteboard_defconfig|  1 +
 configs/mccmon6_sd_defconfig   |  1 +
 configs/mx6cuboxi_defconfig|  1 +
 configs/mx6sabresd_spl_defconfig   |  1 +
 configs/mx6slevk_spl_defconfig |  1 +
 configs/mx6sxsabresd_spl_defconfig |  1 +
 configs/mx6ul_14x14_evk_defconfig  |  1 +
 configs/mx6ul_9x9_evk_defconfig|  1 +
 configs/novena_defconfig   |  1 +
 configs/pcm058_defconfig   |  1 +
 configs/platinum_picon_defconfig   |  1 +
 configs/platinum_titanium_defconfig|  1 +
 configs/socfpga_de1_soc_defconfig  |  1 +
 configs/udoo_defconfig |  1 +
 configs/udoo_neo_defconfig |  1 +
 configs/wandboard_defconfig|  1 +
 configs/xpress_spl_defconfig   |  1 +
 configs/zc5202_defconfig   |  1 +
 configs/zc5601_defconfig   |  1 +
 include/configs/imx6_spl.h |  2 --
 include/configs/socfpga_de1_soc.h  |  2 --
 include/spl.h  |  2 +-
 35 files changed, 59 insertions(+), 15 deletions(-)

-- 
2.11.0

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Re: [U-Boot] [PATCH v5 0/6] Allow disabling non-FIT image loading from SPL

[Andrew F. Davis]

On 02/16/2017 08:51 AM, Tom Rini wrote:
> On Thu, Feb 16, 2017 at 08:40:37AM -0600, Andrew F. Davis wrote:
>> On 02/15/2017 05:59 PM, Tom Rini wrote:
>>> On Wed, Feb 15, 2017 at 01:45:45PM -0600, Andrew F. Davis wrote:
>>>
 Hello all,

 To address a needed feature brought up by Andreas[0], we need a way to
 disable SPL from loading non-FIT images.

 The function spl_parse_image_header is common to all SPL loading paths
 (common/spl/spl_(nand|net|nor|etc..)) so we add the check here.

 This version of the series is a bit different than the last 2 due
 to suggestions by Simon, instead of a negative option disabling
 non-FIT images, we allow the other image format's support to be
 toggled off, and do that on HS boards.
>>>
>>> I think this would be cleaner if we introduce the symbols to be default
>>> n if TI_SECURE_DEVICE and then we don't have to modify the defconfig
>>> files.  That said, we should probably do that as a new patch #3 so it's
>>> clear in the commit history when we default it off.  Thanks!
>>
>> Hmmm, I'm really not a fan of this, disabling these options is only
>> needed on a couple boards and so should go in their defconfig, adding
>> the per-board exceptions to the symbol definition itself will start to
>> cause massive kconfig bloat.
>>
>> If you strongly disagree, below is a patch #3, if you take this you can
>> drop the defconfig patches from this series.
> 
> One thing that I feel is different in U-Boot from the Linux kernel is
> that I'm OK with putting more logic into the Kconfig files so that we
> get reasonable default output, even if it's only a "handful" of boards.
> I imagine that a follow up patch would change the logic to "default y if
> !TI_SECURE_DEVICES && !FSL_SIMILAR_SYMBOL"  Or perhaps even doing
> another line of "default n if TI_SECURE_DEVICES || FSL_... || ..."
> 

Okay, if that's your preference I'll post v6 with this change.

Thanks,
Andrew
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Re: [U-Boot] [PATCH v2] armv7m: Add SysTick timer driver

[Vikas MANOCHA]

Hi Phil,

> -Original Message-
> From: Phil Edworthy [mailto:phil.edwor...@renesas.com]
> Sent: Wednesday, February 15, 2017 11:22 PM
> To: Vikas MANOCHA ; Albert Aribaud 
> 
> Cc: Tom Rini ; Kamil Lulko ; 
> Michael Kurz ; u-
> b...@lists.denx.de
> Subject: RE: [PATCH v2] armv7m: Add SysTick timer driver
> 
> Hi Vikas,
> 
> On 15 February 2017 23:50, Vikas MANOCHA wrote:
> > Hi Phil,
> >
> > > -Original Message-
> > > From: Phil Edworthy [mailto:phil.edwor...@renesas.com]
> > > Sent: Monday, February 13, 2017 11:48 PM
> > > To: Albert Aribaud 
> > > Cc: Tom Rini ; Vikas MANOCHA
> > ; Kamil Lulko ; Michael
> > > Kurz ; u-boot@lists.denx.de; Phil Edworthy
> > 
> > > Subject: [PATCH v2] armv7m: Add SysTick timer driver
> > >
> > > The SysTick is a 24-bit down counter that is found on all ARM Cortex
> > > M3, M4,
> > M7 devices and is always located at a fixed address.
> > >
> > > Signed-off-by: Phil Edworthy 
> > > ---
> > > v2:
> > >  - Variables & constant renamed.
> > >  - Use the calibration reg to determine if we use the cpu or ref clk
> > >  - Use the calibration reg to get the clk rate, unless specified
> > > ---
> > >  arch/arm/cpu/armv7m/Makefile|   2 +
> > >  arch/arm/cpu/armv7m/systick-timer.c | 107
> > 
> > >  2 files changed, 109 insertions(+)
> > >  create mode 100644 arch/arm/cpu/armv7m/systick-timer.c
> > >
> > > diff --git a/arch/arm/cpu/armv7m/Makefile
> > > b/arch/arm/cpu/armv7m/Makefile
> > index aff60e8..e1a6c40 100644
> > > --- a/arch/arm/cpu/armv7m/Makefile
> > > +++ b/arch/arm/cpu/armv7m/Makefile
> > > @@ -7,3 +7,5 @@
> > >
> > >  extra-y := start.o
> > >  obj-y += cpu.o
> > > +
> > > +obj-$(CONFIG_SYS_ARCH_TIMER) += systick-timer.o
> > > diff --git a/arch/arm/cpu/armv7m/systick-timer.c
> > b/arch/arm/cpu/armv7m/systick-timer.c
> > > new file mode 100644
> > > index 000..62308f9
> > > --- /dev/null
> > > +++ b/arch/arm/cpu/armv7m/systick-timer.c
> > > @@ -0,0 +1,107 @@
> > > +/*
> > > + * ARM Cortex M3/M4/M7 SysTick timer driver
> > > + * (C) Copyright 2017 Renesas Electronics Europe Ltd
> > > + *
> > > + * Based on arch/arm/mach-stm32/stm32f1/timer.c
> > > + * (C) Copyright 2015
> > > + * Kamil Lulko, 
> > > + *
> > > + * Copyright 2015 ATS Advanced Telematics Systems GmbH
> > > + * Copyright 2015 Konsulko Group, Matt Porter
> > > +
> > > + *
> > > + * SPDX-License-Identifier: GPL-2.0+
> > > + *
> > > + * The SysTick timer is a 24-bit count down timer. The clock can be
> > > +either the
> > > + * CPU clock or a reference clock. Since the timer will wrap around
> > > +very quickly
> > > + * when using the CPU clock, and we do not handle the timer
> > > +interrupts, it is
> > > + * expected that this driver is only ever used with a slow reference 
> > > clock.
> > > + */
> > > +
> > > +#include 
> > > +#include 
> > > +
> > > +DECLARE_GLOBAL_DATA_PTR;
> > > +
> > > +/* SysTick Base Address - fixed for all Cortex M3, M4 and M7 devices */
> > > +#define SYSTICK_BASE 0xE000E010
> > > +
> > > +struct cm3_systick {
> > > + uint32_t ctrl;
> > > + uint32_t reload_val;
> > > + uint32_t current_val;
> > > + uint32_t calibration;
> > > +};
> > > +
> > > +#define TIMER_MAX_VAL0x00FF
> > > +#define SYSTICK_CTRL_EN  BIT(0)
> > > +/* Clock source: 0 = Ref clock, 1 = CPU clock */
> > > +#define SYSTICK_CTRL_CPU_CLK BIT(2)
> > > +#define SYSTICK_CAL_NOREFBIT(31)
> > > +#define SYSTICK_CAL_SKEW BIT(30)
> > > +#define SYSTICK_CAL_TENMS_MASK   0x00FF
> > > +
> > > +/* read the 24-bit timer */
> > > +static ulong read_timer(void)
> > > +{
> > > + struct cm3_systick *systick = (struct cm3_systick *)SYSTICK_BASE;
> > > +
> > > + /* The timer counts down, therefore convert to an incrementing timer */
> > > + return TIMER_MAX_VAL - readl(>current_val); }
> > > +
> > > +int timer_init(void)
> > > +{
> > > + struct cm3_systick *systick = (struct cm3_systick *)SYSTICK_BASE;
> > > + u32 cal;
> > > +
> > > + writel(TIMER_MAX_VAL, >reload_val);
> > > + /* Any write to current_val reg clears it to 0 */
> > > + writel(0, >current_val);
> > > +
> > > + cal = readl(>calibration);
> > > + if (cal & SYSTICK_CAL_NOREF)
> >
> > Good.
> >
> > > + /* Use CPU clock, no interrupts */
> > > + writel(SYSTICK_CTRL_EN | SYSTICK_CTRL_CPU_CLK, 
> > >ctrl);
> > > + else
> > > + /* Use external clock, no interrupts */
> > > + writel(SYSTICK_CTRL_EN, >ctrl);
> > > +
> > > +#if defined(CONFIG_SYS_HZ_CLOCK)
> > > + gd->arch.timer_rate_hz = CONFIG_SYS_HZ_CLOCK; #else
> > > + gd->arch.timer_rate_hz = (cal & SYSTICK_CAL_TENMS_MASK) * 100;
> >
> > This value is 

Re: [U-Boot] [PATCH v5 0/6] Allow disabling non-FIT image loading from SPL

[Tom Rini]

On Thu, Feb 16, 2017 at 08:40:37AM -0600, Andrew F. Davis wrote:
> On 02/15/2017 05:59 PM, Tom Rini wrote:
> > On Wed, Feb 15, 2017 at 01:45:45PM -0600, Andrew F. Davis wrote:
> > 
> >> Hello all,
> >>
> >> To address a needed feature brought up by Andreas[0], we need a way to
> >> disable SPL from loading non-FIT images.
> >>
> >> The function spl_parse_image_header is common to all SPL loading paths
> >> (common/spl/spl_(nand|net|nor|etc..)) so we add the check here.
> >>
> >> This version of the series is a bit different than the last 2 due
> >> to suggestions by Simon, instead of a negative option disabling
> >> non-FIT images, we allow the other image format's support to be
> >> toggled off, and do that on HS boards.
> > 
> > I think this would be cleaner if we introduce the symbols to be default
> > n if TI_SECURE_DEVICE and then we don't have to modify the defconfig
> > files.  That said, we should probably do that as a new patch #3 so it's
> > clear in the commit history when we default it off.  Thanks!
> 
> Hmmm, I'm really not a fan of this, disabling these options is only
> needed on a couple boards and so should go in their defconfig, adding
> the per-board exceptions to the symbol definition itself will start to
> cause massive kconfig bloat.
> 
> If you strongly disagree, below is a patch #3, if you take this you can
> drop the defconfig patches from this series.

One thing that I feel is different in U-Boot from the Linux kernel is
that I'm OK with putting more logic into the Kconfig files so that we
get reasonable default output, even if it's only a "handful" of boards.
I imagine that a follow up patch would change the logic to "default y if
!TI_SECURE_DEVICES && !FSL_SIMILAR_SYMBOL"  Or perhaps even doing
another line of "default n if TI_SECURE_DEVICES || FSL_... || ..."

-- 
Tom


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Re: [U-Boot] [PATCH v5 0/6] Allow disabling non-FIT image loading from SPL

[Andrew F. Davis]

On 02/15/2017 05:59 PM, Tom Rini wrote:
> On Wed, Feb 15, 2017 at 01:45:45PM -0600, Andrew F. Davis wrote:
> 
>> Hello all,
>>
>> To address a needed feature brought up by Andreas[0], we need a way to
>> disable SPL from loading non-FIT images.
>>
>> The function spl_parse_image_header is common to all SPL loading paths
>> (common/spl/spl_(nand|net|nor|etc..)) so we add the check here.
>>
>> This version of the series is a bit different than the last 2 due
>> to suggestions by Simon, instead of a negative option disabling
>> non-FIT images, we allow the other image format's support to be
>> toggled off, and do that on HS boards.
> 
> I think this would be cleaner if we introduce the symbols to be default
> n if TI_SECURE_DEVICE and then we don't have to modify the defconfig
> files.  That said, we should probably do that as a new patch #3 so it's
> clear in the commit history when we default it off.  Thanks!
> 

Hmmm, I'm really not a fan of this, disabling these options is only
needed on a couple boards and so should go in their defconfig, adding
the per-board exceptions to the symbol definition itself will start to
cause massive kconfig bloat.

If you strongly disagree, below is a patch #3, if you take this you can
drop the defconfig patches from this series.

---

Author: Andrew F. Davis 
Date:   Thu Feb 16 08:36:08 2017 -0600

Kconfig: Disable non-FIT SPL loading for TI secure devices

Non-FIT SPL image loading support should be disabled for TI secure
devices as the image handlers for those image types do not follow
our secure boot flow.

Signed-off-by: Andrew F. Davis 

diff --git a/Kconfig b/Kconfig
index 70fd616cb1..3d42e8e06c 100644
--- a/Kconfig
+++ b/Kconfig
@@ -295,7 +295,7 @@ config FIT_IMAGE_POST_PROCESS

 config SPL_RAW_IMAGE_SUPPORT
bool "Support SPL loading and booting of RAW images"
-   default y
+   default y if !TI_SECURE_DEVICE
help
  SPL will support loading and booting a RAW image when this option
  is y. If this is not set, SPL will move on to other available
@@ -303,7 +303,7 @@ config SPL_RAW_IMAGE_SUPPORT

 config SPL_LEGACY_IMAGE_SUPPORT
bool "Support SPL loading and booting of Legacy images"
-   default y
+   default y if !TI_SECURE_DEVICE
help
  SPL will support loading and booting Legacy images when this
option
  is y. If this is not set, SPL will move on to other available
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Re: [U-Boot] Uart boot broken on AM335x-evm

[Andrew F. Davis]

On 02/16/2017 08:18 AM, Tom Rini wrote:
> On Thu, Feb 16, 2017 at 07:43:31PM +0530, Lokesh Vutla wrote:
>> Hi All,
>>  I am facing an issue with UART boot on AM335x-evm using latest U-Boot.
>> SPL is not able to download u-boot.img completely. After a bit of debug
>> with the help of Andrew, it is watchdog causing the timeout. If
>> HW_WATCHDOG is disabled, SPL is able to download the image completely
>> and u-boot successfully boots up. After this I could not progress anything.
>>
>> Wondering if anyone else is facing the same issue and any pointers to
>> debug further will be very helpful.
>>
> 
> I suspect that somewhere in the Y-MODEM code we need to be calling
> WATCHDOG_RESET()
> 

Agree, 2c77c0d6524e seems to be the culprit, the watchdog used to be
kicked in udelay(), the commit message seems it suggest it is now up to
getc(), but I can't find it getting kicked in the getc() path, I think
we need to just manually add a kick in the CYGACC_COMM_IF_GETC_TIMEOUT()
loop.

Andrew
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Re: [U-Boot] Uart boot broken on AM335x-evm

[Tom Rini]

On Thu, Feb 16, 2017 at 07:43:31PM +0530, Lokesh Vutla wrote:
> Hi All,
>   I am facing an issue with UART boot on AM335x-evm using latest U-Boot.
> SPL is not able to download u-boot.img completely. After a bit of debug
> with the help of Andrew, it is watchdog causing the timeout. If
> HW_WATCHDOG is disabled, SPL is able to download the image completely
> and u-boot successfully boots up. After this I could not progress anything.
> 
> Wondering if anyone else is facing the same issue and any pointers to
> debug further will be very helpful.
> 

I suspect that somewhere in the Y-MODEM code we need to be calling
WATCHDOG_RESET()

-- 
Tom


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[U-Boot] Uart boot broken on AM335x-evm

[Lokesh Vutla]

Hi All,
I am facing an issue with UART boot on AM335x-evm using latest U-Boot.
SPL is not able to download u-boot.img completely. After a bit of debug
with the help of Andrew, it is watchdog causing the timeout. If
HW_WATCHDOG is disabled, SPL is able to download the image completely
and u-boot successfully boots up. After this I could not progress anything.

Wondering if anyone else is facing the same issue and any pointers to
debug further will be very helpful.

Thanks and regards,
Lokesh
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Re: [U-Boot] [PATCH v2 0/3] ARM: AM43xx: Enable SPL_DM

[Tom Rini]

On Thu, Feb 16, 2017 at 11:41:45AM +0530, Lokesh Vutla wrote:

> Enable SPL_DM on all AM4xx based boards.
> 
> This series depends on:
> - DRA7 SPL_DM series[1]
> - http://patchwork.ozlabs.org/patch/727106/
> 
> [1] https://www.mail-archive.com/u-boot@lists.denx.de/msg238751.html

Since we're targeting v2017.05 for inclusion of these patches, can you
please switch to using 'imply' under arch/arm/Kconfig entries for
AM33XX, AM43XX, etc, etc, to enable various things that should be set to
y (but that the user may wish to disable all the same) so that these
stop getting out of sync?  Thanks!

-- 
Tom


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[U-Boot] [PATCH v2 11/12] arm64: a37xx: Disable DB configurations on ESPRESSOBin board

[kostap]

From: Konstantin Porotchkin 

Bypass XHCI and AHCi board configuration flow on ESPRESSOBin
community board.
The community board does not have i2c expander and USB VBUS
is always on, so the scan for AHCi and USB devices can be
faster without unneded configurations.

Signed-off-by: Konstantin Porotchkin 
Cc: Stefan Roese 
Cc: Igal Liberman 
Cc: Nadav Haklai 
---
Changes for v2:
- Check if the mashine is NOT compatible with DB
  instead of checking that if machine is compatible with ESPRESSOBin:wq

 board/Marvell/mvebu_armada-37xx/board.c | 9 +
 1 file changed, 9 insertions(+)

diff --git a/board/Marvell/mvebu_armada-37xx/board.c 
b/board/Marvell/mvebu_armada-37xx/board.c
index b9878bf..8dc1f46 100644
--- a/board/Marvell/mvebu_armada-37xx/board.c
+++ b/board/Marvell/mvebu_armada-37xx/board.c
@@ -21,6 +21,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #define I2C_IO_REG_0_SATA_OFF  2
 #define I2C_IO_REG_0_USB_H_OFF 1
 
+/* The pin control values are the same for DB and Espressobin */
 #define PINCTRL_NB_REG_VALUE   0x000173fa
 #define PINCTRL_SB_REG_VALUE   0x7a23
 
@@ -90,6 +91,10 @@ int board_ahci_enable(void)
int ret;
u8 buf[8];
 
+   /* Only DB requres this configuration */
+   if (!of_machine_is_compatible("marvell,armada-3720-db"))
+   return 0;
+
/* Configure IO exander PCA9555: 7bit address 0x22 */
ret = i2c_get_chip_for_busnum(0, I2C_IO_EXP_ADDR, 1, );
if (ret) {
@@ -124,6 +129,10 @@ int board_xhci_enable(void)
int ret;
u8 buf[8];
 
+   /* Only DB requres this configuration */
+   if (!of_machine_is_compatible("marvell,armada-3720-db"))
+   return 0;
+
/* Configure IO exander PCA9555: 7bit address 0x22 */
ret = i2c_get_chip_for_busnum(0, I2C_IO_EXP_ADDR, 1, );
if (ret) {
-- 
2.7.4

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[U-Boot] [PATCH v2 12/12] arm64: a37xx: Remove DM_I2C_COMPAT from the board config

[kostap]

From: Konstantin Porotchkin 

Remove DM_I2C_COMPAT from the board configurations for
Armada 37xx platform boards for supressing the buid tim
warning.

Signed-off-by: Konstantin Porotchkin 
Cc: Stefan Roese 
Cc: Igal Liberman 
Cc: Nadav Haklai 
---
Changes for v2:
- This patch was missing in v1

 configs/mvebu_db-88f3720_defconfig  | 1 -
 configs/mvebu_espressobin-88f3720_defconfig | 1 -
 2 files changed, 2 deletions(-)

diff --git a/configs/mvebu_db-88f3720_defconfig 
b/configs/mvebu_db-88f3720_defconfig
index bdb96e9..3e548a8 100644
--- a/configs/mvebu_db-88f3720_defconfig
+++ b/configs/mvebu_db-88f3720_defconfig
@@ -38,7 +38,6 @@ CONFIG_SHA1=y
 CONFIG_SHA256=y
 CONFIG_BLOCK_CACHE=y
 CONFIG_DM_I2C=y
-CONFIG_DM_I2C_COMPAT=y
 CONFIG_MISC=y
 CONFIG_DM_MMC=y
 CONFIG_MMC_SDHCI=y
diff --git a/configs/mvebu_espressobin-88f3720_defconfig 
b/configs/mvebu_espressobin-88f3720_defconfig
index d1749bc..f02ae64 100644
--- a/configs/mvebu_espressobin-88f3720_defconfig
+++ b/configs/mvebu_espressobin-88f3720_defconfig
@@ -38,7 +38,6 @@ CONFIG_SHA1=y
 CONFIG_SHA256=y
 CONFIG_BLOCK_CACHE=y
 CONFIG_DM_I2C=y
-CONFIG_DM_I2C_COMPAT=y
 CONFIG_MISC=y
 CONFIG_DM_MMC=y
 CONFIG_MMC_SDHCI=y
-- 
2.7.4

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[U-Boot] [PATCH v2 08/12] mvebu: a37xx: Add init for ESPRESSBin Topaz switch

[kostap]

From: Konstantin Porotchkin 

Implement the board-specific network init function for
ESPRESSOBin community board, setting the on-board Topaz
switch port to forward mode and allow network connection
through any of the available Etherenet ports.

Signed-off-by: Konstantin Porotchkin 
Cc: Stefan Roese 
Cc: Igal Liberman 
Cc: Nadav Haklai 
Cc: Joe Hershberger 
---
Changes for v2:
- Change SMI registers from numeric values to symbols for better readability
- Add missing  include

 board/Marvell/mvebu_armada-37xx/board.c | 91 +
 1 file changed, 91 insertions(+)

diff --git a/board/Marvell/mvebu_armada-37xx/board.c 
b/board/Marvell/mvebu_armada-37xx/board.c
index 3337f3f..b9878bf 100644
--- a/board/Marvell/mvebu_armada-37xx/board.c
+++ b/board/Marvell/mvebu_armada-37xx/board.c
@@ -5,7 +5,9 @@
  */
 
 #include 
+#include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -22,6 +24,29 @@ DECLARE_GLOBAL_DATA_PTR;
 #define PINCTRL_NB_REG_VALUE   0x000173fa
 #define PINCTRL_SB_REG_VALUE   0x7a23
 
+/* Ethernet switch registers */
+/* SMI addresses for multi-chip mode */
+#define MVEBU_PORT_CTRL_SMI_ADDR(p)(16 + (p))
+#define MVEBU_SW_G2_SMI_ADDR   (28)
+
+/* Multi-chip mode */
+#define MVEBU_SW_SMI_DATA_REG  (1)
+#define MVEBU_SW_SMI_CMD_REG   (0)
+ #define SW_SMI_CMD_REG_ADDR_OFF   0
+ #define SW_SMI_CMD_DEV_ADDR_OFF   5
+ #define SW_SMI_CMD_SMI_OP_OFF 10
+ #define SW_SMI_CMD_SMI_MODE_OFF   12
+ #define SW_SMI_CMD_SMI_BUSY_OFF   15
+
+/* Single-chip mode */
+/* Switch Port Registers */
+#define MVEBU_SW_LINK_CTRL_REG (1)
+#define MVEBU_SW_PORT_CTRL_REG (4)
+
+/* Global 2 Registers */
+#define MVEBU_G2_SMI_PHY_CMD_REG   (24)
+#define MVEBU_G2_SMI_PHY_DATA_REG  (25)
+
 int board_early_init_f(void)
 {
const void *blob = gd->fdt_blob;
@@ -156,3 +181,69 @@ int board_xhci_enable(void)
 
return 0;
 }
+
+/* Helper function for accessing switch devices in multi-chip connection mode 
*/
+static int mii_multi_chip_mode_write(struct mii_dev *bus, int dev_smi_addr,
+int smi_addr, int reg, u16 value)
+{
+   u16 smi_cmd = 0;
+
+   if (bus->write(bus, dev_smi_addr, 0,
+  MVEBU_SW_SMI_DATA_REG, value) != 0) {
+   printf("Error writing to the PHY addr=%02x reg=%02x\n",
+  smi_addr, reg);
+   return -EFAULT;
+   }
+
+   smi_cmd = (1 << SW_SMI_CMD_SMI_BUSY_OFF) |
+ (1 << SW_SMI_CMD_SMI_MODE_OFF) |
+ (1 << SW_SMI_CMD_SMI_OP_OFF) |
+ (smi_addr << SW_SMI_CMD_DEV_ADDR_OFF) |
+ (reg << SW_SMI_CMD_REG_ADDR_OFF);
+   if (bus->write(bus, dev_smi_addr, 0,
+  MVEBU_SW_SMI_CMD_REG, smi_cmd) != 0) {
+   printf("Error writing to the PHY addr=%02x reg=%02x\n",
+  smi_addr, reg);
+   return -EFAULT;
+   }
+
+   return 0;
+}
+
+/* Bring-up board-specific network stuff */
+int board_network_enable(struct mii_dev *bus)
+{
+   if (!of_machine_is_compatible("marvell,armada-3720-espressobin"))
+   return 0;
+
+   /*
+* FIXME: remove this code once Topaz driver gets available
+* A3720 Community Board Only
+* Configure Topaz switch (88E6341)
+* Set port 0,1,2,3 to forwarding Mode (through Switch Port registers)
+*/
+   mii_multi_chip_mode_write(bus, 1, MVEBU_PORT_CTRL_SMI_ADDR(0),
+ MVEBU_SW_PORT_CTRL_REG, 0x7f);
+   mii_multi_chip_mode_write(bus, 1, MVEBU_PORT_CTRL_SMI_ADDR(1),
+ MVEBU_SW_PORT_CTRL_REG, 0x7f);
+   mii_multi_chip_mode_write(bus, 1, MVEBU_PORT_CTRL_SMI_ADDR(2),
+ MVEBU_SW_PORT_CTRL_REG, 0x7f);
+   mii_multi_chip_mode_write(bus, 1, MVEBU_PORT_CTRL_SMI_ADDR(3),
+ MVEBU_SW_PORT_CTRL_REG, 0x7f);
+
+   /* RGMII Delay on Port 0 (CPU port), force link to 1000Mbps */
+   mii_multi_chip_mode_write(bus, 1, MVEBU_PORT_CTRL_SMI_ADDR(0),
+ MVEBU_SW_LINK_CTRL_REG, 0xe002);
+
+   /* Power up PHY 1, 2, 3 (through Global 2 registers) */
+   mii_multi_chip_mode_write(bus, 1, MVEBU_SW_G2_SMI_ADDR,
+ MVEBU_G2_SMI_PHY_DATA_REG, 0x1140);
+   mii_multi_chip_mode_write(bus, 1, MVEBU_SW_G2_SMI_ADDR,
+ MVEBU_G2_SMI_PHY_CMD_REG, 0x9620);
+   mii_multi_chip_mode_write(bus, 1, MVEBU_SW_G2_SMI_ADDR,
+ MVEBU_G2_SMI_PHY_CMD_REG, 0x9640);
+   mii_multi_chip_mode_write(bus, 1, MVEBU_SW_G2_SMI_ADDR,
+ MVEBU_G2_SMI_PHY_CMD_REG, 0x9660);
+
+   return 0;
+}
-- 
2.7.4

[U-Boot] [PATCH v2 01/12] arm64: mvebu: Rename the db-88f3720 to armada-37xx platform

[kostap]

From: Konstantin Porotchkin 

Modify the file names and deifinitions relater to Marvell
db-77f3720 board support. Convert these names to more generic
armada-37xx platform for future addition of more boards
based on the same SoC family.

Signed-off-by: Konstantin Porotchkin 
Cc: Stefan Roese 
Cc: Igal Liberman 
Cc: Nadav Haklai 
---
Changes for v2:
- This patch was missing in the v1

 arch/arm/mach-mvebu/Kconfig |  10 +--
 board/Marvell/mvebu_armada-37xx/MAINTAINERS |   6 ++
 board/Marvell/mvebu_armada-37xx/Makefile|   7 ++
 board/Marvell/mvebu_armada-37xx/board.c | 134 
 board/Marvell/mvebu_db-88f3720/MAINTAINERS  |   6 --
 board/Marvell/mvebu_db-88f3720/Makefile |   7 --
 board/Marvell/mvebu_db-88f3720/board.c  | 134 
 configs/mvebu_db-88f3720_defconfig  |   2 +-
 include/configs/mvebu_armada-37xx.h | 130 +++
 include/configs/mvebu_db-88f3720.h  | 130 ---
 10 files changed, 283 insertions(+), 283 deletions(-)
 create mode 100644 board/Marvell/mvebu_armada-37xx/MAINTAINERS
 create mode 100644 board/Marvell/mvebu_armada-37xx/Makefile
 create mode 100644 board/Marvell/mvebu_armada-37xx/board.c
 delete mode 100644 board/Marvell/mvebu_db-88f3720/MAINTAINERS
 delete mode 100644 board/Marvell/mvebu_db-88f3720/Makefile
 delete mode 100644 board/Marvell/mvebu_db-88f3720/board.c
 create mode 100644 include/configs/mvebu_armada-37xx.h
 delete mode 100644 include/configs/mvebu_db-88f3720.h

diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig
index 412bda4..a256c2f 100644
--- a/arch/arm/mach-mvebu/Kconfig
+++ b/arch/arm/mach-mvebu/Kconfig
@@ -74,8 +74,8 @@ config TARGET_CLEARFOG
bool "Support ClearFog"
select 88F6820
 
-config TARGET_MVEBU_DB_88F3720
-   bool "Support DB-88F3720 Armada 3720"
+config TARGET_MVEBU_ARMADA_37XX
+   bool "Support Armada 37xx platforms"
select ARMADA_3700
 
 config TARGET_DB_88F6720
@@ -116,7 +116,7 @@ endchoice
 
 config SYS_BOARD
default "clearfog" if TARGET_CLEARFOG
-   default "mvebu_db-88f3720" if TARGET_MVEBU_DB_88F3720
+   default "mvebu_armada-37xx" if TARGET_MVEBU_ARMADA_37XX
default "db-88f6720" if TARGET_DB_88F6720
default "db-88f6820-gp" if TARGET_DB_88F6820_GP
default "db-88f6820-amc" if TARGET_DB_88F6820_AMC
@@ -128,7 +128,7 @@ config SYS_BOARD
 
 config SYS_CONFIG_NAME
default "clearfog" if TARGET_CLEARFOG
-   default "mvebu_db-88f3720" if TARGET_MVEBU_DB_88F3720
+   default "mvebu_armada-37xx" if TARGET_MVEBU_ARMADA_37XX
default "db-88f6720" if TARGET_DB_88F6720
default "db-88f6820-gp" if TARGET_DB_88F6820_GP
default "db-88f6820-amc" if TARGET_DB_88F6820_AMC
@@ -140,7 +140,7 @@ config SYS_CONFIG_NAME
 
 config SYS_VENDOR
default "Marvell" if TARGET_DB_MV784MP_GP
-   default "Marvell" if TARGET_MVEBU_DB_88F3720
+   default "Marvell" if TARGET_MVEBU_ARMADA_37XX
default "Marvell" if TARGET_DB_88F6720
default "Marvell" if TARGET_DB_88F6820_GP
default "Marvell" if TARGET_DB_88F6820_AMC
diff --git a/board/Marvell/mvebu_armada-37xx/MAINTAINERS 
b/board/Marvell/mvebu_armada-37xx/MAINTAINERS
new file mode 100644
index 000..52a3869
--- /dev/null
+++ b/board/Marvell/mvebu_armada-37xx/MAINTAINERS
@@ -0,0 +1,6 @@
+MVEBU_DB_88F3720 BOARD
+M: Stefan Roese 
+S: Maintained
+F: board/Marvell/mvebu_armada-37xx/
+F: include/configs/mvebu_armada-37xx.h
+F: configs/mvebu_db-88f3720_defconfig
diff --git a/board/Marvell/mvebu_armada-37xx/Makefile 
b/board/Marvell/mvebu_armada-37xx/Makefile
new file mode 100644
index 000..ed39738
--- /dev/null
+++ b/board/Marvell/mvebu_armada-37xx/Makefile
@@ -0,0 +1,7 @@
+#
+# Copyright (C) 2016 Stefan Roese 
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y  := board.o
diff --git a/board/Marvell/mvebu_armada-37xx/board.c 
b/board/Marvell/mvebu_armada-37xx/board.c
new file mode 100644
index 000..edf88c7
--- /dev/null
+++ b/board/Marvell/mvebu_armada-37xx/board.c
@@ -0,0 +1,134 @@
+/*
+ * Copyright (C) 2016 Stefan Roese 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* IO expander I2C device */
+#define I2C_IO_EXP_ADDR0x22
+#define I2C_IO_CFG_REG_0   0x6
+#define I2C_IO_DATA_OUT_REG_0  0x2
+#define I2C_IO_REG_0_SATA_OFF  2
+#define I2C_IO_REG_0_USB_H_OFF 1
+
+int board_early_init_f(void)
+{
+   /* Nothing to do (yet), perhaps later some pin-muxing etc */
+
+   return 0;
+}
+
+int board_init(void)
+{
+   /* adress of boot parameters */
+   gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+
+   return 0;
+}
+
+/* Board specific AHCI / 

[U-Boot] [PATCH v2 02/12] arm64: a37xx: Enable Marvell ETH PHY support

[kostap]

From: Konstantin Porotchkin 

Enable support for Marvell Ethernet PHYs on A37xx platforms

Signed-off-by: Konstantin Porotchkin 
Cc: Stefan Roese 
Cc: Igal Liberman 
Cc: Nadav Haklai 
---
Changes for v2:
- No changes, rebased on top of new platform file

 include/configs/mvebu_armada-37xx.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/configs/mvebu_armada-37xx.h 
b/include/configs/mvebu_armada-37xx.h
index f5adfef..fd2ae8e 100644
--- a/include/configs/mvebu_armada-37xx.h
+++ b/include/configs/mvebu_armada-37xx.h
@@ -93,6 +93,7 @@
 #define CONFIG_PHY_GIGE/* GbE speed/duplex detect */
 #define CONFIG_ARP_TIMEOUT 200
 #define CONFIG_NET_RETRY_COUNT 50
+#define CONFIG_PHY_MARVELL
 
 /* USB 2.0 */
 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
-- 
2.7.4

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[U-Boot] [PATCH v2 06/12] mvebu: neta: Add support for board init function

[kostap]

From: Konstantin Porotchkin 

Add ability to use board-specific initialization flow
to NETA driver (for instance Ethernet switch bring-up)

Signed-off-by: Konstantin Porotchkin 
Cc: Stefan Roese 
Cc: Igal Liberman 
Cc: Nadav Haklai 
---
Changes for v2:
- No changes

 drivers/net/mvneta.c | 16 +++-
 1 file changed, 15 insertions(+), 1 deletion(-)

diff --git a/drivers/net/mvneta.c b/drivers/net/mvneta.c
index 674075f..a1e2136 100644
--- a/drivers/net/mvneta.c
+++ b/drivers/net/mvneta.c
@@ -404,6 +404,15 @@ static struct buffer_location buffer_loc;
  */
 #define BD_SPACE   (1 << 20)
 
+/*
+ * Dummy implementation that can be overwritten by a board
+ * specific function
+ */
+__weak int board_network_enable(struct mii_dev *bus)
+{
+   return 0;
+}
+
 /* Utility/helper methods */
 
 /* Write helper method */
@@ -1615,6 +1624,7 @@ static int mvneta_probe(struct udevice *dev)
struct mii_dev *bus;
unsigned long addr;
void *bd_space;
+   int ret;
 
/*
 * Allocate buffer area for descs and rx_buffers. This is only
@@ -1664,7 +1674,11 @@ static int mvneta_probe(struct udevice *dev)
bus->priv = (void *)pp;
pp->bus = bus;
 
-   return mdio_register(bus);
+   ret = mdio_register(bus);
+   if (ret)
+   return ret;
+
+   return board_network_enable(bus);
 }
 
 static void mvneta_stop(struct udevice *dev)
-- 
2.7.4

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[U-Boot] [PATCH v2 04/12] arm64: a37xx: dts: Add pin control nodes to DT

[kostap]

From: Konstantin Porotchkin 

Add pin control nodes for North and South bridges to
Armada-37xx DT

Signed-off-by: Konstantin Porotchkin 
Cc: Stefan Roese 
Cc: Igal Liberman 
Cc: Nadav Haklai 
---
 arch/arm/dts/armada-37xx.dtsi | 14 ++
 1 file changed, 14 insertions(+)
Changes for v2:
- No changes, rebased on top of new platform files

diff --git a/arch/arm/dts/armada-37xx.dtsi b/arch/arm/dts/armada-37xx.dtsi
index 062f2a6..5bea63b 100644
--- a/arch/arm/dts/armada-37xx.dtsi
+++ b/arch/arm/dts/armada-37xx.dtsi
@@ -193,6 +193,20 @@
status = "disabled";
};
 
+   pinctl0: pinctl@13830 { /* north bridge */
+   compatible = "marvell,armada-3700-pinctl";
+   bank-name = "armada-3700-nb";
+   reg = <0x13830 0x4>;
+   pin-count = <36>;
+   };
+
+   pinctl1: pinctl@18830 { /* south bridge */
+   compatible = "marvell,armada-3700-pinctl";
+   bank-name = "armada-3700-sb";
+   reg = <0x18830 0x4>;
+   pin-count = <30>;
+   };
+
comphy: comphy@18300 {
compatible = "marvell,mvebu-comphy", 
"marvell,comphy-armada-3700";
reg = <0x18300 0x28>,
-- 
2.7.4

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[U-Boot] [PATCH v2 03/12] arm64: a37xx: Enable bubt command support on A3720-DB

[kostap]

From: Konstantin Porotchkin 

Enable mvebu bubt command support on A3720 DB

Signed-off-by: Konstantin Porotchkin 
Cc: Stefan Roese 
Cc: Igal Liberman 
Cc: Nadav Haklai 
---
Changes for v2:
- No changes

 configs/mvebu_db-88f3720_defconfig | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/configs/mvebu_db-88f3720_defconfig 
b/configs/mvebu_db-88f3720_defconfig
index 4286695..bdb96e9 100644
--- a/configs/mvebu_db-88f3720_defconfig
+++ b/configs/mvebu_db-88f3720_defconfig
@@ -33,6 +33,9 @@ CONFIG_CMD_FS_GENERIC=y
 CONFIG_MAC_PARTITION=y
 CONFIG_ISO_PARTITION=y
 CONFIG_EFI_PARTITION=y
+CONFIG_CMD_MVEBU_BUBT=y
+CONFIG_SHA1=y
+CONFIG_SHA256=y
 CONFIG_BLOCK_CACHE=y
 CONFIG_DM_I2C=y
 CONFIG_DM_I2C_COMPAT=y
-- 
2.7.4

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[U-Boot] [PATCH v2 00/12] Add Marvell ESPRESSOBin community board support

[kostap]

From: Konstantin Porotchkin 

This patch set adds support for Marvell ESPRESSOBin community board.
The Marvell ESPRESSOBin is a tiny board made by Globalscale
and available on KickStarter project site.
It has (current board version 3.1.1):
- Dual core Cortex-A53 @1.2GHz CPU (Marvell Armada-3720)
- 512MB/1GB/2GB DDR3 RAM (depends on selected configuration)
- Mini-PCIe 2.0 slot
- Single SATA-3 port with Molex SATA power connector
- USB 2.0 port 
- USB 3.0 port
- Gigabit Ethernet switch with 3 ports
- Micro-SD socket
- Soldering pads for (unpopulated) eMMC chip
- Two 46-pin GPIO connectors.
- SPI boot flash
- Boot source selection jumpers (SPI/SATA/UART/Auto)
- Micro JTAG connector (10 pin)
- Micro USB serial port 

Changes for v2:
- The patch set has grew by 2 patches:
  - Changed naming of common A37xx files from board-specific
to platform (mvebu_db-88f3720 =>> mvebu_armada-37xx)
  - Removed CONFIG_DM_I2C_COMPAT from board configuration
files as advised by compilation warning
- Rebase all related files on top of newly named platform and
  on top of "Prepare v2017.03-rc2" commit
- Beatify the Topaz initialization code by using register names
  instead of numeric address values
- Added missing include in board support code

Konstantin Porotchkin (12):
  arm64: mvebu: Rename the db-88f3720 to armada-37xx platform
  arm64: a37xx: Enable Marvell ETH PHY support
  arm64: a37xx: Enable bubt command support on A3720-DB
  arm64: a37xx: dts: Add pin control nodes to DT
  arm64: a37xx: Handle pin controls in early board init
  mvebu: neta: Add support for board init function
  mvebu: neta: a37xx: Add fixed link support to neta driver
  mvebu: a37xx: Add init for ESPRESSBin Topaz switch
  arm64: dts: Add device tree for ESPRESSOBin board
  arm64: mvebu: Add default config for ESPRESSOBin board
  arm64: a37xx: Disable DB configurations on ESPRESSOBin board
  arm64: a37xx: Remove DM_I2C_COMPAT from the board config

 arch/arm/dts/Makefile   |   1 +
 arch/arm/dts/armada-3720-espressobin.dts| 135 +++
 arch/arm/dts/armada-37xx.dtsi   |  14 ++
 arch/arm/mach-mvebu/Kconfig |  10 +-
 board/Marvell/mvebu_armada-37xx/MAINTAINERS |   6 +
 board/Marvell/mvebu_armada-37xx/Makefile|   7 +
 board/Marvell/mvebu_armada-37xx/board.c | 258 
 board/Marvell/mvebu_db-88f3720/MAINTAINERS  |   6 -
 board/Marvell/mvebu_db-88f3720/Makefile |   7 -
 board/Marvell/mvebu_db-88f3720/board.c  | 134 ---
 configs/mvebu_db-88f3720_defconfig  |   6 +-
 configs/mvebu_espressobin-88f3720_defconfig |  66 +++
 drivers/net/mvneta.c| 125 +++---
 include/configs/mvebu_armada-37xx.h | 131 ++
 include/configs/mvebu_db-88f3720.h  | 130 --
 15 files changed, 724 insertions(+), 312 deletions(-)
 create mode 100644 arch/arm/dts/armada-3720-espressobin.dts
 create mode 100644 board/Marvell/mvebu_armada-37xx/MAINTAINERS
 create mode 100644 board/Marvell/mvebu_armada-37xx/Makefile
 create mode 100644 board/Marvell/mvebu_armada-37xx/board.c
 delete mode 100644 board/Marvell/mvebu_db-88f3720/MAINTAINERS
 delete mode 100644 board/Marvell/mvebu_db-88f3720/Makefile
 delete mode 100644 board/Marvell/mvebu_db-88f3720/board.c
 create mode 100644 configs/mvebu_espressobin-88f3720_defconfig
 create mode 100644 include/configs/mvebu_armada-37xx.h
 delete mode 100644 include/configs/mvebu_db-88f3720.h

-- 
2.7.4

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[U-Boot] [PATCH v2 10/12] arm64: mvebu: Add default config for ESPRESSOBin board

[kostap]

From: Konstantin Porotchkin 

Add initial default configuration for Marvell ESPRESSOBin
community board based on Aramda-3720 SoC

Signed-off-by: Konstantin Porotchkin 
Cc: Stefan Roese 
Cc: Igal Liberman 
Cc: Nadav Haklai 
---
Changes for v2:
- Use the new target name TARGET_MVEBU_ARMADA_37XX

 configs/mvebu_espressobin-88f3720_defconfig | 67 +
 1 file changed, 67 insertions(+)
 create mode 100644 configs/mvebu_espressobin-88f3720_defconfig

diff --git a/configs/mvebu_espressobin-88f3720_defconfig 
b/configs/mvebu_espressobin-88f3720_defconfig
new file mode 100644
index 000..d1749bc
--- /dev/null
+++ b/configs/mvebu_espressobin-88f3720_defconfig
@@ -0,0 +1,67 @@
+CONFIG_ARM=y
+CONFIG_ARCH_MVEBU=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_TARGET_MVEBU_ARMADA_37XX=y
+CONFIG_DEFAULT_DEVICE_TREE="armada-3720-espressobin"
+CONFIG_AHCI=y
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
+# CONFIG_DISPLAY_CPUINFO is not set
+# CONFIG_DISPLAY_BOARDINFO is not set
+CONFIG_ARCH_EARLY_INIT_R=y
+CONFIG_BOARD_EARLY_INIT_F=y
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PART=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_USB=y
+# CONFIG_CMD_FPGA is not set
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_TFTPPUT=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_MAC_PARTITION=y
+CONFIG_ISO_PARTITION=y
+CONFIG_EFI_PARTITION=y
+CONFIG_CMD_MVEBU_BUBT=y
+CONFIG_SHA1=y
+CONFIG_SHA256=y
+CONFIG_BLOCK_CACHE=y
+CONFIG_DM_I2C=y
+CONFIG_DM_I2C_COMPAT=y
+CONFIG_MISC=y
+CONFIG_DM_MMC=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
+CONFIG_MMC_SDHCI_XENON=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_PHYLIB=y
+CONFIG_MVEBU_COMPHY_SUPPORT=y
+# CONFIG_SPL_SERIAL_PRESENT is not set
+CONFIG_DEBUG_UART=y
+CONFIG_DEBUG_MVEBU_A3700_UART=y
+CONFIG_DEBUG_UART_BASE=0xd0012000
+CONFIG_DEBUG_UART_CLOCK=25804800
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_MVEBU_A3700_UART=y
+CONFIG_MVEBU_A3700_SPI=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_STORAGE=y
-- 
2.7.4

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[U-Boot] [PATCH v2 09/12] arm64: dts: Add device tree for ESPRESSOBin board

[kostap]

From: Konstantin Porotchkin 

Initial DTS file for Marvell ESPRESSOBin comunity board
based on Armada-3720 SoC.
The Marvell ESPRESSOBin is a tiny board made by Globalscale
and available on KickStarter site. It has dual core Armv8
Marvell SoC (Armada-3720) with 512MB/1GB/2GB DDR3 RAM,
mini-PCIe 2.0 slot, single SATA-3 port, USB 2.0 and USB 3.0
interfaces, Gigabit Ethernet switch with 3 ports, micro-SD
socket and two 46-pin GPIO connectors.

Signed-off-by: Konstantin Porotchkin 
Cc: Stefan Roese 
Cc: Igal Liberman 
Cc: Nadav Haklai 
---
Changes for v2:
- No changes

 arch/arm/dts/Makefile|   1 +
 arch/arm/dts/armada-3720-espressobin.dts | 135 +++
 2 files changed, 136 insertions(+)
 create mode 100644 arch/arm/dts/armada-3720-espressobin.dts

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index eb68c20..d85210c 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -70,6 +70,7 @@ dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \
 
 dtb-$(CONFIG_ARCH_MVEBU) +=\
armada-3720-db.dtb  \
+   armada-3720-espressobin.dtb \
armada-375-db.dtb   \
armada-388-clearfog.dtb \
armada-388-gp.dtb   \
diff --git a/arch/arm/dts/armada-3720-espressobin.dts 
b/arch/arm/dts/armada-3720-espressobin.dts
new file mode 100644
index 000..aa6587a
--- /dev/null
+++ b/arch/arm/dts/armada-3720-espressobin.dts
@@ -0,0 +1,135 @@
+/*
+ * Device Tree file for Marvell Armada 3720 community board
+ * (ESPRESSOBin)
+ * Copyright (C) 2016 Marvell
+ *
+ * Gregory CLEMENT 
+ * Konstantin Porotchkin 
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+#include "armada-372x.dtsi"
+
+/ {
+   model = "Marvell Armada 3720 Community Board ESPRESSOBin";
+   compatible = "marvell,armada-3720-espressobin", "marvell,armada3720", 
"marvell,armada3710";
+
+   chosen {
+   stdout-path = "serial0:115200n8";
+   };
+
+   aliases {
+   ethernet0 = 
+   i2c0 = 
+   spi0 = 
+   };
+
+   memory {
+   device_type = "memory";
+   reg = <0x 0x 0x 0x2000>;
+   };
+};
+
+ {
+   max-lanes = <3>;
+   phy0 {
+   phy-type = ;
+   phy-speed = ;
+   };
+
+   phy1 {
+   phy-type = ;
+   phy-speed = ;
+   };
+
+   phy2 {
+   phy-type = ;
+   phy-speed = ;
+   };
+};
+
+ {
+   status = "okay";
+   phy-mode = "rgmii";
+   phy_addr = <0x1>;
+   fixed-link {
+   speed = <1000>;
+   full-duplex;
+   };
+};
+
+ {
+   status = "okay";
+};
+
+/* CON3 */
+ {
+   status = "okay";
+};
+
+ {
+   status = "okay";
+
+   spi-flash@0 {
+   #address-cells 

[U-Boot] [PATCH v2 05/12] arm64: a37xx: Handle pin controls in early board init

[kostap]

From: Konstantin Porotchkin 

Fix the default pin control values in a board-specific
function on early board init stage.
This fix allows the NETA driver to work in RGMII
mode until the full-featured pin control driver gets
introduced.

Signed-off-by: Konstantin Porotchkin 
Cc: Stefan Roese 
Cc: Igal Liberman 
Cc: Nadav Haklai 
---
Changes for v2:
- No changes, rebased on top of new platform files

 board/Marvell/mvebu_armada-37xx/board.c | 26 +-
 1 file changed, 25 insertions(+), 1 deletion(-)

diff --git a/board/Marvell/mvebu_armada-37xx/board.c 
b/board/Marvell/mvebu_armada-37xx/board.c
index edf88c7..3337f3f 100644
--- a/board/Marvell/mvebu_armada-37xx/board.c
+++ b/board/Marvell/mvebu_armada-37xx/board.c
@@ -19,9 +19,33 @@ DECLARE_GLOBAL_DATA_PTR;
 #define I2C_IO_REG_0_SATA_OFF  2
 #define I2C_IO_REG_0_USB_H_OFF 1
 
+#define PINCTRL_NB_REG_VALUE   0x000173fa
+#define PINCTRL_SB_REG_VALUE   0x7a23
+
 int board_early_init_f(void)
 {
-   /* Nothing to do (yet), perhaps later some pin-muxing etc */
+   const void *blob = gd->fdt_blob;
+   const char *bank_name;
+   const char *compat = "marvell,armada-3700-pinctl";
+   int off, len;
+   void __iomem *addr;
+
+   /* FIXME
+* Temporary WA for setting correct pin control values
+* until the real pin control driver is awailable.
+*/
+   off = fdt_node_offset_by_compatible(blob, -1, compat);
+   while (off != -FDT_ERR_NOTFOUND) {
+   bank_name = fdt_getprop(blob, off, "bank-name", );
+   addr = (void __iomem *)fdtdec_get_addr_size_auto_noparent(
+   blob, off, "reg", 0, NULL, true);
+   if (!strncmp(bank_name, "armada-3700-nb", len))
+   writel(PINCTRL_NB_REG_VALUE, addr);
+   else if (!strncmp(bank_name, "armada-3700-sb", len))
+   writel(PINCTRL_SB_REG_VALUE, addr);
+
+   off = fdt_node_offset_by_compatible(blob, off, compat);
+   }
 
return 0;
 }
-- 
2.7.4

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[U-Boot] [PATCH v2 07/12] mvebu: neta: a37xx: Add fixed link support to neta driver

[kostap]

From: Konstantin Porotchkin 

Add support for fixed link to NETA driver.
This feature requreed for proper support of SFP modules
and onboard connected devices like Ethernet switches

Signed-off-by: Konstantin Porotchkin 
Signed-off-by: Terry Zhou 
Cc: Stefan Roese 
Cc: Igal Liberman 
Cc: Nadav Haklai 
---
Changes for v2:
- No changes

 drivers/net/mvneta.c | 109 ++-
 1 file changed, 82 insertions(+), 27 deletions(-)

diff --git a/drivers/net/mvneta.c b/drivers/net/mvneta.c
index a1e2136..8881cc7 100644
--- a/drivers/net/mvneta.c
+++ b/drivers/net/mvneta.c
@@ -191,11 +191,16 @@ DECLARE_GLOBAL_DATA_PTR;
 #define MVNETA_GMAC_AUTONEG_CONFIG   0x2c0c
 #define  MVNETA_GMAC_FORCE_LINK_DOWN BIT(0)
 #define  MVNETA_GMAC_FORCE_LINK_PASS BIT(1)
+#define  MVNETA_GMAC_FORCE_LINK_UP   (BIT(0) | BIT(1))
+#define  MVNETA_GMAC_IB_BYPASS_AN_EN BIT(3)
 #define  MVNETA_GMAC_CONFIG_MII_SPEEDBIT(5)
 #define  MVNETA_GMAC_CONFIG_GMII_SPEED   BIT(6)
 #define  MVNETA_GMAC_AN_SPEED_EN BIT(7)
+#define  MVNETA_GMAC_SET_FC_EN   BIT(8)
+#define  MVNETA_GMAC_ADVERT_FC_ENBIT(9)
 #define  MVNETA_GMAC_CONFIG_FULL_DUPLEX  BIT(12)
 #define  MVNETA_GMAC_AN_DUPLEX_ENBIT(13)
+#define  MVNETA_GMAC_SAMPLE_TX_CFG_ENBIT(15)
 #define MVNETA_MIB_COUNTERS_BASE 0x3080
 #define  MVNETA_MIB_LATE_COLLISION   0x7c
 #define MVNETA_DA_FILT_SPEC_MCAST0x3400
@@ -566,6 +571,13 @@ static void mvneta_rxq_buf_size_set(struct mvneta_port *pp,
mvreg_write(pp, MVNETA_RXQ_SIZE_REG(rxq->id), val);
 }
 
+static int mvneta_port_is_fixed_link(struct mvneta_port *pp)
+{
+   /* phy_addr is set to invalid value for fixed link */
+   return pp->phyaddr > PHY_MAX_ADDR;
+}
+
+
 /* Start the Ethernet port RX and TX activity */
 static void mvneta_port_up(struct mvneta_port *pp)
 {
@@ -816,10 +828,12 @@ static void mvneta_defaults_set(struct mvneta_port *pp)
/* Assign port SDMA configuration */
mvreg_write(pp, MVNETA_SDMA_CONFIG, val);
 
-   /* Enable PHY polling in hardware for U-Boot */
-   val = mvreg_read(pp, MVNETA_UNIT_CONTROL);
-   val |= MVNETA_PHY_POLLING_ENABLE;
-   mvreg_write(pp, MVNETA_UNIT_CONTROL, val);
+   /* Enable PHY polling in hardware if not in fixed-link mode */
+   if (!mvneta_port_is_fixed_link(pp)) {
+   val = mvreg_read(pp, MVNETA_UNIT_CONTROL);
+   val |= MVNETA_PHY_POLLING_ENABLE;
+   mvreg_write(pp, MVNETA_UNIT_CONTROL, val);
+   }
 
mvneta_set_ucast_table(pp, -1);
mvneta_set_special_mcast_table(pp, -1);
@@ -1137,6 +1151,11 @@ static void mvneta_adjust_link(struct udevice *dev)
struct phy_device *phydev = pp->phydev;
int status_change = 0;
 
+   if (mvneta_port_is_fixed_link(pp)) {
+   debug("Using fixed link, skip link adjust\n");
+   return;
+   }
+
if (phydev->link) {
if ((pp->speed != phydev->speed) ||
(pp->duplex != phydev->duplex)) {
@@ -1507,28 +1526,54 @@ static int mvneta_start(struct udevice *dev)
mvneta_port_power_up(pp, pp->phy_interface);
 
if (!pp->init || pp->link == 0) {
-   /* Set phy address of the port */
-   mvreg_write(pp, MVNETA_PHY_ADDR, pp->phyaddr);
-   phydev = phy_connect(pp->bus, pp->phyaddr, dev,
-pp->phy_interface);
-
-   pp->phydev = phydev;
-   phy_config(phydev);
-   phy_startup(phydev);
-   if (!phydev->link) {
-   printf("%s: No link.\n", phydev->dev->name);
-   return -1;
-   }
+   if (mvneta_port_is_fixed_link(pp)) {
+   u32 val;
 
-   /* Full init on first call */
-   mvneta_init(dev);
-   pp->init = 1;
-   } else {
-   /* Upon all following calls, this is enough */
-   mvneta_port_up(pp);
-   mvneta_port_enable(pp);
+   pp->init = 1;
+   pp->link = 1;
+   mvneta_init(dev);
+
+   val = MVNETA_GMAC_FORCE_LINK_UP |
+ MVNETA_GMAC_IB_BYPASS_AN_EN |
+ MVNETA_GMAC_SET_FC_EN |
+ MVNETA_GMAC_ADVERT_FC_EN |
+ MVNETA_GMAC_SAMPLE_TX_CFG_EN;
+
+   if (pp->duplex)
+   val |= MVNETA_GMAC_CONFIG_FULL_DUPLEX;
+
+   if (pp->speed == SPEED_1000)
+   val |= MVNETA_GMAC_CONFIG_GMII_SPEED;
+  

[U-Boot] [PATCH] sunxi: Add defconfig for Allwinner A23 EVB

[Florent Jacquet]

This enables the support for the Allwinner A23 Evaluation Board (EVB),
that already had a device tree (from Linux) but no defconfig.

This board has an AXP223 PMIC, some NAND, Audio out and in plugs, an
accelerometer and light sensor, as well as a USB HSIC hub and a USB
OTG mini-USB connector. It also has a Wifi/BT chip.

Access to the other buses (LCD, MIPI DSI, LVDS, etc) can be done
through dedicated pin headers.

Signed-off-by: Florent Jacquet 
Cc: Jagan Teki 
Cc: Maxime Ripard 
---
 configs/sun8i_a23_evb_defconfig | 19 +++
 1 file changed, 19 insertions(+)
 create mode 100644 configs/sun8i_a23_evb_defconfig

diff --git a/configs/sun8i_a23_evb_defconfig b/configs/sun8i_a23_evb_defconfig
new file mode 100644
index 000..296df00
--- /dev/null
+++ b/configs/sun8i_a23_evb_defconfig
@@ -0,0 +1,19 @@
+CONFIG_ARM=y
+CONFIG_ARCH_SUNXI=y
+CONFIG_MACH_SUN8I_A23=y
+CONFIG_DRAM_CLK=552
+CONFIG_DRAM_ZQ=63351
+CONFIG_USB0_VBUS_PIN="axp_drivebus"
+CONFIG_USB0_VBUS_DET="axp_vbus_detect"
+CONFIG_USB1_VBUS_PIN="PH7"
+CONFIG_DEFAULT_DEVICE_TREE="sun8i-a23-evb"
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=5"
+CONFIG_SPL=y
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_FPGA is not set
+# CONFIG_SPL_DOS_PARTITION is not set
+# CONFIG_SPL_ISO_PARTITION is not set
+# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_USB_EHCI_HCD=y
-- 
2.7.4

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Re: [U-Boot] [PATCH v4 20/28] arm: socfpga: arria10: Added clock manager and pin mux compat macro

[Ley Foon Tan]

On Mon, Jan 23, 2017 at 12:05 PM, Marek Vasut  wrote:
> On 01/10/2017 06:20 AM, Chee Tien Fong wrote:
>> From: Tien Fong Chee 
>>
>> These compat macros would be used by clock manager and pin mux drivers
>> to look the required HW info from DTS for hardware initialization.
>>
>> Signed-off-by: Tien Fong Chee 
>> Cc: Marek Vasut 
>> Cc: Dinh Nguyen 
>> Cc: Chin Liang See 
>> Cc: Tien Fong 
>> ---
>>  include/fdtdec.h | 8 
>>  lib/fdtdec.c | 8 
>>  2 files changed, 16 insertions(+)
>>
>> diff --git a/include/fdtdec.h b/include/fdtdec.h
>> index d074478..73e3a46 100644
>> --- a/include/fdtdec.h
>> +++ b/include/fdtdec.h
>> @@ -155,6 +155,14 @@ enum fdt_compat_id {
>>   COMPAT_INTEL_BAYTRAIL_FSP_MDP,  /* Intel FSP memory-down params */
>>   COMPAT_INTEL_IVYBRIDGE_FSP, /* Intel Ivy Bridge FSP */
>>   COMPAT_SUNXI_NAND,  /* SUNXI NAND controller */
>> + COMPAT_ALTERA_SOCFPGA_CLK,  /* SoCFPGA Clock initialization */
>> + COMPAT_ALTERA_SOCFPGA_PINCTRL_SINGLE,   /* pinctrl-single */
>
> Um, the comment needs fixing and it needs to be prefixed with SoCFPGA ,
> all of them.
Okay.
>
> And again, is any of this stuff actually used ?
Yes, all are in used.
>
>> + COMPAT_ALTERA_SOCFPGA_H2F_BRG,  /* Arria10 hps2fpga bridge */
>> + COMPAT_ALTERA_SOCFPGA_LWH2F_BRG,/* Arria10 lwhps2fpga bridge */
>> + COMPAT_ALTERA_SOCFPGA_F2H_BRG,  /* Arria10 fpga2hps bridge */
>> + COMPAT_ALTERA_SOCFPGA_F2SDR0,   /* Arria10 fpga2SDRAM0 bridge 
>> */
>> + COMPAT_ALTERA_SOCFPGA_F2SDR1,   /* Arria10 fpga2SDRAM1 bridge 
>> */
>> + COMPAT_ALTERA_SOCFPGA_F2SDR2,   /* Arria10 fpga2SDRAM2 bridge 
>> */
>>
>>   COMPAT_COUNT,
>>  };
>> diff --git a/lib/fdtdec.c b/lib/fdtdec.c
>> index 81f47ef..ebe4a9a 100644
>> --- a/lib/fdtdec.c
>> +++ b/lib/fdtdec.c
>> @@ -66,6 +66,14 @@ static const char * const compat_names[COMPAT_COUNT] = {
>>   COMPAT(INTEL_BAYTRAIL_FSP_MDP, "intel,baytrail-fsp-mdp"),
>>   COMPAT(INTEL_IVYBRIDGE_FSP, "intel,ivybridge-fsp"),
>>   COMPAT(COMPAT_SUNXI_NAND, "allwinner,sun4i-a10-nand"),
>> + COMPAT(ALTERA_SOCFPGA_CLK, "altr,clk-mgr"),
>> + COMPAT(ALTERA_SOCFPGA_PINCTRL_SINGLE, "pinctrl-single"),
>> + COMPAT(ALTERA_SOCFPGA_H2F_BRG, "altr,socfpga-hps2fpga-bridge"),
>> + COMPAT(ALTERA_SOCFPGA_LWH2F_BRG, "altr,socfpga-lwhps2fpga-bridge"),
>> + COMPAT(ALTERA_SOCFPGA_F2H_BRG, "altr,socfpga-fpga2hps-bridge"),
>> + COMPAT(ALTERA_SOCFPGA_F2SDR0, "altr,socfpga-fpga2sdram0-bridge"),
>> + COMPAT(ALTERA_SOCFPGA_F2SDR1, "altr,socfpga-fpga2sdram1-bridge"),
>> + COMPAT(ALTERA_SOCFPGA_F2SDR2, "altr,socfpga-fpga2sdram2-bridge"),
>>  };
>>
>>  const char *fdtdec_get_compatible(enum fdt_compat_id id)
>>
>
>
> --
> Best regards,
> Marek Vasut
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