Re: [U-Boot] [PATCH v2 08/10] defconfig: k2e_hs_evm: Add k2e_hs_evm_defconfig

[Lokesh Vutla]

On 4/7/2017 8:30 PM, Andrew F. Davis wrote:
> From: Vitaly Andrianov 
> 
> TI K2E secure devices have to be built with TI_SECURE_DEVICE, FIT, and
> FIT_IMAGE_POST_PROCESS enabled. Add a dedicated defconfig for this.
> 
> Signed-off-by: Vitaly Andrianov 
> Signed-off-by: Madan Srinivas 
> Signed-off-by: Andrew F. Davis 
> Reviewed-by: Simon Glass 

Can you update Maintainers file or else buildman will complain.

Thanks and regards,
Lokesh
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Re: [U-Boot] [PATCH v2 06/10] doc: Updates info on using Keystone2 secure devices

[Lokesh Vutla]

On 4/7/2017 8:30 PM, Andrew F. Davis wrote:
> From: Madan Srinivas 
> 
> Add a section describing the secure boot image used on
> Keystone2 secure devices.
> 
> Signed-off-by: Madan Srinivas 
> Signed-off-by: Andrew F. Davis 
> Reviewed-by: Tom Rini 

Reviewed-by: Lokesh Vutla 

Thanks and regards,
Lokesh
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Re: [U-Boot] [PATCH v2 07/10] Kconfig: Adds SYS_TEXT_BASE config option for Keystone2

[Lokesh Vutla]

On 4/7/2017 8:30 PM, Andrew F. Davis wrote:
> From: Madan Srinivas 
> 
> This patch makes SYS_TEXT_BASE a config option for Keystone2
> so that it can be used to load u-boot at different addresses
> on secure and non-secure Keystone2 devices.
> 
> Signed-off-by: Madan Srinivas 
> Signed-off-by: Andrew F. Davis 
> Reviewed-by: Tom Rini 

Reviewed-by: Lokesh Vutla 

Thanks and regards,
Lokesh
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Re: [U-Boot] [PATCH v2 05/10] ARM: Keystone2: Build secure images for K2

[Lokesh Vutla]

On 4/7/2017 8:30 PM, Andrew F. Davis wrote:
> From: Madan Srinivas 
> 
> Adds an additional image type needed for supporting secure keystone
> devices. The build generates u-boot_HS_MLO which can be used to boot
> from all media on secure keystone devices.

SPI boot has a different image on non-HS devices. Does this cover here?

> 
> Signed-off-by: Madan Srinivas 
> Signed-off-by: Andrew F. Davis 
> Reviewed-by: Tom Rini 

Reviewed-by: Lokesh Vutla 

Thanks and regards,
Lokesh
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Re: [U-Boot] [PATCH v2 04/10] arm: mach-omap2: Add secure image name common to OMAP and keystone

[Lokesh Vutla]

On 4/7/2017 8:30 PM, Andrew F. Davis wrote:
> From: Madan Srinivas 
> 
> As K2 can directly boot U-Boot, add u-boot_HS_MLO as the secure image
> name for secure K2 devices, for all boot modes other than SPI flash.
> 
> Signed-off-by: Madan Srinivas 
> Signed-off-by: Andrew F. Davis 
> Reviewed-by: Tom Rini 

Reviewed-by: Lokesh Vutla 

Thanks and regards,
Lokesh

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Re: [U-Boot] [PATCH v2 03/10] arm: mach-omap2: Enable Kconfig support for K2 HS devices

[Lokesh Vutla]

On 4/7/2017 8:30 PM, Andrew F. Davis wrote:
> From: Vitaly Andrianov 
> 
> Like the OMAP54xx, AM43xx, & AM33xx family SoCs, the keystone family
> of SoCs also have high security enabled models. Allow K2E devices to
> be built with HS Device Type Support.
> 
> Signed-off-by: Vitaly Andrianov 
> Signed-off-by: Madan Srinivas 
> Signed-off-by: Andrew F. Davis 
> Reviewed-by: Tom Rini 

Reviewed-by: Lokesh Vutla 

Thanks and regards,
Lokesh

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Re: [U-Boot] [PATCH v2 01/10] image: Fixes build warning with CONFIG_FIT_IMAGE_POST_PROCESS

[Lokesh Vutla]

On 4/7/2017 8:30 PM, Andrew F. Davis wrote:
> From: Madan Srinivas 
> 
> The function 'board_fit_image_post_process' is defined only when the
> config option CONFIG_FIT_IMAGE_POST_PROCESS is enabled. For secure
> systems that do not use SPL but do use FIT kernel images, only
> CONFIG_FIT_IMAGE_POST_PROCESS will be defined, which will result in an
> implicit declaration of function 'board_fit_image_post_process' warning
> while building u-boot. Fix this warning.
> 
> Signed-off-by: Madan Srinivas 
> Signed-off-by: Andrew F. Davis 
> Reviewed-by: Tom Rini 

Reviewed-by: Lokesh Vutla 

Thanks and regards,
Lokesh
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Re: [U-Boot] [PATCH v2 02/10] arm: mach-keystone: Implements FIT post-processing call for keystone SoCs

[Lokesh Vutla]

On 4/7/2017 8:30 PM, Andrew F. Davis wrote:
> From: Vitaly Andrianov 
> 
> This commit implements the board_fit_image_post_process() function for
> the keystone architecture. This function calls into the secure boot
> monitor for secure authentication/decryption of the image. All needed
> work is handled by the boot monitor and, depending on the keystone
> platform, the security functions may be offloaded to other secure
> processing elements in the SoC.
> 
> The boot monitor acts as the gateway to these secure functions and the
> boot monitor for secure devices is available as part of the SECDEV
> package for KS2. For more details refer doc/README.ti-secure
> 
> Signed-off-by: Vitaly Andrianov 
> Signed-off-by: Madan Srinivas 
> Signed-off-by: Andrew F. Davis 
> Reviewed-by: Tom Rini 

Reviewed-by: Lokesh Vutla 

Thanks and regards,
Lokesh

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Re: [U-Boot] [PATCH] mx6sabresd: README: Add eMMC boot configuration

[Fabio Estevam]

Hi Breno,

On Fri, Apr 7, 2017 at 4:22 PM, Breno Lima  wrote:
> Explain how to flash the eMMC and how to boot from it.
>
> Signed-off-by: Breno Lima 
> ---
>  board/freescale/mx6sabresd/README | 22 ++
>  1 file changed, 22 insertions(+)
>
> diff --git a/board/freescale/mx6sabresd/README 
> b/board/freescale/mx6sabresd/README
> index 5814b9d..875d4b2 100644
> --- a/board/freescale/mx6sabresd/README
> +++ b/board/freescale/mx6sabresd/README
> @@ -27,6 +27,28 @@ This will generate the image called u-boot.imx.
>
>  $ sudo dd if=u-boot.imx of=/dev/sdb bs=1K seek=1 && sync
>
> +- Flash the u-boot.imx binary into the eMMC:

I would put a extra section for booting from eMMC.

Something like:

Change:

1. Booting via Normal U-Boot

to

1. Booting from SD card via normal U-Boot


and then:

2. Booting from eMMC via normal U-Boot

The rest looks good.
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Re: [U-Boot] orangepi_pc2: Build error

[André Przywara]

On 07/04/17 06:10, Jagan Teki wrote:

Hi Jagan,

> Can you check this error on master?
> 
>   COPYspl/u-boot-spl.bin
>   MKSUNXI spl/sunxi-spl.bin
> ERROR: File too large!
> make[1]: *** [spl/sunxi-spl.bin] Error 1
> make: *** [spl/u-boot-spl] Error 2

Yeah, this is unfortunately a known issue with older compilers. I
believe GCC 5.x and 6.x are fine, but 4.9.x generates too large code to
fit in the 32KB.
Can you state your compiler version?
I believe both the distributions and Linaro should offer up-to-date
(cross-)compilers these days.

Cheers,
Andre.

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[U-Boot] [PATCH] spl: make image arg or fdt blob address reconfigurable

[Vikas Manocha]

At present fdt blob or argument address being passed to kernel is fixed at
compile time using macro CONFIG_SYS_SPL_ARGS_ADDR. FDT blob from
different media like nand, nor flash are copied to the address pointed
by the macro.
The problem is, it makes args/fdt blob compulsory to copy which is not required
in cases like for NOR Flash. This patch removes this limitation.

Signed-off-by: Vikas Manocha 
---
 arch/arm/lib/spl.c| 7 +++
 arch/microblaze/cpu/spl.c | 6 +++---
 arch/powerpc/lib/spl.c| 8 
 common/spl/spl.c  | 6 --
 common/spl/spl_nor.c  | 8 +---
 include/spl.h | 5 ++---
 6 files changed, 17 insertions(+), 23 deletions(-)

diff --git a/arch/arm/lib/spl.c b/arch/arm/lib/spl.c
index e606d47..8ff2c50 100644
--- a/arch/arm/lib/spl.c
+++ b/arch/arm/lib/spl.c
@@ -44,22 +44,21 @@ void __weak board_init_f(ulong dummy)
 /*
  * This function jumps to an image with argument. Normally an FDT or ATAGS
  * image.
- * arg: Pointer to paramter image in RAM
  */
 #ifdef CONFIG_SPL_OS_BOOT
-void __noreturn jump_to_image_linux(struct spl_image_info *spl_image, void 
*arg)
+void __noreturn jump_to_image_linux(struct spl_image_info *spl_image)
 {
unsigned long machid = 0x;
 #ifdef CONFIG_MACH_TYPE
machid = CONFIG_MACH_TYPE;
 #endif
 
-   debug("Entering kernel arg pointer: 0x%p\n", arg);
+   debug("Entering kernel arg pointer: 0x%p\n", spl_image->arg);
typedef void (*image_entry_arg_t)(int, int, void *)
__attribute__ ((noreturn));
image_entry_arg_t image_entry =
(image_entry_arg_t)(uintptr_t) spl_image->entry_point;
cleanup_before_linux();
-   image_entry(0, machid, arg);
+   image_entry(0, machid, spl_image->arg);
 }
 #endif
diff --git a/arch/microblaze/cpu/spl.c b/arch/microblaze/cpu/spl.c
index 8e6d926..3d57a5a 100644
--- a/arch/microblaze/cpu/spl.c
+++ b/arch/microblaze/cpu/spl.c
@@ -29,15 +29,15 @@ void spl_board_init(void)
 }
 
 #ifdef CONFIG_SPL_OS_BOOT
-void __noreturn jump_to_image_linux(struct spl_image_info *spl_image, void 
*arg)
+void __noreturn jump_to_image_linux(struct spl_image_info *spl_image)
 {
-   debug("Entering kernel arg pointer: 0x%p\n", arg);
+   debug("Entering kernel arg pointer: 0x%p\n", spl_image->arg);
typedef void (*image_entry_arg_t)(char *, ulong, ulong)
__attribute__ ((noreturn));
image_entry_arg_t image_entry =
(image_entry_arg_t)spl_image->entry_point;
 
-   image_entry(NULL, 0, (ulong)arg);
+   image_entry(NULL, 0, (ulong)spl_image->arg);
 }
 #endif /* CONFIG_SPL_OS_BOOT */
 
diff --git a/arch/powerpc/lib/spl.c b/arch/powerpc/lib/spl.c
index 080b978..b931970 100644
--- a/arch/powerpc/lib/spl.c
+++ b/arch/powerpc/lib/spl.c
@@ -14,18 +14,18 @@ DECLARE_GLOBAL_DATA_PTR;
 /*
  * This function jumps to an image with argument. Normally an FDT or ATAGS
  * image.
- * arg: Pointer to paramter image in RAM
  */
 #ifdef CONFIG_SPL_OS_BOOT
-void __noreturn jump_to_image_linux(struct spl_image_info *spl_image, void 
*arg)
+void __noreturn jump_to_image_linux(struct spl_image_info *spl_image)
 {
-   debug("Entering kernel arg pointer: 0x%p\n", arg);
+   debug("Entering kernel arg pointer: 0x%p\n", spl_image->arg);
typedef void (*image_entry_arg_t)(void *, ulong r4, ulong r5, ulong r6,
  ulong r7, ulong r8, ulong r9)
__attribute__ ((noreturn));
image_entry_arg_t image_entry =
(image_entry_arg_t)spl_image->entry_point;
 
-   image_entry(arg, 0, 0, EPAPR_MAGIC, CONFIG_SYS_BOOTMAPSZ, 0, 0);
+   image_entry(spl_image->arg, 0, 0, EPAPR_MAGIC, CONFIG_SYS_BOOTMAPSZ,
+   0, 0);
 }
 #endif /* CONFIG_SPL_OS_BOOT */
diff --git a/common/spl/spl.c b/common/spl/spl.c
index a3e73b8..50828e6 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -345,6 +345,9 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
 #endif
 
memset(_image, '\0', sizeof(spl_image));
+#ifdef CONFIG_SYS_SPL_ARGS_ADDR
+   spl_image.arg = (void *)CONFIG_SYS_SPL_ARGS_ADDR;
+#endif
board_boot_order(spl_boot_list);
 
if (boot_from_devices(_image, spl_boot_list,
@@ -361,8 +364,7 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
case IH_OS_LINUX:
debug("Jumping to Linux\n");
spl_board_prepare_for_linux();
-   jump_to_image_linux(_image,
-   (void *)CONFIG_SYS_SPL_ARGS_ADDR);
+   jump_to_image_linux(_image);
 #endif
default:
debug("Unsupported OS image.. Jumping nevertheless..\n");
diff --git a/common/spl/spl_nor.c b/common/spl/spl_nor.c
index d07ca84..1ef8ac8 100644
--- a/common/spl/spl_nor.c
+++ b/common/spl/spl_nor.c
@@ -39,13 +39,7 @@ static int spl_nor_load_image(struct spl_image_info 
*spl_image,
sizeof(struct 

Re: [U-Boot] [RFC] tiny-printf: Add support for %p format

[Tom Rini]

On Fri, Apr 07, 2017 at 11:42:56PM +0530, Vignesh R wrote:
> 
> 
> On 4/7/2017 8:40 PM, Tom Rini wrote:
> > On Fri, Apr 07, 2017 at 03:20:34PM +0530, Vignesh R wrote:
> > 
> >> Add support for %p, %pa[p], %pM, %pm and %pI4 formats to tiny-printf.
> >> %pM and %pI4 are widely used by SPL networking stack and is required if
> >> networking support is desired in SPL.
> >>
> >> Before this patch:
> >> $ size spl/u-boot-spl
> >>text   data bss dec hex filename
> >>   99325   4899  218584  322808   4ecf8 spl/u-boot-spl
> >>
> >> After this patch (with CONFIG_SPL_NET_SUPPORT):
> >> $ size spl/u-boot-spl
> >>text   data bss dec hex filename
> >>   99714   4899  218584  323197   4ee7d spl/u-boot-spl
> >>
> >> So, this patch adds ~390 bytes to code size.
> >>
> >> If CONFIG_SPL_NET_SUPPORT is not enabled then only %p, %pa, %pap are
> >> supported, this adds ~90 bytes to code size.
> > 
> > Why do we need %p/%pa/%pap?  I'm fine with adding %pM/%pm/%pI4 under
> > SPL_NET_SUPPORT as you've done.
> 
> Ok, I can drop support for %p/%pa/%pap. Its just that, I see debug()
> prints in SPL code that use them. If the agreement is not to worry them,
> I am fine with it.

debug prints, eh?  Guard the support under #ifdef DEBUG ?

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Re: [U-Boot] [PATCH 3/7] ti: wdt: omap: Disable watchdog timer before performing initialization

[Lukasz Majewski]

Hi Tom,

> On Sun, Feb 19, 2017 at 11:24:38PM +0100, Lukasz Majewski wrote:
> 
> > The OMAP WDT IP block requires to be stopped before any write to its
> > registers is performed.
> > 
> > This problem has been thoroughly described in Linux kernel:
> > 
> > "watchdog: omap: assert the counter being stopped before
> > reprogramming: SHA1: 530c11d432727c697629ad5f9d00ee8e2864d453
> > 
> > Signed-off-by: Lukasz Majewski 
> 
> Reviewed-by: Tom Rini 
> 

Could this patch be applied alone? Preparing reset of this patch set is
a bit more tricky (since includes verbose testing).


Best regards,

Lukasz Majewski

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[U-Boot] [PATCH] ARCv2: SLC: Make sure busy bit is set properly on SLC flushing

[Alexey Brodkin]

As reported in STAR 9001165532, an SLC control reg read (for checking
busy state) right after SLC invalidate command may incorrectly return
NOT busy causing software to NOT spin-wait while operation is underway.
(and for some reason this only happens if L1 cache is also disabled - as
required by IOC programming model)

Suggested workaround is to do an additional Control Reg read, which
ensures the 2nd read gets the right status.

Same fix made in Linux kernel:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=c70c473396cbdec1168a6eff60e13029c0916854

Signed-off-by: Alexey Brodkin 
---
 arch/arc/lib/cache.c | 8 +++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/arch/arc/lib/cache.c b/arch/arc/lib/cache.c
index b6ec83112cd8..f1436bf19992 100644
--- a/arch/arc/lib/cache.c
+++ b/arch/arc/lib/cache.c
@@ -59,10 +59,16 @@ static unsigned int __before_slc_op(const int op)
 
 static void __after_slc_op(const int op, unsigned int reg)
 {
-   if (op & OP_FLUSH)  /* flush / flush-n-inv both wait */
+   if (op & OP_FLUSH) {/* flush / flush-n-inv both wait */
+   /*
+* Make sure "busy" bit reports correct status,
+* see STAR 9001165532
+*/
+   read_aux_reg(ARC_AUX_SLC_CTRL);
while (read_aux_reg(ARC_AUX_SLC_CTRL) &
   DC_CTRL_FLUSH_STATUS)
;
+   }
 
/* Switch back to default Invalidate mode */
if (op == OP_INV)
-- 
2.7.4

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Re: [U-Boot] Low priority request for info about alternative to #ifdef

[James Chargin]

Did I make a mistake including "Low priority" in the subject?

If anyone remembers this discussion, I'd appreciate a pointer.

Thanks,
Jim

On 03/21/2017 07:08 AM, James Chargin wrote:

Hi

I've seen periodic discussion on the U-Boot mailing list of alternatives
to #ifdef. I need a bit more information about one specific alternative,
but in my searches of the source for 2017.03, I can't find examples that
might help me. Also, my memory of this is a dim so I'm not sure I'm
looking for the right thing.

Is there something that is similar to "#ifdef CONFIG_*" but looks more
like "if_defined(CONFIG_*)" and relies on compile/link time elimination
of unused code?

Thanks for your time.

Jim


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[U-Boot] [PATCH v4] spl: net: Add FIT image support over network boot

[Andrew F. Davis]

FIT support in the net boot case is much like the RAM boot case in that
we load our image to "load_addr" and pass a dummy read function into
"spl_load_simple_fit()". As the load address is no longer hard-coded to
the final execution address, legacy image loading will require load_addr
to be set correctly in the image header.

Signed-off-by: Andrew F. Davis 
---

Changes from v3:
 - Relocate legacy image according to its header

Changes from v2:
 - Rebased on latest upstream/master

Changes from v1:
 - move "spl_net_load_read" into #ifdef block as suggested by Vignesh

 common/spl/spl_net.c | 34 +++---
 1 file changed, 31 insertions(+), 3 deletions(-)

diff --git a/common/spl/spl_net.c b/common/spl/spl_net.c
index 0fba0172ea..85fe508b17 100644
--- a/common/spl/spl_net.c
+++ b/common/spl/spl_net.c
@@ -11,19 +11,29 @@
 #include 
 #include 
 #include 
+#include 
 
 DECLARE_GLOBAL_DATA_PTR;
 
 #if defined(CONFIG_SPL_ETH_SUPPORT) || defined(CONFIG_SPL_USBETH_SUPPORT)
+static ulong spl_net_load_read(struct spl_load_info *load, ulong sector,
+  ulong count, void *buf)
+{
+   debug("%s: sector %lx, count %lx, buf %lx\n",
+ __func__, sector, count, (ulong)buf);
+   memcpy(buf, (void *)(load_addr + sector), count);
+   return count;
+}
+
 static int spl_net_load_image(struct spl_image_info *spl_image,
  struct spl_boot_device *bootdev)
 {
+   struct image_header *header = (struct image_header *)load_addr;
int rv;
 
env_init();
env_relocate();
setenv("autoload", "yes");
-   load_addr = CONFIG_SYS_TEXT_BASE - sizeof(struct image_header);
rv = eth_initialize();
if (rv == 0) {
printf("No Ethernet devices found\n");
@@ -36,8 +46,26 @@ static int spl_net_load_image(struct spl_image_info 
*spl_image,
printf("Problem booting with BOOTP\n");
return rv;
}
-   return spl_parse_image_header(spl_image,
- (struct image_header *)load_addr);
+
+   if (IS_ENABLED(CONFIG_SPL_LOAD_FIT) &&
+   image_get_magic(header) == FDT_MAGIC) {
+   struct spl_load_info load;
+
+   debug("Found FIT\n");
+   load.bl_len = 1;
+   load.read = spl_net_load_read;
+   rv = spl_load_simple_fit(spl_image, , 0, header);
+   } else {
+   debug("Legacy image\n");
+
+   rv = spl_parse_image_header(spl_image, header);
+   if (rv)
+   return rv;
+
+   memcpy((void *)spl_image->load_addr, header, spl_image->size);
+   }
+
+   return rv;
 }
 #endif
 
-- 
2.11.0

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Re: [U-Boot] [PATCH v3] spl: net: Add FIT image support over network boot

[Andrew F. Davis]

On 04/07/2017 01:26 PM, Vignesh R wrote:
> 
> 
> On 4/7/2017 8:36 PM, Davis, Andrew wrote:
>> FIT support in the net boot case is much like the RAM boot case in that
>> we load our image to "load_addr" and pass a dummy read function into
>> "spl_load_simple_fit()". As the load address is no longer hard-coded to
>> the final execution address, RAW image loading will rely on "load_addr"
>> pointing to the execution address as they should have before.
>>
> 
> Sorry, but would you explain how network boot would work in case of non
> FIT image(same concern I had wrt v2)?
> 

Same as last time, the global 'load_addr' will need to be set correctly.
I guess we could also use the 'load_addr' provided by the legacy image
header then relocate the image. I'll add that for v4.

>> Signed-off-by: Andrew F. Davis 
>> ---
>>
>> Changes from v2:
>>  - Rebased on latest upstream/master
>>
>> Changes from v1:
>>  - move "spl_net_load_read" into #ifdef block as suggested by Vignesh
>>
>>  common/spl/spl_net.c | 30 +++---
>>  1 file changed, 27 insertions(+), 3 deletions(-)
>>
>> diff --git a/common/spl/spl_net.c b/common/spl/spl_net.c
>> index 0fba0172ea..3d1d05d833 100644
>> --- a/common/spl/spl_net.c
>> +++ b/common/spl/spl_net.c
>> @@ -11,19 +11,29 @@
>>  #include 
>>  #include 
>>  #include 
>> +#include 
>>  
>>  DECLARE_GLOBAL_DATA_PTR;
>>  
>>  #if defined(CONFIG_SPL_ETH_SUPPORT) || defined(CONFIG_SPL_USBETH_SUPPORT)
>> +static ulong spl_net_load_read(struct spl_load_info *load, ulong sector,
>> +   ulong count, void *buf)
>> +{
>> +debug("%s: sector %lx, count %lx, buf %lx\n",
>> +  __func__, sector, count, (ulong)buf);
>> +memcpy(buf, (void *)(load_addr + sector), count);
>> +return count;
>> +}
>> +
>>  static int spl_net_load_image(struct spl_image_info *spl_image,
>>struct spl_boot_device *bootdev)
>>  {
>> +struct image_header *header = (struct image_header *)load_addr;
>>  int rv;
>>  
>>  env_init();
>>  env_relocate();
>>  setenv("autoload", "yes");
>> -load_addr = CONFIG_SYS_TEXT_BASE - sizeof(struct image_header);
>>  rv = eth_initialize();
>>  if (rv == 0) {
>>  printf("No Ethernet devices found\n");
>> @@ -36,8 +46,22 @@ static int spl_net_load_image(struct spl_image_info 
>> *spl_image,
>>  printf("Problem booting with BOOTP\n");
>>  return rv;
>>  }
>> -return spl_parse_image_header(spl_image,
>> -  (struct image_header *)load_addr);
>> +
>> +if (IS_ENABLED(CONFIG_SPL_LOAD_FIT) &&
>> +image_get_magic(header) == FDT_MAGIC) {
>> +struct spl_load_info load;
>> +
>> +debug("Found FIT\n");
>> +load.bl_len = 1;
>> +load.read = spl_net_load_read;
>> +rv = spl_load_simple_fit(spl_image, , 0, header);
>> +} else {
>> +debug("Legacy image\n");
>> +
>> +rv = spl_parse_image_header(spl_image, header);
>> +}
>> +
>> +return rv;
>>  }
>>  #endif
>>  
>>
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[U-Boot] [PATCH] mx6sabresd: README: Add eMMC boot configuration

[Breno Lima]

Explain how to flash the eMMC and how to boot from it.

Signed-off-by: Breno Lima 
---
 board/freescale/mx6sabresd/README | 22 ++
 1 file changed, 22 insertions(+)

diff --git a/board/freescale/mx6sabresd/README 
b/board/freescale/mx6sabresd/README
index 5814b9d..875d4b2 100644
--- a/board/freescale/mx6sabresd/README
+++ b/board/freescale/mx6sabresd/README
@@ -27,6 +27,28 @@ This will generate the image called u-boot.imx.
 
 $ sudo dd if=u-boot.imx of=/dev/sdb bs=1K seek=1 && sync
 
+- Flash the u-boot.imx binary into the eMMC:
+
+Set SW6 to download mode: 1100
+
+Plug a usb cable to USB-OTG and load the u-boot image using the imx_usb_loader
+tool (https://github.com/boundarydevices/imx_usb_loader):
+
+$ sudo ./imx_usb u-boot.imx
+
+In U-boot change the eMMC partition config:
+
+=> mmc partconf 2 1 0 0
+
+Mount the eMMC in the host PC:
+
+=> ums 0 mmc 2
+
+Flash the u-boot.imx binary
+
+$ sudo dd if=u-boot.imx of=/dev/sdX bs=1K seek=1 && sync
+
+Set SW6 to eMMC 8-bit boot: 11010110
 
 2. Booting via SPL
 --
-- 
2.7.4

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Re: [U-Boot] [PATCH 0/2] Improve Raspberry Pi mmc writes.

[Alex Deymo]

2017-04-06 21:53 GMT-07:00 Jaehoon Chung :

> On 04/02/2017 03:58 PM, Alex Deymo wrote:
> > When experimenting with fastboot from U-Boot on the Raspberry Pi 3 we
> > found that the writes to the sdcard are much more slow than when
> > accessing it from the userspace. These two patches speed up the write
> > and allow us to reliably write the sdcard from U-Boot.
>
>
> I'm not sure you can see this email.
> If you can't receive this, I will resend with my gmail account.
>
I can, I'm on the list. If you cc me directly the chances of me seeing it
are much higher.


I want to know the situation after removing the BROKEN_R1B quirks.
>

How would I test that?
Basically trying to write 100s of MB to mmc on the rpi3 was failing very
often after applying the "Speed up mmc writes" patch. Without said patch
this was not a problem because the write were sooo slow that we would
never send two write commands too close to each other. Do you want me
re-test applying only "Speed up mmc writes." on top of master without the
second patch (Wait for SDHCI_INT_DATA_END when transferring)? Or just
re-test the mmc speed/reliability without neither of these patches?
deymo
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[U-Boot] [PATCH] Fix a bug with PL010s running at 19200 baud

[Alyssa Rosenzweig]

I don't have the hardware test this, but it is almost certainly a typo
in the code dating back to at least 2004.

Signed-off-by: Alyssa Rosenzweig 
---
 drivers/serial/serial_pl01x.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/serial/serial_pl01x.c b/drivers/serial/serial_pl01x.c
index a49134a95a..941b424a4c 100644
--- a/drivers/serial/serial_pl01x.c
+++ b/drivers/serial/serial_pl01x.c
@@ -117,7 +117,7 @@ static int pl01x_generic_setbrg(struct pl01x_regs *regs, 
enum pl01x_type type,
divisor = UART_PL010_BAUD_9600;
break;
case 19200:
-   divisor = UART_PL010_BAUD_9600;
+   divisor = UART_PL010_BAUD_19200;
break;
case 38400:
divisor = UART_PL010_BAUD_38400;
-- 
2.11.0

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Re: [U-Boot] [PATCH v3] spl: net: Add FIT image support over network boot

[Vignesh R]

On 4/7/2017 8:36 PM, Davis, Andrew wrote:
> FIT support in the net boot case is much like the RAM boot case in that
> we load our image to "load_addr" and pass a dummy read function into
> "spl_load_simple_fit()". As the load address is no longer hard-coded to
> the final execution address, RAW image loading will rely on "load_addr"
> pointing to the execution address as they should have before.
> 

Sorry, but would you explain how network boot would work in case of non
FIT image(same concern I had wrt v2)?

> Signed-off-by: Andrew F. Davis 
> ---
> 
> Changes from v2:
>  - Rebased on latest upstream/master
> 
> Changes from v1:
>  - move "spl_net_load_read" into #ifdef block as suggested by Vignesh
> 
>  common/spl/spl_net.c | 30 +++---
>  1 file changed, 27 insertions(+), 3 deletions(-)
> 
> diff --git a/common/spl/spl_net.c b/common/spl/spl_net.c
> index 0fba0172ea..3d1d05d833 100644
> --- a/common/spl/spl_net.c
> +++ b/common/spl/spl_net.c
> @@ -11,19 +11,29 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  
>  DECLARE_GLOBAL_DATA_PTR;
>  
>  #if defined(CONFIG_SPL_ETH_SUPPORT) || defined(CONFIG_SPL_USBETH_SUPPORT)
> +static ulong spl_net_load_read(struct spl_load_info *load, ulong sector,
> +ulong count, void *buf)
> +{
> + debug("%s: sector %lx, count %lx, buf %lx\n",
> +   __func__, sector, count, (ulong)buf);
> + memcpy(buf, (void *)(load_addr + sector), count);
> + return count;
> +}
> +
>  static int spl_net_load_image(struct spl_image_info *spl_image,
> struct spl_boot_device *bootdev)
>  {
> + struct image_header *header = (struct image_header *)load_addr;
>   int rv;
>  
>   env_init();
>   env_relocate();
>   setenv("autoload", "yes");
> - load_addr = CONFIG_SYS_TEXT_BASE - sizeof(struct image_header);
>   rv = eth_initialize();
>   if (rv == 0) {
>   printf("No Ethernet devices found\n");
> @@ -36,8 +46,22 @@ static int spl_net_load_image(struct spl_image_info 
> *spl_image,
>   printf("Problem booting with BOOTP\n");
>   return rv;
>   }
> - return spl_parse_image_header(spl_image,
> -   (struct image_header *)load_addr);
> +
> + if (IS_ENABLED(CONFIG_SPL_LOAD_FIT) &&
> + image_get_magic(header) == FDT_MAGIC) {
> + struct spl_load_info load;
> +
> + debug("Found FIT\n");
> + load.bl_len = 1;
> + load.read = spl_net_load_read;
> + rv = spl_load_simple_fit(spl_image, , 0, header);
> + } else {
> + debug("Legacy image\n");
> +
> + rv = spl_parse_image_header(spl_image, header);
> + }
> +
> + return rv;
>  }
>  #endif
>  
> 
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Re: [U-Boot] [RFC] tiny-printf: Add support for %p format

[Vignesh R]

On 4/7/2017 8:40 PM, Tom Rini wrote:
> On Fri, Apr 07, 2017 at 03:20:34PM +0530, Vignesh R wrote:
> 
>> Add support for %p, %pa[p], %pM, %pm and %pI4 formats to tiny-printf.
>> %pM and %pI4 are widely used by SPL networking stack and is required if
>> networking support is desired in SPL.
>>
>> Before this patch:
>> $ size spl/u-boot-spl
>>text data bss dec hex filename
>>   99325 4899  218584  322808   4ecf8 spl/u-boot-spl
>>
>> After this patch (with CONFIG_SPL_NET_SUPPORT):
>> $ size spl/u-boot-spl
>>text data bss dec hex filename
>>   99714 4899  218584  323197   4ee7d spl/u-boot-spl
>>
>> So, this patch adds ~390 bytes to code size.
>>
>> If CONFIG_SPL_NET_SUPPORT is not enabled then only %p, %pa, %pap are
>> supported, this adds ~90 bytes to code size.
> 
> Why do we need %p/%pa/%pap?  I'm fine with adding %pM/%pm/%pI4 under
> SPL_NET_SUPPORT as you've done.
> 

Ok, I can drop support for %p/%pa/%pap. Its just that, I see debug()
prints in SPL code that use them. If the agreement is not to worry them,
I am fine with it.
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[U-Boot] Pull request: u-boot-sunxi/master

[Jagan Teki]

Hi Tom,

Please take this PR.

thanks!
Jagan.

The following changes since commit d53ecad92f06d2e38a5cbc13af7473867c7fa277:

  Merge branch 'master' of git://git.denx.de/u-boot-sunxi (2017-04-06 20:40:24 
-0400)

are available in the git repository at:


  git://git.denx.de/u-boot-sunxi.git master

for you to fetch changes up to f7d4d9e52cdcff2a8fcdc80b567a41f48b61951c:

  sunxi: Add defconfig for Allwinner A23 EVB (2017-04-07 11:23:46 +0530)


Boris Brezillon (3):
  mtd: ubi: Select RBTREE option from MTD_UBI Kconfig entry
  cmd: Expose a Kconfig option to enable UBIFS commands
  cmd: nand: Expose optional suboptions in Kconfig

Chen-Yu Tsai (2):
  ARM: dts: sun9i: Add mmc1 pinmux setting
  sunxi: Add boards/sunxi and arch/arm/mach-sunxi to sunxi MAINTAINERS entry

Florent Jacquet (1):
  sunxi: Add defconfig for Allwinner A23 EVB

Hans de Goede (1):
  sunxi: Enable UBI and NAND support

Jelle van der Waa (1):
  sunxi: add NanoPi NEO Air defconfig

Maxime Ripard (15):
  nand: sunxi: Fix modulo by zero error
  bch: Allow to build for the host
  tools: sunxi: Add spl image builder
  common: Move environment choice to Kconfig
  cmd: Add Kconfig option for CMD_MTDPARTS and related options
  mtd: sunxi: Select the U-Boot location config option
  mtd: sunxi: Change U-Boot offset
  sunxi: Add the default mtdids and mtdparts to our env
  nand: sunxi: Add options for the SPL NAND configuration
  scripts: sunxi: Build an raw SPL image
  sunxi: Sync GR8 DTS and AXP209 with the kernel
  sunxi: Add support for the CHIP Pro
  cmd: ubifs: Add a dependency on CMD_UBI
  cmd: nand: Make the NAND options default to NAND_SUNXI
  sunxi: Add default environment size

Philipp Tomsich (1):
  sun8i_emac: configure PHY reset GPIO via DM

Rask Ingemann Lambertsen (1):
  arm: sunxi: Add Sunchip CX-A99 initial support

 MAINTAINERS  |3 +
 Makefile |3 +
 arch/arm/dts/Makefile|7 +-
 arch/arm/dts/axp209.dtsi |6 +
 arch/arm/dts/sun5i-gr8-chip-pro.dts  |  266 +++
 arch/arm/dts/sun5i-gr8.dtsi  | 1132 ++
 arch/arm/dts/sun8i-h3-nanopi-neo-air.dts |   97 +++
 arch/arm/dts/sun9i-a80-cx-a99.dts|  380 ++
 arch/arm/dts/sun9i-a80.dtsi  |8 +
 board/sunxi/MAINTAINERS  |6 +
 board/sunxi/README.nand  |   54 ++
 cmd/Kconfig  |   51 ++
 cmd/mtdparts.c   |8 +
 common/Kconfig   |   69 ++
 configs/CHIP_pro_defconfig   |   33 +
 configs/Sunchip_CX-A99_defconfig |   22 +
 configs/nanopi_neo_air_defconfig |   17 +
 configs/sun8i_a23_evb_defconfig  |   19 +
 drivers/mtd/nand/Kconfig |   19 +-
 drivers/mtd/nand/sunxi_nand_spl.c|7 +-
 drivers/mtd/ubi/Kconfig  |1 +
 drivers/net/sun8i_emac.c |   86 ++-
 include/configs/sunxi-common.h   |   35 +-
 include/environment.h|2 +
 lib/Kconfig  |5 +
 lib/bch.c|   48 ++
 scripts/Makefile.spl |   15 +
 tools/.gitignore |1 +
 tools/Makefile   |2 +
 tools/sunxi-spl-image-builder.c  |  484 +
 30 files changed, 2863 insertions(+), 23 deletions(-)
 create mode 100644 arch/arm/dts/sun5i-gr8-chip-pro.dts
 create mode 100644 arch/arm/dts/sun5i-gr8.dtsi
 create mode 100644 arch/arm/dts/sun8i-h3-nanopi-neo-air.dts
 create mode 100644 arch/arm/dts/sun9i-a80-cx-a99.dts
 create mode 100644 board/sunxi/README.nand
 create mode 100644 configs/CHIP_pro_defconfig
 create mode 100644 configs/Sunchip_CX-A99_defconfig
 create mode 100644 configs/nanopi_neo_air_defconfig
 create mode 100644 configs/sun8i_a23_evb_defconfig
 create mode 100644 tools/sunxi-spl-image-builder.c
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Re: [U-Boot] [U-Boot, 1/3] cmd: cramfs: use map_sysmem for sandbox support

[Tom Rini]

On Wed, Mar 22, 2017 at 04:02:04PM -0400, Tyler Hall wrote:

> As with most other commands, this needs to factor in the sysmem offset
> in the sandbox or it will try to dereference the simulated physical
> address directly.
> 
> Signed-off-by: Tyler Hall 

This series introduces a few problems such as kmopti2 not building.
Please use travis-ci to get a most-of-the-world build done prior to
resubmission, thanks!

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Re: [U-Boot] [U-Boot, 3/7] mtd: nand: Consolidate nand spl loaders implementation

[Tom Rini]

On Sat, Apr 01, 2017 at 05:16:37PM +0200, Ladislav Michl wrote:

> nand_spl_load_image implementation was copied over into three
> different drivers and now with nand_spl_read_block used for
> ubispl situation gets even worse. For now use least intrusive
> solution and #include the same implementation to nand drivers.
> 
> Signed-off-by: Ladislav Michl 
> Tested-by: Pau Pajuelo 
> ---
>  drivers/mtd/nand/am335x_spl_bch.c   |  49 +
>  drivers/mtd/nand/atmel_nand.c   |  30 +-
>  drivers/mtd/nand/nand_spl_loaders.c | 106 
> 
>  drivers/mtd/nand/nand_spl_simple.c  |  98 +
>  4 files changed, 112 insertions(+), 171 deletions(-)

This breaks a bunch of boards such as pxm2 at least.  Please give the
whole series a build on travis-ci before re-submitting, thanks!

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[U-Boot] [PATCH v2] ARM64: rockchip: split RK3399-Q7 board off the RK3399-EVB board

[Philipp Tomsich]

From: Klaus Goger 

The RK3399-Q7 SoM is a Qseven-compatible (70mm x 70mm, MXM-230
connector) system-on-module from Theobroma Systems, featuring the
Rockchip RK3399.

It provides the following feature set:
 * up to 4GB DDR3
 * on-module SPI-NOR flash
 * on-module eMMC (with 8-bit interace)
 * SD card (on a baseboad) via edge connector
 * Gigabit Ethernet w/ on-module Micrel KSZ9031 GbE PHY
 * HDMI/eDP/MIPI displays
 * 2x MIPI-CSI
 * USB
   - 1x USB 3.0 dual-role (direct connection)
   - 2x USB 3.0 host + 1x USB 2.0 (on-module USB 3.0 hub)
 * on-module STM32 Cortex-M0 companion controller, implementing:
   - low-power RTC functionality (ISL1208 emulation)
   - fan controller (AMC6821 emulation)
   - USB<->CAN bridge controller

Note that we use a multi-payload FIT image for booting and have
Cortex-M0 payload in a separate subimage: we thus rely on the FIT
image loader to put it into the SRAM region that ATF expects it in.

Signed-off-by: Klaus Goger 
Signed-off-by: Philipp Tomsich 
---

Changes in v2:
- fixes dram_init_banksize() to have the correct return type and to
  return 0 (success) unconditionally

 arch/arm/mach-rockchip/rk3399/Kconfig  | 19 ++
 board/theobroma-systems/puma_rk3399/Kconfig| 15 +
 board/theobroma-systems/puma_rk3399/MAINTAINERS| 10 +++
 board/theobroma-systems/puma_rk3399/Makefile   |  7 +++
 board/theobroma-systems/puma_rk3399/README | 73 ++
 .../theobroma-systems/puma_rk3399/fit_spl_atf.its  | 57 +
 board/theobroma-systems/puma_rk3399/puma-rk3399.c  | 71 +
 configs/puma-rk3399_defconfig  |  3 +-
 include/configs/puma_rk3399.h  | 26 
 9 files changed, 280 insertions(+), 1 deletion(-)
 create mode 100644 board/theobroma-systems/puma_rk3399/Kconfig
 create mode 100644 board/theobroma-systems/puma_rk3399/MAINTAINERS
 create mode 100644 board/theobroma-systems/puma_rk3399/Makefile
 create mode 100644 board/theobroma-systems/puma_rk3399/README
 create mode 100644 board/theobroma-systems/puma_rk3399/fit_spl_atf.its
 create mode 100644 board/theobroma-systems/puma_rk3399/puma-rk3399.c
 create mode 100644 include/configs/puma_rk3399.h

diff --git a/arch/arm/mach-rockchip/rk3399/Kconfig 
b/arch/arm/mach-rockchip/rk3399/Kconfig
index 83bd04a..415466a 100644
--- a/arch/arm/mach-rockchip/rk3399/Kconfig
+++ b/arch/arm/mach-rockchip/rk3399/Kconfig
@@ -10,6 +10,24 @@ config TARGET_EVB_RK3399
  with full function and phisical connectors support like type-C ports,
  usb2.0 host ports, LVDS, JTAG, MAC, SDcard, HDMI, USB-2-serial...
 
+config TARGET_PUMA_RK3399
+   bool "Theobroma Systems RK3399-Q7 (Puma)"
+   help
+ The RK3399-Q7 (Puma) is a system-on-module (designed and
+ marketed by Theobroma Systems) featuring the Rockchip RK3399
+ in a Qseven-compatible form-factor (running of a single 5V
+ supply and exposing its external interfaces on a MXM-230
+ connector).
+
+ Key features of the RK3399-Q7 include:
+  * on-module USB 3.0 hub (2x USB 3.0 host + 1x USB 2.0 host)
+  * USB 3.0 dual-role
+  * on-module Micrel KSZ9031 GbE PHY
+  * on-module eMMC (up to 256GB configurations available)
+  * on-module DDR3 (1GB, 2GB and 4GB configurations available)
+  * HDMI, eDP, MIPI-DSI, MIPI-DSI/CSI and MIPI-CSI
+  * SPI, I2C, I2S, UART, GPIO, ...
+
 endchoice
 
 config SYS_SOC
@@ -19,5 +37,6 @@ config SYS_MALLOC_F_LEN
default 0x0800
 
 source "board/rockchip/evb_rk3399/Kconfig"
+source "board/theobroma-systems/puma_rk3399/Kconfig"
 
 endif
diff --git a/board/theobroma-systems/puma_rk3399/Kconfig 
b/board/theobroma-systems/puma_rk3399/Kconfig
new file mode 100644
index 000..a645590
--- /dev/null
+++ b/board/theobroma-systems/puma_rk3399/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_PUMA_RK3399
+
+config SYS_BOARD
+   default "puma_rk3399"
+
+config SYS_VENDOR
+   default "theobroma-systems"
+
+config SYS_CONFIG_NAME
+   default "puma_rk3399"
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+   def_bool y
+
+endif
diff --git a/board/theobroma-systems/puma_rk3399/MAINTAINERS 
b/board/theobroma-systems/puma_rk3399/MAINTAINERS
new file mode 100644
index 000..ccec09c
--- /dev/null
+++ b/board/theobroma-systems/puma_rk3399/MAINTAINERS
@@ -0,0 +1,10 @@
+PUMA-RK3399
+M: Philipp Tomsich 
+M: Klaus Goger 
+S: Maintained
+F: board/theobroma-systems/puma_rk3399
+F: include/configs/puma_rk3399.h
+F: arch/arm/dts/rk3399-puma.dts
+F: configs/puma-rk3399_defconfig
+W: https://www.theobroma-systems.com/rk3399-q7/tech-specs
+T: git git://git.theobroma-systems.com/puma-u-boot.git
diff --git 

[U-Boot] [PATCH] dts: rk3399-puma: make the DTS dual-licensed

[Philipp Tomsich]

The RK3399-Q7 (Puma) DTS should (of course) be dual-licensed.
This updates the licensing info in the rk3399-puma.dts.

Signed-off-by: Philipp Tomsich 

---

 arch/arm/dts/rk3399-puma.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/dts/rk3399-puma.dts b/arch/arm/dts/rk3399-puma.dts
index e7f1088..301cc16 100644
--- a/arch/arm/dts/rk3399-puma.dts
+++ b/arch/arm/dts/rk3399-puma.dts
@@ -1,7 +1,7 @@
 /*
  * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
  *
- * SPDX-License-Identifier: GPL-2.0+
+ * SPDX-License-Identifier: GPL-2.0+   X11
  */
 
 /dts-v1/;
-- 
1.9.1

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Re: [U-Boot] [PATCH 8/8] dm: led: Add a new 'led' command

[Tom Rini]

On Fri, Mar 31, 2017 at 11:55:05AM -0600, Simon Glass wrote:

> When driver model is used for LEDs, provide a command to allow LED access.
> 
> Signed-off-by: Simon Glass 
[snip]
> +static const char *const state_label[] = {
> + [LEDST_OFF] = "off",
> + [LEDST_ON]  = "on",
> + [LEDST_TOGGLE]  = "toggle",
> + [LEDST_BLINK]   = "blink",

If I recall some tinkering right, "most" LEDs we have available in
U-Boot don't support blinking directly but rather get blinked in a real
OS with timers to toggle them.  So can we make blink optional so that
only when we'd be using it do we get the size increase?  Thanks!

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Re: [U-Boot] [PATCH v2] Add support for Microchip LAN78xx

[Marek Vasut]

On 04/07/2017 05:43 PM, yuiko.osh...@microchip.com wrote:
> From: Yuiko Oshino 
>> -Original Message-
>> From: Marek Vasut [mailto:ma...@denx.de]
>> Sent: Monday, March 27, 2017 9:30 AM
>> To: Yuiko Oshino - C18177; u-boot@lists.denx.de
>> Subject: Re: [PATCH v2] Add support for Microchip LAN78xx
>>
>> On 03/27/2017 01:59 PM, yuiko.osh...@microchip.com wrote:
>>> From: Yuiko Oshino 
 -Original Message-
 From: Marek Vasut [mailto:ma...@denx.de]
 Sent: Friday, March 24, 2017 2:29 PM
 To: Yuiko Oshino - C18177; u-boot@lists.denx.de
 Subject: Re: [PATCH v2] Add support for Microchip LAN78xx

 On 03/24/2017 07:25 PM, yuiko.osh...@microchip.com wrote:
> From: Yuiko Oshino 
>> -Original Message-
>> From: Marek Vasut [mailto:ma...@denx.de]
>> Sent: Friday, March 10, 2017 2:19 PM
>> To: Yuiko Oshino - C18177; u-boot@lists.denx.de
>> Subject: Re: [PATCH v2] Add support for Microchip LAN78xx
>>
>> On 03/10/2017 07:38 PM, yuiko.osh...@microchip.com wrote:
>>> From: Yuiko Oshino 
>>>
>>> Add support for Microchip LAN7800 and 7850, USB to 10/100/1000
>>> Ethernet Controllers
>>>
>>> Signed-off-by: Yuiko Oshino 
>>> Cc: Marek Vasut 
>>> ---
>>> Changes for v2:
>>>- lan78xx.c header comment cleanup
>>>
>
> [...]
>
>>
>> Why does a lot of this stuff look like the SMSC95xx driver ?
>> Do we even need a separate driver or can the SMSC95xx driver be
>> updated to support the LAN78xx ?
>>
>
> Marek,
> Thank you so much for your review.
> The LAN78xx's register addresses and bit definitions are not
> compatible to
 our old part LAN95xx (==SMSC95xx).
> The new devices LAN78xx and LAN75xx device have similarities. I plan
> to
 support these two devices in this driver.
> I will take care of all your comments and will submit a new PATCH
> with a file
 name change to lan7x.c.
>

 Is the rename really mandatory ?

>>> Yes, if we are going to make one file that supports both LAN78xx and
>> LAN75xx, it's very important for us to make the driver file name to support
>> both devices.
>>
>> The filename has nothing to do with which chips are supported though ?
>>
 Then again, I looked into Linux and that one has two separate drivers .
 So I wonder if it's really a good idea. Maybe we can share some
 common code and have the rest separate ?
>>>
>>> Marek,
>>> 1. we can submit LAN78xx and LA75xx drivers separately like in Linux. We do
>> prefer this option.
>>> 2. we can submit one LAN7x.c that supports both LAN78xx and LAN75xx in
>> one file.
>>> Could you pick one?
>>
>> Can we have option 3 -- pull common code into some file and make both
>> drivers use the common code ?
> 
> Hi Marek,

Hi Yuiko,

> Sure, we will do the option 3 with lan75xx.c, lan78xx.c, lan7xc, and lan7x.h 
> as you like.

Well don't you think this makes sense from the code reuse perspective ?

> Should I keep this thread and make [PATCH v3] Add support for Microchip 
> LAN78xx to submit?
> Even though the new patch will also include LAN75xx as well?

That's fine

> Or new thread and include the LAN75xx in the title?

New thread please. I think it'll be more patches and there'll be some
refactoring first anyway.

> Please let me know.
> 
> Thank you again!

Thanks for keeping up the good work !

-- 
Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH v4 00/16] GPT over MTD

[Tom Rini]

On Wed, Mar 15, 2017 at 03:11:31PM +0100, Patrick Delaunay wrote:

> 
> I have a request to support GPT over MTD to have the MTD informations
> without U-Boot environment(CONFIG_ENV_IS_NOWHERE is a other requirement
> of my project to manage several board configuration with
> the same defconfig; boot from NAND or NOR or SDCARD).
> 
> The current idea is to use the GPT header format to save the partitioning
> information directly in flash device (NOR or NAND), then the U-Boot MTD
> variables are rebuild from these GPT partitions and can be used by DISTRO
> command to search bootable binary.
> 
> This information are directly used by BootRom to locate and load
> the first bootstage.
> 
> The added code is under a new CONFIG : CONFIG_EFI_PARTITION_MTD
> and in the new file "disk/part_efi_mtd.c"
> 
> For implementation details, see doc/README.gpt.mtd
> 
> TODO: full support for modified command (if needed)
>   today I limit the support for the command expected
>   used by DISTRO macro:
>   + gpt write
>   + part list

... what I said just now to v3 applies here really, sorry for the
confusion.

-- 
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Re: [U-Boot] [RFC PATCH v3 00/16] GPT over MTD

[Tom Rini]

On Mon, Feb 06, 2017 at 10:06:40AM +0100, Patrick Delaunay wrote:

> 
> I have a request to support GPT over MTD to be able to have dynamic
> MTD informations without U-Boot environment(CONFIG_ENV_IS_NOWHERE
> is a other requirement of my project).
> 
> The idea is to use the GPT header to save partitioning information directly
> in flash device (NOR or NAND), then the MTD variables are rebuild from
> these GPT partitions and can be used by DISTRO to search bootable binary.
> 
> I make a first prototyping for this request but I want ask you if this
> feature is acceptable for U-Boot and if this patches, after some update
> and cleanups, would be merged in U-Boot mainline.
> Do you see already some blocking points ?
> 
> - added code is under a new CONFIG : CONFIG_EFI_PARTITION_MTD
> - for implementation details, see doc/README.gpt.mtd
> 
> TODO:
> - full support for modified command
>   today I limit the support for the command used by DISTRO macro:
>   + gpt write
>   + part list
> - DISTRO macro update for automatic boot on GPT bootable partition
>   found in MTD devices

This also adds a ton of warnings in odd places, please fix that before
removing the RFC tag (and tag the whole series RFC next time too
please), thanks!

-- 
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Re: [U-Boot] [PATCH 2/3] fsl-ppa: Kconfig: Support to load PPA hdr from eMMC/SD and NAND Flash

[York Sun]

On 04/07/2017 04:42 AM, Sumit Garg wrote:

Add support to load PPA hdr from eMMC/SD and NAND Flash in Kconfig

Signed-off-by: Sumit Garg 
Signed-off-by: Udit Agarwal 
Tested-by: Vinitha Pillai 
---
 arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 10 ++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig 
b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index 9fb76f0..4c9b6ce 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -179,12 +179,22 @@ config SYS_LS_PPA_ESBC_ADDR
default 0x4074 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS1046A
default 0x4048 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS1012A
default 0x580c4 if SYS_LS_PPA_FW_IN_XIP && FSL_LSCH3
+   default 0x70 if SYS_LS_PPA_FW_IN_MMC
+   default 0x70 if SYS_LS_PPA_FW_IN_NAND
help
  If the PPA header firmware locate at XIP flash, such as NOR or
  QSPI flash, this address is a directly memory-mapped.
  If it is in a serial accessed flash, such as NAND and SD
  card, it is a byte offset.

+config LS_PPA_ESBC_HDR_SIZE
+   hex "Length of PPA ESBC header"
+   depends on FSL_LS_PPA && CHAIN_OF_TRUST && !SYS_LS_PPA_FW_IN_XIP
+   default 0x2000
+   help
+ Length (in bytes) of PPA ESBC header to be copied from MMC/SD or
+ NAND to memory to validate PPA image.
+
 endmenu



The order of patches seems wrong. You add two Kconfig options here but 
you use them in your patch #1.


York

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Re: [U-Boot] lib: div64: sync with Linux

[Tom Rini]

On Tue, Mar 28, 2017 at 05:05:09PM +0800, Peng Fan wrote:

> Sync with Linux commit ad0376eb1483b ("Merge tag 'edac_for_4.11_2'").
> 
> Signed-off-by: Peng Fan 
> Cc: Tom Rini 

   aarch64:  +   uniphier_v8   
+(uniphier_v8) cmd/built-in.o: In function `lldiv':
+(uniphier_v8) include/div64.h:45: undefined reference to
   `__div64_32'
+(uniphier_v8) drivers/mmc/built-in.o: In function `lldiv':
+(uniphier_v8) lib/built-in.o: In function `lldiv':
+(uniphier_v8) lib/built-in.o:include/div64.h:45: more undefined
   references to `__div64_32' follow
+(uniphier_v8) make[1]: *** [u-boot] Error 139
+(uniphier_v8) make: *** [sub-make] Error 2

-- 
Tom


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Re: [U-Boot] [U-Boot,v2] pci: Add a command to show PCI regions

[Tom Rini]

On Sun, Apr 02, 2017 at 12:27:16PM -0600, Simon Glass wrote:

> Add 'pci regions' which lists the I/O and memory regions accessible from
> the PCI controller.
> 
> Signed-off-by: Simon Glass 
> ---
> 
> Changes in v2:
> - Drop duplicate PCI_REGION_IO line
> 
>  cmd/pci.c | 48 ++--
>  1 file changed, 46 insertions(+), 2 deletions(-)

w+(T1024RDB_SPIFLASH) ../cmd/pci.c:619:13: warning: ‘pci_show_regions’
defined but not used [-Wunused-function]

Along with many other powerpc platforms.

-- 
Tom


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Re: [U-Boot] [U-Boot,v2] Add support for Microchip LAN78xx

[Yuiko.Oshino]

From: Yuiko Oshino 
>-Original Message-
>From: Tom Rini [mailto:tr...@konsulko.com]
>Sent: Tuesday, April 04, 2017 10:46 AM
>To: Yuiko Oshino - C18177
>Cc: u-boot@lists.denx.de; ma...@denx.de
>Subject: Re: [U-Boot,v2] Add support for Microchip LAN78xx
>
>On Fri, Mar 24, 2017 at 06:30:46PM +, yuiko.osh...@microchip.com
>wrote:
>> From: Yuiko Oshino 
>> >-Original Message-
>> >From: Tom Rini [mailto:tr...@konsulko.com]
>> >Sent: Thursday, March 16, 2017 5:12 PM
>> >To: Yuiko Oshino - C18177
>> >Cc: u-boot@lists.denx.de; ma...@denx.de
>> >Subject: Re: [U-Boot,v2] Add support for Microchip LAN78xx
>> >
>> >On Fri, Mar 10, 2017 at 06:38:10PM +, yuiko.osh...@microchip.com
>> >wrote:
>> >
>> >> From: Yuiko Oshino 
>> >>
>> >> Add support for Microchip LAN7800 and 7850, USB to 10/100/1000
>> >> Ethernet
>> >Controllers
>> >>
>> >> Signed-off-by: Yuiko Oshino 
>> >> Cc: Marek Vasut 
>> >> ---
>> >> Changes for v2:
>> >>- lan78xx.c header comment cleanup
>> >>
>> >>  drivers/usb/eth/Makefile |1 +
>> >>  drivers/usb/eth/lan78xx.c| 1319
>> >++
>> >>  drivers/usb/eth/usb_ether.c  |7 +
>> >>  include/usb_ether.h  |6 +
>> >>  scripts/config_whitelist.txt |1 +
>> >
>> >NAK.  You don't add to the whitelist, you start adding to Kconfig.
>> >Thanks!
>> >
>> >--
>> >Tom
>>
>> Hi Tom,
>> There is no Kconfig in the drivers/usb/eth. Should I add a new Kconfig file 
>> in
>there?
>> Please advise.
>> Thank you in advance.
>
>Sorry for the late reply, yes, please add a new Kconfig entry (and include it
>from somewhere reasonable).
>
>--
>Tom

Thank you for your reply, Tom.
Will do that.

Yuiko
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Re: [U-Boot] [PATCH v2] Add support for Microchip LAN78xx

[Yuiko.Oshino]

From: Yuiko Oshino 
>-Original Message-
>From: Marek Vasut [mailto:ma...@denx.de]
>Sent: Monday, March 27, 2017 9:30 AM
>To: Yuiko Oshino - C18177; u-boot@lists.denx.de
>Subject: Re: [PATCH v2] Add support for Microchip LAN78xx
>
>On 03/27/2017 01:59 PM, yuiko.osh...@microchip.com wrote:
>> From: Yuiko Oshino 
>>> -Original Message-
>>> From: Marek Vasut [mailto:ma...@denx.de]
>>> Sent: Friday, March 24, 2017 2:29 PM
>>> To: Yuiko Oshino - C18177; u-boot@lists.denx.de
>>> Subject: Re: [PATCH v2] Add support for Microchip LAN78xx
>>>
>>> On 03/24/2017 07:25 PM, yuiko.osh...@microchip.com wrote:
 From: Yuiko Oshino 
> -Original Message-
> From: Marek Vasut [mailto:ma...@denx.de]
> Sent: Friday, March 10, 2017 2:19 PM
> To: Yuiko Oshino - C18177; u-boot@lists.denx.de
> Subject: Re: [PATCH v2] Add support for Microchip LAN78xx
>
> On 03/10/2017 07:38 PM, yuiko.osh...@microchip.com wrote:
>> From: Yuiko Oshino 
>>
>> Add support for Microchip LAN7800 and 7850, USB to 10/100/1000
>> Ethernet Controllers
>>
>> Signed-off-by: Yuiko Oshino 
>> Cc: Marek Vasut 
>> ---
>> Changes for v2:
>>- lan78xx.c header comment cleanup
>>

 [...]

>
> Why does a lot of this stuff look like the SMSC95xx driver ?
> Do we even need a separate driver or can the SMSC95xx driver be
> updated to support the LAN78xx ?
>

 Marek,
 Thank you so much for your review.
 The LAN78xx's register addresses and bit definitions are not
 compatible to
>>> our old part LAN95xx (==SMSC95xx).
 The new devices LAN78xx and LAN75xx device have similarities. I plan
 to
>>> support these two devices in this driver.
 I will take care of all your comments and will submit a new PATCH
 with a file
>>> name change to lan7x.c.

>>>
>>> Is the rename really mandatory ?
>>>
>> Yes, if we are going to make one file that supports both LAN78xx and
>LAN75xx, it's very important for us to make the driver file name to support
>both devices.
>
>The filename has nothing to do with which chips are supported though ?
>
>>> Then again, I looked into Linux and that one has two separate drivers .
>>> So I wonder if it's really a good idea. Maybe we can share some
>>> common code and have the rest separate ?
>>
>> Marek,
>> 1. we can submit LAN78xx and LA75xx drivers separately like in Linux. We do
>prefer this option.
>> 2. we can submit one LAN7x.c that supports both LAN78xx and LAN75xx in
>one file.
>> Could you pick one?
>
>Can we have option 3 -- pull common code into some file and make both
>drivers use the common code ?

Hi Marek,
Sure, we will do the option 3 with lan75xx.c, lan78xx.c, lan7xc, and lan7x.h as 
you like.

Should I keep this thread and make [PATCH v3] Add support for Microchip LAN78xx 
to submit?
Even though the new patch will also include LAN75xx as well?
Or new thread and include the LAN75xx in the title?
Please let me know.

Thank you again!
>
>> Thank you.
>> Yuiko
>>
>>>
>>> --
>>> Best regards,
>>> Marek Vasut
>
>
>--
>Best regards,
>Marek Vasut

Best regards,
Yuiko Oshino
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[U-Boot] [PATCH v4] imx: i.mx6q: add the initial support for LogicPD i.MX6Q SOM

[Adam Ford]

Logic PD has an i.MX6Q system on module (SOM) with a development kit. The
SOM has a built-in microSD socket, DDR and NAND flash.  The development kit
has an SMSC Ethernet PHY, serial debug port and a variety of peripherals.
This have been verified to boot the i.MX6Q version over either SD
on the development kit or NAND built into the SOM.  Items in the dtsi file
are specific to the SOM itself.  Items in the dts file are in the baseboard.
Future versions of the SOM will come out supporting the same basebord and
potentially future base boards will come out supporting the same SOM.

Signed-off-by: Adam Ford 
---
Changes in V4:
  - Eliminate DM_THERMAL
  - Fix typo README
  - Elminate more dead/unnecessary code
  - Re-order device tree file contents
  - Add I2C_EEPROM
  - Remove device tree items U-Boot cannot support
  - Fix 80 character warning

Changes in V3:
  - Add OF_CONTROL and device tree
  - Switch to DM_I2C
  - Switch to DM_ETH
  - Switch to DM_MMC
  - Switch to DM_PMIC
  - Switch to DM_REGULATOR
  - Switch to DM_GPIO
  - Fix Ethernet reset to play nicely with DM_GPIO and DM_ETH
  - Remove more unnecessary code with DM enabled.

Changes in V2:
  - Alphabetize the modified Kconfig file
  - Clean up README file.
  - Elminate fdt_high and initrd_high and add bootm_size
  - Changed MTDPARTS_DEFAULT to increase the kernel size to 16MB
  - Cleaned up the mx6q_2x_MT41K512M16HA.cfg to include headers,
replace hard-coded addresses with human-readable ones, and
remove dead code
  - Updated mx6q_2x_MT41K512M16HA.cfg to use BOOT_OFFSET since SD
and NAND have the same offset
  - Removed 'ifdef' references that were always true.
  - Removed CPU references that didn't exist.
  - And made local variables static
  - Add reference to worked used to derrive this code

diff --git a/arch/arm/cpu/armv7/mx6/Kconfig b/arch/arm/cpu/armv7/mx6/Kconfig
index 190e5c6..b9f325f 100644
--- a/arch/arm/cpu/armv7/mx6/Kconfig
+++ b/arch/arm/cpu/armv7/mx6/Kconfig
@@ -155,6 +155,19 @@ config TARGET_MX6CUBOXI
select BOARD_LATE_INIT
select SUPPORT_SPL
 
+config TARGET_MX6LOGICPD
+   bool "Logic PD i.MX6 SOM"
+   select BOARD_EARLY_INIT_F
+   select BOARD_LATE_INIT
+   select DM
+   select DM_ETH
+   select DM_GPIO
+   select DM_I2C
+   select DM_MMC
+   select DM_PMIC
+   select DM_REGULATOR
+   select OF_CONTROL
+
 config TARGET_MX6QARM2
bool "mx6qarm2"
 
@@ -404,6 +417,7 @@ source "board/gateworks/gw_ventana/Kconfig"
 source "board/kosagi/novena/Kconfig"
 source "board/samtec/vining_2000/Kconfig"
 source "board/liebherr/mccmon6/Kconfig"
+source "board/logicpd/imx6/Kconfig"
 source "board/seco/Kconfig"
 source "board/solidrun/mx6cuboxi/Kconfig"
 source "board/technexion/pico-imx6ul/Kconfig"
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 0fbbb9b..a95f2db 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -319,6 +319,7 @@ dtb-$(CONFIG_MX6) += imx6ull-14x14-evk.dtb \
imx6dl-icore-rqs.dtb \
imx6q-icore.dtb \
imx6q-icore-rqs.dtb \
+   imx6q-logicpd.dtb \
imx6sx-sabreauto.dtb \
imx6ul-geam-kit.dtb \
imx6ul-isiot-emmc.dtb \
diff --git a/arch/arm/dts/imx6q-logicpd.dts b/arch/arm/dts/imx6q-logicpd.dts
new file mode 100644
index 000..d1e7a38
--- /dev/null
+++ b/arch/arm/dts/imx6q-logicpd.dts
@@ -0,0 +1,190 @@
+/*
+ * Copyright 2017 Logic PD, Inc.
+ * Based on SabreSD, Copyright 2016 Freescale Semiconductor, Inc.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS 

[U-Boot] [PATCH 2/2] defconfigs: am57xx_hs_evm: Move OPTEE load address to avoid overlaps

[Andrew F. Davis]

Move the OPTEE load address to 0xbdb0 in order to avoid
overlap with the memory regions used in radio and RVC usecases.

Signed-off-by: Andrew F. Davis 
---
 configs/am57xx_hs_evm_defconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/configs/am57xx_hs_evm_defconfig b/configs/am57xx_hs_evm_defconfig
index 956e39f1f8..138017d0d1 100644
--- a/configs/am57xx_hs_evm_defconfig
+++ b/configs/am57xx_hs_evm_defconfig
@@ -3,7 +3,7 @@ CONFIG_OMAP54XX=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_TI_SECURE_DEVICE=y
 CONFIG_TARGET_AM57XX_EVM=y
-CONFIG_TI_SECURE_EMIF_REGION_START=0xbe00
+CONFIG_TI_SECURE_EMIF_REGION_START=0xbdb0
 CONFIG_TI_SECURE_EMIF_TOTAL_REGION_SIZE=0x0200
 CONFIG_TI_SECURE_EMIF_PROTECTED_REGION_SIZE=0x01c0
 # CONFIG_SPL_NAND_SUPPORT is not set
-- 
2.11.0

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[U-Boot] [PATCH 1/2] defconfigs: dra7xx_hs_evm: Move OPTEE load address to avoid overlaps

[Andrew F. Davis]

From: Misael Lopez Cruz 

Move the OPTEE load address to 0xbdb0 in order to avoid
overlap with the memory regions used in radio and RVC usecases.

Signed-off-by: Misael Lopez Cruz 
Signed-off-by: Andrew F. Davis 
---
 configs/dra7xx_hs_evm_defconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/configs/dra7xx_hs_evm_defconfig b/configs/dra7xx_hs_evm_defconfig
index f3a9c68008..e238c39c0c 100644
--- a/configs/dra7xx_hs_evm_defconfig
+++ b/configs/dra7xx_hs_evm_defconfig
@@ -3,7 +3,7 @@ CONFIG_OMAP54XX=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_TI_SECURE_DEVICE=y
 CONFIG_TARGET_DRA7XX_EVM=y
-CONFIG_TI_SECURE_EMIF_REGION_START=0xbe00
+CONFIG_TI_SECURE_EMIF_REGION_START=0xbdb0
 CONFIG_TI_SECURE_EMIF_TOTAL_REGION_SIZE=0x0200
 CONFIG_TI_SECURE_EMIF_PROTECTED_REGION_SIZE=0x01c0
 # CONFIG_SPL_NAND_SUPPORT is not set
-- 
2.11.0

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Re: [U-Boot] [PATCH 5/6] arm: sunxi: Use board hooks to obtain MAC address

[o . schinagl]

On Fri, 2017-04-07 at 15:45 +0200, Olliver Schinagl wrote:
> Hey Joe,
> 
> On 30-11-16 22:36, Joe Hershberger wrote:
> > On Fri, Nov 25, 2016 at 9:38 AM, Olliver Schinagl  > nl> wrote:
> > > Add board hooks allowing to get ethernet addresses in a board
> > > specific
> > > manner. Currently this is done by generating a MAC address from
> > > the SID and injecting the ethernet device number in the first
> > > octet.
> > > 
> > > This usually happens as a fallback, if either the eeprom fails to
> > > set a
> > > MAC address or the FDT forces an override.
> > > 
> > > Signed-off-by: Olliver Schinagl 
> > > ---
> > >  arch/arm/include/asm/arch-sunxi/sys_proto.h |  11 ++
> > >  board/sunxi/board.c | 161
> > > +++-
> > >  net/eth_legacy.c|   1 +
> > >  3 files changed, 98 insertions(+), 75 deletions(-)
> > > 
> > > diff --git a/arch/arm/include/asm/arch-sunxi/sys_proto.h
> > > b/arch/arm/include/asm/arch-sunxi/sys_proto.h
> > > index a373319..fad7c48 100644
> > > --- a/arch/arm/include/asm/arch-sunxi/sys_proto.h
> > > +++ b/arch/arm/include/asm/arch-sunxi/sys_proto.h
> > > @@ -30,4 +30,15 @@ void eth_init_board(void);
> > >  static inline void eth_init_board(void) {}
> > >  #endif
> > > 
> > > +int board_get_enetaddr(const int i, unsigned char *mac_addr);
> > > +
> > > +#if CONFIG_SUNXI_EMAC
> > > +int sunxi_emac_board_read_rom_hwaddr(unsigned char *enetaddr,
> > > int id);
> > > +#endif
> > > +
> > > +#if defined(CONFIG_SUNXI_GMAC) || defined(CONFIG_ETH_DESIGNWARE)
> > > +int dw_board_read_rom_hwaddr(unsigned char *enetaddr, int id);
> > > +#endif
> > > +
> > > +
> > >  #endif
> > > diff --git a/board/sunxi/board.c b/board/sunxi/board.c
> > > index 5365638..4aeab51 100644
> > > --- a/board/sunxi/board.c
> > > +++ b/board/sunxi/board.c
> > > @@ -21,6 +21,7 @@
> > >  #include 
> > >  #include 
> > >  #include 
> > > +#include 
> > >  #include 
> > >  #ifndef CONFIG_ARM64
> > >  #include 
> > > @@ -564,6 +565,34 @@ int g_dnl_board_usb_cable_connected(void)
> > >  }
> > >  #endif
> > > 
> > > +int sunxi_get_board_serial(unsigned int *serial)
> > > +{
> > > +   int ret;
> > > +
> > > +   ret = sunxi_get_sid(serial);
> > > +   if (!ret || serial[0])
> > > +   return -ENOSYS;
> > > +
> > > +   /*
> > > +* The single words 1 - 3 of the SID have quite a few
> > > bits
> > > +* which are the same on many models, so we take a crc32
> > > +* of all 3 words, to get a more unique value.
> > > +*
> > > +* Note we only do this on newer SoCs as we cannot change
> > > +* the algorithm on older SoCs since those have been
> > > using
> > > +* fixed mac-addresses/serial based on only using word 3
> > > for a
> > > +* long time and changing a fixed mac-address/serial with
> > > an
> > > +* u-boot update is not good.
> > > +*/
> > > +#if !defined(CONFIG_MACH_SUN4I) && !defined(CONFIG_MACH_SUN5I)
> > > && \
> > > +!defined(CONFIG_MACH_SUN6I) && !defined(CONFIG_MACH_SUN7I)
> > > && \
> > > +!defined(CONFIG_MACH_SUN8I_A23) &&
> > > !defined(CONFIG_MACH_SUN8I_A33)
> > > +   serial[3] = crc32(0, (unsigned char *)[1], 12);
> > > +#endif
> > > +
> > > +   return 0;
> > > +}
> > > +
> > >  #ifdef CONFIG_SERIAL_TAG
> > >  void get_board_serial(struct tag_serialnr *serialnr)
> > >  {
> > > @@ -585,6 +614,54 @@ void get_board_serial(struct tag_serialnr
> > > *serialnr)
> > >  #endif
> > > 
> > >  /*
> > > + * Generate a MAC address based on device index and the serial
> > > number.
> > > + * The first half of the of the first octet holds the eth index.
> > > + *
> > > + * In the second octet we forcefully mark the MAC address to a
> > > locally
> > > + * administered MAC address.
> > > + *
> > > + */
> > > +int board_get_enetaddr(const int index, unsigned char *enetaddr)
> > 
> > This would be part of a board-specific eth driver.
> 
> this is being called now from sunxi_gmac.c and sunxi_emac.c and
> supplies 
> these board specific drivers with a mac address based on the serial 
> number of the board. I could move this logic over, but then i'd have
> to 
> add it to both eth drivers. By having it in the board.c file, we have
> 2 
> simple functions in the board-specific eth driver:
> 
> 
> static int sunxi_gmac_eth_read_rom_hwaddr(struct udevice *dev)
> {
>   struct eth_pdata *pdata = dev_get_platdata(dev);
> 
>   return board_get_enetaddr(dev->seq, pdata->enetaddr);
> }
> 
> So do you propose to dupilicate the code into both board specific 
> drivers, have it named differently or that the shared code live
> elsewhere?
Replying to myself here,

I just realized, while this bit was not accepted, the overal
implementation has changed in the set. So before, I did things wrong :)
As Simon explained last time.

To clarify, I now have added the logic to the sunxi gmac and emac board
specific drivers. But 

[U-Boot] [PATCH v2 4/8] defconfigs: dra7xx_hs_evm: Sync HS and non-HS defconfigs

[Andrew F. Davis]

Additions have been made to the non-HS defconfig without the same
being made to the HS defconfig, sync them.

Signed-off-by: Andrew F. Davis 
---
 configs/dra7xx_hs_evm_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/configs/dra7xx_hs_evm_defconfig b/configs/dra7xx_hs_evm_defconfig
index f3a9c68008..158a91560e 100644
--- a/configs/dra7xx_hs_evm_defconfig
+++ b/configs/dra7xx_hs_evm_defconfig
@@ -9,6 +9,7 @@ CONFIG_TI_SECURE_EMIF_PROTECTED_REGION_SIZE=0x01c0
 # CONFIG_SPL_NAND_SUPPORT is not set
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_ARMV7_LPAE=y
 CONFIG_SPL_STACK_R_ADDR=0x8200
 CONFIG_DEFAULT_DEVICE_TREE="dra7-evm"
 CONFIG_FIT=y
-- 
2.11.0

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[U-Boot] [PATCH v2 5/8] defconfigs: am43xx_hs_evm: Add Net boot mode support

[Andrew F. Davis]

Enable Eth/Net boot support in the default defconfig to allow
network booting.

Signed-off-by: Andrew F. Davis 
---
 configs/am43xx_hs_evm_defconfig | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/configs/am43xx_hs_evm_defconfig b/configs/am43xx_hs_evm_defconfig
index 7a39d38499..3b1a411519 100644
--- a/configs/am43xx_hs_evm_defconfig
+++ b/configs/am43xx_hs_evm_defconfig
@@ -15,7 +15,10 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y
 CONFIG_VERSION_VARIABLE=y
 CONFIG_SPL=y
 CONFIG_SPL_STACK_R=y
+CONFIG_SPL_ETH_SUPPORT=y
 CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_NET_SUPPORT=y
+CONFIG_SPL_NET_VCI_STRING="AM43xx U-Boot SPL"
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set
@@ -56,7 +59,6 @@ CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_MACRONIX=y
-CONFIG_DM_ETH=y
 CONFIG_DM_SERIAL=y
 CONFIG_SYS_NS16550=y
 CONFIG_DM_SPI=y
-- 
2.11.0

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[U-Boot] [PATCH v2 2/8] defconfigs: am43xx_hs_evm: Sync HS and non-HS defconfigs

[Andrew F. Davis]

Additions have been made to the non-HS defconfig without the same
being made to the HS defconfig, sync them.

Signed-off-by: Andrew F. Davis 
---
 configs/am43xx_hs_evm_defconfig | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/configs/am43xx_hs_evm_defconfig b/configs/am43xx_hs_evm_defconfig
index 17217e9051..7a39d38499 100644
--- a/configs/am43xx_hs_evm_defconfig
+++ b/configs/am43xx_hs_evm_defconfig
@@ -10,7 +10,7 @@ CONFIG_FIT=y
 CONFIG_FIT_IMAGE_POST_PROCESS=y
 CONFIG_SPL_LOAD_FIT=y
 CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y
-CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=1, NAND"
+CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=1,NAND"
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
 CONFIG_VERSION_VARIABLE=y
 CONFIG_SPL=y
@@ -41,6 +41,7 @@ CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
 CONFIG_ISO_PARTITION=y
 CONFIG_OF_CONTROL=y
+CONFIG_OF_LIST="am437x-gp-evm am437x-sk-evm am43x-epos-evm am437x-idk-evm"
 CONFIG_DM=y
 # CONFIG_BLK is not set
 CONFIG_DFU_MMC=y
@@ -53,6 +54,7 @@ CONFIG_DM_MMC=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_DM_ETH=y
 CONFIG_DM_SERIAL=y
-- 
2.11.0

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[U-Boot] [PATCH v2 6/8] defconfigs: am43xx_hs_evm: Add USB client boot mode support

[Andrew F. Davis]

Enable CONFIG_SPL_USBETH_SUPPORT in the default defconfig to allow
booting as a USB RNDIS peripheral.

Signed-off-by: Andrew F. Davis 
---
 configs/am43xx_hs_evm_defconfig | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/configs/am43xx_hs_evm_defconfig b/configs/am43xx_hs_evm_defconfig
index 3b1a411519..7a27678ad0 100644
--- a/configs/am43xx_hs_evm_defconfig
+++ b/configs/am43xx_hs_evm_defconfig
@@ -19,6 +19,9 @@ CONFIG_SPL_ETH_SUPPORT=y
 CONFIG_SPL_MTD_SUPPORT=y
 CONFIG_SPL_NET_SUPPORT=y
 CONFIG_SPL_NET_VCI_STRING="AM43xx U-Boot SPL"
+CONFIG_SPL_USB_SUPPORT=y
+CONFIG_SPL_USB_GADGET_SUPPORT=y
+CONFIG_SPL_USBETH_SUPPORT=y
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set
-- 
2.11.0

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[U-Boot] [PATCH v2 8/8] defconfigs: Add a config for AM335x High Security EVM with UART Boot support

[Andrew F. Davis]

Add a new defconfig file for the AM335x High Security EVM. This config
is specific for the case of UART booting

Signed-off-by: Andrew F. Davis 
---
 configs/am335x_hs_evm_uart_defconfig | 69 
 1 file changed, 69 insertions(+)
 create mode 100644 configs/am335x_hs_evm_uart_defconfig

diff --git a/configs/am335x_hs_evm_uart_defconfig 
b/configs/am335x_hs_evm_uart_defconfig
new file mode 100644
index 00..713bc61534
--- /dev/null
+++ b/configs/am335x_hs_evm_uart_defconfig
@@ -0,0 +1,69 @@
+CONFIG_ARM=y
+CONFIG_AM33XX=y
+CONFIG_TI_SECURE_DEVICE=y
+CONFIG_TARGET_AM335X_EVM=y
+CONFIG_ISW_ENTRY_ADDR=0x40301750
+# CONFIG_SPL_MMC_SUPPORT is not set
+# CONFIG_SPL_LIBDISK_SUPPORT is not set
+# CONFIG_SPL_NAND_SUPPORT is not set
+# CONFIG_SPL_EXT_SUPPORT is not set
+# CONFIG_SPL_FAT_SUPPORT is not set
+CONFIG_SPL_STACK_R_ADDR=0x8200
+CONFIG_DEFAULT_DEVICE_TREE="am335x-evm"
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_FIT=y
+CONFIG_FIT_IMAGE_POST_PROCESS=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y
+CONFIG_SYS_EXTRA_OPTIONS="NAND"
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
+CONFIG_VERSION_VARIABLE=y
+CONFIG_ARCH_MISC_INIT=y
+CONFIG_SPL=y
+CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_MUSB_NEW_SUPPORT=y
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_ASKENV=y
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_DFU=y
+CONFIG_CMD_GPIO=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_OF_CONTROL=y
+CONFIG_OF_LIST="am335x-evm am335x-bone am335x-boneblack am335x-evmsk 
am335x-bonegreen am335x-icev2"
+# CONFIG_BLK is not set
+CONFIG_DFU_MMC=y
+CONFIG_DFU_NAND=y
+CONFIG_DFU_RAM=y
+CONFIG_DM_I2C=y
+CONFIG_MISC=y
+CONFIG_DM_MMC=y
+# CONFIG_DM_MMC_OPS is not set
+CONFIG_MMC_OMAP_HS=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DM_ETH=y
+CONFIG_SYS_NS16550=y
+CONFIG_TIMER=y
+CONFIG_OMAP_TIMER=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_MUSB_HOST=y
+CONFIG_USB_MUSB_GADGET=y
+CONFIG_USB_MUSB_TI=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_G_DNL_MANUFACTURER="Texas Instruments"
+CONFIG_G_DNL_VENDOR_NUM=0x0451
+CONFIG_G_DNL_PRODUCT_NUM=0xd022
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_RSA=y
+CONFIG_SPL_OF_LIBFDT=y
-- 
2.11.0

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[U-Boot] [PATCH v2 7/8] defconfigs: am43xx_hs_evm: Add USB Host boot mode support

[Andrew F. Davis]

Enable SPL_USB_HOST_SUPPORT in the default defconfig to allow
booting from USB peripherals. Unlike the non-HS boards, we
already load SPL to a 0x4030_+ address, so no other changes
are needed.

Signed-off-by: Andrew F. Davis 
---
 configs/am43xx_hs_evm_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/configs/am43xx_hs_evm_defconfig b/configs/am43xx_hs_evm_defconfig
index 7a27678ad0..795dfd717b 100644
--- a/configs/am43xx_hs_evm_defconfig
+++ b/configs/am43xx_hs_evm_defconfig
@@ -19,6 +19,7 @@ CONFIG_SPL_ETH_SUPPORT=y
 CONFIG_SPL_MTD_SUPPORT=y
 CONFIG_SPL_NET_SUPPORT=y
 CONFIG_SPL_NET_VCI_STRING="AM43xx U-Boot SPL"
+CONFIG_SPL_USB_HOST_SUPPORT=y
 CONFIG_SPL_USB_SUPPORT=y
 CONFIG_SPL_USB_GADGET_SUPPORT=y
 CONFIG_SPL_USBETH_SUPPORT=y
-- 
2.11.0

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[U-Boot] [PATCH v2 0/8] Update and sync HS configs

[Andrew F. Davis]

Hello all,

This series is a consolidation of several past series and patches.
We first sync the current HS and non-HS defconfigs. Then we merge
in two AM43xx defconfigs into the HS defconfig. Lastly we add
a defconfig for AM335x UART boot, we cannot add UART boot to
the regular defconfig due to SPL size limitations.

Thanks,
Andrew

Andrew F. Davis (8):
  defconfigs: am335x_hs_evm: Sync HS and non-HS defconfigs
  defconfigs: am43xx_hs_evm: Sync HS and non-HS defconfigs
  defconfigs: am57xx_hs_evm: Sync HS and non-HS defconfigs
  defconfigs: dra7xx_hs_evm: Sync HS and non-HS defconfigs
  defconfigs: am43xx_hs_evm: Add Net boot mode support
  defconfigs: am43xx_hs_evm: Add USB client boot mode support
  defconfigs: am43xx_hs_evm: Add USB Host boot mode support
  defconfigs: Add a config for AM335x High Security EVM with UART Boot
support

 configs/am335x_hs_evm_defconfig  |  6 ++
 ...35x_hs_evm_defconfig => am335x_hs_evm_uart_defconfig} | 16 
 configs/am43xx_hs_evm_defconfig  | 12 ++--
 configs/am57xx_hs_evm_defconfig  |  7 +++
 configs/dra7xx_hs_evm_defconfig  |  1 +
 5 files changed, 36 insertions(+), 6 deletions(-)
 copy configs/{am335x_hs_evm_defconfig => am335x_hs_evm_uart_defconfig} (78%)

-- 
2.11.0

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[U-Boot] [PATCH v2 3/8] defconfigs: am57xx_hs_evm: Sync HS and non-HS defconfigs

[Andrew F. Davis]

Additions have been made to the non-HS defconfig without the same
being made to the HS defconfig, sync them.

Signed-off-by: Andrew F. Davis 
---
 configs/am57xx_hs_evm_defconfig | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/configs/am57xx_hs_evm_defconfig b/configs/am57xx_hs_evm_defconfig
index 956e39f1f8..e96601dc44 100644
--- a/configs/am57xx_hs_evm_defconfig
+++ b/configs/am57xx_hs_evm_defconfig
@@ -9,6 +9,7 @@ CONFIG_TI_SECURE_EMIF_PROTECTED_REGION_SIZE=0x01c0
 # CONFIG_SPL_NAND_SUPPORT is not set
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_ARMV7_LPAE=y
 CONFIG_SPL_STACK_R_ADDR=0x8200
 CONFIG_DEFAULT_DEVICE_TREE="am57xx-beagle-x15"
 CONFIG_FIT=y
@@ -51,6 +52,7 @@ CONFIG_CMD_GPIO=y
 CONFIG_CMD_DHCP=y
 CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
+CONFIG_CMD_REGULATOR=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_EXT4=y
 CONFIG_CMD_EXT4_WRITE=y
@@ -59,6 +61,7 @@ CONFIG_CMD_FS_GENERIC=y
 CONFIG_ISO_PARTITION=y
 CONFIG_OF_CONTROL=y
 CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_LIST="am57xx-beagle-x15 am57xx-beagle-x15-revb1 am572x-idk 
am571x-idk"
 CONFIG_DM=y
 CONFIG_SPL_DM=y
 # CONFIG_BLK is not set
@@ -73,6 +76,10 @@ CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_PALMAS=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_PALMAS=y
 CONFIG_DM_SERIAL=y
 CONFIG_SYS_NS16550=y
 CONFIG_DM_SPI=y
-- 
2.11.0

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[U-Boot] [PATCH v2 1/8] defconfigs: am335x_hs_evm: Sync HS and non-HS defconfigs

[Andrew F. Davis]

Sync new additions to non-HS defconfig with HS defconfig. Also add SPL
NAND support, this was disabled before due to size constraints, enable
this now at the expense of the less used GPT partition support.

Signed-off-by: Andrew F. Davis 
---
 configs/am335x_hs_evm_defconfig | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/configs/am335x_hs_evm_defconfig b/configs/am335x_hs_evm_defconfig
index ff5bf64c68..8ab86535b6 100644
--- a/configs/am335x_hs_evm_defconfig
+++ b/configs/am335x_hs_evm_defconfig
@@ -14,6 +14,7 @@ CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y
 CONFIG_SYS_EXTRA_OPTIONS="NAND"
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
 CONFIG_VERSION_VARIABLE=y
+CONFIG_ARCH_MISC_INIT=y
 CONFIG_SPL=y
 CONFIG_SPL_SYS_MALLOC_SIMPLE=y
 CONFIG_SPL_STACK_R=y
@@ -32,12 +33,15 @@ CONFIG_CMD_DFU=y
 CONFIG_CMD_GPIO=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_EXT4_WRITE=y
+# CONFIG_SPL_EFI_PARTITION is not set
 CONFIG_OF_CONTROL=y
+CONFIG_OF_LIST="am335x-evm am335x-bone am335x-boneblack am335x-evmsk 
am335x-bonegreen am335x-icev2"
 # CONFIG_BLK is not set
 CONFIG_DFU_MMC=y
 CONFIG_DFU_NAND=y
 CONFIG_DFU_RAM=y
 CONFIG_DM_I2C=y
+CONFIG_MISC=y
 CONFIG_DM_MMC=y
 # CONFIG_DM_MMC_OPS is not set
 CONFIG_MMC_OMAP_HS=y
@@ -48,8 +52,10 @@ CONFIG_SYS_NS16550=y
 CONFIG_TIMER=y
 CONFIG_OMAP_TIMER=y
 CONFIG_USB=y
+CONFIG_DM_USB=y
 CONFIG_USB_MUSB_HOST=y
 CONFIG_USB_MUSB_GADGET=y
+CONFIG_USB_MUSB_TI=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-- 
2.11.0

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Re: [U-Boot] [RFC] tiny-printf: Add support for %p format

[Tom Rini]

On Fri, Apr 07, 2017 at 03:20:34PM +0530, Vignesh R wrote:

> Add support for %p, %pa[p], %pM, %pm and %pI4 formats to tiny-printf.
> %pM and %pI4 are widely used by SPL networking stack and is required if
> networking support is desired in SPL.
> 
> Before this patch:
> $ size spl/u-boot-spl
>text  data bss dec hex filename
>   99325  4899  218584  322808   4ecf8 spl/u-boot-spl
> 
> After this patch (with CONFIG_SPL_NET_SUPPORT):
> $ size spl/u-boot-spl
>text  data bss dec hex filename
>   99714  4899  218584  323197   4ee7d spl/u-boot-spl
> 
> So, this patch adds ~390 bytes to code size.
> 
> If CONFIG_SPL_NET_SUPPORT is not enabled then only %p, %pa, %pap are
> supported, this adds ~90 bytes to code size.

Why do we need %p/%pa/%pap?  I'm fine with adding %pM/%pm/%pI4 under
SPL_NET_SUPPORT as you've done.

-- 
Tom


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[U-Boot] [PATCH v2 00/10] Add support for secure boot on Keystone2 SoCs

[Andrew F. Davis]

Hello all,

This series adds support for secure Keystone2 K2E, K2G, and K2HK devices,
much of the work is borrowed from the OMAP style devices as the secure
workings are very similar, allowing minimal changes for this support.

Thanks,
Andrew

Changes from v1:
 - Add Reviewed-bys
 - Add k2g_hs_evm_defconfig
 - Rebase on upstream/master

Andrew F. Davis (2):
  defconfig: k2hk_hs_evm: Add k2hk_hs_evm_defconfig
  defconfig: k2g_hs_evm: Add k2g_hs_evm_defconfig

Madan Srinivas (5):
  image: Fixes build warning with CONFIG_FIT_IMAGE_POST_PROCESS
  arm: mach-omap2: Add secure image name common to OMAP and keystone
  ARM: Keystone2: Build secure images for K2
  doc: Updates info on using Keystone2 secure devices
  Kconfig: Adds SYS_TEXT_BASE config option for Keystone2

Vitaly Andrianov (3):
  arm: mach-keystone: Implements FIT post-processing call for keystone
SoCs
  arm: mach-omap2: Enable Kconfig support for K2 HS devices
  defconfig: k2e_hs_evm: Add k2e_hs_evm_defconfig

 Kconfig|  2 +-
 arch/arm/mach-keystone/config.mk   |  6 ++
 arch/arm/mach-keystone/mon.c   | 73 ++
 arch/arm/mach-omap2/Kconfig|  2 +-
 arch/arm/mach-omap2/config_secure.mk   |  6 ++
 configs/k2e_evm_defconfig  |  1 +
 .../{k2e_evm_defconfig => k2e_hs_evm_defconfig}| 15 ++---
 configs/k2g_evm_defconfig  |  1 +
 .../{k2g_evm_defconfig => k2g_hs_evm_defconfig}| 13 ++--
 configs/k2hk_evm_defconfig |  1 +
 .../{k2hk_evm_defconfig => k2hk_hs_evm_defconfig}  | 13 ++--
 configs/k2l_evm_defconfig  |  1 +
 doc/README.ti-secure   | 20 ++
 include/image.h|  3 +-
 14 files changed, 126 insertions(+), 31 deletions(-)
 copy configs/{k2e_evm_defconfig => k2e_hs_evm_defconfig} (78%)
 copy configs/{k2g_evm_defconfig => k2g_hs_evm_defconfig} (82%)
 copy configs/{k2hk_evm_defconfig => k2hk_hs_evm_defconfig} (80%)

-- 
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[U-Boot] [PATCH v2 08/10] defconfig: k2e_hs_evm: Add k2e_hs_evm_defconfig

[Andrew F. Davis]

From: Vitaly Andrianov 

TI K2E secure devices have to be built with TI_SECURE_DEVICE, FIT, and
FIT_IMAGE_POST_PROCESS enabled. Add a dedicated defconfig for this.

Signed-off-by: Vitaly Andrianov 
Signed-off-by: Madan Srinivas 
Signed-off-by: Andrew F. Davis 
Reviewed-by: Simon Glass 
---
 configs/k2e_hs_evm_defconfig | 51 
 1 file changed, 51 insertions(+)
 create mode 100644 configs/k2e_hs_evm_defconfig

diff --git a/configs/k2e_hs_evm_defconfig b/configs/k2e_hs_evm_defconfig
new file mode 100644
index 00..d515cedaca
--- /dev/null
+++ b/configs/k2e_hs_evm_defconfig
@@ -0,0 +1,51 @@
+CONFIG_ARM=y
+CONFIG_ARCH_KEYSTONE=y
+CONFIG_SYS_TEXT_BASE=0x0c60
+CONFIG_TARGET_K2E_EVM=y
+CONFIG_TI_SECURE_DEVICE=y
+CONFIG_DEFAULT_DEVICE_TREE="keystone-k2e-evm"
+CONFIG_FIT=y
+CONFIG_FIT_IMAGE_POST_PROCESS=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
+CONFIG_VERSION_VARIABLE=y
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_PROMPT="K2E HS EVM # "
+CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_ASKENV=y
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_NAND=y
+CONFIG_CMD_PART=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_USB=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_UBI=y
+CONFIG_ISO_PARTITION=y
+CONFIG_EFI_PARTITION=y
+CONFIG_OF_CONTROL=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_DM=y
+CONFIG_TI_AEMIF=y
+# CONFIG_MMC is not set
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_DM_ETH=y
+CONFIG_DM_SERIAL=y
+CONFIG_SYS_NS16550=y
+CONFIG_DM_SPI=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_STORAGE=y
-- 
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[U-Boot] [PATCH v3] spl: net: Add FIT image support over network boot

[Andrew F. Davis]

FIT support in the net boot case is much like the RAM boot case in that
we load our image to "load_addr" and pass a dummy read function into
"spl_load_simple_fit()". As the load address is no longer hard-coded to
the final execution address, RAW image loading will rely on "load_addr"
pointing to the execution address as they should have before.

Signed-off-by: Andrew F. Davis 
---

Changes from v2:
 - Rebased on latest upstream/master

Changes from v1:
 - move "spl_net_load_read" into #ifdef block as suggested by Vignesh

 common/spl/spl_net.c | 30 +++---
 1 file changed, 27 insertions(+), 3 deletions(-)

diff --git a/common/spl/spl_net.c b/common/spl/spl_net.c
index 0fba0172ea..3d1d05d833 100644
--- a/common/spl/spl_net.c
+++ b/common/spl/spl_net.c
@@ -11,19 +11,29 @@
 #include 
 #include 
 #include 
+#include 
 
 DECLARE_GLOBAL_DATA_PTR;
 
 #if defined(CONFIG_SPL_ETH_SUPPORT) || defined(CONFIG_SPL_USBETH_SUPPORT)
+static ulong spl_net_load_read(struct spl_load_info *load, ulong sector,
+  ulong count, void *buf)
+{
+   debug("%s: sector %lx, count %lx, buf %lx\n",
+ __func__, sector, count, (ulong)buf);
+   memcpy(buf, (void *)(load_addr + sector), count);
+   return count;
+}
+
 static int spl_net_load_image(struct spl_image_info *spl_image,
  struct spl_boot_device *bootdev)
 {
+   struct image_header *header = (struct image_header *)load_addr;
int rv;
 
env_init();
env_relocate();
setenv("autoload", "yes");
-   load_addr = CONFIG_SYS_TEXT_BASE - sizeof(struct image_header);
rv = eth_initialize();
if (rv == 0) {
printf("No Ethernet devices found\n");
@@ -36,8 +46,22 @@ static int spl_net_load_image(struct spl_image_info 
*spl_image,
printf("Problem booting with BOOTP\n");
return rv;
}
-   return spl_parse_image_header(spl_image,
- (struct image_header *)load_addr);
+
+   if (IS_ENABLED(CONFIG_SPL_LOAD_FIT) &&
+   image_get_magic(header) == FDT_MAGIC) {
+   struct spl_load_info load;
+
+   debug("Found FIT\n");
+   load.bl_len = 1;
+   load.read = spl_net_load_read;
+   rv = spl_load_simple_fit(spl_image, , 0, header);
+   } else {
+   debug("Legacy image\n");
+
+   rv = spl_parse_image_header(spl_image, header);
+   }
+
+   return rv;
 }
 #endif
 
-- 
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[U-Boot] [PATCH v2 06/10] doc: Updates info on using Keystone2 secure devices

[Andrew F. Davis]

From: Madan Srinivas 

Add a section describing the secure boot image used on
Keystone2 secure devices.

Signed-off-by: Madan Srinivas 
Signed-off-by: Andrew F. Davis 
Reviewed-by: Tom Rini 
---
 doc/README.ti-secure | 20 
 1 file changed, 20 insertions(+)

diff --git a/doc/README.ti-secure b/doc/README.ti-secure
index 9b0fbf9732..4b5380c0f3 100644
--- a/doc/README.ti-secure
+++ b/doc/README.ti-secure
@@ -133,6 +133,26 @@ Booting of U-Boot SPL
u-boot-spl_HS_X-LOADER - boot image for all other flash memories
including QSPI and NOR flash
 
+   Invoking the script for Keystone2 Secure Devices
+   =
+
+   create-boot-image.sh \
+  
+
+is currently ignored and reserved for future use.
+
+is the full path and filename of the public world boot
+   loader binary file (only u-boot.bin is currently supported on
+   Keystone2 devices, u-boot-spl.bin is not currently supported).
+
+is the full path and filename of the final secure image.
+   The output binary images should be used in place of the standard
+   non-secure binary images (see the platform-specific user's guides
+   and releases notes for how the non-secure images are typically used)
+   u-boot_HS_MLO - signed and encrypted boot image that can be used to
+   boot from all media. Secure boot from SPI NOR flash is not
+   currently supported.
+
 Booting of Primary U-Boot (u-boot.img)
 ==
 
-- 
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[U-Boot] [PATCH v2 10/10] defconfig: k2g_hs_evm: Add k2g_hs_evm_defconfig

[Andrew F. Davis]

TI K2G secure devices have to be built with TI_SECURE_DEVICE, FIT, and
FIT_IMAGE_POST_PROCESS enabled. Add a dedicated defconfig for this.

Signed-off-by: Andrew F. Davis 
---
 configs/k2g_hs_evm_defconfig | 55 
 1 file changed, 55 insertions(+)
 create mode 100644 configs/k2g_hs_evm_defconfig

diff --git a/configs/k2g_hs_evm_defconfig b/configs/k2g_hs_evm_defconfig
new file mode 100644
index 00..9c21867408
--- /dev/null
+++ b/configs/k2g_hs_evm_defconfig
@@ -0,0 +1,55 @@
+CONFIG_ARM=y
+CONFIG_ARCH_KEYSTONE=y
+CONFIG_TARGET_K2G_EVM=y
+CONFIG_TI_SECURE_DEVICE=y
+CONFIG_SYS_TEXT_BASE=0x0c60
+CONFIG_DEFAULT_DEVICE_TREE="keystone-k2g-evm"
+CONFIG_FIT=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_FIT_IMAGE_POST_PROCESS=y
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
+CONFIG_VERSION_VARIABLE=y
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_ASKENV=y
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PART=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_REMOTEPROC=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_UBI=y
+CONFIG_ISO_PARTITION=y
+CONFIG_EFI_PARTITION=y
+CONFIG_OF_CONTROL=y
+CONFIG_DM=y
+# CONFIG_BLK is not set
+CONFIG_DM_MMC=y
+# CONFIG_DM_MMC_OPS is not set
+CONFIG_MMC_OMAP_HS=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_BAR=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_DM_ETH=y
+CONFIG_REMOTEPROC_TI_POWER=y
+CONFIG_DM_SERIAL=y
+CONFIG_SYS_NS16550=y
+CONFIG_DM_SPI=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_STORAGE=y
-- 
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[U-Boot] [PATCH v2 09/10] defconfig: k2hk_hs_evm: Add k2hk_hs_evm_defconfig

[Andrew F. Davis]

TI K2HK secure devices have to be built with TI_SECURE_DEVICE, FIT, and
FIT_IMAGE_POST_PROCESS enabled. Add a dedicated defconfig for this.

Signed-off-by: Andrew F. Davis 
---
 configs/k2hk_hs_evm_defconfig | 51 +++
 1 file changed, 51 insertions(+)
 create mode 100644 configs/k2hk_hs_evm_defconfig

diff --git a/configs/k2hk_hs_evm_defconfig b/configs/k2hk_hs_evm_defconfig
new file mode 100644
index 00..9fe91ea19c
--- /dev/null
+++ b/configs/k2hk_hs_evm_defconfig
@@ -0,0 +1,51 @@
+CONFIG_ARM=y
+CONFIG_ARCH_KEYSTONE=y
+CONFIG_SYS_TEXT_BASE=0x0c60
+CONFIG_TARGET_K2HK_EVM=y
+CONFIG_TI_SECURE_DEVICE=y
+CONFIG_DEFAULT_DEVICE_TREE="keystone-k2hk-evm"
+CONFIG_FIT=y
+CONFIG_FIT_IMAGE_POST_PROCESS=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
+CONFIG_VERSION_VARIABLE=y
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_PROMPT="K2HK EVM # "
+CONFIG_CMD_BOOTZ=y
+# CONFIG_CMD_IMLS is not set
+CONFIG_CMD_ASKENV=y
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_NAND=y
+CONFIG_CMD_PART=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_USB=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_UBI=y
+CONFIG_ISO_PARTITION=y
+CONFIG_EFI_PARTITION=y
+CONFIG_OF_CONTROL=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_DM=y
+CONFIG_TI_AEMIF=y
+# CONFIG_MMC is not set
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_DM_ETH=y
+CONFIG_DM_SERIAL=y
+CONFIG_SYS_NS16550=y
+CONFIG_DM_SPI=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_STORAGE=y
-- 
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[U-Boot] [PATCH v2 04/10] arm: mach-omap2: Add secure image name common to OMAP and keystone

[Andrew F. Davis]

From: Madan Srinivas 

As K2 can directly boot U-Boot, add u-boot_HS_MLO as the secure image
name for secure K2 devices, for all boot modes other than SPI flash.

Signed-off-by: Madan Srinivas 
Signed-off-by: Andrew F. Davis 
Reviewed-by: Tom Rini 
---
 arch/arm/mach-omap2/config_secure.mk | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/arch/arm/mach-omap2/config_secure.mk 
b/arch/arm/mach-omap2/config_secure.mk
index 0c843338d7..0346cb93ab 100644
--- a/arch/arm/mach-omap2/config_secure.mk
+++ b/arch/arm/mach-omap2/config_secure.mk
@@ -77,6 +77,12 @@ u-boot-spl_HS_ISSW: $(obj)/u-boot-spl.bin FORCE
 u-boot-spl_HS_SPI_X-LOADER: $(obj)/u-boot-spl.bin FORCE
$(call if_changed,mkomapsecimg)
 
+# For supporting single stage boot on keystone, the image is a full u-boot
+# file, not an SPL. This will work for all boot devices, other than SPI
+# flash
+u-boot_HS_MLO: $(obj)/u-boot.bin
+   $(call if_changed,mkomapsecimg)
+
 # For supporting single stage XiP QSPI on AM43xx, the image is a full u-boot
 # file, not an SPL. In this case the mkomapsecimg command looks for a
 # u-boot-HS_* prefix
-- 
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[U-Boot] [PATCH v2 03/10] arm: mach-omap2: Enable Kconfig support for K2 HS devices

[Andrew F. Davis]

From: Vitaly Andrianov 

Like the OMAP54xx, AM43xx, & AM33xx family SoCs, the keystone family
of SoCs also have high security enabled models. Allow K2E devices to
be built with HS Device Type Support.

Signed-off-by: Vitaly Andrianov 
Signed-off-by: Madan Srinivas 
Signed-off-by: Andrew F. Davis 
Reviewed-by: Tom Rini 
---
 arch/arm/mach-omap2/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 24bc485195..d74b068abc 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -1,6 +1,6 @@
 config TI_SECURE_DEVICE
bool "HS Device Type Support"
-   depends on OMAP54XX || AM43XX || AM33XX
+   depends on OMAP54XX || AM43XX || AM33XX || ARCH_KEYSTONE
help
  If a high secure (HS) device type is being used, this config
  must be set. This option impacts various aspects of the
-- 
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[U-Boot] [PATCH v2 07/10] Kconfig: Adds SYS_TEXT_BASE config option for Keystone2

[Andrew F. Davis]

From: Madan Srinivas 

This patch makes SYS_TEXT_BASE a config option for Keystone2
so that it can be used to load u-boot at different addresses
on secure and non-secure Keystone2 devices.

Signed-off-by: Madan Srinivas 
Signed-off-by: Andrew F. Davis 
Reviewed-by: Tom Rini 
---
 Kconfig| 2 +-
 configs/k2e_evm_defconfig  | 1 +
 configs/k2g_evm_defconfig  | 1 +
 configs/k2hk_evm_defconfig | 1 +
 configs/k2l_evm_defconfig  | 1 +
 5 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/Kconfig b/Kconfig
index bbf4784119..1cf990dfce 100644
--- a/Kconfig
+++ b/Kconfig
@@ -286,7 +286,7 @@ config SYS_EXTRA_OPTIONS
 config SYS_TEXT_BASE
depends on ARC || X86 || ARCH_UNIPHIER || ARCH_ZYNQMP || \
(M68K && !TARGET_ASTRO_MCF5373L) || MICROBLAZE || MIPS || \
-   ARCH_ZYNQ
+   ARCH_ZYNQ || ARCH_KEYSTONE
depends on !EFI_APP
hex "Text Base"
help
diff --git a/configs/k2e_evm_defconfig b/configs/k2e_evm_defconfig
index d319705b67..63db1aef7c 100644
--- a/configs/k2e_evm_defconfig
+++ b/configs/k2e_evm_defconfig
@@ -7,6 +7,7 @@ CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
 CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SYS_TEXT_BASE=0x0c00
 CONFIG_DEFAULT_DEVICE_TREE="keystone-k2e-evm"
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
diff --git a/configs/k2g_evm_defconfig b/configs/k2g_evm_defconfig
index bbdcc2f136..44c9dff747 100644
--- a/configs/k2g_evm_defconfig
+++ b/configs/k2g_evm_defconfig
@@ -7,6 +7,7 @@ CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
 CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SYS_TEXT_BASE=0x0c00
 CONFIG_DEFAULT_DEVICE_TREE="keystone-k2g-evm"
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
diff --git a/configs/k2hk_evm_defconfig b/configs/k2hk_evm_defconfig
index b22086d477..12b80472d9 100644
--- a/configs/k2hk_evm_defconfig
+++ b/configs/k2hk_evm_defconfig
@@ -7,6 +7,7 @@ CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
 CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SYS_TEXT_BASE=0x0c00
 CONFIG_DEFAULT_DEVICE_TREE="keystone-k2hk-evm"
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
diff --git a/configs/k2l_evm_defconfig b/configs/k2l_evm_defconfig
index 5a28112857..39a992d797 100644
--- a/configs/k2l_evm_defconfig
+++ b/configs/k2l_evm_defconfig
@@ -7,6 +7,7 @@ CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
 CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SYS_TEXT_BASE=0x0c00
 CONFIG_DEFAULT_DEVICE_TREE="keystone-k2l-evm"
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
-- 
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[U-Boot] [PATCH v2 05/10] ARM: Keystone2: Build secure images for K2

[Andrew F. Davis]

From: Madan Srinivas 

Adds an additional image type needed for supporting secure keystone
devices. The build generates u-boot_HS_MLO which can be used to boot
from all media on secure keystone devices.

Signed-off-by: Madan Srinivas 
Signed-off-by: Andrew F. Davis 
Reviewed-by: Tom Rini 
---
 arch/arm/mach-keystone/config.mk | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/arch/arm/mach-keystone/config.mk b/arch/arm/mach-keystone/config.mk
index 9ae1e9ac91..db556ea0a8 100644
--- a/arch/arm/mach-keystone/config.mk
+++ b/arch/arm/mach-keystone/config.mk
@@ -5,9 +5,15 @@
 # SPDX-License-Identifier: GPL-2.0+
 #
 
+include  $(srctree)/arch/arm/mach-omap2/config_secure.mk
+
 ifndef CONFIG_SPL_BUILD
+ifeq ($(CONFIG_TI_SECURE_DEVICE),y)
+ALL-y += u-boot_HS_MLO
+else
 ALL-y += MLO
 endif
+endif
 
 MKIMAGEFLAGS_u-boot-spl.gph = -A $(ARCH) -T gpimage -C none \
-a $(CONFIG_SPL_TEXT_BASE) -e $(CONFIG_SPL_TEXT_BASE) -n SPL
-- 
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[U-Boot] [PATCH v2 02/10] arm: mach-keystone: Implements FIT post-processing call for keystone SoCs

[Andrew F. Davis]

From: Vitaly Andrianov 

This commit implements the board_fit_image_post_process() function for
the keystone architecture. This function calls into the secure boot
monitor for secure authentication/decryption of the image. All needed
work is handled by the boot monitor and, depending on the keystone
platform, the security functions may be offloaded to other secure
processing elements in the SoC.

The boot monitor acts as the gateway to these secure functions and the
boot monitor for secure devices is available as part of the SECDEV
package for KS2. For more details refer doc/README.ti-secure

Signed-off-by: Vitaly Andrianov 
Signed-off-by: Madan Srinivas 
Signed-off-by: Andrew F. Davis 
Reviewed-by: Tom Rini 
---
 arch/arm/mach-keystone/mon.c | 73 
 1 file changed, 73 insertions(+)

diff --git a/arch/arm/mach-keystone/mon.c b/arch/arm/mach-keystone/mon.c
index 256f6300ed..81009848d0 100644
--- a/arch/arm/mach-keystone/mon.c
+++ b/arch/arm/mach-keystone/mon.c
@@ -10,6 +10,7 @@
 #include 
 #include 
 #include 
+#include 
 asm(".arch_extension sec\n\t");
 
 int mon_install(u32 addr, u32 dpsc, u32 freq)
@@ -61,3 +62,75 @@ int mon_power_off(int core_id)
: "cc", "r0", "r1", "memory");
return  result;
 }
+
+#ifdef CONFIG_TI_SECURE_DEVICE
+#define KS2_HS_SEC_HEADER_LEN  0x60
+#define KS2_HS_SEC_TAG_OFFSET  0x34
+#define KS2_AUTH_CMD   130
+
+/**
+ * k2_hs_bm_auth() - Invokes security functions using a
+ * proprietary TI interface. This binary and source for
+ * this is available in the secure development package or
+ * SECDEV. For details on how to access this please refer
+ * doc/README.ti-secure
+ *
+ * @cmd: Secure monitor command
+ * @arg1: Argument for command
+ *
+ * returns non-zero value on success, zero on error
+ */
+static int k2_hs_bm_auth(int cmd, void *arg1)
+{
+   int result;
+
+   asm volatile (
+   "stmfd  r13!, {r4-r12, lr}\n"
+   "mov r0, %1\n"
+   "mov r1, %2\n"
+   "smc #2\n"
+   "ldmfd r13!, {r4-r12, lr}\n"
+   : "=" (result)
+   : "r" (cmd), "r" (arg1)
+   : "cc", "r0", "r1", "memory");
+
+   return  result;
+}
+
+void board_fit_image_post_process(void **p_image, size_t *p_size)
+{
+   int result = 0;
+   void *image = *p_image;
+
+   if (strncmp(image + KS2_HS_SEC_TAG_OFFSET, "KEYS", 4)) {
+   printf("No signature found in image!\n");
+   hang();
+   }
+
+   result = k2_hs_bm_auth(KS2_AUTH_CMD, image);
+   if (result == 0) {
+   printf("Authentication failed!\n");
+   hang();
+   }
+
+   /*
+   * Overwrite the image headers after authentication
+   * and decryption. Update size to reflect removal
+   * of header.
+   */
+   memcpy(image, image + KS2_HS_SEC_HEADER_LEN, *p_size);
+   *p_size -= KS2_HS_SEC_HEADER_LEN;
+
+   /*
+* Output notification of successful authentication to re-assure the
+* user that the secure code is being processed as expected. However
+* suppress any such log output in case of building for SPL and booting
+* via YMODEM. This is done to avoid disturbing the YMODEM serial
+* protocol transactions.
+*/
+   if (!(IS_ENABLED(CONFIG_SPL_BUILD) &&
+ IS_ENABLED(CONFIG_SPL_YMODEM_SUPPORT) &&
+ spl_boot_device() == BOOT_DEVICE_UART))
+   printf("Authentication passed\n");
+}
+#endif
-- 
2.11.0

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[U-Boot] [PATCH v2 01/10] image: Fixes build warning with CONFIG_FIT_IMAGE_POST_PROCESS

[Andrew F. Davis]

From: Madan Srinivas 

The function 'board_fit_image_post_process' is defined only when the
config option CONFIG_FIT_IMAGE_POST_PROCESS is enabled. For secure
systems that do not use SPL but do use FIT kernel images, only
CONFIG_FIT_IMAGE_POST_PROCESS will be defined, which will result in an
implicit declaration of function 'board_fit_image_post_process' warning
while building u-boot. Fix this warning.

Signed-off-by: Madan Srinivas 
Signed-off-by: Andrew F. Davis 
Reviewed-by: Tom Rini 
---
 include/image.h | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/include/image.h b/include/image.h
index 2372518960..3f26f9bd1f 100644
--- a/include/image.h
+++ b/include/image.h
@@ -1256,7 +1256,8 @@ void android_print_contents(const struct andr_img_hdr 
*hdr);
  */
 int board_fit_config_name_match(const char *name);
 
-#ifdef CONFIG_SPL_FIT_IMAGE_POST_PROCESS
+#if defined(CONFIG_SPL_FIT_IMAGE_POST_PROCESS) || \
+   defined(CONFIG_FIT_IMAGE_POST_PROCESS)
 /**
  * board_fit_image_post_process() - Do any post-process on FIT binary data
  *
-- 
2.11.0

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[U-Boot] [PATCH] ti_armv7_common: env: Change FIT image name to match build name

[Andrew F. Davis]

The most common name for a FIT image containing a bootable kernel is
"fitImage", as our builds now use this name also, change this to the
default in our U-Boot environment.

Signed-off-by: Andrew F. Davis 
---
 include/configs/ti_armv7_common.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/configs/ti_armv7_common.h 
b/include/configs/ti_armv7_common.h
index a4ec4ce00a..ff5df2b95e 100644
--- a/include/configs/ti_armv7_common.h
+++ b/include/configs/ti_armv7_common.h
@@ -115,7 +115,7 @@
 #define DEFAULT_FIT_TI_ARGS \
"boot_fit=0\0" \
"fit_loadaddr=0x8800\0" \
-   "fit_bootfile=fitImage.itb\0" \
+   "fit_bootfile=fitImage\0" \
"update_to_fit=setenv loadaddr ${fit_loadaddr}; setenv bootfile 
${fit_bootfile}\0" \
"args_fit=setenv bootargs console=${console} \0" \
"loadfit=run args_fit; bootm ${loadaddr}#${fdtfile};\0" \
-- 
2.11.0

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[U-Boot] [PATCH] ti_armv7_common: env: Use args_mmc in FIT loading path

[Andrew F. Davis]

The env command 'args_fit' does not define a root path, this forces us to
embed the rootfs into the FIT image. FIT images do not need to contain a
rootfs, when they do not the kernel will fall-back to the kernel argument
'root', if this is not defined the kernel will not boot. It is safe to
add this as when we do have the rootfs in FIT this argument is ignored.
As 'loadfit' is only called from the MMC boot path, use 'args_mmc' to
correctly populate 'bootargs'.

Signed-off-by: Andrew F. Davis 
Reviewed-by: Lokesh Vutla 
---
 include/configs/ti_armv7_common.h | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/include/configs/ti_armv7_common.h 
b/include/configs/ti_armv7_common.h
index a4ec4ce00a..b2950efd47 100644
--- a/include/configs/ti_armv7_common.h
+++ b/include/configs/ti_armv7_common.h
@@ -117,8 +117,7 @@
"fit_loadaddr=0x8800\0" \
"fit_bootfile=fitImage.itb\0" \
"update_to_fit=setenv loadaddr ${fit_loadaddr}; setenv bootfile 
${fit_bootfile}\0" \
-   "args_fit=setenv bootargs console=${console} \0" \
-   "loadfit=run args_fit; bootm ${loadaddr}#${fdtfile};\0" \
+   "loadfit=run args_mmc; bootm ${loadaddr}#${fdtfile};\0" \
 
 /*
  * DDR information.  If the CONFIG_NR_DRAM_BANKS is not defined,
-- 
2.11.0

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Re: [U-Boot] [PATCH v4 15/19] drivers: fpga: Add compile switch for Gen5 only registers

[Dinh Nguyen]

On Wed, Apr 5, 2017 at 4:32 AM, Ley Foon Tan  wrote:
> These registers only available for Gen5 device, exclude them
> from Arria 10 build.
>
> Signed-off-by: Tien Fong Chee 
> Signed-off-by: Ley Foon Tan 
> ---
>  drivers/fpga/socfpga.c | 6 ++
>  1 file changed, 6 insertions(+)
>
> diff --git a/drivers/fpga/socfpga.c b/drivers/fpga/socfpga.c
> index f1b2f2c..3751574 100644
> --- a/drivers/fpga/socfpga.c
> +++ b/drivers/fpga/socfpga.c
> @@ -19,8 +19,10 @@ DECLARE_GLOBAL_DATA_PTR;
>
>  static struct socfpga_fpga_manager *fpgamgr_regs =
> (struct socfpga_fpga_manager *)SOCFPGA_FPGAMGRREGS_ADDRESS;
> +#if defined(CONFIG_TARGET_SOCFPGA_GEN5)
>  static struct socfpga_system_manager *sysmgr_regs =
> (struct socfpga_system_manager *)SOCFPGA_SYSMGR_ADDRESS;
> +#endif

The ordering of the patches is important. You shouldn't need this patch
because in patch #17, you wrapped the CONFIG_FPGA_SOCFPGA
define by a GEN5 build. So this shouldn't get compiled at all.

But then I had a comment as to why the need to remove the FPGA build
for A10.

Dinh
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Re: [U-Boot] [PATCH v4 17/19] arm: socfpga: Add config and defconfig for Arria 10

[Dinh Nguyen]

On Wed, Apr 5, 2017 at 4:32 AM, Ley Foon Tan  wrote:
> Add config and defconfig for the Arria10 and update socfpga_common.h.
>
> Signed-off-by: Tien Fong Chee 
> Signed-off-by: Ley Foon Tan 
> ---
>  configs/socfpga_arria10_defconfig   | 28 ++
>  include/configs/socfpga_arria10_socdk.h | 66 
> +
>  include/configs/socfpga_common.h| 28 +++---
>  3 files changed, 117 insertions(+), 5 deletions(-)
>  create mode 100644 configs/socfpga_arria10_defconfig
>  create mode 100644 include/configs/socfpga_arria10_socdk.h
>

[snip]

> +
> +/* Memory configurations  */
> +#define PHYS_SDRAM_1_SIZE  0x8000

For the HPS side, there's only 1GB on the devkit right?

> +
> +/* Ethernet on SoC (EMAC) */
> +#if defined(CONFIG_CMD_NET)
> +#define CONFIG_PHY_MICREL
> +#define CONFIG_PHY_MICREL_KSZ9031
> +#endif
> +
> +/*
> + * U-Boot environment configurations
> + */
> +#define CONFIG_ENV_IS_IN_MMC
> +
> +/*
> + * arguments passed to the bootz command. The value of
> + * CONFIG_BOOTARGS goes into the environment value "bootargs".
> + * Do note the value will overide also the chosen node in FDT blob.
> + */
> +#define CONFIG_BOOTARGS "console=ttyS0," __stringify(CONFIG_BAUDRATE)
> +
> +/*
> + * Serial / UART configurations
> + */
> +#define CONFIG_SYS_NS16550_MEM32
> +#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, 115200}
> +
> +/*
> + * L4 OSC1 Timer 0
> + */
> +/* reload value when timer count to zero */
> +#define TIMER_LOAD_VAL 0x
> +
> +/*
> + * Flash configurations
> + */
> +#define CONFIG_SYS_MAX_FLASH_BANKS 1
> +
> +/* The rest of the configuration is shared */
> +#include 
> +
> +#endif /* __CONFIG_SOCFGPA_ARRIA10_H__ */
> diff --git a/include/configs/socfpga_common.h 
> b/include/configs/socfpga_common.h
> index f93cd2e..85f8d62 100644
> --- a/include/configs/socfpga_common.h
> +++ b/include/configs/socfpga_common.h
> @@ -32,9 +32,13 @@
>  #define CONFIG_SYS_MALLOC_LEN  (64 * 1024 * 1024)
>  #define CONFIG_SYS_MEMTEST_START   PHYS_SDRAM_1
>  #define CONFIG_SYS_MEMTEST_END PHYS_SDRAM_1_SIZE
> -
> +#if defined(CONFIG_TARGET_SOCFPGA_GEN5)
>  #define CONFIG_SYS_INIT_RAM_ADDR   0x
>  #define CONFIG_SYS_INIT_RAM_SIZE   0x1
> +#elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
> +#define CONFIG_SYS_INIT_RAM_ADDR   0xFFE0
> +#define CONFIG_SYS_INIT_RAM_SIZE   0x4 /* 256KB */
> +#endif
>  #define CONFIG_SYS_INIT_SP_OFFSET  \
> (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
>  #define CONFIG_SYS_INIT_SP_ADDR\
> @@ -65,8 +69,10 @@
>  #define CONFIG_SYS_HOSTNAMECONFIG_SYS_BOARD
>  #endif
>
> +#if defined(CONFIG_TARGET_SOCFPGA_GEN5)
>  #define CONFIG_CMD_PXE
>  #define CONFIG_MENU
> +#endif

Why doesn't A10 support CMD_PXE and MENU?

>
>  /*
>   * Cache
> @@ -101,13 +107,14 @@
>  /*
>   * FPGA Driver
>   */
> +#ifdef CONFIG_TARGET_SOCFPGA_GEN5
>  #ifdef CONFIG_CMD_FPGA
>  #define CONFIG_FPGA
>  #define CONFIG_FPGA_ALTERA
>  #define CONFIG_FPGA_SOCFPGA
>  #define CONFIG_FPGA_COUNT  1
>  #endif
> -
> +#endif

Wouldn't you also need to include these for the A10?

>  /*
>   * L4 OSC1 Timer 0
>   */
> @@ -207,11 +214,14 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
>   */
>  #define CONFIG_SYS_NS16550_SERIAL
>  #define CONFIG_SYS_NS16550_REG_SIZE-4
> -#define CONFIG_SYS_NS16550_COM1SOCFPGA_UART0_ADDRESS
>  #ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET
>  #define CONFIG_SYS_NS16550_CLK 100
> -#else
> +#elif defined(CONFIG_TARGET_SOCFPGA_GEN5)
> +#define CONFIG_SYS_NS16550_COM1SOCFPGA_UART0_ADDRESS
>  #define CONFIG_SYS_NS16550_CLK 1
> +#elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
> +#define CONFIG_SYS_NS16550_COM1SOCFPGA_UART1_ADDRESS
> +#define CONFIG_SYS_NS16550_CLK 5000
>  #endif
>  #define CONFIG_CONS_INDEX  1
>
> @@ -298,7 +308,10 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
>   */
>  #define CONFIG_SPL_FRAMEWORK
>  #define CONFIG_SPL_TEXT_BASE   CONFIG_SYS_INIT_RAM_ADDR
> -#define CONFIG_SPL_MAX_SIZE(64 * 1024)
> +#define CONFIG_SPL_MAX_SIZECONFIG_SYS_INIT_RAM_SIZE
> +#if defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
> +#define CONFIG_SPL_BOARD_INIT
> +#endif

SPL_BOARD_INIT is defined in socfpga_common.h

>
>  /* SPL SDMMC boot support */
>  #ifdef CONFIG_SPL_MMC_SUPPORT
> @@ -346,10 +359,15 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
>  #define BOOT_TARGET_DEVICES_MMC(func)
>  #endif
>
> +#if defined(CONFIG_TARGET_SOCFPGA_GEN5)
>  #define BOOT_TARGET_DEVICES(func) \
> BOOT_TARGET_DEVICES_MMC(func) \
> BOOT_TARGET_DEVICES_PXE(func) \
> func(DHCP, dhcp, na)
> +#elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
> +#define BOOT_TARGET_DEVICES(func) \
> +   

Re: [U-Boot] [PATCH] defconfig: am43xx_hs_evm: Sync HS defconfig with non-HS defconfig

[Tom Rini]

On Fri, Apr 07, 2017 at 08:31:20AM -0500, Andrew F. Davis wrote:
> On 04/07/2017 08:23 AM, Tom Rini wrote:
> > On Fri, Apr 07, 2017 at 08:21:38AM -0500, Andrew F. Davis wrote:
> > 
> >> Ping?
> > 
> > Been waiting for a v2 of this, I'd assume it doesn't apply cleanly
> > and/or needs further additions.
> 
> It applied just fine 2 months ago when posted, why would you wait for a v2?

It did?  Sorry, this didn't get applied because either I got confused
with some other series or something else happened.

> I have about 5 other patches-sets pending like this, would you like me
> to v2 them all?

Yes, please.

> 
> >>
> >> On 02/07/2017 05:02 PM, Andrew F. Davis wrote:
> >>> The non-HS defconfig has been modified without equivalent changes being
> >>> applied to the HS defconfig. Sync these here.
> >>>
> >>> Signed-off-by: Andrew F. Davis 
> >>> ---
> >>>  configs/am43xx_hs_evm_defconfig | 8 ++--
> >>>  1 file changed, 6 insertions(+), 2 deletions(-)
> >>>
> >>> diff --git a/configs/am43xx_hs_evm_defconfig 
> >>> b/configs/am43xx_hs_evm_defconfig
> >>> index 8bb1b3535a..05365ee61a 100644
> >>> --- a/configs/am43xx_hs_evm_defconfig
> >>> +++ b/configs/am43xx_hs_evm_defconfig
> >>> @@ -10,12 +10,15 @@ CONFIG_FIT=y
> >>>  CONFIG_FIT_IMAGE_POST_PROCESS=y
> >>>  CONFIG_SPL_LOAD_FIT=y
> >>>  CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y
> >>> -CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=1, NAND"
> >>> +CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=1,NAND"
> >>>  CONFIG_SYS_CONSOLE_INFO_QUIET=y
> >>>  CONFIG_VERSION_VARIABLE=y
> >>>  CONFIG_SPL=y
> >>>  CONFIG_SPL_STACK_R=y
> >>> +CONFIG_SPL_ETH_SUPPORT=y
> >>>  CONFIG_SPL_MTD_SUPPORT=y
> >>> +CONFIG_SPL_NET_SUPPORT=y
> >>> +CONFIG_SPL_NET_VCI_STRING="AM43xx U-Boot SPL"
> >>>  CONFIG_HUSH_PARSER=y
> >>>  CONFIG_CMD_BOOTZ=y
> >>>  # CONFIG_CMD_IMLS is not set
> >>> @@ -41,6 +44,7 @@ CONFIG_CMD_FAT=y
> >>>  CONFIG_CMD_FS_GENERIC=y
> >>>  CONFIG_ISO_PARTITION=y
> >>>  CONFIG_OF_CONTROL=y
> >>> +CONFIG_OF_LIST="am437x-gp-evm am437x-sk-evm am43x-epos-evm 
> >>> am437x-idk-evm"
> >>>  CONFIG_DM=y
> >>>  # CONFIG_BLK is not set
> >>>  CONFIG_DFU_MMC=y
> >>> @@ -53,8 +57,8 @@ CONFIG_DM_MMC=y
> >>>  CONFIG_MMC_OMAP_HS=y
> >>>  CONFIG_DM_SPI_FLASH=y
> >>>  CONFIG_SPI_FLASH=y
> >>> +CONFIG_SPI_FLASH_BAR=y
> >>>  CONFIG_SPI_FLASH_MACRONIX=y
> >>> -CONFIG_DM_ETH=y
> >>>  CONFIG_DM_SERIAL=y
> >>>  CONFIG_SYS_NS16550=y
> >>>  CONFIG_DM_SPI=y
> >>>
> > 

-- 
Tom


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Re: [U-Boot] [PATCH 5/6] arm: sunxi: Use board hooks to obtain MAC address

[Olliver Schinagl]

Hey Joe,

On 30-11-16 22:36, Joe Hershberger wrote:

On Fri, Nov 25, 2016 at 9:38 AM, Olliver Schinagl  wrote:

Add board hooks allowing to get ethernet addresses in a board specific
manner. Currently this is done by generating a MAC address from
the SID and injecting the ethernet device number in the first octet.

This usually happens as a fallback, if either the eeprom fails to set a
MAC address or the FDT forces an override.

Signed-off-by: Olliver Schinagl 
---
 arch/arm/include/asm/arch-sunxi/sys_proto.h |  11 ++
 board/sunxi/board.c | 161 +++-
 net/eth_legacy.c|   1 +
 3 files changed, 98 insertions(+), 75 deletions(-)

diff --git a/arch/arm/include/asm/arch-sunxi/sys_proto.h 
b/arch/arm/include/asm/arch-sunxi/sys_proto.h
index a373319..fad7c48 100644
--- a/arch/arm/include/asm/arch-sunxi/sys_proto.h
+++ b/arch/arm/include/asm/arch-sunxi/sys_proto.h
@@ -30,4 +30,15 @@ void eth_init_board(void);
 static inline void eth_init_board(void) {}
 #endif

+int board_get_enetaddr(const int i, unsigned char *mac_addr);
+
+#if CONFIG_SUNXI_EMAC
+int sunxi_emac_board_read_rom_hwaddr(unsigned char *enetaddr, int id);
+#endif
+
+#if defined(CONFIG_SUNXI_GMAC) || defined(CONFIG_ETH_DESIGNWARE)
+int dw_board_read_rom_hwaddr(unsigned char *enetaddr, int id);
+#endif
+
+
 #endif
diff --git a/board/sunxi/board.c b/board/sunxi/board.c
index 5365638..4aeab51 100644
--- a/board/sunxi/board.c
+++ b/board/sunxi/board.c
@@ -21,6 +21,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #ifndef CONFIG_ARM64
 #include 
@@ -564,6 +565,34 @@ int g_dnl_board_usb_cable_connected(void)
 }
 #endif

+int sunxi_get_board_serial(unsigned int *serial)
+{
+   int ret;
+
+   ret = sunxi_get_sid(serial);
+   if (!ret || serial[0])
+   return -ENOSYS;
+
+   /*
+* The single words 1 - 3 of the SID have quite a few bits
+* which are the same on many models, so we take a crc32
+* of all 3 words, to get a more unique value.
+*
+* Note we only do this on newer SoCs as we cannot change
+* the algorithm on older SoCs since those have been using
+* fixed mac-addresses/serial based on only using word 3 for a
+* long time and changing a fixed mac-address/serial with an
+* u-boot update is not good.
+*/
+#if !defined(CONFIG_MACH_SUN4I) && !defined(CONFIG_MACH_SUN5I) && \
+!defined(CONFIG_MACH_SUN6I) && !defined(CONFIG_MACH_SUN7I) && \
+!defined(CONFIG_MACH_SUN8I_A23) && !defined(CONFIG_MACH_SUN8I_A33)
+   serial[3] = crc32(0, (unsigned char *)[1], 12);
+#endif
+
+   return 0;
+}
+
 #ifdef CONFIG_SERIAL_TAG
 void get_board_serial(struct tag_serialnr *serialnr)
 {
@@ -585,6 +614,54 @@ void get_board_serial(struct tag_serialnr *serialnr)
 #endif

 /*
+ * Generate a MAC address based on device index and the serial number.
+ * The first half of the of the first octet holds the eth index.
+ *
+ * In the second octet we forcefully mark the MAC address to a locally
+ * administered MAC address.
+ *
+ */
+int board_get_enetaddr(const int index, unsigned char *enetaddr)


This would be part of a board-specific eth driver.


this is being called now from sunxi_gmac.c and sunxi_emac.c and supplies 
these board specific drivers with a mac address based on the serial 
number of the board. I could move this logic over, but then i'd have to 
add it to both eth drivers. By having it in the board.c file, we have 2 
simple functions in the board-specific eth driver:



static int sunxi_gmac_eth_read_rom_hwaddr(struct udevice *dev)
{
struct eth_pdata *pdata = dev_get_platdata(dev);

return board_get_enetaddr(dev->seq, pdata->enetaddr);
}

So do you propose to dupilicate the code into both board specific 
drivers, have it named differently or that the shared code live elsewhere?


Olliver



+{
+   uint8_t mac_addr[ARP_HLEN] = { 0x00 };
+   unsigned int serial[4];
+   int ret;
+
+   if ((index < 0) || !enetaddr)
+   return -ENOSYS;
+
+   ret = sunxi_get_board_serial(serial);
+   if (!ret)
+   return ret;
+
+   /* Ensure the NIC specific bytes of the mac are not all 0 */
+   if ((serial[3] & 0xff) == 0)
+   serial[3] |= 0x80;
+
+   mac_addr[0] = (index << 4);
+   mac_addr[1] = (serial[0] >>  0) & 0xff;
+   mac_addr[2] = (serial[3] >> 24) & 0xff;
+   mac_addr[3] = (serial[3] >> 16) & 0xff;
+   mac_addr[4] = (serial[3] >>  8) & 0xff;
+   mac_addr[5] = (serial[3] >>  0) & 0xff;
+
+   set_local_ethaddr(mac_addr);
+   memcpy(enetaddr, mac_addr, ARP_HLEN);
+
+   return 0;
+}
+
+int sunxi_emac_board_read_rom_hwaddr(unsigned char *enetaddr, int id)
+{
+   return board_get_enetaddr(id, enetaddr);
+}
+
+int dw_board_read_rom_hwaddr(unsigned char *enetaddr, int id)
+{
+   return board_get_enetaddr(id, 

Re: [U-Boot] [PATCH] defconfig: am43xx_hs_evm: Sync HS defconfig with non-HS defconfig

[Andrew F. Davis]

On 04/07/2017 08:23 AM, Tom Rini wrote:
> On Fri, Apr 07, 2017 at 08:21:38AM -0500, Andrew F. Davis wrote:
> 
>> Ping?
> 
> Been waiting for a v2 of this, I'd assume it doesn't apply cleanly
> and/or needs further additions.
> 

It applied just fine 2 months ago when posted, why would you wait for a v2?

I have about 5 other patches-sets pending like this, would you like me
to v2 them all?

>>
>> On 02/07/2017 05:02 PM, Andrew F. Davis wrote:
>>> The non-HS defconfig has been modified without equivalent changes being
>>> applied to the HS defconfig. Sync these here.
>>>
>>> Signed-off-by: Andrew F. Davis 
>>> ---
>>>  configs/am43xx_hs_evm_defconfig | 8 ++--
>>>  1 file changed, 6 insertions(+), 2 deletions(-)
>>>
>>> diff --git a/configs/am43xx_hs_evm_defconfig 
>>> b/configs/am43xx_hs_evm_defconfig
>>> index 8bb1b3535a..05365ee61a 100644
>>> --- a/configs/am43xx_hs_evm_defconfig
>>> +++ b/configs/am43xx_hs_evm_defconfig
>>> @@ -10,12 +10,15 @@ CONFIG_FIT=y
>>>  CONFIG_FIT_IMAGE_POST_PROCESS=y
>>>  CONFIG_SPL_LOAD_FIT=y
>>>  CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y
>>> -CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=1, NAND"
>>> +CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=1,NAND"
>>>  CONFIG_SYS_CONSOLE_INFO_QUIET=y
>>>  CONFIG_VERSION_VARIABLE=y
>>>  CONFIG_SPL=y
>>>  CONFIG_SPL_STACK_R=y
>>> +CONFIG_SPL_ETH_SUPPORT=y
>>>  CONFIG_SPL_MTD_SUPPORT=y
>>> +CONFIG_SPL_NET_SUPPORT=y
>>> +CONFIG_SPL_NET_VCI_STRING="AM43xx U-Boot SPL"
>>>  CONFIG_HUSH_PARSER=y
>>>  CONFIG_CMD_BOOTZ=y
>>>  # CONFIG_CMD_IMLS is not set
>>> @@ -41,6 +44,7 @@ CONFIG_CMD_FAT=y
>>>  CONFIG_CMD_FS_GENERIC=y
>>>  CONFIG_ISO_PARTITION=y
>>>  CONFIG_OF_CONTROL=y
>>> +CONFIG_OF_LIST="am437x-gp-evm am437x-sk-evm am43x-epos-evm am437x-idk-evm"
>>>  CONFIG_DM=y
>>>  # CONFIG_BLK is not set
>>>  CONFIG_DFU_MMC=y
>>> @@ -53,8 +57,8 @@ CONFIG_DM_MMC=y
>>>  CONFIG_MMC_OMAP_HS=y
>>>  CONFIG_DM_SPI_FLASH=y
>>>  CONFIG_SPI_FLASH=y
>>> +CONFIG_SPI_FLASH_BAR=y
>>>  CONFIG_SPI_FLASH_MACRONIX=y
>>> -CONFIG_DM_ETH=y
>>>  CONFIG_DM_SERIAL=y
>>>  CONFIG_SYS_NS16550=y
>>>  CONFIG_DM_SPI=y
>>>
> 
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Re: [U-Boot] [PATCH] defconfig: am43xx_hs_evm: Sync HS defconfig with non-HS defconfig

[Tom Rini]

On Fri, Apr 07, 2017 at 08:21:38AM -0500, Andrew F. Davis wrote:

> Ping?

Been waiting for a v2 of this, I'd assume it doesn't apply cleanly
and/or needs further additions.

> 
> On 02/07/2017 05:02 PM, Andrew F. Davis wrote:
> > The non-HS defconfig has been modified without equivalent changes being
> > applied to the HS defconfig. Sync these here.
> > 
> > Signed-off-by: Andrew F. Davis 
> > ---
> >  configs/am43xx_hs_evm_defconfig | 8 ++--
> >  1 file changed, 6 insertions(+), 2 deletions(-)
> > 
> > diff --git a/configs/am43xx_hs_evm_defconfig 
> > b/configs/am43xx_hs_evm_defconfig
> > index 8bb1b3535a..05365ee61a 100644
> > --- a/configs/am43xx_hs_evm_defconfig
> > +++ b/configs/am43xx_hs_evm_defconfig
> > @@ -10,12 +10,15 @@ CONFIG_FIT=y
> >  CONFIG_FIT_IMAGE_POST_PROCESS=y
> >  CONFIG_SPL_LOAD_FIT=y
> >  CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y
> > -CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=1, NAND"
> > +CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=1,NAND"
> >  CONFIG_SYS_CONSOLE_INFO_QUIET=y
> >  CONFIG_VERSION_VARIABLE=y
> >  CONFIG_SPL=y
> >  CONFIG_SPL_STACK_R=y
> > +CONFIG_SPL_ETH_SUPPORT=y
> >  CONFIG_SPL_MTD_SUPPORT=y
> > +CONFIG_SPL_NET_SUPPORT=y
> > +CONFIG_SPL_NET_VCI_STRING="AM43xx U-Boot SPL"
> >  CONFIG_HUSH_PARSER=y
> >  CONFIG_CMD_BOOTZ=y
> >  # CONFIG_CMD_IMLS is not set
> > @@ -41,6 +44,7 @@ CONFIG_CMD_FAT=y
> >  CONFIG_CMD_FS_GENERIC=y
> >  CONFIG_ISO_PARTITION=y
> >  CONFIG_OF_CONTROL=y
> > +CONFIG_OF_LIST="am437x-gp-evm am437x-sk-evm am43x-epos-evm am437x-idk-evm"
> >  CONFIG_DM=y
> >  # CONFIG_BLK is not set
> >  CONFIG_DFU_MMC=y
> > @@ -53,8 +57,8 @@ CONFIG_DM_MMC=y
> >  CONFIG_MMC_OMAP_HS=y
> >  CONFIG_DM_SPI_FLASH=y
> >  CONFIG_SPI_FLASH=y
> > +CONFIG_SPI_FLASH_BAR=y
> >  CONFIG_SPI_FLASH_MACRONIX=y
> > -CONFIG_DM_ETH=y
> >  CONFIG_DM_SERIAL=y
> >  CONFIG_SYS_NS16550=y
> >  CONFIG_DM_SPI=y
> > 

-- 
Tom


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Re: [U-Boot] [PATCH v2] Add 16-bit single register pin controller support

[Felix Brack]

Hello James,

Sorry I missed your followup. Please always send to 'everybody' and not
just the list.
You should though read my comment as there is some more work to be done.

regards Felix

On 07.04.2017 03:44, James Balean wrote:
> Apologies! Just noticed I submitted the untested patch update. I'll
> gather suggestions on this (note that 'size' in the first switch should
> be 'width' and there's a trailing bracket missing), then submit a
> (hopefully) final version.
> 
> James
> 
> ___
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Re: [U-Boot] [PATCH] defconfig: am43xx_hs_evm: Sync HS defconfig with non-HS defconfig

[Andrew F. Davis]

Ping?

On 02/07/2017 05:02 PM, Andrew F. Davis wrote:
> The non-HS defconfig has been modified without equivalent changes being
> applied to the HS defconfig. Sync these here.
> 
> Signed-off-by: Andrew F. Davis 
> ---
>  configs/am43xx_hs_evm_defconfig | 8 ++--
>  1 file changed, 6 insertions(+), 2 deletions(-)
> 
> diff --git a/configs/am43xx_hs_evm_defconfig b/configs/am43xx_hs_evm_defconfig
> index 8bb1b3535a..05365ee61a 100644
> --- a/configs/am43xx_hs_evm_defconfig
> +++ b/configs/am43xx_hs_evm_defconfig
> @@ -10,12 +10,15 @@ CONFIG_FIT=y
>  CONFIG_FIT_IMAGE_POST_PROCESS=y
>  CONFIG_SPL_LOAD_FIT=y
>  CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y
> -CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=1, NAND"
> +CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=1,NAND"
>  CONFIG_SYS_CONSOLE_INFO_QUIET=y
>  CONFIG_VERSION_VARIABLE=y
>  CONFIG_SPL=y
>  CONFIG_SPL_STACK_R=y
> +CONFIG_SPL_ETH_SUPPORT=y
>  CONFIG_SPL_MTD_SUPPORT=y
> +CONFIG_SPL_NET_SUPPORT=y
> +CONFIG_SPL_NET_VCI_STRING="AM43xx U-Boot SPL"
>  CONFIG_HUSH_PARSER=y
>  CONFIG_CMD_BOOTZ=y
>  # CONFIG_CMD_IMLS is not set
> @@ -41,6 +44,7 @@ CONFIG_CMD_FAT=y
>  CONFIG_CMD_FS_GENERIC=y
>  CONFIG_ISO_PARTITION=y
>  CONFIG_OF_CONTROL=y
> +CONFIG_OF_LIST="am437x-gp-evm am437x-sk-evm am43x-epos-evm am437x-idk-evm"
>  CONFIG_DM=y
>  # CONFIG_BLK is not set
>  CONFIG_DFU_MMC=y
> @@ -53,8 +57,8 @@ CONFIG_DM_MMC=y
>  CONFIG_MMC_OMAP_HS=y
>  CONFIG_DM_SPI_FLASH=y
>  CONFIG_SPI_FLASH=y
> +CONFIG_SPI_FLASH_BAR=y
>  CONFIG_SPI_FLASH_MACRONIX=y
> -CONFIG_DM_ETH=y
>  CONFIG_DM_SERIAL=y
>  CONFIG_SYS_NS16550=y
>  CONFIG_DM_SPI=y
> 
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Re: [U-Boot] [PATCH v2] Add 16-bit single register pin controller support

[Felix Brack]

Hello James,

This patch does not compile without errors.

On 06.04.2017 07:38, James Balean wrote:
> Enables the pinctrl-single driver to support 16-bit registers. Only
> 32-bit registers were supported previously. Reduced width registers are
> required for some platforms, such as OMAP.
> 
> Signed-off-by: James Balean 
> Cc: Felix Brack 
> Cc: Simon Glass 
> ---
> Changes for v2:
>   - Added explanation of why this patch is needed.
>   - Changed fdt32_t to ulong type.
>   - Removed 8-bit support.
>   - Now with a single read and write function, instead of one for each
> register width.
> 
>  drivers/pinctrl/pinctrl-single.c | 45 
> ++--
>  1 file changed, 30 insertions(+), 15 deletions(-)
> 
> diff --git a/drivers/pinctrl/pinctrl-single.c 
> b/drivers/pinctrl/pinctrl-single.c
> index d2dcec0..defb66f 100644
> --- a/drivers/pinctrl/pinctrl-single.c
> +++ b/drivers/pinctrl/pinctrl-single.c
> @@ -24,6 +24,30 @@ struct single_fdt_pin_cfg {
>   fdt32_t val;/* configuration register value */
>  };
>  
> +static ulong single_read(ulong reg, int width) {
> + switch (size) {

Use 'width' instead of 'size' here.

> + case 16:
> + return readw(reg);
> + case 32:
> + return readl(reg);
> + default:
> + dev_warn(dev, "unsupported register width %i\n", width);

This function must return a value. What would you return here, i.e., in
case of failure?

> + }
> +}
> +
> +static void single_write(ulong val, ulong reg, int width) {
> + switch (width) {
> + case 16:
> + writew(val, reg);
> + break;
> + case 32:
> + writel(val, reg);
> + break;
> + default:
> + dev_warn(dev, "unsupported register width %i\n", width;

Missing closing parentheses.

> + }
> +}
> +
>  /**
>   * single_configure_pins() - Configure pins based on FDT data
>   *
> @@ -47,28 +71,19 @@ static int single_configure_pins(struct udevice *dev,
>   int n, reg;
>   u32 val;
>  
> - for (n = 0; n < count; n++) {
> + for (n = 0; n < count; n++, pins++) {
>   reg = fdt32_to_cpu(pins->reg);
>   if ((reg < 0) || (reg > pdata->offset)) {
>   dev_dbg(dev, "  invalid register offset 0x%08x\n", reg);
> - pins++;
>   continue;
>   }
>   reg += pdata->base;
> - switch (pdata->width) {
> - case 32:
> - val = readl(reg) & ~pdata->mask;
> - val |= fdt32_to_cpu(pins->val) & pdata->mask;
> - writel(val, reg);
> - dev_dbg(dev, "  reg/val 0x%08x/0x%08x\n",
> - reg, val);
> - break;
> - default:
> - dev_warn(dev, "unsupported register width %i\n",
> -  pdata->width);
> - }
> - pins++;
> + val = single_read(reg, pdata->width) & ~pdata->mask;

This is a no go as 'single_read' may fail (see above). You will have to
check the return value.
This is another reason for witch again I suggest you just keep the
switch statement as it was.

> + val |= fdt32_to_cpu(pins->val) & pdata->mask;
> + single_write(val, reg, pdata->width);
> + dev_dbg(dev, "  reg/val 0x%08x/0x%08x\n", reg, val);
>   }
> +
>   return 0;
>  }
>  
> 

IMHO: You should make sure your patch is syntactically correct i.e. at
least run a build cycle. Furthermore and specifically for this patch (as
it directly deals with hardware registers) you should test it for '16
bit width' on your hardware.

regards Felix
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Re: [U-Boot] [PATCH] env_mmc: Allow SPL to use any MMC device to load/save the environment

[Jean-Jacques Hiblot]

On 14/02/2017 19:52, Tom Rini wrote:

On Tue, Feb 14, 2017 at 02:16:13PM +0100, Jean-Jacques Hiblot wrote:


Hi Tom,

Have you had a chance to look at the patch below?

It looks fine but was too close to the release window (given the
potential impact) to merge.  Thanks!

Hi Tom,

Don't want to pester you. I'm just checking on the status regarding this 
patch. Without it the environment is not accessible in the SPL for the 
omap platforms and we rely on the environment for the falcon boot.


Jean-Jacques



Jean-Jacques


On 01/02/2017 11:26, Jean-Jacques Hiblot wrote:

SPL has been restricted to use only dev 0 based on the assumption that only
one MMC device is registered. This is not always the case and many
platforms now register several devices as expected by the spl mmc boot code
For those platform SPL_ENV_SUPPORT is broken if dev is forced to 0.

A word of warning: this commit may break SPL_ENV_SUPPORT on platforms that
do not register the same MMC controllers in SPL and in u-boot (mostly iMX6
based platforms). Fortunately none of those activate SPL_ENV_SUPPORT in
their default configuration.

Signed-off-by: Jean-Jacques Hiblot 
---
  common/env_mmc.c | 15 ---
  1 file changed, 15 deletions(-)

diff --git a/common/env_mmc.c b/common/env_mmc.c
index 16f6a17..a5d14d4 100644
--- a/common/env_mmc.c
+++ b/common/env_mmc.c
@@ -82,10 +82,6 @@ static int mmc_set_env_part(struct mmc *mmc)
int dev = mmc_get_env_dev();
int ret = 0;
-#ifdef CONFIG_SPL_BUILD
-   dev = 0;
-#endif
-
env_mmc_orig_hwpart = mmc_get_blk_desc(mmc)->hwpart;
ret = blk_select_hwpart_devnum(IF_TYPE_MMC, dev, part);
if (ret)
@@ -116,9 +112,6 @@ static void fini_mmc_for_env(struct mmc *mmc)
  #ifdef CONFIG_SYS_MMC_ENV_PART
int dev = mmc_get_env_dev();
-#ifdef CONFIG_SPL_BUILD
-   dev = 0;
-#endif
blk_select_hwpart_devnum(IF_TYPE_MMC, dev, env_mmc_orig_hwpart);
  #endif
  }
@@ -223,10 +216,6 @@ void env_relocate_spec(void)
ALLOC_CACHE_ALIGN_BUFFER(env_t, tmp_env1, 1);
ALLOC_CACHE_ALIGN_BUFFER(env_t, tmp_env2, 1);
-#ifdef CONFIG_SPL_BUILD
-   dev = 0;
-#endif
-
mmc = find_mmc_device(dev);
errmsg = init_mmc_for_env(mmc);
@@ -306,10 +295,6 @@ void env_relocate_spec(void)
int dev = mmc_get_env_dev();
const char *errmsg;
-#ifdef CONFIG_SPL_BUILD
-   dev = 0;
-#endif
-
mmc = find_mmc_device(dev);
errmsg = init_mmc_for_env(mmc);


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[U-Boot] [PATCH v2 08/10] scsi: move the partition initialization out of the scsi detection

[Jean-Jacques Hiblot]

We might want to get information about the scsi device without initializing the 
partition.

Signed-off-by: Jean-Jacques Hiblot 
---
 common/scsi.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/common/scsi.c b/common/scsi.c
index d55ba89..972ef338 100644
--- a/common/scsi.c
+++ b/common/scsi.c
@@ -540,7 +540,6 @@ static int scsi_detect_dev(int target, int lun, struct 
blk_desc *dev_desc)
dev_desc->blksz = blksz;
dev_desc->log2blksz = LOG2(dev_desc->blksz);
dev_desc->type = perq;
-   part_init(_desc[0]);
 removable:
return 0;
 }
@@ -605,6 +604,7 @@ int scsi_scan(int mode)
device_unbind(bdev);
continue;
}
+   part_init(bdesc);
 
if (mode == 1) {
printf("  Device %d: ", 0);
@@ -634,6 +634,7 @@ int scsi_scan(int mode)
  _dev_desc[scsi_max_devs]);
if (ret)
continue;
+   part_init(_dev_desc[scsi_max_devs]);
 
if (mode == 1) {
printf("  Device %d: ", 0);
-- 
1.9.1

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[U-Boot] [PATCH v2 04/10] drivers: phy: add PIPE3 phy driver

[Jean-Jacques Hiblot]

This phy is found on omap platforms with sata capabilities.
Except for the part related to the DM and the PHY framework, the code is
basically a copy paste from arch/arm/mach-omap2/pipe3-phy.c

Signed-off-by: Jean-Jacques Hiblot 
---
 drivers/phy/Kconfig|  12 ++
 drivers/phy/Makefile   |   1 +
 drivers/phy/ti-pipe3-phy.c | 368 +
 3 files changed, 381 insertions(+)
 create mode 100644 drivers/phy/ti-pipe3-phy.c

diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index b6fed9e..6a48343 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -19,4 +19,16 @@ config SPL_GENERIC_PHY
  This framework is designed to provide a generic interface for PHY
  devices.
 
+config PIPE3_PHY
+   bool "Support omap's PIPE3 PHY"
+   depends on GENERIC_PHY
+   help
+ Support for the omap PIPE3 phy for sata
+
+config SPL_PIPE3_PHY
+   bool "Support omap's PIPE3 PHY in SPL"
+   depends on SPL_GENERIC_PHY
+   help
+ Support for the omap PIPE3 phy for sata in SPL
+
 endmenu
diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index ccd15ed..60c8a56 100644
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -1,4 +1,5 @@
 obj-$(CONFIG_$(SPL_)GENERIC_PHY) += phy-uclass.o
+obj-$(CONFIG_$(SPL_)PIPE3_PHY) += ti-pipe3-phy.o
 
 ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),)
 obj-y += marvell/
diff --git a/drivers/phy/ti-pipe3-phy.c b/drivers/phy/ti-pipe3-phy.c
new file mode 100644
index 000..94942d3
--- /dev/null
+++ b/drivers/phy/ti-pipe3-phy.c
@@ -0,0 +1,368 @@
+/*
+ * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/
+ * Written by Jean-Jacques Hiblot  
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/* PLLCTRL Registers */
+#define PLL_STATUS  0x0004
+#define PLL_GO  0x0008
+#define PLL_CONFIGURATION1  0x000C
+#define PLL_CONFIGURATION2  0x0010
+#define PLL_CONFIGURATION3  0x0014
+#define PLL_CONFIGURATION4  0x0020
+
+#define PLL_REGM_MASK   0x001FFE00
+#define PLL_REGM_SHIFT  9
+#define PLL_REGM_F_MASK 0x0003
+#define PLL_REGM_F_SHIFT0
+#define PLL_REGN_MASK   0x01FE
+#define PLL_REGN_SHIFT  1
+#define PLL_SELFREQDCO_MASK 0x000E
+#define PLL_SELFREQDCO_SHIFT1
+#define PLL_SD_MASK 0x0003FC00
+#define PLL_SD_SHIFT10
+#define SET_PLL_GO  0x1
+#define PLL_TICOPWDNBIT(16)
+#define PLL_LDOPWDN BIT(15)
+#define PLL_LOCK0x2
+#define PLL_IDLE0x1
+
+/* Software rest for the SATA PLL (in CTRL_CORE_SMA_SW_0 register)*/
+#define SATA_PLL_SOFT_RESET (1<<18)
+
+/* PHY POWER CONTROL Register */
+#define OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_CMD_MASK 0x003FC000
+#define OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_CMD_SHIFT0xE
+
+#define OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_FREQ_MASK0xFFC0
+#define OMAP_CTRL_PIPE3_PHY_PWRCTL_CLK_FREQ_SHIFT   0x16
+
+#define OMAP_CTRL_PIPE3_PHY_TX_RX_POWERON   0x3
+#define OMAP_CTRL_PIPE3_PHY_TX_RX_POWEROFF  0x0
+
+
+#define PLL_IDLE_TIME   100 /* in milliseconds */
+#define PLL_LOCK_TIME   100 /* in milliseconds */
+
+struct omap_pipe3 {
+   void __iomem*pll_ctrl_base;
+   void __iomem*power_reg;
+   void __iomem*pll_reset_reg;
+   struct pipe3_dpll_map   *dpll_map;
+};
+
+
+struct pipe3_dpll_params {
+   u16 m;
+   u8  n;
+   u8  freq:3;
+   u8  sd;
+   u32 mf;
+};
+
+struct pipe3_dpll_map {
+   unsigned long rate;
+   struct pipe3_dpll_params params;
+};
+
+static inline u32 omap_pipe3_readl(void __iomem *addr, unsigned offset)
+{
+   return readl(addr + offset);
+}
+
+static inline void omap_pipe3_writel(void __iomem *addr, unsigned offset,
+   u32 data)
+{
+   writel(data, addr + offset);
+}
+
+static struct pipe3_dpll_params *omap_pipe3_get_dpll_params(struct omap_pipe3
+   *pipe3)
+{
+   u32 rate;
+   struct pipe3_dpll_map *dpll_map = pipe3->dpll_map;
+
+   rate = get_sys_clk_freq();
+
+   for (; dpll_map->rate; dpll_map++) {
+   if (rate == dpll_map->rate)
+   return _map->params;
+   }
+
+   printf("%s: No DPLL configuration for %u Hz SYS CLK\n",
+  __func__, rate);
+   return NULL;
+}
+
+static int omap_pipe3_wait_lock(struct omap_pipe3 *pipe3)
+{
+   u32 val;
+   int timeout = PLL_LOCK_TIME;
+
+   do {
+   mdelay(1);
+   val = 

[U-Boot] [PATCH v2 06/10] drivers: block: dwc_ahci: Implement a driver for Synopsys DWC sata device

[Jean-Jacques Hiblot]

From: Mugunthan V N 

Implement a sata driver for Synopsys DWC sata device based on
U-boot driver model.

Signed-off-by: Mugunthan V N 
Signed-off-by: Jean-Jacques Hiblot 
---
 drivers/block/Kconfig|  10 +
 drivers/block/Makefile   |   1 +
 drivers/block/dwc_ahci.c | 100 +++
 3 files changed, 111 insertions(+)
 create mode 100644 drivers/block/dwc_ahci.c

diff --git a/drivers/block/Kconfig b/drivers/block/Kconfig
index 88e66e2..b3d35bd 100644
--- a/drivers/block/Kconfig
+++ b/drivers/block/Kconfig
@@ -48,4 +48,14 @@ config SATA_CEVA
  ZynqMP. Support up to 2 external devices. Complient with SATA 3.1 and
  AHCI 1.3 specifications with hot-plug detect feature.
 
+
+config DWC_AHCI
+   bool "Enable Synopsys DWC AHCI driver support"
+   select SCSI_AHCI
+   select GENERIC_PHY
+   depends on DM_SCSI
+   help
+ Enable this driver to support Sata devices through
+ Synopsys DWC AHCI module.
+
 endmenu
diff --git a/drivers/block/Makefile b/drivers/block/Makefile
index a72feec..cffe498 100644
--- a/drivers/block/Makefile
+++ b/drivers/block/Makefile
@@ -11,6 +11,7 @@ ifndef CONFIG_BLK
 obj-y += blk_legacy.o
 endif
 
+obj-$(CONFIG_DWC_AHCI) += dwc_ahci.o
 obj-$(CONFIG_AHCI) += ahci-uclass.o
 obj-$(CONFIG_DM_SCSI) += scsi-uclass.o
 obj-$(CONFIG_SCSI_AHCI) += ahci.o
diff --git a/drivers/block/dwc_ahci.c b/drivers/block/dwc_ahci.c
new file mode 100644
index 000..bf44946
--- /dev/null
+++ b/drivers/block/dwc_ahci.c
@@ -0,0 +1,100 @@
+/*
+ * DWC SATA platform driver
+ *
+ * (C) Copyright 2016
+ * Texas Instruments Incorporated, 
+ *
+ * Author: Mugunthan V N 
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct dwc_ahci_priv {
+   void *base;
+   void *wrapper_base;
+};
+
+static int dwc_ahci_ofdata_to_platdata(struct udevice *dev)
+{
+   struct dwc_ahci_priv *priv = dev_get_priv(dev);
+   struct scsi_platdata *plat = dev_get_platdata(dev);
+   fdt_addr_t addr;
+
+   plat->max_id = fdtdec_get_uint(gd->fdt_blob, dev->of_offset, "max-id",
+  CONFIG_SYS_SCSI_MAX_SCSI_ID);
+   plat->max_lun = fdtdec_get_uint(gd->fdt_blob, dev->of_offset,
+   "max-lun", CONFIG_SYS_SCSI_MAX_LUN);
+
+   priv->base = map_physmem(dev_get_addr(dev), sizeof(void *),
+MAP_NOCACHE);
+
+   addr = dev_get_addr_index(dev, 1);
+   if (addr != FDT_ADDR_T_NONE) {
+   priv->wrapper_base = map_physmem(addr, sizeof(void *),
+MAP_NOCACHE);
+   } else {
+   priv->wrapper_base = NULL;
+   }
+
+   return 0;
+}
+
+static int dwc_ahci_probe(struct udevice *dev)
+{
+   struct dwc_ahci_priv *priv = dev_get_priv(dev);
+   int ret;
+   struct generic_phy *phy = dm_generic_phy_get(dev, "phys");
+
+   if (IS_ERR(phy)) {
+   error("can't get the phy from DT\n");
+   return PTR_ERR(phy);
+   }
+
+   ret = generic_phy_init(phy);
+   if (ret) {
+   error("unable to initialize the sata phy\n");
+   return ret;
+   }
+
+   ret = generic_phy_power_on(phy);
+   if (ret) {
+   error("unable to power on the sata phy\n");
+   return ret;
+   }
+
+   if (priv->wrapper_base) {
+   u32 val = TI_SATA_IDLE_NO | TI_SATA_STANDBY_NO;
+
+   /* Enable SATA module, No Idle, No Standby */
+   writel(val, priv->wrapper_base + TI_SATA_SYSCONFIG);
+   }
+
+   return ahci_init(priv->base);
+}
+
+static const struct udevice_id dwc_ahci_ids[] = {
+   { .compatible = "snps,dwc-ahci" },
+   { }
+};
+
+U_BOOT_DRIVER(dwc_ahci) = {
+   .name   = "dwc_ahci",
+   .id = UCLASS_SCSI,
+   .of_match = dwc_ahci_ids,
+   .ofdata_to_platdata = dwc_ahci_ofdata_to_platdata,
+   .probe  = dwc_ahci_probe,
+   .priv_auto_alloc_size = sizeof(struct dwc_ahci_priv),
+   .platdata_auto_alloc_size = sizeof(struct scsi_platdata),
+   .flags = DM_FLAG_ALLOC_PRIV_DMA,
+};
-- 
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[U-Boot] [PATCH v2 09/10] dm: scsi: fix divide-by-0 error in scsi_scan()

[Jean-Jacques Hiblot]

With DM_SCSI enabled, blk_create_devicef() is called with blkz = 0, leading
to a divide-by-0 exception.
scsi_detect_dev() can be used to get the required parameters (block size
and number of blocks) from the drive before calling blk_create_devicef().

Signed-off-by: Jean-Jacques Hiblot 
---
 common/scsi.c | 35 ++-
 1 file changed, 26 insertions(+), 9 deletions(-)

diff --git a/common/scsi.c b/common/scsi.c
index 972ef338..d37222c 100644
--- a/common/scsi.c
+++ b/common/scsi.c
@@ -580,9 +580,19 @@ int scsi_scan(int mode)
for (lun = 0; lun < plat->max_lun; lun++) {
struct udevice *bdev; /* block device */
/* block device description */
+   struct blk_desc _bd;
struct blk_desc *bdesc;
char str[10];
 
+   scsi_init_dev_desc_priv(&_bd);
+   ret = scsi_detect_dev(i, lun, &_bd);
+   if (ret)
+   /*
+* no device detected?
+* check the next lun.
+*/
+   continue;
+
/*
 * Create only one block device and do detection
 * to make sure that there won't be a lot of
@@ -590,20 +600,27 @@ int scsi_scan(int mode)
 */
snprintf(str, sizeof(str), "id%dlun%d", i, lun);
ret = blk_create_devicef(dev, "scsi_blk",
- str, IF_TYPE_SCSI,
- -1, 0, 0, );
+   str, IF_TYPE_SCSI,
+   -1,
+   _bd.blksz,
+   _bd.blksz * _bd.lba,
+   );
if (ret) {
debug("Can't create device\n");
return ret;
}
-   bdesc = dev_get_uclass_platdata(bdev);
 
-   scsi_init_dev_desc_priv(bdesc);
-   ret = scsi_detect_dev(i, lun, bdesc);
-   if (ret) {
-   device_unbind(bdev);
-   continue;
-   }
+   bdesc = dev_get_uclass_platdata(bdev);
+   bdesc->target = i;
+   bdesc->lun = lun;
+   bdesc->removable = _bd.removable;
+   bdesc->type = _bd.type;
+   memcpy(>vendor, &_bd.vendor,
+  sizeof(_bd.vendor));
+   memcpy(>product, &_bd.product,
+  sizeof(_bd.product));
+   memcpy(>revision, &_bd.revision,
+  sizeof(_bd.revision));
part_init(bdesc);
 
if (mode == 1) {
-- 
1.9.1

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[U-Boot] [PATCH v2 02/10] arm: omap: sata: compile out board-level sata code when CONFIG_DM_SCSI is defined

[Jean-Jacques Hiblot]

When CONFIG_DM_SCSI is defined, the SATA initialization will be implemented
in the scsi-uclass driver.

Signed-off-by: Jean-Jacques Hiblot 
---
 Instead of compiling out the code inside the C file, let's just not compile 
the files at all.

 arch/arm/mach-omap2/Makefile | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index e814eb0..aa3986d 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -29,9 +29,11 @@ obj-y+= abb.o
 endif
 
 ifneq ($(CONFIG_OMAP54XX),)
+ifeq ($(CONFIG_DM_SCSI),)
 obj-y  += pipe3-phy.o
 obj-$(CONFIG_SCSI_AHCI_PLAT) += sata.o
 endif
+endif
 
 ifeq ($(CONFIG_SYS_DCACHE_OFF),)
 obj-y  += omap-cache.o
-- 
1.9.1

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[U-Boot] [PATCH 3/3] ls104xardb: Secure Boot: enable PPA support for eMMC/SD and NAND boot

[Sumit Garg]

Signed-off-by: Sumit Garg 
Signed-off-by: Udit Agarwal 
Tested-by: Vinitha Pillai 
---
 configs/ls1043ardb_nand_SECURE_BOOT_defconfig   | 1 +
 configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig | 1 +
 configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig | 1 +
 3 files changed, 3 insertions(+)

diff --git a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig 
b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig
index 66c89fa..70f28d8 100644
--- a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig
+++ b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig
@@ -10,6 +10,7 @@ CONFIG_SPL_WATCHDOG_SUPPORT=y
 CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb"
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
+CONFIG_FSL_LS_PPA=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,NAND_BOOT"
 CONFIG_NAND_BOOT=y
diff --git a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig 
b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig
index 3f35d64..5f9b21d 100644
--- a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig
+++ b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig
@@ -10,6 +10,7 @@ CONFIG_SPL_WATCHDOG_SUPPORT=y
 CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb"
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
+CONFIG_FSL_LS_PPA=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT"
 CONFIG_SECURE_BOOT=y
diff --git a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig 
b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig
index a41ec80..1e32023 100644
--- a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig
+++ b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig
@@ -3,6 +3,7 @@ CONFIG_TARGET_LS1046ARDB=y
 CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb"
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
+CONFIG_FSL_LS_PPA=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL"
 CONFIG_SECURE_BOOT=y
-- 
1.9.1

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[U-Boot] [PATCH v2 07/10] scsi: make the LUN a parameter of scsi_detect_dev()

[Jean-Jacques Hiblot]

This is a cosmetic change. target and LUN have kind of the same role in
this function. One of them was passed as a parameter and the other was
embedded in a structure. For consistency, pass both of them as parameters.

Signed-off-by: Jean-Jacques Hiblot 
---
 common/scsi.c | 14 +++---
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/common/scsi.c b/common/scsi.c
index fb5b407..d55ba89 100644
--- a/common/scsi.c
+++ b/common/scsi.c
@@ -473,14 +473,15 @@ static void scsi_init_dev_desc(struct blk_desc *dev_desc, 
int devnum)
  * scsi_detect_dev - Detect scsi device
  *
  * @target: target id
+ * @lun: target lun
  * @dev_desc: block device description
  *
  * The scsi_detect_dev detects and fills a dev_desc structure when the device 
is
- * detected. The LUN number is taken from the struct blk_desc *dev_desc.
+ * detected.
  *
  * Return: 0 on success, error value otherwise
  */
-static int scsi_detect_dev(int target, struct blk_desc *dev_desc)
+static int scsi_detect_dev(int target, int lun, struct blk_desc *dev_desc)
 {
unsigned char perq, modi;
lbaint_t capacity;
@@ -488,7 +489,7 @@ static int scsi_detect_dev(int target, struct blk_desc 
*dev_desc)
ccb *pccb = (ccb *)
 
pccb->target = target;
-   pccb->lun = dev_desc->lun;
+   pccb->lun = lun;
pccb->pdata = (unsigned char *)
pccb->datalen = 512;
scsi_setup_inquiry(pccb);
@@ -599,8 +600,7 @@ int scsi_scan(int mode)
bdesc = dev_get_uclass_platdata(bdev);
 
scsi_init_dev_desc_priv(bdesc);
-   bdesc->lun = lun;
-   ret = scsi_detect_dev(i, bdesc);
+   ret = scsi_detect_dev(i, lun, bdesc);
if (ret) {
device_unbind(bdev);
continue;
@@ -630,8 +630,8 @@ int scsi_scan(int mode)
scsi_max_devs = 0;
for (i = 0; i < CONFIG_SYS_SCSI_MAX_SCSI_ID; i++) {
for (lun = 0; lun < CONFIG_SYS_SCSI_MAX_LUN; lun++) {
-   scsi_dev_desc[scsi_max_devs].lun = lun;
-   ret = scsi_detect_dev(i, _dev_desc[scsi_max_devs]);
+   ret = scsi_detect_dev(i, lun,
+ _dev_desc[scsi_max_devs]);
if (ret)
continue;
 
-- 
1.9.1

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[U-Boot] [PATCH v2 10/10] defconfig: dra7xx_evm: enable CONFIG_BLK and disk driver model for SCSI

[Jean-Jacques Hiblot]

Enable disk driver model for dra7xx_evm as dwc_ahci supports
driver model. As a consequence we must also enable CONFIG_BLK and
CONFIG_DM_USB.

Signed-off-by: Mugunthan V N 
Signed-off-by: Jean-Jacques Hiblot 
---
 configs/dra7xx_evm_defconfig| 12 +++-
 configs/dra7xx_hs_evm_defconfig | 11 ++-
 2 files changed, 21 insertions(+), 2 deletions(-)

diff --git a/configs/dra7xx_evm_defconfig b/configs/dra7xx_evm_defconfig
index 42f87b3..8bc395f 100644
--- a/configs/dra7xx_evm_defconfig
+++ b/configs/dra7xx_evm_defconfig
@@ -59,7 +59,13 @@ CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_LIST="dra7-evm dra72-evm dra72-evm-revc dra71-evm"
 CONFIG_DM=y
 CONFIG_SPL_DM=y
-# CONFIG_BLK is not set
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
+CONFIG_BLK=y
+CONFIG_DM_SCSI=y
+CONFIG_DWC_AHCI=y
 CONFIG_DFU_MMC=y
 CONFIG_DFU_RAM=y
 CONFIG_DFU_SF=y
@@ -89,6 +95,7 @@ CONFIG_TI_QSPI=y
 CONFIG_TIMER=y
 CONFIG_OMAP_TIMER=y
 CONFIG_USB=y
+CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_USB_DWC3=y
@@ -101,3 +108,6 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Texas Instruments"
 CONFIG_G_DNL_VENDOR_NUM=0x0451
 CONFIG_G_DNL_PRODUCT_NUM=0xd022
+CONFIG_SPL_GENERIC_PHY=y
+CONFIG_PIPE3_PHY=y
+CONFIG_SPL_PIPE3_PHY=y
diff --git a/configs/dra7xx_hs_evm_defconfig b/configs/dra7xx_hs_evm_defconfig
index f3a9c68..dce3da2 100644
--- a/configs/dra7xx_hs_evm_defconfig
+++ b/configs/dra7xx_hs_evm_defconfig
@@ -63,7 +63,12 @@ CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_LIST="dra7-evm dra72-evm dra72-evm-revc dra71-evm"
 CONFIG_DM=y
 CONFIG_SPL_DM=y
-# CONFIG_BLK is not set
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
+CONFIG_DM_SCSI=y
+CONFIG_DWC_AHCI=y
 CONFIG_DFU_MMC=y
 CONFIG_DFU_RAM=y
 CONFIG_DFU_SF=y
@@ -93,6 +98,7 @@ CONFIG_TI_QSPI=y
 CONFIG_TIMER=y
 CONFIG_OMAP_TIMER=y
 CONFIG_USB=y
+CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_USB_DWC3=y
@@ -105,3 +111,6 @@ CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Texas Instruments"
 CONFIG_G_DNL_VENDOR_NUM=0x0451
 CONFIG_G_DNL_PRODUCT_NUM=0xd022
+CONFIG_SPL_GENERIC_PHY=y
+CONFIG_PIPE3_PHY=y
+CONFIG_SPL_PIPE3_PHY=y
-- 
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[U-Boot] [PATCH v2 05/10] dra7: dtsi: mark ocp2scp bus compatible with "simple-bus"

[Jean-Jacques Hiblot]

This is needed to probe devices under that bus such as the SATA PHY.

Signed-off-by: Jean-Jacques Hiblot 
---
 arch/arm/dts/dra7.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/dts/dra7.dtsi b/arch/arm/dts/dra7.dtsi
index 5570e30..6978359 100644
--- a/arch/arm/dts/dra7.dtsi
+++ b/arch/arm/dts/dra7.dtsi
@@ -1317,7 +1317,7 @@
 
/* OCP2SCP3 */
ocp2scp@4a09 {
-   compatible = "ti,omap-ocp2scp";
+   compatible = "ti,omap-ocp2scp", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
-- 
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[U-Boot] [PATCH v2 03/10] drivers: phy: add generic PHY framework

[Jean-Jacques Hiblot]

The PHY framework provides a set of APIs to control a PHY. This API is
derived from the linux version of the generic PHY framework.
Currently the API supports init(), deinit(), power_on, power_off() and
reset(). The framework provides a way to get a reference to a phy from the
device-tree.

Signed-off-by: Jean-Jacques Hiblot 
---
 Makefile |  1 +
 drivers/Kconfig  |  2 ++
 drivers/Makefile |  1 +
 drivers/phy/Kconfig  | 22 ++
 drivers/phy/Makefile |  5 
 drivers/phy/phy-uclass.c | 77 
 include/dm/uclass-id.h   |  1 +
 include/generic-phy.h| 38 
 8 files changed, 147 insertions(+)
 create mode 100644 drivers/phy/Kconfig
 create mode 100644 drivers/phy/Makefile
 create mode 100644 drivers/phy/phy-uclass.c
 create mode 100644 include/generic-phy.h

diff --git a/Makefile b/Makefile
index 2638acf..06454ce 100644
--- a/Makefile
+++ b/Makefile
@@ -650,6 +650,7 @@ libs-y += fs/
 libs-y += net/
 libs-y += disk/
 libs-y += drivers/
+libs-y += drivers/phy/
 libs-y += drivers/dma/
 libs-y += drivers/gpio/
 libs-y += drivers/i2c/
diff --git a/drivers/Kconfig b/drivers/Kconfig
index 0e5d97d..a90ceca 100644
--- a/drivers/Kconfig
+++ b/drivers/Kconfig
@@ -88,6 +88,8 @@ source "drivers/video/Kconfig"
 
 source "drivers/watchdog/Kconfig"
 
+source "drivers/phy/Kconfig"
+
 config PHYS_TO_BUS
bool "Custom physical to bus address mapping"
help
diff --git a/drivers/Makefile b/drivers/Makefile
index 5d8baa5..4656509 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -47,6 +47,7 @@ obj-$(CONFIG_OMAP_USB_PHY) += usb/phy/
 obj-$(CONFIG_SPL_SATA_SUPPORT) += block/
 obj-$(CONFIG_SPL_USB_HOST_SUPPORT) += block/
 obj-$(CONFIG_SPL_MMC_SUPPORT) += block/
+obj-$(CONFIG_SPL_GENERIC_PHY) += phy/
 endif
 
 ifdef CONFIG_TPL_BUILD
diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
new file mode 100644
index 000..b6fed9e
--- /dev/null
+++ b/drivers/phy/Kconfig
@@ -0,0 +1,22 @@
+
+menu "PHY Subsystem"
+
+config GENERIC_PHY
+   bool "PHY Core"
+   depends on DM
+   help
+ Generic PHY support.
+
+ This framework is designed to provide a generic interface for PHY
+ devices.
+
+config SPL_GENERIC_PHY
+   bool "PHY Core in SPL"
+   depends on DM
+   help
+ Generic PHY support in SPL.
+
+ This framework is designed to provide a generic interface for PHY
+ devices.
+
+endmenu
diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
new file mode 100644
index 000..ccd15ed
--- /dev/null
+++ b/drivers/phy/Makefile
@@ -0,0 +1,5 @@
+obj-$(CONFIG_$(SPL_)GENERIC_PHY) += phy-uclass.o
+
+ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),)
+obj-y += marvell/
+endif
diff --git a/drivers/phy/phy-uclass.c b/drivers/phy/phy-uclass.c
new file mode 100644
index 000..4d1584d
--- /dev/null
+++ b/drivers/phy/phy-uclass.c
@@ -0,0 +1,77 @@
+/*
+ * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/
+ * Written by Jean-Jacques Hiblot  
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include 
+#include 
+#include 
+
+#define get_ops(dev)((struct generic_phy_ops *)(dev)->driver->ops)
+
+#define generic_phy_to_dev(x) ((struct udevice *)(x))
+#define dev_to_generic_phy(x) ((struct generic_phy *)(x))
+
+struct generic_phy *dm_generic_phy_get(struct udevice *dev, const char *string)
+{
+   struct udevice *generic_phy_dev;
+
+   int rc = uclass_get_device_by_phandle(UCLASS_PHY, dev,
+  string, _phy_dev);
+   if (rc) {
+   error("unable to find generic_phy device %d\n", rc);
+   return ERR_PTR(rc);
+   }
+   return dev_to_generic_phy(generic_phy_dev);
+}
+
+int generic_phy_init(struct generic_phy *generic_phy)
+{
+   struct udevice *dev = generic_phy_to_dev(generic_phy);
+   struct generic_phy_ops *ops = get_ops(dev);
+
+   return (ops && ops->init) ? ops->init(dev) : 0;
+}
+
+int generic_phy_reset(struct generic_phy *generic_phy)
+{
+   struct udevice *dev = generic_phy_to_dev(generic_phy);
+   struct generic_phy_ops *ops = get_ops(dev);
+
+   return (ops && ops->reset) ? ops->reset(dev) : 0;
+}
+
+int generic_phy_exit(struct generic_phy *generic_phy)
+{
+   struct udevice *dev = generic_phy_to_dev(generic_phy);
+   struct generic_phy_ops *ops = get_ops(dev);
+
+   return (ops && ops->exit) ? ops->exit(dev) : 0;
+}
+
+int generic_phy_power_on(struct generic_phy *generic_phy)
+{
+   struct udevice *dev = generic_phy_to_dev(generic_phy);
+   struct generic_phy_ops *ops = get_ops(dev);
+
+   return (ops && ops->power_on) ? ops->power_on(dev) : 0;
+}
+
+int generic_phy_power_off(struct generic_phy *generic_phy)

[U-Boot] [PATCH v2 00/10] OMAP: Move SATA to use block driver model

[Jean-Jacques Hiblot]

This series adds support for SATA using the driver model on omap platforms.
It is based on the work of Mugunthan V N  in Feb 2016

The first 2 patches are preparatory work.
The 3rd patch adds a new framework to handle PHYs in a generic manner. The idea
is to move the phy initialization out of the board-specific code into a proper
driver. The link between the phy device and the controller device is done in
by device-tree as it's done in linux. The API to control a phy has been copied
from linux, excpet that the functions are prefixed by 'generic_phy_' instead of
just 'phy_' because phy_reset() is already used to handle the Ethernet phys.
The 4th patch adds a phy driver for the pipe3 sata phy found in the
omaps/am5x/dra7x SOCs.
The 5th patch allows the device under the node ocp2scp@4a09 to be probed.
The 6th patch implements a driver for the SATA controller found in the
omaps/am5x/dra7x SOCs.
The 7th patch is cosmetic and changes the interface of scsi_detect_dev()
The 8th patch moves the call to part_init() out of scsi_detect_dev(). This is
a preparatory work path #9.
The 9th patches fix a divide-by-0 error that happens in scsi_scan()
when DM is used.
The last patch enables the DM sata by default for the dra7 platforms.


changes since v1:
* changed the way the 'old' sata code is compiled out when DM_SCSI is enabled.
* added a new framework for PHY management.
* added a new driver for the PIPE3 phy and use it in the dwc_ahci driver.
* changed the interface of scsi_detect_dev() and moved the call part_init() out
  of it.
* modified the fix to scsi_scan() in order to call scsi_detect_dev() only once.
* the max_lun and max_id parameters are now taken from the device-tree.
* Updated the defconfig changes to include the PHY driver and its dependencies.


Jean-Jacques Hiblot (8):
  arm: omap: sata: compile out board-level sata code when CONFIG_DM_SCSI
is defined
  drivers: phy: add generic PHY framework
  drivers: phy: add PIPE3 phy driver
  dra7: dtsi: mark ocp2scp bus compatible with "simple-bus"
  scsi: make the LUN a parameter of scsi_detect_dev()
  scsi: move the partition initialization out of the scsi detection
  dm: scsi: fix divide-by-0 error in scsi_scan()
  defconfig: dra7xx_evm: enable CONFIG_BLK and disk driver model for
SCSI

Mugunthan V N (2):
  arm: omap: sata: move enable sata clocks to enable_basic_clocks()
  drivers: block: dwc_ahci: Implement a driver for Synopsys DWC sata
device

 Makefile|   1 +
 arch/arm/dts/dra7.dtsi  |   2 +-
 arch/arm/mach-omap2/Makefile|   2 +
 arch/arm/mach-omap2/omap5/hw_data.c |  12 ++
 arch/arm/mach-omap2/sata.c  |  23 ---
 common/scsi.c   |  48 +++--
 configs/dra7xx_evm_defconfig|  12 +-
 configs/dra7xx_hs_evm_defconfig |  11 +-
 drivers/Kconfig |   2 +
 drivers/Makefile|   1 +
 drivers/block/Kconfig   |  10 +
 drivers/block/Makefile  |   1 +
 drivers/block/dwc_ahci.c| 100 ++
 drivers/phy/Kconfig |  34 
 drivers/phy/Makefile|   6 +
 drivers/phy/phy-uclass.c|  77 
 drivers/phy/ti-pipe3-phy.c  | 368 
 include/dm/uclass-id.h  |   1 +
 include/generic-phy.h   |  38 
 19 files changed, 708 insertions(+), 41 deletions(-)
 create mode 100644 drivers/block/dwc_ahci.c
 create mode 100644 drivers/phy/Kconfig
 create mode 100644 drivers/phy/Makefile
 create mode 100644 drivers/phy/phy-uclass.c
 create mode 100644 drivers/phy/ti-pipe3-phy.c
 create mode 100644 include/generic-phy.h

-- 
1.9.1

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[U-Boot] [PATCH 2/3] fsl-ppa: Kconfig: Support to load PPA hdr from eMMC/SD and NAND Flash

[Sumit Garg]

Add support to load PPA hdr from eMMC/SD and NAND Flash in Kconfig

Signed-off-by: Sumit Garg 
Signed-off-by: Udit Agarwal 
Tested-by: Vinitha Pillai 
---
 arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 10 ++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig 
b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index 9fb76f0..4c9b6ce 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -179,12 +179,22 @@ config SYS_LS_PPA_ESBC_ADDR
default 0x4074 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS1046A
default 0x4048 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS1012A
default 0x580c4 if SYS_LS_PPA_FW_IN_XIP && FSL_LSCH3
+   default 0x70 if SYS_LS_PPA_FW_IN_MMC
+   default 0x70 if SYS_LS_PPA_FW_IN_NAND
help
  If the PPA header firmware locate at XIP flash, such as NOR or
  QSPI flash, this address is a directly memory-mapped.
  If it is in a serial accessed flash, such as NAND and SD
  card, it is a byte offset.
 
+config LS_PPA_ESBC_HDR_SIZE
+   hex "Length of PPA ESBC header"
+   depends on FSL_LS_PPA && CHAIN_OF_TRUST && !SYS_LS_PPA_FW_IN_XIP
+   default 0x2000
+   help
+ Length (in bytes) of PPA ESBC header to be copied from MMC/SD or
+ NAND to memory to validate PPA image.
+
 endmenu
 
 config SYS_FSL_ERRATUM_A010315
-- 
1.9.1

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[U-Boot] [PATCH v2 01/10] arm: omap: sata: move enable sata clocks to enable_basic_clocks()

[Jean-Jacques Hiblot]

From: Mugunthan V N 

All the clocks which has to be enabled has to be done in
enable_basic_clocks(), so moving enable sata clock to common
clocks enable function.

Signed-off-by: Mugunthan V N 
Signed-off-by: Jean-Jacques Hiblot 
Reviewed-by: Tom Rini 
---

the patch hasn't changed since v1

arch/arm/mach-omap2/omap5/hw_data.c | 12 
 arch/arm/mach-omap2/sata.c  | 23 ---
 2 files changed, 12 insertions(+), 23 deletions(-)

diff --git a/arch/arm/mach-omap2/omap5/hw_data.c 
b/arch/arm/mach-omap2/omap5/hw_data.c
index 5d956b5..a8a6b8a 100644
--- a/arch/arm/mach-omap2/omap5/hw_data.c
+++ b/arch/arm/mach-omap2/omap5/hw_data.c
@@ -361,6 +361,9 @@ void enable_basic_clocks(void)
(*prcm)->cm_l4per_gpio6_clkctrl,
(*prcm)->cm_l4per_gpio7_clkctrl,
(*prcm)->cm_l4per_gpio8_clkctrl,
+#ifdef CONFIG_SCSI_AHCI_PLAT
+   (*prcm)->cm_l3init_ocp2scp3_clkctrl,
+#endif
0
};
 
@@ -379,6 +382,9 @@ void enable_basic_clocks(void)
 #ifdef CONFIG_TI_QSPI
(*prcm)->cm_l4per_qspi_clkctrl,
 #endif
+#ifdef CONFIG_SCSI_AHCI_PLAT
+   (*prcm)->cm_l3init_sata_clkctrl,
+#endif
0
};
 
@@ -411,6 +417,12 @@ void enable_basic_clocks(void)
setbits_le32((*prcm)->cm_l4per_qspi_clkctrl, (1<<24));
 #endif
 
+#ifdef CONFIG_SCSI_AHCI_PLAT
+   /* Enable optional functional clock for SATA */
+   setbits_le32((*prcm)->cm_l3init_sata_clkctrl,
+SATA_CLKCTRL_OPTFCLKEN_MASK);
+#endif
+
/* Enable SCRM OPT clocks for PER and CORE dpll */
setbits_le32((*prcm)->cm_wkupaon_scrm_clkctrl,
OPTFCLKEN_SCRM_PER_MASK);
diff --git a/arch/arm/mach-omap2/sata.c b/arch/arm/mach-omap2/sata.c
index 2c2d1bc..0c82689 100644
--- a/arch/arm/mach-omap2/sata.c
+++ b/arch/arm/mach-omap2/sata.c
@@ -37,29 +37,6 @@ int init_sata(int dev)
int ret;
u32 val;
 
-   u32 const clk_domains_sata[] = {
-   0
-   };
-
-   u32 const clk_modules_hw_auto_sata[] = {
-   (*prcm)->cm_l3init_ocp2scp3_clkctrl,
-   0
-   };
-
-   u32 const clk_modules_explicit_en_sata[] = {
-   (*prcm)->cm_l3init_sata_clkctrl,
-   0
-   };
-
-   do_enable_clocks(clk_domains_sata,
-clk_modules_hw_auto_sata,
-clk_modules_explicit_en_sata,
-0);
-
-   /* Enable optional functional clock for SATA */
-   setbits_le32((*prcm)->cm_l3init_sata_clkctrl,
-SATA_CLKCTRL_OPTFCLKEN_MASK);
-
sata_phy.power_reg = (void __iomem *)(*ctrl)->control_phy_power_sata;
 
/* Power up the PHY */
-- 
1.9.1

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[U-Boot] [PATCH 1/3] fsl: PPA: add support PPA image validation from NAND and SD

[Sumit Garg]

Signed-off-by: Sumit Garg 
Signed-off-by: Udit Agarwal 
Tested-by: Vinitha Pillai 
---
 arch/arm/cpu/armv8/fsl-layerscape/ppa.c | 67 -
 1 file changed, 66 insertions(+), 1 deletion(-)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ppa.c 
b/arch/arm/cpu/armv8/fsl-layerscape/ppa.c
index 7f87bb8..d8f1d36 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/ppa.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/ppa.c
@@ -39,6 +39,10 @@ int ppa_init(void)
 #ifdef CONFIG_CHAIN_OF_TRUST
uintptr_t ppa_esbc_hdr = CONFIG_SYS_LS_PPA_ESBC_ADDR;
uintptr_t ppa_img_addr = 0;
+#if defined(CONFIG_SYS_LS_PPA_FW_IN_MMC) || \
+   defined(CONFIG_SYS_LS_PPA_FW_IN_NAND)
+   void *ppa_hdr_ddr;
+#endif
 #endif
 
 #ifdef CONFIG_SYS_LS_PPA_FW_IN_XIP
@@ -53,7 +57,7 @@ int ppa_init(void)
int dev = CONFIG_SYS_MMC_ENV_DEV;
struct fdt_header *fitp;
u32 cnt;
-   u32 blk = CONFIG_SYS_LS_PPA_FW_ADDR / 512;
+   u32 blk;
 
debug("%s: PPA image load from eMMC/SD\n", __func__);
 
@@ -81,6 +85,7 @@ int ppa_init(void)
return -ENOMEM;
}
 
+   blk = CONFIG_SYS_LS_PPA_FW_ADDR / 512;
cnt = DIV_ROUND_UP(fdt_header_len, 512);
debug("%s: MMC read PPA FIT header: dev # %u, block # %u, count %u\n",
  __func__, dev, blk, cnt);
@@ -102,6 +107,29 @@ int ppa_init(void)
return ret;
}
 
+#ifdef CONFIG_CHAIN_OF_TRUST
+   ppa_hdr_ddr = malloc(CONFIG_LS_PPA_ESBC_HDR_SIZE);
+   if (!ppa_hdr_ddr) {
+   printf("PPA: malloc failed for PPA header\n");
+   return -ENOMEM;
+   }
+
+   blk = CONFIG_SYS_LS_PPA_ESBC_ADDR >> 9;
+   cnt = DIV_ROUND_UP(CONFIG_LS_PPA_ESBC_HDR_SIZE, 512);
+   ret = mmc->block_dev.block_read(>block_dev, blk, cnt, ppa_hdr_ddr);
+   if (ret != cnt) {
+   free(ppa_hdr_ddr);
+   printf("MMC/SD read of PPA header failed\n");
+   return -EIO;
+   }
+   debug("Read PPA header to 0x%p\n", ppa_hdr_ddr);
+
+   /* flush cache after read */
+   flush_cache((ulong)ppa_hdr_ddr, cnt * 512);
+
+   ppa_esbc_hdr = (uintptr_t)ppa_hdr_ddr;
+#endif
+
fw_length = fdt_totalsize(fitp);
free(fitp);
 
@@ -113,6 +141,7 @@ int ppa_init(void)
return -ENOMEM;
}
 
+   blk = CONFIG_SYS_LS_PPA_FW_ADDR / 512;
cnt = DIV_ROUND_UP(fw_length, 512);
debug("%s: MMC read PPA FIT image: dev # %u, block # %u, count %u\n",
  __func__, dev, blk, cnt);
@@ -148,6 +177,31 @@ int ppa_init(void)
return ret;
}
 
+#ifdef CONFIG_CHAIN_OF_TRUST
+   ppa_hdr_ddr = malloc(CONFIG_LS_PPA_ESBC_HDR_SIZE);
+   if (!ppa_hdr_ddr) {
+   printf("PPA: malloc failed for PPA header\n");
+   return -ENOMEM;
+   }
+
+   fw_length = CONFIG_LS_PPA_ESBC_HDR_SIZE;
+
+   ret = nand_read(nand_info[0], (loff_t)CONFIG_SYS_LS_PPA_ESBC_ADDR,
+  _length, (u_char *)ppa_hdr_ddr);
+   if (ret == -EUCLEAN) {
+   free(ppa_hdr_ddr);
+   printf("NAND read of PPA firmware at offset 0x%x failed\n",
+  CONFIG_SYS_LS_PPA_FW_ADDR);
+   return -EIO;
+   }
+   debug("Read PPA header to 0x%p\n", ppa_hdr_ddr);
+
+   /* flush cache after read */
+   flush_cache((ulong)ppa_hdr_ddr, fw_length);
+
+   ppa_esbc_hdr = (uintptr_t)ppa_hdr_ddr;
+#endif
+
fw_length = fdt_totalsize();
 
ppa_fit_addr = malloc(fw_length);
@@ -177,6 +231,13 @@ int ppa_init(void)
 #ifdef CONFIG_CHAIN_OF_TRUST
ppa_img_addr = (uintptr_t)ppa_fit_addr;
if (fsl_check_boot_mode_secure() != 0) {
+   /*
+* In case of failure in validation, fsl_secboot_validate
+* would not return back in case of Production environment
+* with ITS=1. In Development environment (ITS=0 and
+* SB_EN=1), the function may return back in case of
+* non-fatal failures.
+*/
ret = fsl_secboot_validate(ppa_esbc_hdr,
   PPA_KEY_HASH,
   _img_addr);
@@ -185,6 +246,10 @@ int ppa_init(void)
else
printf("PPA validation Successful\n");
}
+#if defined(CONFIG_SYS_LS_PPA_FW_IN_MMC) || \
+   defined(CONFIG_SYS_LS_PPA_FW_IN_NAND)
+   free(ppa_hdr_ddr);
+#endif
 #endif
 
 #ifdef CONFIG_FSL_LSCH3
-- 
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Re: [U-Boot] [PATCH] power: regulator: pwm: support pwm polarity setting

[Jaehoon Chung]

Hi Kever,

On 04/07/2017 08:02 PM, Kever Yang wrote:
> The latest kernel PWM drivers enable the polarity settings. When system
> run from U-Boot to kerenl, if there are differences in polarity set or
> duty cycle, the PMW will re-init:
>   close -> set polarity and duty cycle -> enable the PWM.
> The power supply controled by pwm regulator may have voltage shaking,
> which lead to the system not stable.
> 
> Signed-off-by: Kever Yang 
> ---
> 
>  drivers/power/regulator/pwm_regulator.c | 12 ++--
>  drivers/pwm/pwm-uclass.c| 10 ++
>  drivers/pwm/rk_pwm.c| 17 -
>  include/pwm.h   |  9 +
>  4 files changed, 45 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/power/regulator/pwm_regulator.c 
> b/drivers/power/regulator/pwm_regulator.c
> index 4875238..f8a6712 100644
> --- a/drivers/power/regulator/pwm_regulator.c
> +++ b/drivers/power/regulator/pwm_regulator.c
> @@ -24,6 +24,8 @@ struct pwm_regulator_info {
>   int pwm_id;
>   /* the period of one PWM cycle */
>   int period_ns;
> + /* the polarity of one PWM */
> + int polarity;
>   struct udevice *pwm;
>   /* initialize voltage of regulator */
>   unsigned int init_voltage;
> @@ -49,7 +51,7 @@ static int pwm_voltage_to_duty_cycle_percentage(struct 
> udevice *dev, int req_uV)
>   int max_uV = priv->max_voltage;
>   int diff = max_uV - min_uV;
>  
> - return 100 - (((req_uV * 100) - (min_uV * 100)) / diff);
> + return ((req_uV * 100) - (min_uV * 100)) / diff;
>  }
>  
>  static int pwm_regulator_get_voltage(struct udevice *dev)
> @@ -67,6 +69,12 @@ static int pwm_regulator_set_voltage(struct udevice *dev, 
> int uvolt)
>  
>   duty_cycle = pwm_voltage_to_duty_cycle_percentage(dev, uvolt);
>  
> + ret = pwm_set_init(priv->pwm, priv->pwm_id, priv->polarity);
> + if (ret) {
> + dev_err(dev, "Failed to init PWM\n");
> + return ret;
> + }
> +
>   ret = pwm_set_config(priv->pwm, priv->pwm_id,
>   (priv->period_ns / 100) * duty_cycle, priv->period_ns);
>   if (ret) {
> @@ -97,9 +105,9 @@ static int pwm_regulator_ofdata_to_platdata(struct udevice 
> *dev)
>   debug("%s: Cannot get PWM phandle: ret=%d\n", __func__, ret);
>   return ret;
>   }
> - /* TODO: pwm_id here from device tree if needed */
>  
>   priv->period_ns = args.args[1];
> + priv->polarity = args.args[2];
>  
>   priv->init_voltage = fdtdec_get_int(blob, node,
>   "regulator-init-microvolt", -1);
> diff --git a/drivers/pwm/pwm-uclass.c b/drivers/pwm/pwm-uclass.c
> index c2200af..287a7f3 100644
> --- a/drivers/pwm/pwm-uclass.c
> +++ b/drivers/pwm/pwm-uclass.c
> @@ -9,6 +9,16 @@
>  #include 
>  #include 
>  
> +int pwm_set_init(struct udevice *dev, uint channel, uint polarity)
> +{
> + struct pwm_ops *ops = pwm_get_ops(dev);
> +
> + if (!ops->set_init)
> + return -ENOSYS;
> +
> + return ops->set_init(dev, channel, polarity);
> +}
> +
>  int pwm_set_config(struct udevice *dev, uint channel, uint period_ns,
>  uint duty_ns)
>  {
> diff --git a/drivers/pwm/rk_pwm.c b/drivers/pwm/rk_pwm.c
> index 9254f5b..5ff1e00 100644
> --- a/drivers/pwm/rk_pwm.c
> +++ b/drivers/pwm/rk_pwm.c
> @@ -21,8 +21,22 @@ DECLARE_GLOBAL_DATA_PTR;
>  struct rk_pwm_priv {
>   struct rk3288_pwm *regs;
>   ulong freq;
> + uint enable_conf;
>  };
>  
> +static int rk_pwm_set_init(struct udevice *dev, uint channel, uint polarity)
> +{

"channel" is need?

> + struct rk_pwm_priv *priv = dev_get_priv(dev);
> +
> + debug("%s: polarity=%u\n", __func__, polarity);
> + if (polarity)
> + priv->enable_conf |= PWM_DUTY_NEGATIVE | PWM_INACTIVE_POSTIVE;
> + else
> + priv->enable_conf |= PWM_DUTY_POSTIVE | PWM_INACTIVE_NEGATIVE;
> +
> + return 0;
> +}
> +
>  static int rk_pwm_set_config(struct udevice *dev, uint channel, uint 
> period_ns,
>uint duty_ns)
>  {
> @@ -32,7 +46,7 @@ static int rk_pwm_set_config(struct udevice *dev, uint 
> channel, uint period_ns,
>  
>   debug("%s: period_ns=%u, duty_ns=%u\n", __func__, period_ns, duty_ns);
>   writel(PWM_SEL_SRC_CLK | PWM_OUTPUT_LEFT | PWM_LP_DISABLE |
> - PWM_CONTINUOUS | PWM_DUTY_POSTIVE | PWM_INACTIVE_POSTIVE |
> + PWM_CONTINUOUS | priv->enable_conf |
>   RK_PWM_DISABLE,
>   >ctrl);
>  
> @@ -83,6 +97,7 @@ static int rk_pwm_probe(struct udevice *dev)
>  }
>  
>  static const struct pwm_ops rk_pwm_ops = {
> + .set_init   = rk_pwm_set_init,
>   .set_config = rk_pwm_set_config,
>   .set_enable = rk_pwm_set_enable,
>  };
> diff --git a/include/pwm.h b/include/pwm.h
> index 851915e..a66ee1f 100644
> --- a/include/pwm.h
> +++ b/include/pwm.h
> @@ -14,6 +14,15 @@
>  /* struct pwm_ops: Operations 

[U-Boot] [PATCH] power: regulator: pwm: support pwm polarity setting

[Kever Yang]

The latest kernel PWM drivers enable the polarity settings. When system
run from U-Boot to kerenl, if there are differences in polarity set or
duty cycle, the PMW will re-init:
  close -> set polarity and duty cycle -> enable the PWM.
The power supply controled by pwm regulator may have voltage shaking,
which lead to the system not stable.

Signed-off-by: Kever Yang 
---

 drivers/power/regulator/pwm_regulator.c | 12 ++--
 drivers/pwm/pwm-uclass.c| 10 ++
 drivers/pwm/rk_pwm.c| 17 -
 include/pwm.h   |  9 +
 4 files changed, 45 insertions(+), 3 deletions(-)

diff --git a/drivers/power/regulator/pwm_regulator.c 
b/drivers/power/regulator/pwm_regulator.c
index 4875238..f8a6712 100644
--- a/drivers/power/regulator/pwm_regulator.c
+++ b/drivers/power/regulator/pwm_regulator.c
@@ -24,6 +24,8 @@ struct pwm_regulator_info {
int pwm_id;
/* the period of one PWM cycle */
int period_ns;
+   /* the polarity of one PWM */
+   int polarity;
struct udevice *pwm;
/* initialize voltage of regulator */
unsigned int init_voltage;
@@ -49,7 +51,7 @@ static int pwm_voltage_to_duty_cycle_percentage(struct 
udevice *dev, int req_uV)
int max_uV = priv->max_voltage;
int diff = max_uV - min_uV;
 
-   return 100 - (((req_uV * 100) - (min_uV * 100)) / diff);
+   return ((req_uV * 100) - (min_uV * 100)) / diff;
 }
 
 static int pwm_regulator_get_voltage(struct udevice *dev)
@@ -67,6 +69,12 @@ static int pwm_regulator_set_voltage(struct udevice *dev, 
int uvolt)
 
duty_cycle = pwm_voltage_to_duty_cycle_percentage(dev, uvolt);
 
+   ret = pwm_set_init(priv->pwm, priv->pwm_id, priv->polarity);
+   if (ret) {
+   dev_err(dev, "Failed to init PWM\n");
+   return ret;
+   }
+
ret = pwm_set_config(priv->pwm, priv->pwm_id,
(priv->period_ns / 100) * duty_cycle, priv->period_ns);
if (ret) {
@@ -97,9 +105,9 @@ static int pwm_regulator_ofdata_to_platdata(struct udevice 
*dev)
debug("%s: Cannot get PWM phandle: ret=%d\n", __func__, ret);
return ret;
}
-   /* TODO: pwm_id here from device tree if needed */
 
priv->period_ns = args.args[1];
+   priv->polarity = args.args[2];
 
priv->init_voltage = fdtdec_get_int(blob, node,
"regulator-init-microvolt", -1);
diff --git a/drivers/pwm/pwm-uclass.c b/drivers/pwm/pwm-uclass.c
index c2200af..287a7f3 100644
--- a/drivers/pwm/pwm-uclass.c
+++ b/drivers/pwm/pwm-uclass.c
@@ -9,6 +9,16 @@
 #include 
 #include 
 
+int pwm_set_init(struct udevice *dev, uint channel, uint polarity)
+{
+   struct pwm_ops *ops = pwm_get_ops(dev);
+
+   if (!ops->set_init)
+   return -ENOSYS;
+
+   return ops->set_init(dev, channel, polarity);
+}
+
 int pwm_set_config(struct udevice *dev, uint channel, uint period_ns,
   uint duty_ns)
 {
diff --git a/drivers/pwm/rk_pwm.c b/drivers/pwm/rk_pwm.c
index 9254f5b..5ff1e00 100644
--- a/drivers/pwm/rk_pwm.c
+++ b/drivers/pwm/rk_pwm.c
@@ -21,8 +21,22 @@ DECLARE_GLOBAL_DATA_PTR;
 struct rk_pwm_priv {
struct rk3288_pwm *regs;
ulong freq;
+   uint enable_conf;
 };
 
+static int rk_pwm_set_init(struct udevice *dev, uint channel, uint polarity)
+{
+   struct rk_pwm_priv *priv = dev_get_priv(dev);
+
+   debug("%s: polarity=%u\n", __func__, polarity);
+   if (polarity)
+   priv->enable_conf |= PWM_DUTY_NEGATIVE | PWM_INACTIVE_POSTIVE;
+   else
+   priv->enable_conf |= PWM_DUTY_POSTIVE | PWM_INACTIVE_NEGATIVE;
+
+   return 0;
+}
+
 static int rk_pwm_set_config(struct udevice *dev, uint channel, uint period_ns,
 uint duty_ns)
 {
@@ -32,7 +46,7 @@ static int rk_pwm_set_config(struct udevice *dev, uint 
channel, uint period_ns,
 
debug("%s: period_ns=%u, duty_ns=%u\n", __func__, period_ns, duty_ns);
writel(PWM_SEL_SRC_CLK | PWM_OUTPUT_LEFT | PWM_LP_DISABLE |
-   PWM_CONTINUOUS | PWM_DUTY_POSTIVE | PWM_INACTIVE_POSTIVE |
+   PWM_CONTINUOUS | priv->enable_conf |
RK_PWM_DISABLE,
>ctrl);
 
@@ -83,6 +97,7 @@ static int rk_pwm_probe(struct udevice *dev)
 }
 
 static const struct pwm_ops rk_pwm_ops = {
+   .set_init   = rk_pwm_set_init,
.set_config = rk_pwm_set_config,
.set_enable = rk_pwm_set_enable,
 };
diff --git a/include/pwm.h b/include/pwm.h
index 851915e..a66ee1f 100644
--- a/include/pwm.h
+++ b/include/pwm.h
@@ -14,6 +14,15 @@
 /* struct pwm_ops: Operations for the PWM uclass */
 struct pwm_ops {
/**
+* set_init() - Set the PWM invert
+*
+* @dev:PWM device to update
+* @channel:PWM channel to update
+* @polarity:  PWM invert polarity
+   

Re: [U-Boot] MTD devices emulation driver (gluebi) support

[Heiko Schocher]

Hello Manuel,

Am 06.04.2017 um 10:36 schrieb manuelcur...@eaton.com:

Hi,

I want to read a jffs2 file system over ubi from uboot.
 From ubi.h, I found the CONFIG_MTD_UBI_GLUEBI define to allow this 
functionality (I think) :

/* gluebi.c */
#ifdef CONFIG_MTD_UBI_GLUEBI


However, when I set this define, after compilation, I have errors links about 
gluebi functions :

uboot/common/cmd_ubi.c:293: undefined reference to `ubi_gluebi_updated'

And in fact, after search, I didn't find gluebi.c file in uboot.

I use the U-Boot 2015.01 version. When I look the last release, I didn't find 
gluebi.c  too.

Some one can tell me more about that ? How is it possible to read jffs2 (or 
squashfs) from uboot ?


We use the UBI/UBIFS sources from linux, so this part cames
from linux. And as fas as I know, nobody has tried to use
CONFIG_MTD_UBI_GLUEBI
in u-boot yet, so if you want to do this, you have to dig into
this part deeper. Patches are welcome ;-)

bye,
Heiko


thanks !

Manuel




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Le Viséo - Bâtiment A Innovallée, 38330, Montbonnot-St.-Martin, France ~ Lieu 
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[U-Boot] [PATCH] arm: mvebu: Minor fixes in the AXP / A38x SERDES code

[Stefan Roese]

From: Uwe Kleine-König 

- Fix spelling error of SERDES_VERSION
- Remove superfluous definition of this macro
- Remove unnecessary include of i2c.h

Signed-off-by: Uwe Kleine-König 
Signed-off-by: Stefan Roese 
---
 arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec-38x.c | 2 --
 arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c | 4 ++--
 arch/arm/mach-mvebu/serdes/axp/high_speed_env_lib.c   | 6 +++---
 arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.c  | 1 -
 4 files changed, 5 insertions(+), 8 deletions(-)

diff --git a/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec-38x.c 
b/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec-38x.c
index 104e7e88d7..0dfb9452e6 100644
--- a/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec-38x.c
+++ b/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec-38x.c
@@ -13,8 +13,6 @@
 #include "high_speed_env_spec.h"
 #include "sys_env_lib.h"
 
-#define SERDES_VERION  "2.0"
-
 u8 selectors_serdes_rev1_map[LAST_SERDES_TYPE][MAX_SERDES_LANES] = {
/* 0  12345 */
{0x1, 0x1, NA,  NA,  NA,  NA},  /* PEX0 */
diff --git a/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c 
b/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c
index 820219e68e..883b90776a 100644
--- a/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c
+++ b/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c
@@ -27,7 +27,7 @@
  */
 struct cfg_seq serdes_seq_db[SERDES_LAST_SEQ];
 
-#defineSERDES_VERION   "2.0"
+#defineSERDES_VERSION  "2.0"
 #define ENDED_OK   "High speed PHY - Ended Successfully\n"
 
 #define LINK_WAIT_CNTR 100
@@ -1416,7 +1416,7 @@ int serdes_phy_config(void)
DEBUG_INIT_FULL_S("\n### ctrl_high_speed_serdes_phy_config ###\n");
 
DEBUG_INIT_S("High speed PHY - Version: ");
-   DEBUG_INIT_S(SERDES_VERION);
+   DEBUG_INIT_S(SERDES_VERSION);
DEBUG_INIT_S("\n");
 
/* Init serdes sequences DB */
diff --git a/arch/arm/mach-mvebu/serdes/axp/high_speed_env_lib.c 
b/arch/arm/mach-mvebu/serdes/axp/high_speed_env_lib.c
index 5925bae69f..b0e193b78c 100644
--- a/arch/arm/mach-mvebu/serdes/axp/high_speed_env_lib.c
+++ b/arch/arm/mach-mvebu/serdes/axp/high_speed_env_lib.c
@@ -14,7 +14,7 @@
 #include "high_speed_env_spec.h"
 #include "board_env_spec.h"
 
-#defineSERDES_VERION   "2.1.5"
+#defineSERDES_VERSION  "2.1.5"
 #define ENDED_OK   "High speed PHY - Ended Successfully\n"
 
 static const u8 serdes_cfg[][SERDES_LAST_UNIT] = BIN_SERDES_CFG;
@@ -285,12 +285,12 @@ int serdes_phy_config(void)
if (reg_read(REG_BOOTROM_ROUTINE_ADDR) &
(1 << REG_BOOTROM_ROUTINE_DRAM_INIT_OFFS)) {
DEBUG_INIT_S("High speed PHY - Version: ");
-   DEBUG_INIT_S(SERDES_VERION);
+   DEBUG_INIT_S(SERDES_VERSION);
DEBUG_INIT_S(" - 2nd boot - Skip\n");
return MV_OK;
}
DEBUG_INIT_S("High speed PHY - Version: ");
-   DEBUG_INIT_S(SERDES_VERION);
+   DEBUG_INIT_S(SERDES_VERSION);
DEBUG_INIT_S(" (COM-PHY-V20)\n");
 
/*
diff --git a/arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.c 
b/arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.c
index 115ec2cd60..704a59fa15 100644
--- a/arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.c
+++ b/arch/arm/mach-mvebu/serdes/axp/high_speed_env_spec.c
@@ -5,7 +5,6 @@
  */
 
 #include 
-#include 
 #include 
 #include 
 #include 
-- 
2.12.2

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[U-Boot] [PATCH] rockchip: sysreset: rk3188: Make sure remap is off on warm-resets

[Heiko Stuebner]

The warm-reset of rk3188 socs keeps the remap setting as it was, so if
it was enabled, the cpu would start from address 0x0 of the sram instead
of address 0x0 of the bootrom, thus making the reset hang.

Therefore make sure the remap is disabled before attempting a warm reset.

Cold reset is not affected by this at all.

Signed-off-by: Heiko Stuebner 
---
 drivers/sysreset/sysreset_rk3188.c | 15 +++
 1 file changed, 15 insertions(+)

diff --git a/drivers/sysreset/sysreset_rk3188.c 
b/drivers/sysreset/sysreset_rk3188.c
index 36ae47600a..053a6344f5 100644
--- a/drivers/sysreset/sysreset_rk3188.c
+++ b/drivers/sysreset/sysreset_rk3188.c
@@ -7,21 +7,36 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 
 int rk3188_sysreset_request(struct udevice *dev, enum sysreset_t type)
 {
struct rk3188_cru *cru = rockchip_get_cru();
+   struct rk3188_grf *grf;
 
if (IS_ERR(cru))
return PTR_ERR(cru);
switch (type) {
case SYSRESET_WARM:
+   grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+   if (IS_ERR(grf))
+   return -EPROTONOSUPPORT;
+
+   /*
+* warm-reset keeps the remap value,
+* so make sure it's disabled.
+*/
+   rk_clrsetreg(>soc_con0,
+   NOC_REMAP_MASK << NOC_REMAP_SHIFT,
+   0 << NOC_REMAP_SHIFT);
+
rk_clrreg(>cru_mode_con, 0x);
writel(0xeca8, >cru_glb_srst_snd_value);
break;
-- 
2.11.0

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[U-Boot] [PATCH] rockchip: rk3399: defconfig: add CONFIG_OF_EMBED support

[Kever Yang]

Need to enablt CONFIG_OF_EMBED if we use separate uboot and dtb
in FIT image for SPL loading.

Run make savedefconfig to make the options order correct.

Signed-off-by: Kever Yang 
---

 configs/evb-rk3399_defconfig | 43 ---
 1 file changed, 20 insertions(+), 23 deletions(-)

diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig
index 195a421..961fe8b 100644
--- a/configs/evb-rk3399_defconfig
+++ b/configs/evb-rk3399_defconfig
@@ -1,30 +1,37 @@
 CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x4000
 CONFIG_ROCKCHIP_RK3399=y
+CONFIG_SPL_STACK_R_ADDR=0x8
 CONFIG_DEFAULT_DEVICE_TREE="rk3399-evb"
 CONFIG_FIT=y
 CONFIG_SPL_LOAD_FIT=y
-CONFIG_SPL_OF_LIBFDT=y
-CONFIG_SPL_ATF_SUPPORT=y
-CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200
-CONFIG_SPL_ATF_TEXT_BASE=0x0001
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL_STACK_R=y
-CONFIG_SPL_STACK_R_ADDR=0x8
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
-CONFIG_SPL_LIBCOMMON_SUPPORT=y
-CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_SYS_MALLOC_F_LEN=0x4000
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200
+CONFIG_SPL_ATF_SUPPORT=y
+CONFIG_SPL_ATF_TEXT_BASE=0x0001
+CONFIG_FASTBOOT=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_CMD_FASTBOOT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x00800800
+CONFIG_FASTBOOT_BUF_SIZE=0x0800
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=1
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set
 CONFIG_CMD_GPT=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_TIME=y
-CONFIG_CMD_PXE=y
 CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_EMBED=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names 
interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_SPL_OF_PLATDATA=y
 CONFIG_REGMAP=y
@@ -57,23 +64,13 @@ CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_EHCI_GENERIC=y
-CONFIG_USB_STORAGE=y
-CONFIG_USE_TINY_PRINTF=y
-CONFIG_ERRNO_STR=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_DUALSPEED=y
-CONFIG_USB_GADGET_VBUS_DRAW=0
 CONFIG_USB_DWC3=y
 CONFIG_USB_DWC3_GADGET=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Rockchip"
 CONFIG_G_DNL_VENDOR_NUM=0x2207
 CONFIG_G_DNL_PRODUCT_NUM=0x330a
-CONFIG_FASTBOOT=y
-CONFIG_CMD_FASTBOOT=y
-CONFIG_USB_FUNCTION_FASTBOOT=y
-CONFIG_FASTBOOT_FLASH=y
-CONFIG_FASTBOOT_FLASH_MMC_DEV=1
-CONFIG_FASTBOOT_BUF_ADDR=0x00800800
-CONFIG_FASTBOOT_BUF_SIZE=0x0800
-CONFIG_CMD_USB_MASS_STORAGE=y
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_ERRNO_STR=y
-- 
1.9.1

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Re: [U-Boot] [PATCH v3] spi: atmel: check GPIO validity before using cs_gpios

[Jagan Teki]

On Fri, Apr 7, 2017 at 12:44 PM, Wenyou Yang  wrote:
> Before using the cs_gpio, check if the GPIO is valid or not.
>
> Signed-off-by: Wenyou Yang 
--

Applied to u-boot-spi/master

thanks!
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U-Boot, Linux | Upstream Maintainer
Hyderabad, India.
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[U-Boot] [PATCH] rockchip: rk3399: do not use lower address

[Kever Yang]

The lower address is reserved for ATF, do not use it.

Signed-off-by: Kever Yang 
---

 include/configs/rk3399_common.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h
index 8bd2737..32b94f6 100644
--- a/include/configs/rk3399_common.h
+++ b/include/configs/rk3399_common.h
@@ -59,8 +59,8 @@
 #ifndef CONFIG_SPL_BUILD
 
 #define ENV_MEM_LAYOUT_SETTINGS \
-   "scriptaddr=0x\0" \
-   "pxefile_addr_r=0x0010\0" \
+   "scriptaddr=0x0050\0" \
+   "pxefile_addr_r=0x0060\0" \
"fdt_addr_r=0x01f0\0" \
"kernel_addr_r=0x0200\0" \
"ramdisk_addr_r=0x0400\0"
-- 
1.9.1

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Re: [U-Boot] [PATCH v1] mmc: sdhci: SDHCI controllers also need power

[Jaehoon Chung]

Hi Andy,

On 04/06/2017 07:58 PM, Andy Shevchenko wrote:
> On Thu, Apr 6, 2017 at 1:50 PM, Jaehoon Chung  wrote:
>> On 04/06/2017 06:46 PM, Andy Shevchenko wrote:
>>> On Thu, 2017-04-06 at 18:24 +0900, Jaehoon Chung wrote:
 On 04/06/2017 05:51 PM, Andy Shevchenko wrote:
> On Thu, Apr 6, 2017 at 6:44 AM, Simon Glass 
> wrote:
>> On 1 April 2017 at 07:11, Andy Shevchenko
>>  wrote:
> 
 how about mmc_power_init() is called in mmc_probe()?
>>>
>>> Yes, that's what I'm referring to. But the driver is pure SDHCI, it
>>> doesn't call mmc_probe() IIRC.
>>
>> After converting to DM, it might have the dependent to probing sequence.
>> I'm not sure that u-boot has the priority for probing. maybe not...
>>
>> hmm..need to consider this patch..but i will think about more generic 
>> solution..
> 
> It would be nice to have a generic solution indeed.

Just thinking about below..?

vcc_sd: sdmmc-regulator {
...
regulator-boot-on;
or
regulator-always-on;
...

};

It should be always enabled..

Best Regards,
Jaehoon Chung


> 

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Re: [U-Boot] [PATCH v2 0/2] sunxi: DM-based driver for SPI

[Jagan Teki]

On Thu, Mar 2, 2017 at 2:59 AM, Philipp Tomsich
 wrote:
> A new iteration of the dual-IO aware device-model based SPI driver
> for sunxi (Allwinner SoCs).
>
> As before, this has been tested with dual-IO flashes (Winbond
> W25Q80DV) on our A64-uQ7 at up to 100MHz.
>
> Changes in v2:
>  * Uses wait_bit instead of readl_poll_... for better readability
>  * To address Jagan's concerns regarding the layering violation from
>detecting SPI-NOR transactions and parsing the command-byte to
>detect dual-IO reads, I split this off into a separate patch (to
>make it easier to revert, once the SPI flash subsystem is able to
>handle this for us)---see the commit message for even more info.
>
>
> Philipp Tomsich (2):
>   spi: sunxi_spi: Add DM SPI driver for A31/A80/A64
>   sunxi_spi: add support for dual-IO flashes

Sorry, I don't want to keep the code, which will remove in future.(I
faced many issues like this)

thanks!
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Re: [U-Boot] [PATCH v2 1/2] spi: sunxi_spi: Add DM SPI driver for A31/A80/A64

[Jagan Teki]

On Thu, Mar 2, 2017 at 2:59 AM, Philipp Tomsich
 wrote:
> This adds a rewrite of the SPI driver we had in use for the A31-uQ7
> (sun6i), A80-Q7 (sun9i) and A64-uQ7 (sun50i) boards, which includes
> support for:
>  * cs-gpios (i.e. GPIOs as additional chip-selects)
>  * clocking, reset and pinctrl based on the device-model
>  * dual-IO data receive for controllers that support it (sun50i)
>
> The key difference to the earlier incarnation that we provided as part
> of our BSP is the removal of the legacy reset and clocking code and
> added resilience to configuration errors (i.e. timeouts for the inner
> loops) and converstion to the device-model. This was possible due to a
> non-device-model driver now being present for use with in the SPL.
>
> This has been verified against the A64-uQ7 with data rates up to
> 100MHz and dual-IO ("Fast Read Dual Output" opcode) from the on-board
> SPI-NOR flash.
>
> Signed-off-by: Philipp Tomsich 
> ---
>  drivers/spi/Kconfig |  14 ++
>  drivers/spi/Makefile|   1 +
>  drivers/spi/sunxi_spi.c | 516 
> 
>  3 files changed, 531 insertions(+)
>  create mode 100644 drivers/spi/sunxi_spi.c
>
> diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
> index f3f7dbe..64b6430 100644
> --- a/drivers/spi/Kconfig
> +++ b/drivers/spi/Kconfig
> @@ -132,6 +132,20 @@ config STM32_QSPI
>   used to access the SPI NOR flash chips on platforms embedding
>   this ST IP core.
>
> +config SUNXI_SPI
> +   bool "Allwinner (sunxi) SPI driver"
> +   help
> + Enable the SPI driver for Allwinner SoCs.
> +
> + This driver can be used to access the SPI NOR flash on for
> + communciation with SPI peripherals platforms embedding the
> + Allwinner SoC.  This driver supports the device-model (only)
> + and has support for GPIOs as additional chip-selects.
> +
> + For recent platforms (e.g. sun50i), dual-IO receive mode is
> + also supported, when configured for a SPI-NOR flash in the
> + device tree.
> +
>  config TEGRA114_SPI
> bool "nVidia Tegra114 SPI driver"
> help
> diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
> index fa9a1d2..aab31b4 100644
> --- a/drivers/spi/Makefile
> +++ b/drivers/spi/Makefile
> @@ -40,6 +40,7 @@ obj-$(CONFIG_OMAP3_SPI) += omap3_spi.o
>  obj-$(CONFIG_PIC32_SPI) += pic32_spi.o
>  obj-$(CONFIG_ROCKCHIP_SPI) += rk_spi.o
>  obj-$(CONFIG_SANDBOX_SPI) += sandbox_spi.o
> +obj-$(CONFIG_SUNXI_SPI) += sunxi_spi.o

Is this the common spi driver for sunxi, I'm sure it's specific to 6i,
better name the same. If all yes, try to use the macro names in Linux
spi driver.

>  obj-$(CONFIG_SH_SPI) += sh_spi.o
>  obj-$(CONFIG_SH_QSPI) += sh_qspi.o
>  obj-$(CONFIG_STM32_QSPI) += stm32_qspi.o
> diff --git a/drivers/spi/sunxi_spi.c b/drivers/spi/sunxi_spi.c
> new file mode 100644
> index 000..f26becf
> --- /dev/null
> +++ b/drivers/spi/sunxi_spi.c
> @@ -0,0 +1,516 @@
> +/*
> + * SPI driver for Allwinner sunxi SoCs
> + *
> + * Copyright (C) 2015-2017 Theobroma Systems Design und Consulting GmbH
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + */
> +
> +#include 
> +#ifdef CONFIG_DM_GPIO
> +#include 
> +#endif
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +struct sunxi_spi_platdata {
> +   void *base;
> +   unsigned int max_hz;
> +
> +   struct reset_ctl reset_ctl;
> +   struct clk ahb_clk_gate;
> +   struct clk spi_clk;
> +
> +   /* We could do with a single delay counter, but it won't do harm
> +  to have two, as the same is the case for most other driver. */
> +   uint deactivate_delay_us;   /* Delay to wait after deactivate */
> +   uint activate_delay_us; /* Delay to wait after activate */
> +
> +#if defined(CONFIG_DM_GPIO)
> +   int cs_gpios_num;
> +   struct gpio_desc *cs_gpios;
> +#endif
> +};
> +
> +struct sunxi_spi_driverdata {
> +   unsigned int  fifo_depth;
> +};
> +
> +struct sunxi_spi_privdata {
> +   ulong last_transaction_us;  /* Time of last transaction end */
> +   unsigned int hz_requested;  /* last requested bitrate */
> +   unsigned int hz_actual; /* currently set bitrate */
> +};
> +
> +struct sunxi_spi_reg {
> +   u8  _rsvd[0x4];
> +   u32 GCR;   /* SPI Global Control register */
> +   u32 TCR;   /* SPI Transfer Control register */
> +   u8  _rsvd1[0x4];
> +   u32 IER;   /* SPI Interrupt Control register */
> +   u32 ISR;   /* SPI Interrupt Status register */
> +   u32 FCR;  

[U-Boot] [RFC] tiny-printf: Add support for %p format

[Vignesh R]

Add support for %p, %pa[p], %pM, %pm and %pI4 formats to tiny-printf.
%pM and %pI4 are widely used by SPL networking stack and is required if
networking support is desired in SPL.

Before this patch:
$ size spl/u-boot-spl
   textdata bss dec hex filename
  993254899  218584  322808   4ecf8 spl/u-boot-spl

After this patch (with CONFIG_SPL_NET_SUPPORT):
$ size spl/u-boot-spl
   textdata bss dec hex filename
  997144899  218584  323197   4ee7d spl/u-boot-spl

So, this patch adds ~390 bytes to code size.

If CONFIG_SPL_NET_SUPPORT is not enabled then only %p, %pa, %pap are
supported, this adds ~90 bytes to code size.

Compiler used is:
arm-linux-gnueabihf-gcc (Linaro GCC 6.2-2016.11) 6.2.1 20161016

Signed-off-by: Vignesh R 
---
 lib/tiny-printf.c | 148 ++
 1 file changed, 148 insertions(+)

diff --git a/lib/tiny-printf.c b/lib/tiny-printf.c
index 6def8f98aa41..e524ffb657e6 100644
--- a/lib/tiny-printf.c
+++ b/lib/tiny-printf.c
@@ -12,6 +12,7 @@
 #include 
 #include 
 #include 
+#include 
 
 struct printf_info {
char *bf;   /* Digit buffer */
@@ -52,6 +53,148 @@ static void div_out(struct printf_info *info, unsigned long 
*num,
out_dgt(info, dgt);
 }
 
+#ifdef CONFIG_SPL_NET_SUPPORT
+static void string(struct printf_info *info, char *s)
+{
+   char ch;
+
+   while ((ch = *s++))
+   out(info, ch);
+}
+
+static const char hex_asc[] = "0123456789abcdef";
+#define hex_asc_lo(x)  hex_asc[((x) & 0x0f)]
+#define hex_asc_hi(x)  hex_asc[((x) & 0xf0) >> 4]
+
+static inline char *pack_hex_byte(char *buf, u8 byte)
+{
+   *buf++ = hex_asc_hi(byte);
+   *buf++ = hex_asc_lo(byte);
+   return buf;
+}
+
+static void mac_address_string(struct printf_info *info, u8 *addr,
+   bool separator)
+{
+   /* (6 * 2 hex digits), 5 colons and trailing zero */
+   char mac_addr[6 * 3];
+   char *p = mac_addr;
+   int i;
+
+   for (i = 0; i < 6; i++) {
+   p = pack_hex_byte(p, addr[i]);
+   if (separator && i != 5)
+   *p++ = ':';
+   }
+   *p = '\0';
+
+   string(info, mac_addr);
+}
+
+static char *put_dec_trunc(char *buf, unsigned int q)
+{
+   unsigned int d3, d2, d1, d0;
+   d1 = (q >> 4) & 0xf;
+   d2 = (q >> 8) & 0xf;
+   d3 = (q >> 12);
+
+   d0 = 6 * (d3 + d2 + d1) + (q & 0xf);
+   q = (d0 * 0xcd) >> 11;
+   d0 = d0 - 10 * q;
+   *buf++ = d0 + '0'; /* least significant digit */
+   d1 = q + 9 * d3 + 5 * d2 + d1;
+   if (d1 != 0) {
+   q = (d1 * 0xcd) >> 11;
+   d1 = d1 - 10 * q;
+   *buf++ = d1 + '0'; /* next digit */
+
+   d2 = q + 2 * d2;
+   if ((d2 != 0) || (d3 != 0)) {
+   q = (d2 * 0xd) >> 7;
+   d2 = d2 - 10 * q;
+   *buf++ = d2 + '0'; /* next digit */
+
+   d3 = q + 4 * d3;
+   if (d3 != 0) {
+   q = (d3 * 0xcd) >> 11;
+   d3 = d3 - 10 * q;
+   *buf++ = d3 + '0';  /* next digit */
+   if (q != 0)
+   *buf++ = q + '0'; /* most sign. digit */
+   }
+   }
+   }
+   return buf;
+}
+
+static void ip4_addr_string(struct printf_info *info, u8 *addr)
+{
+   /* (4 * 3 decimal digits), 3 dots and trailing zero */
+   char ip4_addr[4 * 4];
+   char temp[3];   /* hold each IP quad in reverse order */
+   char *p = ip4_addr;
+   int i, digits;
+
+   for (i = 0; i < 4; i++) {
+   digits = put_dec_trunc(temp, addr[i]) - temp;
+   /* reverse the digits in the quad */
+   while (digits--)
+   *p++ = temp[digits];
+   if (i != 3)
+   *p++ = '.';
+   }
+   *p = '\0';
+
+   string(info, ip4_addr);
+}
+#endif
+
+/*
+ * Show a '%p' thing.  A kernel extension is that the '%p' is followed
+ * by an extra set of characters that are extended format
+ * specifiers.
+ *
+ * Right now we handle:
+ *
+ * - 'M' For a 6-byte MAC address, it prints the address in the
+ *   usual colon-separated hex notation.
+ * - 'm' Same as above except there is no colon-separator.
+ * - 'I4'for IPv4 addresses printed in the usual way (dot-separated
+ *   decimal).
+ */
+
+static void pointer(struct printf_info *info, const char *fmt, void *ptr)
+{
+   unsigned long num = (uintptr_t)ptr;
+   unsigned long div;
+
+   switch (*fmt) {
+   case 'a':
+
+   switch (fmt[1]) {
+   case 'p':
+   default:
+   num = *(phys_addr_t *)ptr;
+   break;
+   }
+   break;
+#ifdef