Re: [U-Boot] [PATCH] arm: Add support for poweroff via PSCI

[Michal Simek]

On 1.6.2017 05:11, Simon Glass wrote:
> On 29 May 2017 at 01:11, Michal Simek  wrote:
>> Add support for calling poweroff in case of psci is wired.
>> Based on the same solution as is used for reset.
>>
>> Signed-off-by: Michal Simek 
>> ---
>>
>>  arch/arm/cpu/armv8/fwcall.c |  7 +++
>>  arch/arm/lib/Makefile   |  1 +
>>  arch/arm/lib/poweroff.c | 47 
>> +
>>  3 files changed, 55 insertions(+)
>>  create mode 100644 arch/arm/lib/poweroff.c
>>
> 
> Reviewed-by: Simon Glass 
> 
> BTW I think we use printf() instead of puts() instead.

Thanks for review.

This is what was used in reset.c and normally puts is used for simple
prints. If this is something what we should use then I think that will
be the best to run one big sed and replace all puts by printfs
and deprecate it.

Thanks,
Michal



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Re: [U-Boot] [PATCH 3/3] nds32: board: Support ftsdc010 DM.

[Jaehoon Chung]

On 05/31/2017 10:38 AM, Andes wrote:
> From: rick 
> 
> Support Andestech ftsdc010 SD/MMC device tree flow
> on AG101P/AE3XX platforms.
> 
> Signed-off-by: rick 
> ---
>  board/AndesTech/adp-ae3xx/adp-ae3xx.c   |4 +---
>  board/AndesTech/adp-ag101p/adp-ag101p.c |7 +--
>  configs/adp-ae3xx_defconfig |5 +
>  configs/adp-ag101p_defconfig|5 +
>  include/configs/adp-ae3xx.h |1 -
>  include/configs/adp-ag101p.h|1 -
>  6 files changed, 12 insertions(+), 11 deletions(-)
> 
> diff --git a/board/AndesTech/adp-ae3xx/adp-ae3xx.c 
> b/board/AndesTech/adp-ae3xx/adp-ae3xx.c
> index 98ed4d9..3903427 100644
> --- a/board/AndesTech/adp-ae3xx/adp-ae3xx.c
> +++ b/board/AndesTech/adp-ae3xx/adp-ae3xx.c
> @@ -77,10 +77,8 @@ ulong board_flash_get_legacy(ulong base, int banknum, 
> flash_info_t *info)
>  
>  int board_mmc_init(bd_t *bis)
>  {
> -#ifndef CONFIG_DM_MMC
> -#ifdef CONFIG_FTSDC010
> +#if defined(CONFIG_FTSDC010) && !defined(CONFIG_DM_MMC)
>   ftsdc010_mmc_init(0);
>  #endif
> -#endif

What's difference?

>   return 0;
>  }
> diff --git a/board/AndesTech/adp-ag101p/adp-ag101p.c 
> b/board/AndesTech/adp-ag101p/adp-ag101p.c
> index a462941..826ba14 100644
> --- a/board/AndesTech/adp-ag101p/adp-ag101p.c
> +++ b/board/AndesTech/adp-ag101p/adp-ag101p.c
> @@ -20,7 +20,6 @@ DECLARE_GLOBAL_DATA_PTR;
>  /*
>   * Miscellaneous platform dependent initializations
>   */
> -
>  int board_init(void)
>  {
>   /*
> @@ -30,7 +29,6 @@ int board_init(void)
>   printf("Board: %s\n" , CONFIG_SYS_BOARD);
>   gd->bd->bi_arch_number = MACH_TYPE_ADPAG101P;
>   gd->bd->bi_boot_params = PHYS_SDRAM_0 + 0x400;
> -

This is not relevant to "support ftsdc010 DM".

>   return 0;
>  }
>  
> @@ -39,11 +37,8 @@ int dram_init(void)
>   unsigned long sdram_base = PHYS_SDRAM_0;
>   unsigned long expected_size = PHYS_SDRAM_0_SIZE + PHYS_SDRAM_1_SIZE;
>   unsigned long actual_size;
> -
>   actual_size = get_ram_size((void *)sdram_base, expected_size);
> -
>   gd->ram_size = actual_size;
> -

Ditto.

>   if (expected_size != actual_size) {
>   printf("Warning: Only %lu of %lu MiB SDRAM is working\n",
>   actual_size >> 20, expected_size >> 20);
> @@ -83,7 +78,7 @@ ulong board_flash_get_legacy(ulong base, int banknum, 
> flash_info_t *info)
>  
>  int board_mmc_init(bd_t *bis)
>  {
> -#ifdef CONFIG_FTSDC010
> +#if defined(CONFIG_FTSDC010) && !defined(CONFIG_DM_MMC)
>   ftsdc010_mmc_init(0);
>  #endif
>   return 0;
> diff --git a/configs/adp-ae3xx_defconfig b/configs/adp-ae3xx_defconfig
> index cbef412..d12f307 100644
> --- a/configs/adp-ae3xx_defconfig
> +++ b/configs/adp-ae3xx_defconfig
> @@ -18,6 +18,11 @@ CONFIG_BAUDRATE=38400
>  CONFIG_OF_CONTROL=y
>  CONFIG_NET_RANDOM_ETHADDR=y
>  CONFIG_DM=y
> +CONFIG_BLK=y
> +CONFIG_DM_MMC=y
> +CONFIG_DM_MMC_OPS=y
> +CONFIG_MMC_NDS32=y
> +CONFIG_FTSDC010=y
>  CONFIG_MTD=y
>  CONFIG_CFI_FLASH=y
>  CONFIG_DM_ETH=y
> diff --git a/configs/adp-ag101p_defconfig b/configs/adp-ag101p_defconfig
> index 22b1182..85e2225 100644
> --- a/configs/adp-ag101p_defconfig
> +++ b/configs/adp-ag101p_defconfig
> @@ -18,6 +18,11 @@ CONFIG_BAUDRATE=38400
>  CONFIG_OF_CONTROL=y
>  CONFIG_NET_RANDOM_ETHADDR=y
>  CONFIG_DM=y
> +CONFIG_BLK=y
> +CONFIG_DM_MMC=y
> +CONFIG_DM_MMC_OPS=y

Don't need to enable CONFIG_DM_MMC_OPS and CONFIG_BLK.
when DM_MMC is enabled, they are enabled by default.

> +CONFIG_MMC_NDS32=y
> +CONFIG_FTSDC010=y
>  CONFIG_DM_ETH=y
>  CONFIG_FTMAC100=y
>  CONFIG_DM_SERIAL=y
> diff --git a/include/configs/adp-ae3xx.h b/include/configs/adp-ae3xx.h
> index 6bfc08e..011b2a8 100644
> --- a/include/configs/adp-ae3xx.h
> +++ b/include/configs/adp-ae3xx.h
> @@ -92,7 +92,6 @@
>  /*
>   * SD (MMC) controller
>   */
> -#define CONFIG_FTSDC010
>  #define CONFIG_FTSDC010_NUMBER   1
>  #define CONFIG_FTSDC010_SDIO
>  
> diff --git a/include/configs/adp-ag101p.h b/include/configs/adp-ag101p.h
> index 4cef64e..71a557b 100644
> --- a/include/configs/adp-ag101p.h
> +++ b/include/configs/adp-ag101p.h
> @@ -98,7 +98,6 @@
>  /*
>   * SD (MMC) controller
>   */
> -#define CONFIG_FTSDC010
>  #define CONFIG_FTSDC010_NUMBER   1
>  #define CONFIG_FTSDC010_SDIO
>  
> 

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Re: [U-Boot] [PATCH 2/3] nds32: dts: Support ftsdc010 DM.

[Jaehoon Chung]

On 05/31/2017 10:37 AM, Andes wrote:
> From: rick 
> 
> Support Andestech ftsdc010 SD/MMC device tree flow
> on AG101P/AE3XX platforms.
> 
> Signed-off-by: rick 

Reviewed-by: Jaehoon Chung 

> ---
>  arch/nds32/dts/ae3xx.dts  |8 
>  arch/nds32/dts/ag101p.dts |8 
>  2 files changed, 16 insertions(+)
> 
> diff --git a/arch/nds32/dts/ae3xx.dts b/arch/nds32/dts/ae3xx.dts
> index 4221e4b..781eabc 100644
> --- a/arch/nds32/dts/ae3xx.dts
> +++ b/arch/nds32/dts/ae3xx.dts
> @@ -62,6 +62,14 @@
>   interrupts = <25 4>;
>   };
>  
> + mmc0: mmc@f0e0 {
> + compatible = "andestech,atsdc010";
> + clock-freq-min-max = <40 1>;
> + fifo-depth = <0x10>;
> + reg = <0xf0e0 0x1000>;
> + interrupts = <17 4>;
> + };
> +
>   nor@0,0 {
>   compatible = "cfi-flash";
>   reg = <0x8800 0x1000>;
> diff --git a/arch/nds32/dts/ag101p.dts b/arch/nds32/dts/ag101p.dts
> index 99cde2f..dd2bf8f 100644
> --- a/arch/nds32/dts/ag101p.dts
> +++ b/arch/nds32/dts/ag101p.dts
> @@ -60,4 +60,12 @@
>   reg = <0x9090 0x1000>;
>   interrupts = <25 4>;
>   };
> +
> + mmc0: mmc@98e0 {
> + compatible = "andestech,atsdc010";
> + clock-freq-min-max = <40 3000>;
> + fifo-depth = <0x10>;
> + reg = <0x98e0 0x1000>;
> + interrupts = <5 4>;
> + };
>  };
> 

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Re: [U-Boot] [U-Boot, 3/5] mmc: sh_sdhi: Add 64-bit access to sd_buf support

[Jaehoon Chung]

Hi

On 05/13/2017 10:51 PM, Marek Vasut wrote:
> From: Kouei Abe 
> 
> Renesas SDHI SD/MMC driver has 16-bit width bus access to SD_BUF.
> This adds 64-bit width bus access to SD_BUF.

  aarch64:  +   r8a7795_salvator-x
+board/renesas/salvator-x/salvator-x.c: In function 'board_mmc_init':
+board/renesas/salvator-x/salvator-x.c:196:7: error: 'SH_SDHI_QUIRK_64BIT_BUF' 
undeclared (first use in this function)
+   SH_SDHI_QUIRK_64BIT_BUF);
+   ^~~
+board/renesas/salvator-x/salvator-x.c:196:7: note: each undeclared identifier 
is reported only once for each function it appears in
+make[2]: *** [board/renesas/salvator-x/salvator-x.o] Error 1
+make[1]: *** [board/renesas/salvator-x] Error 2
+make[1]: *** wait: No child processes.  Stop.
+make: *** [sub-make] Error 2

Could you fix this?

Best Regards,
Jaehoon Chung

> 
> Signed-off-by: Kouei Abe 
> Cc: Hiroyuki Yokoyama 
> Cc: Nobuhiro Iwamatsu 
> Cc: Jaehoon Chung 
> Reviewed-by: Nobuhiro Iwamatsu 
> Reviewed-by: Jaehoon Chung 
> ---
>  arch/arm/mach-rmobile/include/mach/sh_sdhi.h |  8 +++--
>  drivers/mmc/sh_sdhi.c| 53 
> ++--
>  2 files changed, 48 insertions(+), 13 deletions(-)
> 
> diff --git a/arch/arm/mach-rmobile/include/mach/sh_sdhi.h 
> b/arch/arm/mach-rmobile/include/mach/sh_sdhi.h
> index 057bf3f8bb..a5ea45b707 100644
> --- a/arch/arm/mach-rmobile/include/mach/sh_sdhi.h
> +++ b/arch/arm/mach-rmobile/include/mach/sh_sdhi.h
> @@ -1,9 +1,9 @@
>  /*
>   * drivers/mmc/sh-sdhi.h
>   *
> - * SD/MMC driver for Reneas rmobile ARM SoCs
> + * SD/MMC driver for Renesas rmobile ARM SoCs
>   *
> - * Copyright (C) 2013-2014 Renesas Electronics Corporation
> + * Copyright (C) 2013-2017 Renesas Electronics Corporation
>   * Copyright (C) 2008-2009 Renesas Solutions Corp.
>   *
>   * SPDX-License-Identifier:  GPL-2.0
> @@ -162,7 +162,9 @@
>  #define  CLKDEV_INIT 40  /* 100 - 400 
> KHz */
>  
>  /* For quirk */
> -#define SH_SDHI_QUIRK_16BIT_BUF  (1)
> +#define SH_SDHI_QUIRK_16BIT_BUF  BIT(0)
> +#define SH_SDHI_QUIRK_64BIT_BUF  BIT(1)
> +
>  int sh_sdhi_init(unsigned long addr, int ch, unsigned long quirks);
>  
>  #endif /* _SH_SDHI_H */
> diff --git a/drivers/mmc/sh_sdhi.c b/drivers/mmc/sh_sdhi.c
> index 7f0b4c2603..d1dd0f0fc3 100644
> --- a/drivers/mmc/sh_sdhi.c
> +++ b/drivers/mmc/sh_sdhi.c
> @@ -3,7 +3,7 @@
>   *
>   * SD/MMC driver for Renesas rmobile ARM SoCs.
>   *
> - * Copyright (C) 2011,2013-2014 Renesas Electronics Corporation
> + * Copyright (C) 2011,2013-2017 Renesas Electronics Corporation
>   * Copyright (C) 2014 Nobuhiro Iwamatsu 
>   * Copyright (C) 2008-2009 Renesas Solutions Corp.
>   *
> @@ -29,6 +29,17 @@ struct sh_sdhi_host {
>   unsigned char sd_error;
>   unsigned char detect_waiting;
>  };
> +
> +static inline void sh_sdhi_writeq(struct sh_sdhi_host *host, int reg, u64 
> val)
> +{
> + writeq(val, host->addr + (reg << host->bus_shift));
> +}
> +
> +static inline u64 sh_sdhi_readq(struct sh_sdhi_host *host, int reg)
> +{
> + return readq(host->addr + (reg << host->bus_shift));
> +}
> +
>  static inline void sh_sdhi_writew(struct sh_sdhi_host *host, int reg, u16 
> val)
>  {
>   writew(val, host->addr + (reg << host->bus_shift));
> @@ -261,6 +272,7 @@ static int sh_sdhi_single_read(struct sh_sdhi_host *host, 
> struct mmc_data *data)
>   long time;
>   unsigned short blocksize, i;
>   unsigned short *p = (unsigned short *)data->dest;
> + u64 *q = (u64 *)data->dest;
>  
>   if ((unsigned long)p & 0x0001) {
>   debug(DRIVER_NAME": %s: The data pointer is unaligned.",
> @@ -281,8 +293,12 @@ static int sh_sdhi_single_read(struct sh_sdhi_host 
> *host, struct mmc_data *data)
>  
>   host->wait_int = 0;
>   blocksize = sh_sdhi_readw(host, SDHI_SIZE);
> - for (i = 0; i < blocksize / 2; i++)
> - *p++ = sh_sdhi_readw(host, SDHI_BUF0);
> + if (host->quirks & SH_SDHI_QUIRK_64BIT_BUF)
> + for (i = 0; i < blocksize / 8; i++)
> + *q++ = sh_sdhi_readq(host, SDHI_BUF0);
> + else
> + for (i = 0; i < blocksize / 2; i++)
> + *p++ = sh_sdhi_readw(host, SDHI_BUF0);
>  
>   time = sh_sdhi_wait_interrupt_flag(host);
>   if (time == 0 || host->sd_error != 0)
> @@ -297,6 +313,7 @@ static int sh_sdhi_multi_read(struct sh_sdhi_host *host, 
> struct mmc_data *data)
>   long time;
>   unsigned short blocksize, i, sec;
>   unsigned short *p = (unsigned short *)data->dest;
> + u64 *q = (u64 *)data->dest;
>  
>   if ((unsigned long)p & 0x0001) {
>   debug(DRIVER_NAME": %s: The data pointer is unaligned.",
> @@ -319,8 +336,12 @@ 

Re: [U-Boot] [PATCH 3/6] rockchip: evb-rk3328: set uart2 and sdmmc io routing

[Simon Glass]

Hi Kever,

On 23 May 2017 at 20:35, Kever Yang  wrote:
> Hi Simon,
>
>
>
> On 05/20/2017 10:29 AM, Simon Glass wrote:
>>
>> Hi Kever,
>>
>> On 16 May 2017 at 21:44, Kever Yang  wrote:
>>>
>>> In rk3328, some function pin may have more than one choice, and muxed
>>> with more than one IO, for example, the UART2 controller IO,
>>> TX and RX, have 3 choice(setting in com_iomux):
>>> - M0 which mux with GPIO1A0/GPIO1A1
>>> - M1 which mux with GPIO2A0/GPIO2A1
>>> - usb2phy which mux with USB2.0 DP/DM pin.
>>>
>>> We should set these IO routing in board file.
>>>
>>> Signed-off-by: Kever Yang 
>>> ---
>>>
>>>   board/rockchip/evb_rk3328/evb-rk3328.c | 12 
>>>   1 file changed, 12 insertions(+)
>>>
>>> diff --git a/board/rockchip/evb_rk3328/evb-rk3328.c
>>> b/board/rockchip/evb_rk3328/evb-rk3328.c
>>> index a7895cb..d9dc782 100644
>>> --- a/board/rockchip/evb_rk3328/evb-rk3328.c
>>> +++ b/board/rockchip/evb_rk3328/evb-rk3328.c
>>> @@ -5,7 +5,10 @@
>>>*/
>>>
>>>   #include 
>>> +#include 
>>> +#include 
>>>   #include 
>>> +#include 
>>>   #include 
>>>   #include 
>>>
>>> @@ -13,6 +16,15 @@ DECLARE_GLOBAL_DATA_PTR;
>>>
>>>   int board_init(void)
>>>   {
>>> +#define GRF_BASE   0xff10
>>> +   struct rk3328_grf_regs * const grf = (void *)GRF_BASE;
>>> +
>>> +   /* uart2 select m1, sdcard select m1*/
>>> +   rk_clrsetreg(>com_iomux,
>>> +IOMUX_SEL_UART2_MASK | IOMUX_SEL_SDMMC_MASK,
>>> +IOMUX_SEL_UART2_M1 << IOMUX_SEL_UART2_SHIFT |
>>> +IOMUX_SEL_SDMMC_M1 << IOMUX_SEL_SDMMC_SHIFT);
>>> +
>>>  return 0;
>>>   }
>>
>> This needs to be done via a call to some sort of driver. The above
>> hack is OK in SPL but not in U-Boot proper.
>
>
> Yes, SPL also needs this. I thinks here should be the right place
> before there is a SPL for rk3328.

But if you are booting from an SD card, how can you need a mux to
select it? Surely the boot ROM must set it up or you would not be able
to boot from MMC?

When will there be SPL for rk3328?

>>
>>
>> See my comments elsewhere about using a misc driver with an IOCTL
>> interface to do this sort of thing. Although here I wonder why you
>> cannot use pinctrl?
>
>
> This is different from traditional pinctrl, kernel also still not have
> final solution on this, see [0], and some people think it should be
> done in boot loader.

How about putting it in grf syscon driver?

>
>
> Thanks,
> - Kever
> [0]
> http://lists.infradead.org/pipermail/linux-rockchip/2016-August/011209.html
>>
>>
>> Regards,
>> Simon
>>
>
>
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Re: [U-Boot] [PATCH 4/4] mips: bmips: enable the SPI flash on the Comtrend AR-5387un

[Simon Glass]

On 23 May 2017 at 13:18, Álvaro Fernández Rojas  wrote:
> It's a Macronix (mx25l12805d) 16 MB SPI flash.
>
> Signed-off-by: Álvaro Fernández Rojas 
> ---
>  arch/mips/dts/comtrend,ar-5387un.dts| 12 
>  configs/comtrend_ar5387un_ram_defconfig |  8 
>  2 files changed, 20 insertions(+)

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH v2 07/28] power: regulator: Add more debugging and fix a missing newline

[Jaehoon Chung]

On 06/01/2017 08:57 AM, Simon Glass wrote:
> This file does not report a few possible errors and one message is missing
> a newline. Fix these.
> 
> Signed-off-by: Simon Glass 

Reviewed-by: Jaehoon Chung 

And CC'd correct Lukasz's mail account.


> ---
> 
> Changes in v2: None
> 
>  drivers/power/regulator/regulator-uclass.c | 8 +---
>  1 file changed, 5 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/power/regulator/regulator-uclass.c 
> b/drivers/power/regulator/regulator-uclass.c
> index a42f80bb2b..0a1d1b36c0 100644
> --- a/drivers/power/regulator/regulator-uclass.c
> +++ b/drivers/power/regulator/regulator-uclass.c
> @@ -146,8 +146,10 @@ int regulator_get_by_platname(const char *plat_name, 
> struct udevice **devp)
>  
>   for (ret = uclass_find_first_device(UCLASS_REGULATOR, ); dev;
>ret = uclass_find_next_device()) {
> - if (ret)
> + if (ret) {
> + debug("regulator %s, ret=%d\n", dev->name, ret);
>   continue;
> + }
>  
>   uc_pdata = dev_get_uclass_platdata(dev);
>   if (!uc_pdata || strcmp(plat_name, uc_pdata->name))
> @@ -156,7 +158,7 @@ int regulator_get_by_platname(const char *plat_name, 
> struct udevice **devp)
>   return uclass_get_device_tail(dev, 0, devp);
>   }
>  
> - debug("%s: can't find: %s\n", __func__, plat_name);
> + debug("%s: can't find: %s, ret=%d\n", __func__, plat_name, ret);
>  
>   return -ENODEV;
>  }
> @@ -219,7 +221,7 @@ int regulator_autoset_by_name(const char *platname, 
> struct udevice **devp)
>   if (devp)
>   *devp = dev;
>   if (ret) {
> - debug("Can get the regulator: %s!", platname);
> + debug("Can get the regulator: %s (err=%d)\n", platname, ret);
>   return ret;
>   }
>  
> 

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Re: [U-Boot] [PATCH] scripts/Makefile.lib: Only apply u-boot.dtsi files in the target directory

[Simon Glass]

On 24 May 2017 at 09:04, Tom Rini  wrote:
> We only want to apply files such as 'omap5-u-boot.dtsi', which resides
> in arch/arm/dts/ to other files in arch/arm/dts/ and not say
> test/overlay/.  Rework the make logic to check for -u-boot.dtsi files in
> the same directory as their target dts.
>
> Cc: Simon Glass 
> Reported-by: Pantelis Antoniou 
> Signed-off-by: Tom Rini 
> ---
>  scripts/Makefile.lib | 12 +---
>  1 file changed, 5 insertions(+), 7 deletions(-)

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH 3/4] mips: bmips: add bcm63xx-hsspi driver support for BCM63268

[Simon Glass]

On 23 May 2017 at 13:18, Álvaro Fernández Rojas  wrote:
> This driver manages the high speed SPI controller present on this SoC.
>
> Signed-off-by: Álvaro Fernández Rojas 
> ---
>  arch/mips/dts/brcm,bcm63268.dtsi | 21 +
>  1 file changed, 21 insertions(+)
>

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH v2 1/2] rockchip: Add basic support for phyCORE-RK3288 SoM based carrier board

[Simon Glass]

On 26 May 2017 at 07:55, Wadim Egorov  wrote:
> Hello Simon,
>
>
> Am 24.05.2017 um 02:44 schrieb Simon Glass:
>> Hi Wadim,
>>
>> On 15 May 2017 at 08:19, Wadim Egorov  wrote:
>>> The phyCORE-RK3288 is a SoM (System on Module) containing a RK3288 SoC.
>>> The module can be connected to different carrier boards.
>>> It can be also equipped with different RAM, SPI flash and eMMC variants.
>>> The Rapid Development Kit option is using the following setup:
>>>
>>>   - 1 GB DDR3 RAM (2 Banks)
>>>   - 1x 4 KB EEPROM
>>>   - DP83867 Gigabit Ethernet PHY
>>>   - 16 MB SPI Flash
>>>   - 4 GB eMMC Flash
>>>
>>> Add basic support for the PCM-947 carrier board, a RK3288 based development
>>> board made by PHYTEC. This board works in a combination with
>>> the phyCORE-RK3288 System on Module.
>>>
>>> Signed-off-by: Wadim Egorov 
>>> Reviewed-by: Simon Glass 
>>> ---
>>> Changes in v2:
>>> - Move phycore initialization to an own function
>>> - Use of_machine_is_compatible() instead of #ifdef
>>> - Drop board_boot_order() and use spl_boot_device()
>>> - Added Reviewed-by: Simon Glass 
>>>
>>> ---
>>>  arch/arm/dts/Makefile|   1 +
>>>  arch/arm/dts/rk3288-phycore-rdk.dts  | 294 
>>>  arch/arm/dts/rk3288-phycore-som.dtsi | 503 
>>> +++
>>>  arch/arm/mach-rockchip/rk3288-board-spl.c|  37 ++
>>>  arch/arm/mach-rockchip/rk3288/Kconfig|  10 +
>>>  board/phytec/phycore_rk3288/Kconfig  |  15 +
>>>  board/phytec/phycore_rk3288/MAINTAINERS  |   6 +
>>>  board/phytec/phycore_rk3288/Makefile |   8 +
>>>  board/phytec/phycore_rk3288/phycore-rk3288.c |   8 +
>>>  configs/phycore-rk3288_defconfig |  69 
>>>  include/configs/phycore_rk3288.h |  23 ++
>>>  11 files changed, 974 insertions(+)
>>>  create mode 100644 arch/arm/dts/rk3288-phycore-rdk.dts
>>>  create mode 100644 arch/arm/dts/rk3288-phycore-som.dtsi
>>>  create mode 100644 board/phytec/phycore_rk3288/Kconfig
>>>  create mode 100644 board/phytec/phycore_rk3288/MAINTAINERS
>>>  create mode 100644 board/phytec/phycore_rk3288/Makefile
>>>  create mode 100644 board/phytec/phycore_rk3288/phycore-rk3288.c
>>>  create mode 100644 configs/phycore-rk3288_defconfig
>>>  create mode 100644 include/configs/phycore_rk3288.h
>> This unfortunately causes build errors on various rockchip boards.
>
> This seems to be a problem because I am using of_machine_is_compatible().
> I think we will need a CONFIG_TARGET_PHYCORE_RK3288 guard there.

You mean that it does not work? You should be able to call that function.

>
>>
>> Try 'buildman rockchip' to see it.
>>
>> Please see below.
>>
>> [...]
>>
>>> diff --git a/arch/arm/mach-rockchip/rk3288-board-spl.c 
>>> b/arch/arm/mach-rockchip/rk3288-board-spl.c
>>> index 74f3379..724dcb4 100644
>>> --- a/arch/arm/mach-rockchip/rk3288-board-spl.c
>>> +++ b/arch/arm/mach-rockchip/rk3288-board-spl.c
>>> @@ -8,6 +8,7 @@
>>>  #include 
>>>  #include 
>>>  #include 
>>> +#include 
>>>  #include 
>>>  #include 
>>>  #include 
>>> @@ -25,6 +26,7 @@
>>>  #include 
>>>  #include 
>>>  #include 
>>> +#include 
>>>
>>>  DECLARE_GLOBAL_DATA_PTR;
>>>
>>> @@ -157,6 +159,38 @@ static int configure_emmc(struct udevice *pinctrl)
>>>  }
>>>  #endif
>>>
>>> +void phycore_init(void)
>>> +{
>>> +   struct udevice *dev;
>>> +   uint reg;
>>> +   int ret;
>>> +
>>> +   ret = uclass_get_device(UCLASS_I2C, 0, );
>>> +   if (ret) {
>>> +   debug("I2C init failed: %d\n", ret);
>>> +   return;
>>> +   }
>>> +
>>> +   ret = i2c_get_chip(dev, 0x1c, 1, );
>> We should not be hard-coding the bus address here.
>>
>> See veyron_init() for an example of another way to do this.
>>
>>> +   if (ret) {
>>> +   debug("Cannot find RK818: %d\n", ret);
>>> +   return;
>>> +   }
>>> +
>>> +   reg = dm_i2c_reg_read(dev, REG_USB_CTRL);
>>> +
>>> +   /*
>>> +* Increase USB input current selection to 2A and close charger
>>> +* when usb lower then 3.4V.
>>> +*/
>>> +   reg |= 0x77;
>>> +   ret = dm_i2c_reg_write(dev, REG_USB_CTRL, reg);
>> Here you are hacking registers in the PMIC. This should go in the PMIC
>> driver. See rk8xx_spl_configure_buck() for how to do this in SPL
>> without bringing in the whole regulator framework.
>
> For this I have to enable CONFIG_SPL_POWER_SUPPORT to get the pmic part
> compiled.
> Unfortunately, I am not able to boot my board with POWER_SUPPORT
> enabled, because the dm_init_and_scan() function which is called from
> spl_early_init() is failing.
> Do you have any hints on what the problem could be?

Do you know what the error is? Also you could put #define DEBUG in
lists.c pehaps?

>
> Regards,
> Wadim
>
>>
>>> +   if (ret) {
>>> +   debug("Unable to set RK818 REG_USB_CTRL: %d\n", ret);
>>> + 

Re: [U-Boot] TPM2.0 support in u-boot

[Simon Glass]

Hi,

On 29 May 2017 at 02:28,   wrote:
> Hi,
>
> I was wondering if anyone is currently working on u-boot support for TPM2.0 
> chips, especially the "native" spi versions.
> (i.e. direct access to the tpm via spi, not via something like the pch)
> Having support for TPM2.0 in u-boot is crucial in order to achieve some 
> measured boot scenarios.
>
> I scanned through the mailing list but only found someone asking whether this 
> was possible
> https://lists.denx.de/pipermail/u-boot/2016-December/275317.html
> but before I might start working on it I was wondering if anyone else is 
> currently doing this and/or someone is interested in doing so.

I am not aware of anything. Patches are welcome!

Regards,
Simon
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Re: [U-Boot] [PATCH] cmd/fdt: support single value replacement within an array

[Simon Glass]

On 30 May 2017 at 07:05, Hannes Schmelzer
 wrote:
> With this commit we can modify single values within an array of a dts
> property.
>
> This is useful if we have for example a pwm-backlight where we want to
> modifiy the pwm frequency per u-boot script.
>
> The pwm is described in dts like this:
>
> backlight {
> pwms = <0x002b 0x 0x004c4b40>;
> };
>
> For changing the frequency, here the 3rd parameter, we simply type:
>
> fdt set /backlight pwms ;
>
> For doing all this we:
> - backup the property content into our 'SCRATCHPAD'
> - only modify the array-cell if the new content doesn't start with '?'
>
> Signed-off-by: Hannes Schmelzer 
>
> ---
>
>  cmd/fdt.c | 29 +
>  1 file changed, 21 insertions(+), 8 deletions(-)

Reviewed-by: Simon Glass 

I imagine this would have to be done before setting 'stdout' to
'vidconsole' so that the PWM is not inited before this script runs.
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Re: [U-Boot] [PATCH v4 5/5] usb: host: xhci-dwc3: Add generic PHY support

[Simon Glass]

On 29 May 2017 at 01:57,   wrote:
> From: Patrice Chotard 
>
> Add support of generic PHY framework support
>
> Signed-off-by: Patrice Chotard 
> ---
> v4: _ none
> v3: _ use generic_phy_valid() method
> v2: _ none
>
>  drivers/usb/host/xhci-dwc3.c | 32 
>  1 file changed, 32 insertions(+)
>

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH 4/4] x86: baytrail: Change lpe/lpss-sio/scc FSP properties to integer

[Simon Glass]

On 31 May 2017 at 02:04, Bin Meng  wrote:
> At present lpe/lpss-sio/scc FSP properties are all boolean, but in
> fact for "enable-lpe" it has 3 possible options. This adds macros
> for these options and change the property from a boolean type to
> an integer type, and change their names to explicitly indicate what
> the property is really for.
>
> Signed-off-by: Bin Meng 
>
> ---
>
>  arch/x86/cpu/baytrail/fsp_configs.c  | 11 ++-
>  arch/x86/dts/bayleybay.dts   |  6 +++---
>  arch/x86/dts/baytrail_som-db5800-som-6867.dts|  4 ++--
>  arch/x86/dts/conga-qeval20-qa3-e3845.dts |  6 +++---
>  arch/x86/dts/dfi-bt700.dtsi  |  6 +++---
>  arch/x86/dts/minnowmax.dts   |  6 +++---
>  arch/x86/include/asm/arch-baytrail/fsp/fsp_configs.h | 10 ++
>  arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h |  6 +++---
>  doc/device-tree-bindings/misc/intel,baytrail-fsp.txt | 12 ++--
>  9 files changed, 39 insertions(+), 28 deletions(-)

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH v4 4/5] drivers: phy: add generic_phy_valid() method

[Simon Glass]

On 29 May 2017 at 01:57,   wrote:
> From: Patrice Chotard 
>
> This allow to check if a PHY has been correctly
> initialised and avoid to get access to phy struct.
>
> Signed-off-by: Patrice Chotard 
> ---
>
> v4: _ none
>
>  drivers/phy/phy-uclass.c | 5 +
>  include/generic-phy.h| 8 
>  2 files changed, 13 insertions(+)

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH] arm: Always keep the dtb section on objcopy

[Simon Glass]

Hi,

On 25 May 2017 at 10:23, Pantelis Antoniou
 wrote:
> The dtb blob section must always be present in the resulting image.
> Either if OF_EMBEDED is used or if unit tests include dtb blobs.
>

OF_EMBED (and below)

Reviewed-by: Simon Glass 

> Signed-off-by: Pantelis Antoniou 
> ---
>  arch/arm/config.mk | 6 --
>  1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/config.mk b/arch/arm/config.mk
> index a5eebb9..1a9 100644
> --- a/arch/arm/config.mk
> +++ b/arch/arm/config.mk
> @@ -142,9 +142,11 @@ OBJCOPYFLAGS += -j .text -j .secure_text -j .secure_data 
> -j .rodata -j .hash \
> -j .data -j .got -j .got.plt -j .u_boot_list -j .rel.dyn
>  endif
>
> -ifdef CONFIG_OF_EMBED
> +# if a dtb section exists we always have to include it
> +# there are only two cases where it is generated
> +# 1) OF_EMBEDED is turned on
> +# 2) unit tests include device tree blobs
>  OBJCOPYFLAGS += -j .dtb.init.rodata
> -endif
>
>  ifdef CONFIG_EFI_LOADER
>  OBJCOPYFLAGS += -j .efi_runtime -j .efi_runtime_rel
> --
> 2.1.4
>

Regards,
Simon
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Re: [U-Boot] [PATCH 3/4] x86: baytrail: Use macros instead of magic numbers for FSP settings

[Simon Glass]

On 31 May 2017 at 02:04, Bin Meng  wrote:
> Introduce various meaningful macros for FSP settings and switch over
> to use them instead of magic numbers.
>
> Signed-off-by: Bin Meng 
> ---
>
>  arch/x86/cpu/baytrail/fsp_configs.c| 35 +-
>  arch/x86/dts/bayleybay.dts | 17 ++---
>  arch/x86/dts/baytrail_som-db5800-som-6867.dts  | 15 +++--
>  arch/x86/dts/conga-qeval20-qa3-e3845.dts   | 29 
>  arch/x86/dts/dfi-bt700.dtsi| 29 
>  arch/x86/dts/minnowmax.dts | 29 
>  .../include/asm/arch-baytrail/fsp/fsp_configs.h| 77 
> ++
>  .../misc/intel,baytrail-fsp.txt| 74 +++--
>  8 files changed, 181 insertions(+), 124 deletions(-)

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH v4 2/5] usb: host: xhci-dwc3: Add dual role mode support from DT

[Simon Glass]

On 29 May 2017 at 01:57,   wrote:
> From: Patrice Chotard 
>
> DWC3 dual role mode is selected using DT "dr_mode"
> property. If not found, DWC3 controller is configured
> in HOST mode by default
>
> Signed-off-by: Patrice Chotard 
> ---
> d4: _ none
> v3: _ none
> v2: _ none
>
>  drivers/usb/host/xhci-dwc3.c | 9 +
>  1 file changed, 9 insertions(+)
>

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH] edid: Fix gcc 7.1 warning

[Simon Glass]

On 23 May 2017 at 15:05, Jernej Skrabec  wrote:
> This commit fixes the warning produced by gcc 7.1.
>
> Signed-off-by: Jernej Skrabec 
> ---
>
>  common/edid.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH v7 0/6] Add Intel Arria 10 SoC FPGA driver

[Ley Foon Tan]

On Tue, 2017-05-30 at 08:48 -0500, Dinh Nguyen wrote:
> 
> On 05/28/2017 11:00 PM, tien.fong.c...@intel.com wrote:
> > 
> > From: Tien Fong Chee 
> > 
> > This is the 6th version of patchset to adds support for Intel Arria
> > 10 SoC FPGA
> > driver. This version mainly resolved comments from Dinh in [v6].
> > This series is working on top of u-boot.git - http://git.denx.de/u-
> > boot.git.
> > 
> > [v5]: https://www.mail-archive.com/u-boot@lists.denx.de/msg250687.h
> > tml
> > 
> > v6 -> v7 changes:
> > -
> > - Changed commit header of patch 4/6 to more generic.
> > 
> > Patchset history
> > 
> > [v1]: https://www.mail-archive.com/u-boot@lists.denx.de/msg247788.h
> > tml
> > [v2]: https://www.mail-archive.com/u-boot@lists.denx.de/msg248541.h
> > tml
> > [v3]: https://www.mail-archive.com/u-boot@lists.denx.de/msg249160.h
> > tml
> > [v4]: https://www.mail-archive.com/u-boot@lists.denx.de/msg250149.h
> > tml
> > [v5]: https://www.mail-archive.com/u-boot@lists.denx.de/msg250517.h
> > tml
> > 
> > Tien Fong Chee (6):
> >   arm: socfpga: Remove unused passing parameter of
> > socfpga_bridges_reset
> >   arm: socfpga: Restructure FPGA driver in the preparation to
> > support
> > A10
> >   arm: socfpga: Enable FPGA driver on SPL
> >   drivers: Enable FPGA driver build on SPL
> >   arm: socfpga: Move FPGA manager driver to FPGA driver
> >   arm: socfpga: Add FPGA driver support for Arria 10
> > 
> >  arch/arm/mach-socfpga/Makefile |   1 -
> >  arch/arm/mach-socfpga/fpga_manager.c   |  78 
> >  arch/arm/mach-socfpga/include/mach/fpga_manager.h  |  70 +--
> >  .../include/mach/fpga_manager_arria10.h| 100 +
> >  .../mach/{fpga_manager.h => fpga_manager_gen5.h}   |  69 ++-
> >  .../include/mach/reset_manager_arria10.h   |   2 +-
> >  arch/arm/mach-socfpga/reset_manager_arria10.c  |   4 +-
> >  drivers/Makefile   |   1 +
> >  drivers/fpga/Makefile  |   2 +
> >  drivers/fpga/socfpga.c | 241 +--
> > 
> >  drivers/fpga/socfpga_arria10.c | 479
> > +
> >  drivers/fpga/{socfpga.c => socfpga_gen5.c} |  98 ++---
> >  include/configs/socfpga_common.h   |   4 +-
> >  13 files changed, 685 insertions(+), 464 deletions(-)
> >  delete mode 100644 arch/arm/mach-socfpga/fpga_manager.c
> >  create mode 100644 arch/arm/mach-
> > socfpga/include/mach/fpga_manager_arria10.h
> >  copy arch/arm/mach-socfpga/include/mach/{fpga_manager.h =>
> > fpga_manager_gen5.h} (57%)
> >  create mode 100644 drivers/fpga/socfpga_arria10.c
> >  copy drivers/fpga/{socfpga.c => socfpga_gen5.c} (85%)
> > 
> For the series,
> 
> Reviewed-by: Dinh Nguyen 

Reviewed-by: Ley Foon Tan 


Thanks.
Ley Foon
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Re: [U-Boot] [PATCH v4 3/5] drivers: phy: Set phy->dev to NULL when generic_phy_get_by_index() fails

[Simon Glass]

On 29 May 2017 at 01:57,   wrote:
> From: Patrice Chotard 
>
> phy->dev need to be set to NULL in case of generic_phy_get_by_index()
> fails. Then phy->dev can be used to check if the phy is valid
>
> Reported-by: Jean-Jacques Hiblot 
> Signed-off-by: Patrice Chotard 
> ---
>
> v4: _ ensure that phy->dev is set to NULL in case of
>   generic_phy_get_by_index() fails
>
>  drivers/phy/phy-uclass.c | 2 ++
>  1 file changed, 2 insertions(+)
>

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH] odroid: remove COMPAT_DM_I2C_COMPAT config

[Simon Glass]

On 29 May 2017 at 19:06, Jaehoon Chung  wrote:
> Remove the COMPAT_DM_I2C_COMPAT config.
>
> Signed-off-by: Jaehoon Chung 
> ---
> This patch is based on "Enable the CONFIG_DM_MMC for Exynos4 series"
>
>  configs/odroid_defconfig | 2 +-
>  include/configs/odroid.h | 5 -
>  2 files changed, 1 insertion(+), 6 deletions(-)
>

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH 26/26] dm: tegra: nyan-big: Move to livetree

[Simon Glass]

Hi Marcel,

On 29 May 2017 at 09:08, Marcel Ziswiler  wrote:
> Hi Simon
>
> On Fri, 2017-05-19 at 08:31 -0600, Simon Glass wrote:
>> Change this board to use a live device tree after relocation.
>>
>> Signed-off-by: Simon Glass 
>> ---
>>
>>  configs/nyan-big_defconfig | 1 +
>>  1 file changed, 1 insertion(+)
>>
>> diff --git a/configs/nyan-big_defconfig b/configs/nyan-big_defconfig
>> index a152ff6915..82be85a834 100644
>> --- a/configs/nyan-big_defconfig
>> +++ b/configs/nyan-big_defconfig
>> @@ -33,6 +33,7 @@ CONFIG_CMD_EXT4_WRITE=y
>>  # CONFIG_SPL_DOS_PARTITION is not set
>>  # CONFIG_SPL_ISO_PARTITION is not set
>>  # CONFIG_SPL_EFI_PARTITION is not set
>> +CONFIG_OF_LIVE=y
>>  CONFIG_SPL_DM=y
>>  CONFIG_REGMAP=y
>>  CONFIG_SYSCON=y
>
> Doing the same on dm/master for Apalis TK1 gives me the following:
>
> U-Boot 2017.05-00795-g40fcab4-dirty (May 29 2017 - 16:52:17 +0200)
>
> TEGRA124
> DRAM:  2 GiB
> Error binding driver 'gpio_tegra': -22
> Some drivers failed to bind
> initcall sequence fffad294 failed at call 80124360 (err=-22)
> ### ERROR ### Please RESET the board ###
>
> Do you happen to know what may go wrong here?

Not really. Can you diagnose it? I suspect it is in gpio_tegra_bind().

>
> I do actually even own a nyan-big but so far never run any mainline
> stuff on it as I am missing Servo and/or Yoshi et. al.

Sure. I did send a chain series (u-boot-dm/chain-working) which allows
it to run without those.

>
> Is there any particular reason you did not do this on a more accessible
> platform like e.g. Jetson TK1?

I do have one of those boards, but unfortunately I cannot find it. I'm
hoping to track it down in the next month or so.

>
> BTW: The same happens on Jetson TK1 once I enable live tree:
>
> U-Boot SPL 2017.05-00795-g40fcab4-dirty (May 29 2017 - 17:03:18)
> Trying to boot from RAM
>
> U-Boot 2017.05-00795-g40fcab4-dirty (May 29 2017 - 17:03:18 +0200)
>
> TEGRA124
> Model: NVIDIA Jetson TK1
> Board: NVIDIA Jetson TK1
> DRAM:  2 GiB
> Error binding driver 'gpio_tegra': -22
> Some drivers failed to bind
> initcall sequence fffa8ba4 failed at call 801235b8 (err=-22)
> ### ERROR ### Please RESET the board ###
>
> Cheers
>
> Marcel

Thank you for testing. I do have a beaver as well so may be able to
repeat it on that.

Regards,
Simon
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Re: [U-Boot] [PATCH 1/4] x86: baytrail: Change "fsp, mrc-init-tseg-size" default value to 1

[Simon Glass]

On 31 May 2017 at 02:04, Bin Meng  wrote:
> The default value of "fsp,mrc-init-tseg-size" should be 1 (1MB) per
> FSP default settings. 0 is not valid.
>
> Signed-off-by: Bin Meng 
> ---
>
>  arch/x86/cpu/baytrail/fsp_configs.c   | 2 +-
>  arch/x86/dts/bayleybay.dts| 2 +-
>  arch/x86/dts/baytrail_som-db5800-som-6867.dts | 2 +-
>  arch/x86/dts/conga-qeval20-qa3-e3845.dts  | 2 +-
>  arch/x86/dts/dfi-bt700.dtsi   | 2 +-
>  arch/x86/dts/minnowmax.dts| 2 +-
>  6 files changed, 6 insertions(+), 6 deletions(-)
>

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH 12/12] README: Add instructions for chain-loading U-Boot

[Simon Glass]

Hi Peter,

On 29 May 2017 at 07:29, Peter Robinson  wrote:
>  On Mon, May 22, 2017 at 12:17 PM, Simon Glass  wrote:
>> Most Chromebooks support chain-loading U-Boot but instructions are
>> somewhat scattered. Add a README to hold this information within the
>> U-Boot tree. Also add the standard developer keys to simplify the
>> instructions, since they are small.
>>
>> For now this only supports nyan-big.
>>
>> Signed-off-by: Simon Glass 
>> ---
>>
>>  doc/README.chromium  | 222 
>> +++
>>  doc/chromium/devkeys/kernel.keyblock | Bin 0 -> 1208 bytes
>>  doc/chromium/devkeys/kernel_data_key.vbprivk | Bin 0 -> 1199 bytes
>>  3 files changed, 222 insertions(+)
>>  create mode 100644 doc/README.chromium
>>  create mode 100644 doc/chromium/devkeys/kernel.keyblock
>>  create mode 100644 doc/chromium/devkeys/kernel_data_key.vbprivk
>>
>> diff --git a/doc/README.chromium b/doc/README.chromium
>> new file mode 100644
>> index 00..1dd111c65d
>> --- /dev/null
>> +++ b/doc/README.chromium
>> @@ -0,0 +1,222 @@
>> +Running U-Boot from coreboot on Chromebooks
>> +===
>> +
>> +U-Boot can be used as a secondary boot loader in a few situations such as 
>> from
>> +UEFI and coreboot (see README.x86). Recent Chromebooks use coreboot even on
>> +ARM platforms to start up the machine.
>> +
>> +This document aims to provide a guide to booting U-Boot on a Chromebook. It
>> +is only a starting point, and there are many guides on the interwebs. But
>> +placing this information in the U-Boot tree should make it easier to find 
>> for
>> +those who use U-Boot habitually.
>> +
>> +Most of these platforms are supported by U-Boot natively, but it is risky to
>> +replace the ROM unless you have a servo board and cable to restore it with.
>> +
>> +
>> +For all of these the standard U-Boot build instructions apply. For example 
>> on
>> +ARM:
>> +
>> +   sudo apt install gcc-arm-linux-gnueabi
>> +   mkdir b
>> +   make O=b/nyan_big CROSS_COMPILE=arm-linux-gnueabi- nyan-big_defconfig all
>> +
>> +You can obtain the vbutil_kernel utility here:
>> +
>> +   https://drive.google.com/open?id=0B7WYZbZ9zd-3dHlVVXo4VXE2T0U
>> +
>> +
>> +Snow (Samsung ARM Chromebook)
>> +-
>> +
>> +See here:
>> +
>> +https://www.chromium.org/chromium-os/firmware-porting-guide/using-nv-u-boot-on-the-samsung-arm-chromebook
>> +
>> +
>> +Nyan-big
>> +
>> +
>> +Compiled based on information here:
>> +https://lists.denx.de/pipermail/u-boot/2015-March/209530.html
>> +https://git.collabora.com/cgit/user/tomeu/u-boot.git/commit/?h=nyan-big
>> +https://lists.denx.de/pipermail/u-boot/2017-May/289491.html
>> +https://github.com/chromeos-nvidia-androidtv/gnu-linux-on-acer-chromebook-13#copy-data-to-the-sd-card
>> +
>> +1. Patch U-Boot
>> +
>> +Open include/configs/tegra124-common.h
>> +
>> +Change:
>> +
>> +#define CONFIG_SYS_TEXT_BASE   0x8011
>> +
>> +to:
>> +
>> +#define CONFIG_SYS_TEXT_BASE   0x81000100
>
> One query on this one, is it possible to define or override that in
> configs/nyan-big_defconfig rather than in the include file. This would
> be useful from a distro PoV where we build numerous u-boot binaries
> from a single source tree.

Yes I think so. I will have a think about it.

Regards,
Simon
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Re: [U-Boot] [PATCH v4 1/5] usb: host: xhci-dwc3: Convert driver to DM

[Simon Glass]

On 29 May 2017 at 01:57,   wrote:
> From: Patrice Chotard 
>
> Add Driver Model support with use of generic DT
> compatible string "snps,dwc3"
>
> Signed-off-by: Patrice Chotard 
> ---
> v4: _ none
> v3: _ none
> v2: _ use dev_get_addr() and removed useless piece of code
>
>  drivers/usb/host/xhci-dwc3.c | 50 
> 
>  1 file changed, 50 insertions(+)
>

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Re: [U-Boot] [PATCH v4 11/11] usb: host: ohci-generic: add generic PHY support

[Simon Glass]

On 24 May 2017 at 07:01,   wrote:
> From: Patrice Chotard 
>
> Extend ohci-generic driver with generic PHY framework
>
> Signed-off-by: Patrice Chotard 
> ---
>
> v4: _ use generic_phy_valid() before generic_phy_exit() call
>
> v3: _ extract in this patch the PHY support add-on from previous patch 5
>
>  drivers/usb/host/ohci-generic.c | 29 +
>  1 file changed, 29 insertions(+)

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Re: [U-Boot] [PATCH] Kconfig: Add description for CMD_POWEROFF

[Simon Glass]

On 29 May 2017 at 01:06, Michal Simek  wrote:
> Add poweroff description to Kconfig to make it selectable
> via menuconfig.
>
> Signed-off-by: Michal Simek 
> ---
>
>  cmd/Kconfig | 5 -
>  1 file changed, 4 insertions(+), 1 deletion(-)

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH v4 10/11] usb: host: ohci-generic: add RESET support

[Simon Glass]

On 24 May 2017 at 07:01,   wrote:
> From: Patrice Chotard 
>
> use array to save deasserted resets reference in order to
> assert them in case of error during probe() or during driver
> removal.
>
> Signed-off-by: Patrice Chotard 
> ---
>
> v4: _ update the memory allocation for deasserted resets. Replace lists 
> by arrays.
> _ usage of new RESET methods reset_assert_all() and clk_disable_all().
>
> v3: _ extract in this patch the RESET support add-on from previous patch 5
> _ keep deasserted resets reference in list in order to
>   assert resets in error path or in .remove callback
>
> v2: _ add error path management
> _ add .remove callback
>
>  drivers/usb/host/ohci-generic.c | 41 
> -
>  1 file changed, 40 insertions(+), 1 deletion(-)
>

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH v3 3/4] drivers: phy: add generic_phy_valid() method

[Simon Glass]

On 23 May 2017 at 03:57,   wrote:
> From: Patrice Chotard 
>
> This allow to check if a PHY has been correctly
> initialised and avoid to get access to phy struct.
>
> Signed-off-by: Patrice Chotard 
> ---
>  drivers/phy/phy-uclass.c | 5 +
>  include/generic-phy.h| 8 
>  2 files changed, 13 insertions(+)

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Re: [U-Boot] [PATCH v3 2/3] rockchip: mkimage: force 2KB alignment for init_size

[Simon Glass]

On 30 May 2017 at 15:32, Philipp Tomsich
 wrote:
> The Rockchip BootROM relies on init_size being aligned to 2KB
> (see https://lists.denx.de/pipermail/u-boot/2017-May/293268.html).
>
> This pads the image to 2KB both for SD card images and SPI images
> and uses a common symbolic constant for the alignment.
>
> Signed-off-by: Philipp Tomsich 
>
> ---
>
> Changes in v3:
> - (added patch) forces the alignment/padding to 2KB for SD images, as
>   this would otherwise break the back-to-bootrom functionality
>
> Changes in v2: None
>
>  tools/rkcommon.h | 1 +
>  tools/rksd.c | 6 +++---
>  tools/rkspi.c| 2 +-
>  3 files changed, 5 insertions(+), 4 deletions(-)

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Re: [U-Boot] [PATCH v2 4/4] sunxi: video: Add H3/H5 TV out driver

[Simon Glass]

Hi Maxime,

On 30 May 2017 at 14:41, Maxime Ripard  wrote:
> On Wed, May 24, 2017 at 05:34:52PM +0200, Jernej Škrabec wrote:
>> Hi,
>>
>> Dne torek, 23. maj 2017 ob 22:22:14 CEST je Maxime Ripard napisal(a):
>> > Hi Jernej,
>> >
>> > On Mon, May 22, 2017 at 08:49:57PM +0200, Jernej Škrabec wrote:
>> > > Dne ponedeljek, 22. maj 2017 ob 09:35:56 CEST je Maxime Ripard 
>> > > napisal(a):
>> > > > On Fri, May 19, 2017 at 05:41:17PM +0200, Jernej Skrabec wrote:
>> > > > > This commit adds support for TV (composite) output.
>> > > > >
>> > > > > Because there is no mechanism to select TV standard, PAL is
>> > > > > hardcoded.
>> > > >
>> > > > I'd rather use a consistent mechanism with the old driver (even if we
>> > > > only support PAL right now and reject any other option), and using
>> > > > composite-pal as monitor.
>> > >
>> > > I have few arguments against that:
>> > >
>> > > 1. Code for parsing that env variable is in videomodes.[c|h], which is
>> > > clearly a part of an older video framework (ctfb). I didn't want to
>> > > include any legacy code.
>> > >
>> > > 2. Even if this code is used for parsing, it would bring a lot of
>> > > confusion. For now, we can say that docs/README.video does not apply to
>> > > H3 and newer SoCs. If we implement this only partially, we would need to
>> > > describe in details which of each setting is honored with the new driver
>> > > and which not. Even then, a lot of users would skip that description and
>> > > complain anyway.
>> > The issue with this, and we've been bitten very hard on this one with
>> > the CHIP, is that you don't really have a clear majority on that
>> > one. If you support only PAL, half the world will be left out, and
>> > same thing with NTSC (for some reason, we never needed to support the
>> > less common ones like PAL-M or NTSC-J, but that just might be because
>> > it never really sold that well in those countries, I don't have any
>> > numbers on that).
>> >
>> > The point is, if you just hardcode PAL for now, you will have half
>> > your users complain, and then, when we will introduce NTSC support
>> > eventually, we'll have to introduce some mechanism to switch between
>> > the two, then we'll probably break the behaviour our users relied on
>> > before, making the other half of our users pissed.
>> >
>> > I'm not sure this is something we should just discard, or at least the
>> > second part. Having the selection mechanism in place, even if we don't
>> > support all the settings and just report an error in the logs in such
>> > a case address the latter issue.
>> >
>> > You'll also need to address how to setup the overscan, since this is
>> > really something you want to have very quick.
>>
>> Ok, I'm prepared to tackle this. Do you think it is worth to delay driver
>> merge?
>
> Not per se, but that should definitely be part of the same release, so
> if you can make it by then, then we can merge that right now, and
> merge the rest later. If you can't, then we'll have to postpone it a
> bit.
>
>> > > 3. If anything is done in this direction, I think that it is better
>> > > to extend DM video framework so other drivers would benefit from
>> > > that work too.
>> >
>> > That makes sense, but again, this is a pre-requisite for me. And it's
>> > not that hard to support the video modelines with a device model
>> > driver, Linux does it, and you have a string identifier at the
>> > beginning of it. It just has to be deterministic, but I don't think
>> > this is an issue with U-Boot's DM.
>>
>> Ok, so how do you think we should implement this? If only composite
>> modes are supported in the string, someone might try to set hdmi
>> monitor. Should we just ignore such settings and maybe print a
>> warning?
>
> I'm not sure it was your question, but I would just reject any
> improper configuration, and not display anything in such a case.
>
>> Also the question for Simon, how should I merge code for parsing
>> video string from drivers/video/videomodes.c to DM video in a way to
>> be useful to most drivers?
>>
>> I guess this is the first time to support analog video output in DM
>> video driver and there are some things missing such as a way to
>> select TV standard and define overscan.
>
> I think it can be done in the same way linux does it here:
> http://elixir.free-electrons.com/linux/latest/source/drivers/video/fbdev/core/fb_cmdline.c#L35
>
> You basically check first that there is a string matching what your
> driver expects, and then get the options.
>
> We could imagine having some extra function to parse that string and
> give back a structure filled with whatever was set in that command
> line. We could imagine having the common custom properties to be
> parsed at that same time.
>
>> Or alternatively, I could make just quick edit to sunxi_tve.c driver
>> and directly use old functions as they are. That way we could get
>> something working very quickly, but I don't like much such approach.
>
> 

Re: [U-Boot] [PATCH 2/4] x86: baytrail: Remove "serial-debug-port-*" settings

[Simon Glass]

On 31 May 2017 at 02:04, Bin Meng  wrote:
> "serial-debug-port-address" and "serial-debug-port-type" settings
> are actually reserved in the FSP UPD data structure. Remove them.
>
> Signed-off-by: Bin Meng 
> ---
>
>  arch/x86/cpu/baytrail/fsp_configs.c  | 4 
>  arch/x86/dts/bayleybay.dts   | 2 --
>  arch/x86/dts/baytrail_som-db5800-som-6867.dts| 2 --
>  arch/x86/dts/minnowmax.dts   | 2 --
>  arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h | 3 +--
>  doc/device-tree-bindings/misc/intel,baytrail-fsp.txt | 2 --
>  6 files changed, 1 insertion(+), 14 deletions(-)

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Re: [U-Boot] [PATCH] arm: Add support for poweroff via PSCI

[Simon Glass]

On 29 May 2017 at 01:11, Michal Simek  wrote:
> Add support for calling poweroff in case of psci is wired.
> Based on the same solution as is used for reset.
>
> Signed-off-by: Michal Simek 
> ---
>
>  arch/arm/cpu/armv8/fwcall.c |  7 +++
>  arch/arm/lib/Makefile   |  1 +
>  arch/arm/lib/poweroff.c | 47 
> +
>  3 files changed, 55 insertions(+)
>  create mode 100644 arch/arm/lib/poweroff.c
>

Reviewed-by: Simon Glass 

BTW I think we use printf() instead of puts() instead.
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Re: [U-Boot] [PATCH v3 3/3] rockchip: mkimage: set init_boot_size to avoid confusing the boot ROM

[Simon Glass]

On 30 May 2017 at 15:32, Philipp Tomsich
 wrote:
> This change restores the earlier setting of init_boot_size to include
> the maximum area covered by the the boot ROM of each chip for resolve
> issues with back-to-bootrom functionality reported by Kever and Heiko.
>
> To ensure that we don't run into the same issue again in the future,
> I have updated the comments accordingly and added a reference to the
> mailing list archive (there's some very helpful info from Andy Yan
> that provides background on the BootROM requirements regarding these
> fields).
>
> See https://lists.denx.de/pipermail/u-boot/2017-May/293267.html for
> some background (by Andy Yan) of how the BootROM processes this field.
>
> Signed-off-by: Philipp Tomsich 
>
> ---
>
> Changes in v3:
> - added in v3
>
> Changes in v2: None
>
>  tools/rkcommon.c | 11 +++
>  1 file changed, 7 insertions(+), 4 deletions(-)

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Re: [U-Boot] [PATCH] rockchip: dts: rk3328: add aliases for mmc controller

[Simon Glass]

Hi Tom,

On 24 May 2017 at 06:56, Tom Rini  wrote:
> On Wed, May 24, 2017 at 10:18:12AM +0200, Heiko Stuebner wrote:
>> Am Dienstag, 23. Mai 2017, 18:44:37 CEST schrieb Simon Glass:
>> > Hi,
>> >
>> > On 23 May 2017 at 16:18, Andreas Färber  wrote:
>> > > Hi Heiko,
>> > >
>> > > Am 23.05.2017 um 23:27 schrieb Heiko Stuebner:
>> > >> Am Dienstag, 23. Mai 2017, 17:14:19 CEST schrieb Tom Rini:
>> > >>> On Tue, May 23, 2017 at 11:03:23PM +0200, Mark Kettenis wrote:
>> > > From: Heiko Stuebner 
>> > > Date: Tue, 23 May 2017 22:29:33 +0200
>> > >
>> > > Hi Kever, Tom,
>> > >
>> > > Am Dienstag, 23. Mai 2017, 14:32:44 CEST schrieb Kever Yang:
>> > >>  This is not from kernel, seems the kernel mmc driver does not
>> > >> support aliases now,
>> > >>
>> > >> thought I hope they both support the aliases for ordering.
>> > >
>> > > there was a lengthy discussion about the pros and cons of ordering
>> > > mmc devices last year [0].
>> > >
>> > > With the outcome that explicit ordering via aliases is not desired
>> > > and the argument being that mmc devices are not so different from
>> > > usb storage or scsi/sata devices whose ordering is random all the 
>> > > time.
>> > 
>> >  Aren't you intepreting the outcome of that discussion a bit too
>> >  broadly tough?  That discussion seems to reject an explicit ordering
>> >  of mmc device names in the Linux kernel, mainly because better
>> >  mechanisms exist to refer to a particular device than its device
>> >  name/number.  But that doesn't preclude having a meaningful set of
>> >  aliases for certain boards if there is some sort of canonical boot
>> >  order or if devices are actually numbered on a board?
>> > 
>> >  In OpenFirmware the primary purpose of these aliases is to specify
>> >  which device to boot from.
>> > >>
>> > >> readding the lkml-link for the above:
>> > >> [0] https://lkml.org/lkml/2016/4/29/621
>> > >>
>> > >>
>> > >> As for that being to broad, wasn't that why Tom suggested moving that
>> > >> to a -u-boot.dtsi file, because while generally not desired, it may
>> > >> benefit uboot to get some sane boot order / type marks (emmc, sd-card),
>> > >> but doesn't influence the core devicetree files that should ideally be
>> > >> synced from the kernel or wherever?
>> > >
>> > > I think you're mixing three very distinct topics here:
>> > > a) Whether Linux drivers should use aliases for ordering.
>> > > b) Whether to add aliases in the DT.
>> > > c) Sync'ing .dts files from Linux vs. local changes.
>> > >
>> > > I don't see what's wrong with b) as it is useful as a shorthand for
>> > > access to a particular node, e.g. for U-Boot's fdt commands.
>> > >
>> > > Tom's point is that if a certain change is not in the Linux .dts and is
>> > > needed for U-Boot, it should go into a U-Boot specific .dtsi file, so
>> > > that the change doesn't get overwritten with the next .dts update from
>> > > Linux.
>> > > In the UEFI boot path we rely on a recent upstream-compatible DT being
>> > > provided by U-Boot if none is installed by the OS in a way U-Boot can
>> > > load, so the .dts will need to be re-sync'ed later on even if it doesn't
>> > > affect U-Boot drivers. Therefore the commit messages also need to
>> > > indicate where the .dts comes from, to avoid regressions on re-sync from
>> > > different trees.
>> >
>> > Further to that, I think U-Boot needs the aliases because we refer to
>> > devices by number.
>> >
>> > At a future date if U-Boot moves away from this to named devices, we
>> > can revisit it.
>> >
>> > But so far as I can tell, without the aliases, U-Boot cannot operate
>> > in a reliable, repeatable manner.
>>
>> ok, then never mind. You people probably know better what makes
>> sense in an u-boot context :-) .
>
> Yeah, but it's one of those things I don't quite understand about why we
> need to put non-project-specific (ie it's not a u-boot,xxx thing) into
> our spot to append the dts.  If we're talking about good, valid DT
> content (ie nearly every SoC manual I've seen says MMC1 is ..., MMC2 is
> ..., etc, so it's hardware description) why can't it be in the upstream
> dts file and simply ignored by the kernel if it doesn't want it?

I agree that makes sense. I cannot think of a reason that the DT
should be restricted to contain things only useful to Linux.

Regards,
Simon
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Re: [U-Boot] [PATCH] malloc: Turn on DEBUG when enabling unit tests

[Simon Glass]

On 25 May 2017 at 10:24, Pantelis Antoniou
 wrote:
> Unit tests require mallinfo which in turn requires DEBUG on
> dlmalloc to be enabled.
>
> The dependancy on CONFIG_SANDBOX is wrong.
>
> Signed-off-by: Pantelis Antoniou 
> ---
>  common/dlmalloc.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

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Re: [U-Boot] [PATCH] rtc: ds1337: drop "SYS" from config variables

[Simon Glass]

On 29 May 2017 at 18:03, Chris Packham  wrote:
> There is some inconsistency between uses of CONFIG_RTC_DS13xx and
> CONFIG_SYS_RTC_DS13xx. Address this by dropping the "SYS" from
> these variables.
>
> Signed-off-by: Chris Packham 
> ---
>  README   |  2 +-
>  drivers/rtc/ds1337.c | 16 
>  include/configs/UCP1020.h|  2 +-
>  include/configs/tqma6_wru4.h |  2 +-
>  scripts/config_whitelist.txt |  8 +++-
>  5 files changed, 14 insertions(+), 16 deletions(-)

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Re: [U-Boot] [PATCH 18/38] mips: Make u-boot-mips.h a private header

[Simon Glass]

Hi Daniel,

On 17 May 2017 at 13:27, Daniel Schwierzeck
 wrote:
>
>
> Am 17.05.2017 um 16:22 schrieb Simon Glass:
>> Rather than including this arch-specific header file in common.h, include
>> it from within mips's u-boot.h header.
>>
>> Signed-off-by: Simon Glass 
>
> Reviewed-by: Daniel Schwierzeck 
>
>> ---
>>
>>  arch/mips/include/asm/u-boot.h | 1 +
>>  include/common.h   | 2 +-
>>  2 files changed, 2 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/mips/include/asm/u-boot.h b/arch/mips/include/asm/u-boot.h
>> index af03e8d5be..68985af4b9 100644
>> --- a/arch/mips/include/asm/u-boot.h
>> +++ b/arch/mips/include/asm/u-boot.h
>> @@ -17,6 +17,7 @@
>>
>>  /* Use the generic board which requires a unified bd_info */
>>  #include 
>> +#include 
>>
>>  /* For image.h:image_check_target_arch() */
>>  #define IH_ARCH_DEFAULT IH_ARCH_MIPS
>> diff --git a/include/common.h b/include/common.h
>> index fe396c5705..f36fed3843 100644
>> --- a/include/common.h
>> +++ b/include/common.h
>> @@ -442,7 +442,7 @@ static inline int setenv_addr(const char *varname, const 
>> void *addr)
>>  # include 
>>  #endif /* CONFIG_NDS32 */
>>  #ifdef CONFIG_MIPS
>> -# include 
>> +# include 
>>  #endif /* CONFIG_MIPS */
>
> you could also remove the #ifdef CONFIG_MIPS in this patch and drop
> patch 21/38

Yes, true, I am trying to avoid making a change and removing code at
the same time.

>
>>  #ifdef CONFIG_ARC
>>  # include 
>>
>
> --
> - Daniel
>

Regards,
Simon
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Re: [U-Boot] [PATCH v4 04/11] clk: add clk_count()

[Simon Glass]

Hi Patrice,

On 24 May 2017 at 07:01,   wrote:
> From: Patrice Chotard 
>
> Add clk_count() method to be able to get the number
> of clocks contained into a clock property. This will allow
> to allocate the right amount of memory in order to keep clock
> reference. These clock reference can be used later on error path
> or in .remove callback to release these clocks.
>
> Signed-off-by: Patrice Chotard 
> ---
>
> v4: _ add clk_count() method
>
>  drivers/clk/clk-uclass.c | 12 
>  include/clk.h| 12 
>  2 files changed, 24 insertions(+)
>
> diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c
> index 6fcfd69..5c4dd19 100644
> --- a/drivers/clk/clk-uclass.c
> +++ b/drivers/clk/clk-uclass.c
> @@ -96,8 +96,20 @@ int clk_get_by_index(struct udevice *dev, int index, 
> struct clk *clk)
>
> return clk_request(dev_clk, clk);
>  }
> +
>  # endif /* OF_PLATDATA */
>
> +int clk_count(struct udevice *dev)
> +{
> +   int count;
> +   struct clk clk;
> +
> +   for (count = 0; ; count++) {
> +   if (clk_get_by_index(dev, count, ))
> +   return count;
> +   }
> +}
> +
>  int clk_get_by_name(struct udevice *dev, const char *name, struct clk *clk)
>  {
> int index;
> diff --git a/include/clk.h b/include/clk.h
> index 5a5c2ff..801920c 100644
> --- a/include/clk.h
> +++ b/include/clk.h
> @@ -98,6 +98,18 @@ int clk_get_by_index(struct udevice *dev, int index, 
> struct clk *clk);
>   * @return 0 if OK, or a negative error code.
>   */
>  int clk_get_by_name(struct udevice *dev, const char *name, struct clk *clk);
> +
> +/**
> + * clk_count - Get clock count contained in the "clocks" property.
> + *
> + * This returns the count of clock found into the "clocks" property. This
> + * allows to allocate the right amount of memory to keep clock reference.

Can you document here that it 'gets' each clock and the clocks should
be freed? Or do you prefer to free the clocks within the function.

> + *
> + * @dev:   The client device.
> + * @return number of clocks found.
> + */
> +int clk_count(struct udevice *dev);
> +
>  #else
>  static inline int clk_get_by_index(struct udevice *dev, int index,
>struct clk *clk)
> --
> 1.9.1
>

Regards,
Simon
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Re: [U-Boot] [PATCH v4 08/11] usb: host: ehci-generic: add generic PHY support

[Simon Glass]

On 24 May 2017 at 07:01,   wrote:
> From: Patrice Chotard 
>
> Extend ehci-generic driver with generic PHY framework
>
> Signed-off-by: Patrice Chotard 
> ---
>
> v4: _ use generic_phy_valid() before generic_phy_exit() call
>
> v3: _ test return value on generic_phy_get_by_index() and
>   generic_phy_init()
>
>
>  drivers/usb/host/ehci-generic.c | 30 ++
>  1 file changed, 30 insertions(+)
>

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH v4 07/11] usb: host: ehci-generic: add error path and .remove callback

[Simon Glass]

On 24 May 2017 at 07:01,   wrote:
> From: Patrice Chotard 
>
> Use an array to save enabled clocks reference and deasserted resets
> in order to respectively disabled and asserted them in case of error
> during probe() or during driver removal.
>
> Signed-off-by: Patrice Chotard 
> ---
>
> v4: _ update the memory allocation for deasserted resets and enabled
>   clocks reference list. Replace lists by arrays.
> _ usage of new RESET and CLOCK methods clk_count(), reset_count(),v4
>   reset_assert_all() and clk_disable_all().
>
> v3: _ keep enabled clocks and deasserted resets reference in list in 
> order to
>   disable clock or assert resets in error path or in .remove callback
> _ use struct generic_ehci * instead of struct udevice * as parameter 
> for
>   ehci_release_resets() and ehci_release_clocks()
>
>  drivers/usb/host/ehci-generic.c | 114 
> +++-
>  1 file changed, 90 insertions(+), 24 deletions(-)

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Re: [U-Boot] [PATCH v4 05/11] clk: add clk_disable_all()

[Simon Glass]

On 24 May 2017 at 07:07,   wrote:
> From: Patrice Chotard 
>
> Add clk_disable_all() method which Request/Disable/Free an
> array of clocks that has been previously requested by
> clk_request/get_by_*()
>
> Signed-off-by: Patrice Chotard 
> ---
>
> v4: _ add clk_disable_all() method as suggested by Marek Vasut
>   and Simon Glass
>
>  drivers/clk/clk-uclass.c | 22 ++
>  include/clk.h| 10 ++
>  2 files changed, 32 insertions(+)

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH v4 03/11] reset: add reset_assert_all()

[Simon Glass]

On 24 May 2017 at 07:01,   wrote:
> From: Patrice Chotard 
>
> Add reset_assert_all() method which Request/Assert/Free an
> array of resets signal that has been previously successfully
> requested by reset_get_by_*()
>
> Signed-off-by: Patrice Chotard 
> ---
>
> v4: _ add reset_assert_all() method as suggested by Marek Vasut
>   and Simon Glass
>
>  drivers/reset/reset-uclass.c | 22 ++
>  include/reset.h  | 17 +
>  2 files changed, 39 insertions(+)

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH v4 09/11] usb: host: ohci-generic: add CLOCK support

[Simon Glass]

On 24 May 2017 at 07:01,   wrote:
> From: Patrice Chotard 
>
> use array to save enabled clocks reference in order to
> disabled them in case of error during probe() or during
> driver removal.
>
> Signed-off-by: Patrice Chotard 
> ---
>
> v4: _ use generic_phy_valid() before generic_phy_exit() call
>
> v3: _ extract in this patch the CLOCK support add-on from previous patch 5
> _ keep enabled clocks reference in list in order to
>   disable clocks in error path or in .remove callback
>
> v2: _ add error path management
> _ add .remove callback
>
>  drivers/usb/host/ohci-generic.c | 53 
> +++--
>  1 file changed, 51 insertions(+), 2 deletions(-)
>

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Re: [U-Boot] [PATCH v4 02/11] reset: add reset_count()

[Simon Glass]

Hi Patrice,

On 24 May 2017 at 07:01,   wrote:
> From: Patrice Chotard 
>
> Add reset_count() method to be able to get the number
> of resets contained into a resets property. This will allow
> to allocate the right amount of memory in order to keep resets
> reference. These resets reference can be used later on error path
> or in .remove callback to release these resets.
>
> Signed-off-by: Patrice Chotard 
> ---
>
> v4: _ add reset_count() method
>
>  drivers/reset/reset-uclass.c | 14 ++
>  include/reset.h  | 11 +++
>  2 files changed, 25 insertions(+)
>
> diff --git a/drivers/reset/reset-uclass.c b/drivers/reset/reset-uclass.c
> index 916f210..ebdeee5 100644
> --- a/drivers/reset/reset-uclass.c
> +++ b/drivers/reset/reset-uclass.c
> @@ -98,6 +98,20 @@ int reset_get_by_name(struct udevice *dev, const char 
> *name,
> return reset_get_by_index(dev, index, reset_ctl);
>  }
>
> +int reset_count(struct udevice *dev)
> +{
> +   int count;
> +   struct fdtdec_phandle_args args;
> +
> +   for (count = 0; ; count++) {
> +   if (fdtdec_parse_phandle_with_args(gd->fdt_blob,
> +  dev_of_offset(dev),
> +  "resets", "#reset-cells", 
> 0,
> +  count, ))

As I'm trying to get livetree support landed in U-Boot could you
please rebase this on u-boot-dm/master? There is a new
dev_read_phandle...() function.

> +   return count;
> +   }
> +}
> +
>  int reset_request(struct reset_ctl *reset_ctl)
>  {
> struct reset_ops *ops = reset_dev_ops(reset_ctl->dev);
> diff --git a/include/reset.h b/include/reset.h
> index 4f2e35f..e8e68b6 100644
> --- a/include/reset.h
> +++ b/include/reset.h
> @@ -100,6 +100,17 @@ int reset_get_by_name(struct udevice *dev, const char 
> *name,
>   struct reset_ctl *reset_ctl);
>
>  /**
> + * reset_count - Get reset count contained in the "resets" property.
> + *
> + * This returns the count of reset found into the "resets" property. This
> + * allows to allocate the right amount of memory to keep reset reference.
> + *
> + * @dev:   The client device.
> + * @return number of resets found.
> + */
> +int reset_count(struct udevice *dev);
> +
> +/**
>   * reset_request - Request a reset signal.
>   *
>   * @reset_ctl: A reset control struct.
> --
> 1.9.1
>

Regards,
Simon
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Re: [U-Boot] [PATCH 2/4] mips: bmips: add bcm63xx-hsspi driver support for BCM6328

[Simon Glass]

On 23 May 2017 at 13:18, Álvaro Fernández Rojas  wrote:
> This driver manages the SPI controller present on this SoC.
>
> Signed-off-by: Álvaro Fernández Rojas 
> ---
>  arch/mips/dts/brcm,bcm6328.dtsi | 24 
>  1 file changed, 24 insertions(+)

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH 1/4] dm: spi: add BCM63xx HSSPI driver

[Simon Glass]

Hi Alvaro,

On 23 May 2017 at 13:18, Álvaro Fernández Rojas  wrote:
> This driver is a simplified version of linux/drivers/spi/spi-bcm63xx-hsspi.c
>
> Signed-off-by: Álvaro Fernández Rojas 
> ---
>  drivers/spi/Kconfig |   8 +
>  drivers/spi/Makefile|   1 +
>  drivers/spi/bcm63xx_hsspi.c | 392 
> 
>  3 files changed, 401 insertions(+)
>  create mode 100644 drivers/spi/bcm63xx_hsspi.c

Reviewed-by: Simon Glass 

Suggest you add error checking to clk_enable(), etc. and split
bcm63xx_hsspi_xfer() into a few subparts as it is very long.

Regards,
Simon
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[U-Boot] Uboot send pull request

[uboot]

 Hi Tom,

 Please pull the following patch from u-boot-nds32 into your tree.
 Thanks!

The following changes since commit ccbbada0a59fead35495409d0c2c7bcb22a40278:

  Merge branch 'master' of git://git.denx.de/u-boot-mmc (2017-05-30 14:07:23 
-0400)

are available in the git repository at:


  git://git.denx.de/u-boot-nds32.git master

for you to fetch changes up to 4099090fd0ed9c03d6b90c1382921e7184946878:

  nds32: board: Support ftsdc010 DM. (2017-06-01 09:11:19 +0800)


rick (3):
  nds32: mmc: Support ftsdc010 DM.
  nds32: dts: Support ftsdc010 DM.
  nds32: board: Support ftsdc010 DM.

 arch/nds32/dts/ae3xx.dts|8 ++
 arch/nds32/dts/ag101p.dts   |8 ++
 board/AndesTech/adp-ae3xx/adp-ae3xx.c   |4 +-
 board/AndesTech/adp-ag101p/adp-ag101p.c |7 +-
 configs/adp-ae3xx_defconfig |5 ++
 configs/adp-ag101p_defconfig|5 ++
 drivers/mmc/Kconfig |   12 +++
 drivers/mmc/Makefile|1 +
 drivers/mmc/ftsdc010_mci.c  |  140 ---
 drivers/mmc/ftsdc010_mci.h  |   54 
 drivers/mmc/nds32_mmc.c |  139 ++
 include/configs/adp-ae3xx.h |1 -
 include/configs/adp-ag101p.h|1 -
 13 files changed, 344 insertions(+), 41 deletions(-)
 create mode 100644 drivers/mmc/ftsdc010_mci.h
 create mode 100644 drivers/mmc/nds32_mmc.c
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[U-Boot] [PATCH v2 25/38] arm: Add explicit include of

[Simon Glass]

Rather than relying on common.h to provide this include, which is going
away at some point, include it explicitly in each file.

Signed-off-by: Simon Glass 
Reviewed-by: Tom Rini 
---

Changes in v2:
- Drop #ifdef guard in arch/arm/lib/spl.c

 arch/arm/lib/spl.c  | 1 +
 board/Barix/ipam390/ipam390.c   | 1 +
 board/LaCie/edminiv2/edminiv2.c | 1 +
 board/LaCie/net2big_v2/net2big_v2.c | 1 +
 board/LaCie/netspace_v2/netspace_v2.c   | 1 +
 board/Marvell/aspenite/aspenite.c   | 1 +
 board/Marvell/gplugd/gplugd.c   | 1 +
 board/Marvell/guruplug/guruplug.c   | 1 +
 board/Marvell/openrd/openrd.c   | 1 +
 board/Marvell/sheevaplug/sheevaplug.c   | 1 +
 board/Seagate/dockstar/dockstar.c   | 1 +
 board/Seagate/goflexhome/goflexhome.c   | 1 +
 board/Seagate/nas220/nas220.c   | 1 +
 board/amazon/kc1/kc1.c  | 1 +
 board/armltd/integrator/integrator.c| 1 +
 board/armltd/vexpress/vexpress_common.c | 1 +
 board/atmel/at91rm9200ek/at91rm9200ek.c | 1 +
 board/atmel/at91sam9261ek/at91sam9261ek.c   | 1 +
 board/atmel/at91sam9263ek/at91sam9263ek.c   | 1 +
 board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c | 1 +
 board/atmel/at91sam9rlek/at91sam9rlek.c | 1 +
 board/atmel/at91sam9x5ek/at91sam9x5ek.c | 1 +
 board/bluewater/gurnard/gurnard.c   | 1 +
 board/bluewater/snapper9260/snapper9260.c   | 1 +
 board/cirrus/edb93xx/edb93xx.c  | 1 +
 board/davinci/da8xxevm/da850evm.c   | 1 +
 board/davinci/da8xxevm/omapl138_lcdk.c  | 1 +
 board/davinci/ea20/ea20.c   | 1 +
 board/esd/meesc/meesc.c | 1 +
 board/freescale/mx35pdk/mx35pdk.c   | 1 +
 board/gumstix/duovero/duovero.c | 1 +
 board/h2200/h2200.c | 1 +
 board/imx31_phycore/imx31_phycore.c | 1 +
 board/lego/ev3/legoev3.c| 1 +
 board/mini-box/picosam9g45/picosam9g45.c| 1 +
 board/nvidia/seaboard/seaboard.c| 1 +
 board/overo/common.c| 1 +
 board/ronetix/pm9261/pm9261.c   | 1 +
 board/ronetix/pm9263/pm9263.c   | 1 +
 board/ronetix/pm9g45/pm9g45.c   | 1 +
 board/samsung/goni/goni.c   | 1 +
 board/samsung/smdkc100/smdkc100.c   | 1 +
 board/samsung/universal_c210/universal.c| 1 +
 board/siemens/common/board.c| 1 +
 board/spear/spear300/spear300.c | 1 +
 board/spear/spear310/spear310.c | 1 +
 board/spear/spear320/spear320.c | 1 +
 board/spear/spear600/spear600.c | 1 +
 board/spear/x600/x600.c | 1 +
 board/ti/omap5_uevm/evm.c   | 1 +
 board/ti/panda/panda.c  | 1 +
 board/toradex/colibri_pxa270/colibri_pxa270.c   | 1 +
 board/toradex/common/tdx-cfg-block.c| 1 +
 board/zipitz2/zipitz2.c | 1 +
 drivers/usb/host/ehci-mx6.c | 1 +
 55 files changed, 55 insertions(+)

diff --git a/arch/arm/lib/spl.c b/arch/arm/lib/spl.c
index 8ff2c5065d..27d6682c0b 100644
--- a/arch/arm/lib/spl.c
+++ b/arch/arm/lib/spl.c
@@ -12,6 +12,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #ifndef CONFIG_SPL_DM
 /* Pointer to as well as the global data structure for SPL */
diff --git a/board/Barix/ipam390/ipam390.c b/board/Barix/ipam390/ipam390.c
index fd1965d9f5..3a584021ac 100644
--- a/board/Barix/ipam390/ipam390.c
+++ b/board/Barix/ipam390/ipam390.c
@@ -29,6 +29,7 @@
 #include 
 #include 
 #include 
+#include 
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/board/LaCie/edminiv2/edminiv2.c b/board/LaCie/edminiv2/edminiv2.c
index edf6281797..736d65caa1 100644
--- a/board/LaCie/edminiv2/edminiv2.c
+++ b/board/LaCie/edminiv2/edminiv2.c
@@ -14,6 +14,7 @@
 #include "../common/common.h"
 #include 
 #include 
+#include 
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/board/LaCie/net2big_v2/net2big_v2.c 
b/board/LaCie/net2big_v2/net2big_v2.c
index 263bb5426c..2e6e9ef916 100644
--- a/board/LaCie/net2big_v2/net2big_v2.c
+++ b/board/LaCie/net2big_v2/net2big_v2.c
@@ -12,6 +12,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
diff --git a/board/LaCie/netspace_v2/netspace_v2.c 
b/board/LaCie/netspace_v2/netspace_v2.c
index 17e629622f..16d694716f 100644
--- a/board/LaCie/netspace_v2/netspace_v2.c
+++ b/board/LaCie/netspace_v2/netspace_v2.c
@@ -11,6 +11,7 @@
 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
diff --git a/board/Marvell/aspenite/aspenite.c 
b/board/Marvell/aspenite/aspenite.c
index 24ee6791a6..0ef63b7b7c 100644
--- a/board/Marvell/aspenite/aspenite.c
+++ 

[U-Boot] [PATCH] fdt: Report libfdt error to stderr

[Simon Glass]

This error needs to go to stderr otherwise it will not be reported by
buildman. Fix it.

Signed-off-by: Simon Glass 
---

 Makefile | 13 +++--
 1 file changed, 7 insertions(+), 6 deletions(-)

diff --git a/Makefile b/Makefile
index 89e0451a49..c13937c3a8 100644
--- a/Makefile
+++ b/Makefile
@@ -1357,12 +1357,13 @@ $(timestamp_h): $(srctree)/Makefile FORCE
 
 checkbinman: tools
@if ! ( echo 'import libfdt' | ( PYTHONPATH=tools python )); then \
-   echo '*** binman needs the Python libfdt library. Either '; \
-   echo '*** install it on your system, or try:'; \
-   echo '***'; \
-   echo '*** sudo apt-get install swig libpython-dev'; \
-   echo '***'; \
-   echo '*** to have U-Boot build its own version.'; \
+   echo >&2; \
+   echo >&2 '*** binman needs the Python libfdt library.'; \
+   echo >&2 '*** Either install it on your system, or try:'; \
+   echo >&2 '***'; \
+   echo >&2 '*** sudo apt-get install swig libpython-dev'; \
+   echo >&2 '***'; \
+   echo >&2 '*** to have U-Boot build its own version.'; \
false; \
fi
 
-- 
2.13.0.219.gdb65acc882-goog

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Re: [U-Boot] [RFC PATCH 5/5] rockchip: mkimage: use spl_boot0 for all Rockchip SoCs

[Andy Yan]

Hi Philipp:

2017-05-31 18:58 GMT+08:00 Dr. Philipp Tomsich <
philipp.toms...@theobroma-systems.com>:

> Now that there are no remaining cases where (spl_boot0 == false), we can
> drop the spl_boot0 field from struct spl_info and also remove the if-check
> (leaving only the code-path for true in place).
>
>

  I think we still have one case: use mkimage to pack ddr.bin  from
rockchip as spl.bin.



> There should be no need to keep the legacy code-path around, as GIT will
> always remember them anyway.
>
> Regards,
> Philipp.
>
> > On 31 May 2017, at 12:50, Kever Yang  wrote:
> >
> > Enable the spl_boot0 in SPL and use the pre-padding TAG memory,
> > the mkimage do not need to pad it but only need to replace the value
> > with correct TAG value.
> >
> > Signed-off-by: Kever Yang 
> > ---
> >
> > tools/rkcommon.c | 8 
> > 1 file changed, 4 insertions(+), 4 deletions(-)
> >
> > diff --git a/tools/rkcommon.c b/tools/rkcommon.c
> > index 836a5a5..b58dfae 100644
> > --- a/tools/rkcommon.c
> > +++ b/tools/rkcommon.c
> > @@ -68,10 +68,10 @@ struct spl_info {
> > };
> >
> > static struct spl_info spl_infos[] = {
> > - { "rk3036", "RK30", 0x1000, false, false },
> > - { "rk3188", "RK31", 0x8000 - 0x800, true, false },
> > - { "rk3288", "RK32", 0x8000, false, false },
> > - { "rk3328", "RK32", 0x8000 - 0x1000, false, false },
> > + { "rk3036", "RK30", 0x1000, false, true },
> > + { "rk3188", "RK31", 0x8000 - 0x800, true, true },
> > + { "rk3288", "RK32", 0x8000, false, true },
> > + { "rk3328", "RK32", 0x8000 - 0x1000, false, true },
> >   { "rk3399", "RK33", 0x2, false, true },
> > };
> >
> > --
> > 1.9.1
> >
>
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Re: [U-Boot] [PATCH] board/freescale: Share qbman init between archs

[york sun]

On 05/31/2017 08:17 AM, Roy Pledge wrote:
> On 5/30/2017 12:40 PM, york sun wrote:
>> On 05/12/2017 01:30 PM, Roy Pledge wrote:
>>> From: Ahmed Mansour 
>>>
>>> This patch adds changes necessary to move functionality present in
>>> PowerPC folders with ARM architectures that have DPAA1 QBMan hardware
>>>
>>> - Created new board/freescale/common/portals.c to house shared device
>>> tree fixups for DPAA1 devices with ARM and PowerPC cores
>> I don't think using board/freescale/common/portals.c is the best
>> solution. QBMan is a SoC feature, not Freescale board specific. Please
>> consider to move it to somewhere common.
> Do you have a suggestion?  We choose this location as the fman support
> is in this directory as well.  There doesn't seem to be a good place to
> share SoC specific drivers other than perhaps drivers/soc but there is
> very little in that directory right now.

How about drivers/misc? We have IFC driver there.

>>
>>> - Added new header file to top includes directory to allow files in
>>> both architectures to grab the function prototypes
>>> - Port inhibit_portals() from PowerPC to ARM. This function is used in
>>> setup to disable interrupts on all QMan and BMan portals. It is
>>> needed because the interrupts are enabled by default for all portals
>>> including unused/uninitialised portals. When the kernel attempts to
>>> go to deep sleep the unused portals prevent it from doing so
>>>
>>> Signed-off-by: Ahmed Mansour 
>>> Signed-off-by: Roy Pledge 
>>> ---
>>>arch/arm/cpu/armv8/fsl-layerscape/cpu.c|   7 +
>>>arch/arm/cpu/armv8/fsl-layerscape/fdt.c|  15 +
>>>.../arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c |   3 +
>>>.../include/asm/arch-fsl-layerscape/immap_lsch2.h  |  29 ++
>>>arch/powerpc/cpu/mpc85xx/cpu_init.c|   3 +-
>>>arch/powerpc/cpu/mpc85xx/fdt.c |   1 +
>>>arch/powerpc/cpu/mpc85xx/portals.c | 281 
>>> ---
>>>arch/powerpc/include/asm/fsl_liodn.h   |   5 +-
>>>arch/powerpc/include/asm/fsl_portals.h |   4 -
>>>arch/powerpc/include/asm/immap_85xx.h  |  60 
>>>board/freescale/common/Makefile|   2 +
>>>board/freescale/common/portals.c   | 312 
>>> +
>>>include/configs/ls1043a_common.h   |   2 +
>>>include/fsl_qbman.h|  75 +
>>>14 files changed, 451 insertions(+), 348 deletions(-)
>>>create mode 100644 board/freescale/common/portals.c
>>>create mode 100644 include/fsl_qbman.h
>>>
>>> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c 
>>> b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
>>> index bb02960..4b5b1b4 100644
>>> --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
>>> +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
>>> @@ -26,6 +26,10 @@
>>>#ifdef CONFIG_SYS_FSL_DDR
>>>#include 
>>>#endif
>>> +#include 
>>> +#ifdef CONFIG_SYS_DPAA_QBMAN
>>> +#include 
>>> +#endif
>> Do not use ifdef if you can avoid it.
>>
>> 
>>
>>> diff --git a/include/configs/ls1043a_common.h 
>>> b/include/configs/ls1043a_common.h
>>> index e269248..e2d6ef1 100644
>>> --- a/include/configs/ls1043a_common.h
>>> +++ b/include/configs/ls1043a_common.h
>>> @@ -201,6 +201,8 @@
>>>#endif
>>>#endif
>>>
>>> +#define CONFIG_SYS_DPAA_QBMAN  /* Support Q/Bman */
>>> +
>> It's better to move this option to Kconfig.
> Again we copied what was done for FMan here

We are moving config options to Kconfig.

York
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[U-Boot] Add ethernet support to Banana-Pi M2U

[Duncan Hare]

Banana Pi BPI-M2 Ultra is a quad-core mini single board computer built with 
Allwinner R40 SoC. It features 2GB of RAM and 8GB eMMC. Duncan Hare

714 931 7952
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[U-Boot] Add Ethernet Support for Banana Pi M64

[Duncan Hare]

BPI-M64 is a 64-bit quad-core mini single board computer
using the Allwinner A64 SOC.

BPI-M64 features
- 1.2 Ghz Quad-Core ARM Cortex A53
- 2GB DDR3 SDRAM with 733MHz
- MicroSD/eMMC(8GB)
- 10/100/1000Mbps ethernet (Realtek RTL8211E/D)
- Wifi + BT
- IR receiver
- Audio In/Out
- Video In/Out
- 5V 2A DC power-supply Duncan Hare

714 931 7952
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[U-Boot] [PATCH v2 14/28] tegra: clock: Avoid a divide-by-zero error

[Simon Glass]

The clock fix-up for tegra is still present in the code. It causes a
divide-by-zero bug after relocation when chain-loading U-Boot from
coreboot. Fix this by adding a check.

Signed-off-by: Simon Glass 
Fixes: 7468676 (ARM: tegra: fix clock_get_periph_rate() for UART clocks)
---

Changes in v2: None

 arch/arm/mach-tegra/clock.c | 5 -
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-tegra/clock.c b/arch/arm/mach-tegra/clock.c
index ce68c7d0cc..dc58b3027d 100644
--- a/arch/arm/mach-tegra/clock.c
+++ b/arch/arm/mach-tegra/clock.c
@@ -339,8 +339,11 @@ unsigned long clock_get_periph_rate(enum periph_id 
periph_id,
 * return value doesn't help. In summary this clock driver is
 * quite broken but I'm afraid I have no idea how to fix it
 * without completely replacing it.
+*
+* Be careful to avoid a divide by zero error.
 */
-   div -= 2;
+   if (div >= 1)
+   div -= 2;
break;
 #endif
default:
-- 
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[U-Boot] [PATCH v2 22/28] rockchip: jerry: Add a .its file for chromium

[Simon Glass]

Add a sample .its file for booting U-Boot on a jerry Chromebook.

Signed-off-by: Simon Glass 
---

Changes in v2:
- Add new patch containing a .its file for chromium

 doc/chromium/chromebook_jerry.its | 42 +++
 1 file changed, 42 insertions(+)
 create mode 100644 doc/chromium/chromebook_jerry.its

diff --git a/doc/chromium/chromebook_jerry.its 
b/doc/chromium/chromebook_jerry.its
new file mode 100644
index 00..8cff840e00
--- /dev/null
+++ b/doc/chromium/chromebook_jerry.its
@@ -0,0 +1,42 @@
+/dts-v1/;
+
+/ {
+   description = "U-Boot mainline";
+   #address-cells = <1>;
+
+   images {
+   kernel@1 {
+   description = "U-Boot mainline";
+   type = "kernel_noload";
+   arch = "arm";
+   os = "linux";
+   data = /incbin/("../../b/chromebook_jerry/u-boot.bin");
+   compression = "none";
+   load = <0>;
+   entry = <0>;
+   hash@2 {
+   algo = "sha1";
+   };
+   };
+
+   fdt@1{
+   description = "rk3288-veryron-jerry.dtb";
+   data = /incbin/("../../b/chromebook_jerry/u-boot.dtb");
+   type = "flat_dt";
+   arch = "arm";
+   compression = "none";
+   hash@1{
+   algo = "sha1";
+   };
+   };
+   };
+
+   configurations {
+   default = "config@1";
+   config@1 {
+   description = "Boot U-Boot";
+   kernel = "kernel@1";
+   fdt = "fdt@1";
+   };
+   };
+};
-- 
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[U-Boot] [PATCH v2 23/28] rockchip: rk3288: Convert clock driver to use shifted masks

[Simon Glass]

Shifted masks are the standard approach with rockchip since it allows
use of the mask without shifting it each time. Update the definitions and
the driver to match.

Signed-off-by: Simon Glass 
---

Changes in v2: None

 arch/arm/include/asm/arch-rockchip/cru_rk3288.h |  74 ---
 drivers/clk/rockchip/clk_rk3288.c   | 121 ++--
 2 files changed, 90 insertions(+), 105 deletions(-)

diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3288.h 
b/arch/arm/include/asm/arch-rockchip/cru_rk3288.h
index d575f4a163..cb0a935edc 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3288.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3288.h
@@ -64,135 +64,137 @@ check_member(rk3288_cru, cru_emmc_con[1], 0x021c);
 /* CRU_CLKSEL11_CON */
 enum {
HSICPHY_DIV_SHIFT   = 8,
-   HSICPHY_DIV_MASK= 0x3f,
+   HSICPHY_DIV_MASK= 0x3f << HSICPHY_DIV_SHIFT,
 
MMC0_PLL_SHIFT  = 6,
-   MMC0_PLL_MASK   = 3,
+   MMC0_PLL_MASK   = 3 << MMC0_PLL_SHIFT,
MMC0_PLL_SELECT_CODEC   = 0,
MMC0_PLL_SELECT_GENERAL,
MMC0_PLL_SELECT_24MHZ,
 
MMC0_DIV_SHIFT  = 0,
-   MMC0_DIV_MASK   = 0x3f,
+   MMC0_DIV_MASK   = 0x3f << MMC0_DIV_SHIFT,
 };
 
 /* CRU_CLKSEL12_CON */
 enum {
EMMC_PLL_SHIFT  = 0xe,
-   EMMC_PLL_MASK   = 3,
+   EMMC_PLL_MASK   = 3 << EMMC_PLL_SHIFT,
EMMC_PLL_SELECT_CODEC   = 0,
EMMC_PLL_SELECT_GENERAL,
EMMC_PLL_SELECT_24MHZ,
 
EMMC_DIV_SHIFT  = 8,
-   EMMC_DIV_MASK   = 0x3f,
+   EMMC_DIV_MASK   = 0x3f < EMMC_DIV_SHIFT,
 
SDIO0_PLL_SHIFT = 6,
-   SDIO0_PLL_MASK  = 3,
+   SDIO0_PLL_MASK  = 3 << SDIO0_PLL_SHIFT,
SDIO0_PLL_SELECT_CODEC  = 0,
SDIO0_PLL_SELECT_GENERAL,
SDIO0_PLL_SELECT_24MHZ,
 
SDIO0_DIV_SHIFT = 0,
-   SDIO0_DIV_MASK  = 0x3f,
+   SDIO0_DIV_MASK  = 0x3f << SDIO0_DIV_SHIFT,
 };
 
 /* CRU_CLKSEL21_CON */
 enum {
-   MAC_DIV_CON_SHIFT = 0xf,
-   MAC_DIV_CON_MASK = 0x1f,
+   MAC_DIV_CON_SHIFT   = 0xf,
+   MAC_DIV_CON_MASK= 0x1f << MAC_DIV_CON_SHIFT,
 
-   RMII_EXTCLK_SHIFT = 4,
-   RMII_EXTCLK_MASK = 1,
+   RMII_EXTCLK_SHIFT   = 4,
+   RMII_EXTCLK_MASK= 1 << RMII_EXTCLK_SHIFT,
RMII_EXTCLK_SELECT_INT_DIV_CLK = 0,
RMII_EXTCLK_SELECT_EXT_CLK = 1,
 
-   EMAC_PLL_SHIFT = 0,
-   EMAC_PLL_MASK = 0x3,
-   EMAC_PLL_SELECT_NEW = 0x0,
-   EMAC_PLL_SELECT_CODEC = 0x1,
-   EMAC_PLL_SELECT_GENERAL = 0x2,
+   EMAC_PLL_SHIFT  = 0,
+   EMAC_PLL_MASK   = 0x3 << EMAC_PLL_SHIFT,
+   EMAC_PLL_SELECT_NEW = 0x0,
+   EMAC_PLL_SELECT_CODEC   = 0x1,
+   EMAC_PLL_SELECT_GENERAL = 0x2,
 };
 
 /* CRU_CLKSEL25_CON */
 enum {
SPI1_PLL_SHIFT  = 0xf,
-   SPI1_PLL_MASK   = 1,
+   SPI1_PLL_MASK   = 1 << SPI1_PLL_SHIFT,
SPI1_PLL_SELECT_CODEC   = 0,
SPI1_PLL_SELECT_GENERAL,
 
SPI1_DIV_SHIFT  = 8,
-   SPI1_DIV_MASK   = 0x7f,
+   SPI1_DIV_MASK   = 0x7f << SPI1_DIV_SHIFT,
 
SPI0_PLL_SHIFT  = 7,
-   SPI0_PLL_MASK   = 1,
+   SPI0_PLL_MASK   = 1 << SPI0_PLL_SHIFT,
SPI0_PLL_SELECT_CODEC   = 0,
SPI0_PLL_SELECT_GENERAL,
 
SPI0_DIV_SHIFT  = 0,
-   SPI0_DIV_MASK   = 0x7f,
+   SPI0_DIV_MASK   = 0x7f << SPI0_DIV_SHIFT,
 };
 
 /* CRU_CLKSEL37_CON */
 enum {
PCLK_CORE_DBG_DIV_SHIFT = 9,
-   PCLK_CORE_DBG_DIV_MASK  = 0x1f,
+   PCLK_CORE_DBG_DIV_MASK  = 0x1f << PCLK_CORE_DBG_DIV_SHIFT,
 
ATCLK_CORE_DIV_CON_SHIFT = 4,
-   ATCLK_CORE_DIV_CON_MASK = 0x1f,
+   ATCLK_CORE_DIV_CON_MASK = 0x1f << ATCLK_CORE_DIV_CON_SHIFT,
 
CLK_L2RAM_DIV_SHIFT = 0,
-   CLK_L2RAM_DIV_MASK  = 7,
+   CLK_L2RAM_DIV_MASK  = 7 << CLK_L2RAM_DIV_SHIFT,
 };
 
 /* CRU_CLKSEL39_CON */
 enum {
ACLK_HEVC_PLL_SHIFT = 0xe,
-   ACLK_HEVC_PLL_MASK  = 3,
+   ACLK_HEVC_PLL_MASK  = 3 << ACLK_HEVC_PLL_SHIFT,
ACLK_HEVC_PLL_SELECT_CODEC = 0,
ACLK_HEVC_PLL_SELECT_GENERAL,
ACLK_HEVC_PLL_SELECT_NEW,
 
ACLK_HEVC_DIV_SHIFT = 8,
-   ACLK_HEVC_DIV_MASK  = 0x1f,
+   ACLK_HEVC_DIV_MASK  = 0x1f << ACLK_HEVC_DIV_SHIFT,
 
SPI2_PLL_SHIFT  = 7,
-   SPI2_PLL_MASK   = 1,
+   SPI2_PLL_MASK   = 1 << SPI2_PLL_SHIFT,
SPI2_PLL_SELECT_CODEC   = 0,
SPI2_PLL_SELECT_GENERAL,
 
SPI2_DIV_SHIFT  = 0,
-   SPI2_DIV_MASK   = 0x7f,
+   SPI2_DIV_MASK   = 0x7f << SPI2_DIV_SHIFT,
 };
 
 /* CRU_MODE_CON */
 enum {
+   CRU_MODE_MASK   = 3,
+
NPLL_MODE_SHIFT = 0xe,
-   NPLL_MODE_MASK 

[U-Boot] [PATCH v2 19/28] rockchip: rk3288: Add error debugging to veyron_init()

[Simon Glass]

Add a debug() statement so we can see when something goes wrong with the
regulator.

Signed-off-by: Simon Glass 
---

Changes in v2: None

 arch/arm/mach-rockchip/rk3288-board.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-rockchip/rk3288-board.c 
b/arch/arm/mach-rockchip/rk3288-board.c
index 9894a25e08..18fd0dcd20 100644
--- a/arch/arm/mach-rockchip/rk3288-board.c
+++ b/arch/arm/mach-rockchip/rk3288-board.c
@@ -86,8 +86,10 @@ static int veyron_init(void)
int ret;
 
ret = regulator_get_by_platname("vdd_arm", );
-   if (ret)
+   if (ret) {
+   debug("Cannot set regulator name\n");
return ret;
+   }
 
/* Slowly raise to max CPU voltage to prevent overshoot */
ret = regulator_set_value(dev, 120);
-- 
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[U-Boot] [PATCH v2 15/28] tegra: nyan-big: Add a .its file for chromium

[Simon Glass]

Add a sample .its file for booting U-Boot on a nyan-big Chromebook.

Signed-off-by: Simon Glass 
---

Changes in v2:
- Add new patch containing a .its file for chromium

 doc/chromium/nyan-big.its | 42 ++
 1 file changed, 42 insertions(+)
 create mode 100644 doc/chromium/nyan-big.its

diff --git a/doc/chromium/nyan-big.its b/doc/chromium/nyan-big.its
new file mode 100644
index 00..8dc8d73041
--- /dev/null
+++ b/doc/chromium/nyan-big.its
@@ -0,0 +1,42 @@
+/dts-v1/;
+
+/ {
+   description = "U-Boot mainline";
+   #address-cells = <1>;
+
+   images {
+   kernel@1 {
+   description = "U-Boot mainline";
+   type = "kernel_noload";
+   arch = "arm";
+   os = "linux";
+   data = /incbin/("../.././b/nyan-big/u-boot.bin");
+   compression = "none";
+   load = <0>;
+   entry = <0>;
+   hash@2 {
+   algo = "sha1";
+   };
+   };
+
+   fdt@1{
+   description = "tegra124-nyan-big.dtb";
+   data = /incbin/("../.././b/nyan-big/u-boot.dtb");
+   type = "flat_dt";
+   arch = "arm";
+   compression = "none";
+   hash@1{
+   algo = "sha1";
+   };
+   };
+   };
+
+   configurations {
+   default = "config@1";
+   config@1 {
+   description = "Boot U-Boot";
+   kernel = "kernel@1";
+   fdt = "fdt@1";
+   };
+   };
+};
-- 
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[U-Boot] [PATCH v2 17/28] rockchip: Setup default PWM flags

[Simon Glass]

At present if the

Signed-off-by: Simon Glass 
Fixes: 874ee59 (rockchip: pwm: implement pwm_set_invert())
---

Changes in v2: None

 drivers/pwm/rk_pwm.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/pwm/rk_pwm.c b/drivers/pwm/rk_pwm.c
index 59eae0956e..28de62d716 100644
--- a/drivers/pwm/rk_pwm.c
+++ b/drivers/pwm/rk_pwm.c
@@ -92,6 +92,7 @@ static int rk_pwm_probe(struct udevice *dev)
return -EINVAL;
}
priv->freq = clk_get_rate();
+   priv->enable_conf = PWM_DUTY_POSTIVE | PWM_INACTIVE_POSTIVE;
 
return 0;
 }
-- 
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[U-Boot] [PATCH v2 28/28] README: Add instructions for chain-loading U-Boot on jerry

[Simon Glass]

Add instructions for chromebook_jerry.

Signed-off-by: Simon Glass 
---

Changes in v2:
- Add instructions and patches for chain-loading into U-Boot on jerry

 doc/README.chromium | 70 +
 1 file changed, 70 insertions(+)

diff --git a/doc/README.chromium b/doc/README.chromium
index 61e285da5e..7bf4d87447 100644
--- a/doc/README.chromium
+++ b/doc/README.chromium
@@ -145,6 +145,76 @@ from the load address. If this changes, you either need to 
modify U-Boot to be
 fully relocatable, or expect it to hang.
 
 
+chromebook_jerry
+
+
+The instruction are similar to those for Nyan with changes as noted below:
+
+1. Patch U-Boot
+
+Open include/configs/rk3288_common.h
+
+Change:
+
+#define CONFIG_SYS_TEXT_BASE   0x0010
+
+to:
+
+#define CONFIG_SYS_TEXT_BASE   0x02000100
+
+
+
+2. Build U-Boot
+
+   mkdir b
+   make -j8 O=b/chromebook_jerry CROSS_COMPILE=arm-linux-gnueabi- \
+   chromebook_jerry_defconfig all
+
+
+3. See above
+
+4. Build and sign an image
+
+   ./b/chromebook_jerry/tools/mkimage -f doc/chromium/chromebook_jerry.its \
+   u-boot-chromium.fit
+   echo test >dummy.txt
+   vbutil_kernel --arch arm --keyblock doc/chromium/devkeys/kernel.keyblock \
+   --signprivate doc/chromium/devkeys/kernel_data_key.vbprivk \
+   --version 1 --config dummy.txt --vmlinuz u-boot-chromium.fit \
+   --bootloader dummy.txt --pack u-boot.kpart
+
+
+5. See above
+
+6. See above
+
+7. Start it up
+
+Reboot the device in dev mode. Make sure that you have USB booting enabled. To
+do this, login as root (via Ctrl-Alt-forward_arrow) and type
+'enable_dev_usb_boot'. You only need to do this once.
+
+Reboot the device with the SD card inserted. Press Clrl-U at the developer
+mode screen. It should show something like the following on the display:
+
+   U-Boot 2017.05-00649-g72acdbf-dirty (May 29 2017 - 14:57:05 -0600)
+
+   Model: Google Jerry
+   Net:   Net Initialization Skipped
+   No ethernet found.
+   Hit any key to stop autoboot:  0
+
+
+8. Known problems
+
+None as yet.
+
+
+9. Notes
+
+None as yet.
+
+
 Other notes
 ===
 
-- 
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[U-Boot] [PATCH v2 20/28] rockchip: video: Add remove() methods

[Simon Glass]

Add remove() methods for EDP and VOP so that U-Boot can shut down the
video on exit. This avoids leaving DMA running while booting Linux which
can cause problems if Linux uses the frame buffer for something else.

It also makes it clear what is needed to shut down video.

While we are here, make rkvop_enable() static.

Signed-off-by: Simon Glass 
---

Changes in v2: None

 drivers/video/rockchip/rk_edp.c | 16 +++-
 drivers/video/rockchip/rk_vop.c | 18 --
 2 files changed, 31 insertions(+), 3 deletions(-)

diff --git a/drivers/video/rockchip/rk_edp.c b/drivers/video/rockchip/rk_edp.c
index 4e2030e8e4..1527f96eca 100644
--- a/drivers/video/rockchip/rk_edp.c
+++ b/drivers/video/rockchip/rk_edp.c
@@ -1004,7 +1004,20 @@ static int rk_edp_ofdata_to_platdata(struct udevice *dev)
return 0;
 }
 
-int rk_edp_probe(struct udevice *dev)
+static int rk_edp_remove(struct udevice *dev)
+{
+   struct rk_edp_priv *priv = dev_get_priv(dev);
+   struct rk3288_edp *regs = priv->regs;
+
+   setbits_le32(>video_ctl_1, VIDEO_MUTE);
+   clrbits_le32(>video_ctl_1, VIDEO_EN);
+   clrbits_le32(>sys_ctl_3, F_HPD | HPD_CTRL);
+   setbits_le32(>func_en_1, SW_FUNC_EN_N);
+
+   return 0;
+}
+
+static int rk_edp_probe(struct udevice *dev)
 {
struct display_plat *uc_plat = dev_get_uclass_platdata(dev);
struct rk_edp_priv *priv = dev_get_priv(dev);
@@ -1080,5 +1093,6 @@ U_BOOT_DRIVER(dp_rockchip) = {
.ops= _rockchip_ops,
.ofdata_to_platdata = rk_edp_ofdata_to_platdata,
.probe  = rk_edp_probe,
+   .remove = rk_edp_remove,
.priv_auto_alloc_size   = sizeof(struct rk_edp_priv),
 };
diff --git a/drivers/video/rockchip/rk_vop.c b/drivers/video/rockchip/rk_vop.c
index 48bfcd4f34..b9b0b296ca 100644
--- a/drivers/video/rockchip/rk_vop.c
+++ b/drivers/video/rockchip/rk_vop.c
@@ -33,8 +33,9 @@ struct rk_vop_priv {
struct rk3288_grf *grf;
 };
 
-void rkvop_enable(struct rk3288_vop *regs, ulong fbbase,
- int fb_bits_per_pixel, const struct display_timing *edid)
+static void rkvop_enable(struct rk3288_vop *regs, ulong fbbase,
+int fb_bits_per_pixel,
+const struct display_timing *edid)
 {
u32 lb_mode;
u32 rgb_mode;
@@ -281,6 +282,18 @@ int rk_display_init(struct udevice *dev, ulong fbbase, int 
ep_node)
return 0;
 }
 
+static int rk_vop_remove(struct udevice *dev)
+{
+   struct rk_vop_priv *priv = dev_get_priv(dev);
+
+   rk_setreg(>regs->sys_ctrl, V_STANDBY_EN(1));
+
+   /* wait frame complete (60Hz) to enter standby */
+   mdelay(17);
+
+   return 0;
+}
+
 static int rk_vop_probe(struct udevice *dev)
 {
struct video_uc_platdata *plat = dev_get_uclass_platdata(dev);
@@ -379,5 +392,6 @@ U_BOOT_DRIVER(rk_vop) = {
.ops= _vop_ops,
.bind   = rk_vop_bind,
.probe  = rk_vop_probe,
+   .remove = rk_vop_remove,
.priv_auto_alloc_size   = sizeof(struct rk_vop_priv),
 };
-- 
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[U-Boot] [PATCH v2 16/28] README: Add instructions for chain-loading U-Boot

[Simon Glass]

Most Chromebooks support chain-loading U-Boot but instructions are
somewhat scattered. Add a README to hold this information within the
U-Boot tree. Also add the standard developer keys to simplify the
instructions, since they are small.

For now this only supports nyan-big.

Signed-off-by: Simon Glass 
---

Changes in v2:
- Explain how to create dummy.txt
- Add a comment about how to create a protective MBR

 doc/README.chromium  | 182 +++
 doc/chromium/devkeys/kernel.keyblock | Bin 0 -> 1208 bytes
 doc/chromium/devkeys/kernel_data_key.vbprivk | Bin 0 -> 1199 bytes
 3 files changed, 182 insertions(+)
 create mode 100644 doc/README.chromium
 create mode 100644 doc/chromium/devkeys/kernel.keyblock
 create mode 100644 doc/chromium/devkeys/kernel_data_key.vbprivk

diff --git a/doc/README.chromium b/doc/README.chromium
new file mode 100644
index 00..61e285da5e
--- /dev/null
+++ b/doc/README.chromium
@@ -0,0 +1,182 @@
+Running U-Boot from coreboot on Chromebooks
+===
+
+U-Boot can be used as a secondary boot loader in a few situations such as from
+UEFI and coreboot (see README.x86). Recent Chromebooks use coreboot even on
+ARM platforms to start up the machine.
+
+This document aims to provide a guide to booting U-Boot on a Chromebook. It
+is only a starting point, and there are many guides on the interwebs. But
+placing this information in the U-Boot tree should make it easier to find for
+those who use U-Boot habitually.
+
+Most of these platforms are supported by U-Boot natively, but it is risky to
+replace the ROM unless you have a servo board and cable to restore it with.
+
+
+For all of these the standard U-Boot build instructions apply. For example on
+ARM:
+
+   sudo apt install gcc-arm-linux-gnueabi
+   mkdir b
+   make O=b/nyan_big CROSS_COMPILE=arm-linux-gnueabi- nyan-big_defconfig all
+
+You can obtain the vbutil_kernel utility here:
+
+   https://drive.google.com/open?id=0B7WYZbZ9zd-3dHlVVXo4VXE2T0U
+
+
+Snow (Samsung ARM Chromebook)
+-
+
+See here:
+
+https://www.chromium.org/chromium-os/firmware-porting-guide/using-nv-u-boot-on-the-samsung-arm-chromebook
+
+
+Nyan-big
+
+
+Compiled based on information here:
+https://lists.denx.de/pipermail/u-boot/2015-March/209530.html
+https://git.collabora.com/cgit/user/tomeu/u-boot.git/commit/?h=nyan-big
+https://lists.denx.de/pipermail/u-boot/2017-May/289491.html
+https://github.com/chromeos-nvidia-androidtv/gnu-linux-on-acer-chromebook-13#copy-data-to-the-sd-card
+
+1. Patch U-Boot
+
+Open include/configs/tegra124-common.h
+
+Change:
+
+#define CONFIG_SYS_TEXT_BASE   0x8011
+
+to:
+
+#define CONFIG_SYS_TEXT_BASE   0x81000100
+
+
+2. Build U-Boot
+
+   mkdir b
+   make -j8 O=b/nyan-big CROSS_COMPILE=arm-linux-gnueabi- nyan-big_defconfig 
all
+
+
+3. Select a .its file
+
+Select something from doc/chromium which matches your board, or create your
+own.
+
+Note that the device tree node is required, even though it is not actually
+used by U-Boot. This is because the Chromebook expects to pass it to the
+kernel, and crashes if it is not present.
+
+
+4. Build and sign an image
+
+   ./b/nyan-big/tools/mkimage -f doc/chromium/nyan-big.its u-boot-chromium.fit
+   echo test >dummy.txt
+   vbutil_kernel --arch arm --keyblock doc/chromium/devkeys/kernel.keyblock \
+   --signprivate doc/chromium/devkeys/kernel_data_key.vbprivk \
+   --version 1 --config dummy.txt --vmlinuz u-boot-chromium.fit \
+   --bootloader dummy.txt --pack u-boot.kpart
+
+
+5. Prepare an SD card
+
+   DISK=/dev/sdc   # Replace with your actual SD card device
+   sudo cgpt create $DISK
+   sudo cgpt add -b 34 -s 32768 -P 1 -S 1 -t kernel $DISK
+   sudo cgpt add -b 32802 -s 200 -t rootfs $DISK
+   sudo gdisk $DISK   # Enter command 'w' to write a protective MBR to the disk
+
+
+6. Write U-Boot to the SD card
+
+   sudo dd if=u-boot.kpart of=/dev/sdc1; sync
+
+
+7. Start it up
+
+Reboot the device in dev mode. Make sure that you have USB booting enabled. To
+do this, login as root (via Ctrl-Alt-forward_arrow) and type
+'enable_dev_usb_boot'. You only need to do this once.
+
+Reboot the device with the SD card inserted. Press Clrl-U at the developer
+mode screen. It should show something like the following on the display:
+
+   U-Boot 2017.07-00637-g242eb42-dirty (May 22 2017 - 06:14:21 -0600)
+
+   Model: Acer Chromebook 13 CB5-311
+   Board: Google/NVIDIA Nyan-big, ID: 1
+
+   Net:   No ethernet found.
+   Hit any key to stop autoboot:  0
+   Tegra124 (Nyan-big) #
+
+
+8. Known problems
+
+On the serial console the word MMC is chopped at the start of the line:
+
+C:   sdhci@700b: 2, sdhci@700b0400: 1, sdhci@700b0600: 0
+
+This is likely due to some problem with change-over of the serial driver
+during relocation (or perhaps updating the clock setup in board_init()).
+
+
+9. Notes
+
+To check that you copied the 

[U-Boot] [PATCH v2 26/28] rockchip: Enable the video display banner

[Simon Glass]

Show the U-Boot banner and board information on the video display during
boot.

Signed-off-by: Simon Glass 
---

Changes in v2: None

 include/configs/rockchip-common.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/include/configs/rockchip-common.h 
b/include/configs/rockchip-common.h
index 9d183cee6a..0573571e6e 100644
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -54,4 +54,6 @@
 #define CONFIG_ENV_OFFSET (96 * 1024)
 #endif
 
+#define CONFIG_DISPLAY_BOARDINFO_LATE
+
 #endif /* _ROCKCHIP_COMMON_H_ */
-- 
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[U-Boot] [PATCH v2 13/28] tegra: Enable CP15 init

[Simon Glass]

At present CP15 init is disabled on tegra. Use the correct option so that
this init is performed on boot. This enables the instruction cache, for
example, which is critical to the machine running at full speed.

Signed-off-by: Simon Glass 
---

Changes in v2: None

 include/configs/tegra-common-post.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/configs/tegra-common-post.h 
b/include/configs/tegra-common-post.h
index 1a4a7e2320..846b09aadc 100644
--- a/include/configs/tegra-common-post.h
+++ b/include/configs/tegra-common-post.h
@@ -105,7 +105,7 @@
 /* overrides for SPL build here */
 #ifdef CONFIG_SPL_BUILD
 
-#define CONFIG_SKIP_LOWLEVEL_INIT
+#define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
 
 /* remove I2C support */
 #ifdef CONFIG_SYS_I2C_TEGRA
-- 
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[U-Boot] [PATCH v2 21/28] rockchip: video: Take the vop device out of standby

[Simon Glass]

On reset the standby bit is clear, but if U-Boot is chain-loaded from
another boot loader it may be set. Clear it before starting up video so
that it works correctly.

Signed-off-by: Simon Glass 
---

Changes in v2: None

 drivers/video/rockchip/rk_vop.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/video/rockchip/rk_vop.c b/drivers/video/rockchip/rk_vop.c
index b9b0b296ca..d970aae524 100644
--- a/drivers/video/rockchip/rk_vop.c
+++ b/drivers/video/rockchip/rk_vop.c
@@ -104,6 +104,9 @@ void rkvop_mode_set(struct rk3288_vop *regs,
uint flags;
int mode_flags;
 
+   /* remove from standby */
+   rk_clrreg(>sys_ctrl, V_STANDBY_EN(1));
+
switch (mode) {
case VOP_MODE_HDMI:
clrsetbits_le32(>sys_ctrl, M_ALL_OUT_EN,
-- 
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[U-Boot] [PATCH v2 12/28] tegra: video: Don't power up the SOR twice

[Simon Glass]

If U-Boot is the secondary boot loader, or has been run from itself, the
SOR may already be powered up. Powering it up again causes a hang, so
detect this situation and skip it.

Signed-off-by: Simon Glass 
---

Changes in v2: None

 drivers/video/tegra124/sor.c | 9 +
 1 file changed, 9 insertions(+)

diff --git a/drivers/video/tegra124/sor.c b/drivers/video/tegra124/sor.c
index 1f5e572bda..700ab25d46 100644
--- a/drivers/video/tegra124/sor.c
+++ b/drivers/video/tegra124/sor.c
@@ -466,11 +466,20 @@ void tegra_dc_sor_set_lane_count(struct udevice *dev, u8 
lane_count)
 static int tegra_dc_sor_power_up(struct udevice *dev, int is_lvds)
 {
struct tegra_dc_sor_data *sor = dev_get_priv(dev);
+   u32 reg;
int ret;
 
if (sor->power_is_up)
return 0;
 
+   /*
+* If for some reason it is already powered up, don't do it again.
+* This can happen if U-Boot is the secondary boot loader.
+*/
+   reg = tegra_sor_readl(sor, DP_PADCTL(sor->portnum));
+   if (reg & DP_PADCTL_PD_TXD_0_NO)
+   return 0;
+
/* Set link bw */
tegra_dc_sor_set_link_bandwidth(dev, is_lvds ?
CLK_CNTRL_DP_LINK_SPEED_LVDS :
-- 
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[U-Boot] [PATCH v2 25/28] rockchip: rk3288: Allow setting up clocks in U-Boot proper

[Simon Glass]

If U-Boot is chain-loaded from a previous boot loader we must set up the
clocks the way U-Boot wants them. Add code for this. It will do nothing if
SPL has already done the job.

Signed-off-by: Simon Glass 
---

Changes in v2: None

 arch/arm/mach-rockchip/rk3288-board.c | 35 +++
 configs/chromebook_jerry_defconfig|  1 +
 2 files changed, 36 insertions(+)

diff --git a/arch/arm/mach-rockchip/rk3288-board.c 
b/arch/arm/mach-rockchip/rk3288-board.c
index 18fd0dcd20..a354d992da 100644
--- a/arch/arm/mach-rockchip/rk3288-board.c
+++ b/arch/arm/mach-rockchip/rk3288-board.c
@@ -309,3 +309,38 @@ U_BOOT_CMD(
"display information about clocks",
""
 );
+
+#define GRF_SOC_CON2 0xff77024c
+
+int board_early_init_f(void)
+{
+   struct udevice *pinctrl;
+   struct udevice *dev;
+   int ret;
+
+   /*
+* This init is done in SPL, but when chain-loading U-Boot SPL will
+* have been skipped. Allow the clock driver to check if it needs
+* setting up.
+*/
+   ret = rockchip_get_clk();
+   if (ret) {
+   debug("CLK init failed: %d\n", ret);
+   return ret;
+   }
+   ret = uclass_get_device(UCLASS_PINCTRL, 0, );
+   if (ret) {
+   debug("%s: Cannot find pinctrl device\n", __func__);
+   return ret;
+   }
+
+   /* Enable debug UART */
+   ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_UART_DBG);
+   if (ret) {
+   debug("%s: Failed to set up console UART\n", __func__);
+   return ret;
+   }
+   rk_setreg(GRF_SOC_CON2, 1 << 0);
+
+   return 0;
+}
diff --git a/configs/chromebook_jerry_defconfig 
b/configs/chromebook_jerry_defconfig
index 6fc0dcc023..bb880585e1 100644
--- a/configs/chromebook_jerry_defconfig
+++ b/configs/chromebook_jerry_defconfig
@@ -10,6 +10,7 @@ CONFIG_SPL_STACK_R_ADDR=0x8
 CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-jerry"
 CONFIG_SILENT_CONSOLE=y
 # CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
 # CONFIG_CMD_IMLS is not set
-- 
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[U-Boot] [PATCH v2 24/28] rockchip: Init clocks again when chain-loading

[Simon Glass]

Detect with a previous boot loader has already set up the clocks and set
them up again so that U-Boot gets what it expects.

Signed-off-by: Simon Glass 
---

Changes in v2: None

 drivers/clk/rockchip/clk_rk3288.c | 25 +++--
 1 file changed, 19 insertions(+), 6 deletions(-)

diff --git a/drivers/clk/rockchip/clk_rk3288.c 
b/drivers/clk/rockchip/clk_rk3288.c
index f6ef7ecd7a..792ee76509 100644
--- a/drivers/clk/rockchip/clk_rk3288.c
+++ b/drivers/clk/rockchip/clk_rk3288.c
@@ -131,10 +131,8 @@ enum {
 
 /* Keep divisors as low as possible to reduce jitter and power usage */
 static const struct pll_div apll_init_cfg = PLL_DIVISORS(APLL_HZ, 1, 1);
-#ifdef CONFIG_SPL_BUILD
 static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 2, 2);
 static const struct pll_div cpll_init_cfg = PLL_DIVISORS(CPLL_HZ, 1, 2);
-#endif
 
 static int rkclk_set_pll(struct rk3288_cru *cru, enum rk_clk_id clk_id,
 const struct pll_div *div)
@@ -340,9 +338,8 @@ static int rockchip_vop_set_clk(struct rk3288_cru *cru, 
struct rk3288_grf *grf,
 
return 0;
 }
-#endif
+#endif /* CONFIG_SPL_BUILD */
 
-#ifdef CONFIG_SPL_BUILD
 static void rkclk_init(struct rk3288_cru *cru, struct rk3288_grf *grf)
 {
u32 aclk_div;
@@ -416,7 +413,6 @@ static void rkclk_init(struct rk3288_cru *cru, struct 
rk3288_grf *grf)
 GPLL_MODE_NORMAL << GPLL_MODE_SHIFT |
 CPLL_MODE_NORMAL << CPLL_MODE_SHIFT);
 }
-#endif
 
 void rk3288_clk_configure_cpu(struct rk3288_cru *cru, struct rk3288_grf *grf)
 {
@@ -786,6 +782,7 @@ static int rk3288_clk_ofdata_to_platdata(struct udevice 
*dev)
 static int rk3288_clk_probe(struct udevice *dev)
 {
struct rk3288_clk_priv *priv = dev_get_priv(dev);
+   bool init_clocks = false;
 
priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
if (IS_ERR(priv->grf))
@@ -796,8 +793,24 @@ static int rk3288_clk_probe(struct udevice *dev)
 
priv->cru = map_sysmem(plat->dtd.reg[0], plat->dtd.reg[1]);
 #endif
-   rkclk_init(priv->cru, priv->grf);
+   init_clocks = true;
 #endif
+   if (!(gd->flags & GD_FLG_RELOC)) {
+   u32 reg;
+
+   /*
+* Init clocks in U-Boot proper if the NPLL is runnning. This
+* indicates that a previous boot loader set up the clocks, so
+* we need to redo it. U-Boot's SPL does not set this clock.
+*/
+   reg = readl(>cru->cru_mode_con);
+   if (((reg & NPLL_MODE_MASK) >> NPLL_MODE_SHIFT) ==
+   NPLL_MODE_NORMAL)
+   init_clocks = true;
+   }
+
+   if (init_clocks)
+   rkclk_init(priv->cru, priv->grf);
 
return 0;
 }
-- 
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[U-Boot] [PATCH v2 06/28] arm: Disable LPAE if not enabled

[Simon Glass]

If CONFIG_ARMV7_LPAE is not defined we should make sure that the feature
is disabled. This can happen if U-Boot is chain-loaded from another boot
loader which does enable LPAE.

Signed-off-by: Simon Glass 
---

Changes in v2: None

 arch/arm/lib/cache-cp15.c | 9 +
 1 file changed, 9 insertions(+)

diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c
index f293573601..cf852c061b 100644
--- a/arch/arm/lib/cache-cp15.c
+++ b/arch/arm/lib/cache-cp15.c
@@ -172,6 +172,15 @@ static inline void mmu_setup(void)
: : "r" (MEMORY_ATTRIBUTES) : "memory");
}
 #elif defined(CONFIG_CPU_V7)
+   if (is_hyp()) {
+   /* Set HTCR to disable LPAE */
+   asm volatile("mcr p15, 4, %0, c2, c0, 2"
+   : : "r" (0) : "memory");
+   } else {
+   /* Set TTBCR to disable LPAE */
+   asm volatile("mcr p15, 0, %0, c2, c0, 2"
+   : : "r" (0) : "memory");
+   }
/* Set TTBR0 */
reg = gd->arch.tlb_addr & TTBR0_BASE_ADDR_MASK;
 #if defined(CONFIG_SYS_ARM_CACHE_WRITETHROUGH)
-- 
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[U-Boot] [PATCH v2 05/28] arm: Don't try to support CONFIG_ARMV7_LPAE on ARMv4T

[Simon Glass]

At present if CONFIG_ARMV7_LPAE is defined then mmu_setup() will use
instructions which are invalid on ARMv4T. This happens on Tegra since it
has an ARMv4T boot CPU. Add a check for the architecture version to allow
the code to be built. It will not actually be executed by the boot CPU,
but needs to compile.

Signed-off-by: Simon Glass 
---

Changes in v2: None

 arch/arm/lib/cache-cp15.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c
index 0f7020a315..f293573601 100644
--- a/arch/arm/lib/cache-cp15.c
+++ b/arch/arm/lib/cache-cp15.c
@@ -129,7 +129,7 @@ static inline void mmu_setup(void)
dram_bank_mmu_setup(i);
}
 
-#ifdef CONFIG_ARMV7_LPAE
+#if defined(CONFIG_ARMV7_LPAE) && __LINUX_ARM_ARCH__ != 4
/* Set up 4 PTE entries pointing to our 4 1GB page tables */
for (i = 0; i < 4; i++) {
u64 *page_table = (u64 *)(gd->arch.tlb_addr + (4096 * 4));
-- 
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[U-Boot] [PATCH v2 18/28] rockchip: Fix regualtor typo in veyron

[Simon Glass]

This typo doesn't actually cause any problems, but is wrong. Fix it.

Signed-off-by: Simon Glass 
---

Changes in v2: None

 arch/arm/dts/rk3288-veyron-jerry.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/dts/rk3288-veyron-jerry.dts 
b/arch/arm/dts/rk3288-veyron-jerry.dts
index 8aab607cc5..2e6272b81b 100644
--- a/arch/arm/dts/rk3288-veyron-jerry.dts
+++ b/arch/arm/dts/rk3288-veyron-jerry.dts
@@ -21,7 +21,7 @@
 stdout-path = 
 };
 
-   panel_regulator: panel-regualtor {
+   panel_regulator: panel-regulator {
compatible = "regulator-fixed";
enable-active-high;
gpio = < 14 GPIO_ACTIVE_HIGH>;
-- 
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[U-Boot] [PATCH v2 27/28] rockchip: jerry: Disable CONFIG_CONSOLE_SCROLL_LINES

[Simon Glass]

The display on jerry is so fast that this option is not needed. Drop it so
that the display scrolls more smoothly.

Signed-off-by: Simon Glass 
---

Changes in v2: None

 configs/chromebook_jerry_defconfig | 1 -
 1 file changed, 1 deletion(-)

diff --git a/configs/chromebook_jerry_defconfig 
b/configs/chromebook_jerry_defconfig
index bb880585e1..63de674241 100644
--- a/configs/chromebook_jerry_defconfig
+++ b/configs/chromebook_jerry_defconfig
@@ -75,7 +75,6 @@ CONFIG_DISPLAY=y
 CONFIG_VIDEO_ROCKCHIP=y
 CONFIG_DISPLAY_ROCKCHIP_EDP=y
 CONFIG_DISPLAY_ROCKCHIP_HDMI=y
-CONFIG_CONSOLE_SCROLL_LINES=10
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_CMD_DHRYSTONE=y
 CONFIG_ERRNO_STR=y
-- 
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[U-Boot] [PATCH v2 10/28] tegra: spi: Wait a little after setting the clocks

[Simon Glass]

For devices that need a delay between SPI transactions we seem to need an
additional delay before the first one if the CPU is running at full speed.
Add this, under control of the existing setting. At present it will only
be enabled with the Chrome OS EC.

Signed-off-by: Simon Glass 
---

Changes in v2: None

 drivers/spi/tegra114_spi.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/spi/tegra114_spi.c b/drivers/spi/tegra114_spi.c
index 013bc82380..04b4fce061 100644
--- a/drivers/spi/tegra114_spi.c
+++ b/drivers/spi/tegra114_spi.c
@@ -149,6 +149,7 @@ static int tegra114_spi_probe(struct udevice *bus)
   bus->name, priv->freq, rate);
}
}
+   udelay(plat->deactivate_delay_us);
 
/* Clear stale status here */
setbits_le32(>fifo_status,
-- 
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[U-Boot] [PATCH v2 09/28] tegra: dts: Add cros-ec SPI settings

[Simon Glass]

At present the interrupt does not work and the SPI bus runs much less
quickly than it should. Add settings to fix this.

Signed-off-by: Simon Glass 
---

Changes in v2: None

 arch/arm/dts/tegra124-nyan-big-u-boot.dtsi | 9 +
 1 file changed, 9 insertions(+)

diff --git a/arch/arm/dts/tegra124-nyan-big-u-boot.dtsi 
b/arch/arm/dts/tegra124-nyan-big-u-boot.dtsi
index fff1d78169..65c3851aff 100644
--- a/arch/arm/dts/tegra124-nyan-big-u-boot.dtsi
+++ b/arch/arm/dts/tegra124-nyan-big-u-boot.dtsi
@@ -12,4 +12,13 @@
u-boot,dm-pre-reloc;
};
};
+
+   spi@7000d400 {
+   spi-deactivate-delay = <200>;
+   spi-max-frequency = <300>;
+
+   cros_ec: cros-ec@0 {
+   ec-interrupt = < TEGRA_GPIO(C, 7) GPIO_ACTIVE_LOW>;
+   };
+   };
 };
-- 
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[U-Boot] [PATCH v2 04/28] arm: Rename HCTR to HTCR

[Simon Glass]

This appears to be a typo. Fix it.

Signed-off-by: Simon Glass 
---

Changes in v2: None

 arch/arm/lib/cache-cp15.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c
index e9bbcf5122..0f7020a315 100644
--- a/arch/arm/lib/cache-cp15.c
+++ b/arch/arm/lib/cache-cp15.c
@@ -147,7 +147,7 @@ static inline void mmu_setup(void)
 #endif
 
if (is_hyp()) {
-   /* Set HCTR to enable LPAE */
+   /* Set HTCR to enable LPAE */
asm volatile("mcr p15, 4, %0, c2, c0, 2"
: : "r" (reg) : "memory");
/* Set HTTBR0 */
-- 
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[U-Boot] [PATCH v2 08/28] tegra: Init clocks even when SPL did not run

[Simon Glass]

At present early clock init happens in SPL. If SPL did not run (because
for example U-Boot is chain-loaded from another boot loader) then the
clocks are not set as U-Boot expects.

Add a function to detect this and call the early clock init in U-Boot
proper.

Signed-off-by: Simon Glass 
---

Changes in v2: None

 arch/arm/include/asm/arch-tegra/clock.h |  3 +++
 arch/arm/mach-tegra/board2.c|  3 +++
 arch/arm/mach-tegra/clock.c |  5 +
 arch/arm/mach-tegra/tegra124/clock.c| 18 ++
 4 files changed, 29 insertions(+)

diff --git a/arch/arm/include/asm/arch-tegra/clock.h 
b/arch/arm/include/asm/arch-tegra/clock.h
index 301de4a899..92180db321 100644
--- a/arch/arm/include/asm/arch-tegra/clock.h
+++ b/arch/arm/include/asm/arch-tegra/clock.h
@@ -288,6 +288,9 @@ void clock_init(void);
 /* Initialize the PLLs */
 void clock_early_init(void);
 
+/* @return true if hardware indicates that clock_early_init() was called */
+bool clock_early_init_done(void);
+
 /* Returns a pointer to the clock source register for a peripheral */
 u32 *get_periph_source_reg(enum periph_id periph_id);
 
diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c
index e0a39e1a32..bd137969f0 100644
--- a/arch/arm/mach-tegra/board2.c
+++ b/arch/arm/mach-tegra/board2.c
@@ -181,6 +181,9 @@ void gpio_early_init(void) __attribute__((weak, 
alias("__gpio_early_init")));
 
 int board_early_init_f(void)
 {
+   if (!clock_early_init_done())
+   clock_early_init();
+
 #if defined(CONFIG_TEGRA_DISCONNECT_UDC_ON_BOOT)
 #define USBCMD_FS2 (1 << 15)
{
diff --git a/arch/arm/mach-tegra/clock.c b/arch/arm/mach-tegra/clock.c
index 090dba629c..ce68c7d0cc 100644
--- a/arch/arm/mach-tegra/clock.c
+++ b/arch/arm/mach-tegra/clock.c
@@ -824,3 +824,8 @@ int clock_external_output(int clk_id)
 
return 0;
 }
+
+__weak bool clock_early_init_done(void)
+{
+   return true;
+}
diff --git a/arch/arm/mach-tegra/tegra124/clock.c 
b/arch/arm/mach-tegra/tegra124/clock.c
index 5e4406102f..5ae718b342 100644
--- a/arch/arm/mach-tegra/tegra124/clock.c
+++ b/arch/arm/mach-tegra/tegra124/clock.c
@@ -891,6 +891,24 @@ void clock_early_init(void)
udelay(2);
 }
 
+/*
+ * clock_early_init_done - Check if clock_early_init() has been called
+ *
+ * Check a register that we set up to see if clock_early_init() has already
+ * been called.
+ *
+ * @return true if clock_early_init() was called, false if not
+ */
+bool clock_early_init_done(void)
+{
+   struct clk_rst_ctlr *clkrst = (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE;
+   u32 val;
+
+   val = readl(>crc_sclk_brst_pol);
+
+   return val == 0x2000;
+}
+
 void arch_timer_init(void)
 {
struct sysctr_ctlr *sysctr = (struct sysctr_ctlr *)NV_PA_TSC_BASE;
-- 
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[U-Boot] [PATCH v2 07/28] power: regulator: Add more debugging and fix a missing newline

[Simon Glass]

This file does not report a few possible errors and one message is missing
a newline. Fix these.

Signed-off-by: Simon Glass 
---

Changes in v2: None

 drivers/power/regulator/regulator-uclass.c | 8 +---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/drivers/power/regulator/regulator-uclass.c 
b/drivers/power/regulator/regulator-uclass.c
index a42f80bb2b..0a1d1b36c0 100644
--- a/drivers/power/regulator/regulator-uclass.c
+++ b/drivers/power/regulator/regulator-uclass.c
@@ -146,8 +146,10 @@ int regulator_get_by_platname(const char *plat_name, 
struct udevice **devp)
 
for (ret = uclass_find_first_device(UCLASS_REGULATOR, ); dev;
 ret = uclass_find_next_device()) {
-   if (ret)
+   if (ret) {
+   debug("regulator %s, ret=%d\n", dev->name, ret);
continue;
+   }
 
uc_pdata = dev_get_uclass_platdata(dev);
if (!uc_pdata || strcmp(plat_name, uc_pdata->name))
@@ -156,7 +158,7 @@ int regulator_get_by_platname(const char *plat_name, struct 
udevice **devp)
return uclass_get_device_tail(dev, 0, devp);
}
 
-   debug("%s: can't find: %s\n", __func__, plat_name);
+   debug("%s: can't find: %s, ret=%d\n", __func__, plat_name, ret);
 
return -ENODEV;
 }
@@ -219,7 +221,7 @@ int regulator_autoset_by_name(const char *platname, struct 
udevice **devp)
if (devp)
*devp = dev;
if (ret) {
-   debug("Can get the regulator: %s!", platname);
+   debug("Can get the regulator: %s (err=%d)\n", platname, ret);
return ret;
}
 
-- 
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[U-Boot] [PATCH v2 11/28] tegra: nyan-big: Enable the dhrystone benchmark

[Simon Glass]

Enable this so we can roughly measure CPU performance. Also enable the
cache command to allow for timing.

Signed-off-by: Simon Glass 
---

Changes in v2: None

 configs/nyan-big_defconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/configs/nyan-big_defconfig b/configs/nyan-big_defconfig
index e53cf66168..e2b2babd4c 100644
--- a/configs/nyan-big_defconfig
+++ b/configs/nyan-big_defconfig
@@ -28,6 +28,7 @@ CONFIG_CMD_GPIO=y
 # CONFIG_CMD_SETEXPR is not set
 # CONFIG_CMD_NFS is not set
 CONFIG_CMD_BMP=y
+CONFIG_CMD_CACHE=y
 CONFIG_CMD_BOOTSTAGE=y
 CONFIG_CMD_PMIC=y
 CONFIG_CMD_REGULATOR=y
@@ -76,5 +77,6 @@ CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
 CONFIG_VIDEO_TEGRA124=y
 CONFIG_VIDEO_BRIDGE=y
+CONFIG_CMD_DHRYSTONE=y
 CONFIG_TPM=y
 CONFIG_ERRNO_STR=y
-- 
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[U-Boot] [PATCH v2 03/28] arm: arm720t: Support CONFIG_SKIP_LOWLEVEL_INIT_ONLY

[Simon Glass]

This option allows skipping the call to lowlevel() while still performing
CP15 init. Support this on ARM720T so it can be used with Tegra.

Signed-off-by: Simon Glass 
---

Changes in v2: None

 arch/arm/cpu/arm720t/start.S | 6 --
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/arch/arm/cpu/arm720t/start.S b/arch/arm/cpu/arm720t/start.S
index 0bb3441fb8..365d8f08cb 100644
--- a/arch/arm/cpu/arm720t/start.S
+++ b/arch/arm/cpu/arm720t/start.S
@@ -38,7 +38,8 @@ reset:
 * we do sys-critical inits only at reboot,
 * not when booting from ram!
 */
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
+#if !defined(CONFIG_SKIP_LOWLEVEL_INIT) && \
+   !defined(CONFIG_SKIP_LOWLEVEL_INIT_ONLY)
bl  cpu_init_crit
 #endif
 
@@ -62,7 +63,8 @@ c_runtime_cpu_setup:
  *
  */
 
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
+#if !defined(CONFIG_SKIP_LOWLEVEL_INIT) && \
+   !defined(CONFIG_SKIP_LOWLEVEL_INIT_ONLY)
 cpu_init_crit:
 
mov ip, lr
-- 
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[U-Boot] [PATCH v2 02/28] Allow displaying the U-Boot banner on a video display

[Simon Glass]

At present the U-Boot banner is only displayed on the serial console. If
this is not visible to the user, the banner does not show. Some devices
have a video display which can usefully display this information.

Add a banner which is printed after relocation only on non-serial devices
if CONFIG_DISPLAY_BOARDINFO_LATE is defined.

Signed-off-by: Simon Glass 
---

Changes in v2: None

 common/board_r.c  |  1 +
 common/console.c  | 15 +++
 include/console.h | 12 
 3 files changed, 24 insertions(+), 4 deletions(-)

diff --git a/common/board_r.c b/common/board_r.c
index 5986cd7674..99b5d22c81 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -847,6 +847,7 @@ static init_fnc_t init_sequence_r[] = {
 #endif
console_init_r, /* fully init console as a device */
 #ifdef CONFIG_DISPLAY_BOARDINFO_LATE
+   console_announce_r,
show_board_info,
 #endif
 #ifdef CONFIG_ARCH_MISC_INIT
diff --git a/common/console.c b/common/console.c
index 1232808df5..3fcd7ce66b 100644
--- a/common/console.c
+++ b/common/console.c
@@ -202,7 +202,6 @@ static void console_putc(int file, const char c)
}
 }
 
-#if CONFIG_IS_ENABLED(PRE_CONSOLE_BUFFER)
 static void console_puts_noserial(int file, const char *s)
 {
int i;
@@ -214,7 +213,6 @@ static void console_puts_noserial(int file, const char *s)
dev->puts(dev, s);
}
 }
-#endif
 
 static void console_puts(int file, const char *s)
 {
@@ -248,13 +246,11 @@ static inline void console_putc(int file, const char c)
stdio_devices[file]->putc(stdio_devices[file], c);
 }
 
-#if CONFIG_IS_ENABLED(PRE_CONSOLE_BUFFER)
 static inline void console_puts_noserial(int file, const char *s)
 {
if (strcmp(stdio_devices[file]->name, "serial") != 0)
stdio_devices[file]->puts(stdio_devices[file], s);
 }
-#endif
 
 static inline void console_puts(int file, const char *s)
 {
@@ -699,6 +695,17 @@ static void console_update_silent(void)
 #endif
 }
 
+int console_announce_r(void)
+{
+   char buf[DISPLAY_OPTIONS_BANNER_LENGTH];
+
+   display_options_get_banner(false, buf, sizeof(buf));
+
+   console_puts_noserial(stdout, buf);
+
+   return 0;
+}
+
 /* Called before relocation - use serial functions */
 int console_init_f(void)
 {
diff --git a/include/console.h b/include/console.h
index 3d37f6a53b..511b38e9e7 100644
--- a/include/console.h
+++ b/include/console.h
@@ -42,6 +42,18 @@ void console_record_reset(void);
  */
 void console_record_reset_enable(void);
 
+/**
+ * console_announce_r() - print a U-Boot console on non-serial consoles
+ *
+ * When U-Boot starts up with a display it generally does not account itself
+ * on the display. The banner is emitted on the UART before relocation instead.
+ * This function prints a banner on devices which (we assume) did not receive
+ * it before relocation.
+ *
+ * @return 0 (meaning no errors)
+ */
+int console_announce_r(void);
+
 /*
  * CONSOLE multiplexing.
  */
-- 
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[U-Boot] [PATCH v2 01/28] display_options: Refactor to allow obtaining the banner

[Simon Glass]

Move the display options code into a separate function so that the U-Boot
banner can be obtained from other code. Adjust the 'version' command to
use it.

Signed-off-by: Simon Glass 
---

Changes in v2: None

 cmd/version.c |  4 +++-
 include/display_options.h | 15 +++
 lib/display_options.c | 21 +
 3 files changed, 35 insertions(+), 5 deletions(-)

diff --git a/cmd/version.c b/cmd/version.c
index 1be0667f09..15aab5dc18 100644
--- a/cmd/version.c
+++ b/cmd/version.c
@@ -17,7 +17,9 @@ const char __weak version_string[] = U_BOOT_VERSION_STRING;
 
 static int do_version(cmd_tbl_t *cmdtp, int flag, int argc, char * const 
argv[])
 {
-   printf("\n%s\n", version_string);
+   char buf[DISPLAY_OPTIONS_BANNER_LENGTH];
+
+   printf(display_options_get_banner(false, buf, sizeof(buf)));
 #ifdef CC_VERSION_STRING
puts(CC_VERSION_STRING "\n");
 #endif
diff --git a/include/display_options.h b/include/display_options.h
index ac44c459b3..90891a817f 100644
--- a/include/display_options.h
+++ b/include/display_options.h
@@ -56,4 +56,19 @@ int print_buffer(ulong addr, const void *data, uint width, 
uint count,
  */
 int display_options(void);
 
+/* Suggested length of the buffer to pass to display_options_get_banner() */
+#define DISPLAY_OPTIONS_BANNER_LENGTH  120
+
+/**
+ * display_options_get_banner() - Get the U-Boot banner as a string
+ *
+ * This returns the U-Boot banner string
+ *
+ * @newlines: true to include two newlines at the start
+ * @buf: place to put string
+ * @size: Size of buf
+ * @return buf
+ */
+char *display_options_get_banner(bool newlines, char *buf, int size);
+
 #endif
diff --git a/lib/display_options.c b/lib/display_options.c
index 29343fc00e..ebf684f43b 100644
--- a/lib/display_options.c
+++ b/lib/display_options.c
@@ -13,13 +13,26 @@
 #include 
 #include 
 
-int display_options (void)
+char *display_options_get_banner(bool newlines, char *buf, int size)
 {
+   int len;
+
+   len = snprintf(buf, size, "%s%s", newlines ? "\n\n" : "",
+  version_string);
 #if defined(BUILD_TAG)
-   printf ("\n\n%s, Build: %s\n\n", version_string, BUILD_TAG);
-#else
-   printf ("\n\n%s\n\n", version_string);
+   len += snprintf(buf + len, size - len, ", Build: %s", BUILD_TAG);
 #endif
+   len += snprintf(buf + len, size - len, "\n\n");
+
+   return buf;
+}
+
+int display_options(void)
+{
+   char buf[DISPLAY_OPTIONS_BANNER_LENGTH];
+
+   printf(display_options_get_banner(true, buf, sizeof(buf)));
+
return 0;
 }
 
-- 
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[U-Boot] [PATCH v2 00/28] tegra: nyan-big: Support chainloading and add documentation

[Simon Glass]

Every now and then someone wants to chain-load U-Boot on a Chromebook.
The procedure is not very complicated but there are some oddities.

This series updates a few things with allow U-Boot to start on nyan-big
in this way and adds documentation on how to do it. This provides a
central place where the procedure on different devices can be documented.

Changes in v2:
- Add new patch containing a .its file for chromium
- Explain how to create dummy.txt
- Add a comment about how to create a protective MBR
- Add new patch containing a .its file for chromium
- Add instructions and patches for chain-loading into U-Boot on jerry

Simon Glass (28):
  display_options: Refactor to allow obtaining the banner
  Allow displaying the U-Boot banner on a video display
  arm: arm720t: Support CONFIG_SKIP_LOWLEVEL_INIT_ONLY
  arm: Rename HCTR to HTCR
  arm: Don't try to support CONFIG_ARMV7_LPAE on ARMv4T
  arm: Disable LPAE if not enabled
  power: regulator: Add more debugging and fix a missing newline
  tegra: Init clocks even when SPL did not run
  tegra: dts: Add cros-ec SPI settings
  tegra: spi: Wait a little after setting the clocks
  tegra: nyan-big: Enable the dhrystone benchmark
  tegra: video: Don't power up the SOR twice
  tegra: Enable CP15 init
  tegra: clock: Avoid a divide-by-zero error
  tegra: nyan-big: Add a .its file for chromium
  README: Add instructions for chain-loading U-Boot
  rockchip: Setup default PWM flags
  rockchip: Fix regualtor typo in veyron
  rockchip: rk3288: Add error debugging to veyron_init()
  rockchip: video: Add remove() methods
  rockchip: video: Take the vop device out of standby
  rockchip: jerry: Add a .its file for chromium
  rockchip: rk3288: Convert clock driver to use shifted masks
  rockchip: Init clocks again when chain-loading
  rockchip: rk3288: Allow setting up clocks in U-Boot proper
  rockchip: Enable the video display banner
  rockchip: jerry: Disable CONFIG_CONSOLE_SCROLL_LINES
  README: Add instructions for chain-loading U-Boot on jerry

 arch/arm/cpu/arm720t/start.S|   6 +-
 arch/arm/dts/rk3288-veyron-jerry.dts|   2 +-
 arch/arm/dts/tegra124-nyan-big-u-boot.dtsi  |   9 +
 arch/arm/include/asm/arch-rockchip/cru_rk3288.h |  74 +++
 arch/arm/include/asm/arch-tegra/clock.h |   3 +
 arch/arm/lib/cache-cp15.c   |  13 +-
 arch/arm/mach-rockchip/rk3288-board.c   |  39 +++-
 arch/arm/mach-tegra/board2.c|   3 +
 arch/arm/mach-tegra/clock.c |  10 +-
 arch/arm/mach-tegra/tegra124/clock.c|  18 ++
 cmd/version.c   |   4 +-
 common/board_r.c|   1 +
 common/console.c|  15 +-
 configs/chromebook_jerry_defconfig  |   2 +-
 configs/nyan-big_defconfig  |   2 +
 doc/README.chromium | 252 
 doc/chromium/chromebook_jerry.its   |  42 
 doc/chromium/devkeys/kernel.keyblock| Bin 0 -> 1208 bytes
 doc/chromium/devkeys/kernel_data_key.vbprivk| Bin 0 -> 1199 bytes
 doc/chromium/nyan-big.its   |  42 
 drivers/clk/rockchip/clk_rk3288.c   | 146 +++---
 drivers/power/regulator/regulator-uclass.c  |   8 +-
 drivers/pwm/rk_pwm.c|   1 +
 drivers/spi/tegra114_spi.c  |   1 +
 drivers/video/rockchip/rk_edp.c |  16 +-
 drivers/video/rockchip/rk_vop.c |  21 +-
 drivers/video/tegra124/sor.c|   9 +
 include/configs/rockchip-common.h   |   2 +
 include/configs/tegra-common-post.h |   2 +-
 include/console.h   |  12 ++
 include/display_options.h   |  15 ++
 lib/display_options.c   |  21 +-
 32 files changed, 656 insertions(+), 135 deletions(-)
 create mode 100644 doc/README.chromium
 create mode 100644 doc/chromium/chromebook_jerry.its
 create mode 100644 doc/chromium/devkeys/kernel.keyblock
 create mode 100644 doc/chromium/devkeys/kernel_data_key.vbprivk
 create mode 100644 doc/chromium/nyan-big.its

-- 
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[U-Boot] [PATCH v3] Kconfig: Finish migration of hashing commands

[Tom Rini]

From: Daniel Thompson 

Currently these (board agnostic) commands cannot be selected using
menuconfig and friends. Fix this the obvious way.  As part of this,
don't muddle the meaning of CONFIG_HASH_VERIFY to mean both 'hash -v'
and "we have a hashing command" as this makes the Kconfig logic odd.

Signed-off-by: Daniel Thompson 
[trini: Re-apply, add imply for a few cases, run moveconfig.py, also
migrate CRC32_VERIFY]
Signed-off-by: Tom Rini 
---
 README  | 12 
 arch/Kconfig|  2 ++
 arch/arm/Kconfig|  5 +
 arch/arm/mach-exynos/Kconfig|  2 ++
 arch/arm/mach-tegra/Kconfig |  1 +
 board/ti/common/Kconfig |  1 +
 cmd/Kconfig | 26 +-
 cmd/mem.c   |  8 
 common/hash.c   | 14 --
 configs/apalis_imx6_defconfig   |  1 +
 configs/apalis_imx6_nospl_com_defconfig |  1 +
 configs/apalis_imx6_nospl_it_defconfig  |  1 +
 configs/bcm958622hr_defconfig   |  2 ++
 configs/calimain_defconfig  |  1 +
 configs/colibri_imx6_defconfig  |  1 +
 configs/colibri_imx6_nospl_defconfig|  1 +
 configs/da850_am18xxevm_defconfig   |  1 +
 configs/da850evm_defconfig  |  1 +
 configs/da850evm_direct_nor_defconfig   |  1 +
 configs/ea20_defconfig  |  1 +
 configs/imx6qdl_icore_mmc_defconfig |  1 +
 configs/imx6qdl_icore_rqs_mmc_defconfig |  1 +
 configs/imx6ul_geam_mmc_defconfig   |  1 +
 configs/imx6ul_geam_nand_defconfig  |  1 +
 configs/imx6ul_isiot_emmc_defconfig |  1 +
 configs/imx6ul_isiot_mmc_defconfig  |  1 +
 configs/imx6ul_isiot_nand_defconfig |  1 +
 configs/ipam390_defconfig   |  1 +
 configs/legoev3_defconfig   |  1 +
 configs/omapl138_lcdk_defconfig |  1 +
 configs/xtfpga_defconfig|  1 +
 include/configs/apalis_imx6.h   |  2 --
 include/configs/bcm23550_w1d.h  |  1 -
 include/configs/bcm28155_ap.h   |  1 -
 include/configs/bcm_ep_board.h  |  5 -
 include/configs/calimain.h  |  1 -
 include/configs/colibri_imx6.h  |  2 --
 include/configs/da850evm.h  |  1 -
 include/configs/ea20.h  |  1 -
 include/configs/exynos5-common.h|  3 ---
 include/configs/imx6qdl_icore.h |  1 -
 include/configs/imx6qdl_icore_rqs.h |  1 -
 include/configs/imx6ul_geam.h   |  1 -
 include/configs/imx6ul_isiot.h  |  1 -
 include/configs/ipam390.h   |  1 -
 include/configs/legoev3.h   |  1 -
 include/configs/omapl138_lcdk.h |  1 -
 include/configs/sandbox.h   |  2 --
 include/configs/socfpga_common.h|  2 --
 include/configs/tegra-common.h  |  1 -
 include/configs/ti_armv7_keystone2.h|  1 -
 include/configs/xtfpga.h|  1 -
 include/hash.h  |  4 
 scripts/config_whitelist.txt|  3 ---
 54 files changed, 67 insertions(+), 65 deletions(-)

diff --git a/README b/README
index 9d351ec5ad..77d46d2b42 100644
--- a/README
+++ b/README
@@ -827,7 +827,6 @@ The following options need to be configured:
CONFIG_CMD_BOOTI* ARM64 Linux kernel Image support
CONFIG_CMD_CACHE* icache, dcache
CONFIG_CMD_CONSOLEconinfo
-   CONFIG_CMD_CRC32* crc32
CONFIG_CMD_DHCP * DHCP support
CONFIG_CMD_DIAG * Diagnostics
CONFIG_CMD_ECHO   echo arguments
@@ -889,8 +888,6 @@ The following options need to be configured:
CONFIG_CMD_SETGETDCR  Support for DCR Register access
  (4xx only)
CONFIG_CMD_SF   * Read/write/erase SPI NOR flash
-   CONFIG_CMD_SHA1SUM  * print sha1 memory digest
- (requires CONFIG_CMD_MEMORY)
CONFIG_CMD_SOFTSWITCH   * Soft switch setting command for BF60x
CONFIG_CMD_SOURCE "source" command Support
CONFIG_CMD_SPI  * SPI serial bus support
@@ -2679,15 +2676,6 @@ The following options need to be configured:
A better solution is to properly configure the firewall,
but sometimes that is not allowed.
 
-- Hashing support:
-   CONFIG_HASH_VERIFY
-
-   Enable the hash verify command (hash -v). This adds to code
-   size a little.
-
-   Note: There is also a sha1sum command, which should perhaps
-   be deprecated in favour of 'hash sha1'.
-
 - bootcount support:
CONFIG_BOOTCOUNT_LIMIT
 
diff --git 

Re: [U-Boot] [PATCH v3] sun50i: a64: Add initial Banana Pi M64 support

[Maxime Ripard]

On Wed, May 31, 2017 at 12:13:45PM +, Jagan Teki wrote:
> From: Jagan Teki 
> 
> BPI-M64 is a 64-bit quad-core mini single board computer
> using the Allwinner A64 SOC.
> 
> BPI-M64 features
> - 1.2 Ghz Quad-Core ARM Cortex A53
> - 2GB DDR3 SDRAM with 733MHz
> - MicroSD/eMMC(8GB)
> - 10/100/1000Mbps ethernet (Realtek RTL8211E/D)
> - Wifi + BT
> - IR receiver
> - Audio In/Out
> - Video In/Out
> - 5V 2A DC power-supply
> 
> For dts file,
> Sync with Linux commit 4879b7ae("Merge tag 'dmaengine-4.12-rc1'").
> 
> Boot from MMC:
> -
> U-Boot SPL 2017.05-00667-g85dd258-dirty (May 29 2017 - 13:07:31)
> DRAM: 2048 MiB
> Trying to boot from MMC1
> NOTICE:  BL3-1: Running on A64/H64 (1689) in SRAM A2 (@0x44000)
> NOTICE:  Configuring SPC Controller
> NOTICE:  BL3-1: v1.0(debug):aa75c8d
> NOTICE:  BL3-1: Built : 18:28:27, May 24 2017
> NOTICE:  Configuring AXP PMIC
> NOTICE:  PMIC: setup successful
> INFO:BL3-1: Initializing runtime services
> INFO:BL3-1: Preparing for EL3 exit to normal world
> INFO:BL3-1: Next image address: 0x4a00, SPSR: 0x3c9
> 
> U-Boot 2017.05-00667-g85dd258-dirty (May 29 2017 - 13:07:31 +) Allwinner 
> Technology
> 
> CPU:   Allwinner A64 (SUN50I)
> Model: BananaPi-M64
> DRAM:  2 GiB
> MMC:   SUNXI SD/MMC: 0, SUNXI SD/MMC: 1
> *** Warning - bad CRC, using default environment
> 
> In:serial
> Out:   serial
> Err:   serial
> Net:   No ethernet found.
> starting USB...
> No controllers found
> Hit any key to stop autoboot:  0
> 
> Signed-off-by: Jagan Teki 

Acked-by: Maxime Ripard 

Maxime

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Re: [U-Boot] [PATCH v5 5/16] cmd: Add Kconfig option for CMD_MTDPARTS and related options

[Maxime Ripard]

On Wed, May 31, 2017 at 08:27:33AM +0200, Jörg Krause wrote:
> Hi Maxime,
> 
> On Tue, 2017-05-30 at 23:09 +0200, Maxime Ripard wrote:
> > Hi Jörg,
> > 
> > On Tue, May 30, 2017 at 09:39:57AM +0200, Jörg Krause wrote:
> > > On Mon, 2017-02-27 at 18:22 +0100, Maxime Ripard wrote:
> > > > CMD_MTDPARTS is something the user might or might not want to
> > > > select,
> > > > and
> > > > might depends on (or be selected by) other options too.
> > > > 
> > > > This is even truer for the MTDIDS_DEFAULT and MTDPARTS_DEFAULT
> > > > options that
> > > > might change from one board to another, or from one user to the
> > > > other,
> > > > depending on what it expects and what storage devices are
> > > > available.
> > > > 
> > > > In order to ease that configuration, add those options to
> > > > Kconfig.
> > > > 
> > > > Signed-off-by: Maxime Ripard 
> > > > Reviewed-by: Tom Rini 
> > > > ---
> > > >  cmd/Kconfig| 20 
> > > >  cmd/mtdparts.c |  8 
> > > >  2 files changed, 28 insertions(+), 0 deletions(-)
> > > > 
> > > > diff --git a/cmd/Kconfig b/cmd/Kconfig
> > > > index ef5315631476..0734d669dbd7 100644
> > > > --- a/cmd/Kconfig
> > > > +++ b/cmd/Kconfig
> > > > @@ -801,6 +801,26 @@ config CMD_FS_GENERIC
> > > > help
> > > >   Enables filesystem commands (e.g. load, ls) that work
> > > > for
> > > > multiple
> > > >   fs types.
> > > > +
> > > > +config CMD_MTDPARTS
> > > > +   depends on ARCH_SUNXI
> > > 
> > > Is there any reason to limit the command for the sunxi arch only?
> > 
> > Yes, if we don't, this will generate warnings for each architecture
> > that has not moved that option from their header to Kconfig.
> 
> I see! However, wouldn't it be best to migrate all architectures to
> Kconfig instead of doing it seperately?

Probably, but there was a quite significant number of Kconfig symbols
introduced, used by a very significant number of boards and
architectures.

This was really to unreasonable to do at the time, but we can
definitely do that now.

Maxime

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[U-Boot] Pull request: u-boot-mips/master

[Daniel Schwierzeck]

Hi Tom,

please pull another update for Broadcom MIPS. 
This contains new SoC's, new boards and new drivers and some bugfixes.

Travis CI: https://travis-ci.org/danielschwierzeck/u-boot/builds/237925917


The following changes since commit ccbbada0a59fead35495409d0c2c7bcb22a40278:

  Merge branch 'master' of git://git.denx.de/u-boot-mmc (2017-05-30 14:07:23 
-0400)

are available in the git repository at:

  git://git.denx.de/u-boot-mips.git master

for you to fetch changes up to c93bb1d7bb24930cd3591b0a5a980f77fabd1c29:

  mips: bmips: fix BCM3380 periph clock frequency (2017-05-31 15:45:29 +0200)


Álvaro Fernández Rojas (25):
  dm: watchdog: add BCM6345 watchdog driver
  mips: bmips: add bcm6345-wdt driver support for BCM6358
  mips: bmips: add bcm6345-wdt driver support for BCM6328
  mips: bmips: add bcm6345-wdt driver support for BCM63268
  dm: sysreset: add watchdog-reboot driver
  mips: bmips: add wdt-reboot driver support for BCM6358
  mips: bmips: add wdt-reboot driver support for BCM6328
  mips: bmips: add wdt-reboot driver support for BCM63268
  dm: cpu: bmips: rename cpu_desc specific functions
  dm: cpu: bmips: add BCM6348 support
  dm: ram: bmips: split bcm6358_get_ram_size
  dm: ram: bmips: add BCM6338/BCM6348 support
  MIPS: add support for Broadcom MIPS BCM6348 SoC family
  MIPS: add BMIPS Comtrend CT-5361 board
  dm: cpu: bmips: add BCM3380 support
  MIPS: add support for Broadcom MIPS BCM3380 SoC family
  MIPS: add BMIPS Netgear CG3100D board
  dm: cpu: bmips: add BCM6338 support
  MIPS: add support for Broadcom MIPS BCM6338 SoC family
  MIPS: add BMIPS Sagem F@ST1704 board
  mips: bmips: add board descriptions
  dm: serial: bcm6345: fix uart stop bits
  dm: serial: bcm6345: fix baud rate clock calculation
  mips: bmips: extend baud rates support
  mips: bmips: fix BCM3380 periph clock frequency

 arch/mips/dts/Makefile|   3 ++
 arch/mips/dts/brcm,bcm3380.dtsi   | 154 
++
 arch/mips/dts/brcm,bcm63268.dtsi  |  11 +++
 arch/mips/dts/brcm,bcm6328.dtsi   |  11 +++
 arch/mips/dts/brcm,bcm6338.dtsi   | 118 
+++
 arch/mips/dts/brcm,bcm6348.dtsi   | 127 

 arch/mips/dts/brcm,bcm6358.dtsi   |  11 +++
 arch/mips/dts/comtrend,ct-5361.dts|  49 +++
 arch/mips/dts/netgear,cg3100d.dts |  96 
+
 arch/mips/dts/sagem,f...@st1704.dts  |  50 

 arch/mips/mach-bmips/Kconfig  |  96 
+
 arch/mips/mach-bmips/include/ioremap.h|   4 ++-
 board/comtrend/ct5361/Kconfig |  12 
 board/comtrend/ct5361/MAINTAINERS |   6 
 board/comtrend/ct5361/Makefile|   5 
 board/comtrend/ct5361/ct-5361.c   |   7 +
 board/netgear/cg3100d/Kconfig |  12 
 board/netgear/cg3100d/MAINTAINERS |   6 
 board/netgear/cg3100d/Makefile|   5 
 board/netgear/cg3100d/cg3100d.c   |   7 +
 board/sagem/f@st1704/Kconfig  |  12 
 board/sagem/f@st1704/MAINTAINERS  |   6 
 board/sagem/f@st1704/Makefile |   5 
 board/sagem/f@st1704/f@st1704.c   |   7 +
 configs/comtrend_ct5361_ram_defconfig |  57 

 configs/netgear_cg3100d_ram_defconfig |  56 

 configs/sagem_f@st1704_ram_defconfig  |  52 
+
 drivers/cpu/bmips_cpu.c   |  72 
++
 drivers/ram/bmips_ram.c   |  54 
---
 drivers/serial/serial_bcm6345.c   |  10 ---
 drivers/sysreset/Kconfig  |   6 
 drivers/sysreset/Makefile |   1 +
 drivers/sysreset/sysreset_watchdog.c  |  60 
++
 drivers/watchdog/Kconfig  |   8 ++
 drivers/watchdog/Makefile |   1 +
 drivers/watchdog/bcm6345_wdt.c| 110 
++
 include/configs/bmips_bcm3380.h   |  25 
 include/configs/bmips_bcm6338.h   |  30 +++
 include/configs/bmips_bcm6348.h   |  30 +++
 include/configs/bmips_common.h|   4 +++
 include/configs/comtrend_ct5361.h |  20 +
 

Re: [U-Boot] binman: 'module' object has no attribute 'FinaliseOutputDir'

[Simon Glass]

Hi Kevin,

On 31 May 2017 at 12:13, Kevin Hilman  wrote:
> While trying to build v2017.05 for sun5i-r8-chip (CHIP_defconfig), I get
> the following build error.  I'm not familiar with binman, so not sure
> what I should be looking for.
>
> $ CROSS_COMPILE=arm-linux-gnueabihf- make
>
> [...]
>
>  LD  spl/drivers/serial/built-in.o
>  LD  spl/drivers/built-in.o
>  LD  spl/common/built-in.o
>  LD  spl/lib/built-in.o
>  LD  spl/u-boot-spl
>  OBJCOPY spl/u-boot-spl-nodtb.bin
>  COPYspl/u-boot-spl.bin
>  MKSUNXI spl/sunxi-spl.bin
>  BINMAN  u-boot-sunxi-with-spl.bin
>  binman: 'module' object has no attribute 'FinaliseOutputDir'
>  Makefile:1107: recipe for target 'u-boot-sunxi-with-spl.bin' failed
>  make: *** [u-boot-sunxi-with-spl.bin] Error 1
>
>
> If it matters, compiler is: gcc version 5.3.1 20160412 (Linaro GCC 
> 5.3-2016.05)

Do you know what version of python you are using? I cannot imagine
what is happening here.

>
> Kevin

Regards,
Simon
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Re: [U-Boot] [PATCH 00/12] tegra: nyan-big: Support chainloading and add documentation

[Simon Glass]

Hi Matthew,

On 31 May 2017 at 12:40, Matthew Gorski  wrote:
>
>
> On Wed, May 31, 2017 at 2:28 PM, Matthew Gorski 
> wrote:
>>
>>
>>
>> On Mon, May 22, 2017 at 7:17 AM, Simon Glass  wrote:
>>>
>>> Every now and then someone wants to chain-load U-Boot on a Chromebook.
>>> The procedure is not very complicated but there are some oddities.
>>>
>>> This series updates a few things with allow U-Boot to start on nyan-big
>>> in this way and adds documentation on how to do it. This provides a
>>> central place where the procedure on different devices can be documented.
>>>
>>>
>>> Simon Glass (12):
>>>   arm: arm720t: Support CONFIG_SKIP_LOWLEVEL_INIT_ONLY
>>>   tegra: Init clocks even when SPL did not run
>>>   tegra: dts: Add cros-ec SPI settings
>>>   arm: Rename HCTR to HTCR
>>>   arm: Don't try to support CONFIG_ARMV7_LPAE on ARMv4T
>>>   arm: Disable LPAE if not enabled
>>>   tegra: spi: Wait a little after setting the clocks
>>>   tegra: nyan-big: Enable the dhrystone benchmark
>>>   tegra: video: Don't power up the SOR twice
>>>   tegra: Enable CP15 init
>>>   tegra: clock: Avoid a divide-by-zero error
>>>   README: Add instructions for chain-loading U-Boot
>>>
>>>  arch/arm/cpu/arm720t/start.S |   6 +-
>>>  arch/arm/dts/tegra124-nyan-big-u-boot.dtsi   |   9 ++
>>>  arch/arm/include/asm/arch-tegra/clock.h  |   3 +
>>>  arch/arm/lib/cache-cp15.c|  13 +-
>>>  arch/arm/mach-tegra/board2.c |   3 +
>>>  arch/arm/mach-tegra/clock.c  |  10 +-
>>>  arch/arm/mach-tegra/tegra124/clock.c |  18 +++
>>>  configs/nyan-big_defconfig   |   2 +
>>>  doc/README.chromium  | 222
>>> +++
>>>  doc/chromium/devkeys/kernel.keyblock | Bin 0 -> 1208 bytes
>>>  doc/chromium/devkeys/kernel_data_key.vbprivk | Bin 0 -> 1199 bytes
>>>  drivers/spi/tegra114_spi.c   |   1 +
>>>  drivers/video/tegra124/sor.c |   9 ++
>>>  include/configs/tegra-common-post.h  |   2 +-
>>>  14 files changed, 292 insertions(+), 6 deletions(-)
>>>  create mode 100644 doc/README.chromium
>>>  create mode 100644 doc/chromium/devkeys/kernel.keyblock
>>>  create mode 100644 doc/chromium/devkeys/kernel_data_key.vbprivk
>>>
>> Thank You for this Simon!  Very much appreciated!  I am going to give this
>> a try later tonight and report back my personal results...
>>>
>>> --
>>> 2.13.0.303.g4ebf302169-goog
>>>
>>
> Simon could you please link the u-boot tree this was committed to?  I
> checked master and didn't see the  doc/README.chromium

Yes you can find it at u-boot-dm/chain-working

Regards,
Simon
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Re: [U-Boot] [PATCH 00/12] tegra: nyan-big: Support chainloading and add documentation

[Matthew Gorski]

On Wed, May 31, 2017 at 2:28 PM, Matthew Gorski 
wrote:

>
>
> On Mon, May 22, 2017 at 7:17 AM, Simon Glass  wrote:
>
>> Every now and then someone wants to chain-load U-Boot on a Chromebook.
>> The procedure is not very complicated but there are some oddities.
>>
>> This series updates a few things with allow U-Boot to start on nyan-big
>> in this way and adds documentation on how to do it. This provides a
>> central place where the procedure on different devices can be documented.
>>
>>
>> Simon Glass (12):
>>   arm: arm720t: Support CONFIG_SKIP_LOWLEVEL_INIT_ONLY
>>   tegra: Init clocks even when SPL did not run
>>   tegra: dts: Add cros-ec SPI settings
>>   arm: Rename HCTR to HTCR
>>   arm: Don't try to support CONFIG_ARMV7_LPAE on ARMv4T
>>   arm: Disable LPAE if not enabled
>>   tegra: spi: Wait a little after setting the clocks
>>   tegra: nyan-big: Enable the dhrystone benchmark
>>   tegra: video: Don't power up the SOR twice
>>   tegra: Enable CP15 init
>>   tegra: clock: Avoid a divide-by-zero error
>>   README: Add instructions for chain-loading U-Boot
>>
>>  arch/arm/cpu/arm720t/start.S |   6 +-
>>  arch/arm/dts/tegra124-nyan-big-u-boot.dtsi   |   9 ++
>>  arch/arm/include/asm/arch-tegra/clock.h  |   3 +
>>  arch/arm/lib/cache-cp15.c|  13 +-
>>  arch/arm/mach-tegra/board2.c |   3 +
>>  arch/arm/mach-tegra/clock.c  |  10 +-
>>  arch/arm/mach-tegra/tegra124/clock.c |  18 +++
>>  configs/nyan-big_defconfig   |   2 +
>>  doc/README.chromium  | 222
>> +++
>>  doc/chromium/devkeys/kernel.keyblock | Bin 0 -> 1208 bytes
>>  doc/chromium/devkeys/kernel_data_key.vbprivk | Bin 0 -> 1199 bytes
>>  drivers/spi/tegra114_spi.c   |   1 +
>>  drivers/video/tegra124/sor.c |   9 ++
>>  include/configs/tegra-common-post.h  |   2 +-
>>  14 files changed, 292 insertions(+), 6 deletions(-)
>>  create mode 100644 doc/README.chromium
>>  create mode 100644 doc/chromium/devkeys/kernel.keyblock
>>  create mode 100644 doc/chromium/devkeys/kernel_data_key.vbprivk
>>
>> Thank You for this Simon!  Very much appreciated!  I am going to give
> this a try later tonight and report back my personal results...
>
>> --
>> 2.13.0.303.g4ebf302169-goog
>>
>>
> Simon could you please link the u-boot tree this was committed to?  I
checked master and didn't see the  doc/README.chromium
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Re: [U-Boot] [PATCH 00/12] tegra: nyan-big: Support chainloading and add documentation

[Matthew Gorski]

On Mon, May 22, 2017 at 7:17 AM, Simon Glass  wrote:

> Every now and then someone wants to chain-load U-Boot on a Chromebook.
> The procedure is not very complicated but there are some oddities.
>
> This series updates a few things with allow U-Boot to start on nyan-big
> in this way and adds documentation on how to do it. This provides a
> central place where the procedure on different devices can be documented.
>
>
> Simon Glass (12):
>   arm: arm720t: Support CONFIG_SKIP_LOWLEVEL_INIT_ONLY
>   tegra: Init clocks even when SPL did not run
>   tegra: dts: Add cros-ec SPI settings
>   arm: Rename HCTR to HTCR
>   arm: Don't try to support CONFIG_ARMV7_LPAE on ARMv4T
>   arm: Disable LPAE if not enabled
>   tegra: spi: Wait a little after setting the clocks
>   tegra: nyan-big: Enable the dhrystone benchmark
>   tegra: video: Don't power up the SOR twice
>   tegra: Enable CP15 init
>   tegra: clock: Avoid a divide-by-zero error
>   README: Add instructions for chain-loading U-Boot
>
>  arch/arm/cpu/arm720t/start.S |   6 +-
>  arch/arm/dts/tegra124-nyan-big-u-boot.dtsi   |   9 ++
>  arch/arm/include/asm/arch-tegra/clock.h  |   3 +
>  arch/arm/lib/cache-cp15.c|  13 +-
>  arch/arm/mach-tegra/board2.c |   3 +
>  arch/arm/mach-tegra/clock.c  |  10 +-
>  arch/arm/mach-tegra/tegra124/clock.c |  18 +++
>  configs/nyan-big_defconfig   |   2 +
>  doc/README.chromium  | 222
> +++
>  doc/chromium/devkeys/kernel.keyblock | Bin 0 -> 1208 bytes
>  doc/chromium/devkeys/kernel_data_key.vbprivk | Bin 0 -> 1199 bytes
>  drivers/spi/tegra114_spi.c   |   1 +
>  drivers/video/tegra124/sor.c |   9 ++
>  include/configs/tegra-common-post.h  |   2 +-
>  14 files changed, 292 insertions(+), 6 deletions(-)
>  create mode 100644 doc/README.chromium
>  create mode 100644 doc/chromium/devkeys/kernel.keyblock
>  create mode 100644 doc/chromium/devkeys/kernel_data_key.vbprivk
>
> Thank You for this Simon!  Very much appreciated!  I am going to give this
a try later tonight and report back my personal results...

> --
> 2.13.0.303.g4ebf302169-goog
>
>
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[U-Boot] binman: 'module' object has no attribute 'FinaliseOutputDir'

[Kevin Hilman]

While trying to build v2017.05 for sun5i-r8-chip (CHIP_defconfig), I get
the following build error.  I'm not familiar with binman, so not sure
what I should be looking for.

$ CROSS_COMPILE=arm-linux-gnueabihf- make

[...]

 LD  spl/drivers/serial/built-in.o
 LD  spl/drivers/built-in.o
 LD  spl/common/built-in.o
 LD  spl/lib/built-in.o
 LD  spl/u-boot-spl
 OBJCOPY spl/u-boot-spl-nodtb.bin
 COPYspl/u-boot-spl.bin
 MKSUNXI spl/sunxi-spl.bin
 BINMAN  u-boot-sunxi-with-spl.bin
 binman: 'module' object has no attribute 'FinaliseOutputDir'
 Makefile:1107: recipe for target 'u-boot-sunxi-with-spl.bin' failed
 make: *** [u-boot-sunxi-with-spl.bin] Error 1


If it matters, compiler is: gcc version 5.3.1 20160412 (Linaro GCC 5.3-2016.05)

Kevin
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Re: [U-Boot] [PATCH v4 51/72] dm: clk: Update uclass to support livetree

[Simon Glass]

On 30 May 2017 at 21:47, Simon Glass  wrote:
> Update the clk uclass to support a live device tree.
>
> Signed-off-by: Simon Glass 
> ---
>
> Changes in v4:
> - Update zynq clock driver to use the correct error number
>
> Changes in v3: None
> Changes in v2: None
>
>  drivers/clk/clk-uclass.c | 17 +++--
>  drivers/clk/clk_zynq.c   |  2 +-
>  2 files changed, 8 insertions(+), 11 deletions(-)

Applied to u-boot-dm in place of the earlier patch.
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Re: [U-Boot] [PATCH v4 31/72] dm: gpio: Add live tree support

[Simon Glass]

On 30 May 2017 at 21:47, Simon Glass  wrote:
> Add support for requesting GPIOs with a live device tree.
>
> This involves adjusting the function signature for the legacy function
> gpio_request_by_name_nodev(), so fix up all callers.
>
> Signed-off-by: Simon Glass 
> Fixes to stm32f746-disco.c:
> Signed-off-by: Tom Rini 
> ---
>
> Changes in v4:
> - Update stm32f746-disco.c to support live tree
>
> Changes in v3: None
> Changes in v2: None
>
>  board/qualcomm/dragonboard410c/dragonboard410c.c | 12 +++---
>  board/samsung/common/board.c |  4 +-
>  board/samsung/common/exynos5-dt.c|  2 +-
>  board/st/stm32f746-disco/stm32f746-disco.c   |  6 +--
>  drivers/gpio/gpio-uclass.c   | 51 
> +++-
>  drivers/i2c/mxc_i2c.c| 12 +++---
>  drivers/mmc/fsl_esdhc.c  |  6 +--
>  drivers/mmc/s5p_sdhci.c  |  8 ++--
>  drivers/mtd/nand/sunxi_nand.c|  2 +-
>  drivers/mtd/nand/tegra_nand.c|  4 +-
>  drivers/net/pic32_eth.c  |  3 +-
>  drivers/sound/max98095.c |  2 +
>  drivers/sound/wm8994.c   |  2 +-
>  drivers/spi/pic32_spi.c  |  2 +-
>  drivers/usb/host/ehci-tegra.c|  7 ++--
>  drivers/usb/host/ehci-vf.c   |  5 ++-
>  include/asm-generic/gpio.h   | 10 ++---
>  17 files changed, 68 insertions(+), 70 deletions(-)

Applied to u-boot-dm in place of the earlier patch.
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[U-Boot] Please pull u-boot-dm (take 3)

[Simon Glass]

Hi Tom,

Here it is again with the reported problems (zynq_zc702, stm disco) fixed.


The following changes since commit ccbbada0a59fead35495409d0c2c7bcb22a40278:

  Merge branch 'master' of git://git.denx.de/u-boot-mmc (2017-05-30
14:07:23 -0400)

are available in the git repository at:

  git://git.denx.de/u-boot-dm.git

for you to fetch changes up to 8566c475d5e7522a9b77b7e7027f59d92109c99f:

  sandbox: Move to use live tree (2017-05-31 09:27:05 -0600)


Simon Glass (89):
  dm: Use dm.h header when driver mode is used
  dm: core: Move dev_get_addr() etc. into a separate file
  dm: Rename dev_addr..() functions
  atmel: Fix up use of dm_scan_fdt_node()
  dm: Fix up inclusion of common.h
  dm: core: Dont export dm_scan_fdt_node()
  dm: core: Replace of_offset with accessor (part 2)
  dm: core: Add ofnode to represent device tree nodes
  dm: core: Adjust device_bind_common() to take an ofnode
  dm: mmc: Don't call board_mmc_power_init() with driver model
  dm: mmc: Don't re-init when accessing environment
  dm: blk: Allow finding block devices without probing
  dm: blk: Add a function to find the next block device number
  dm: blk: Improve block device claiming
  dm: mmc: Check that drivers have operations
  dm: mmc: Rewrite mmc_blk_probe()
  tegra: Convert MMC to use driver model for operations
  dm: core: Set return value first in lists_bind_fdt()
  Update WARN_ON() to return a value
  dm: core: Add livetree definitions
  dm: core: Add livetree access functions
  dm: Add a function to create a 'live' device tree
  dm: Build a live tree after relocation
  dm: core: Rename of_device_is_compatible()
  dm: core: Add operations on device tree references
  dm: core: Add livetree address functions
  fdt: Update fdt_get_base_address() to use const
  dm: core: Add address operations on device tree references
  dm: core: Add a place to put extra device-tree reading functions
  dm: core: Add device-based 'read' functions to access DT
  dm: core: Implement live tree 'read' functions
  dm: core: Allow binding a device from a live tree
  dm: core: Update lists_bind_fdt() to use ofnode
  dm: core: Update device_bind_driver_to_node() to use ofnode
  dm: core: Scan the live tree when setting up driver model
  dm: core: Add a way to find a device by ofnode
  dm: regmap: Add support for livetree
  dm: simple-bus: Add support for livetree
  dm: core: Update uclass_find_device_by_phandle() for livetree
  sandbox: Add a way to reset sandbox state for tests
  dm: test: Move test running code into a separate function
  dm: test: Show the test filename when running
  dm: test: Add support for running tests with livetree
  dm: core: Run tests with both livetree and flat tree
  dm: gpio: Refactor to prepare for live tree support
  dm: gpio: Drop blank line in gpio_xlate_offs_flags() comment
  dm: gpio: sandbox: Use dev_read...() functions to access DT
  dm: gpio: Add live tree support
  cros_ec: Fix debug() statement in ec_command_inptr()
  cros_ec: Convert to support live tree
  sandbox: Add a new sandbox_flattree board
  test: Update 'make test' to run more tests
  fdt: Rename a few functions in fdt_support
  dm: Add more livetree helpers and definitions
  string: Add strchrnul()
  string: Add strcspn()
  dm: i2c: Convert uclass to livetree
  samsung: Move pmic header out of config file
  dm: pmic: Convert uclass to livetree
  sandbox: pmic: Convert pmic emulator to support livetree
  dm: regulator: Convert regulator uclass to support livetree
  dm: regulator: Update fixed regulator to support livetree.
  dm: mmc: Convert uclass to livetree
  dm: adc: Convert uclass to livetree
  dm: usb: Convert uclass to livetree
  sandbox: usb: Convert emulators to livetree
  clk: Modify xlate() method for livetree
  dm: clk: Update uclass to support livetree
  dm: clk: fixed: Update to support livetree
  dm: test: Separate out the bus DT offset test
  dm: test: Disable the fdt_offset test with livetree
  dm: phy: Update tests to use ut_asserteq()
  dm: mailbox: Update uclass to support livetree
  dm: phy: Update uclass to support livetree
  sandbox: phy: Update driver for livetree
  dm: power-domain: Update uclass to support livetree
  dm: reset: Update uclass to support livetree
  dm: pci: Update uclass to support livetree
  dm: Update the I2C eeprom driver for livetree
  cros_ec: Update the cros_ec keyboard driver to livetree
  dm: spi: Convert uclass to livetree
  dm: sandbox: i2c: Drop fdtdec.h header
  dm: sandbox: i2c_rtc: Drop fdtdec.h header
  dm: spi-flash: Convert uclass to livetree
  dm: sandbox: spi: Convert driver to support 

[U-Boot] [PATCH] arm: omap: Unify get_device_type() function

[Sam Protsenko]

Refactor OMAP3/4/5 code so that we have only one get_device_type()
function for all platforms.

Details:
 - Add ctrl variable for AM33xx and OMAP3 platforms (like it's done for
   OMAP4/5), so we can obtain status register in common way
 - For now ctrl structure for AM33xx/OMAP3 contains only status register
   address
 - Run hw_data_init() in order to assign ctrl to proper structure
 - Extract some definitions to omap_am_common.h, because including
   omap_common.h in am33xx board files breaks compilation

Buildman script was run for all OMAP boards. Result output:
arm: (for 38/616 boards)
all +348.9
bss -6.2
data +3.5
rodata +300.0
spl/u-boot-spl:all +281.4
spl/u-boot-spl:data +2.2
spl/u-boot-spl:rodata +252.0
spl/u-boot-spl:text +27.2
text +51.7
(no errors to report)

Tested on AM57x EVM.

Signed-off-by: Sam Protsenko 
---
 arch/arm/include/asm/arch-am33xx/cpu.h  |  6 --
 arch/arm/include/asm/arch-am33xx/omap.h |  3 +++
 arch/arm/include/asm/arch-omap3/omap.h  |  3 +++
 arch/arm/include/asm/omap_am_common.h   | 21 +
 arch/arm/include/asm/omap_common.h  | 16 +++-
 arch/arm/mach-omap2/Makefile|  1 +
 arch/arm/mach-omap2/am33xx/Makefile |  2 ++
 arch/arm/mach-omap2/am33xx/board.c  |  3 +++
 arch/arm/mach-omap2/am33xx/hw_data.c| 19 +++
 arch/arm/mach-omap2/am33xx/prcm-regs.c  | 15 +++
 arch/arm/mach-omap2/am33xx/sys_info.c   | 10 --
 arch/arm/mach-omap2/hwinit-common.c |  9 -
 arch/arm/mach-omap2/omap3/Makefile  |  2 ++
 arch/arm/mach-omap2/omap3/board.c   | 12 
 arch/arm/mach-omap2/omap3/hw_data.c | 19 +++
 arch/arm/mach-omap2/omap3/prcm-regs.c   | 15 +++
 arch/arm/mach-omap2/omap3/sys_info.c|  9 +
 arch/arm/mach-omap2/sysinfo-common.c| 21 +
 board/ti/am335x/board.c |  1 +
 19 files changed, 141 insertions(+), 46 deletions(-)
 create mode 100644 arch/arm/include/asm/omap_am_common.h
 create mode 100644 arch/arm/mach-omap2/am33xx/hw_data.c
 create mode 100644 arch/arm/mach-omap2/am33xx/prcm-regs.c
 create mode 100644 arch/arm/mach-omap2/omap3/hw_data.c
 create mode 100644 arch/arm/mach-omap2/omap3/prcm-regs.c
 create mode 100644 arch/arm/mach-omap2/sysinfo-common.c

diff --git a/arch/arm/include/asm/arch-am33xx/cpu.h 
b/arch/arm/include/asm/arch-am33xx/cpu.h
index 8cae291ea0..e8d7d549e8 100644
--- a/arch/arm/include/asm/arch-am33xx/cpu.h
+++ b/arch/arm/include/asm/arch-am33xx/cpu.h
@@ -36,12 +36,6 @@
 #define TCFG_RESET BIT(0)  /* software reset */
 #define TCFG_EMUFREE   BIT(1)  /* behaviour of tmr on debug */
 #define TCFG_IDLEMOD_SHIFT (2) /* power management */
-/* device type */
-#define DEVICE_MASK(BIT(8) | BIT(9) | BIT(10))
-#define TST_DEVICE 0x0
-#define EMU_DEVICE 0x1
-#define HS_DEVICE  0x2
-#define GP_DEVICE  0x3
 
 /* cpu-id for AM43XX AM33XX and TI81XX family */
 #define AM437X 0xB98C
diff --git a/arch/arm/include/asm/arch-am33xx/omap.h 
b/arch/arm/include/asm/arch-am33xx/omap.h
index 3293caaca4..5a1b95c2c0 100644
--- a/arch/arm/include/asm/arch-am33xx/omap.h
+++ b/arch/arm/include/asm/arch-am33xx/omap.h
@@ -41,6 +41,9 @@ struct omap_boot_parameters {
unsigned char boot_device;
unsigned char reset_reason;
 };
+
+#define DEVICE_TYPE_SHIFT  0x8
+#define DEVICE_TYPE_MASK   (0x7 << DEVICE_TYPE_SHIFT)
 #endif
 
 #endif
diff --git a/arch/arm/include/asm/arch-omap3/omap.h 
b/arch/arm/include/asm/arch-omap3/omap.h
index db763e49a3..8933f5489f 100644
--- a/arch/arm/include/asm/arch-omap3/omap.h
+++ b/arch/arm/include/asm/arch-omap3/omap.h
@@ -91,6 +91,9 @@ struct s32ktimer {
unsigned int s32k_cr;   /* 0x10 */
 };
 
+#define DEVICE_TYPE_SHIFT  0x8
+#define DEVICE_TYPE_MASK   (0x7 << DEVICE_TYPE_SHIFT)
+
 #endif /* __ASSEMBLY__ */
 
 #ifndef __ASSEMBLY__
diff --git a/arch/arm/include/asm/omap_am_common.h 
b/arch/arm/include/asm/omap_am_common.h
new file mode 100644
index 00..70aa15b22c
--- /dev/null
+++ b/arch/arm/include/asm/omap_am_common.h
@@ -0,0 +1,21 @@
+/*
+ * Common definitions for OMAP/AM based boards.
+ *
+ * (C) Copyright 2017 Linaro Ltd.
+ * Sam Protsenko 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef _OMAP_AM_COMMON_H_
+#define _OMAP_AM_COMMON_H_
+
+/* Silicon device type */
+#define TST_DEVICE 0x0
+#define EMU_DEVICE 0x1
+#define HS_DEVICE  0x2
+#define GP_DEVICE  0x3
+
+void hw_data_init(void);
+
+#endif /* _OMAP_AM_COMMON_H_ */
diff --git a/arch/arm/include/asm/omap_common.h 
b/arch/arm/include/asm/omap_common.h
index 

[U-Boot] [PATCH 3/6] rockchip: defconfig: puma-rk3399: enable CONFIG_PHY_MICREL_KSZ9031

[Philipp Tomsich]

The RK3399-Q7 has a KSZ9031 GbE PHY. Enable support for it in defconfig.

Signed-off-by: Philipp Tomsich 
---

Changes in v2: None

 configs/puma-rk3399_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/configs/puma-rk3399_defconfig b/configs/puma-rk3399_defconfig
index e0f1821..994aeac 100644
--- a/configs/puma-rk3399_defconfig
+++ b/configs/puma-rk3399_defconfig
@@ -52,6 +52,7 @@ CONFIG_MMC_SDHCI_ROCKCHIP=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ9031=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
-- 
1.9.1

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[U-Boot] [PATCH 4/6] rockchip: defconfig: puma-rk3399: enable I2C

[Philipp Tomsich]

The RK3399-Q7 exposes I2C on its edge connector and uses it as one of
the interfaces towards the on-module STM32 (for the emulated RTC and
fan-controller).

Enable I2C and CMD_I2C support in the defconfig.

Signed-off-by: Philipp Tomsich 
---

Changes in v2: None

 configs/puma-rk3399_defconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/configs/puma-rk3399_defconfig b/configs/puma-rk3399_defconfig
index 994aeac..413d0ac 100644
--- a/configs/puma-rk3399_defconfig
+++ b/configs/puma-rk3399_defconfig
@@ -26,6 +26,7 @@ CONFIG_CMD_GPT=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
 CONFIG_CMD_SPI=y
+CONFIG_CMD_I2C=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_SETEXPR is not set
@@ -43,6 +44,7 @@ CONFIG_SPL_SYSCON=y
 CONFIG_CLK=y
 CONFIG_SPL_CLK=y
 CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_MISC=y
 CONFIG_ROCKCHIP_EFUSE=y
 CONFIG_MMC_DW=y
-- 
1.9.1

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[U-Boot] [PATCH 6/6] rockchip: defconfig: puma-rk3399: CONFIG_SPL_FIT no longer exists

[Philipp Tomsich]

With the merging of Andre's SPL_FIT support, the CONFIG_SPL_FIT option
is no longer required for the RK3399-Q7.  Remove it from the defconfig.

Signed-off-by: Philipp Tomsich 
---

Changes in v2: None

 configs/puma-rk3399_defconfig | 1 -
 1 file changed, 1 deletion(-)

diff --git a/configs/puma-rk3399_defconfig b/configs/puma-rk3399_defconfig
index ab49f27..8816886 100644
--- a/configs/puma-rk3399_defconfig
+++ b/configs/puma-rk3399_defconfig
@@ -10,7 +10,6 @@ CONFIG_SPL_SPI_SUPPORT=y
 CONFIG_SPL_STACK_R_ADDR=0x8
 CONFIG_DEFAULT_DEVICE_TREE="rk3399-puma"
 CONFIG_FIT=y
-CONFIG_SPL_FIT=y
 CONFIG_SPL_LOAD_FIT=y
 CONFIG_SPL_FIT_SOURCE="board/theobroma-systems/puma_rk3399/fit_spl_atf.its"
 # CONFIG_DISPLAY_CPUINFO is not set
-- 
1.9.1

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