On Sel, 2017-08-29 at 13:51 +0200, Marek Vasut wrote:
> On 08/29/2017 12:45 PM, tien.fong.c...@intel.com wrote:
> >
> > From: Tien Fong Chee
> >
> > This config allow FPGA design loaded from FAT fs to FPGA manager.
> >
> > Signed-off-by: Tien Fong Chee
On 2017/8/30 13:41, Bin Meng wrote:
On Wed, Aug 30, 2017 at 1:27 PM, Yang, Wenyou wrote:
On 2017/8/30 11:43, Bin Meng wrote:
On Wed, Aug 30, 2017 at 11:25 AM, Yang, Wenyou
wrote:
On 2017/8/26 14:34, Jagan Teki wrote:
Hi,
Thanks for
On Wed, Aug 30, 2017 at 1:27 PM, Yang, Wenyou wrote:
>
>
> On 2017/8/30 11:43, Bin Meng wrote:
>>
>> On Wed, Aug 30, 2017 at 11:25 AM, Yang, Wenyou
>> wrote:
>>>
>>>
>>> On 2017/8/26 14:34, Jagan Teki wrote:
Hi,
Thanks for
On Wednesday 30 August 2017 08:07 AM, Adam Ford wrote:
> On Tue, Aug 29, 2017 at 8:05 AM, Adam Ford wrote:
>> On Tue, Aug 29, 2017 at 6:41 AM, Sekhar Nori wrote:
>>> On Tuesday 29 August 2017 03:29 PM, Adam Ford wrote:
On Tue, Aug 29, 2017 at 4:13 AM,
On 2017/8/30 11:43, Bin Meng wrote:
On Wed, Aug 30, 2017 at 11:25 AM, Yang, Wenyou
wrote:
On 2017/8/26 14:34, Jagan Teki wrote:
Hi,
Thanks for the changes.
On Tue, Jul 25, 2017 at 12:30 PM, Wenyou Yang
wrote:
This series of patches
From: Tien Fong Chee
Report Coverity log:
The code uses a variable that has not
been initialized, leading to unpredictable
or unintended results.
Reported-by: Coverity (CID: 60519)
Signed-off-by: Tien Fong Chee
---
lib/libfdt/fdt_wip.c |
On Kha, 2017-08-24 at 21:04 -0400, Tom Rini wrote:
> On Thu, Aug 24, 2017 at 01:53:57PM +0800, tien.fong.c...@intel.com
> wrote:
>
> >
> > From: Tien Fong Chee
> >
> > Report Coverity log:
> > The code uses a variable that has not
> > been initialized, leading to
On 08/30/2017 03:54 AM, Bin Meng wrote:
> Hi Heinrich,
>
> On Wed, Aug 30, 2017 at 4:26 AM, Heinrich Schuchardt
> wrote:
>> Hello Simon,
>>
>> U-Boot HEAD qemu-86_defconfig cannot discover an IDE disk with one FAT
>> partition in qemu-system-x86_64.
>>
>> By bisection I
On Wed, Aug 30, 2017 at 11:25 AM, Yang, Wenyou
wrote:
>
>
> On 2017/8/26 14:34, Jagan Teki wrote:
>>
>> Hi,
>>
>> Thanks for the changes.
>>
>> On Tue, Jul 25, 2017 at 12:30 PM, Wenyou Yang
>> wrote:
>>>
>>> This series of patches are based
On 2017/8/26 14:34, Jagan Teki wrote:
Hi,
Thanks for the changes.
On Tue, Jul 25, 2017 at 12:30 PM, Wenyou Yang wrote:
This series of patches are based and have been tested on the 'master'
branch of the u-boot.git tree.
Tests were passed with a sama5d2 xplained
On Tue, Aug 29, 2017 at 8:05 AM, Adam Ford wrote:
> On Tue, Aug 29, 2017 at 6:41 AM, Sekhar Nori wrote:
>> On Tuesday 29 August 2017 03:29 PM, Adam Ford wrote:
>>> On Tue, Aug 29, 2017 at 4:13 AM, Sekhar Nori wrote:
Hi Adam,
On
Hi Jagan,
On 2017/8/26 14:34, Jagan Teki wrote:
Hi,
Thanks for the changes.
On Tue, Jul 25, 2017 at 12:30 PM, Wenyou Yang wrote:
This series of patches are based and have been tested on the 'master'
branch of the u-boot.git tree.
Tests were passed with a sama5d2
Hi Heinrich,
On Wed, Aug 30, 2017 at 4:26 AM, Heinrich Schuchardt wrote:
> Hello Simon,
>
> U-Boot HEAD qemu-86_defconfig cannot discover an IDE disk with one FAT
> partition in qemu-system-x86_64.
>
> By bisection I found this patch.
>
>
On Wed, Aug 30, 2017 at 6:07 AM, Thomas Petazzoni
wrote:
> Hello,
>
> On Tue, 29 Aug 2017 17:18:24 -0400, Tom Rini wrote:
>
>> So there's something extra funny going on in the linking. See
>> https://patchwork.ozlabs.org/patch/806263/ which I have included,
From: Philipp Rossak
The sun8i emac hardware is present on the Nanopi M1.
It uses an external PHY.
Signed-off-by: Philipp Rossak
---
arch/arm/dts/sun8i-h3-nanopi-m1-plus.dts | 30 ++
1 file changed, 30 insertions(+)
diff --git
From: Philipp Rossak
The sun8i emac hardware is present on the Nanopi M1.
It uses the internal PHY.
Signed-off-by: Philipp Rossak
---
configs/nanopi_m1_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/nanopi_m1_defconfig
From: Philipp Rossak
The sun8i emac hardware is present on the Nanopi M1.
It uses an external PHY. Pin PD6 is used to enable
the external PHY.
Signed-off-by: Philipp Rossak
---
configs/nanopi_m1_plus_defconfig | 2 ++
1 file changed, 2 insertions(+)
diff
From: Philipp Rossak
The sun8i emac hardware is present on the Nanopi M1.
It uses the internal PHY.
Signed-off-by: Philipp Rossak
---
arch/arm/dts/sun8i-h3-nanopi-m1.dts | 11 +++
1 file changed, 11 insertions(+)
diff --git
From: Philipp Rossak
This Patchseries enables the ethernet for the Friendlyarm Nanopi M1 and
the Friendlyarm Nanopi M1 Plus.
Philipp Rossak (4):
sunxi: defconfig: enable sun8i emac on nanopi m1
sunxi: defconfig: enable sun8i emac on nanopi m1 plus
sunxi: dts: added
Hi Tom,
Here is a bit volume pull request, but changes
are SoC-specific except the ofnode patch and denali_dt.
The latter is reviewed by Simon.
- add {ofnode,dev}_read_resource_byname
- provide DT probe hook to Denali NAND driver
- update clk/reset driver
- update DT
- misc cleanups
The
2017-08-29 15:41 GMT+09:00 Masahiro Yamada :
> This imply was added when the option was moved by the moveconfig tool,
> but the intention is not clear. Move it to defconfig.
>
> Signed-off-by: Masahiro Yamada
> ---
Applied to
2017-08-30 1:04 GMT+09:00 Masahiro Yamada :
> Now the entry to the NAND driver init can be is controlled by DT;
> it should not hurt to compile the driver all the time.
>
> Signed-off-by: Masahiro Yamada
> ---
Applied to
2017-08-29 15:42 GMT+09:00 Masahiro Yamada :
> The system bus is not enabled by default for NAND, eMMC boot
> etc. of PXs3.
>
> Signed-off-by: Masahiro Yamada
Series, applied to u-boot-uniphier.
--
Best Regards
Masahiro Yamada
2017-08-29 12:20 GMT+09:00 Masahiro Yamada :
> LD20 has SD ctrl instead of MIO ctrl. LD11 has both of them.
>
> Signed-off-by: Masahiro Yamada
> ---
Series, applied to u-boot-uniphier.
--
Best Regards
Masahiro Yamada
2017-08-26 1:12 GMT+09:00 Masahiro Yamada :
> 1/2 is required for 2/2.
> Denali NAND controller has two reg regions named "nand_data" and "denali_reg"
> as described by Documentation/devicetree/bindings/mtd/denali-nand.txt
>
>
>
> Masahiro Yamada (2):
> ofnode: add
2017-08-26 17:57 GMT+09:00 Masahiro Yamada :
>
> 1-3: update PLL init code
> 4-6: clean up NAND adhoc code (the last two are only applicable
> after the Denali DT driver is applied.)
> http://patchwork.ozlabs.org/patch/805959/
>
Series, applied.
--
Hello,
On Tue, 29 Aug 2017 17:18:24 -0400, Tom Rini wrote:
> So there's something extra funny going on in the linking. See
> https://patchwork.ozlabs.org/patch/806263/ which I have included, but
> haven't been able to push out.
At this point, I don't think it's the correct fix. I don't see why
On 08/29/2017 10:38 PM, Alexander Graf wrote:
>
>
>> Am 29.08.2017 um 22:16 schrieb Simon Glass :
>>
>> Hi,
>>
>>> On 29 August 2017 at 22:16, Rob Clark wrote:
On Tue, Aug 29, 2017 at 8:57 AM, Leif Lindholm
wrote:
Add support for reading a list of bouncing addresses from a in-tree file
(doc/bounces) and from the ~/.patman config file. These addresses are
stripped from the Cc list.
Signed-off-by: Chris Packham
---
This version supports an in-tree doc/bounces file as well as a
On Tue, Aug 29, 2017 at 4:50 PM, Thomas Petazzoni
wrote:
> Hello,
>
> On Wed, 30 Aug 2017 04:16:39 +0800, Simon Glass wrote:
>
>> A bisect shows this came in with:
>>
>> f40ad66f (refs/bisect/bad) arch/sh: don't bring common/env_embedded.o
>> into the link
>>
Hello,
On Wed, 30 Aug 2017 04:16:39 +0800, Simon Glass wrote:
> A bisect shows this came in with:
>
> f40ad66f (refs/bisect/bad) arch/sh: don't bring common/env_embedded.o
> into the link
>
> Thomas, could you please take a look?
env/embedded.o is missing in the link. It is added to extra-y
> Am 29.08.2017 um 22:16 schrieb Simon Glass :
>
> Hi,
>
>> On 29 August 2017 at 22:16, Rob Clark wrote:
>>> On Tue, Aug 29, 2017 at 8:57 AM, Leif Lindholm
>>> wrote:
>>> On Tue, Aug 29, 2017 at 02:26:48PM +0200, Alexander
Simon,
I should be able to give this a test drive on the RK3368 by the end of the week.
For the RK3399 our board uses full OF_CONTROL, so I won’t really exercise
this there.
Given that the RK3399 can always fall back to OF_CONTROL for SPL (as is the
default on Puma) and this only blocks the
Hello Simon,
U-Boot HEAD qemu-86_defconfig cannot discover an IDE disk with one FAT
partition in qemu-system-x86_64.
By bisection I found this patch.
b7c6baef2891ce8978cbfddb66e944943473ac21
x86: Convert MMC to driver model
With this patch I get
IDE: Bus 0: OK Bus 1: OK
Device 0: Model:
> On 29 Aug 2017, at 22:15, Simon Glass wrote:
>
> When using 32-bit addresses dtoc works correctly. For 64-bit addresses it
> does not since it ignores the #address-cells and #size-cells properties.
>
> Update the tool to use fdt64_t as the element type for reg properties
Hi,
On 29 August 2017 at 22:16, Rob Clark wrote:
> On Tue, Aug 29, 2017 at 8:57 AM, Leif Lindholm
> wrote:
>> On Tue, Aug 29, 2017 at 02:26:48PM +0200, Alexander Graf wrote:
>>> > > > I would add command
>>> > > > bootefi selftest.efi
>>> > > > to
+Thomas
Hi Joe,
On 29 August 2017 at 06:59, Joe Hershberger wrote:
> Hi Simon / Tom,
>
> It seems the SH4 build is failing with the current trunk. Or at least
> my test build is failing and the change seems to have nothing to do
> with the failure.
>
>
Update this function to return more detail about a property that contains
phandles. This will allow (in a future commit) more accurate handling of
these properties.
Signed-off-by: Simon Glass
---
Changes in v2: None
tools/dtoc/dtb_platdata.py | 79
Hello,
On Wed, 30 Aug 2017 04:16:39 +0800, Simon Glass wrote:
> Hi Joe,
>
> On 29 August 2017 at 06:59, Joe Hershberger wrote:
> > Hi Simon / Tom,
> >
> > It seems the SH4 build is failing with the current trunk. Or at least
> > my test build is failing and the change
Now that the Fdt class can map phandles to the associated nodes, use that
instead of a separate implementation.
Signed-off-by: Simon Glass
---
Changes in v2: None
tools/dtoc/dtb_platdata.py | 16 +++-
1 file changed, 3 insertions(+), 13 deletions(-)
diff --git
Rather than naming the phandle struct according to the number of cells it
uses (e.g. struct phandle_2_cell) name it according to the number of
arguments it has (e.g. struct phandle_1_arg). This is a more intuitive
naming.
Signed-off-by: Simon Glass
---
Changes in v2: None
Add a map from phandles to nodes. This can be used by clients of the the
class instead of maintaining this themselves.
Signed-off-by: Simon Glass
---
Changes in v2: None
tools/dtoc/fdt.py | 5 +
1 file changed, 5 insertions(+)
diff --git a/tools/dtoc/fdt.py
This function will need to have access to class members once we enhance it
to support multiple phandle values. In preparation for that, move it into
the class.
Signed-off-by: Simon Glass
---
Changes in v2: None
tools/dtoc/dtb_platdata.py | 36
Hi Joe,
On 30 August 2017 at 04:02, Joe Hershberger wrote:
> Hi Simon,
>
> On Tue, Aug 29, 2017 at 2:53 PM, Simon Glass wrote:
>> This was broken by the recent environment refactoring. Specifically:
>>
>> $ make environ
>> scripts/Makefile.build:59:
Add a header that indicates that the files generated by dtoc should not be
modified.
Signed-off-by: Simon Glass
---
Changes in v2: None
tools/dtoc/dtb_platdata.py | 12
1 file changed, 12 insertions(+)
diff --git a/tools/dtoc/dtb_platdata.py
At present dtoc has a very simplistic view of phandles. It assumes that
a property has only a single phandle with a single argument (i.e. two
cells per property).
This is not true in many cases. Enhance the implementation to scan all
phandles in a property and to use the correct number of
On 08/29/2017 12:30 PM, Jagan Teki wrote:
> On Mon, Aug 28, 2017 at 10:17 PM, York Sun wrote:
>> On 08/26/2017 04:50 AM, Jagan Teki wrote:
>>> On Thu, Aug 3, 2017 at 1:02 AM, Tom Rini wrote:
On Wed, Aug 02, 2017 at 07:10:51PM +, York Sun wrote:
We want to support more than one phandle argument. It makes sense to use
an array for this rather than discrete struct members. Adjust the code to
support this. Rename the member to 'arg' instead of 'id'.
Signed-off-by: Simon Glass
---
Changes in v2: None
When writing values from properties which contain phandles, dtoc currently
writes 8 phandles per line. Change this to write one phandle per line.
This helps reduce line length, since phandles are generally longer and may
have arguments.
Signed-off-by: Simon Glass
---
Changes
When dealing with multi-cell values we need a type that can hold this
value. Add this and a function to process it from a list of cell values.
Signed-off-by: Simon Glass
Reviewed-by: Philipp Tomsich
Tested-by: Philipp Tomsich
The filename of the auto-generated file is the same as the file that
includes it. Even though the form is in the generated/ subdirectory, this
could be confused.
Rename the generated file to something that makes it clear it is
auto-generated.
Signed-off-by: Simon Glass
---
At present dtoc assumes that all 'reg' properties have both an address and
a size. For I2C devices we do not have this. Adjust dtoc to cope.
Reported-by: Philipp Tomsich
Signed-off-by: Simon Glass
---
Changes in v2: None
Large arrays can result in lines with hundreds or thousands of characters
which is not very editor-friendly. To avoid this, addjust the tool to
group values 8 per line.
Signed-off-by: Simon Glass
---
Changes in v2: None
tools/dtoc/dtb_platdata.py | 7 ++-
We need to be able to search back up the tree for #address-cells and
#size-cells. Record the parent of each node to make this easier.
Signed-off-by: Simon Glass
Reviewed-by: Philipp Tomsich
Tested-by: Philipp Tomsich
When using 32-bit addresses dtoc works correctly. For 64-bit addresses it
does not since it ignores the #address-cells and #size-cells properties.
Update the tool to use fdt64_t as the element type for reg properties when
either the address or size is larger than one cell. Use the correct value
Add upstream changes to U-Boot:
- new pylibfdt functions
- fdt_setprop_placeholder()
Signed-off-by: Simon Glass
---
Changes in v2: None
lib/libfdt/fdt_rw.c | 20 ---
lib/libfdt/libfdt.h | 31 +++
This series updates dtoc to support 64-bit addresses automatically. These
appear in C code as fdt64_t arrays:
struct dtd_test1 {
fdt64_t reg[2];
};
static struct dtd_test1 dtv_test1 = {
.reg= {0x1234, 0x5678},
};
C code can then process these address
Hi Simon,
On Tue, Aug 29, 2017 at 2:53 PM, Simon Glass wrote:
> This was broken by the recent environment refactoring. Specifically:
>
> $ make environ
> scripts/Makefile.build:59: tools/environ/Makefile: No such file or directory
> make[1]: *** No rule to make target
This was broken by the recent environment refactoring. Specifically:
$ make environ
scripts/Makefile.build:59: tools/environ/Makefile: No such file or directory
make[1]: *** No rule to make target 'tools/environ/Makefile'. Stop.
make: *** [Makefile:1469: environ] Error 2
Fix this by updating
On Mon, Aug 28, 2017 at 10:17 PM, York Sun wrote:
> On 08/26/2017 04:50 AM, Jagan Teki wrote:
>> On Thu, Aug 3, 2017 at 1:02 AM, Tom Rini wrote:
>>> On Wed, Aug 02, 2017 at 07:10:51PM +, York Sun wrote:
On 04/18/2017 04:57 AM, B, Ravi wrote:
>
On 8/29/2017 7:37 AM, Eric Nelson wrote:
> Hi Troy,
>
> On 08/28/2017 09:42 AM, Troy Kisky wrote:
>> On 8/27/2017 3:04 PM, Eric Nelson wrote:
>>> This adds support for USB boot mode on the i.MX7D SoC, which
>>> is most useful when doing U-Boot development on this chip.
>>>
>>> i.e., it enables
On Sun, Aug 20, 2017 at 9:40 PM, Tom Rini wrote:
> In rpc_t we declare data to be a uint8_t of size 2048, for a final size
> of 2048. We also however declare the reply part of the union to have a
> uint32_t data field of NFS_READ_SIZE (1024) for a final size of
> 4096+24=4120
On 08/29/2017 10:36 AM, Sumit Garg wrote:
>> -Original Message-
>> From: York Sun
>> Sent: Tuesday, August 29, 2017 9:25 PM
>> To: Sumit Garg ; u-boot@lists.denx.de
>> Cc: Prabhakar Kushwaha ; Ruchika Gupta
>>
>>
On Tue, Aug 29, 2017 at 6:55 PM, Suresh Gupta wrote:
> It is recommended to check either controller is free to take
> new spi action. The IP_ACC and AHB_ACC bits indicates that
> the controller is busy in IP or AHB mode respectively.
> And the BUSY bit indicates that
> -Original Message-
> From: York Sun
> Sent: Tuesday, August 29, 2017 9:25 PM
> To: Sumit Garg ; u-boot@lists.denx.de
> Cc: Prabhakar Kushwaha ; Ruchika Gupta
>
> Subject: Re: [u-boot-release] [PATCH 2/3] armv8:
+Roy Zang to comment on PCIe clock source
On 08/29/2017 10:06 AM, Joakim Tjernlund wrote:
> On Tue, 2017-08-29 at 15:43 +, York Sun wrote:
>> On 08/29/2017 06:21 AM, Joakim Tjernlund wrote:
>>> On Tue, 2017-08-29 at 12:47 +0200, Joakim Tjernlund wrote:
As we are looking at PCI stuff ATM
On Tue, Aug 29, 2017 at 9:42 PM, Yogesh Narayan Gaur
wrote:
>
>
>> -Original Message-
>> From: Jagan Teki [mailto:jagannadh.t...@gmail.com]
>> Sent: Friday, August 11, 2017 4:03 PM
>> To: Yogesh Narayan Gaur
>> Cc:
On Tue, Aug 29, 2017 at 10:16 PM, Stefano Babic wrote:
> Hi Stefan,
>
> On 29/08/2017 18:10, Stefan Agner wrote:
>> From: Stefan Agner
>>
>> The NXP i.MX 6UL and 6ULL do not support SATA and have no SATA
>> boot mode, hence remove it from the boot device
On 08/29/2017 04:16 PM, Rob Clark wrote:
> On Tue, Aug 29, 2017 at 8:57 AM, Leif Lindholm
> wrote:
>> On Tue, Aug 29, 2017 at 02:26:48PM +0200, Alexander Graf wrote:
>> I would add command
>> bootefi selftest.efi
>> to run the tests and provide the python
On Tue, 2017-08-29 at 15:43 +, York Sun wrote:
> On 08/29/2017 06:21 AM, Joakim Tjernlund wrote:
> > On Tue, 2017-08-29 at 12:47 +0200, Joakim Tjernlund wrote:
> > > As we are looking at PCI stuff ATM I would like to ask
> > > about PEX_GCLK_RATIO in E500 CPUs. I cannot find this is setup
> >
On Tue, Aug 29, 2017 at 11:44 AM, Heinrich Schuchardt
wrote:
> %s/Desriptor/Descriptor/g
>
> Signed-off-by: Heinrich Schuchardt
Acked-by: Joe Hershberger
___
U-Boot mailing list
The NXP 4.1 kernel needs to boot with secure boot.
Add information on how to enable secure boot mode.
Signed-off-by: Vanessa Maegima
---
board/technexion/pico-imx7d/README | 17 +
1 file changed, 17 insertions(+)
diff --git
%s/Desriptor/Descriptor/g
Signed-off-by: Heinrich Schuchardt
---
drivers/net/fsl_mcdmafec.c | 2 +-
drivers/net/mcffec.c | 2 +-
drivers/net/mvneta.c | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/net/fsl_mcdmafec.c
Hi Stefan,
On 29/08/2017 18:10, Stefan Agner wrote:
> From: Stefan Agner
>
> The NXP i.MX 6UL and 6ULL do not support SATA and have no SATA
> boot mode, hence remove it from the boot device detecion. This
> fixes a build error introduced with 3bd1642d4d50 ("imx: fix
%s/Desriptor/Descriptor/g
Fix lines over 80 characters with said typo.
Signed-off-by: Heinrich Schuchardt
---
disk/part_mac.c | 12 +---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/disk/part_mac.c b/disk/part_mac.c
index b6c082e7e1..d597dcf00a
On Tue, Aug 29, 2017 at 05:59:41PM +0200, Heinrich Schuchardt wrote:
> On 08/29/2017 02:57 PM, Leif Lindholm wrote:
> > UEFI SCT is not yet open source/free software. Obviously, this is
> > something Linaro has been lobbying for since day one of our
> > involvement. There used to be little
On 08/29/2017 06:21 AM, Joakim Tjernlund wrote:
> On Tue, 2017-08-29 at 12:47 +0200, Joakim Tjernlund wrote:
>> As we are looking at PCI stuff ATM I would like to ask
>> about PEX_GCLK_RATIO in E500 CPUs. I cannot find this is setup
>> at all for E500 but I THINK this is required.
>>
>> In 83xx
On 08/29/2017 02:57 PM, Leif Lindholm wrote:
> On Tue, Aug 29, 2017 at 02:26:48PM +0200, Alexander Graf wrote:
> I would add command
> bootefi selftest.efi
> to run the tests and provide the python wrapper code to add it to the
> test suite.
I think that's a great idea,
On 08/29/2017 06:06 PM, Leif Lindholm wrote:
On Tue, Aug 29, 2017 at 05:59:41PM +0200, Heinrich Schuchardt wrote:
On 08/29/2017 02:57 PM, Leif Lindholm wrote:
UEFI SCT is not yet open source/free software. Obviously, this is
something Linaro has been lobbying for since day one of our
> -Original Message-
> From: Jagan Teki [mailto:jagannadh.t...@gmail.com]
> Sent: Friday, August 11, 2017 4:03 PM
> To: Yogesh Narayan Gaur
> Cc: u-boot@lists.denx.de; York Sun
> Subject: Re: [PATCH] mtd/spi: Add MT35XU512ABA1G12 NOR flash
Now the entry to the NAND driver init can be is controlled by DT;
it should not hurt to compile the driver all the time.
Signed-off-by: Masahiro Yamada
---
configs/uniphier_v8_defconfig | 5 +
1 file changed, 5 insertions(+)
diff --git
On 08/29/2017 12:02 AM, Sumit Garg wrote:
> Using changes in this patch we were able to reduce approx 8k
> size of u-boot-spl.bin image. Following is breif description of
> changes to reduce SPL size:
> 1. Changes in board/freescale/ls1088a/Makefile to remove
> compilation of eth.c and cpld.c
From: Stefan Agner
The NXP i.MX 6UL and 6ULL do not support SATA and have no SATA
boot mode, hence remove it from the boot device detecion. This
fixes a build error introduced with 3bd1642d4d50 ("imx: fix USB
boot mode detection for i.MX 6UL and 6ULL")
Fixes:
Hi Tom,
On Sun, Aug 20, 2017 at 9:40 PM, Tom Rini wrote:
> In rpc_t we declare data to be a uint8_t of size 2048, for a final size
> of 2048. We also however declare the reply part of the union to have a
> uint32_t data field of NFS_READ_SIZE (1024) for a final size of
>
Hi Troy,
On 08/28/2017 09:42 AM, Troy Kisky wrote:
On 8/27/2017 3:04 PM, Eric Nelson wrote:
This adds support for USB boot mode on the i.MX7D SoC, which
is most useful when doing U-Boot development on this chip.
i.e., it enables you to enter the ROM boot loader's serial
download protocol
On 08/29/2017 03:47 AM, Joakim Tjernlund wrote:
> As we are looking at PCI stuff ATM I would like to ask
> about PEX_GCLK_RATIO in E500 CPUs. I cannot find this is setup
> at all for E500 but I THINK this is required.
>
> In 83xx one do:
> get_clocks();
> /* Configure the PCIE controller core
On Tue, Aug 29, 2017 at 8:57 AM, Leif Lindholm wrote:
> On Tue, Aug 29, 2017 at 02:26:48PM +0200, Alexander Graf wrote:
>> > > > I would add command
>> > > > bootefi selftest.efi
>> > > > to run the tests and provide the python wrapper code to add it to the
>> > > > test
2017-08-28 21:57 GMT+09:00 Masahiro Yamada :
> From: Dai Okamura
>
> Signed-off-by: Dai Okamura
> Signed-off-by: Masahiro Yamada
> ---
Applied to u-boot-uniphier. Thanks.
2017-08-29 1:06 GMT+09:00 Masahiro Yamada :
> Support system clocks for LD4, Pro4, sLD8, Pro5, PXs2/LD6b, LD11, LD20.
>
> Signed-off-by: Masahiro Yamada
> ---
Applied to u-boot-uniphier.
--
Best Regards
Masahiro Yamada
On Tue, 2017-08-29 at 12:47 +0200, Joakim Tjernlund wrote:
> As we are looking at PCI stuff ATM I would like to ask
> about PEX_GCLK_RATIO in E500 CPUs. I cannot find this is setup
> at all for E500 but I THINK this is required.
>
> In 83xx one do:
> get_clocks();
> /* Configure the PCIE
For QSPI and IFC addresses execution shouldn't be allowed
when u-boot running from DDR. Revise the MMU final table
to enforce execute-never bits.
Signed-off-by: Suresh Gupta
---
arch/arm/include/asm/arch-fsl-layerscape/cpu.h | 6 --
1 file changed, 4 insertions(+), 2
On Tue, Aug 29, 2017 at 6:41 AM, Sekhar Nori wrote:
> On Tuesday 29 August 2017 03:29 PM, Adam Ford wrote:
>> On Tue, Aug 29, 2017 at 4:13 AM, Sekhar Nori wrote:
>>> Hi Adam,
>>>
>>> On Sunday 27 August 2017 08:31 PM, Adam Ford wrote:
I was trying to enable
On Mon, Aug 28, 2017 at 3:58 PM, Anatolij Gustschin wrote:
> bss section is cleared in crt0.S. board_init_r() is also
> entered from crt0 code.
>
> Signed-off-by: Anatolij Gustschin
Reviewed-by: Fabio Estevam
On Tue, Aug 29, 2017 at 02:26:48PM +0200, Alexander Graf wrote:
> > > > I would add command
> > > > bootefi selftest.efi
> > > > to run the tests and provide the python wrapper code to add it to the
> > > > test suite.
> > >
> > > I think that's a great idea, yes.
> > I wonder how far we are from
It is recommended to check either controller is free to take
new spi action. The IP_ACC and AHB_ACC bits indicates that
the controller is busy in IP or AHB mode respectively.
And the BUSY bit indicates that controller is currently
busy handling a transaction to an external flash device
On 08/29/2017 12:45 PM, tien.fong.c...@intel.com wrote:
> From: Tien Fong Chee
>
> This patch enables FPGA program with minimum 4 byte data size.
What does that mean ? Expand the description, it's inobvious
> Signed-off-by: Tien Fong Chee
>
On 08/29/2017 12:52 PM, Heinrich Schuchardt wrote:
On 08/27/2017 10:10 PM, Simon Glass wrote:
Hi Heinrich,
On 26 August 2017 at 16:51, Heinrich Schuchardt wrote:
This patch sequence contains all patches needed to load
iPXE and use it for downloading and executing images
On 08/29/2017 02:17 PM, Rob Clark wrote:
On Tue, Aug 29, 2017 at 7:45 AM, Alexander Graf wrote:
On 08/29/2017 12:52 PM, Heinrich Schuchardt wrote:
On 08/27/2017 10:10 PM, Simon Glass wrote:
Hi Heinrich,
On 26 August 2017 at 16:51, Heinrich Schuchardt
On 08/29/2017 12:45 PM, tien.fong.c...@intel.com wrote:
> From: Tien Fong Chee
>
> This patch enables FPGA loadfs command support to U-boot console.
>
> Signed-off-by: Tien Fong Chee
But you enabled support for this in patch 1/19 ...
On Tue, Aug 29, 2017 at 7:45 AM, Alexander Graf wrote:
> On 08/29/2017 12:52 PM, Heinrich Schuchardt wrote:
>>
>> On 08/27/2017 10:10 PM, Simon Glass wrote:
>>>
>>> Hi Heinrich,
>>>
>>> On 26 August 2017 at 16:51, Heinrich Schuchardt
>>> wrote:
This
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