Re: [U-Boot] [PATCH v2] sunxi: move CONFIG_SYS_TEXT_BASE out of defconfigs

[Jagan Teki]

On Sun, Mar 4, 2018 at 5:19 AM, Andre Przywara  wrote:
> Commit 278b90ce786f ("configs: Migrate CONFIG_SYS_TEXT_BASE") made
> CONFIG_SYS_TEXT_BASE a proper Kconfig variable, with the consequence
> of moving the common definition shared by almost every sunxi board
> into 123 individual defconfig files. But the U-Boot start address
> for Allwinner boards is a platform decision which has been around for
> ages, so defining it in each *board* config file seems a bit over the
> top.
> Define the standard values (160MB into DRAM for most SoCs, with two
> SoC exceptions) if ARCH_SUNXI is selected, and delete the lines from
> the individual defconfigs.
>
> Signed-off-by: Andre Przywara 
> Acked-by: Maxime Ripard 
> ---

Reviewed-by: Jagan Teki 

Applied to u-boot-sunxi/master
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[U-Boot] [PATCH] efi_loader: Allow width smaller than buffer stride in efi_gop Blt()

[Ivan Gorinov]

Current implementation of Blt() in EFI_GRAPHICS_OUTPUT_PROTOCOL
assumes the memory buffer stride (number of bytes in a row)
always matches the rectangle Width, ignoring non-zero Delta.

Signed-off-by: Ivan Gorinov 
---
 lib/efi_loader/efi_gop.c | 10 --
 1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/lib/efi_loader/efi_gop.c b/lib/efi_loader/efi_gop.c
index 3caddd5..362065b 100644
--- a/lib/efi_loader/efi_gop.c
+++ b/lib/efi_loader/efi_gop.c
@@ -64,6 +64,7 @@ efi_status_t EFIAPI gop_blt(struct efi_gop *this, void 
*buffer,
 {
struct efi_gop_obj *gopobj = container_of(this, struct efi_gop_obj, 
ops);
int i, j, line_len16, line_len32;
+   int buffer_stride;
void *fb;
 
EFI_ENTRY("%p, %p, %u, %zu, %zu, %zu, %zu, %zu, %zu, %zu", this,
@@ -72,6 +73,11 @@ efi_status_t EFIAPI gop_blt(struct efi_gop *this, void 
*buffer,
if (operation != EFI_BLT_BUFFER_TO_VIDEO)
return EFI_EXIT(EFI_INVALID_PARAMETER);
 
+   if (delta == 0)
+   buffer_stride = width * sizeof(u32);
+   else
+   buffer_stride = delta;
+
fb = gopobj->fb;
line_len16 = gopobj->info.width * sizeof(u16);
line_len32 = gopobj->info.width * sizeof(u32);
@@ -87,7 +93,7 @@ efi_status_t EFIAPI gop_blt(struct efi_gop *this, void 
*buffer,
for (i = 0; i < height; i++) {
u32 *dest = fb + ((i + dy)  * line_len32) +
 (dx * sizeof(u32));
-   u32 *src = buffer + ((i + sy)  * line_len32) +
+   u32 *src = buffer + ((i + sy) * buffer_stride) +
 (sx * sizeof(u32));
 
/* Same color format, just memcpy */
@@ -102,7 +108,7 @@ efi_status_t EFIAPI gop_blt(struct efi_gop *this, void 
*buffer,
for (i = 0; i < height; i++) {
u16 *dest = fb + ((i + dy)  * line_len16) +
 (dx * sizeof(u16));
-   u32 *src = buffer + ((i + sy)  * line_len32) +
+   u32 *src = buffer + ((i + sy) * buffer_stride) +
 (sx * sizeof(u32));
 
/* Convert from rgb888 to rgb565 */
-- 
2.7.4

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[U-Boot] [PATCH v3 0/7] add inital SF tests

[Liam Beguin]

Hi all,

This is the inital step to adding tests for the SF subsystem plus very
minor fixes. It is based on work I found on the mailing list[1].
For now, it doesn't do much but I plan on adding code to reset the flash
to its initial state (based on an env flag) and more code to test the
`sf protect` subcommand (which is the main goal of this series).
I'm sending it now to make sure it's headed in the right direction.

Base on Stephen's comment[2], I haven't added the radomized features.
I'll see how this iteration goes and maybe add it later.

Changes since v2:
 - remove double blank lines
 - in sf_prepare, fix the way `speed` is read from env__sf_config
 - in sf_prepare, fix assert of env__sf_config['offset']
 - in sf_prepare, do not fail if env__sf_config['crc32'] == 0
 - in sf_{read,update}, `pattern` is in bytes. Make sure md/mw use the
   right sizes.
 - in sf_{read,update}, rename `crc_read` to `crc_pattern` when
   appropriate
 - add missing pytest.mark on test_sf_update

Changes since v1:
 - remove unnecessary skip flag from environment
 - move crc32() to u_boot_utils.py and add extra checks
 - rewrite sf_prepare to return a dict of parameter
 - use assert instead of pytest.fail
 - remove verbose from sf_prepare()
 - update documentation
 - improve readability
 - use ' consistently instead of "
 - use sf_read() in test_sf_read()
 - rename crc variables
 - add speed parameter with optional random range
 - allow `sf read` to write at 0x00

Thanks,
Liam Beguin

[ 1 ] https://patchwork.ozlabs.org/patch/623061/
[ 2 ] https://lists.denx.de/pipermail/u-boot/2018-March/321688.html

Liam Beguin (7):
  spi: spi_flash: do not fail silently on bad user input
  cmd: sf: fix map_physmem check
  test/py: README: fix typo
  test/py: README: add HOSTNAME to PYTHONPATH
  test/py: do not import pytest multiple times
  test/py: add generic CRC32 function
  test/py: add spi_flash tests

 cmd/sf.c|   2 +-
 drivers/mtd/spi/spi_flash.c |   2 +-
 test/py/README.md   |   6 +-
 test/py/tests/test_sf.py| 217 
 test/py/u_boot_utils.py |  24 -
 5 files changed, 245 insertions(+), 6 deletions(-)
 create mode 100644 test/py/tests/test_sf.py


base-commit: f95ab1fb6e37f0601f397091bb011edf7a98b890
Published-As: https://github.com/Liambeguin/u-boot/releases/tag/test_sf-v3

interdiff vs v2:
diff --git a/test/py/tests/test_sf.py b/test/py/tests/test_sf.py
index 0cc2a60e68d4..8bd1623ff303 100644
--- a/test/py/tests/test_sf.py
+++ b/test/py/tests/test_sf.py
@@ -7,7 +7,6 @@ import pytest
 import random
 import u_boot_utils
 
-
 """
 Note: This test relies on boardenv_* containing configuration values to define
 which SPI Flash areas are available for testing.  Without this, this test will
@@ -45,7 +44,6 @@ env__sf_configs = (
 )
 """
 
-
 def sf_prepare(u_boot_console, env__sf_config):
 """Check global state of the SPI Flash before running any test.
 
@@ -63,10 +61,11 @@ def sf_prepare(u_boot_console, env__sf_config):
 
 probe_id = env__sf_config.get('id', 0)
 speed = env__sf_config.get('speed', 0)
-if isinstance(speed, list) and len(speed) == 2:
-sf_params['speed'] = random.randint(speed[0], speed[1])
-else:
+if isinstance(speed, int):
 sf_params['speed'] = speed
+else:
+assert len(speed) == 2, "If speed is a list, it must have 2 entries"
+sf_params['speed'] = random.randint(speed[0], speed[1])
 
 cmd = 'sf probe %d %d' % (probe_id, sf_params['speed'])
 
@@ -87,7 +86,7 @@ def sf_prepare(u_boot_console, env__sf_config):
 sf_params['total_size'] = int(m.group(1))
 sf_params['total_size'] *= 1024 * 1024
 
-assert env__sf_config['offset'] is not None, \
+assert 'offset' in env__sf_config, \
 '\'offset\' is required for this test.'
 sf_params['len'] = env__sf_config.get('len', sf_params['erase_size'])
 
@@ -97,12 +96,11 @@ def sf_prepare(u_boot_console, env__sf_config):
 'erase length not multiple of erase size.'
 
 assert not (env__sf_config.get('writeable', False) and
-env__sf_config.get('crc32', False)), \
-'Cannot check crc32 on  writeable sections'
+'crc32' in env__sf_config), \
+'Cannot check crc32 on writeable sections'
 
 return sf_params
 
-
 def sf_read(u_boot_console, env__sf_config, sf_params):
 """Helper function used to read and compute the CRC32 value of a section of
 SPI Flash memory.
@@ -120,26 +118,25 @@ def sf_read(u_boot_console, env__sf_config, sf_params):
 addr = sf_params['ram_base']
 offset = env__sf_config['offset']
 count = sf_params['len']
-pattern = random.randint(0, 0x)
+pattern = random.randint(0, 0xFF)
 crc_expected = env__sf_config.get('crc32', None)
 
-cmd = 'mw.b %08x %08x %x' % (addr, pattern, count)
+cmd = 'mw.b %08x %02x %x' % (addr, pattern, count)
 u_boot_console.run_command(cmd)
-crc_read = 

[U-Boot] [PATCH v3 7/7] test/py: add spi_flash tests

[Liam Beguin]

Add basic tests for the spi_flash subsystem.

Signed-off-by: Liam Beguin 
---
 test/py/tests/test_sf.py | 217 +++
 1 file changed, 217 insertions(+)
 create mode 100644 test/py/tests/test_sf.py

diff --git a/test/py/tests/test_sf.py b/test/py/tests/test_sf.py
new file mode 100644
index ..8bd1623ff303
--- /dev/null
+++ b/test/py/tests/test_sf.py
@@ -0,0 +1,217 @@
+# Copyright (c) 2017, Xiphos Systems Corp. All rights reserved.
+#
+# SPDX-License-Identifier: GPL-2.0
+
+import re
+import pytest
+import random
+import u_boot_utils
+
+"""
+Note: This test relies on boardenv_* containing configuration values to define
+which SPI Flash areas are available for testing.  Without this, this test will
+be automatically skipped.
+For example:
+
+# A list of sections of Flash memory to be tested.
+env__sf_configs = (
+{
+# Where in SPI Flash should the test operate.
+'offset': 0x,
+# This value is optional.
+#   If present, specifies the [[bus:]cs] argument used in `sf probe`
+#   If missing, defaults to 0.
+'id': '0:1',
+# This value is optional.
+#   If set as a number, specifies the speed of the SPI Flash.
+#   If set as an array of 2, specifies a range for a random speed.
+#   If missing, defaults to 0.
+'speed': 100,
+# This value is optional.
+#   If present, specifies the size to use for read/write operations.
+#   If missing, the SPI Flash page size is used as a default (based on
+#   the `sf probe` output).
+'len': 0x1,
+# This value is optional.
+#   If present, specifies if the test can write to Flash offset
+#   If missing, defaults to False.
+'writeable': False,
+# This value is optional.
+#   If present, specifies the expected CRC32 value of the flash area.
+#   If missing, extra check is ignored.
+'crc32': 0xCAFECAFE,
+},
+)
+"""
+
+def sf_prepare(u_boot_console, env__sf_config):
+"""Check global state of the SPI Flash before running any test.
+
+   Args:
+u_boot_console: A U-Boot console connection.
+env__sf_config: The single SPI Flash device configuration on which to
+run the tests.
+
+Returns:
+sf_params: a dictionnary of SPI Flash parameters.
+"""
+
+sf_params = {}
+sf_params['ram_base'] = u_boot_utils.find_ram_base(u_boot_console)
+
+probe_id = env__sf_config.get('id', 0)
+speed = env__sf_config.get('speed', 0)
+if isinstance(speed, int):
+sf_params['speed'] = speed
+else:
+assert len(speed) == 2, "If speed is a list, it must have 2 entries"
+sf_params['speed'] = random.randint(speed[0], speed[1])
+
+cmd = 'sf probe %d %d' % (probe_id, sf_params['speed'])
+
+output = u_boot_console.run_command(cmd)
+assert 'SF: Detected' in output, 'No Flash device available'
+
+m = re.search('page size (.+?) Bytes', output)
+assert m, 'SPI Flash page size not recognized'
+sf_params['page_size'] = int(m.group(1))
+
+m = re.search('erase size (.+?) KiB', output)
+assert m, 'SPI Flash erase size not recognized'
+sf_params['erase_size'] = int(m.group(1))
+sf_params['erase_size'] *= 1024
+
+m = re.search('total (.+?) MiB', output)
+assert m, 'SPI Flash total size not recognized'
+sf_params['total_size'] = int(m.group(1))
+sf_params['total_size'] *= 1024 * 1024
+
+assert 'offset' in env__sf_config, \
+'\'offset\' is required for this test.'
+sf_params['len'] = env__sf_config.get('len', sf_params['erase_size'])
+
+assert not env__sf_config['offset'] % sf_params['erase_size'], \
+'offset not multiple of erase size.'
+assert not sf_params['len'] % sf_params['erase_size'], \
+'erase length not multiple of erase size.'
+
+assert not (env__sf_config.get('writeable', False) and
+'crc32' in env__sf_config), \
+'Cannot check crc32 on writeable sections'
+
+return sf_params
+
+def sf_read(u_boot_console, env__sf_config, sf_params):
+"""Helper function used to read and compute the CRC32 value of a section of
+SPI Flash memory.
+
+Args:
+u_boot_console: A U-Boot console connection.
+env__sf_config: The single SPI Flash device configuration on which to
+run the tests.
+sf_params: SPI Flash parameters.
+
+Returns:
+CRC32 value of SPI Flash section
+"""
+
+addr = sf_params['ram_base']
+offset = env__sf_config['offset']
+count = sf_params['len']
+pattern = random.randint(0, 0xFF)
+crc_expected = env__sf_config.get('crc32', None)
+
+cmd = 'mw.b %08x %02x %x' % (addr, pattern, count)
+u_boot_console.run_command(cmd)
+crc_pattern = u_boot_utils.crc32(u_boot_console, addr, count)
+if crc_expected:
+assert crc_pattern != 

[U-Boot] [PATCH v3 1/7] spi: spi_flash: do not fail silently on bad user input

[Liam Beguin]

Make sure the user is notified instead of silently returning an error.

Signed-off-by: Liam Beguin 
---
 drivers/mtd/spi/spi_flash.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index 294d9f9d79c6..2e61685d3ea4 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -320,7 +320,7 @@ int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 
offset, size_t len)
 
erase_size = flash->erase_size;
if (offset % erase_size || len % erase_size) {
-   debug("SF: Erase offset/length not multiple of erase size\n");
+   printf("SF: Erase offset/length not multiple of erase size\n");
return -1;
}
 
-- 
2.16.1.72.g5be1f00a9a70

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[U-Boot] [PATCH v3 2/7] cmd: sf: fix map_physmem check

[Liam Beguin]

Make sure 0x00 is a valid address to read to. If `addr` is 0x00 then
map_physmem() will return 0 which should be a valid address.

Signed-off-by: Liam Beguin 
---
 cmd/sf.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/cmd/sf.c b/cmd/sf.c
index f971eec781cc..e7ff9a646208 100644
--- a/cmd/sf.c
+++ b/cmd/sf.c
@@ -287,7 +287,7 @@ static int do_spi_flash_read_write(int argc, char * const 
argv[])
}
 
buf = map_physmem(addr, len, MAP_WRBACK);
-   if (!buf) {
+   if (!buf && addr) {
puts("Failed to map physical memory\n");
return 1;
}
-- 
2.16.1.72.g5be1f00a9a70

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[U-Boot] [PATCH v3 5/7] test/py: do not import pytest multiple times

[Liam Beguin]

Signed-off-by: Liam Beguin 
---
 test/py/u_boot_utils.py | 1 -
 1 file changed, 1 deletion(-)

diff --git a/test/py/u_boot_utils.py b/test/py/u_boot_utils.py
index 9acb92ddc448..64584494e463 100644
--- a/test/py/u_boot_utils.py
+++ b/test/py/u_boot_utils.py
@@ -11,7 +11,6 @@ import os.path
 import pytest
 import sys
 import time
-import pytest
 
 def md5sum_data(data):
 """Calculate the MD5 hash of some data.
-- 
2.16.1.72.g5be1f00a9a70

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[U-Boot] [PATCH v3 6/7] test/py: add generic CRC32 function

[Liam Beguin]

Add a generic function which can be used to compute the CRC32 value of
a region of RAM.

Signed-off-by: Liam Beguin 
---
 test/py/u_boot_utils.py | 23 +++
 1 file changed, 23 insertions(+)

diff --git a/test/py/u_boot_utils.py b/test/py/u_boot_utils.py
index 64584494e463..de9ee2643f51 100644
--- a/test/py/u_boot_utils.py
+++ b/test/py/u_boot_utils.py
@@ -11,6 +11,7 @@ import os.path
 import pytest
 import sys
 import time
+import re
 
 def md5sum_data(data):
 """Calculate the MD5 hash of some data.
@@ -310,3 +311,25 @@ def persistent_file_helper(u_boot_log, filename):
 """
 
 return PersistentFileHelperCtxMgr(u_boot_log, filename)
+
+def crc32(u_boot_console, address, count):
+"""Helper function used to compute the CRC32 value of a section of RAM.
+
+Args:
+u_boot_console: A U-Boot console connection.
+address: Address where data starts.
+count: Amount of data to use for calculation.
+
+Returns:
+CRC32 value
+"""
+
+bcfg = u_boot_console.config.buildconfig
+has_cmd_crc32 = bcfg.get('config_cmd_crc32', 'n') == 'y'
+assert has_cmd_crc32, 'Cannot compute crc32 without CONFIG_CMD_CRC32.'
+output = u_boot_console.run_command('crc32 %08x %x' % (address, count))
+
+m = re.search('==> ([0-9a-fA-F]{8})$', output)
+assert m, 'CRC32 operation failed.'
+
+return m.group(1)
-- 
2.16.1.72.g5be1f00a9a70

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[U-Boot] [PATCH v3 3/7] test/py: README: fix typo

[Liam Beguin]

Fix a minor typo causing vim (and possibly other) to get confused with
coloring.

Signed-off-by: Liam Beguin 
---
 test/py/README.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/test/py/README.md b/test/py/README.md
index eefac377567a..000afce93c4a 100644
--- a/test/py/README.md
+++ b/test/py/README.md
@@ -150,7 +150,7 @@ processing.
   option takes a single argument which is used to filter test names. Simple
   logical operators are supported. For example:
   - `'ums'` runs only tests with "ums" in their name.
-  - ``ut_dm'` runs only tests with "ut_dm" in their name. Note that in this
+  - `'ut_dm'` runs only tests with "ut_dm" in their name. Note that in this
 case, "ut_dm" is a parameter to a test rather than the test name. The full
 test name is e.g. "test_ut[ut_dm_leak]".
   - `'not reset'` runs everything except tests with "reset" in their name.
-- 
2.16.1.72.g5be1f00a9a70

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[U-Boot] [PATCH v4 14/19] sunxi: DT: update device tree files for Allwinner H3 and H5 SoCs

[Andre Przywara]

Update the device tree files from the Linux tree as of:
commit 776245ae02f63ba2b94596b892c597676e190e78
Author: Corentin Labbe 
Date:   Tue Oct 31 09:19:11 2017 +0100
ARM: dts: sunxi: h3/h5: represent the mdio switch used by sun8i-h3-emac

Since the H3 and H5 are very similar (aside from the actual ARM cores),
they share most the SoC .dtsi and thus have to be updated together.
One tiny change is the removal of the "arm/" prefix from the include
path in the sun50i-h5.dtsi, which is needed because we don't share the
same sophisticated DT directory layout of Linux.
Also we need to (temporarily) fix up the BananaPi-M2 board .dts, to
maintain bisectability.

Signed-off-by: Andre Przywara 
Acked-by: Maxime Ripard 
---
 arch/arm/dts/sun50i-h5.dtsi|  36 +-
 arch/arm/dts/sun8i-h3-bananapi-m2-plus.dts |   2 +-
 arch/arm/dts/sun8i-h3.dtsi | 521 ++---
 arch/arm/dts/sunxi-h3-h5.dtsi  | 698 +
 4 files changed, 766 insertions(+), 491 deletions(-)
 create mode 100644 arch/arm/dts/sunxi-h3-h5.dtsi

diff --git a/arch/arm/dts/sun50i-h5.dtsi b/arch/arm/dts/sun50i-h5.dtsi
index c052f31131..18d45a96db 100644
--- a/arch/arm/dts/sun50i-h5.dtsi
+++ b/arch/arm/dts/sun50i-h5.dtsi
@@ -1,17 +1,17 @@
 /*
- * Copyright (c) 2016 ARM Ltd.
+ * Copyright (C) 2016 ARM Ltd.
  *
  * This file is dual-licensed: you can use it either under the terms
  * of the GPL or the X11 license, at your option. Note that this dual
  * licensing only applies to this file, and not this project as a
  * whole.
  *
- *  a) This library is free software; you can redistribute it and/or
+ *  a) This file is free software; you can redistribute it and/or
  * modify it under the terms of the GNU General Public License as
  * published by the Free Software Foundation; either version 2 of the
  * License, or (at your option) any later version.
  *
- * This library is distributed in the hope that it will be useful,
+ * This file is distributed in the hope that it will be useful,
  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  * GNU General Public License for more details.
@@ -40,24 +40,38 @@
  * OTHER DEALINGS IN THE SOFTWARE.
  */
 
-#include "sun8i-h3.dtsi"
+#include 
 
 / {
cpus {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
cpu@0 {
compatible = "arm,cortex-a53", "arm,armv8";
+   device_type = "cpu";
+   reg = <0>;
enable-method = "psci";
};
+
cpu@1 {
compatible = "arm,cortex-a53", "arm,armv8";
+   device_type = "cpu";
+   reg = <1>;
enable-method = "psci";
};
+
cpu@2 {
compatible = "arm,cortex-a53", "arm,armv8";
+   device_type = "cpu";
+   reg = <2>;
enable-method = "psci";
};
+
cpu@3 {
compatible = "arm,cortex-a53", "arm,armv8";
+   device_type = "cpu";
+   reg = <3>;
enable-method = "psci";
};
};
@@ -69,6 +83,14 @@
 
timer {
compatible = "arm,armv8-timer";
+   interrupts = ,
+,
+,
+;
};
 };
 
@@ -76,10 +98,6 @@
compatible = "allwinner,sun50i-h5-ccu";
 };
 
- {
-   compatible = "arm,gic-400";
-};
-
  {
compatible = "allwinner,sun50i-h5-mmc",
 "allwinner,sun50i-a64-mmc";
@@ -104,6 +122,6 @@
  {
interrupts = ,
 ,
-  ;
+;
compatible = "allwinner,sun50i-h5-pinctrl";
 };
diff --git a/arch/arm/dts/sun8i-h3-bananapi-m2-plus.dts 
b/arch/arm/dts/sun8i-h3-bananapi-m2-plus.dts
index f3b1d5f6db..06fddaae8e 100644
--- a/arch/arm/dts/sun8i-h3-bananapi-m2-plus.dts
+++ b/arch/arm/dts/sun8i-h3-bananapi-m2-plus.dts
@@ -185,7 +185,7 @@
 
  {
pinctrl-names = "default";
-   pinctrl-0 = <_pins_a>;
+   pinctrl-0 = <_pins>, <_rts_cts_pins>;
status = "okay";
 };
 
diff --git a/arch/arm/dts/sun8i-h3.dtsi b/arch/arm/dts/sun8i-h3.dtsi
index 39a6438ec4..b36f9f423c 100644
--- a/arch/arm/dts/sun8i-h3.dtsi
+++ b/arch/arm/dts/sun8i-h3.dtsi
@@ -40,20 +40,9 @@
  * OTHER DEALINGS IN THE SOFTWARE.
  */
 
-#include "skeleton.dtsi"
-
-#include 
-#include 
-#include 
-#include 
+#include "sunxi-h3-h5.dtsi"
 
 / {
-   interrupt-parent = <>;
-
-   aliases {
-   ethernet0 = 
-   };
-
cpus {

[U-Boot] [PATCH v4 13/19] sunxi: DT: A64: update board .dts files from Linux

[Andre Przywara]

Update the .dts files for the various boards with an Allwinner A64 SoC.
This is as of v4.15-rc9, exactly Linux commit:
commit bdfe4cebea11476d278b1b98dd0f7cdac8269d62
Author: Icenowy Zheng 
Date:   Fri Nov 10 17:26:54 2017 +0800
arm64: allwinner: a64: add Ethernet PHY regulator for several boards

It updates the existing DT files, adds the newly added axp803.dtsi and
removes our temporary kludge file to get Ethernet support in U-Boot.

Signed-off-by: Andre Przywara 
Acked-by: Maxime Ripard 
---
 arch/arm/dts/axp803.dtsi| 150 
 arch/arm/dts/sun50i-a64-bananapi-m64.dts| 161 +++--
 arch/arm/dts/sun50i-a64-nanopi-a64.dts  | 108 --
 arch/arm/dts/sun50i-a64-olinuxino.dts   | 131 +++--
 arch/arm/dts/sun50i-a64-orangepi-win.dts|   7 +-
 arch/arm/dts/sun50i-a64-pine64-plus-u-boot.dtsi |  20 ---
 arch/arm/dts/sun50i-a64-pine64-plus.dts |  17 ++-
 arch/arm/dts/sun50i-a64-pine64.dts  | 178 +++-
 8 files changed, 716 insertions(+), 56 deletions(-)
 create mode 100644 arch/arm/dts/axp803.dtsi
 delete mode 100644 arch/arm/dts/sun50i-a64-pine64-plus-u-boot.dtsi

diff --git a/arch/arm/dts/axp803.dtsi b/arch/arm/dts/axp803.dtsi
new file mode 100644
index 00..ff8af52743
--- /dev/null
+++ b/arch/arm/dts/axp803.dtsi
@@ -0,0 +1,150 @@
+/*
+ * Copyright 2017 Icenowy Zheng 
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/*
+ * AXP803 Integrated Power Management Chip
+ * http://files.pine64.org/doc/datasheet/pine64/AXP803_Datasheet_V1.0.pdf
+ */
+
+ {
+   interrupt-controller;
+   #interrupt-cells = <1>;
+
+   regulators {
+   /* Default work frequency for buck regulators */
+   x-powers,dcdc-freq = <3000>;
+
+   reg_aldo1: aldo1 {
+   regulator-name = "aldo1";
+   };
+
+   reg_aldo2: aldo2 {
+   regulator-name = "aldo2";
+   };
+
+   reg_aldo3: aldo3 {
+   regulator-name = "aldo3";
+   };
+
+   reg_dc1sw: dc1sw {
+   regulator-name = "dc1sw";
+   };
+
+   reg_dcdc1: dcdc1 {
+   regulator-name = "dcdc1";
+   };
+
+   reg_dcdc2: dcdc2 {
+   regulator-name = "dcdc2";
+   };
+
+   reg_dcdc3: dcdc3 {
+   regulator-name = "dcdc3";
+   };
+
+   reg_dcdc4: dcdc4 {
+   regulator-name = "dcdc4";
+   };
+
+   reg_dcdc5: dcdc5 {
+   regulator-name = "dcdc5";
+   };
+
+   reg_dcdc6: dcdc6 {
+   regulator-name = "dcdc6";
+   };
+
+   reg_dldo1: dldo1 {
+   regulator-name = "dldo1";
+   };
+
+  

[U-Boot] [PATCH v4 15/19] sunxi: DT: H5: update board .dts files from Linux

[Andre Przywara]

Update the .dts file for the various boards with an Allwinner H5 SoC.
This is as of v4.15-rc9, exactly Linux commit:
commit f88e9301948173dd35afad4a6939092c7f269aed
Author: Sergey Matyukevich 
Date:   Fri Nov 3 22:58:54 2017 +0300
arm64: dts: orange-pi-zero-plus2: fix sdcard detect

Signed-off-by: Andre Przywara 
Acked-by: Maxime Ripard 
---
 arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts| 105 ++--
 arch/arm/dts/sun50i-h5-nanopi-neo2.dts |  89 +++--
 arch/arm/dts/sun50i-h5-orangepi-pc2.dts| 165 +++--
 arch/arm/dts/sun50i-h5-orangepi-prime.dts  | 164 +---
 arch/arm/dts/sun50i-h5-orangepi-zero-plus2.dts |   7 +-
 5 files changed, 455 insertions(+), 75 deletions(-)

diff --git a/arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts 
b/arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts
index f1406c224b..7c028af58f 100644
--- a/arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts
+++ b/arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts
@@ -1,18 +1,18 @@
 /*
  * Copyright (C) 2017 Antony Antony 
- * Copyright (c) 2016 ARM Ltd.
+ * Copyright (C) 2016 ARM Ltd.
  *
  * This file is dual-licensed: you can use it either under the terms
  * of the GPL or the X11 license, at your option. Note that this dual
  * licensing only applies to this file, and not this project as a
  * whole.
  *
- *  a) This library is free software; you can redistribute it and/or
+ *  a) This file is free software; you can redistribute it and/or
  * modify it under the terms of the GNU General Public License as
  * published by the Free Software Foundation; either version 2 of the
  * License, or (at your option) any later version.
  *
- * This library is distributed in the hope that it will be useful,
+ * This file is distributed in the hope that it will be useful,
  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  * GNU General Public License for more details.
@@ -42,13 +42,14 @@
  */
 
 /dts-v1/;
-
 #include "sun50i-h5.dtsi"
 
 #include 
+#include 
+#include 
 
 / {
-   model = "FriendlyARM NanoPi NEO Plus 2";
+   model = "FriendlyARM NanoPi NEO Plus2";
compatible = "friendlyarm,nanopi-neo-plus2", "allwinner,sun50i-h5";
 
aliases {
@@ -59,15 +60,76 @@
stdout-path = "serial0:115200n8";
};
 
+   leds {
+   compatible = "gpio-leds";
+
+   pwr {
+   label = "nanopi:green:pwr";
+   gpios = <_pio 0 10 GPIO_ACTIVE_HIGH>;
+   default-state = "on";
+   };
+
+   status {
+   label = "nanopi:red:status";
+   gpios = < 0 20 GPIO_ACTIVE_HIGH>;
+   };
+   };
+
+   reg_gmac_3v3: gmac-3v3 {
+   compatible = "regulator-fixed";
+   pinctrl-names = "default";
+   regulator-name = "gmac-3v3";
+   regulator-min-microvolt = <330>;
+   regulator-max-microvolt = <330>;
+   startup-delay-us = <10>;
+   enable-active-high;
+   gpio = < 3 6 GPIO_ACTIVE_HIGH>;
+   };
+
reg_vcc3v3: vcc3v3 {
compatible = "regulator-fixed";
regulator-name = "vcc3v3";
regulator-min-microvolt = <330>;
regulator-max-microvolt = <330>;
};
+
+   vdd_cpux: gpio-regulator {
+   compatible = "regulator-gpio";
+   pinctrl-names = "default";
+   regulator-name = "vdd-cpux";
+   regulator-type = "voltage";
+   regulator-boot-on;
+   regulator-always-on;
+   regulator-min-microvolt = <110>;
+   regulator-max-microvolt = <130>;
+   regulator-ramp-delay = <50>; /* 4ms */
+   gpios = <_pio 0 6 GPIO_ACTIVE_HIGH>;
+   gpios-states = <0x1>;
+   states = <110 0x0
+ 130 0x1>;
+   };
+
+   wifi_pwrseq: wifi_pwrseq {
+   compatible = "mmc-pwrseq-simple";
+   pinctrl-names = "default";
+   reset-gpios = <_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
+   post-power-on-delay-ms = <200>;
+   };
 };
 
- {
+ {
+   allwinner,audio-routing =
+   "Line Out", "LINEOUT",
+   "MIC1", "Mic",
+   "Mic",  "MBIAS";
+   status = "okay";
+};
+
+ {
+   status = "okay";
+};
+
+ {
status = "okay";
 };
 
@@ -76,11 +138,26 @@
pinctrl-0 = <_pins_a>, <_cd_pin>;
vmmc-supply = <_vcc3v3>;
bus-width = <4>;
-   cd-gpios = < 5 6 GPIO_ACTIVE_HIGH>;
-   cd-inverted;
+   cd-gpios = < 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
status = "okay";
 };
 
+ {

[U-Boot] [PATCH v3 4/7] test/py: README: add HOSTNAME to PYTHONPATH

[Liam Beguin]

As opposed to PATH, HOSTNAME is not appended to PYTHONPATH
automatically. Lets add it to the examples to make it more
obvious to new users.

Signed-off-by: Liam Beguin 
---
 test/py/README.md | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/test/py/README.md b/test/py/README.md
index 000afce93c4a..aed2fd063a81 100644
--- a/test/py/README.md
+++ b/test/py/README.md
@@ -320,7 +320,7 @@ If U-Boot has already been built:
 
 ```bash
 PATH=$HOME/ubtest/bin:$PATH \
-PYTHONPATH=${HOME}/ubtest/py:${PYTHONPATH} \
+PYTHONPATH=${HOME}/ubtest/py/${HOSTNAME}:${PYTHONPATH} \
 ./test/py/test.py --bd seaboard
 ```
 
@@ -331,7 +331,7 @@ follow:
 ```bash
 CROSS_COMPILE=arm-none-eabi- \
 PATH=$HOME/ubtest/bin:$PATH \
-PYTHONPATH=${HOME}/ubtest/py:${PYTHONPATH} \
+PYTHONPATH=${HOME}/ubtest/py/${HOSTNAME}:${PYTHONPATH} \
 ./test/py/test.py --bd seaboard --build
 ```
 
-- 
2.16.1.72.g5be1f00a9a70

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[U-Boot] [PATCH v4 18/19] sunxi: DT: H2+: update Opi-zero .dts

[Andre Przywara]

Update the .dts file for the OrangePi Zero board, using the H2+ SoC.
This is as of v4.15-rc9, exactly Linux commit:
commit 4904337fe34fa7fc529d6f4d9ee8b96fe7db310a
Author: Corentin Labbe 
Date:   Tue Oct 31 09:19:12 2017 +0100
ARM: dts: sunxi: Restore EMAC changes (boards)

Signed-off-by: Andre Przywara 
Acked-by: Maxime Ripard 
---
 arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts | 52 ++--
 1 file changed, 50 insertions(+), 2 deletions(-)

diff --git a/arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts 
b/arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts
index e0efcb3ba3..6713d0f2b3 100644
--- a/arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts
+++ b/arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts
@@ -49,7 +49,6 @@
 
 #include 
 #include 
-#include 
 
 / {
model = "Xunlong Orange Pi Zero";
@@ -58,6 +57,7 @@
aliases {
serial0 = 
/* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */
+   ethernet0 = 
ethernet1 = 
};
 
@@ -92,9 +92,14 @@
wifi_pwrseq: wifi_pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <_pio 0 7 GPIO_ACTIVE_LOW>;
+   post-power-on-delay-ms = <200>;
};
 };
 
+ {
+   status = "okay";
+};
+
  {
status = "okay";
 };
@@ -134,17 +139,60 @@
};
 };
 
+_pins_a {
+   bias-pull-up;
+};
+
+ {
+   status = "okay";
+};
+
  {
status = "okay";
 };
 
+ {
+   /* Disable SPI NOR by default: it optional on Orange Pi Zero boards */
+   status = "disabled";
+
+   flash@0 {
+   #address-cells = <1>;
+   #size-cells = <1>;
+   compatible = "mxicy,mx25l1606e", "winbond,w25q128";
+   reg = <0>;
+   spi-max-frequency = <4000>;
+   };
+};
+
  {
pinctrl-names = "default";
pinctrl-0 = <_pins_a>;
status = "okay";
 };
 
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+   status = "disabled";
+};
+
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+   status = "disabled";
+};
+
+_otg {
+   dr_mode = "peripheral";
+   status = "okay";
+};
+
  {
-   /* USB VBUS is always on */
+   /*
+* USB Type-A port VBUS is always on. However, MicroUSB VBUS can only
+* power up the board; when it's used as OTG port, this VBUS is
+* always off even if the board is powered via GPIO pins.
+*/
status = "okay";
+   usb0_id_det-gpios = < 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
 };
-- 
2.14.1

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[U-Boot] [PATCH v4 19/19] sunxi: DT: A64: add proper SoPine baseboard device tree

[Andre Przywara]

When the defconfig for the SoPine baseboard was added, there wasn't any
proper DT for the board yet, so we used the Pine64 DT as a placeholder.
Copy the DT file(s) meanwhile added in Linux over to U-Boot, and use
them in our defconfig.

Signed-off-by: Andre Przywara 
Acked-by: Maxime Ripard 
---
 arch/arm/dts/Makefile|   3 +-
 arch/arm/dts/sun50i-a64-sopine-baseboard.dts | 150 +++
 arch/arm/dts/sun50i-a64-sopine.dtsi  | 142 +
 configs/sopine_baseboard_defconfig   |   2 +-
 4 files changed, 295 insertions(+), 2 deletions(-)
 create mode 100644 arch/arm/dts/sun50i-a64-sopine-baseboard.dts
 create mode 100644 arch/arm/dts/sun50i-a64-sopine.dtsi

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 20a4c37d48..b947cbcc59 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -368,7 +368,8 @@ dtb-$(CONFIG_MACH_SUN50I) += \
sun50i-a64-olinuxino.dtb \
sun50i-a64-orangepi-win.dtb \
sun50i-a64-pine64-plus.dtb \
-   sun50i-a64-pine64.dtb
+   sun50i-a64-pine64.dtb \
+   sun50i-a64-sopine-baseboard.dtb
 dtb-$(CONFIG_MACH_SUN9I) += \
sun9i-a80-optimus.dtb \
sun9i-a80-cubieboard4.dtb \
diff --git a/arch/arm/dts/sun50i-a64-sopine-baseboard.dts 
b/arch/arm/dts/sun50i-a64-sopine-baseboard.dts
new file mode 100644
index 00..abe179de35
--- /dev/null
+++ b/arch/arm/dts/sun50i-a64-sopine-baseboard.dts
@@ -0,0 +1,150 @@
+/*
+ * Copyright (c) 2017 Icenowy Zheng 
+ *
+ * Based on sun50i-a64-pine64.dts, which is:
+ *   Copyright (c) 2016 ARM Ltd.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+#include "sun50i-a64-sopine.dtsi"
+
+/ {
+   model = "SoPine with baseboard";
+   compatible = "pine64,sopine-baseboard", "pine64,sopine",
+"allwinner,sun50i-a64";
+
+   aliases {
+   ethernet0 = 
+   serial0 = 
+   };
+
+   chosen {
+   stdout-path = "serial0:115200n8";
+   };
+
+   reg_vcc1v8: vcc1v8 {
+   compatible = "regulator-fixed";
+   regulator-name = "vcc1v8";
+   regulator-min-microvolt = <180>;
+   regulator-max-microvolt = <180>;
+   };
+};
+
+ {
+   status = "okay";
+};
+
+ {
+   status = "okay";
+};
+
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+   phy-mode = "rgmii";
+   phy-handle = <_rgmii_phy>;
+   phy-supply = <_dc1sw>;
+   status = "okay";
+};
+
+ {
+   ext_rgmii_phy: ethernet-phy@1 {
+   compatible = "ethernet-phy-ieee802.3-c22";
+   reg = <1>;
+   };
+};
+
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+   vmmc-supply = <_dcdc1>;
+   vqmmc-supply = <_vcc1v8>;
+   bus-width = <8>;
+   non-removable;
+   cap-mmc-hw-reset;
+   status = "okay";
+};
+
+ {
+   status = "okay";
+};
+
+ {
+   status = "okay";

[U-Boot] [PATCH v4 08/19] net: sun8i-emac: remove support for old binding

[Andre Przywara]

The original DT binding used by U-Boot's sun8i-emac driver was not really
agreed upon, and deviated from the "official" binding now used by the
kernel. Since now all U-Boot users have been converted to the new
binding, we can remove support for the old DT nodes from the driver.

Signed-off-by: Andre Przywara 
Acked-by: Maxime Ripard 
---
 drivers/net/sun8i_emac.c | 78 
 1 file changed, 26 insertions(+), 52 deletions(-)

diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c
index 221e95edc0..b6e5dafe83 100644
--- a/drivers/net/sun8i_emac.c
+++ b/drivers/net/sun8i_emac.c
@@ -456,7 +456,7 @@ static int parse_phy_pins(struct udevice *dev)
 {
int offset;
const char *pin_name;
-   int drive, pull, i;
+   int drive, pull = SUN4I_PINCTRL_NO_PULL, i;
 
offset = fdtdec_lookup_phandle(gd->fdt_blob, dev_of_offset(dev),
   "pinctrl-0");
@@ -476,31 +476,20 @@ static int parse_phy_pins(struct udevice *dev)
drive = SUN4I_PINCTRL_30_MA;
else
drive = SUN4I_PINCTRL_40_MA;
-   } else {
-   drive = fdt_getprop_u32_default_node(gd->fdt_blob, offset, 0,
-"allwinner,drive", 4);
}
 
if (fdt_get_property(gd->fdt_blob, offset, "bias-pull-up", NULL))
pull = SUN4I_PINCTRL_PULL_UP;
-   else if (fdt_get_property(gd->fdt_blob, offset, "bias-disable", NULL))
-   pull = SUN4I_PINCTRL_NO_PULL;
else if (fdt_get_property(gd->fdt_blob, offset, "bias-pull-down", NULL))
pull = SUN4I_PINCTRL_PULL_DOWN;
-   else
-   pull = fdt_getprop_u32_default_node(gd->fdt_blob, offset, 0,
-   "allwinner,pull", 0);
+
for (i = 0; ; i++) {
int pin;
 
pin_name = fdt_stringlist_get(gd->fdt_blob, offset,
- "allwinner,pins", i, NULL);
-   if (!pin_name) {
-   pin_name = fdt_stringlist_get(gd->fdt_blob, offset,
- "pins", i, NULL);
-   if (!pin_name)
-   break;
-   }
+ "pins", i, NULL);
+   if (!pin_name)
+   break;
 
pin = sunxi_name_to_gpio(pin_name);
if (pin < 0)
@@ -798,6 +787,7 @@ static int sun8i_emac_eth_ofdata_to_platdata(struct udevice 
*dev)
struct eth_pdata *pdata = _pdata->eth_pdata;
struct emac_eth_dev *priv = dev_get_priv(dev);
const char *phy_mode;
+   const fdt32_t *reg;
int node = dev_of_offset(dev);
int offset = 0;
 #ifdef CONFIG_DM_GPIO
@@ -805,33 +795,25 @@ static int sun8i_emac_eth_ofdata_to_platdata(struct 
udevice *dev)
int ret = 0;
 #endif
 
-   pdata->iobase = devfdt_get_addr_name(dev, "emac");
-   if (pdata->iobase == FDT_ADDR_T_NONE)
-   pdata->iobase = devfdt_get_addr(dev);
+   pdata->iobase = devfdt_get_addr(dev);
if (pdata->iobase == FDT_ADDR_T_NONE) {
debug("%s: Cannot find MAC base address\n", __func__);
return -EINVAL;
}
 
-   priv->sysctl_reg = devfdt_get_addr_name(dev, "syscon");
-   if (priv->sysctl_reg == FDT_ADDR_T_NONE) {
-   const fdt32_t *reg;
-
-   offset = fdtdec_lookup_phandle(gd->fdt_blob, node, "syscon");
-   if (offset < 0) {
-   debug("%s: cannot find syscon node\n", __func__);
-   return -EINVAL;
-   }
-   reg = fdt_getprop(gd->fdt_blob, offset, "reg", NULL);
-   if (!reg) {
-   debug("%s: cannot find reg property in syscon node\n",
- __func__);
-   return -EINVAL;
-   }
-   priv->sysctl_reg = fdt_translate_address((void *)gd->fdt_blob,
-offset, reg);
-   } else
-   priv->sysctl_reg -= 0x30;
+   offset = fdtdec_lookup_phandle(gd->fdt_blob, node, "syscon");
+   if (offset < 0) {
+   debug("%s: cannot find syscon node\n", __func__);
+   return -EINVAL;
+   }
+   reg = fdt_getprop(gd->fdt_blob, offset, "reg", NULL);
+   if (!reg) {
+   debug("%s: cannot find reg property in syscon node\n",
+ __func__);
+   return -EINVAL;
+   }
+   priv->sysctl_reg = fdt_translate_address((void *)gd->fdt_blob,
+offset, reg);
if (priv->sysctl_reg == FDT_ADDR_T_NONE) {
debug("%s: Cannot find syscon base 

[U-Boot] [PATCH v4 12/19] sunxi: DT: A64: update device tree file for Allwinner A64 SoC

[Andre Przywara]

Updates the device tree file from the the Linux tree as of v4.15-rc9,
exactly Linux commit:
commit 16416084e06e1ebff51a9e7721a8cc4ccc186f28
Author: Corentin Labbe 
Date:   Tue Oct 31 09:19:15 2017 +0100
arm64: dts: allwinner: add snps,dwmac-mdio compatible to emac/mdio

This also pulls in the newly required include files for the clock and
reset bindings.

Signed-off-by: Andre Przywara 
Acked-by: Maxime Ripard 
---
 arch/arm/dts/sun50i-a64-pine64-plus-u-boot.dtsi |  61 ++-
 arch/arm/dts/sun50i-a64.dtsi| 204 
 include/dt-bindings/clock/sun8i-r-ccu.h |  59 +++
 include/dt-bindings/reset/sun8i-r-ccu.h |  53 ++
 4 files changed, 299 insertions(+), 78 deletions(-)
 create mode 100644 include/dt-bindings/clock/sun8i-r-ccu.h
 create mode 100644 include/dt-bindings/reset/sun8i-r-ccu.h

diff --git a/arch/arm/dts/sun50i-a64-pine64-plus-u-boot.dtsi 
b/arch/arm/dts/sun50i-a64-pine64-plus-u-boot.dtsi
index 32a263ce3d..1b8aa3d8dc 100644
--- a/arch/arm/dts/sun50i-a64-pine64-plus-u-boot.dtsi
+++ b/arch/arm/dts/sun50i-a64-pine64-plus-u-boot.dtsi
@@ -2,58 +2,19 @@
aliases {
ethernet0 = 
};
-
-   soc {
-   syscon: syscon@1c0 {
-   compatible = "allwinner,sun50i-a64-system-controller",
-"syscon";
-   reg = <0x01c0 0x1000>;
-   };
-
-   emac: ethernet@1c3 {
-   compatible = "allwinner,sun50i-a64-emac";
-   syscon = <>;
-   reg = <0x01c3 0x1>;
-   interrupts = ;
-   interrupt-names = "macirq";
-   resets = < RST_BUS_EMAC>;
-   reset-names = "stmmaceth";
-   clocks = < CLK_BUS_EMAC>;
-   clock-names = "stmmaceth";
-   #address-cells = <1>;
-   #size-cells = <0>;
-   pinctrl-names = "default";
-   pinctrl-0 = <_pins>;
-   phy-mode = "rgmii";
-   phy-handle = <_rgmii_phy>;
-   status = "okay";
-
-   mdio: mdio {
-   compatible = "snps,dwmac-mdio";
-   #address-cells = <1>;
-   #size-cells = <0>;
-   ext_rgmii_phy: ethernet-phy@1 {
-   compatible = 
"ethernet-phy-ieee802.3-c22";
-   reg = <1>;
-   };
-   };
-   };
-   };
 };
 
- {
-   rmii_pins: rmii_pins {
-   pins = "PD10", "PD11", "PD13", "PD14", "PD17",
-  "PD18", "PD19", "PD20", "PD22", "PD23";
-   function = "emac";
-   drive-strength = <40>;
-   };
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+   phy-mode = "rgmii";
+   phy-handle = <_rgmii_phy>;
+   status = "okay";
+};
 
-   rgmii_pins: rgmii_pins {
-   pins = "PD8", "PD9", "PD10", "PD11", "PD12",
-  "PD13", "PD15", "PD16", "PD17", "PD18",
-  "PD19", "PD20", "PD21", "PD22", "PD23";
-   function = "emac";
-   drive-strength = <40>;
+ {
+   ext_rgmii_phy: ethernet-phy@1 {
+   compatible = "ethernet-phy-ieee802.3-c22";
+   reg = <1>;
};
 };
diff --git a/arch/arm/dts/sun50i-a64.dtsi b/arch/arm/dts/sun50i-a64.dtsi
index 65a344d9ce..d783d164b9 100644
--- a/arch/arm/dts/sun50i-a64.dtsi
+++ b/arch/arm/dts/sun50i-a64.dtsi
@@ -43,6 +43,7 @@
  */
 
 #include 
+#include 
 #include 
 #include 
 
@@ -129,6 +130,23 @@
#size-cells = <1>;
ranges;
 
+   syscon: syscon@1c0 {
+   compatible = "allwinner,sun50i-a64-system-controller",
+   "syscon";
+   reg = <0x01c0 0x1000>;
+   };
+
+   dma: dma-controller@1c02000 {
+   compatible = "allwinner,sun50i-a64-dma";
+   reg = <0x01c02000 0x1000>;
+   interrupts = ;
+   clocks = < CLK_BUS_DMA>;
+   dma-channels = <8>;
+   dma-requests = <27>;
+   resets = < RST_BUS_DMA>;
+   #dma-cells = <1>;
+   };
+
mmc0: mmc@1c0f000 {
compatible = "allwinner,sun50i-a64-mmc";
reg = <0x01c0f000 0x1000>;
@@ -171,7 +189,7 @@
#size-cells = <0>;
};
 
-   usb_otg: usb@01c19000 {
+  

[U-Boot] [PATCH v4 17/19] sunxi: DT: H3: update libre-cc board .dts file

[Andre Przywara]

Update the board DT file to match the updated h3.dtsi base.
This file is not (yet?) in Linux, so we can't update from there
directly.

Signed-off-by: Andre Przywara 
Acked-by: Maxime Ripard 
---
 arch/arm/dts/sun8i-h3-libretech-all-h3-cc.dts | 8 
 1 file changed, 8 insertions(+)

diff --git a/arch/arm/dts/sun8i-h3-libretech-all-h3-cc.dts 
b/arch/arm/dts/sun8i-h3-libretech-all-h3-cc.dts
index c8fd69f0a4..cb3ecddb33 100644
--- a/arch/arm/dts/sun8i-h3-libretech-all-h3-cc.dts
+++ b/arch/arm/dts/sun8i-h3-libretech-all-h3-cc.dts
@@ -112,6 +112,10 @@
};
 };
 
+ {
+   status = "okay";
+};
+
  {
status = "okay";
 };
@@ -147,6 +151,10 @@
status = "okay";
 };
 
+ {
+   status = "okay";
+};
+
  {
status = "okay";
 };
-- 
2.14.1

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[U-Boot] [PATCH v4 11/19] Revert "sunxi: Pine64: temporarily remove extra Pine64 non-plus DT"

[Andre Przywara]

Now with the MMC environment gone, we have enough space to accomodate
the Pine64 "non-plus" .dtb again.

This reverts commit 47952b8e42c2790150e16d3d4235b3a1ee0ba9bb.

Signed-off-by: Andre Przywara 
---
 configs/pine64_plus_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/configs/pine64_plus_defconfig b/configs/pine64_plus_defconfig
index aef8c7d7a9..41ccff139d 100644
--- a/configs/pine64_plus_defconfig
+++ b/configs/pine64_plus_defconfig
@@ -10,6 +10,7 @@ CONFIG_SPL=y
 # CONFIG_SPL_DOS_PARTITION is not set
 # CONFIG_SPL_ISO_PARTITION is not set
 # CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_OF_LIST="sun50i-a64-pine64 sun50i-a64-pine64-plus"
 CONFIG_SUN8I_EMAC=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
-- 
2.14.1

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[U-Boot] [PATCH v4 03/19] net: sun8i-emac: support new pinctrl DT bindings

[Andre Przywara]

The Linux kernel driver for the Allwinner pin controller gained support
for generic properties, which are now also used in the DTs.
The sun8i-emac Ethernet driver for new Allwinner MACs reads the pins from
the DT, but so far only supported the old binding.
Update the parsing routine to cope with both the old and new bindings,
so that the newer DTs can be used with U-Boot and its Ethernet driver.

Signed-off-by: Andre Przywara 
Acked-by: Maxime Ripard 
---
 drivers/net/sun8i_emac.c | 52 
 1 file changed, 39 insertions(+), 13 deletions(-)

diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c
index be43472b1a..c8c8ef73e9 100644
--- a/drivers/net/sun8i_emac.c
+++ b/drivers/net/sun8i_emac.c
@@ -21,6 +21,7 @@
 #include 
 #include 
 #include 
+#include 
 #ifdef CONFIG_DM_GPIO
 #include 
 #endif
@@ -465,30 +466,55 @@ static int parse_phy_pins(struct udevice *dev)
}
 
drive = fdt_getprop_u32_default_node(gd->fdt_blob, offset, 0,
-"allwinner,drive", 4);
-   pull = fdt_getprop_u32_default_node(gd->fdt_blob, offset, 0,
-   "allwinner,pull", 0);
+"drive-strength", ~0);
+   if (drive != ~0) {
+   if (drive <= 10)
+   drive = SUN4I_PINCTRL_10_MA;
+   else if (drive <= 20)
+   drive = SUN4I_PINCTRL_20_MA;
+   else if (drive <= 30)
+   drive = SUN4I_PINCTRL_30_MA;
+   else
+   drive = SUN4I_PINCTRL_40_MA;
+   } else {
+   drive = fdt_getprop_u32_default_node(gd->fdt_blob, offset, 0,
+"allwinner,drive", 4);
+   }
+
+   if (fdt_get_property(gd->fdt_blob, offset, "bias-pull-up", NULL))
+   pull = SUN4I_PINCTRL_PULL_UP;
+   else if (fdt_get_property(gd->fdt_blob, offset, "bias-disable", NULL))
+   pull = SUN4I_PINCTRL_NO_PULL;
+   else if (fdt_get_property(gd->fdt_blob, offset, "bias-pull-down", NULL))
+   pull = SUN4I_PINCTRL_PULL_DOWN;
+   else
+   pull = fdt_getprop_u32_default_node(gd->fdt_blob, offset, 0,
+   "allwinner,pull", 0);
for (i = 0; ; i++) {
int pin;
 
pin_name = fdt_stringlist_get(gd->fdt_blob, offset,
  "allwinner,pins", i, NULL);
-   if (!pin_name)
-   break;
-   if (pin_name[0] != 'P')
-   continue;
-   pin = (pin_name[1] - 'A') << 5;
-   if (pin >= 26 << 5)
+   if (!pin_name) {
+   pin_name = fdt_stringlist_get(gd->fdt_blob, offset,
+ "pins", i, NULL);
+   if (!pin_name)
+   break;
+   }
+
+   pin = sunxi_name_to_gpio(pin_name);
+   if (pin < 0)
continue;
-   pin += simple_strtol(_name[2], NULL, 10);
 
sunxi_gpio_set_cfgpin(pin, SUN8I_GPD8_GMAC);
-   sunxi_gpio_set_drv(pin, drive);
-   sunxi_gpio_set_pull(pin, pull);
+   if (drive != ~0)
+   sunxi_gpio_set_drv(pin, drive);
+   if (pull != ~0)
+   sunxi_gpio_set_pull(pin, pull);
}
 
if (!i) {
-   printf("WARNING: emac: cannot find allwinner,pins property\n");
+   printf("WARNING: emac: cannot find pins property\n");
return -2;
}
 
-- 
2.14.1

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[U-Boot] [PATCH v4 07/19] arm: dts: sunxi: update H5 to new EMAC binding

[Andre Przywara]

The U-Boot driver for the sun8i-emac was using some preliminary DT
binding. Now since Linux got its own driver in v4.15 and our driver
can now cope with both bindings, let's convert the DT nodes used by the
OrangePi PC2 over to the new bindings used by the kernel.

Signed-off-by: Andre Przywara 
Acked-by: Maxime Ripard 
---
 arch/arm/dts/sun50i-h5-orangepi-pc2.dts | 7 +--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/arch/arm/dts/sun50i-h5-orangepi-pc2.dts 
b/arch/arm/dts/sun50i-h5-orangepi-pc2.dts
index 780d59a096..d1c347d2b8 100644
--- a/arch/arm/dts/sun50i-h5-orangepi-pc2.dts
+++ b/arch/arm/dts/sun50i-h5-orangepi-pc2.dts
@@ -108,10 +108,13 @@
pinctrl-names = "default";
pinctrl-0 = <_rgmii_pins>;
phy-mode = "rgmii";
-   phy = <>;
+   phy-handle = <_rgmii_phy>;
status = "okay";
+};
 
-   phy1: ethernet-phy@1 {
+_mdio {
+   ext_rgmii_phy: ethernet-phy@1 {
+   compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
};
 };
-- 
2.14.1

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[U-Boot] [PATCH v4 10/19] sunxi: revert disabling of features

[Andre Przywara]

In January some commits were introduced to mitigate the U-Boot image
size issues we encountered on sunxi builds.
Now with the MMC environment removed we can bring them back, as we
practically don't have a size limit anymore.

Signed-off-by: Andre Przywara 
Acked-by: Maxime Ripard 
---
 cmd/Kconfig   | 5 -
 drivers/video/Kconfig | 2 --
 lib/Kconfig   | 1 -
 3 files changed, 8 deletions(-)

diff --git a/cmd/Kconfig b/cmd/Kconfig
index 136836d146..27086df09b 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -426,7 +426,6 @@ menu "Memory commands"
 config CMD_CRC32
bool "crc32"
select HASH
-   default n if ARCH_SUNXI
default y
help
  Compute CRC32.
@@ -568,7 +567,6 @@ config CMD_LZMADEC
 
 config CMD_UNZIP
bool "unzip"
-   default n if ARCH_SUNXI
default y if CMD_BOOTI
help
  Uncompress a zip-compressed memory region.
@@ -780,14 +778,12 @@ config CMD_I2C
 
 config CMD_LOADB
bool "loadb"
-   default n if ARCH_SUNXI
default y
help
  Load a binary file over serial line.
 
 config CMD_LOADS
bool "loads"
-   default n if ARCH_SUNXI
default y
help
  Load an S-Record file over serial line
@@ -1187,7 +1183,6 @@ config CMD_GETTIME
 # TODO: rename to CMD_SLEEP
 config CMD_MISC
bool "sleep"
-   default n if ARCH_SUNXI
default y
help
  Delay execution for some time
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 2fc0defcd0..45a105db06 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -38,7 +38,6 @@ config BACKLIGHT_GPIO
 config VIDEO_BPP8
bool "Support 8-bit-per-pixel displays"
depends on DM_VIDEO
-   default n if ARCH_SUNXI
default y if DM_VIDEO
help
  Support drawing text and bitmaps onto a 8-bit-per-pixel display.
@@ -49,7 +48,6 @@ config VIDEO_BPP8
 config VIDEO_BPP16
bool "Support 16-bit-per-pixel displays"
depends on DM_VIDEO
-   default n if ARCH_SUNXI
default y if DM_VIDEO
help
  Support drawing text and bitmaps onto a 16-bit-per-pixel display.
diff --git a/lib/Kconfig b/lib/Kconfig
index 4fd41c4282..ab581f172f 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -66,7 +66,6 @@ config PANIC_HANG
 
 config REGEX
bool "Enable regular expression support"
-   default n if ARCH_SUNXI
default y if NET
help
  If this variable is defined, U-Boot is linked against the
-- 
2.14.1

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[U-Boot] [PATCH v4 16/19] sunxi: DT: H3: update board .dts files from Linux

[Andre Przywara]

Update the .dts file for the various boards with an Allwinner H3 SoC.
This is as of v4.15-rc9, exactly Linux commit:
commit 4904337fe34fa7fc529d6f4d9ee8b96fe7db310a
Author: Corentin Labbe 
Date:   Tue Oct 31 09:19:12 2017 +0100
ARM: dts: sunxi: Restore EMAC changes (boards)

Signed-off-by: Andre Przywara 
Acked-by: Maxime Ripard 
---
 arch/arm/dts/sun8i-h3-bananapi-m2-plus.dts | 76 +--
 arch/arm/dts/sun8i-h3-nanopi-m1-plus.dts   | 71 +
 arch/arm/dts/sun8i-h3-nanopi-m1.dts|  6 +++
 arch/arm/dts/sun8i-h3-nanopi-neo-air.dts   |  1 -
 arch/arm/dts/sun8i-h3-orangepi-2.dts   | 60 -
 arch/arm/dts/sun8i-h3-orangepi-lite.dts| 25 -
 arch/arm/dts/sun8i-h3-orangepi-one.dts | 65 +--
 arch/arm/dts/sun8i-h3-orangepi-pc-plus.dts |  9 +++-
 arch/arm/dts/sun8i-h3-orangepi-pc.dts  | 83 ++
 arch/arm/dts/sun8i-h3-orangepi-plus.dts| 29 +--
 arch/arm/dts/sun8i-h3-orangepi-plus2e.dts  | 15 +-
 11 files changed, 302 insertions(+), 138 deletions(-)

diff --git a/arch/arm/dts/sun8i-h3-bananapi-m2-plus.dts 
b/arch/arm/dts/sun8i-h3-bananapi-m2-plus.dts
index 06fddaae8e..f2292deaa5 100644
--- a/arch/arm/dts/sun8i-h3-bananapi-m2-plus.dts
+++ b/arch/arm/dts/sun8i-h3-bananapi-m2-plus.dts
@@ -46,13 +46,13 @@
 
 #include 
 #include 
-#include 
 
 / {
model = "Banana Pi BPI-M2-Plus";
compatible = "sinovoip,bpi-m2-plus", "allwinner,sun8i-h3";
 
aliases {
+   ethernet0 = 
serial0 = 
serial1 = 
};
@@ -64,7 +64,6 @@
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
-   pinctrl-0 = <_led_bpi_m2p>;
 
pwr_led {
label = "bananapi-m2-plus:red:pwr";
@@ -76,7 +75,6 @@
gpio_keys {
compatible = "gpio-keys";
pinctrl-names = "default";
-   pinctrl-0 = <_r_bpi_m2p>;
 
sw4 {
label = "power";
@@ -85,14 +83,27 @@
};
};
 
+   reg_gmac_3v3: gmac-3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "gmac-3v3";
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
+ startup-delay-us = <10>;
+ enable-active-high;
+ gpio = < 3 6 GPIO_ACTIVE_HIGH>;
+   };
+
wifi_pwrseq: wifi_pwrseq {
compatible = "mmc-pwrseq-simple";
pinctrl-names = "default";
-   pinctrl-0 = <_en_bpi_m2p>;
reset-gpios = <_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
};
 };
 
+ {
+   status = "okay";
+};
+
  {
status = "okay";
 };
@@ -101,6 +112,24 @@
status = "okay";
 };
 
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_rgmii_pins>;
+   phy-supply = <_gmac_3v3>;
+   phy-handle = <_rgmii_phy>;
+   phy-mode = "rgmii";
+
+   allwinner,leds-active-low;
+   status = "okay";
+};
+
+_mdio {
+   ext_rgmii_phy: ethernet-phy@1 {
+   compatible = "ethernet-phy-ieee802.3-c22";
+   reg = <0>;
+   };
+};
+
  {
pinctrl-names = "default";
pinctrl-0 = <_pins_a>;
@@ -127,7 +156,7 @@
non-removable;
status = "okay";
 
-   brcmf: bcrmf@1 {
+   brcmf: wifi@1 {
reg = <1>;
compatible = "brcm,bcm4329-fmac";
interrupt-parent = <>;
@@ -146,6 +175,10 @@
status = "okay";
 };
 
+ {
+   status = "okay";
+};
+
  {
status = "okay";
 };
@@ -154,27 +187,9 @@
status = "okay";
 };
 
-_pio {
-   pwr_led_bpi_m2p: led_pins@0 {
-   allwinner,pins = "PL10";
-   allwinner,function = "gpio_out";
-   allwinner,drive = ;
-   allwinner,pull = ;
-   };
-
-   sw_r_bpi_m2p: key_pins@0 {
-   allwinner,pins = "PL3";
-   allwinner,function = "gpio_in";
-   allwinner,drive = ;
-   allwinner,pull = ;
-   };
-
-   wifi_en_bpi_m2p: wifi_en_pin {
-   allwinner,pins = "PL7";
-   allwinner,function = "gpio_out";
-   allwinner,drive = ;
-   allwinner,pull = ;
-   };
+_usb0_vbus {
+   gpio = < 3 11 GPIO_ACTIVE_HIGH>; /* PD11 */
+   status = "okay";
 };
 
  {
@@ -189,7 +204,14 @@
status = "okay";
 };
 
+_otg {
+   dr_mode = "otg";
+   status = "okay";
+};
+
  {
-   /* USB VBUS is on as long as VCC-IO is on */
+   usb0_id_det-gpios = <_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
+   usb0_vbus-supply = <_usb0_vbus>;
+   /* USB host VBUS is on as long as VCC-IO is on */
status = "okay";
 

[U-Boot] [PATCH v4 04/19] net: sun8i-emac: add support for new EMAC DT binding

[Andre Przywara]

The Ethernet MAC used in newer Allwinner SoCs (H3, A64, H5) got an
upstream Linux driver in v4.15.
This one uses a slightly different binding from the original one used
by the U-Boot driver.
The differences to the old binding are:
- The "syscon" address is held in a separate node, referenced via a
  phandle in the "syscon" property.
- The reference to the PHY is held in a property called "phy-handle",
  not "phy".
- The PHY register is at offset 0x30 in the syscon device, not at 0.
- The internal PHY is activated when the node, which phy-handle points
  to, is a child node of an "allwinner,sun8i-h3-mdio-internal" node.

Teach the U-Boot driver how to find its resources in a "new-style" DT,
so that we can use a Linux kernel compatible DT for U-Boot as well.
This keeps support for the old binding for now, to allow a smooth
transition.

Signed-off-by: Andre Przywara 
Acked-by: Maxime Ripard 
---
 drivers/net/sun8i_emac.c | 55 ++--
 1 file changed, 48 insertions(+), 7 deletions(-)

diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c
index c8c8ef73e9..221e95edc0 100644
--- a/drivers/net/sun8i_emac.c
+++ b/drivers/net/sun8i_emac.c
@@ -279,7 +279,7 @@ static int sun8i_emac_set_syscon(struct emac_eth_dev *priv)
int ret;
u32 reg;
 
-   reg = readl(priv->sysctl_reg);
+   reg = readl(priv->sysctl_reg + 0x30);
 
if (priv->variant == H3_EMAC) {
ret = sun8i_emac_set_syscon_ephy(priv, );
@@ -310,7 +310,7 @@ static int sun8i_emac_set_syscon(struct emac_eth_dev *priv)
return -EINVAL;
}
 
-   writel(reg, priv->sysctl_reg);
+   writel(reg, priv->sysctl_reg + 0x30);
 
return 0;
 }
@@ -806,17 +806,50 @@ static int sun8i_emac_eth_ofdata_to_platdata(struct 
udevice *dev)
 #endif
 
pdata->iobase = devfdt_get_addr_name(dev, "emac");
+   if (pdata->iobase == FDT_ADDR_T_NONE)
+   pdata->iobase = devfdt_get_addr(dev);
+   if (pdata->iobase == FDT_ADDR_T_NONE) {
+   debug("%s: Cannot find MAC base address\n", __func__);
+   return -EINVAL;
+   }
+
priv->sysctl_reg = devfdt_get_addr_name(dev, "syscon");
+   if (priv->sysctl_reg == FDT_ADDR_T_NONE) {
+   const fdt32_t *reg;
+
+   offset = fdtdec_lookup_phandle(gd->fdt_blob, node, "syscon");
+   if (offset < 0) {
+   debug("%s: cannot find syscon node\n", __func__);
+   return -EINVAL;
+   }
+   reg = fdt_getprop(gd->fdt_blob, offset, "reg", NULL);
+   if (!reg) {
+   debug("%s: cannot find reg property in syscon node\n",
+ __func__);
+   return -EINVAL;
+   }
+   priv->sysctl_reg = fdt_translate_address((void *)gd->fdt_blob,
+offset, reg);
+   } else
+   priv->sysctl_reg -= 0x30;
+   if (priv->sysctl_reg == FDT_ADDR_T_NONE) {
+   debug("%s: Cannot find syscon base address\n", __func__);
+   return -EINVAL;
+   }
 
pdata->phy_interface = -1;
priv->phyaddr = -1;
priv->use_internal_phy = false;
 
-   offset = fdtdec_lookup_phandle(gd->fdt_blob, node,
-  "phy");
-   if (offset > 0)
-   priv->phyaddr = fdtdec_get_int(gd->fdt_blob, offset, "reg",
-  -1);
+   offset = fdtdec_lookup_phandle(gd->fdt_blob, node, "phy");
+   if (offset < 0)
+   offset = fdtdec_lookup_phandle(gd->fdt_blob, node,
+  "phy-handle");
+   if (offset < 0) {
+   debug("%s: Cannot find PHY address\n", __func__);
+   return -EINVAL;
+   }
+   priv->phyaddr = fdtdec_get_int(gd->fdt_blob, offset, "reg", -1);
 
phy_mode = fdt_getprop(gd->fdt_blob, node, "phy-mode", NULL);
 
@@ -841,6 +874,14 @@ static int sun8i_emac_eth_ofdata_to_platdata(struct 
udevice *dev)
if (fdt_getprop(gd->fdt_blob, node,
"allwinner,use-internal-phy", NULL))
priv->use_internal_phy = true;
+   else {
+   int parent = fdt_parent_offset(gd->fdt_blob, offset);
+
+   if (parent >= 0 &&
+   !fdt_node_check_compatible(gd->fdt_blob, parent,
+   "allwinner,sun8i-h3-mdio-internal"))
+   priv->use_internal_phy = true;
+   }
}
 
priv->interface = pdata->phy_interface;
-- 
2.14.1

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[U-Boot] [PATCH v4 05/19] arm: dts: sunxi: update A64 to new EMAC binding

[Andre Przywara]

The U-Boot driver for the sun8i-emac was using some preliminary DT
binding. Now since Linux got its own driver in v4.15 and our driver
can now cope with both bindings, let's convert the DT nodes used for the
Pine64+ board over to the new bindings used by the kernel.

Signed-off-by: Andre Przywara 
Acked-by: Maxime Ripard 
---
 arch/arm/dts/sun50i-a64-pine64-plus-u-boot.dtsi | 51 +++--
 1 file changed, 30 insertions(+), 21 deletions(-)

diff --git a/arch/arm/dts/sun50i-a64-pine64-plus-u-boot.dtsi 
b/arch/arm/dts/sun50i-a64-pine64-plus-u-boot.dtsi
index 9c61beac01..32a263ce3d 100644
--- a/arch/arm/dts/sun50i-a64-pine64-plus-u-boot.dtsi
+++ b/arch/arm/dts/sun50i-a64-pine64-plus-u-boot.dtsi
@@ -4,25 +4,38 @@
};
 
soc {
-   emac: ethernet@01c3 {
+   syscon: syscon@1c0 {
+   compatible = "allwinner,sun50i-a64-system-controller",
+"syscon";
+   reg = <0x01c0 0x1000>;
+   };
+
+   emac: ethernet@1c3 {
compatible = "allwinner,sun50i-a64-emac";
-   reg = <0x01c3 0x2000>, <0x01c00030 0x4>;
-   reg-names = "emac", "syscon";
+   syscon = <>;
+   reg = <0x01c3 0x1>;
interrupts = ;
+   interrupt-names = "macirq";
resets = < RST_BUS_EMAC>;
-   reset-names = "ahb";
+   reset-names = "stmmaceth";
clocks = < CLK_BUS_EMAC>;
-   clock-names = "ahb";
+   clock-names = "stmmaceth";
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <_pins>;
phy-mode = "rgmii";
-   phy = <>;
+   phy-handle = <_rgmii_phy>;
status = "okay";
 
-   phy1: ethernet-phy@1 {
-   reg = <1>;
+   mdio: mdio {
+   compatible = "snps,dwmac-mdio";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   ext_rgmii_phy: ethernet-phy@1 {
+   compatible = 
"ethernet-phy-ieee802.3-c22";
+   reg = <1>;
+   };
};
};
};
@@ -30,21 +43,17 @@
 
  {
rmii_pins: rmii_pins {
-   allwinner,pins = "PD10", "PD11", "PD13", "PD14",
-"PD17", "PD18", "PD19", "PD20",
-"PD22", "PD23";
-   allwinner,function = "emac";
-   allwinner,drive = <3>;
-   allwinner,pull = <0>;
+   pins = "PD10", "PD11", "PD13", "PD14", "PD17",
+  "PD18", "PD19", "PD20", "PD22", "PD23";
+   function = "emac";
+   drive-strength = <40>;
};
 
rgmii_pins: rgmii_pins {
-   allwinner,pins = "PD8", "PD9", "PD10", "PD11",
-"PD12", "PD13", "PD15",
-"PD16", "PD17", "PD18", "PD19",
-"PD20", "PD21", "PD22", "PD23";
-   allwinner,function = "emac";
-   allwinner,drive = <3>;
-   allwinner,pull = <0>;
+   pins = "PD8", "PD9", "PD10", "PD11", "PD12",
+  "PD13", "PD15", "PD16", "PD17", "PD18",
+  "PD19", "PD20", "PD21", "PD22", "PD23";
+   function = "emac";
+   drive-strength = <40>;
};
 };
-- 
2.14.1

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[U-Boot] [PATCH v4 06/19] arm: dts: sunxi: update H3 to new EMAC binding

[Andre Przywara]

The U-Boot driver for the sun8i-emac was using some preliminary DT
binding. Now since Linux got its own driver in v4.15 and our driver
can now cope with both bindings, let's convert the DT nodes used by the
various H3 boards over to the new bindings used by the kernel.

Signed-off-by: Andre Przywara 
Acked-by: Maxime Ripard 
---
 arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts  |  6 +--
 arch/arm/dts/sun8i-h3-libretech-all-h3-cc.dts |  7 +--
 arch/arm/dts/sun8i-h3-nanopi-neo.dts  |  6 +--
 arch/arm/dts/sun8i-h3-orangepi-2.dts  |  7 +--
 arch/arm/dts/sun8i-h3-orangepi-one.dts|  7 +--
 arch/arm/dts/sun8i-h3-orangepi-pc.dts |  7 +--
 arch/arm/dts/sun8i-h3-orangepi-plus.dts   |  8 +++-
 arch/arm/dts/sun8i-h3-orangepi-plus2e.dts |  9 +++-
 arch/arm/dts/sun8i-h3.dtsi| 69 ---
 9 files changed, 75 insertions(+), 51 deletions(-)

diff --git a/arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts 
b/arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts
index 20d489cb2a..e0efcb3ba3 100644
--- a/arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts
+++ b/arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts
@@ -100,14 +100,10 @@
 };
 
  {
-   phy = <>;
+   phy-handle = <_mii_phy>;
phy-mode = "mii";
-   allwinner,use-internal-phy;
allwinner,leds-active-low;
status = "okay";
-   phy1: ethernet-phy@1 {
-   reg = <1>;
-   };
 };
 
  {
diff --git a/arch/arm/dts/sun8i-h3-libretech-all-h3-cc.dts 
b/arch/arm/dts/sun8i-h3-libretech-all-h3-cc.dts
index 97b993f636..c8fd69f0a4 100644
--- a/arch/arm/dts/sun8i-h3-libretech-all-h3-cc.dts
+++ b/arch/arm/dts/sun8i-h3-libretech-all-h3-cc.dts
@@ -125,15 +125,10 @@
 };
 
  {
-   phy = <>;
+   phy-handle = <_mii_phy>;
phy-mode = "mii";
-   allwinner,use-internal-phy;
allwinner,leds-active-low;
status = "okay";
-
-   phy1: ethernet-phy@1 {
-   reg = <1>;
-   };
 };
 
  {
diff --git a/arch/arm/dts/sun8i-h3-nanopi-neo.dts 
b/arch/arm/dts/sun8i-h3-nanopi-neo.dts
index 5113059098..78f6c24952 100644
--- a/arch/arm/dts/sun8i-h3-nanopi-neo.dts
+++ b/arch/arm/dts/sun8i-h3-nanopi-neo.dts
@@ -48,12 +48,8 @@
 };
 
  {
-   phy = <>;
+   phy-handle = <_mii_phy>;
phy-mode = "mii";
-   allwinner,use-internal-phy;
allwinner,leds-active-low;
status = "okay";
-   phy1: ethernet-phy@1 {
-   reg = <1>;
-   };
 };
diff --git a/arch/arm/dts/sun8i-h3-orangepi-2.dts 
b/arch/arm/dts/sun8i-h3-orangepi-2.dts
index caa1a6959c..d97fdacb35 100644
--- a/arch/arm/dts/sun8i-h3-orangepi-2.dts
+++ b/arch/arm/dts/sun8i-h3-orangepi-2.dts
@@ -55,6 +55,7 @@
aliases {
serial0 = 
/* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */
+   ethernet0 = 
ethernet1 = 
};
 
@@ -110,14 +111,10 @@
 };
 
  {
-   phy = <>;
+   phy-handle = <_mii_phy>;
phy-mode = "mii";
-   allwinner,use-internal-phy;
allwinner,leds-active-low;
status = "okay";
-   phy1: ethernet-phy@1 {
-   reg = <1>;
-   };
 };
 
  {
diff --git a/arch/arm/dts/sun8i-h3-orangepi-one.dts 
b/arch/arm/dts/sun8i-h3-orangepi-one.dts
index 8df5c74f04..adab1cbfc9 100644
--- a/arch/arm/dts/sun8i-h3-orangepi-one.dts
+++ b/arch/arm/dts/sun8i-h3-orangepi-one.dts
@@ -53,6 +53,7 @@
compatible = "xunlong,orangepi-one", "allwinner,sun8i-h3";
 
aliases {
+   ethernet0 = 
serial0 = 
};
 
@@ -95,14 +96,10 @@
 };
 
  {
-   phy = <>;
+   phy-handle = <_mii_phy>;
phy-mode = "mii";
-   allwinner,use-internal-phy;
allwinner,leds-active-low;
status = "okay";
-   phy1: ethernet-phy@1 {
-   reg = <1>;
-   };
 };
 
  {
diff --git a/arch/arm/dts/sun8i-h3-orangepi-pc.dts 
b/arch/arm/dts/sun8i-h3-orangepi-pc.dts
index b8340f74e7..afba264ea5 100644
--- a/arch/arm/dts/sun8i-h3-orangepi-pc.dts
+++ b/arch/arm/dts/sun8i-h3-orangepi-pc.dts
@@ -53,6 +53,7 @@
compatible = "xunlong,orangepi-pc", "allwinner,sun8i-h3";
 
aliases {
+   ethernet0 = 
serial0 = 
};
 
@@ -167,12 +168,8 @@
 };
 
  {
-   phy = <>;
+   phy-handle = <_mii_phy>;
phy-mode = "mii";
-   allwinner,use-internal-phy;
allwinner,leds-active-low;
status = "okay";
-   phy1: ethernet-phy@1 {
-   reg = <1>;
-   };
 };
diff --git a/arch/arm/dts/sun8i-h3-orangepi-plus.dts 
b/arch/arm/dts/sun8i-h3-orangepi-plus.dts
index e7079b26bc..136e4414a4 100644
--- a/arch/arm/dts/sun8i-h3-orangepi-plus.dts
+++ b/arch/arm/dts/sun8i-h3-orangepi-plus.dts
@@ -82,7 +82,13 @@
pinctrl-0 = <_rgmii_pins>;
phy-supply = <_gmac_3v3>;
phy-mode = "rgmii";
-   /delete-property/allwinner,use-internal-phy;
+};
+
+_mdio {
+   ext_rgmii_phy: 

[U-Boot] [PATCH v4 09/19] sunxi: disable direct MMC environment

[Andre Przywara]

Since the dawn of time for the Allwinner support in mainline U-Boot
we store the environment to the SD card and write directly at
544KB from the beginning of the device. This leads to problems when
the U-Boot proper image grows beyond 504KB and eventually overlaps.
With one release of having the environment preferably in a FAT
partition, let's now turn off the MMC variant fallback, so we get back
all the space we need to implement features.

Signed-off-by: Andre Przywara 
---
 env/Kconfig | 1 -
 1 file changed, 1 deletion(-)

diff --git a/env/Kconfig b/env/Kconfig
index a3c6298273..0c1e928f13 100644
--- a/env/Kconfig
+++ b/env/Kconfig
@@ -152,7 +152,6 @@ config ENV_IS_IN_MMC
bool "Environment in an MMC device"
depends on !CHAIN_OF_TRUST
depends on MMC
-   default y if ARCH_SUNXI
default y if ARCH_EXYNOS4
default y if MX6SX || MX7D
default y if TEGRA30 || TEGRA124
-- 
2.14.1

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[U-Boot] [PATCH v4 01/19] sunxi: README.sunxi64: Add hint about non-debug of ARM Trusted Firmware

[Andre Przywara]

As we are running into issues where the final U-Boot FIT image file is
exceeding our size limit, add a hint to the README.sunxi64 file
to point out the possibility of building non-debug versions of the ATF
binary. These are about 12KB smaller than the standard debug build, and
so allow successful U-Boot builds for many boards with the Allwinner H5
SoC.
Please note that under normal circumstances the debug build is still
recommended, as it gives valuable clues in case something goes wrong in
the ATF.

Signed-off-by: Andre Przywara 
Acked-by: Maxime Ripard 
---
 board/sunxi/README.sunxi64 | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/board/sunxi/README.sunxi64 b/board/sunxi/README.sunxi64
index 5a363d27b8..df1dbc818f 100644
--- a/board/sunxi/README.sunxi64
+++ b/board/sunxi/README.sunxi64
@@ -38,6 +38,12 @@ the root of your U-Boot build directory (or create a 
symbolic link).
 $ export BL31=/src/arm-trusted-firmware/build/sun50iw1p1/debug/bl31.bin
   (adjust the actual path accordingly)
 
+If you run into size issues with the resulting U-Boot image file, it might
+help to use a release build, by using "DEBUG=0" when building bl31.bin.
+As sometimes the ATF build process is a bit picky about the toolchain used,
+or if you can't be bothered with building ATF, there are known working
+binaries in the firmware repository[3], purely for convenience reasons.
+
  SPL/U-Boot
 
 Both U-Boot proper and the SPL are using the 64-bit mode. As the boot ROM
-- 
2.14.1

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[U-Boot] [PATCH v4 02/19] sunxi: gpio: add missing compatible strings

[Andre Przywara]

The sunxi GPIO driver is missing some compatible strings for recent
SoCs. While most of the sunxi GPIO code seems to not rely on this (and
so works anyway), the sunxi_name_to_gpio() function does and fails at
the moment (for instance when resolving the MMC CD pin name).
Add the compatible strings for the A64 and V3s, which were missing
from the list. This now covers all pinctrl nodes in our own DTs.

Signed-off-by: Andre Przywara 
Acked-by: Maxime Ripard 
---
 drivers/gpio/sunxi_gpio.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/gpio/sunxi_gpio.c b/drivers/gpio/sunxi_gpio.c
index 3cf01b6e36..ea6f3593b9 100644
--- a/drivers/gpio/sunxi_gpio.c
+++ b/drivers/gpio/sunxi_gpio.c
@@ -354,12 +354,15 @@ static const struct udevice_id sunxi_gpio_ids[] = {
ID("allwinner,sun8i-a83t-pinctrl",  a_all),
ID("allwinner,sun8i-h3-pinctrl",a_all),
ID("allwinner,sun8i-r40-pinctrl",   a_all),
+   ID("allwinner,sun8i-v3s-pinctrl",   a_all),
ID("allwinner,sun9i-a80-pinctrl",   a_all),
+   ID("allwinner,sun50i-a64-pinctrl",  a_all),
ID("allwinner,sun6i-a31-r-pinctrl", l_2),
ID("allwinner,sun8i-a23-r-pinctrl", l_1),
ID("allwinner,sun8i-a83t-r-pinctrl",l_1),
ID("allwinner,sun8i-h3-r-pinctrl",  l_1),
ID("allwinner,sun9i-a80-r-pinctrl", l_3),
+   ID("allwinner,sun50i-a64-r-pinctrl",l_1),
{ }
 };
 
-- 
2.14.1

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[U-Boot] [PATCH v4 00/19] sunxi: sync H3, H5, A64 DTs from mainline Linux

[Andre Przywara]

A minor update to the v3 version sent earlier this month.
I reworked patch 09 to drop the direct MMC environment for 32-bit Allwinner
boards as well and keep the current MMC offset.
For now I also dropped the two patches changing (back) the MMC regulator.
I still believe they are good to have and keep them as U-Boot specific
.dtsi files in my tree, possibly posting them later again.

As the previous version, this combines the EMAC DT support update with
an update of the full Linux kernel DTs for all H3, H5 and A64 boards.

Patch 01 leaves some hint in the README how to avoid the situation
when overrunning U-Boot's image size on 64-bit boards.
The old v2 EMAC DT update series is in patches 02-08, it prepares U-Boot's
EMAC driver for using the new DT binding used in Linux, also updates
the DTs to the new EMAC DT node already.

Changes to sync the whole of U-Boot's DT files for the H3, H5 and A64 SoCs
to those from Linux are in the following patches. However this first requires
lifting the space limit we currently have due to the raw MMC environment.
Patch 09 disables that for all sunxi boards, to give us finally some
space. Patches 10 and 11 consequently revert the disabling of features we
saw a few weeks ago to migitate the size problem.

Patches 12-19 then bring in the Linux DTs, split by SoCs, with the .dtsi
files first, then the board files.

Merging the H3 and H5 device tree files brings in significant changes,
also to the structure of the .dtsi files. However U-Boot's own DT usage
is pretty limited, so it doesn't matter.

The huge benefit of syncing the DTs is that we can use U-Boot's DT copy
to directly pass it to the kernel, avoiding to actually load a .dtb file
from somewhere. To allows seamless and automatic UEFI booting, so
distribution installer images should just work (TM).

As a goodie the final patch brings in the actual SoPine + baseboard DT
files, which we were completely missing so far.

This is based on sunxi/master (2d53018a0ef2).

Cheers,
Andre.

Changelog v3 .. v4:
- remove MMC environment for all Allwinner boards (including 32 bit ones)
- keep MMC environment offset to the old values
- drop DT adjustments to use fixed MMC regulator

Changelog v2 .. v3:
01: added, was on the list before
02: drop redundant H5 line
03-08: unchanged
09-20: added

Changelog v1 .. v2:
01, 02, 03: unchanged
04, 05, 06, 07: added

Andre Przywara (19):
  sunxi: README.sunxi64: Add hint about non-debug of ARM Trusted
Firmware
  sunxi: gpio: add missing compatible strings
  net: sun8i-emac: support new pinctrl DT bindings
  net: sun8i-emac: add support for new EMAC DT binding
  arm: dts: sunxi: update A64 to new EMAC binding
  arm: dts: sunxi: update H3 to new EMAC binding
  arm: dts: sunxi: update H5 to new EMAC binding
  net: sun8i-emac: remove support for old binding
  sunxi: disable direct MMC environment
  sunxi: revert disabling of features
  Revert "sunxi: Pine64: temporarily remove extra Pine64 non-plus DT"
  sunxi: DT: A64: update device tree file for Allwinner A64 SoC
  sunxi: DT: A64: update board .dts files from Linux
  sunxi: DT: update device tree files for Allwinner H3 and H5 SoCs
  sunxi: DT: H5: update board .dts files from Linux
  sunxi: DT: H3: update board .dts files from Linux
  sunxi: DT: H3: update libre-cc board .dts file
  sunxi: DT: H2+: update Opi-zero .dts
  sunxi: DT: A64: add proper SoPine baseboard device tree

 arch/arm/dts/Makefile   |   3 +-
 arch/arm/dts/axp803.dtsi| 150 +
 arch/arm/dts/sun50i-a64-bananapi-m64.dts| 161 +-
 arch/arm/dts/sun50i-a64-nanopi-a64.dts  | 108 +++-
 arch/arm/dts/sun50i-a64-olinuxino.dts   | 131 -
 arch/arm/dts/sun50i-a64-orangepi-win.dts|   7 +-
 arch/arm/dts/sun50i-a64-pine64-plus-u-boot.dtsi |  50 --
 arch/arm/dts/sun50i-a64-pine64-plus.dts |  17 +-
 arch/arm/dts/sun50i-a64-pine64.dts  | 178 +-
 arch/arm/dts/sun50i-a64-sopine-baseboard.dts| 150 +
 arch/arm/dts/sun50i-a64-sopine.dtsi | 142 +
 arch/arm/dts/sun50i-a64.dtsi| 204 ++-
 arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts | 105 +++-
 arch/arm/dts/sun50i-h5-nanopi-neo2.dts  |  89 ++-
 arch/arm/dts/sun50i-h5-orangepi-pc2.dts | 170 --
 arch/arm/dts/sun50i-h5-orangepi-prime.dts   | 164 +-
 arch/arm/dts/sun50i-h5-orangepi-zero-plus2.dts  |   7 +-
 arch/arm/dts/sun50i-h5.dtsi |  36 +-
 arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts|  58 +-
 arch/arm/dts/sun8i-h3-bananapi-m2-plus.dts  |  78 ++-
 arch/arm/dts/sun8i-h3-libretech-all-h3-cc.dts   |  15 +-
 arch/arm/dts/sun8i-h3-nanopi-m1-plus.dts|  71 +++
 arch/arm/dts/sun8i-h3-nanopi-m1.dts |   6 +
 arch/arm/dts/sun8i-h3-nanopi-neo-air.dts|   1 -
 arch/arm/dts/sun8i-h3-nanopi-neo.dts|   6 +-
 arch/arm/dts/sun8i-h3-orangepi-2.dts|  67 ++-
 arch/arm/dts/sun8i-h3-orangepi-lite.dts | 

Re: [U-Boot] [PULL] Please pull u-boot-rockchip

[Tom Rini]

On Tue, Mar 13, 2018 at 11:22:28PM +0100, Dr. Philipp Tomsich wrote:

> Tom,
> 
> Please pull the following changes (rebased from what was previously our 
> next-branch) from u-boot-rockchip/master.
> The respective run on TravisCI is 
> https://travis-ci.org/ptomsich/u-boot-rockchip/builds/352948410.
> 
> Thanks,
> Philipp.
> 
> The following changes since commit f95ab1fb6e37f0601f397091bb011edf7a98b890:
> 
>   Prepare v2018.03 (2018-03-13 08:02:19 -0400)
> 
> are available in the git repository at:
> 
>   git://git.denx.de/u-boot-rockchip.git master
> 
> for you to fetch changes up to 1e84e44cfec952006f30c42bbab5d7e170776549:
> 
>   rk3288: vyasa: Add eMMC boot support (2018-03-13 18:12:36 +0100)
> 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [U-Boot] Please pull u-boot-video/next

[Tom Rini]

On Tue, Mar 13, 2018 at 10:31:58PM +0100, Anatolij Gustschin wrote:

> Hi Tom,
> 
> The following changes since commit 5e62f828256d66e2b28def4f9ef20a2a05c2d04f:
> 
>   Prepare v2018.03-rc4 (2018-03-05 20:27:08 -0500)
> 
> are available in the git repository at:
> 
>   git://git.denx.de/u-boot-video.git next
> 
> for you to fetch changes up to d06717f853cd98a6a4536e5de5248e6c99a2b7bc:
> 
>   sunxi: video: mark framebuffer as EFI reserved memory (2018-03-09 18:24:49 
> +0100)
> 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [U-Boot] [PATCH v2 7/7] test/py: add spi_flash tests

[Liam Beguin]

Hi Stephen,

On 13 March 2018 at 17:41, Stephen Warren  wrote:
> On 03/04/2018 09:22 PM, Liam Beguin wrote:
>>
>> Add basic tests for the spi_flash subsystem.
>
>
> Looks good. A few small issues:
>
>> +def sf_prepare(u_boot_console, env__sf_config):
>
> ...
>>
>> +speed = env__sf_config.get('speed', 0)
>> +if isinstance(speed, list) and len(speed) == 2:
>> +sf_params['speed'] = random.randint(speed[0], speed[1])
>> +else:
>> +sf_params['speed'] = speed
>
>
> What if speed is a tuple or other indexable type not a list? Perhaps invert
> the test. Also, perhaps assume any list has two entries, or assert that.
>
> if isintance(speed, int):
>   int case
> else:
>   assert len(speed) == 2, "Speed must have two entries"
>   list/tuple case
>

Right, that's better!

>> +assert env__sf_config['offset'] is not None, \
>> +'\'offset\' is required for this test.'
>
>
> Is this meant to test for:
> a) A key that's present, with value set to None.
> b) A missing key.
>
> It currently tests (a), but testing for (b) seems more likely to catch
> issues. Perhaps:
>
> assert env__sf_config.get('offset', None) is not None
>
> or:
>
> assert 'offset' in env__sf_config.get
>

Thanks for seeing this, will fix.

>> +assert not (env__sf_config.get('writeable', False) and
>> +env__sf_config.get('crc32', False)), \
>> +'Cannot check crc32 on  writeable sections'
>
>
> What if the crc32 value is 0, which IIRC is False? Unlikely admittedly, but
> you never know. Perhaps:
>
> assert not (env__sf_config.get('writeable', False) and
> 'crc32' in env__sf_config.get), \
> 'Cannot check crc32 on  writeable sections'
>

Ok

>> +def sf_read(u_boot_console, env__sf_config, sf_params):
>> +addr = sf_params['ram_base']
>> +offset = env__sf_config['offset']
>> +count = sf_params['len']
>> +pattern = random.randint(0, 0x)
>
>
> 0xFF not 0x since it's bytes.
>

Will fix across file...

>> +crc_expected = env__sf_config.get('crc32', None)
>> +
>> +cmd = 'mw.b %08x %08x %x' % (addr, pattern, count)
>
>
> %02x for pattern.
>
>> +u_boot_console.run_command(cmd)
>> +crc_read = u_boot_utils.crc32(u_boot_console, addr, count)
>
>
> crc_read sounds like a CRC for data that's been read. Perhaps crc_pattern?

crc_pattern sounds good.

>
>> +def sf_update(u_boot_console, env__sf_config, sf_params):
>> +addr = sf_params['ram_base']
>> +offset = env__sf_config['offset']
>> +count = sf_params['len']
>> +pattern = int(random.random() * 0x)
>
>
> 0xFF.
>
>> +cmd = 'mw.b %08x %08x %x' % (addr, pattern, count)
>
>
> %02x for pattern.
>
>> +u_boot_console.run_command(cmd)
>> +crc_read = u_boot_utils.crc32(u_boot_console, addr, count)
>
>
> crc_pattern?
>
>> +def test_sf_erase(u_boot_console, env__sf_config):
>
> ...
>>
>> +cmd = 'mw.b %08x  %x' % (addr, count)
>
>
> Just ff not ?
>
>> +@pytest.mark.buildconfigspec('cmd_sf')
>> +@pytest.mark.buildconfigspec('cmd_memory')
>> +def test_sf_update(u_boot_console, env__sf_config):
>
>
> sf_update() unconditionally calls u_boot_utils.crc32 which asserts if the
> crc32 command isn't available, so this function needs to be
> @pytest.mark.buildconfigspec('cmd_crc32').

You're right, I missed this one...

Thanks for taking the time to review this series,
Liam Beguin
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Re: [U-Boot] [PATCH 3/3] test/py: add spi_flash tests

[Liam Beguin]

Hi Stephen,

On Tue, 13 Mar 2018 at 17:22 Stephen Warren  wrote:

> On 03/03/2018 09:32 AM, Liam Beguin wrote:
> > On 1 March 2018 at 16:56, Stephen Warren  wrote:
> >> On 02/26/2018 09:17 PM, Liam Beguin wrote:
> >>>
> >>> Add basic tests for the spi_flash subsystem.
> >>
> >>
> >>> diff --git a/test/py/tests/test_sf.py b/test/py/tests/test_sf.py
> >>
> >>
> >>> +import re
> >>> +import pytest
> >>> +import u_boot_utils
> >>> +
> >>> +
> >>
> >>
> >> Nit: Double blank line. The same issue exists in many other places too.
> >
> > This is because I use flake8 and it was complaining if I didn't.
> Apparently
> > PEP8 suggests you surround top level functions with 2 blank lines.
> > I really have no preference.
>
> Hmm. There are some things about PEP8 I'm not so found of. Either way
> though, I don't believe any current code in test/py uses double blank
> lines, and I /think/ the same is true for other Python code in U-Boot.
>

As I said, I don't have any preference but you're right, consistency is
best.
I'll remove them in v3.


>
> Looks like I don't have any other comments on your replies.
>


Thanks,
Liam Beguin
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Re: [U-Boot] [PATCH 1/2] test/py: add MMC/SD block read test

[Tom Rini]

On Tue, Mar 13, 2018 at 03:44:31PM -0600, Stephen Warren wrote:

> On 02/20/2018 12:51 PM, Stephen Warren wrote:
> >From: Stephen Warren 
> >
> >Add a standalone MMC block read test. This allows direct testing of MMC
> >access rather than relying on doing so as a side-effect of e.g. DFU or
> >UMS testing, which may not be enabled on all platforms.
> 
> I assume you were only waiting for the merge window to open before applying
> this; there weren't any other issues? Thanks.

Indeed, thanks for the reminder, I'm going to be picking this (and other
stuff) up soon.

-- 
Tom


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Re: [U-Boot] [PATCH v3 00/10] splash screen on the stm32f769 disco board

[Thierry Reding]

On Tue, Mar 13, 2018 at 04:23:10PM +0100, Daniel Vetter wrote:
> On Tue, Mar 13, 2018 at 02:49:59PM +0100, yannick fertre wrote:
> > Version 3:
> > - Replace some pr_error, pr_warn or pr_info by dev_error, dev_warn & 
> > dev_info.
> > - Refresh stm32f769-disco_defconfig with last modification done on 
> > v2018.3-rc4.
> > - rework include files ordering.
> > 
> > Version 2:
> > - Replace debug log by pr_error, pr_warn or pr_info.
> > - Rework bridge between ltdc & dsi panel
> > - Rework backligh management (with or witout gpio)
> > - Rework panel otm8009a
> > - Add new panel raydium rm68200
> > 
> > Version 1:
> > - Initial commit
> > 
> > This serie contains all patchsets needed for displaying a splash screen 
> > on the stm32f769 disco board.
> > A new config has been created configs/stm32f769-disco_defconfig.
> > This is necessary due to the difference of panels between stm32f769-disco &
> > stm32f746-disco boards.
> 
> Shouldn't we patch the drivers/gpu/drm/stm driver instead of the
> drivers/video one? fbdev is kinda a dead end and not for adding new hw
> support ...

This is confusing, but by the looks of it this is code for U-Boot
display support and has nothing to do with the Linux kernel. I don't
know why dri-devel was on Cc.

Yannick, it's not customary to cross-post U-Boot display drivers to
Linux mailing lists, unless there's some need to coordinate or discuss
across the boundaries (for example if you were proposing a way to do
seamless handover from U-Boot to kernel). If you do cross-post, perhaps
make sure to mark these patches as targetting U-Boot to avoid confusion.

Thierry


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[U-Boot] [PULL] Please pull u-boot-rockchip

[Dr. Philipp Tomsich]

Tom,

Please pull the following changes (rebased from what was previously our 
next-branch) from u-boot-rockchip/master.
The respective run on TravisCI is 
https://travis-ci.org/ptomsich/u-boot-rockchip/builds/352948410.

Thanks,
Philipp.

The following changes since commit f95ab1fb6e37f0601f397091bb011edf7a98b890:

  Prepare v2018.03 (2018-03-13 08:02:19 -0400)

are available in the git repository at:

  git://git.denx.de/u-boot-rockchip.git master

for you to fetch changes up to 1e84e44cfec952006f30c42bbab5d7e170776549:

  rk3288: vyasa: Add eMMC boot support (2018-03-13 18:12:36 +0100)


Jagan Teki (9):
  ARM: dts: rockchip: Sync rk3288-vyasa dts from Linux
  ARM: dts: rockchip: rk3288-vyasa: Remove vdd_log from rk808, DCDC_REG1
  ARM: dts: rockchip: rk3288-vyasa: Use vmmc-supply from PMIC
  ARM: dts: rockchip: Add regulators for rk3288-vyasa
  ARM: dts: rockchip: Add gmac support for rk3288-vyasa board
  rockchip: rk3288-vyasa: defconfig: Enable gmac support
  ARM: dts: rockchip: Add usb host for rk3288-vyasa
  ARM: dts: rockchip: Add usb otg for rk3288-vyasa
  rk3288: vyasa: Add eMMC boot support

Kever Yang (7):
  rockchip: clk: rk3036: convert to use live dt
  rockchip: clk: rk3188: convert to use live dt
  rockchip: clk: rk322x: convert to use live dt
  rockchip: clk: rk3288: convert to use live dt
  rockchip: clk: rk3328: convert to use live dt
  rockchip: clk: rk1108: convert to use live dt
  rockchip: pwm: convert to use live dt

Klaus Goger (1):
  rockchip: add text_offset to kernel_addr_r on aarch64 platforms

 arch/arm/dts/rk3288-vyasa-u-boot.dtsi |  33 +
 arch/arm/dts/rk3288-vyasa.dts | 303 
+---
 board/amarula/vyasa-rk3288/MAINTAINERS|   2 +
 board/amarula/vyasa-rk3288/vyasa-rk3288.c |   7 +++
 configs/vyasa-rk3288_defconfig|   3 ++
 drivers/clk/rockchip/clk_rk3036.c |   2 +-
 drivers/clk/rockchip/clk_rk3188.c |   2 +-
 drivers/clk/rockchip/clk_rk322x.c |   2 +-
 drivers/clk/rockchip/clk_rk3288.c |   2 +-
 drivers/clk/rockchip/clk_rk3328.c |   2 +-
 drivers/clk/rockchip/clk_rv1108.c |   2 +-
 drivers/pwm/rk_pwm.c  |   2 +-
 include/configs/rk3328_common.h   |   2 +-
 include/configs/rk3399_common.h   |   2 +-
 14 files changed, 286 insertions(+), 80 deletions(-)
 create mode 100644 arch/arm/dts/rk3288-vyasa-u-boot.dtsi

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Re: [U-Boot] [PATCH 1/2] test/py: add MMC/SD block read test

[Stephen Warren]

On 02/20/2018 12:51 PM, Stephen Warren wrote:

From: Stephen Warren 

Add a standalone MMC block read test. This allows direct testing of MMC
access rather than relying on doing so as a side-effect of e.g. DFU or
UMS testing, which may not be enabled on all platforms.


I assume you were only waiting for the merge window to open before 
applying this; there weren't any other issues? Thanks.

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Re: [U-Boot] [PATCH v2 7/7] test/py: add spi_flash tests

[Stephen Warren]

On 03/04/2018 09:22 PM, Liam Beguin wrote:

Add basic tests for the spi_flash subsystem.


Looks good. A few small issues:


+def sf_prepare(u_boot_console, env__sf_config):

...

+speed = env__sf_config.get('speed', 0)
+if isinstance(speed, list) and len(speed) == 2:
+sf_params['speed'] = random.randint(speed[0], speed[1])
+else:
+sf_params['speed'] = speed


What if speed is a tuple or other indexable type not a list? Perhaps 
invert the test. Also, perhaps assume any list has two entries, or 
assert that.


if isintance(speed, int):
  int case
else:
  assert len(speed) == 2, "Speed must have two entries"
  list/tuple case


+assert env__sf_config['offset'] is not None, \
+'\'offset\' is required for this test.'


Is this meant to test for:
a) A key that's present, with value set to None.
b) A missing key.

It currently tests (a), but testing for (b) seems more likely to catch 
issues. Perhaps:


assert env__sf_config.get('offset', None) is not None

or:

assert 'offset' in env__sf_config.get


+assert not (env__sf_config.get('writeable', False) and
+env__sf_config.get('crc32', False)), \
+'Cannot check crc32 on  writeable sections'


What if the crc32 value is 0, which IIRC is False? Unlikely admittedly, 
but you never know. Perhaps:


assert not (env__sf_config.get('writeable', False) and
'crc32' in env__sf_config.get), \
'Cannot check crc32 on  writeable sections'


+def sf_read(u_boot_console, env__sf_config, sf_params):
+addr = sf_params['ram_base']
+offset = env__sf_config['offset']
+count = sf_params['len']
+pattern = random.randint(0, 0x)


0xFF not 0x since it's bytes.


+crc_expected = env__sf_config.get('crc32', None)
+
+cmd = 'mw.b %08x %08x %x' % (addr, pattern, count)


%02x for pattern.


+u_boot_console.run_command(cmd)
+crc_read = u_boot_utils.crc32(u_boot_console, addr, count)


crc_read sounds like a CRC for data that's been read. Perhaps crc_pattern?


+def sf_update(u_boot_console, env__sf_config, sf_params):
+addr = sf_params['ram_base']
+offset = env__sf_config['offset']
+count = sf_params['len']
+pattern = int(random.random() * 0x)


0xFF.


+cmd = 'mw.b %08x %08x %x' % (addr, pattern, count)


%02x for pattern.


+u_boot_console.run_command(cmd)
+crc_read = u_boot_utils.crc32(u_boot_console, addr, count)


crc_pattern?


+def test_sf_erase(u_boot_console, env__sf_config):

...

+cmd = 'mw.b %08x  %x' % (addr, count)


Just ff not ?


+@pytest.mark.buildconfigspec('cmd_sf')
+@pytest.mark.buildconfigspec('cmd_memory')
+def test_sf_update(u_boot_console, env__sf_config):


sf_update() unconditionally calls u_boot_utils.crc32 which asserts if 
the crc32 command isn't available, so this function needs to be 
@pytest.mark.buildconfigspec('cmd_crc32').

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[U-Boot] Please pull u-boot-video/next

[Anatolij Gustschin]

Hi Tom,

The following changes since commit 5e62f828256d66e2b28def4f9ef20a2a05c2d04f:

  Prepare v2018.03-rc4 (2018-03-05 20:27:08 -0500)

are available in the git repository at:

  git://git.denx.de/u-boot-video.git next

for you to fetch changes up to d06717f853cd98a6a4536e5de5248e6c99a2b7bc:

  sunxi: video: mark framebuffer as EFI reserved memory (2018-03-09 18:24:49 
+0100)


Heinrich Schuchardt (6):
  dm: video: show correct colors in graphical console
  dm: video: correctly clean background in 16bit mode
  dm: video: use constants to refer to colors
  dm: video: support increased intensity (bold)
  video: indicate code page of bitmap fonts
  sunxi: video: mark framebuffer as EFI reserved memory

Kever Yang (1):
  pwm-backlight: make power-supply as option

 drivers/video/pwm_backlight.c   | 24 +-
 drivers/video/sunxi/sunxi_display.c |  8 
 drivers/video/vidconsole-uclass.c   | 88 -
 drivers/video/video-uclass.c| 38 
 include/video.h | 13 +-
 include/video_console.h | 43 ++
 include/video_font_4x6.h|  4 +-
 include/video_font_data.h   |  2 +
 test/dm/video.c |  2 +-
 9 files changed, 167 insertions(+), 55 deletions(-)

Please pull. Thanks!

Anatolij
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Re: [U-Boot] [PATCH v2 6/7] test/py: add generic CRC32 function

[Stephen Warren]

On 03/04/2018 09:22 PM, Liam Beguin wrote:

Add a generic function which can be used to compute the CRC32 value of
a region of RAM.


Patches 1-6,
Reviewed-by: Stephen Warren 
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Re: [U-Boot] [PATCH 3/3] test/py: add spi_flash tests

[Stephen Warren]

On 03/03/2018 09:32 AM, Liam Beguin wrote:

On 1 March 2018 at 16:56, Stephen Warren  wrote:

On 02/26/2018 09:17 PM, Liam Beguin wrote:


Add basic tests for the spi_flash subsystem.




diff --git a/test/py/tests/test_sf.py b/test/py/tests/test_sf.py




+import re
+import pytest
+import u_boot_utils
+
+



Nit: Double blank line. The same issue exists in many other places too.


This is because I use flake8 and it was complaining if I didn't. Apparently
PEP8 suggests you surround top level functions with 2 blank lines.
I really have no preference.


Hmm. There are some things about PEP8 I'm not so found of. Either way 
though, I don't believe any current code in test/py uses double blank 
lines, and I /think/ the same is true for other Python code in U-Boot.


Looks like I don't have any other comments on your replies.
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Re: [U-Boot] [PATCH 1/2] ARM: dts: zynq: Update dts for Z-turn board

[Alexander Graf]

On 13.03.18 21:35, tos...@gmail.com wrote:
> From: Anton Gerasimov 
> 
> Delete devices implemented in PL, stylistic changes.
> 
> Signed-off-by: Anton Gerasimov 
> ---
>  arch/arm/dts/zynq-zturn-myir.dts | 64 
> 
>  1 file changed, 13 insertions(+), 51 deletions(-)
> 
> diff --git a/arch/arm/dts/zynq-zturn-myir.dts 
> b/arch/arm/dts/zynq-zturn-myir.dts
> index a5ecfcc1d7..b6661d0205 100644
> --- a/arch/arm/dts/zynq-zturn-myir.dts
> +++ b/arch/arm/dts/zynq-zturn-myir.dts
> @@ -1,3 +1,4 @@
> +// SPDX-License-Identifier: GPL-2.0
>  /*
>   *  Copyright (C) 2015 Andrea Merello 
>   *  Copyright (C) 2017 Alexander Graf 
> @@ -6,87 +7,49 @@
>   *  Copyright (C) 2011 - 2014 Xilinx
>   *  Copyright (C) 2012 National Instruments Corp.
>   *
> - * This software is licensed under the terms of the GNU General Public
> - * License version 2, as published by the Free Software Foundation, and
> - * may be copied, distributed, and modified under those terms.
> - *
> - * This program is distributed in the hope that it will be useful,
> - * but WITHOUT ANY WARRANTY; without even the implied warranty of
> - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> - * GNU General Public License for more details.
>   */
> +
>  /dts-v1/;
>  /include/ "zynq-7000.dtsi"
>  
>  / {
>   model = "Zynq Z-Turn MYIR Board";
> - compatible = "xlnx,zynq-7000";
> + compatible = "myir,zynq-zturn", "xlnx,zynq-7000";

ack.

>  
>   aliases {
>   ethernet0 = 
>   serial0 = 
>   serial1 = 
> - spi0 = 
> - mmc0 = 
>   };
>  
> - memory {
> + memory@0 {

Why?

>   device_type = "memory";
>   reg = <0x0 0x4000>;
>   };
>  
>   chosen {
> - stdout-path = "serial0:115200n8";

Nack. By default graphical output is quite unusable on this board, so we
want to output to serial.

If your Linux submitted device tree doesn't contain this part, please
fix it there.

> + bootargs = "console=ttyPS0,115200 earlyprintk 
> root=/dev/mmcblk0p2 rootwait";

This is even worse. Please don't prepopulate any bootargs, otherwise
people may end up assuming that they're actually getting used.

>   };
>  
>   gpio-leds {
>   compatible = "gpio-leds";
> - led_r {
> - label = "led_r";
> - gpios = < 0x72 0x1>;
> - default-state = "on";
> - linux,default-trigger = "heartbeat";
> - };
> -
> - led_g {
> - label = "led_g";
> - gpios = < 0x73 0x1>;
> - default-state = "on";
> - linux,default-trigger = "heartbeat";
> - };
> -
> - led_b {
> - label = "led_b";
> - gpios = < 0x74 0x1>;
> - default-state = "on";
> - linux,default-trigger = "heartbeat";
> - };
Why remove them? They're hard wired on the board, no?

> -
> - usr_led1 {
> - label = "usr_led1";
> + usr-led1 {
> + label = "usr-led1";
>   gpios = < 0x0 0x1>;
>   default-state = "off";
> - linux,default-trigger = "none";
>   };
>  
> - usr_led2 {
> - label = "usr_led2";
> + usr-led2 {
> + label = "usr-led2";
>   gpios = < 0x9 0x1>;
>   default-state = "off";
> - linux,default-trigger = "none";
>   };
>   };
>  
> - gpio-beep {
> - compatible = "gpio-beeper";
> - label = "pl-beep";
> - gpios = < 0x75 0x0>;
> - };

This one is in PL, so ack.

> -
>   gpio-keys {
>   compatible = "gpio-keys";
> - #address-cells = <0x1>;
> - #size-cells = <0x0>;
> + #address-cells = <1>;
> + #size-cells = <0>;

ack

>   autorepeat;
>   K1 {
>   label = "K1";
> @@ -100,7 +63,6 @@
>  
>   {
>   ps-clk-frequency = <>;
> - fclk-enable = <0xf>;

Why?

>  };
>  
>   {
> @@ -152,8 +114,8 @@
>   reg = <0x49>;
>   };
>  
> - adxl345@53 {
> - compatible = "adi,adxl34x", "adxl34x";
> + accelerometer@53 {
> + compatible = "adi,adxl345", "adxl345";

You can't just remove compatibles. Device trees are supposed to be
compatible with whatever used them before someone thought they want to
prettify them, so in this case you'd have to add the concrete names in
the list before the abstract ones:

  compatible = "adi,adxl345", "adxl345", "adi,adxl34x", "adxl34x";


Alex

>   

Re: [U-Boot] [PATCH v3 00/10] splash screen on the stm32f769 disco board

[Brian Norris]

On Tue, Mar 13, 2018 at 1:50 PM, Anatolij Gustschin  wrote:
> On Tue, 13 Mar 2018 16:23:10 +0100
> Daniel Vetter dan...@ffwll.ch wrote:
> ...
>> Shouldn't we patch the drivers/gpu/drm/stm driver instead of the
>> drivers/video one? fbdev is kinda a dead end and not for adding new hw
>> support ...
>
> this patch series adds display driver to U-Boot project, I don't know
> why it was submitted to the Linux kernel and dri-devel mailing lists.
>
> Yannick, please don't send this to linux-kernel and dri-devel lists
> and also please don't Cc kernel developers when resubmitting the
> patch series.

I couldn't agree more! I mentioned this on the previous confusing post
(where I had the same objection as Daniel, before realizing this was
just a poorly-documented, ill-targeted U-Boot patch series).

Brian
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[U-Boot] [PATCH 2/2] ARM: dts: zynq: Rename dts for Z-turn board

[tossel]

From: Anton Gerasimov 

Makes naming in line with other Zynq boards.

Signed-off-by: Anton Gerasimov 
---
 arch/arm/dts/Makefile| 2 +-
 arch/arm/dts/{zynq-zturn-myir.dts => zynq-zturn.dts} | 0
 2 files changed, 1 insertion(+), 1 deletion(-)
 rename arch/arm/dts/{zynq-zturn-myir.dts => zynq-zturn.dts} (100%)

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 20a4c37d48..83aa2f4df4 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -143,7 +143,7 @@ dtb-$(CONFIG_ARCH_ZYNQ) += \
zynq-zc770-xm012.dtb \
zynq-zc770-xm013.dtb \
zynq-zed.dtb \
-   zynq-zturn-myir.dtb \
+   zynq-zturn.dtb \
zynq-zybo.dtb
 dtb-$(CONFIG_ARCH_ZYNQMP) += \
zynqmp-ep108.dtb\
diff --git a/arch/arm/dts/zynq-zturn-myir.dts b/arch/arm/dts/zynq-zturn.dts
similarity index 100%
rename from arch/arm/dts/zynq-zturn-myir.dts
rename to arch/arm/dts/zynq-zturn.dts
-- 
2.16.2

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[U-Boot] [PATCH 1/2] ARM: dts: zynq: Update dts for Z-turn board

[tossel]

From: Anton Gerasimov 

Delete devices implemented in PL, stylistic changes.

Signed-off-by: Anton Gerasimov 
---
 arch/arm/dts/zynq-zturn-myir.dts | 64 
 1 file changed, 13 insertions(+), 51 deletions(-)

diff --git a/arch/arm/dts/zynq-zturn-myir.dts b/arch/arm/dts/zynq-zturn-myir.dts
index a5ecfcc1d7..b6661d0205 100644
--- a/arch/arm/dts/zynq-zturn-myir.dts
+++ b/arch/arm/dts/zynq-zturn-myir.dts
@@ -1,3 +1,4 @@
+// SPDX-License-Identifier: GPL-2.0
 /*
  *  Copyright (C) 2015 Andrea Merello 
  *  Copyright (C) 2017 Alexander Graf 
@@ -6,87 +7,49 @@
  *  Copyright (C) 2011 - 2014 Xilinx
  *  Copyright (C) 2012 National Instruments Corp.
  *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
  */
+
 /dts-v1/;
 /include/ "zynq-7000.dtsi"
 
 / {
model = "Zynq Z-Turn MYIR Board";
-   compatible = "xlnx,zynq-7000";
+   compatible = "myir,zynq-zturn", "xlnx,zynq-7000";
 
aliases {
ethernet0 = 
serial0 = 
serial1 = 
-   spi0 = 
-   mmc0 = 
};
 
-   memory {
+   memory@0 {
device_type = "memory";
reg = <0x0 0x4000>;
};
 
chosen {
-   stdout-path = "serial0:115200n8";
+   bootargs = "console=ttyPS0,115200 earlyprintk 
root=/dev/mmcblk0p2 rootwait";
};
 
gpio-leds {
compatible = "gpio-leds";
-   led_r {
-   label = "led_r";
-   gpios = < 0x72 0x1>;
-   default-state = "on";
-   linux,default-trigger = "heartbeat";
-   };
-
-   led_g {
-   label = "led_g";
-   gpios = < 0x73 0x1>;
-   default-state = "on";
-   linux,default-trigger = "heartbeat";
-   };
-
-   led_b {
-   label = "led_b";
-   gpios = < 0x74 0x1>;
-   default-state = "on";
-   linux,default-trigger = "heartbeat";
-   };
-
-   usr_led1 {
-   label = "usr_led1";
+   usr-led1 {
+   label = "usr-led1";
gpios = < 0x0 0x1>;
default-state = "off";
-   linux,default-trigger = "none";
};
 
-   usr_led2 {
-   label = "usr_led2";
+   usr-led2 {
+   label = "usr-led2";
gpios = < 0x9 0x1>;
default-state = "off";
-   linux,default-trigger = "none";
};
};
 
-   gpio-beep {
-   compatible = "gpio-beeper";
-   label = "pl-beep";
-   gpios = < 0x75 0x0>;
-   };
-
gpio-keys {
compatible = "gpio-keys";
-   #address-cells = <0x1>;
-   #size-cells = <0x0>;
+   #address-cells = <1>;
+   #size-cells = <0>;
autorepeat;
K1 {
label = "K1";
@@ -100,7 +63,6 @@
 
  {
ps-clk-frequency = <>;
-   fclk-enable = <0xf>;
 };
 
  {
@@ -152,8 +114,8 @@
reg = <0x49>;
};
 
-   adxl345@53 {
-   compatible = "adi,adxl34x", "adxl34x";
+   accelerometer@53 {
+   compatible = "adi,adxl345", "adxl345";
reg = <0x53>;
interrupt-parent = <>;
interrupts = <0x0 0x1e 0x4>;
-- 
2.16.2

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[U-Boot] [PATCH 0/2] Changes to Z-turn dts

[tossel]

From: Anton Gerasimov 

A device tree for MYIR Z-turn board was recently (almost) merged
to Linux kernel and a few issues arised in the review process.
The issues are fixed by the patches below. The dts is still not
exactly the same as one in Linux because of 'u-boot,dm-pre-reloc'
and qspi device, hope that's allright.

Anton Gerasimov (2):
  ARM: dts: zynq: Update dts for Z-turn board
  ARM: dts: zynq: Rename dts for Z-turn board

 arch/arm/dts/Makefile  |  2 +-
 .../dts/{zynq-zturn-myir.dts => zynq-zturn.dts}| 64 +-
 2 files changed, 14 insertions(+), 52 deletions(-)
 rename arch/arm/dts/{zynq-zturn-myir.dts => zynq-zturn.dts} (53%)

-- 
2.16.2

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Re: [U-Boot] [PATCH v3 00/10] splash screen on the stm32f769 disco board

[Anatolij Gustschin]

On Tue, 13 Mar 2018 16:23:10 +0100
Daniel Vetter dan...@ffwll.ch wrote:
...
> Shouldn't we patch the drivers/gpu/drm/stm driver instead of the
> drivers/video one? fbdev is kinda a dead end and not for adding new hw
> support ...

this patch series adds display driver to U-Boot project, I don't know
why it was submitted to the Linux kernel and dri-devel mailing lists.

Yannick, please don't send this to linux-kernel and dri-devel lists
and also please don't Cc kernel developers when resubmitting the
patch series.

--
Anatolij
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Re: [U-Boot] [PATCH 1/1] configs: sunxi: enable BLK, DM_MMC for Bananapi

[Heinrich Schuchardt]

On 03/13/2018 07:41 PM, Maxime Ripard wrote:
> Hi,
> 
> On Tue, Mar 13, 2018 at 06:37:23PM +0100, Heinrich Schuchardt wrote:
>> doc/driver-model/MIGRATION.txt requires to move block drivers to the
>> the driver model by v2018.05
>>
>> So make the switch for the Bananapi block drivers.
>>
>> Signed-off-by: Heinrich Schuchardt 
>> ---
>> This patch depends on
>> mmc: sunxi: support cd-inverted
>> https://lists.denx.de/pipermail/u-boot/2018-February/319309.html
>> which has been applied to u-boot-sunxi/master.
>> ---
>>  configs/Bananapi_defconfig | 2 ++
>>  1 file changed, 2 insertions(+)
>>
>> diff --git a/configs/Bananapi_defconfig b/configs/Bananapi_defconfig
>> index 52650448091..300110a5cab 100644
>> --- a/configs/Bananapi_defconfig
>> +++ b/configs/Bananapi_defconfig
>> @@ -17,6 +17,8 @@ CONFIG_SPL_I2C_SUPPORT=y
>>  # CONFIG_SPL_EFI_PARTITION is not set
>>  CONFIG_NETCONSOLE=y
>>  CONFIG_SCSI_AHCI=y
>> +CONFIG_BLK=y
>> +CONFIG_DM_MMC=y
> 
> Please switch all the Allwinner boards at once.

Hello Maxime,

this is the board I possess and have tested. Who would do the testing if
I switch all 127 boards?

I guess the best way to switch all SUNXI boards would be to make
CONFIG_SUNXI select CONFIG_DM, CONFIG_BLK, and CONFIG_DM_MMC.

@Simon
Looking at doc/driver-model/MIGRATION.txt would it make sense to set:
CONFIG_DM_MMC default yes, depends on CONFIG_MMC.
CONFIG_DM_SCSI default yes, depends on CONFIG_SCSI.
...
CONFIG_BLK selected by CONFIG_DM_MMC | CONFIG_DM_SCSI | 
CONFIG_DM selected by CONFIG_BLK

Best regards

Heinrich
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Re: [U-Boot] [PATCH][Boards Need to Switch DM] spi: atmel: Full dm conversion

[Jagan Teki]

On Tue, Mar 13, 2018 at 10:57 AM, Wenyou Yang  wrote:
> On 3/7/2018 1:51 PM, Jagan Teki wrote:
>>
>> atmel_spi now support dt along with platform data,
>> respective boards need to switch into dm for the same.
>>
>> Signed-off-by: Jagan Teki 
>> ---
>
> Indeed.

Look like there are very few boards need to move DM as well as DM_SPI
to use this driver.

# grep -R CONFIG_ATMEL_SPI include/configs/
include/configs/snapper9g45.h:#define CONFIG_ATMEL_SPI
include/configs/ma5d4evk.h:#define CONFIG_ATMEL_SPI
include/configs/ma5d4evk.h:#define CONFIG_ATMEL_SPI0
include/configs/taurus.h:#define CONFIG_ATMEL_SPI
include/configs/vinco.h:#define CONFIG_ATMEL_SPI
include/configs/vinco.h:#define CONFIG_ATMEL_SPI0

Added respective board maintainers on the list, hope this these will move to DM.
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Re: [U-Boot] [PATCH 1/1] configs: sunxi: enable BLK, DM_MMC for Bananapi

[Maxime Ripard]

Hi,

On Tue, Mar 13, 2018 at 06:37:23PM +0100, Heinrich Schuchardt wrote:
> doc/driver-model/MIGRATION.txt requires to move block drivers to the
> the driver model by v2018.05
> 
> So make the switch for the Bananapi block drivers.
> 
> Signed-off-by: Heinrich Schuchardt 
> ---
> This patch depends on
> mmc: sunxi: support cd-inverted
> https://lists.denx.de/pipermail/u-boot/2018-February/319309.html
> which has been applied to u-boot-sunxi/master.
> ---
>  configs/Bananapi_defconfig | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/configs/Bananapi_defconfig b/configs/Bananapi_defconfig
> index 52650448091..300110a5cab 100644
> --- a/configs/Bananapi_defconfig
> +++ b/configs/Bananapi_defconfig
> @@ -17,6 +17,8 @@ CONFIG_SPL_I2C_SUPPORT=y
>  # CONFIG_SPL_EFI_PARTITION is not set
>  CONFIG_NETCONSOLE=y
>  CONFIG_SCSI_AHCI=y
> +CONFIG_BLK=y
> +CONFIG_DM_MMC=y

Please switch all the Allwinner boards at once.

Thanks!
Maxime

-- 
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Embedded Linux and Kernel engineering
https://bootlin.com


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Re: [U-Boot] [uboot-snps-arc] Re: [PATCH 1/2] SPI Flash: add support of sst26wf* flash series

[Eugeniy Paltsev]

Hi Jagan,

On Tue, 2018-03-13 at 22:11 +0530, Jagan Teki wrote:
> On Tue, Feb 6, 2018 at 8:45 PM, Eugeniy Paltsev
>  wrote:
> > sst26wf flash series block protection implementation differs
> > from other SST series, so add implementation for sst26wf
> > lock/unlock/is_locked functions.
> 
> How it is different from existing SST implementation, Linux has
> support this similar part and use normal SST?

Looks like the person, who add sst26wf* flash series support to Linux
only use/test reading from these flash ICs and reading works fine
as only write protection implementation was changed.

Also it ids possible that these write protection bits were cleared
by prebootloader on platform there that patch was test - so flash
IC was already unlocked.

BTW: I have plans to port this patch to linux too.
-- 
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[U-Boot] [PATCH 1/1] configs: sunxi: enable BLK, DM_MMC for Bananapi

[Heinrich Schuchardt]

doc/driver-model/MIGRATION.txt requires to move block drivers to the
the driver model by v2018.05

So make the switch for the Bananapi block drivers.

Signed-off-by: Heinrich Schuchardt 
---
This patch depends on
mmc: sunxi: support cd-inverted
https://lists.denx.de/pipermail/u-boot/2018-February/319309.html
which has been applied to u-boot-sunxi/master.
---
 configs/Bananapi_defconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/configs/Bananapi_defconfig b/configs/Bananapi_defconfig
index 52650448091..300110a5cab 100644
--- a/configs/Bananapi_defconfig
+++ b/configs/Bananapi_defconfig
@@ -17,6 +17,8 @@ CONFIG_SPL_I2C_SUPPORT=y
 # CONFIG_SPL_EFI_PARTITION is not set
 CONFIG_NETCONSOLE=y
 CONFIG_SCSI_AHCI=y
+CONFIG_BLK=y
+CONFIG_DM_MMC=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_RGMII=y
 CONFIG_SUN7I_GMAC=y
-- 
2.11.0

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Re: [U-Boot] [PATCH v2 3/3] sunxi: Add A20-SOM204-EVB-eMMC board

[Jagan Teki]

On Fri, Feb 2, 2018 at 7:26 PM, Stefan Mavrodiev  wrote:
> A20-SOM204 board has option with onboard 16GB eMMC. The chip is wired
> to MMC2 slot.
>
> This patch adds defconfig and dts files for this board. The dts is same
> with mainline kernel.
>
> Signed-off-by: Stefan Mavrodiev 
> Acked-by: Maxime Ripard 
> ---

Reviewed-by: Jagan Teki 

Applied to u-boot-sunxi/master
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Re: [U-Boot] [PATCH v2 2/3] sunxi: Add A20-SOM204-EVB board

[Jagan Teki]

On Fri, Feb 2, 2018 at 7:26 PM, Stefan Mavrodiev  wrote:
> This is new System-On-Module platform with universal dimm socket for
> easy insertation. The EVB board is designed to be universal with
> future modules.
>
> Base features of A20-SOM204 board includes:
> * 1GB DDR3 RAM
> * AXP209 PMU
> * KSZ9031 Gigabit PHY
> * AT24C16 EEPROM
> * Status LED
> * LCD connector
> * GPIO connector
>
> There will be variants with the following options:
> * Second LAN8710A Megabit PHY
> * 16MB SPI Flash memory
> * eMMC card
> * ATECC508 crypto device
>
> The EVB board has:
> * Debug UART
> * MicroSD card connector
> * USB-OTG connector
> * Two USB host
> * RTL8723BS WiFi/BT combo
> * IrDA transceiver/receiver
> * HDMI connector
> * VGA connector
> * Megabit ethernet transceiver
> * Gigabit ethernet transceiver
> * SATA connector
> * CAN driver
> * CSI camera
> * MIC and HP connectors
> * PCIe x4 connector
> * USB3 connector
> * Two UEXT connectors
> * Two user LEDs
>
> Some of the features are multiplexed and cannot be used the same time:
> CAN and Megabit PHY. Others are not usable with A20 SoC: PCIe and USB3.
>
> This patch adds defconfig and dts files for this board. The dts is same
> with mainline kernel, except some nodes are removed to make file
> compatible with existing dtsi file.
>
> Signed-off-by: Stefan Mavrodiev 
> Acked-by: Maxime Ripard 
> ---

Reviewed-by: Jagan Teki 

Applied to u-boot-sunxi/master
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Re: [U-Boot] [PATCH v2 1/3] Move CONFIG_PHY_ADDR to Kconfig

[Jagan Teki]

On Fri, Feb 2, 2018 at 7:23 PM, Stefan Mavrodiev  wrote:
> CONFIG_PHY_ADDR is used for old-style configuration. This makes
> impossible changing the PHY address, if multiple boards share a same
> config header file (for example include/configs/sunxi-common.h).
>
> Moving this to Kconfig helps overcoming this issue. It's defined
> as entry inside PHYLIB section.
>
> After the implemention, moveconfig was run. The issues are:
> - edb9315a  - CONFIG_PHYLIB is not enabled. Entry is
>   deleted.
>
> - ds414 - CONFIG_PHYLIB is in incompatible format:
>   { 0x1, 0x0 }. This entry is also deleted.
>
> - devkit3250- The PHY_ADDR is in hex format (0x1F).
>   Manually CONFIG_PHY_ADDR=31 is added in
>   the defconfig.
>
> After the changes the suspicious defconfigs passes building.
>
> Signed-off-by: Stefan Mavrodiev 
> Acked-by: Maxime Ripard 
> ---

rebased on master and

Applied to u-boot-sunxi/master
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[U-Boot] [PATCH v6 10/10] bootm: optee: Add a bootm command for type IH_OS_TEE

[Bryan O'Donoghue]

This patch makes it possible to verify the contents and location of an
OPTEE image in DRAM prior to handing off control to that image. If image
verification fails we won't try to boot any further.

Signed-off-by: Bryan O'Donoghue 
Suggested-by: Andrew F. Davis 
Cc: Harinarayan Bhatta 
Cc: Andrew F. Davis 
Cc: Tom Rini 
Cc: Kever Yang 
Cc: Philipp Tomsich 
Cc: Peng Fan 
---
 common/bootm_os.c | 32 
 lib/optee/Kconfig |  9 +
 2 files changed, 41 insertions(+)

diff --git a/common/bootm_os.c b/common/bootm_os.c
index 5e6b177..b84a8e2 100644
--- a/common/bootm_os.c
+++ b/common/bootm_os.c
@@ -11,6 +11,7 @@
 #include 
 #include 
 #include 
+#include 
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -433,6 +434,34 @@ static int do_bootm_openrtos(int flag, int argc, char * 
const argv[],
 }
 #endif
 
+#ifdef CONFIG_BOOTM_OPTEE
+static int do_bootm_tee(int flag, int argc, char * const argv[],
+   bootm_headers_t *images)
+{
+   int ret;
+
+   /* Verify OS type */
+   if (images->os.os != IH_OS_TEE) {
+   return 1;
+   };
+
+   /* Validate OPTEE header */
+   ret = optee_verify_bootm_image(images->os.image_start,
+  images->os.load,
+  images->os.image_len);
+   if (ret)
+   return ret;
+
+   /* Locate FDT etc */
+   ret = bootm_find_images(flag, argc, argv);
+   if (ret)
+   return ret;
+
+   /* From here we can run the regular linux boot path */
+   return do_bootm_linux(flag, argc, argv, images);
+}
+#endif
+
 static boot_os_fn *boot_os[] = {
[IH_OS_U_BOOT] = do_bootm_standalone,
 #ifdef CONFIG_BOOTM_LINUX
@@ -466,6 +495,9 @@ static boot_os_fn *boot_os[] = {
 #ifdef CONFIG_BOOTM_OPENRTOS
[IH_OS_OPENRTOS] = do_bootm_openrtos,
 #endif
+#ifdef CONFIG_BOOTM_OPTEE
+   [IH_OS_TEE] = do_bootm_tee,
+#endif
 };
 
 /* Allow for arch specific config before we boot */
diff --git a/lib/optee/Kconfig b/lib/optee/Kconfig
index cc73ec3..1e5ab45 100644
--- a/lib/optee/Kconfig
+++ b/lib/optee/Kconfig
@@ -28,3 +28,12 @@ config OPTEE_TZDRAM_BASE
help
  The base address of pre-allocated Trust Zone DRAM for
  the OPTEE runtime.
+
+config BOOTM_OPTEE
+   bool "Support OPTEE bootm command"
+   select BOOTM_LINUX
+   default n
+   help
+ Select this command to enable chain-loading of a Linux kernel
+ via an OPTEE firmware.
+ The bootflow is BootROM -> u-boot -> OPTEE -> Linux in this case.
-- 
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[U-Boot] [PATCH v6 04/10] optee: Add CONFIG_OPTEE_LOAD_ADDR

[Bryan O'Donoghue]

CONFIG_OPTEE_LOAD_ADDR is used to tell u-boot where to load the OPTEE
binary into memory prior to handing off control to OPTEE.

We need to pull this value out of u-boot in order to produce an IMX IVT/CSF
signed pair for the purposes of secure boot. The best way to do that is to
have CONFIG_OPTEE_LOAD_ADDR appear in u-boot.cfg.

Adding new CONFIG entires to u-boot should be kconfig driven so this patch
does just that.

Signed-off-by: Bryan O'Donoghue 
Reviewed-by: Ryan Harkin 
---
 lib/optee/Kconfig | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/lib/optee/Kconfig b/lib/optee/Kconfig
index a3b7332..cc73ec3 100644
--- a/lib/optee/Kconfig
+++ b/lib/optee/Kconfig
@@ -7,6 +7,12 @@ config OPTEE
   OPTEE specific checks before booting an OPTEE image created with
   mkimage.
 
+config OPTEE_LOAD_ADDR
+   hex "OPTEE load address"
+   default 0x
+   help
+ The load address of the bootable OPTEE binary.
+
 config OPTEE_TZDRAM_SIZE
hex "Amount of Trust-Zone RAM for the OPTEE image"
depends on OPTEE
-- 
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[U-Boot] [PATCH v6 05/10] optee: Add optee_image_get_entry_point()

[Bryan O'Donoghue]

Add a helper function for extracting the least significant 32 bits from the
OPTEE entry point address, which will be good enough to load OPTEE binaries
up to (2^32)-1 bytes.

We may need to extend this out later on but for now (2^32)-1 should be
fine.

Signed-off-by: Bryan O'Donoghue 
Cc: Harinarayan Bhatta 
Cc: Andrew F. Davis 
Cc: Tom Rini 
Cc: Kever Yang 
Cc: Philipp Tomsich 
Cc: Peng Fan 
Tested-by: Peng Fan 
---
 include/tee/optee.h | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/include/tee/optee.h b/include/tee/optee.h
index 8943afb..eb328d3 100644
--- a/include/tee/optee.h
+++ b/include/tee/optee.h
@@ -29,6 +29,13 @@ struct optee_header {
uint32_t paged_size;
 };
 
+static inline uint32_t optee_image_get_entry_point(const image_header_t *hdr)
+{
+   struct optee_header *optee_hdr = (struct optee_header *)(hdr + 1);
+
+   return optee_hdr->init_load_addr_lo;
+}
+
 #if defined(CONFIG_OPTEE)
 int optee_verify_image(struct optee_header *hdr, unsigned long tzdram_start,
   unsigned long tzdram_len, unsigned long image_len);
-- 
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[U-Boot] [PATCH v6 03/10] optee: Add CONFIG_OPTEE_TZDRAM_BASE

[Bryan O'Donoghue]

OPTEE is currently linked to a specific area of memory called the TrustZone
DRAM. This patch adds a CONFIG entry for the default address of TrustZone
DRAM that a board-port can over-ride. The region that U-Boot sets aside for
the OPTEE run-time should be verified before attempting to hand off to the
OPTEE run-time. Each board-port should carefully ensure that the TZDRAM
address specified in the OPTEE build and the TZDRAM address specified in
U-Boot match-up.

Further patches will use TZDRAM address with other defines and variables to
carry out a degree of automated verification in U-Boot prior to trying to
boot an OPTEE image.

Signed-off-by: Bryan O'Donoghue 
Cc: Harinarayan Bhatta 
Cc: Andrew F. Davis 
Cc: Tom Rini 
Cc: Kever Yang 
Cc: Philipp Tomsich 
---
 lib/optee/Kconfig | 8 
 1 file changed, 8 insertions(+)

diff --git a/lib/optee/Kconfig b/lib/optee/Kconfig
index 41c0ab7..a3b7332 100644
--- a/lib/optee/Kconfig
+++ b/lib/optee/Kconfig
@@ -14,3 +14,11 @@ config OPTEE_TZDRAM_SIZE
help
  The size of pre-allocated Trust Zone DRAM to allocate for the OPTEE
  runtime.
+
+config OPTEE_TZDRAM_BASE
+   hex "Base address of Trust-Zone RAM for the OPTEE image"
+   depends on OPTEE
+   default 0x9d00
+   help
+ The base address of pre-allocated Trust Zone DRAM for
+ the OPTEE runtime.
-- 
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[U-Boot] [PATCH v6 07/10] optee: Add optee_verify_bootm_image()

[Bryan O'Donoghue]

This patch adds optee_verify_bootm_image() which will be subsequently used
to verify the parameters encoded in the OPTEE header match the memory
allocated to the OPTEE region, OPTEE header magic and version prior to
handing off control to the OPTEE image.

Signed-off-by: Bryan O'Donoghue 
Cc: Harinarayan Bhatta 
Cc: Andrew F. Davis 
Cc: Tom Rini 
Cc: Kever Yang 
Cc: Philipp Tomsich 
Cc: Peng Fan 
---
 include/tee/optee.h | 13 +
 lib/optee/optee.c   | 20 
 2 files changed, 33 insertions(+)

diff --git a/include/tee/optee.h b/include/tee/optee.h
index e782cb0..4b9e94c 100644
--- a/include/tee/optee.h
+++ b/include/tee/optee.h
@@ -55,4 +55,17 @@ static inline int optee_verify_image(struct optee_header 
*hdr,
 
 #endif
 
+#if defined(CONFIG_OPTEE)
+int optee_verify_bootm_image(unsigned long image_addr,
+unsigned long image_load_addr,
+unsigned long image_len);
+#else
+static inline int optee_verify_bootm_image(unsigned long image_addr,
+  unsigned long image_load_addr,
+  unsigned long image_len)
+{
+   return -EPERM;
+}
+#endif
+
 #endif /* _OPTEE_H */
diff --git a/lib/optee/optee.c b/lib/optee/optee.c
index 2cc16d7..365c078 100644
--- a/lib/optee/optee.c
+++ b/lib/optee/optee.c
@@ -29,3 +29,23 @@ int optee_verify_image(struct optee_header *hdr, unsigned 
long tzdram_start,
 
return 0;
 }
+
+int optee_verify_bootm_image(unsigned long image_addr,
+unsigned long image_load_addr,
+unsigned long image_len)
+{
+   struct optee_header *hdr = (struct optee_header *)image_addr;
+   unsigned long tzdram_start = CONFIG_OPTEE_TZDRAM_BASE;
+   unsigned long tzdram_len = CONFIG_OPTEE_TZDRAM_SIZE;
+
+   int ret;
+
+   ret = optee_verify_image(hdr, tzdram_start, tzdram_len, image_len);
+   if (ret)
+   return ret;
+
+   if (image_load_addr + sizeof(*hdr) != hdr->init_load_addr_lo)
+   ret = -EINVAL;
+
+   return ret;
+}
-- 
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[U-Boot] [PATCH v6 06/10] optee: Add optee_image_get_load_addr()

[Bryan O'Donoghue]

This patch adds optee_image_get_load_addr() a helper function used to
calculate the load-address of an OPTEE image based on the lower
entry-point address given in the OPTEE header.

Signed-off-by: Bryan O'Donoghue 
Cc: Harinarayan Bhatta 
Cc: Andrew F. Davis 
Cc: Tom Rini 
Cc: Kever Yang 
Cc: Philipp Tomsich 
Cc: Peng Fan 
Tested-by: Peng Fan 
---
 include/tee/optee.h | 5 +
 1 file changed, 5 insertions(+)

diff --git a/include/tee/optee.h b/include/tee/optee.h
index eb328d3..e782cb0 100644
--- a/include/tee/optee.h
+++ b/include/tee/optee.h
@@ -36,6 +36,11 @@ static inline uint32_t optee_image_get_entry_point(const 
image_header_t *hdr)
return optee_hdr->init_load_addr_lo;
 }
 
+static inline uint32_t optee_image_get_load_addr(const image_header_t *hdr)
+{
+   return optee_image_get_entry_point(hdr) - sizeof(struct optee_header);
+}
+
 #if defined(CONFIG_OPTEE)
 int optee_verify_image(struct optee_header *hdr, unsigned long tzdram_start,
   unsigned long tzdram_len, unsigned long image_len);
-- 
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[U-Boot] [PATCH v6 09/10] image: Add IH_OS_TEE for TEE chain-load boot

[Bryan O'Donoghue]

This patch adds a new type IH_OS_TEE. This new OS type will be used for
chain-loading to Linux via a TEE.

With this patch in-place you can generate a bootable OPTEE image like this:

mkimage -A arm -T kernel -O tee -C none -d tee.bin uTee.optee

where "tee.bin" is the input binary prefixed with an OPTEE header and
uTee.optee is the output prefixed with a u-boot wrapper header.

This image type "-T kernel -O tee" is differentiated from the existing
IH_TYPE_TEE "-T tee" in that the IH_TYPE is installed by u-boot (flow
control returns to u-boot) whereas for the new IH_OS_TEE control passes to
the OPTEE firmware and the firmware chainloads onto Linux.

Andrew Davis gave the following ASCII diagram:

IH_OS_TEE: (mkimage -T kernel -O tee)
Non-Secure   Secure

 BootROM
   |
  -
 |
 v
SPL
 |
 v
   U-Boot -->
  <-  OP-TEE
  |
  V
Linux

IH_TYPE_TEE: (mkimage -T tee)
Non-Secure   Secure

 BootROM
   |
  -
 |
 v
SPL --->
 <-  OP-TEE
 |
 v
   U-Boot
  |
  V
Linux

Signed-off-by: Bryan O'Donoghue 
Suggested-by: Andrew F. Davis 
Cc: Harinarayan Bhatta 
Cc: Andrew F. Davis 
Cc: Tom Rini 
Cc: Kever Yang 
Cc: Philipp Tomsich 
Cc: Peng Fan 
Link: http://mrvan.github.io/optee-imx6ul
---
 common/image.c|  1 +
 include/image.h   |  1 +
 tools/default_image.c | 15 +--
 3 files changed, 15 insertions(+), 2 deletions(-)

diff --git a/common/image.c b/common/image.c
index 14be3ca..61e3d25 100644
--- a/common/image.c
+++ b/common/image.c
@@ -100,6 +100,7 @@ static const table_entry_t uimage_os[] = {
{   IH_OS_OSE,  "ose",  "Enea OSE", },
{   IH_OS_PLAN9,"plan9","Plan 9",   },
{   IH_OS_RTEMS,"rtems","RTEMS",},
+   {   IH_OS_TEE,  "tee",  "Trusted Execution Environment" 
},
{   IH_OS_U_BOOT,   "u-boot",   "U-Boot",   },
{   IH_OS_VXWORKS,  "vxworks",  "VxWorks",  },
 #if defined(CONFIG_CMD_ELF) || defined(USE_HOSTCC)
diff --git a/include/image.h b/include/image.h
index dbdaecb..a0a530d 100644
--- a/include/image.h
+++ b/include/image.h
@@ -153,6 +153,7 @@ enum {
IH_OS_PLAN9,/* Plan 9   */
IH_OS_OPENRTOS, /* OpenRTOS */
IH_OS_ARM_TRUSTED_FIRMWARE, /* ARM Trusted Firmware */
+   IH_OS_TEE,  /* Trusted Execution Environment */
 
IH_OS_COUNT,
 };
diff --git a/tools/default_image.c b/tools/default_image.c
index 4e5568e..c67f66b 100644
--- a/tools/default_image.c
+++ b/tools/default_image.c
@@ -18,6 +18,7 @@
 #include "mkimage.h"
 
 #include 
+#include 
 #include 
 
 static image_header_t header;
@@ -90,6 +91,8 @@ static void image_set_header(void *ptr, struct stat *sbuf, 
int ifd,
uint32_t checksum;
time_t time;
uint32_t imagesize;
+   uint32_t ep;
+   uint32_t addr;
 
image_header_t * hdr = (image_header_t *)ptr;
 
@@ -99,18 +102,26 @@ static void image_set_header(void *ptr, struct stat *sbuf, 
int ifd,
sbuf->st_size - sizeof(image_header_t));
 
time = imagetool_get_source_date(params, sbuf->st_mtime);
+   ep = params->ep;
+   addr = params->addr;
+
if (params->type == IH_TYPE_FIRMWARE_IVT)
/* Add size of CSF minus IVT */
imagesize = sbuf->st_size - sizeof(image_header_t) + 0x1FE0;
else
imagesize = sbuf->st_size - sizeof(image_header_t);
 
+   if (params->os == IH_OS_TEE) {
+   addr = optee_image_get_load_addr(hdr);
+   ep = optee_image_get_entry_point(hdr);
+   }
+
/* Build new header */
image_set_magic(hdr, IH_MAGIC);
image_set_time(hdr, time);
image_set_size(hdr, imagesize);
-   image_set_load(hdr, params->addr);
-   image_set_ep(hdr, params->ep);
+   image_set_load(hdr, addr);
+   image_set_ep(hdr, ep);
image_set_dcrc(hdr, checksum);
image_set_os(hdr, params->os);
image_set_arch(hdr, params->arch);
-- 
2.7.4

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[U-Boot] [PATCH v6 08/10] optee: Add error printout

[Bryan O'Donoghue]

When encountering an error in OPTEE verification print out various details
of the OPTEE header to aid in further debugging of encountered errors.

Signed-off-by: Bryan O'Donoghue 
Cc: Harinarayan Bhatta 
Cc: Andrew F. Davis 
Cc: Tom Rini 
Cc: Kever Yang 
Cc: Philipp Tomsich 
Cc: Peng Fan 
Tested-by: Peng Fan 
---
 lib/optee/optee.c | 19 +--
 1 file changed, 17 insertions(+), 2 deletions(-)

diff --git a/lib/optee/optee.c b/lib/optee/optee.c
index 365c078..78a15e8 100644
--- a/lib/optee/optee.c
+++ b/lib/optee/optee.c
@@ -8,6 +8,12 @@
 #include 
 #include 
 
+#define optee_hdr_err_msg \
+   "OPTEE verification error:" \
+   "\n\thdr=%p image=0x%08lx magic=0x%08x tzdram 0x%08lx-0x%08lx " \
+   "\n\theader lo=0x%08x hi=0x%08x size=0x%08lx arch=0x%08x" \
+   "\n\tuimage params 0x%08lx-0x%08lx\n"
+
 int optee_verify_image(struct optee_header *hdr, unsigned long tzdram_start,
   unsigned long tzdram_len, unsigned long image_len)
 {
@@ -42,10 +48,19 @@ int optee_verify_bootm_image(unsigned long image_addr,
 
ret = optee_verify_image(hdr, tzdram_start, tzdram_len, image_len);
if (ret)
-   return ret;
+   goto error;
 
-   if (image_load_addr + sizeof(*hdr) != hdr->init_load_addr_lo)
+   if (image_load_addr + sizeof(*hdr) != hdr->init_load_addr_lo) {
ret = -EINVAL;
+   goto error;
+   }
+
+   return ret;
+error:
+   printf(optee_hdr_err_msg, hdr, image_addr, hdr->magic, tzdram_start,
+  tzdram_start + tzdram_len, hdr->init_load_addr_lo,
+  hdr->init_load_addr_hi, image_len, hdr->arch, image_load_addr,
+  image_load_addr + image_len);
 
return ret;
 }
-- 
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[U-Boot] [PATCH v6 01/10] optee: Add lib entries for sharing OPTEE code across ports

[Bryan O'Donoghue]

This patch adds code to lib to enable sharing of useful OPTEE code between
board-ports and architectures. The code on lib/optee/optee.c comes from the
TI omap2 port. Eventually the OMAP2 code will be patched to include the
shared code. The intention here is to add more useful OPTEE specific code
as more functionality gets added.

Signed-off-by: Bryan O'Donoghue 
Cc: Harinarayan Bhatta 
Cc: Andrew F. Davis 
Cc: Tom Rini 
Cc: Kever Yang 
Cc: Philipp Tomsich 
Cc: Peng Fan 
Tested-by: Peng Fan 
---
 include/tee/optee.h | 16 
 lib/Kconfig |  1 +
 lib/Makefile|  1 +
 lib/optee/Kconfig   |  8 
 lib/optee/Makefile  |  7 +++
 lib/optee/optee.c   | 31 +++
 6 files changed, 64 insertions(+)
 create mode 100644 lib/optee/Kconfig
 create mode 100644 lib/optee/Makefile
 create mode 100644 lib/optee/optee.c

diff --git a/include/tee/optee.h b/include/tee/optee.h
index 9ab0d08..8943afb 100644
--- a/include/tee/optee.h
+++ b/include/tee/optee.h
@@ -10,6 +10,8 @@
 #ifndef_OPTEE_H
 #define _OPTEE_H
 
+#include 
+
 #define OPTEE_MAGIC 0x4554504f
 #define OPTEE_VERSION   1
 #define OPTEE_ARCH_ARM320
@@ -27,4 +29,18 @@ struct optee_header {
uint32_t paged_size;
 };
 
+#if defined(CONFIG_OPTEE)
+int optee_verify_image(struct optee_header *hdr, unsigned long tzdram_start,
+  unsigned long tzdram_len, unsigned long image_len);
+#else
+static inline int optee_verify_image(struct optee_header *hdr,
+unsigned long tzdram_start,
+unsigned long tzdram_len,
+unsigned long image_len)
+{
+   return -EPERM;
+}
+
+#endif
+
 #endif /* _OPTEE_H */
diff --git a/lib/Kconfig b/lib/Kconfig
index 4fd41c4..a4029a6 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -310,5 +310,6 @@ endmenu
 
 source lib/efi/Kconfig
 source lib/efi_loader/Kconfig
+source lib/optee/Kconfig
 
 endmenu
diff --git a/lib/Makefile b/lib/Makefile
index 0db41c1..35da570 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -18,6 +18,7 @@ obj-$(CONFIG_FIT) += libfdt/
 obj-$(CONFIG_OF_LIVE) += of_live.o
 obj-$(CONFIG_CMD_DHRYSTONE) += dhry/
 obj-$(CONFIG_ARCH_AT91) += at91/
+obj-$(CONFIG_OPTEE) += optee/
 
 obj-$(CONFIG_AES) += aes.o
 obj-y += charset.o
diff --git a/lib/optee/Kconfig b/lib/optee/Kconfig
new file mode 100644
index 000..2e406fe
--- /dev/null
+++ b/lib/optee/Kconfig
@@ -0,0 +1,8 @@
+config OPTEE
+   bool "Support OPTEE images"
+   help
+ U-Boot can be configured to boot OPTEE images.
+ Selecting this option will enable shared OPTEE library code and
+  enable an OPTEE specific bootm command that will perform additional
+  OPTEE specific checks before booting an OPTEE image created with
+  mkimage.
diff --git a/lib/optee/Makefile b/lib/optee/Makefile
new file mode 100644
index 000..03e832f
--- /dev/null
+++ b/lib/optee/Makefile
@@ -0,0 +1,7 @@
+#
+# (C) Copyright 2017 Linaro
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-$(CONFIG_OPTEE) += optee.o
diff --git a/lib/optee/optee.c b/lib/optee/optee.c
new file mode 100644
index 000..2cc16d7
--- /dev/null
+++ b/lib/optee/optee.c
@@ -0,0 +1,31 @@
+/*
+ * Copyright (C) 2017 Linaro
+ * Bryan O'Donoghue 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+
+int optee_verify_image(struct optee_header *hdr, unsigned long tzdram_start,
+  unsigned long tzdram_len, unsigned long image_len)
+{
+   unsigned long tzdram_end = tzdram_start + tzdram_len;
+   uint32_t tee_file_size;
+
+   tee_file_size = hdr->init_size + hdr->paged_size +
+   sizeof(struct optee_header);
+
+   if (hdr->magic != OPTEE_MAGIC ||
+   hdr->version != OPTEE_VERSION ||
+   hdr->init_load_addr_hi > tzdram_end ||
+   hdr->init_load_addr_lo < tzdram_start ||
+   tee_file_size > tzdram_len ||
+   tee_file_size != image_len ||
+   (hdr->init_load_addr_lo + tee_file_size) > tzdram_end) {
+   return -EINVAL;
+   }
+
+   return 0;
+}
-- 
2.7.4

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[U-Boot] [PATCH v6 02/10] optee: Add CONFIG_OPTEE_TZDRAM_SIZE

[Bryan O'Donoghue]

OPTEE is currently linked to a specific area of memory called the TrustZone
DRAM. This patch adds a CONFIG entry for the default size of TrustZone DRAM
that a board-port can over-ride. The region that U-Boot sets aside for the
OPTEE run-time should be verified before attempting to hand off to the
OPTEE run-time. Each board-port should carefully ensure that the TZDRAM
size specified in the OPTEE build and the TZDRAM size specified in U-Boot
match-up.

Further patches will use TZDRAM size with other defines and variables to
carry out a degree of automated verification in U-Boot prior to trying to
boot an OPTEE image.

Signed-off-by: Bryan O'Donoghue 
Cc: Harinarayan Bhatta 
Cc: Andrew F. Davis 
Cc: Tom Rini 
Cc: Kever Yang 
Cc: Philipp Tomsich 
Cc: Peng Fan 
Tested-by: Peng Fan 
---
 lib/optee/Kconfig | 8 
 1 file changed, 8 insertions(+)

diff --git a/lib/optee/Kconfig b/lib/optee/Kconfig
index 2e406fe..41c0ab7 100644
--- a/lib/optee/Kconfig
+++ b/lib/optee/Kconfig
@@ -6,3 +6,11 @@ config OPTEE
   enable an OPTEE specific bootm command that will perform additional
   OPTEE specific checks before booting an OPTEE image created with
   mkimage.
+
+config OPTEE_TZDRAM_SIZE
+   hex "Amount of Trust-Zone RAM for the OPTEE image"
+   depends on OPTEE
+   default 0x300
+   help
+ The size of pre-allocated Trust Zone DRAM to allocate for the OPTEE
+ runtime.
-- 
2.7.4

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[U-Boot] [PATCH v6 00/10] Add new OPTEE bootm support to u-boot

[Bryan O'Donoghue]

v6:
- Fix CONFIG_BOOTM_TEE
  Manually editing .config file meant this disparity was missed.
  "Those whom the gods wish to destroy they first make mad"

v5:

This patchset now works by making a bootable OPTEE image

mkimage -A arm -T kernel -O tee -C none -d tee.bin uTee.optee

The concept is the same as the earlier version of this patchset except
instead of "mkimage -T tee" we do "mkimage -T kernel -O tee". Andrew
suggested this and it is technically feasible.

So here is the revised patchset.

- Converted IH_TYPE_OPTEE to IH_OS_TEE - Andrew

- Removed Tested-by: for Peng Fan on patches with churn as a result

- Added patch for CONFIG_OPTEE_ADDR
  This CONFIG entry will be used in an upcoming set of patch for the
  board I'm working with.

v4:
- New type "optee" renamed to "tee-bootable". We discussed making the
  namespace here more logical and obvious in another thread.

  Kever may or may not end up adding "tee-combo".

  This patchset will result in
  "tee" and "tee-bootable" being valid names. Since "tee" is an existing
  image type the name will be maintained. - Tom

- Added doc/README.trusted-execution-environment
  This gives a brief introduction on TEE plus some links to the spec and
  the op-tee website.

  In then lays out the difference between these two types
  "tee" (tee-standalone)
  "tee-bootable"

  - Bryan, Philipp

- Small change made to comment on existing TEE - Bryan

- Reworded the Kconfig option "OPTEE"
  Makes a little bit more sense to me re-reading now - Bryan

- Add patch to define CONFIG_OPTEE_LOAD_ADDR
  An upcoming set of patches for a board will make use of this define in an
  OPTEE context.

v3:

- Rework printout to be added at the end as opposed to churn over three
  separate patches - Andrew

- Reword patch 006 to better explain the thinking behind new image type
  - Andrew

v2:
- Added CONFIG_OPTEE_TZDRAM_BASE instead of #ifndef OPTEE_TZDRAM_BASE
  as an error. - Tom Rini

- Added Tested-by: Peng Fan  - as indicated

- Added better explanation text to patch 6/9
  "tools: mkimage: add optee image type"

- Fixed some checkpatch warnings in optee.c

v1:
This series adds a new OPTEE bootable image type to u-boot, which is
directly bootable with the bootm command.

There is already a TEE image type but, in this case the TEE firmware is
loaded into RAM, jumped into and then back out of. This image type is a
directly bootable image as described here :
http://mrvan.github.io/optee-imx6ul

Instead of reusing the Linux bootable image type instead a new image type
is defined, which allows us to perform additional image verification, prior
to handing off control via bootm.

OPTEE images get linked to a specific address at compile time and must be
loaded to this address too. This series extends out mkimage with a new
image type that allows the OPTEE binary link location to be validated
against CONFIG_OPTEE_TZDRAM_BASE and CONFIG_OPTEE_TZDRAM_SIZE respectively
prior to proceeding through the bootm phase.

Once applied you can generate a bootable OPTEE image like this

mkimage -A arm -T optee -C none -d ./out/arm-plat-imx/core/tee.bin uTee.optee

That image can then be booted directly by bootm. bootm will verify the
header contents of the OPTEE binary against the DRAM area carved out in
u-boot. If the defined DRAM area does not match the link address specified
we refuse to boot.

Kever - I'd like to suggest that your OPTEE SPL image takes a different
image type IH_TYPE_OPTEE_SPL ? to indicate the different behavior your
image type has versus a directly bootable bootm image.


Bryan O'Donoghue (10):
  optee: Add lib entries for sharing OPTEE code across ports
  optee: Add CONFIG_OPTEE_TZDRAM_SIZE
  optee: Add CONFIG_OPTEE_TZDRAM_BASE
  optee: Add CONFIG_OPTEE_LOAD_ADDR
  optee: Add optee_image_get_entry_point()
  optee: Add optee_image_get_load_addr()
  optee: Add optee_verify_bootm_image()
  optee: Add error printout
  image: Add IH_OS_TEE for TEE chain-load boot
  bootm: optee: Add a bootm command for type IH_OS_TEE

 common/bootm_os.c | 32 +
 common/image.c|  1 +
 include/image.h   |  1 +
 include/tee/optee.h   | 41 
 lib/Kconfig   |  1 +
 lib/Makefile  |  1 +
 lib/optee/Kconfig | 39 ++
 lib/optee/Makefile|  7 ++
 lib/optee/optee.c | 66 +++
 tools/default_image.c | 15 ++--
 10 files changed, 202 insertions(+), 2 deletions(-)
 create mode 100644 lib/optee/Kconfig
 create mode 100644 lib/optee/Makefile
 create mode 100644 lib/optee/optee.c

-- 
2.7.4

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Re: [U-Boot] [PATCH 1/2] SPI Flash: add support of sst26wf* flash series

[Jagan Teki]

On Tue, Feb 6, 2018 at 8:45 PM, Eugeniy Paltsev
 wrote:
> sst26wf flash series block protection implementation differs
> from other SST series, so add implementation for sst26wf
> lock/unlock/is_locked functions.

How it is different from existing SST implementation, Linux has
support this similar part and use normal SST?
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[U-Boot] [PATCH v3 00/10] splash screen on the stm32f769 disco board

[yannick fertre]

Version 3:
- Replace some pr_error, pr_warn or pr_info by dev_error, dev_warn & dev_info.
- Refresh stm32f769-disco_defconfig with last modification done on v2018.3-rc4.
- rework include files ordering.

Version 2:
- Replace debug log by pr_error, pr_warn or pr_info.
- Rework bridge between ltdc & dsi panel
- Rework backligh management (with or witout gpio)
- Rework panel otm8009a
- Add new panel raydium rm68200

Version 1:
- Initial commit

This serie contains all patchsets needed for displaying a splash screen 
on the stm32f769 disco board.
A new config has been created configs/stm32f769-disco_defconfig.
This is necessary due to the difference of panels between stm32f769-disco &
stm32f746-disco boards.
This serie depends on:
  http://patchwork.ozlabs.org/patch/870938/
  http://patchwork.ozlabs.org/cover/880576/
yannick fertre (10):
  video: stm32: stm32_ltdc: add bridge to display controller
  video: stm32: stm32_ltdc: update debug log
  video: add support of MIPI DSI interface
  video: add support of panel OTM8009A
  video: add MIPI DSI host controller bridge
  video: add support of STM32 MIPI DSI controller driver
  video: add support of panel rm68200
  arm: dts: stm32: add dsi for STM32F746
  arm: dts: stm32: add display for STM32F769 disco board
  board: Add STM32F769 SoC, discovery board support

 arch/arm/dts/stm32f746.dtsi|  12 +
 arch/arm/dts/stm32f769-disco.dts   |  71 
 configs/stm32f769-disco_defconfig  |  65 +++
 drivers/video/Kconfig  |  32 ++
 drivers/video/Makefile |   4 +
 drivers/video/dw_mipi_dsi.c| 822 +
 drivers/video/mipi_display.c   | 807 
 drivers/video/orisetech_otm8009a.c | 327 +++
 drivers/video/raydium-rm68200.c| 326 +++
 drivers/video/stm32/Kconfig|  10 +
 drivers/video/stm32/Makefile   |   1 +
 drivers/video/stm32/stm32_dsi.c| 426 +++
 drivers/video/stm32/stm32_ltdc.c   | 144 ---
 include/dw_mipi_dsi.h  |  34 ++
 include/mipi_display.h | 257 +++-
 15 files changed, 3279 insertions(+), 59 deletions(-)
 create mode 100644 configs/stm32f769-disco_defconfig
 create mode 100644 drivers/video/dw_mipi_dsi.c
 create mode 100644 drivers/video/mipi_display.c
 create mode 100644 drivers/video/orisetech_otm8009a.c
 create mode 100644 drivers/video/raydium-rm68200.c
 create mode 100644 drivers/video/stm32/stm32_dsi.c
 create mode 100644 include/dw_mipi_dsi.h

-- 
1.9.1

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[U-Boot] [PATCH v3 04/10] otm

[yannick fertre]

---
 drivers/video/orisetech_otm8009a.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/video/orisetech_otm8009a.c 
b/drivers/video/orisetech_otm8009a.c
index 81b11d7..aa8139a 100644
--- a/drivers/video/orisetech_otm8009a.c
+++ b/drivers/video/orisetech_otm8009a.c
@@ -289,9 +289,11 @@ static int otm8009a_panel_probe(struct udevice *dev)
struct otm8009a_panel_priv *priv = dev_get_priv(dev);
int ret;
 
-   /* reset panel must be done before probe */
+   /* reset panel */
dm_gpio_set_value(>reset, true);
 
+   mdelay(1);
+
if (IS_ENABLED(CONFIG_DM_REGULATOR) && priv->reg) {
dev_err(dev, "enable regulator '%s'\n", priv->reg->name);
ret = regulator_set_enable(priv->reg, true);
-- 
1.9.1

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[U-Boot] [PATCH v3 10/10] board: Add STM32F769 SoC, discovery board support

[yannick fertre]

Signed-off-by: yannick fertre 
---
 configs/stm32f769-disco_defconfig | 65 +++
 1 file changed, 65 insertions(+)
 create mode 100644 configs/stm32f769-disco_defconfig

diff --git a/configs/stm32f769-disco_defconfig 
b/configs/stm32f769-disco_defconfig
new file mode 100644
index 000..01b3b51
--- /dev/null
+++ b/configs/stm32f769-disco_defconfig
@@ -0,0 +1,65 @@
+CONFIG_ARM=y
+CONFIG_STM32=y
+CONFIG_SYS_TEXT_BASE=0x08008000
+CONFIG_SYS_MALLOC_F_LEN=0xC00
+CONFIG_STM32F7=y
+CONFIG_TARGET_STM32F746_DISCO=y
+CONFIG_DEFAULT_DEVICE_TREE="stm32f769-disco"
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_BOOTDELAY=3
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0 
ignore_loglevel"
+# CONFIG_DISPLAY_CPUINFO is not set
+# CONFIG_DISPLAY_BOARDINFO is not set
+CONFIG_BOARD_EARLY_INIT_F=y
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_PROMPT="U-Boot > "
+CONFIG_AUTOBOOT_KEYED=y
+CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n"
+CONFIG_AUTOBOOT_STOP_STR=" "
+CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_GPT=y
+# CONFIG_RANDOM_UUID is not set
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_SNTP=y
+CONFIG_CMD_DNS=y
+CONFIG_CMD_LINK_LOCAL=y
+CONFIG_CMD_BMP=y
+CONFIG_CMD_TIMER=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+# CONFIG_DOS_PARTITION is not set
+# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_OF_CONTROL=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_NETCONSOLE=y
+# CONFIG_BLK is not set
+CONFIG_DM_MMC=y
+# CONFIG_SPL_DM_MMC is not set
+CONFIG_ARM_PL180_MMCI=y
+CONFIG_MTD=y
+CONFIG_MTD_NOR_FLASH=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y
+# CONFIG_PINCTRL_FULL is not set
+CONFIG_DM_SPI=y
+CONFIG_STM32_QSPI=y
+CONFIG_DM_VIDEO=y
+CONFIG_BACKLIGHT_GPIO=y
+CONFIG_VIDEO_LCD_ORISETECH_OTM8009A=y
+CONFIG_VIDEO_STM32=y
+CONFIG_VIDEO_STM32_DSI=y
+CONFIG_VIDEO_STM32_MAX_XRES=480
+CONFIG_VIDEO_STM32_MAX_YRES=800
+CONFIG_OF_LIBFDT_OVERLAY=y
+# CONFIG_EFI_LOADER is not set
-- 
1.9.1

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[U-Boot] [PATCH v3 02/10] video: stm32: stm32_ltdc: update debug log

[yannick fertre]

Replace  macro debug by pr_error, pr_warn or pr_info.

Signed-off-by: yannick fertre 
---
 drivers/video/stm32/stm32_ltdc.c | 67 ++--
 1 file changed, 30 insertions(+), 37 deletions(-)

diff --git a/drivers/video/stm32/stm32_ltdc.c b/drivers/video/stm32/stm32_ltdc.c
index bd9c0de..3e12c71 100644
--- a/drivers/video/stm32/stm32_ltdc.c
+++ b/drivers/video/stm32/stm32_ltdc.c
@@ -5,7 +5,6 @@
  *
  * SPDX-License-Identifier: GPL-2.0+
  */
-
 #include 
 #include 
 #include 
@@ -13,12 +12,10 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
-#include 
-
-DECLARE_GLOBAL_DATA_PTR;
 
 struct stm32_ltdc_priv {
void __iomem *regs;
@@ -176,13 +173,13 @@ static u32 stm32_ltdc_get_pixel_format(enum 
video_log2_bpp l2bpp)
case VIDEO_BPP2:
case VIDEO_BPP4:
default:
-   debug("%s: warning %dbpp not supported yet, %dbpp instead\n",
- __func__, VNBITS(l2bpp), VNBITS(VIDEO_BPP16));
+   pr_warn("warning %dbpp not supported yet, %dbpp instead\n",
+   VNBITS(l2bpp), VNBITS(VIDEO_BPP16));
pf = PF_RGB565;
break;
}
 
-   debug("%s: %d bpp -> ltdc pf %d\n", __func__, VNBITS(l2bpp), pf);
+   pr_info("%d bpp -> ltdc pf %d\n", VNBITS(l2bpp), pf);
 
return (u32)pf;
 }
@@ -249,7 +246,7 @@ static void stm32_ltdc_set_mode(struct stm32_ltdc_priv 
*priv,
 
/* Signal polarities */
val = 0;
-   debug("%s: timing->flags 0x%08x\n", __func__, timings->flags);
+   dev_info(dev, "timing->flags 0x%08x\n", timings->flags);
if (timings->flags & DISPLAY_FLAGS_HSYNC_HIGH)
val |= GCR_HSPOL;
if (timings->flags & DISPLAY_FLAGS_VSYNC_HIGH)
@@ -343,26 +340,25 @@ static int stm32_ltdc_probe(struct udevice *dev)
 
priv->regs = (void *)dev_read_addr(dev);
if ((fdt_addr_t)priv->regs == FDT_ADDR_T_NONE) {
-   debug("%s: ltdc dt register address error\n", __func__);
+   dev_err(dev, "ltdc dt register address error\n");
return -EINVAL;
}
 
ret = clk_get_by_index(dev, 0, );
if (ret) {
-   debug("%s: peripheral clock get error %d\n", __func__, ret);
+   dev_err(dev, "peripheral clock get error %d\n", ret);
return ret;
}
 
ret = clk_enable();
if (ret) {
-   debug("%s: peripheral clock enable error %d\n",
- __func__, ret);
+   dev_err(dev, "peripheral clock enable error %d\n", ret);
return ret;
}
 
ret = reset_get_by_index(dev, 0, );
if (ret) {
-   debug("%s: missing ltdc hardware reset\n", __func__);
+   dev_err(dev, "missing ltdc hardware reset\n");
return -ENODEV;
}
 
@@ -371,42 +367,39 @@ static int stm32_ltdc_probe(struct udevice *dev)
 
 #ifdef CONFIG_VIDEO_BRIDGE
ret = uclass_get_device(UCLASS_VIDEO_BRIDGE, 0, );
-   if (ret) {
-   debug("%s: No video bridge, or no backlight on bridge\n",
- __func__);
-   }
+   if (ret)
+   dev_info(dev, "No video bridge, or no backlight on bridge\n");
 
if (bridge) {
ret = video_bridge_attach(bridge);
if (ret) {
-   debug("%s: fail to attach bridge\n", __func__);
+   dev_err(dev, "fail to attach bridge\n");
return ret;
}
}
 #endif
ret = uclass_first_device(UCLASS_PANEL, );
if (ret) {
-   debug("%s: panel device error %d\n", __func__, ret);
+   dev_err(dev, "panel device error %d\n", ret);
return ret;
}
 
ret = fdtdec_decode_display_timing(gd->fdt_blob, dev_of_offset(panel),
   0, );
if (ret) {
-   debug("%s: decode display timing error %d\n",
- __func__, ret);
+   dev_err(dev, "decode display timing error %d\n", ret);
return ret;
}
 
rate = clk_set_rate(, timings.pixelclock.typ);
if (rate < 0) {
-   debug("%s: fail to set pixel clock %d hz %d hz\n",
- __func__, timings.pixelclock.typ, rate);
+   dev_err(dev, "fail to set pixel clock %d hz %d hz\n",
+   timings.pixelclock.typ, rate);
return rate;
}
 
-   debug("%s: Set pixel clock req %d hz get %d hz\n", __func__,
- timings.pixelclock.typ, rate);
+   dev_info(dev, "set pixel clock req %d hz get %d hz\n",
+timings.pixelclock.typ, rate);
 
/* TODO Below parameters are hard-coded for the moment... */
priv->l2bpp = VIDEO_BPP16;
@@ -417,12 +410,12 @@ static int stm32_ltdc_probe(struct udevice 

[U-Boot] [PATCH v3 09/10] arm: dts: stm32: add display for STM32F769 disco board

[yannick fertre]

Enable the display controller, mipi dsi bridge & panel.
Set panel display timings.

Signed-off-by: yannick fertre 
---
 arch/arm/dts/stm32f769-disco.dts | 71 
 1 file changed, 71 insertions(+)

diff --git a/arch/arm/dts/stm32f769-disco.dts b/arch/arm/dts/stm32f769-disco.dts
index 59c9d31..82985b9 100644
--- a/arch/arm/dts/stm32f769-disco.dts
+++ b/arch/arm/dts/stm32f769-disco.dts
@@ -42,6 +42,7 @@
 
 /dts-v1/;
 #include "stm32f746.dtsi"
+#include 
 #include 
 
 / {
@@ -264,3 +265,73 @@
bus-width = <4>;
max-frequency = <2500>;
 };
+
+ {
+   status = "okay";
+
+   port {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   ltdc_out_dsi: endpoint@0 {
+   reg = <0>;
+   remote-endpoint = <_in>;
+   };
+   };
+};
+
+ {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   status = "okay";
+
+   ports {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   port@0 {
+   reg = <0>;
+   dsi_in: endpoint {
+   remote-endpoint = <_out_dsi>;
+   };
+   };
+
+   port@1 {
+   reg = <1>;
+   dsi_out: endpoint {
+   remote-endpoint = <_panel_in>;
+   };
+   };
+   };
+
+   panel-dsi@0 {
+   compatible = "orisetech,otm8009a";
+   reg = <0>; /* dsi virtual channel (0..3) */
+   reset-gpios = < 15 GPIO_ACTIVE_LOW>;
+   status = "okay";
+
+   port {
+   dsi_panel_in: endpoint {
+   remote-endpoint = <_out>;
+   };
+   };
+
+   display-timings {
+   timing@0 {
+   clock-frequency = <32729000>;
+   hactive = <480>;
+   hfront-porch = <120>;
+   hback-porch = <63>;
+   hsync-len = <120>;
+   vactive = <800>;
+   vfront-porch = <12>;
+   vback-porch = <12>;
+   vsync-len = <12>;
+   hsync-active = <0>;
+   vsync-active = <0>;
+   de-active = <0>;
+   pixelclk-active = <1>;
+   };
+   };
+   };
+};
-- 
1.9.1

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Re: [U-Boot] [PATCH v3 00/10] splash screen on the stm32f769 disco board

[Daniel Vetter]

On Tue, Mar 13, 2018 at 02:49:59PM +0100, yannick fertre wrote:
> Version 3:
> - Replace some pr_error, pr_warn or pr_info by dev_error, dev_warn & dev_info.
> - Refresh stm32f769-disco_defconfig with last modification done on 
> v2018.3-rc4.
> - rework include files ordering.
> 
> Version 2:
> - Replace debug log by pr_error, pr_warn or pr_info.
> - Rework bridge between ltdc & dsi panel
> - Rework backligh management (with or witout gpio)
> - Rework panel otm8009a
> - Add new panel raydium rm68200
> 
> Version 1:
> - Initial commit
> 
> This serie contains all patchsets needed for displaying a splash screen 
> on the stm32f769 disco board.
> A new config has been created configs/stm32f769-disco_defconfig.
> This is necessary due to the difference of panels between stm32f769-disco &
> stm32f746-disco boards.

Shouldn't we patch the drivers/gpu/drm/stm driver instead of the
drivers/video one? fbdev is kinda a dead end and not for adding new hw
support ...
-Daniel

> This serie depends on:
>   http://patchwork.ozlabs.org/patch/870938/
>   http://patchwork.ozlabs.org/cover/880576/
> yannick fertre (10):
>   video: stm32: stm32_ltdc: add bridge to display controller
>   video: stm32: stm32_ltdc: update debug log
>   video: add support of MIPI DSI interface
>   video: add support of panel OTM8009A
>   video: add MIPI DSI host controller bridge
>   video: add support of STM32 MIPI DSI controller driver
>   video: add support of panel rm68200
>   arm: dts: stm32: add dsi for STM32F746
>   arm: dts: stm32: add display for STM32F769 disco board
>   board: Add STM32F769 SoC, discovery board support
> 
>  arch/arm/dts/stm32f746.dtsi|  12 +
>  arch/arm/dts/stm32f769-disco.dts   |  71 
>  configs/stm32f769-disco_defconfig  |  65 +++
>  drivers/video/Kconfig  |  32 ++
>  drivers/video/Makefile |   4 +
>  drivers/video/dw_mipi_dsi.c| 822 
> +
>  drivers/video/mipi_display.c   | 807 
>  drivers/video/orisetech_otm8009a.c | 327 +++
>  drivers/video/raydium-rm68200.c| 326 +++
>  drivers/video/stm32/Kconfig|  10 +
>  drivers/video/stm32/Makefile   |   1 +
>  drivers/video/stm32/stm32_dsi.c| 426 +++
>  drivers/video/stm32/stm32_ltdc.c   | 144 ---
>  include/dw_mipi_dsi.h  |  34 ++
>  include/mipi_display.h | 257 +++-
>  15 files changed, 3279 insertions(+), 59 deletions(-)
>  create mode 100644 configs/stm32f769-disco_defconfig
>  create mode 100644 drivers/video/dw_mipi_dsi.c
>  create mode 100644 drivers/video/mipi_display.c
>  create mode 100644 drivers/video/orisetech_otm8009a.c
>  create mode 100644 drivers/video/raydium-rm68200.c
>  create mode 100644 drivers/video/stm32/stm32_dsi.c
>  create mode 100644 include/dw_mipi_dsi.h
> 
> -- 
> 1.9.1
> 
> ___
> dri-devel mailing list
> dri-de...@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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[U-Boot] [PATCH v3 08/10] arm: dts: stm32: add dsi for STM32F746

[yannick fertre]

Add mipi dsi bridge node in device-tree.

Signed-off-by: yannick fertre 
---
 arch/arm/dts/stm32f746.dtsi | 12 
 1 file changed, 12 insertions(+)

diff --git a/arch/arm/dts/stm32f746.dtsi b/arch/arm/dts/stm32f746.dtsi
index 8581df9..3b8af67 100644
--- a/arch/arm/dts/stm32f746.dtsi
+++ b/arch/arm/dts/stm32f746.dtsi
@@ -339,6 +339,18 @@
u-boot,dm-pre-reloc;
status = "disabled";
};
+
+   dsi: dsi@40016c00 {
+   compatible = "st,stm32-dsi";
+   reg = <0x40016C00 0x800>;
+   resets = < STM32F7_APB2_RESET(DSI)>;
+   clocks =  < 0 STM32F7_APB2_CLOCK(DSI)>,
+ < 0 STM32F7_APB2_CLOCK(LTDC)>,
+ <_hse>;
+   clock-names = "pclk", "px_clk", "ref";
+   u-boot,dm-pre-reloc;
+   status = "disabled";
+   };
};
 };
 
-- 
1.9.1

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[U-Boot] [PATCH v3 06/10] video: add support of STM32 MIPI DSI controller driver

[yannick fertre]

Add the STM32 DSI controller driver that uses the Synopsys DesignWare
MIPI DSI host controller bridge.

Signed-off-by: yannick fertre 
---
 drivers/video/stm32/Kconfig |  10 +
 drivers/video/stm32/Makefile|   1 +
 drivers/video/stm32/stm32_dsi.c | 426 
 3 files changed, 437 insertions(+)
 create mode 100644 drivers/video/stm32/stm32_dsi.c

diff --git a/drivers/video/stm32/Kconfig b/drivers/video/stm32/Kconfig
index 113a2bb..2ea6f18 100644
--- a/drivers/video/stm32/Kconfig
+++ b/drivers/video/stm32/Kconfig
@@ -15,6 +15,16 @@ menuconfig VIDEO_STM32
  DSI. This option enables these supports which can be used on
  devices which have RGB TFT or DSI display connected.
 
+config VIDEO_STM32_DSI
+   bool "Enable STM32 DSI video support"
+   depends on VIDEO_STM32
+   select VIDEO_MIPI_DSI
+   select VIDEO_BRIDGE
+   select VIDEO_DW_MIPI_DSI
+   help
+ This option enables support DSI internal bridge which can be used on
+ devices which have DSI display connected.
+
 config VIDEO_STM32_MAX_XRES
int "Maximum horizontal resolution (for memory allocation purposes)"
depends on VIDEO_STM32
diff --git a/drivers/video/stm32/Makefile b/drivers/video/stm32/Makefile
index 372a2e1..f8c3ff7 100644
--- a/drivers/video/stm32/Makefile
+++ b/drivers/video/stm32/Makefile
@@ -8,3 +8,4 @@
 #
 
 obj-${CONFIG_VIDEO_STM32} = stm32_ltdc.o
+obj-${CONFIG_VIDEO_STM32_DSI} += stm32_dsi.o
diff --git a/drivers/video/stm32/stm32_dsi.c b/drivers/video/stm32/stm32_dsi.c
new file mode 100644
index 000..949db4f
--- /dev/null
+++ b/drivers/video/stm32/stm32_dsi.c
@@ -0,0 +1,426 @@
+/*
+ * Copyright (C) 2018 STMicroelectronics - All Rights Reserved
+ * Author(s): Philippe Cornu  for STMicroelectronics.
+ *   Yannick Fertre  for STMicroelectronics.
+ *
+ * This driver is based on the mipi dsi driver from
+ * drivers/gpu/drm/stm/dw_mipi_dsi-stm.c (kernel linux).
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define HWVER_130  0x31333000  /* IP version 1.30 */
+#define HWVER_131  0x31333100  /* IP version 1.31 */
+
+/* DSI digital registers & bit definitions */
+#define DSI_VERSION0x00
+#define VERSIONGENMASK(31, 8)
+
+/*
+ * DSI wrapper registers & bit definitions
+ * Note: registers are named as in the Reference Manual
+ */
+#define DSI_WCFGR  0x0400  /* Wrapper ConFiGuration Reg */
+#define WCFGR_DSIM BIT(0)  /* DSI Mode */
+#define WCFGR_COLMUX   GENMASK(3, 1)   /* COLor MUltipleXing */
+
+#define DSI_WCR0x0404  /* Wrapper Control Reg */
+#define WCR_DSIEN  BIT(3)  /* DSI ENable */
+
+#define DSI_WISR   0x040C  /* Wrapper Interrupt and Status Reg */
+#define WISR_PLLLS BIT(8)  /* PLL Lock Status */
+#define WISR_RRS   BIT(12) /* Regulator Ready Status */
+
+#define DSI_WPCR0  0x0418  /* Wrapper Phy Conf Reg 0 */
+#define WPCR0_UIX4 GENMASK(5, 0)   /* Unit Interval X 4 */
+#define WPCR0_TDDL BIT(16) /* Turn Disable Data Lanes */
+
+#define DSI_WRPCR  0x0430  /* Wrapper Regulator & Pll Ctrl Reg */
+#define WRPCR_PLLENBIT(0)  /* PLL ENable */
+#define WRPCR_NDIV GENMASK(8, 2)   /* pll loop DIVision Factor */
+#define WRPCR_IDF  GENMASK(14, 11) /* pll Input Division Factor */
+#define WRPCR_ODF  GENMASK(17, 16) /* pll Output Division Factor */
+#define WRPCR_REGENBIT(24) /* REGulator ENable */
+#define WRPCR_BGRENBIT(28) /* BandGap Reference ENable */
+#define IDF_MIN1
+#define IDF_MAX7
+#define NDIV_MIN   10
+#define NDIV_MAX   125
+#define ODF_MIN1
+#define ODF_MAX8
+
+/* dsi color format coding according to the datasheet */
+enum dsi_color {
+   DSI_RGB565_CONF1,
+   DSI_RGB565_CONF2,
+   DSI_RGB565_CONF3,
+   DSI_RGB666_CONF1,
+   DSI_RGB666_CONF2,
+   DSI_RGB888,
+};
+
+#define LANE_MIN_KBPS  31250
+#define LANE_MAX_KBPS  50
+
+/* Timeout for regulator on/off, pll lock/unlock & fifo empty */
+#define TIMEOUT_US 20
+
+struct stm32_dsi_priv {
+   struct mipi_dsi_device device;
+   void __iomem *base;
+   struct udevice *panel;
+   u32 pllref_clk;
+   u32 hw_version;
+   int lane_min_kbps;
+   int lane_max_kbps;
+};
+
+static inline void dsi_write(struct stm32_dsi_priv *dsi, u32 reg, u32 val)
+{
+   writel(val, dsi->base + reg);
+}
+
+static inline u32 dsi_read(struct stm32_dsi_priv *dsi, u32 reg)
+{
+   return readl(dsi->base + reg);
+}
+
+static inline void dsi_set(struct stm32_dsi_priv 

[U-Boot] [PATCH v3 07/10] video: add support of panel rm68200

[yannick fertre]

Support for Raydium rm68200 720p dsi 2dl video mode panel.

Signed-off-by: yannick fertre 
---
 drivers/video/Kconfig   |   8 +
 drivers/video/Makefile  |   1 +
 drivers/video/raydium-rm68200.c | 326 
 3 files changed, 335 insertions(+)
 create mode 100644 drivers/video/raydium-rm68200.c

diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 0f641d7..2561c59 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -328,6 +328,14 @@ config VIDEO_LCD_ORISETECH_OTM8009A
---help---
Support for Orise Tech otm8009a 480p dsi 2dl video mode panel.
 
+config VIDEO_LCD_RAYDIUM_RM68200
+   bool "RM68200 DSI LCD panel support"
+   depends on DM_VIDEO
+   select VIDEO_MIPI_DSI
+   default n
+   ---help---
+   Support for Raydium rm68200 720x1280 dsi 2dl video mode panel.
+
 config VIDEO_LCD_SSD2828
bool "SSD2828 bridge chip"
default n
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index 50be569..1a6c8d3 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -38,6 +38,7 @@ obj-$(CONFIG_VIDEO_DA8XX) += da8xx-fb.o videomodes.o
 obj-$(CONFIG_VIDEO_LCD_ANX9804) += anx9804.o
 obj-$(CONFIG_VIDEO_LCD_HITACHI_TX18D42VM) += hitachi_tx18d42vm_lcd.o
 obj-$(CONFIG_VIDEO_LCD_ORISETECH_OTM8009A) += orisetech_otm8009a.o
+obj-$(CONFIG_VIDEO_LCD_RAYDIUM_RM68200) += raydium-rm68200.o
 obj-$(CONFIG_VIDEO_LCD_SSD2828) += ssd2828.o
 obj-$(CONFIG_VIDEO_MB862xx) += mb862xx.o videomodes.o
 obj-$(CONFIG_VIDEO_MX3) += mx3fb.o videomodes.o
diff --git a/drivers/video/raydium-rm68200.c b/drivers/video/raydium-rm68200.c
new file mode 100644
index 000..49b22af
--- /dev/null
+++ b/drivers/video/raydium-rm68200.c
@@ -0,0 +1,326 @@
+/*
+ * Copyright (C) 2018 STMicroelectronics - All Rights Reserved
+ * Author(s): Yannick Fertre  for STMicroelectronics.
+ *   Philippe Cornu  for STMicroelectronics.
+ *
+ * This rm68200 panel driver is based on the panel driver from
+ * drivers/gpu/drm/panel/panel-raydium-rm68200.c (kernel linux)
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define DRV_NAME "raydium_rm68200"
+
+/*** Manufacturer Command Set ***/
+#define MCS_CMD_MODE_SW0xFE /* CMD Mode Switch */
+#define MCS_CMD1_UCS   0x00 /* User Command Set (UCS = CMD1) */
+#define MCS_CMD2_P00x01 /* Manufacture Command Set Page0 (CMD2 P0) */
+#define MCS_CMD2_P10x02 /* Manufacture Command Set Page1 (CMD2 P1) */
+#define MCS_CMD2_P20x03 /* Manufacture Command Set Page2 (CMD2 P2) */
+#define MCS_CMD2_P30x04 /* Manufacture Command Set Page3 (CMD2 P3) */
+
+/* CMD2 P0 commands (Display Options and Power) */
+#define MCS_STBCTR 0x12 /* TE1 Output Setting Zig-Zag Connection */
+#define MCS_SGOPCTR0x16 /* Source Bias Current */
+#define MCS_SDCTR  0x1A /* Source Output Delay Time */
+#define MCS_INVCTR 0x1B /* Inversion Type */
+#define MCS_EXT_PWR_IC 0x24 /* External PWR IC Control */
+#define MCS_SETAVDD0x27 /* PFM Control for AVDD Output */
+#define MCS_SETAVEE0x29 /* PFM Control for AVEE Output */
+#define MCS_BT2CTR 0x2B /* DDVDL Charge Pump Control */
+#define MCS_BT3CTR 0x2F /* VGH Charge Pump Control */
+#define MCS_BT4CTR 0x34 /* VGL Charge Pump Control */
+#define MCS_VCMCTR 0x46 /* VCOM Output Level Control */
+#define MCS_SETVGN 0x52 /* VG M/S N Control */
+#define MCS_SETVGP 0x54 /* VG M/S P Control */
+#define MCS_SW_CTRL0x5F /* Interface Control for PFM and MIPI */
+
+/* CMD2 P2 commands (GOA Timing Control) - no description in datasheet */
+#define GOA_VSTV1  0x00
+#define GOA_VSTV2  0x07
+#define GOA_VCLK1  0x0E
+#define GOA_VCLK2  0x17
+#define GOA_VCLK_OPT1  0x20
+#define GOA_BICLK1 0x2A
+#define GOA_BICLK2 0x37
+#define GOA_BICLK3 0x44
+#define GOA_BICLK4 0x4F
+#define GOA_BICLK_OPT1 0x5B
+#define GOA_BICLK_OPT2 0x60
+#define MCS_GOA_GPO1   0x6D
+#define MCS_GOA_GPO2   0x71
+#define MCS_GOA_EQ 0x74
+#define MCS_GOA_CLK_GALLON 0x7C
+#define MCS_GOA_FS_SEL00x7E
+#define MCS_GOA_FS_SEL10x87
+#define MCS_GOA_FS_SEL20x91
+#define MCS_GOA_FS_SEL30x9B
+#define MCS_GOA_BS_SEL00xAC
+#define MCS_GOA_BS_SEL10xB5
+#define MCS_GOA_BS_SEL20xBF
+#define MCS_GOA_BS_SEL30xC9
+#define MCS_GOA_BS_SEL40xD3
+
+/* CMD2 P3 commands (Gamma) */
+#define MCS_GAMMA_VP   0x60 /* Gamma VP1~VP16 */
+#define MCS_GAMMA_VN   0x70 /* Gamma VN1~VN16 */
+
+struct rm68200_panel_priv {
+   struct udevice *reg;
+   struct udevice *backlight;
+   struct gpio_desc reset;
+};
+
+static 

[U-Boot] [PATCH v3 04/10] video: add support of panel OTM8009A

[yannick fertre]

Support for Orise Tech otm8009a 480p dsi 2dl video mode panel.

Signed-off-by: yannick fertre 
---
 drivers/video/Kconfig  |   8 +
 drivers/video/Makefile |   1 +
 drivers/video/orisetech_otm8009a.c | 327 +
 3 files changed, 336 insertions(+)
 create mode 100644 drivers/video/orisetech_otm8009a.c

diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 1981298..b5fc535 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -320,6 +320,14 @@ config VIDEO_LCD_ANX9804
from a parallel LCD interface and translate it on the fy into a DP
interface for driving eDP TFT displays. It uses I2C for configuration.
 
+config VIDEO_LCD_ORISETECH_OTM8009A
+   bool "OTM8009A DSI LCD panel support"
+   depends on DM_VIDEO
+   select VIDEO_MIPI_DSI
+   default n
+   ---help---
+   Support for Orise Tech otm8009a 480p dsi 2dl video mode panel.
+
 config VIDEO_LCD_SSD2828
bool "SSD2828 bridge chip"
default n
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index 6f42cca..65002af 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -37,6 +37,7 @@ obj-$(CONFIG_VIDEO_COREBOOT) += coreboot.o
 obj-$(CONFIG_VIDEO_DA8XX) += da8xx-fb.o videomodes.o
 obj-$(CONFIG_VIDEO_LCD_ANX9804) += anx9804.o
 obj-$(CONFIG_VIDEO_LCD_HITACHI_TX18D42VM) += hitachi_tx18d42vm_lcd.o
+obj-$(CONFIG_VIDEO_LCD_ORISETECH_OTM8009A) += orisetech_otm8009a.o
 obj-$(CONFIG_VIDEO_LCD_SSD2828) += ssd2828.o
 obj-$(CONFIG_VIDEO_MB862xx) += mb862xx.o videomodes.o
 obj-$(CONFIG_VIDEO_MX3) += mx3fb.o videomodes.o
diff --git a/drivers/video/orisetech_otm8009a.c 
b/drivers/video/orisetech_otm8009a.c
new file mode 100644
index 000..aa8139a
--- /dev/null
+++ b/drivers/video/orisetech_otm8009a.c
@@ -0,0 +1,327 @@
+/*
+ * Copyright (C) 2018 STMicroelectronics - All Rights Reserved
+ * Author(s): Yannick Fertre  for STMicroelectronics.
+ *   Philippe Cornu  for STMicroelectronics.
+ *
+ * This otm8009a panel driver is based on the panel driver from
+ * drivers/gpu/drm/panel/panel-orisetech-otm8009a.c (kernel linux)
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define DRV_NAME "orisetech_otm8009a"
+
+#define OTM8009A_BACKLIGHT_DEFAULT 240
+#define OTM8009A_BACKLIGHT_MAX 255
+
+/* Manufacturer Command Set */
+#define MCS_ADRSFT 0x  /* Address Shift Function */
+#define MCS_PANSET 0xB3A6  /* Panel Type Setting */
+#define MCS_SD_CTRL0xC0A2  /* Source Driver Timing Setting */
+#define MCS_P_DRV_M0xC0B4  /* Panel Driving Mode */
+#define MCS_OSC_ADJ0xC181  /* Oscillator Adjustment for Idle/Normal mode */
+#define MCS_RGB_VID_SET0xC1A1  /* RGB Video Mode Setting */
+#define MCS_SD_PCH_CTRL0xC480  /* Source Driver Precharge Control */
+#define MCS_NO_DOC10xC48A  /* Command not documented */
+#define MCS_PWR_CTRL1  0xC580  /* Power Control Setting 1 */
+#define MCS_PWR_CTRL2  0xC590  /* Power Control Setting 2 for Normal Mode */
+#define MCS_PWR_CTRL4  0xC5B0  /* Power Control Setting 4 for DC Voltage */
+#define MCS_PANCTRLSET10xCB80  /* Panel Control Setting 1 */
+#define MCS_PANCTRLSET20xCB90  /* Panel Control Setting 2 */
+#define MCS_PANCTRLSET30xCBA0  /* Panel Control Setting 3 */
+#define MCS_PANCTRLSET40xCBB0  /* Panel Control Setting 4 */
+#define MCS_PANCTRLSET50xCBC0  /* Panel Control Setting 5 */
+#define MCS_PANCTRLSET60xCBD0  /* Panel Control Setting 6 */
+#define MCS_PANCTRLSET70xCBE0  /* Panel Control Setting 7 */
+#define MCS_PANCTRLSET80xCBF0  /* Panel Control Setting 8 */
+#define MCS_PANU2D10xCC80  /* Panel U2D Setting 1 */
+#define MCS_PANU2D20xCC90  /* Panel U2D Setting 2 */
+#define MCS_PANU2D30xCCA0  /* Panel U2D Setting 3 */
+#define MCS_PAND2U10xCCB0  /* Panel D2U Setting 1 */
+#define MCS_PAND2U20xCCC0  /* Panel D2U Setting 2 */
+#define MCS_PAND2U30xCCD0  /* Panel D2U Setting 3 */
+#define MCS_GOAVST 0xCE80  /* GOA VST Setting */
+#define MCS_GOACLKA1   0xCEA0  /* GOA CLKA1 Setting */
+#define MCS_GOACLKA3   0xCEB0  /* GOA CLKA3 Setting */
+#define MCS_GOAECLK0xCFC0  /* GOA ECLK Setting */
+#define MCS_NO_DOC20xCFD0  /* Command not documented */
+#define MCS_GVDDSET0xD800  /* GVDD/NGVDD */
+#define MCS_VCOMDC 0xD900  /* VCOM Voltage Setting */
+#define MCS_GMCT2_2P   0xE100  /* Gamma Correction 2.2+ Setting */
+#define MCS_GMCT2_2N   0xE200  /* Gamma Correction 2.2- Setting */
+#define MCS_NO_DOC30xF5B6  /* Command not documented */
+#define MCS_CMD2_ENA1  0xFF00  /* Enable Access Command2 "CMD2" */
+#define MCS_CMD2_ENA2  0xFF80  /* Enable Access Orise Command2 */
+
+struct otm8009a_panel_priv {
+   struct udevice *reg;
+   struct gpio_desc reset;
+};
+
+static void 

[U-Boot] [PATCH v3 05/10] video: add MIPI DSI host controller bridge

[yannick fertre]

Add a Synopsys Designware MIPI DSI host bridge driver, based on the
Rockchip version from rockchip/dw-mipi-dsi.c with phy & bridge APIs.

Signed-off-by: yannick fertre 
---
 drivers/video/Kconfig   |   9 +
 drivers/video/Makefile  |   1 +
 drivers/video/dw_mipi_dsi.c | 822 
 include/dw_mipi_dsi.h   |  34 ++
 4 files changed, 866 insertions(+)
 create mode 100644 drivers/video/dw_mipi_dsi.c
 create mode 100644 include/dw_mipi_dsi.h

diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index b5fc535..0f641d7 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -657,6 +657,15 @@ config VIDEO_DW_HDMI
  rather requires a SoC-specific glue driver to call it), it
  can not be enabled from the configuration menu.
 
+config VIDEO_DW_MIPI_DSI
+   bool
+   help
+ Enables the common driver code for the Designware MIPI DSI
+ block found in SoCs from various vendors.
+ As this does not provide any functionality by itself (but
+ rather requires a SoC-specific glue driver to call it), it
+ can not be enabled from the configuration menu.
+
 config VIDEO_SIMPLE
bool "Simple display driver for preconfigured display"
help
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index 65002af..50be569 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -53,6 +53,7 @@ obj-$(CONFIG_FORMIKE) += formike.o
 obj-$(CONFIG_LG4573) += lg4573.o
 obj-$(CONFIG_AM335X_LCD) += am335x-fb.o
 obj-$(CONFIG_VIDEO_DW_HDMI) += dw_hdmi.o
+obj-$(CONFIG_VIDEO_DW_MIPI_DSI) += dw_mipi_dsi.o
 obj-${CONFIG_VIDEO_MIPI_DSI} += mipi_display.o
 obj-$(CONFIG_VIDEO_SIMPLE) += simplefb.o
 obj-${CONFIG_VIDEO_TEGRA124} += tegra124/
diff --git a/drivers/video/dw_mipi_dsi.c b/drivers/video/dw_mipi_dsi.c
new file mode 100644
index 000..d7bd92d
--- /dev/null
+++ b/drivers/video/dw_mipi_dsi.c
@@ -0,0 +1,822 @@
+/*
+ * Copyright (C) 2016, Fuzhou Rockchip Electronics Co., Ltd
+ * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
+ * Author(s): Philippe Cornu  for STMicroelectronics.
+ *   Yannick Fertre  for STMicroelectronics.
+ *
+ * Modified by Yannick Fertre 
+ * This generic Synopsys DesignWare MIPI DSI host driver is based on the
+ * bridge synopsys from drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c (kernel
+ * linux).
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define HWVER_131  0x31333100  /* IP version 1.31 */
+
+#define DSI_VERSION0x00
+#define VERSIONGENMASK(31, 8)
+
+#define DSI_PWR_UP 0x04
+#define RESET  0
+#define POWERUPBIT(0)
+
+#define DSI_CLKMGR_CFG 0x08
+#define TO_CLK_DIVISION(div)   (((div) & 0xff) << 8)
+#define TX_ESC_CLK_DIVISION(div)   ((div) & 0xff)
+
+#define DSI_DPI_VCID   0x0c
+#define DPI_VCID(vcid) ((vcid) & 0x3)
+
+#define DSI_DPI_COLOR_CODING   0x10
+#define LOOSELY18_EN   BIT(8)
+#define DPI_COLOR_CODING_16BIT_1   0x0
+#define DPI_COLOR_CODING_16BIT_2   0x1
+#define DPI_COLOR_CODING_16BIT_3   0x2
+#define DPI_COLOR_CODING_18BIT_1   0x3
+#define DPI_COLOR_CODING_18BIT_2   0x4
+#define DPI_COLOR_CODING_24BIT 0x5
+
+#define DSI_DPI_CFG_POL0x14
+#define COLORM_ACTIVE_LOW  BIT(4)
+#define SHUTD_ACTIVE_LOW   BIT(3)
+#define HSYNC_ACTIVE_LOW   BIT(2)
+#define VSYNC_ACTIVE_LOW   BIT(1)
+#define DATAEN_ACTIVE_LOW  BIT(0)
+
+#define DSI_DPI_LP_CMD_TIM 0x18
+#define OUTVACT_LPCMD_TIME(p)  (((p) & 0xff) << 16)
+#define INVACT_LPCMD_TIME(p)   ((p) & 0xff)
+
+#define DSI_DBI_VCID   0x1c
+#define DSI_DBI_CFG0x20
+#define DSI_DBI_PARTITIONING_EN0x24
+#define DSI_DBI_CMDSIZE0x28
+
+#define DSI_PCKHDL_CFG 0x2c
+#define CRC_RX_EN  BIT(4)
+#define ECC_RX_EN  BIT(3)
+#define BTA_EN BIT(2)
+#define EOTP_RX_EN BIT(1)
+#define EOTP_TX_EN BIT(0)
+
+#define DSI_GEN_VCID   0x30
+
+#define DSI_MODE_CFG   0x34
+#define ENABLE_VIDEO_MODE  0
+#define ENABLE_CMD_MODEBIT(0)
+
+#define DSI_VID_MODE_CFG   0x38
+#define ENABLE_LOW_POWER   (0x3f << 8)
+#define ENABLE_LOW_POWER_MASK  (0x3f << 8)
+#define VID_MODE_TYPE_NON_BURST_SYNC_PULSES0x0
+#define VID_MODE_TYPE_NON_BURST_SYNC_EVENTS0x1
+#define 

[U-Boot] [PATCH v3 03/10] video: add support of panel OTM8009A

[yannick fertre]

Support for Orise Tech otm8009a 480p dsi 2dl video mode panel.

Signed-off-by: yannick fertre 
---
 drivers/video/Kconfig  |   8 +
 drivers/video/Makefile |   1 +
 drivers/video/orisetech_otm8009a.c | 325 +
 3 files changed, 334 insertions(+)
 create mode 100644 drivers/video/orisetech_otm8009a.c

diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 1981298..b5fc535 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -320,6 +320,14 @@ config VIDEO_LCD_ANX9804
from a parallel LCD interface and translate it on the fy into a DP
interface for driving eDP TFT displays. It uses I2C for configuration.
 
+config VIDEO_LCD_ORISETECH_OTM8009A
+   bool "OTM8009A DSI LCD panel support"
+   depends on DM_VIDEO
+   select VIDEO_MIPI_DSI
+   default n
+   ---help---
+   Support for Orise Tech otm8009a 480p dsi 2dl video mode panel.
+
 config VIDEO_LCD_SSD2828
bool "SSD2828 bridge chip"
default n
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index 6f42cca..65002af 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -37,6 +37,7 @@ obj-$(CONFIG_VIDEO_COREBOOT) += coreboot.o
 obj-$(CONFIG_VIDEO_DA8XX) += da8xx-fb.o videomodes.o
 obj-$(CONFIG_VIDEO_LCD_ANX9804) += anx9804.o
 obj-$(CONFIG_VIDEO_LCD_HITACHI_TX18D42VM) += hitachi_tx18d42vm_lcd.o
+obj-$(CONFIG_VIDEO_LCD_ORISETECH_OTM8009A) += orisetech_otm8009a.o
 obj-$(CONFIG_VIDEO_LCD_SSD2828) += ssd2828.o
 obj-$(CONFIG_VIDEO_MB862xx) += mb862xx.o videomodes.o
 obj-$(CONFIG_VIDEO_MX3) += mx3fb.o videomodes.o
diff --git a/drivers/video/orisetech_otm8009a.c 
b/drivers/video/orisetech_otm8009a.c
new file mode 100644
index 000..81b11d7
--- /dev/null
+++ b/drivers/video/orisetech_otm8009a.c
@@ -0,0 +1,325 @@
+/*
+ * Copyright (C) 2018 STMicroelectronics - All Rights Reserved
+ * Author(s): Yannick Fertre  for STMicroelectronics.
+ *   Philippe Cornu  for STMicroelectronics.
+ *
+ * This otm8009a panel driver is based on the panel driver from
+ * drivers/gpu/drm/panel/panel-orisetech-otm8009a.c (kernel linux)
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define DRV_NAME "orisetech_otm8009a"
+
+#define OTM8009A_BACKLIGHT_DEFAULT 240
+#define OTM8009A_BACKLIGHT_MAX 255
+
+/* Manufacturer Command Set */
+#define MCS_ADRSFT 0x  /* Address Shift Function */
+#define MCS_PANSET 0xB3A6  /* Panel Type Setting */
+#define MCS_SD_CTRL0xC0A2  /* Source Driver Timing Setting */
+#define MCS_P_DRV_M0xC0B4  /* Panel Driving Mode */
+#define MCS_OSC_ADJ0xC181  /* Oscillator Adjustment for Idle/Normal mode */
+#define MCS_RGB_VID_SET0xC1A1  /* RGB Video Mode Setting */
+#define MCS_SD_PCH_CTRL0xC480  /* Source Driver Precharge Control */
+#define MCS_NO_DOC10xC48A  /* Command not documented */
+#define MCS_PWR_CTRL1  0xC580  /* Power Control Setting 1 */
+#define MCS_PWR_CTRL2  0xC590  /* Power Control Setting 2 for Normal Mode */
+#define MCS_PWR_CTRL4  0xC5B0  /* Power Control Setting 4 for DC Voltage */
+#define MCS_PANCTRLSET10xCB80  /* Panel Control Setting 1 */
+#define MCS_PANCTRLSET20xCB90  /* Panel Control Setting 2 */
+#define MCS_PANCTRLSET30xCBA0  /* Panel Control Setting 3 */
+#define MCS_PANCTRLSET40xCBB0  /* Panel Control Setting 4 */
+#define MCS_PANCTRLSET50xCBC0  /* Panel Control Setting 5 */
+#define MCS_PANCTRLSET60xCBD0  /* Panel Control Setting 6 */
+#define MCS_PANCTRLSET70xCBE0  /* Panel Control Setting 7 */
+#define MCS_PANCTRLSET80xCBF0  /* Panel Control Setting 8 */
+#define MCS_PANU2D10xCC80  /* Panel U2D Setting 1 */
+#define MCS_PANU2D20xCC90  /* Panel U2D Setting 2 */
+#define MCS_PANU2D30xCCA0  /* Panel U2D Setting 3 */
+#define MCS_PAND2U10xCCB0  /* Panel D2U Setting 1 */
+#define MCS_PAND2U20xCCC0  /* Panel D2U Setting 2 */
+#define MCS_PAND2U30xCCD0  /* Panel D2U Setting 3 */
+#define MCS_GOAVST 0xCE80  /* GOA VST Setting */
+#define MCS_GOACLKA1   0xCEA0  /* GOA CLKA1 Setting */
+#define MCS_GOACLKA3   0xCEB0  /* GOA CLKA3 Setting */
+#define MCS_GOAECLK0xCFC0  /* GOA ECLK Setting */
+#define MCS_NO_DOC20xCFD0  /* Command not documented */
+#define MCS_GVDDSET0xD800  /* GVDD/NGVDD */
+#define MCS_VCOMDC 0xD900  /* VCOM Voltage Setting */
+#define MCS_GMCT2_2P   0xE100  /* Gamma Correction 2.2+ Setting */
+#define MCS_GMCT2_2N   0xE200  /* Gamma Correction 2.2- Setting */
+#define MCS_NO_DOC30xF5B6  /* Command not documented */
+#define MCS_CMD2_ENA1  0xFF00  /* Enable Access Command2 "CMD2" */
+#define MCS_CMD2_ENA2  0xFF80  /* Enable Access Orise Command2 */
+
+struct otm8009a_panel_priv {
+   struct udevice *reg;
+   struct gpio_desc reset;
+};
+
+static void 

[U-Boot] [PATCH v3 03/10] video: add support of MIPI DSI interface

[yannick fertre]

Mipi_display.c contains a set of dsi helpers.
This file is a copy of file drm_mipi_dsi.c (linux kernel).

Signed-off-by: yannick fertre 
---
 drivers/video/Kconfig|   7 +
 drivers/video/Makefile   |   1 +
 drivers/video/mipi_display.c | 807 +++
 include/mipi_display.h   | 257 +-
 4 files changed, 1071 insertions(+), 1 deletion(-)
 create mode 100644 drivers/video/mipi_display.c

diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 2fc0def..1981298 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -75,6 +75,13 @@ config VIDEO_ANSI
  Enable ANSI escape sequence decoding for a more fully functional
  console.
 
+config VIDEO_MIPI_DSI
+   bool "Support MIPI DSI interface"
+   depends on DM_VIDEO
+   default y if DM_VIDEO
+   help
+ Support MIPI DSI interface for driving a MIPI compatible LCD panel.
+
 config CONSOLE_NORMAL
bool "Support a simple text console"
depends on DM_VIDEO
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index dfafe08..6f42cca 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -52,6 +52,7 @@ obj-$(CONFIG_FORMIKE) += formike.o
 obj-$(CONFIG_LG4573) += lg4573.o
 obj-$(CONFIG_AM335X_LCD) += am335x-fb.o
 obj-$(CONFIG_VIDEO_DW_HDMI) += dw_hdmi.o
+obj-${CONFIG_VIDEO_MIPI_DSI} += mipi_display.o
 obj-$(CONFIG_VIDEO_SIMPLE) += simplefb.o
 obj-${CONFIG_VIDEO_TEGRA124} += tegra124/
 obj-${CONFIG_EXYNOS_FB} += exynos/
diff --git a/drivers/video/mipi_display.c b/drivers/video/mipi_display.c
new file mode 100644
index 000..d90ff5d
--- /dev/null
+++ b/drivers/video/mipi_display.c
@@ -0,0 +1,807 @@
+/*
+ * MIPI DSI Bus
+ *
+ * Copyright (C) 2012-2013, Samsung Electronics, Co., Ltd.
+ * Copyright (C) 2018 STMicroelectronics - All Rights Reserved
+ * Andrzej Hajda 
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+ * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/**
+ * DOC: dsi helpers
+ *
+ * These functions contain some common logic and helpers to deal with MIPI DSI
+ * peripherals.
+ *
+ * Helpers are provided for a number of standard MIPI DSI command as well as a
+ * subset of the MIPI DCS command set.
+ */
+
+/**
+ * mipi_dsi_attach - attach a DSI device to its DSI host
+ * @dsi: DSI peripheral
+ */
+int mipi_dsi_attach(struct mipi_dsi_device *dsi)
+{
+   const struct mipi_dsi_host_ops *ops = dsi->host->ops;
+
+   if (!ops || !ops->attach)
+   return -ENOSYS;
+
+   return ops->attach(dsi->host, dsi);
+}
+EXPORT_SYMBOL(mipi_dsi_attach);
+
+/**
+ * mipi_dsi_detach - detach a DSI device from its DSI host
+ * @dsi: DSI peripheral
+ */
+int mipi_dsi_detach(struct mipi_dsi_device *dsi)
+{
+   const struct mipi_dsi_host_ops *ops = dsi->host->ops;
+
+   if (!ops || !ops->detach)
+   return -ENOSYS;
+
+   return ops->detach(dsi->host, dsi);
+}
+EXPORT_SYMBOL(mipi_dsi_detach);
+
+static ssize_t mipi_dsi_device_transfer(struct mipi_dsi_device *dsi,
+   struct mipi_dsi_msg *msg)
+{
+   const struct mipi_dsi_host_ops *ops = dsi->host->ops;
+
+   if (!ops || !ops->transfer)
+   return -ENOSYS;
+
+   if (dsi->mode_flags & MIPI_DSI_MODE_LPM)
+   msg->flags |= MIPI_DSI_MSG_USE_LPM;
+
+   return ops->transfer(dsi->host, msg);
+}
+
+/**
+ * mipi_dsi_packet_format_is_short - check if a packet is of the short format
+ * @type: MIPI DSI data type of the packet
+ *
+ * Return: true if the packet for the given data type is a short packet, false
+ * otherwise.
+ */
+bool mipi_dsi_packet_format_is_short(u8 type)
+{
+   switch (type) {
+   case MIPI_DSI_V_SYNC_START:
+   case MIPI_DSI_V_SYNC_END:
+   case MIPI_DSI_H_SYNC_START:
+   case MIPI_DSI_H_SYNC_END:
+

[U-Boot] [PATCH v3 02/10] video: add support of MIPI DSI interface

[yannick fertre]

Mipi_display.c contains a set of dsi helpers.
This file is a copy of file drm_mipi_dsi.c (linux kernel).

Signed-off-by: yannick fertre 
---
 drivers/video/Kconfig|   7 +
 drivers/video/Makefile   |   1 +
 drivers/video/mipi_display.c | 807 +++
 include/mipi_display.h   | 257 +-
 4 files changed, 1071 insertions(+), 1 deletion(-)
 create mode 100644 drivers/video/mipi_display.c

diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 2fc0def..1981298 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -75,6 +75,13 @@ config VIDEO_ANSI
  Enable ANSI escape sequence decoding for a more fully functional
  console.
 
+config VIDEO_MIPI_DSI
+   bool "Support MIPI DSI interface"
+   depends on DM_VIDEO
+   default y if DM_VIDEO
+   help
+ Support MIPI DSI interface for driving a MIPI compatible LCD panel.
+
 config CONSOLE_NORMAL
bool "Support a simple text console"
depends on DM_VIDEO
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index dfafe08..6f42cca 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -52,6 +52,7 @@ obj-$(CONFIG_FORMIKE) += formike.o
 obj-$(CONFIG_LG4573) += lg4573.o
 obj-$(CONFIG_AM335X_LCD) += am335x-fb.o
 obj-$(CONFIG_VIDEO_DW_HDMI) += dw_hdmi.o
+obj-${CONFIG_VIDEO_MIPI_DSI} += mipi_display.o
 obj-$(CONFIG_VIDEO_SIMPLE) += simplefb.o
 obj-${CONFIG_VIDEO_TEGRA124} += tegra124/
 obj-${CONFIG_EXYNOS_FB} += exynos/
diff --git a/drivers/video/mipi_display.c b/drivers/video/mipi_display.c
new file mode 100644
index 000..d90ff5d
--- /dev/null
+++ b/drivers/video/mipi_display.c
@@ -0,0 +1,807 @@
+/*
+ * MIPI DSI Bus
+ *
+ * Copyright (C) 2012-2013, Samsung Electronics, Co., Ltd.
+ * Copyright (C) 2018 STMicroelectronics - All Rights Reserved
+ * Andrzej Hajda 
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+ * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/**
+ * DOC: dsi helpers
+ *
+ * These functions contain some common logic and helpers to deal with MIPI DSI
+ * peripherals.
+ *
+ * Helpers are provided for a number of standard MIPI DSI command as well as a
+ * subset of the MIPI DCS command set.
+ */
+
+/**
+ * mipi_dsi_attach - attach a DSI device to its DSI host
+ * @dsi: DSI peripheral
+ */
+int mipi_dsi_attach(struct mipi_dsi_device *dsi)
+{
+   const struct mipi_dsi_host_ops *ops = dsi->host->ops;
+
+   if (!ops || !ops->attach)
+   return -ENOSYS;
+
+   return ops->attach(dsi->host, dsi);
+}
+EXPORT_SYMBOL(mipi_dsi_attach);
+
+/**
+ * mipi_dsi_detach - detach a DSI device from its DSI host
+ * @dsi: DSI peripheral
+ */
+int mipi_dsi_detach(struct mipi_dsi_device *dsi)
+{
+   const struct mipi_dsi_host_ops *ops = dsi->host->ops;
+
+   if (!ops || !ops->detach)
+   return -ENOSYS;
+
+   return ops->detach(dsi->host, dsi);
+}
+EXPORT_SYMBOL(mipi_dsi_detach);
+
+static ssize_t mipi_dsi_device_transfer(struct mipi_dsi_device *dsi,
+   struct mipi_dsi_msg *msg)
+{
+   const struct mipi_dsi_host_ops *ops = dsi->host->ops;
+
+   if (!ops || !ops->transfer)
+   return -ENOSYS;
+
+   if (dsi->mode_flags & MIPI_DSI_MODE_LPM)
+   msg->flags |= MIPI_DSI_MSG_USE_LPM;
+
+   return ops->transfer(dsi->host, msg);
+}
+
+/**
+ * mipi_dsi_packet_format_is_short - check if a packet is of the short format
+ * @type: MIPI DSI data type of the packet
+ *
+ * Return: true if the packet for the given data type is a short packet, false
+ * otherwise.
+ */
+bool mipi_dsi_packet_format_is_short(u8 type)
+{
+   switch (type) {
+   case MIPI_DSI_V_SYNC_START:
+   case MIPI_DSI_V_SYNC_END:
+   case MIPI_DSI_H_SYNC_START:
+   case MIPI_DSI_H_SYNC_END:
+

[U-Boot] [PATCH v3 01/10] video: stm32: stm32_ltdc: update debug log

[yannick fertre]

Replace  macro debug by pr_error, pr_warn or pr_info.

Signed-off-by: yannick fertre 
---
 drivers/video/stm32/stm32_ltdc.c | 67 ++--
 1 file changed, 30 insertions(+), 37 deletions(-)

diff --git a/drivers/video/stm32/stm32_ltdc.c b/drivers/video/stm32/stm32_ltdc.c
index bd9c0de..3e12c71 100644
--- a/drivers/video/stm32/stm32_ltdc.c
+++ b/drivers/video/stm32/stm32_ltdc.c
@@ -5,7 +5,6 @@
  *
  * SPDX-License-Identifier: GPL-2.0+
  */
-
 #include 
 #include 
 #include 
@@ -13,12 +12,10 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
-#include 
-
-DECLARE_GLOBAL_DATA_PTR;
 
 struct stm32_ltdc_priv {
void __iomem *regs;
@@ -176,13 +173,13 @@ static u32 stm32_ltdc_get_pixel_format(enum 
video_log2_bpp l2bpp)
case VIDEO_BPP2:
case VIDEO_BPP4:
default:
-   debug("%s: warning %dbpp not supported yet, %dbpp instead\n",
- __func__, VNBITS(l2bpp), VNBITS(VIDEO_BPP16));
+   pr_warn("warning %dbpp not supported yet, %dbpp instead\n",
+   VNBITS(l2bpp), VNBITS(VIDEO_BPP16));
pf = PF_RGB565;
break;
}
 
-   debug("%s: %d bpp -> ltdc pf %d\n", __func__, VNBITS(l2bpp), pf);
+   pr_info("%d bpp -> ltdc pf %d\n", VNBITS(l2bpp), pf);
 
return (u32)pf;
 }
@@ -249,7 +246,7 @@ static void stm32_ltdc_set_mode(struct stm32_ltdc_priv 
*priv,
 
/* Signal polarities */
val = 0;
-   debug("%s: timing->flags 0x%08x\n", __func__, timings->flags);
+   dev_info(dev, "timing->flags 0x%08x\n", timings->flags);
if (timings->flags & DISPLAY_FLAGS_HSYNC_HIGH)
val |= GCR_HSPOL;
if (timings->flags & DISPLAY_FLAGS_VSYNC_HIGH)
@@ -343,26 +340,25 @@ static int stm32_ltdc_probe(struct udevice *dev)
 
priv->regs = (void *)dev_read_addr(dev);
if ((fdt_addr_t)priv->regs == FDT_ADDR_T_NONE) {
-   debug("%s: ltdc dt register address error\n", __func__);
+   dev_err(dev, "ltdc dt register address error\n");
return -EINVAL;
}
 
ret = clk_get_by_index(dev, 0, );
if (ret) {
-   debug("%s: peripheral clock get error %d\n", __func__, ret);
+   dev_err(dev, "peripheral clock get error %d\n", ret);
return ret;
}
 
ret = clk_enable();
if (ret) {
-   debug("%s: peripheral clock enable error %d\n",
- __func__, ret);
+   dev_err(dev, "peripheral clock enable error %d\n", ret);
return ret;
}
 
ret = reset_get_by_index(dev, 0, );
if (ret) {
-   debug("%s: missing ltdc hardware reset\n", __func__);
+   dev_err(dev, "missing ltdc hardware reset\n");
return -ENODEV;
}
 
@@ -371,42 +367,39 @@ static int stm32_ltdc_probe(struct udevice *dev)
 
 #ifdef CONFIG_VIDEO_BRIDGE
ret = uclass_get_device(UCLASS_VIDEO_BRIDGE, 0, );
-   if (ret) {
-   debug("%s: No video bridge, or no backlight on bridge\n",
- __func__);
-   }
+   if (ret)
+   dev_info(dev, "No video bridge, or no backlight on bridge\n");
 
if (bridge) {
ret = video_bridge_attach(bridge);
if (ret) {
-   debug("%s: fail to attach bridge\n", __func__);
+   dev_err(dev, "fail to attach bridge\n");
return ret;
}
}
 #endif
ret = uclass_first_device(UCLASS_PANEL, );
if (ret) {
-   debug("%s: panel device error %d\n", __func__, ret);
+   dev_err(dev, "panel device error %d\n", ret);
return ret;
}
 
ret = fdtdec_decode_display_timing(gd->fdt_blob, dev_of_offset(panel),
   0, );
if (ret) {
-   debug("%s: decode display timing error %d\n",
- __func__, ret);
+   dev_err(dev, "decode display timing error %d\n", ret);
return ret;
}
 
rate = clk_set_rate(, timings.pixelclock.typ);
if (rate < 0) {
-   debug("%s: fail to set pixel clock %d hz %d hz\n",
- __func__, timings.pixelclock.typ, rate);
+   dev_err(dev, "fail to set pixel clock %d hz %d hz\n",
+   timings.pixelclock.typ, rate);
return rate;
}
 
-   debug("%s: Set pixel clock req %d hz get %d hz\n", __func__,
- timings.pixelclock.typ, rate);
+   dev_info(dev, "set pixel clock req %d hz get %d hz\n",
+timings.pixelclock.typ, rate);
 
/* TODO Below parameters are hard-coded for the moment... */
priv->l2bpp = VIDEO_BPP16;
@@ -417,12 +410,12 @@ static int stm32_ltdc_probe(struct udevice 

[U-Boot] [PATCH v3 01/10] video: stm32: stm32_ltdc: add bridge to display controller

[yannick fertre]

Manage a bridge insert between the display controller & a panel.

Signed-off-by: yannick fertre 
---
 drivers/video/stm32/stm32_ltdc.c | 107 ++-
 1 file changed, 71 insertions(+), 36 deletions(-)

diff --git a/drivers/video/stm32/stm32_ltdc.c b/drivers/video/stm32/stm32_ltdc.c
index e160c77..bd9c0de 100644
--- a/drivers/video/stm32/stm32_ltdc.c
+++ b/drivers/video/stm32/stm32_ltdc.c
@@ -8,6 +8,7 @@
 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -15,12 +16,12 @@
 #include 
 #include 
 #include 
+#include 
 
 DECLARE_GLOBAL_DATA_PTR;
 
 struct stm32_ltdc_priv {
void __iomem *regs;
-   struct display_timing timing;
enum video_log2_bpp l2bpp;
u32 bg_col_argb;
u32 crop_x, crop_y, crop_w, crop_h;
@@ -210,23 +211,23 @@ static void stm32_ltdc_enable(struct stm32_ltdc_priv 
*priv)
setbits_le32(priv->regs + LTDC_GCR, GCR_LTDCEN);
 }
 
-static void stm32_ltdc_set_mode(struct stm32_ltdc_priv *priv)
+static void stm32_ltdc_set_mode(struct stm32_ltdc_priv *priv,
+   struct display_timing *timings)
 {
void __iomem *regs = priv->regs;
-   struct display_timing *timing = >timing;
u32 hsync, vsync, acc_hbp, acc_vbp, acc_act_w, acc_act_h;
u32 total_w, total_h;
u32 val;
 
/* Convert video timings to ltdc timings */
-   hsync = timing->hsync_len.typ - 1;
-   vsync = timing->vsync_len.typ - 1;
-   acc_hbp = hsync + timing->hback_porch.typ;
-   acc_vbp = vsync + timing->vback_porch.typ;
-   acc_act_w = acc_hbp + timing->hactive.typ;
-   acc_act_h = acc_vbp + timing->vactive.typ;
-   total_w = acc_act_w + timing->hfront_porch.typ;
-   total_h = acc_act_h + timing->vfront_porch.typ;
+   hsync = timings->hsync_len.typ - 1;
+   vsync = timings->vsync_len.typ - 1;
+   acc_hbp = hsync + timings->hback_porch.typ;
+   acc_vbp = vsync + timings->vback_porch.typ;
+   acc_act_w = acc_hbp + timings->hactive.typ;
+   acc_act_h = acc_vbp + timings->vactive.typ;
+   total_w = acc_act_w + timings->hfront_porch.typ;
+   total_h = acc_act_h + timings->vfront_porch.typ;
 
/* Synchronization sizes */
val = (hsync << 16) | vsync;
@@ -248,14 +249,14 @@ static void stm32_ltdc_set_mode(struct stm32_ltdc_priv 
*priv)
 
/* Signal polarities */
val = 0;
-   debug("%s: timing->flags 0x%08x\n", __func__, timing->flags);
-   if (timing->flags & DISPLAY_FLAGS_HSYNC_HIGH)
+   debug("%s: timing->flags 0x%08x\n", __func__, timings->flags);
+   if (timings->flags & DISPLAY_FLAGS_HSYNC_HIGH)
val |= GCR_HSPOL;
-   if (timing->flags & DISPLAY_FLAGS_VSYNC_HIGH)
+   if (timings->flags & DISPLAY_FLAGS_VSYNC_HIGH)
val |= GCR_VSPOL;
-   if (timing->flags & DISPLAY_FLAGS_DE_HIGH)
+   if (timings->flags & DISPLAY_FLAGS_DE_HIGH)
val |= GCR_DEPOL;
-   if (timing->flags & DISPLAY_FLAGS_PIXDATA_NEGEDGE)
+   if (timings->flags & DISPLAY_FLAGS_PIXDATA_NEGEDGE)
val |= GCR_PCPOL;
clrsetbits_le32(regs + LTDC_GCR,
GCR_HSPOL | GCR_VSPOL | GCR_DEPOL | GCR_PCPOL, val);
@@ -331,7 +332,11 @@ static int stm32_ltdc_probe(struct udevice *dev)
struct video_uc_platdata *uc_plat = dev_get_uclass_platdata(dev);
struct video_priv *uc_priv = dev_get_uclass_priv(dev);
struct stm32_ltdc_priv *priv = dev_get_priv(dev);
-   struct udevice *panel;
+#ifdef CONFIG_VIDEO_BRIDGE
+   struct udevice *bridge = NULL;
+#endif
+   struct udevice *panel = NULL;
+   struct display_timing timings;
struct clk pclk;
struct reset_ctl rst;
int rate, ret;
@@ -364,63 +369,93 @@ static int stm32_ltdc_probe(struct udevice *dev)
/* Reset */
reset_deassert();
 
-   ret = uclass_first_device(UCLASS_PANEL, );
+#ifdef CONFIG_VIDEO_BRIDGE
+   ret = uclass_get_device(UCLASS_VIDEO_BRIDGE, 0, );
if (ret) {
-   debug("%s: panel device error %d\n", __func__, ret);
-   return ret;
+   debug("%s: No video bridge, or no backlight on bridge\n",
+ __func__);
}
 
-   ret = panel_enable_backlight(panel);
+   if (bridge) {
+   ret = video_bridge_attach(bridge);
+   if (ret) {
+   debug("%s: fail to attach bridge\n", __func__);
+   return ret;
+   }
+   }
+#endif
+   ret = uclass_first_device(UCLASS_PANEL, );
if (ret) {
-   debug("%s: panel %s enable backlight error %d\n",
- __func__, panel->name, ret);
+   debug("%s: panel device error %d\n", __func__, ret);
return ret;
}
 
-   ret = fdtdec_decode_display_timing(gd->fdt_blob,
-  dev_of_offset(dev), 0,

Re: [U-Boot] [PATCH v2 3/3] warp7: Set u-boot serial# based on OTP value

[Fabio Estevam]

On Tue, Mar 13, 2018 at 12:48 PM, Bryan O'Donoghue
 wrote:
> u-boot has a standard "serial#" environment variable that is suitable
> for storing the iSerial number we will supply via the USB device
> descriptor. serial# is automatically picked up by the disk subsystem in
> u-boot - thus providing a handy unique identifier in /dev/disk/by-id as
> detailed below.
>
> Storing the hardware serial identifier in serial# means we can change the
> serial# if we want before USB enumeration - thus making iSerial automatic
> via OTP but overridable if necessary.
>
> This patch reads the defined OTP fuse and sets environment variable
> "serial#" to the value read.
>
> With this patch in place the USB mass storage device will appear in
> /dev/disk/by-id with a unique name based on the OTP value. For example
>
> /dev/disk/by-id/usb-Linux_UMS_disk_0_WaRP7-0xf42400d301d4-0:0
>
> Signed-off-by: Bryan O'Donoghue 
> Cc: Fabio Estevam 
> Cc: Rui Miguel Silva 
> Cc: Ryan Harkin 

Reviewed-by: Fabio Estevam 
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Re: [U-Boot] [PATCH v2 2/3] imx: mx7: Add comment to describe OTP TESTER registers

[Fabio Estevam]

On Tue, Mar 13, 2018 at 12:48 PM, Bryan O'Donoghue
 wrote:
> The tester registers provide a unique chip-level identifier which
> get_board_serial() returns in a "struct tag_serialnr".
>
> This patch documents the properties of the registers; in summary.
>
> 31:0 OCOTP_TESTER0 (most significant)
> - FSL-wide unique, encoded LOT ID STD II/SJC CHALLENGE/ Unique ID
>
> OCOTP_TESTER1 (least significant)
> 31:24
> - The X-coordinate of the die location on the wafer/SJC CHALLENGE/ Unique
>   ID
> 23:16
> - The Y-coordinate of the die location on the wafer/SJC CHALLENGE/ Unique
>   ID
> 15:11
> - The wafer number of the wafer on which the device was fabricated/SJC
>   CHALLENGE/ Unique ID
> 10:0
> - FSL-wide unique, encoded LOT ID STD II/SJC CHALLENGE/ Unique ID
>
> The 64 bits of data generate a unique serial number per-chip.
>
> Signed-off-by: Bryan O'Donoghue 
> Cc: Fabio Estevam 
> Cc: Peng Fan 
> Cc: Stefano Babic 

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Re: [U-Boot] [PATCH v2 1/3] imx: mx7: Fix CONFIG_SERIAL_TAG compilation

[Fabio Estevam]

On Tue, Mar 13, 2018 at 12:48 PM, Bryan O'Donoghue
 wrote:
> Currently when we define CONFIG_SERIAL_TAG we will barf with a failure to
> define "struct tag_serialnr".
>
> This structure is defined in , this patch includes
>  to fix.
>
> Signed-off-by: Bryan O'Donoghue 
> Cc: Fabio Estevam 
> Cc: Peng Fan 
> Cc: Stefano Babic 

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Re: [U-Boot] [PATCH v3 1/2] i.MX6: nand: add nandbcb update command

[Jagan Teki]

On Tue, Mar 13, 2018 at 9:16 PM, Fabio Estevam  wrote:
> Hi Jagan,
>
> On Tue, Mar 13, 2018 at 12:38 PM, Jagan Teki  wrote:
>
>> Sorry, I'm just writing to Stefan to get his change on ML.
>
> Why don't you take his patch and submit it to the list?

I thought of, but we need to understand his implementation change
based on the info he may providing while creating patch so-that I will
understand diff'. Since my patch handle the way TRM and kobs-ng I
really need to know more about Stefan change.
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[U-Boot] [PATCH v2 2/3] imx: mx7: Add comment to describe OTP TESTER registers

[Bryan O'Donoghue]

The tester registers provide a unique chip-level identifier which
get_board_serial() returns in a "struct tag_serialnr".

This patch documents the properties of the registers; in summary.

31:0 OCOTP_TESTER0 (most significant)
- FSL-wide unique, encoded LOT ID STD II/SJC CHALLENGE/ Unique ID

OCOTP_TESTER1 (least significant)
31:24
- The X-coordinate of the die location on the wafer/SJC CHALLENGE/ Unique
  ID
23:16
- The Y-coordinate of the die location on the wafer/SJC CHALLENGE/ Unique
  ID
15:11
- The wafer number of the wafer on which the device was fabricated/SJC
  CHALLENGE/ Unique ID
10:0
- FSL-wide unique, encoded LOT ID STD II/SJC CHALLENGE/ Unique ID

The 64 bits of data generate a unique serial number per-chip.

Signed-off-by: Bryan O'Donoghue 
Cc: Fabio Estevam 
Cc: Peng Fan 
Cc: Stefano Babic 
---
 arch/arm/mach-imx/mx7/soc.c | 21 +
 1 file changed, 21 insertions(+)

diff --git a/arch/arm/mach-imx/mx7/soc.c b/arch/arm/mach-imx/mx7/soc.c
index 1602585..fb92a26 100644
--- a/arch/arm/mach-imx/mx7/soc.c
+++ b/arch/arm/mach-imx/mx7/soc.c
@@ -202,6 +202,27 @@ int arch_misc_init(void)
 #endif
 
 #ifdef CONFIG_SERIAL_TAG
+/*
+ * OCOTP_TESTER
+ * i.MX 7Solo Applications Processor Reference Manual, Rev. 0.1, 08/2016
+ * OCOTP_TESTER describes a unique ID based on silicon wafer
+ * and die X/Y position
+ *
+ * OCOTOP_TESTER offset 0x410
+ * 31:0 fuse 0
+ * FSL-wide unique, encoded LOT ID STD II/SJC CHALLENGE/ Unique ID
+ *
+ * OCOTP_TESTER1 offset 0x420
+ * 31:24 fuse 1
+ * The X-coordinate of the die location on the wafer/SJC CHALLENGE/ Unique ID
+ * 23:16 fuse 1
+ * The Y-coordinate of the die location on the wafer/SJC CHALLENGE/ Unique ID
+ * 15:11 fuse 1
+ * The wafer number of the wafer on which the device was fabricated/SJC
+ * CHALLENGE/ Unique ID
+ * 10:0 fuse 1
+ * FSL-wide unique, encoded LOT ID STD II/SJC CHALLENGE/ Unique ID
+ */
 void get_board_serial(struct tag_serialnr *serialnr)
 {
struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR;
-- 
2.7.4

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[U-Boot] [PATCH v2 1/3] imx: mx7: Fix CONFIG_SERIAL_TAG compilation

[Bryan O'Donoghue]

Currently when we define CONFIG_SERIAL_TAG we will barf with a failure to
define "struct tag_serialnr".

This structure is defined in , this patch includes
 to fix.

Signed-off-by: Bryan O'Donoghue 
Cc: Fabio Estevam 
Cc: Peng Fan 
Cc: Stefano Babic 
---
 arch/arm/mach-imx/mx7/soc.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/mach-imx/mx7/soc.c b/arch/arm/mach-imx/mx7/soc.c
index d349676..1602585 100644
--- a/arch/arm/mach-imx/mx7/soc.c
+++ b/arch/arm/mach-imx/mx7/soc.c
@@ -18,6 +18,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #if defined(CONFIG_IMX_THERMAL)
 static const struct imx_thermal_plat imx7_thermal_plat = {
-- 
2.7.4

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[U-Boot] [PATCH v2 0/3] NXP WaARP7 set serial# from OTP fuses for USB iSerial

[Bryan O'Donoghue]

V2:
- Fix compilation path for CONFIG_SERIAL_TAG
  Currently this is broken for imx7

- Add description of tester registers to arch/arm/mach-imx/mx7/soc.c

- Utilise existing get_board_serial() instead of my previous patch
  ("warp7: usb: Introduce a get method for serial number")

V1:
Greetings.

These two patches add support for automatic setting of the serial#
environment variable based on OTP fuse settings. Once the serial# field is
set then subsequent USB gadget mode instances of WaARP7 will export the
serial number based on the OTP fuse settings.

This feature gives a handy output like this:

usb 1-1.1.1: new high-speed USB device number 17 using xhci_hcd
usb 1-1.1.1: New USB device found, idVendor=0525, idProduct=a4a5
usb 1-1.1.1: New USB device strings: Mfr=1, Product=2, SerialNumber=3
usb 1-1.1.1: Product: USB download gadget
usb 1-1.1.1: Manufacturer: FSL
usb 1-1.1.1: SerialNumber: WaRP7-0xf42400d301d4

The 64 bit value post-fixed to the WaARP7 string is based on OTP fuses
which provide a unique serial number for each NXP i.MX7 SoC.

We make use of this feature when discerning a unique identifier for WaARP7
boards in our automated LAVA testing environment, hopefully its useful and
acceptable to others.

Bryan O'Donoghue (3):
  imx: mx7: Fix CONFIG_SERIAL_TAG compilation
  imx: mx7: Add comment to describe OTP TESTER registers
  warp7: Set u-boot serial# based on OTP value

 arch/arm/mach-imx/mx7/soc.c | 22 ++
 board/warp7/warp7.c | 14 ++
 include/configs/warp7.h |  3 +++
 3 files changed, 39 insertions(+)

-- 
2.7.4

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[U-Boot] [PATCH v2 3/3] warp7: Set u-boot serial# based on OTP value

[Bryan O'Donoghue]

u-boot has a standard "serial#" environment variable that is suitable
for storing the iSerial number we will supply via the USB device
descriptor. serial# is automatically picked up by the disk subsystem in
u-boot - thus providing a handy unique identifier in /dev/disk/by-id as
detailed below.

Storing the hardware serial identifier in serial# means we can change the
serial# if we want before USB enumeration - thus making iSerial automatic
via OTP but overridable if necessary.

This patch reads the defined OTP fuse and sets environment variable
"serial#" to the value read.

With this patch in place the USB mass storage device will appear in
/dev/disk/by-id with a unique name based on the OTP value. For example

/dev/disk/by-id/usb-Linux_UMS_disk_0_WaRP7-0xf42400d301d4-0:0

Signed-off-by: Bryan O'Donoghue 
Cc: Fabio Estevam 
Cc: Rui Miguel Silva 
Cc: Ryan Harkin 
---
 board/warp7/warp7.c | 14 ++
 include/configs/warp7.h |  3 +++
 2 files changed, 17 insertions(+)

diff --git a/board/warp7/warp7.c b/board/warp7/warp7.c
index d422d63..327f656 100644
--- a/board/warp7/warp7.c
+++ b/board/warp7/warp7.c
@@ -23,6 +23,8 @@
 #include 
 #include 
 #include "../freescale/common/pfuze.h"
+#include 
+#include 
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -186,6 +188,10 @@ int board_usb_phy_mode(int port)
 int board_late_init(void)
 {
struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR;
+#ifdef CONFIG_SERIAL_TAG
+   struct tag_serialnr serialnr;
+   char serial_string[0x20];
+#endif
 
imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads));
 
@@ -197,5 +203,13 @@ int board_late_init(void)
 */
clrsetbits_le16(>wcr, 0, 0x10);
 
+#ifdef CONFIG_SERIAL_TAG
+   /* Set serial# standard environment variable based on OTP settings */
+   get_board_serial();
+   snprintf(serial_string, sizeof(serial_string), "WaRP7-0x%08x%08x",
+serialnr.low, serialnr.high);
+   env_set("serial#", serial_string);
+#endif
+
return 0;
 }
diff --git a/include/configs/warp7.h b/include/configs/warp7.h
index fe96988..0c3b605 100644
--- a/include/configs/warp7.h
+++ b/include/configs/warp7.h
@@ -24,6 +24,9 @@
 #define CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE
 #define CONFIG_SYS_MMC_IMG_LOAD_PART   1
 
+/* Switch on SERIAL_TAG */
+#define CONFIG_SERIAL_TAG
+
 #define CONFIG_DFU_ENV_SETTINGS \
"dfu_alt_info=boot raw 0x2 0x400 mmcpart 1\0" \
 
-- 
2.7.4

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Re: [U-Boot] [PATCH] net: sun8i_emac: Fix PHY initialization

[Jagan Teki]

On Wed, Feb 28, 2018 at 3:47 AM, Joe Hershberger  wrote:
> On Sat, Jan 27, 2018 at 11:53 PM, Samuel Holland  wrote:
>> The previous code tried to update the PHY parameters without waiting for
>> autonegotiation to complete. This caused wrong values to be written to
>> the EMAC in sun8i_adjust_link(). As a result, any commands that called
>> eth_start() before autonegotiation completed would find the network
>> nonfunctional. Fix this by using the correct function to start up the
>> PHY.
>>
>> Signed-off-by: Samuel Holland 
>
> Acked-by: Joe Hershberger 

Applied to u-boot-sunxi/master
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Re: [U-Boot] [PATCH v3 1/2] i.MX6: nand: add nandbcb update command

[Fabio Estevam]

Hi Jagan,

On Tue, Mar 13, 2018 at 12:38 PM, Jagan Teki  wrote:

> Sorry, I'm just writing to Stefan to get his change on ML.

Why don't you take his patch and submit it to the list?
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Re: [U-Boot] [PATCH v3 1/2] i.MX6: nand: add nandbcb update command

[Jagan Teki]

On Tue, Mar 13, 2018 at 9:06 PM, Fabio Estevam  wrote:
> Hi Jagan,
>
> On Tue, Mar 13, 2018 at 11:58 AM, Jagan Teki  wrote:
>
>> Please post it on ML for further discussion.
>
> Who is this message for?

Sorry, I'm just writing to Stefan to get his change on ML.
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Re: [U-Boot] [PATCH v3 02/10] video: add support of MIPI DSI interface

[Simon Glass]

Hi,

On 13 March 2018 at 07:50, yannick fertre  wrote:
>
> Mipi_display.c contains a set of dsi helpers.
> This file is a copy of file drm_mipi_dsi.c (linux kernel).
>
> Signed-off-by: yannick fertre 
> ---
>  drivers/video/Kconfig|   7 +
>  drivers/video/Makefile   |   1 +
>  drivers/video/mipi_display.c | 807 
> +++
>  include/mipi_display.h   | 257 +-

Please add function comments for the functions in this file,
explaining args and what the functions do.

Shouldn't DSI be its own uclass? We normally separate drivers for
different peripherals in U-Boot.

>  4 files changed, 1071 insertions(+), 1 deletion(-)
>  create mode 100644 drivers/video/mipi_display.c
>
> diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
> index 2fc0def..1981298 100644
> --- a/drivers/video/Kconfig
> +++ b/drivers/video/Kconfig
> @@ -75,6 +75,13 @@ config VIDEO_ANSI
>   Enable ANSI escape sequence decoding for a more fully functional
>   console.
>
> +config VIDEO_MIPI_DSI
> +   bool "Support MIPI DSI interface"
> +   depends on DM_VIDEO
> +   default y if DM_VIDEO
> +   help
> + Support MIPI DSI interface for driving a MIPI compatible LCD panel.

Please expand out what MIPI stands for and what it is, same with DSI.
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Re: [U-Boot] [PATCH v3 1/2] i.MX6: nand: add nandbcb update command

[Fabio Estevam]

Hi Jagan,

On Tue, Mar 13, 2018 at 11:58 AM, Jagan Teki  wrote:

> Please post it on ML for further discussion.

Who is this message for?
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Re: [U-Boot] [PATCH 0/5] DW SPI: fixes and improvements

[Jagan Teki]

On Mon, Mar 5, 2018 at 6:47 PM, Eugeniy Paltsev
 wrote:
> Various fixes and improvements of designware spi driver.
>
> Eugeniy Paltsev (5):
>   DW SPI: fix tx data loss on FIFO flush
>   DW SPI: fix transmit only mode
>   DW SPI: refactor poll_transfer functions
>   DW SPI: add option to use external gpio for chip select
>   DW SPI: use 32 bit access instead of 16 and 32 bit mix

Can someone test this series?

Reviewed-by: Jagan Teki 
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Re: [U-Boot] [PATCH RFC 0/2] sunxi: Build u-boot-sunxi-with-spl.bin on ARM64 as well

[Jagan Teki]

On Wed, Mar 7, 2018 at 2:01 PM, Maxime Ripard  wrote:
> On Tue, Mar 06, 2018 at 11:38:20PM +0200, Tuomas Tynkkynen wrote:
>> For some reason we seem to have documented how to build
>> u-boot-sunxi-with-spl.bin manually with cat but not have a build system
>> rule for it. Let's fix this to have the file built by default just like
>> it is on 32-bit sunxi boards.
>>
>> Build-tested only.
>
> Acked-by: Maxime Ripard 

Applied to u-boot-sunxi/master
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Re: [U-Boot] [PATCH RFC 2/2] ARM: sunxi: Build u-boot-sunxi-with-spl.bin on ARM64 as well

[Jagan Teki]

On Wed, Mar 7, 2018 at 7:51 AM, André Przywara  wrote:
> Hi,
>
> On 06/03/18 21:38, Tuomas Tynkkynen wrote:
>> In README.sunxi64 we tell the user how to optionally create
>> u-boot-sunxi-with-spl.bin by manually running cat. Instead, have the
>> build system create the file automatically just like it does for 32-bit
>> sunxi boards.
>>
>> Signed-off-by: Tuomas Tynkkynen 
>
> Reviewed-by: Andre Przywara 

Reviewed-by: Jagan Teki 
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