Enable PCIe config options in LS1088 SD Secure Boot defconfig
Signed-off-by: Vinitha V Pillai
---
configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig | 4
1 file changed, 4 insertions(+)
diff --git a/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig
On 12.07.2018 09:20, Maxime Ripard wrote:
On Thu, Jul 12, 2018 at 09:02:26AM +0200, Simon Goldschmidt wrote:
On 11.07.2018 15:50, Maxime Ripard wrote:
On Wed, Jul 11, 2018 at 12:44:23PM +0200, Nicholas wrote:
Maybe a solution could be to have an env_save() function which
acts in a similar
On Sun, 2018-07-15 at 15:21 -0600, Simon Glass wrote:
> Hi Tien Fong,
>
> On 12 July 2018 at 01:19, Chee, Tien Fong
> wrote:
> >
> > On Wed, 2018-07-11 at 14:13 -0600, Simon Glass wrote:
> > >
> > > Hi Tien,
> > >
> > > On 6 July 2018 at 02:28, wrote:
> > > >
> > > >
> > > > From: Tien
Hi Stephen,
On 12 July 2018 at 15:26, Stephen Warren wrote:
>
> On 07/12/2018 12:17 PM, Stephen Warren wrote:
>>
>> On 07/12/2018 09:52 AM, Stephen Warren wrote:
>>>
>>> On 07/11/2018 06:12 PM, Simon Glass wrote:
Hi Stephen,
On 11 July 2018 at 16:01, Stephen Warren wrote:
Hi Michal,
On 15 July 2018 at 23:31, Michal Simek wrote:
> On 16.7.2018 07:20, Simon Glass wrote:
>> Hi Michal,
>>
>> On 13 July 2018 at 03:15, Michal Simek wrote:
>>> The Linux kernel has binding for gpio-restart node.
>>> This patch is adding basic support without supporting any optional
>>>
Hi Michal,
On 16 July 2018 at 02:33, Michal Simek wrote:
> On 11.7.2018 22:13, Simon Glass wrote:
>> Hi,
>>
>> On 11 July 2018 at 07:40, Tom Rini wrote:
>>>
>>> On Wed, Jul 11, 2018 at 03:31:39PM +0200, Michal Simek wrote:
On 11.7.2018 14:46, Tom Rini wrote:
> On Wed, Jul 11, 2018 at
On Mon, Jul 16, 2018 at 7:28 PM, Jagan Teki wrote:
> This is series is trying to add initial support for CLK and RESET
> drivers for Allwinner SoC's with USB as a starting IP.
>
> Linux handle both clock and reset as ccu with common DT bindings,
> but besides that U-Boot handle them separately
> -Original Message-
> From: Trent Piepho
> Sent: Monday, July 16, 2018 11:22 AM
> To: Henry Beberman ; u-
> b...@lists.denx.de
> Cc: fabio.este...@nxp.com; adrian.alo...@nxp.com
> Subject: Re: [U-Boot] [PATCH 06/11] mx7dsabresd: Add Windows boot
> support for iMX7 Sabre
>
> On Sat,
On Mon, Jul 16, 2018 at 06:31:19PM +0530, Jagan Teki wrote:
> Hi Tom,
>
> Please pull this PR.
>
> thanks,
> Jagan.
>
> The following changes since commit 5e9a9645816edcc68c09729f257e0c863292bf26:
>
> mach-stm32: Rename CONFIG_SPL_RESET_SUPPORT to CONFIG_SPL_DM_RESET
> (2018-07-13 14:47:29
> -Original Message-
> From: Trent Piepho
> Sent: Monday, July 16, 2018 3:45 PM
> To: Henry Beberman ; u-
> b...@lists.denx.de
> Cc: tr...@konsulko.com; fabio.este...@nxp.com
> Subject: Re: [U-Boot] [PATCH 01/11] imx: Add bootcmd to load and run UEFI
> from mmc
>
> On Mon, 2018-07-16 at
From: Stephen Warren
The U-Boot Makefile can invoke binman multiple times in parallel. This
is problematic because binman uses a static hard-coded temporary file
name. If two instances of binman use that filename at the same time, one
writing one reading, they may silently read the wrong content
On Mon, 2018-07-16 at 22:28 +, Henry Beberman wrote:
> Hi Trent,
>
> > -Original Message-
> > From: Trent Piepho
> > Sent: Monday, July 16, 2018 10:17 AM
> > To: Henry Beberman ; u-
> > b...@lists.denx.de
> > Cc: tr...@konsulko.com; fabio.este...@nxp.com
> > Subject: Re: [U-Boot]
Hi Trent,
> -Original Message-
> From: Trent Piepho
> Sent: Monday, July 16, 2018 10:33 AM
> To: Henry Beberman ; u-
> b...@lists.denx.de
> Cc: fabio.este...@nxp.com
> Subject: Re: [U-Boot] [PATCH 04/11] spl: imx: Add optional lds to keep SPL
> entirely in on-chip RAM
>
> On Sat,
Hi Trent,
> -Original Message-
> From: Trent Piepho
> Sent: Monday, July 16, 2018 10:17 AM
> To: Henry Beberman ; u-
> b...@lists.denx.de
> Cc: tr...@konsulko.com; fabio.este...@nxp.com
> Subject: Re: [U-Boot] [PATCH 01/11] imx: Add bootcmd to load and run UEFI
> from mmc
>
> On Sat,
This commit adds a content section and also instructions
on how to create a bootable SD/MMC device for RK3399 boards.
Signed-off-by: Ezequiel Garcia
---
board/rockchip/evb_rk3399/README | 55 ++--
1 file changed, 53 insertions(+), 2 deletions(-)
diff --git
This commit adds support for RK3399 Ficus board,
aka ROCK960 Enterprise Edition.
Following peripherals are tested and known to work:
* Gigabit Ethernet
* USB 2.0
* MMC
Signed-off-by: Ezequiel Garcia
---
arch/arm/dts/Makefile| 1 +
arch/arm/dts/rk3399-ficus.dts| 564
In ft_fixup_enet_phy_connect_type(), use strlen() instead of sizeof() on
the pointer result of phy_string_for_interface().
sizeof() was returning the size of the pointer (4 bytes), resulting in
the phy-connection-type being set to "rgmi" rather than "rgmii-id".
Signed-off-by: Brendan Shanks
Cc:
Hi,
this is series which was send by Siva. I have just put there missing
Tom's tag which we got and adding more people to TO.
Thanks,
Michal
Changes in v5:
- Add Tom's tag -
https://lists.denx.de/pipermail/u-boot/2018-June/332810.html
- Add Tom's tag -
From: Randy Li
Those pins would be used by many boards.
Signed-off-by: Randy Li
Signed-off-by: Heiko Stuebner
Signed-off-by: Ezequiel Garcia
---
arch/arm/dts/rk3399.dtsi | 55 +++-
1 file changed, 49 insertions(+), 6 deletions(-)
diff --git
Add support for a new RK3399-based board. The RK3399 Ficus
board is an Enterprise Edition board manufactured by Vamrs Ltd.,
based on the Rockchip RK3399 SoC.
While here, we extend the evb_rk3399/README document
with instructions for SD/MMC boot.
The devicetree file for this board has been
On Mon, Jul 16, 2018 at 7:40 AM, Siva Durga Prasad Paladugu
wrote:
> HI Joe,
>
>> -Original Message-
>> From: Siva Durga Prasad Paladugu
>> Sent: Monday, July 16, 2018 2:32 PM
>> To: 'joe.hershber...@ni.com' ; Grygorii Strashko
>>
>> Cc: u-boot ; Michal Simek ;
>> Vipul Kumar
>>
Hi Martin,
On Mon, Jul 16, 2018 at 5:11 PM, Martin Kaiser wrote:
> From: Martin Kaiser
>
> The USBOH module on imx25 chips contains two USB controllers which are
> called USB OTG Controller and USB Host Controller. Each one has its EHCI
> root hub. The OTG Controller's EHCI registers start at
From: Martin Kaiser
The USBOH module on imx25 chips contains two USB controllers which are
called USB OTG Controller and USB Host Controller. Each one has its EHCI
root hub. The OTG Controller's EHCI registers start at offset 0, the Host
Controller's registers start at offset 0x400.
We set
Hi,
On 07/16/2018 01:41 AM, Patrick Delaunay wrote:
> This patch define RCC_PLLNCFGR2_SHIFT to reuse it in
> the pll function for set rate.
>
> Signed-off-by: Patrick Delaunay
Reviewed-by: Vikas Manocha
Cheers,
Vikas
> ---
>
> drivers/clk/clk_stm32mp1.c | 15 ++-
> 1 file
On Sat, 2018-07-14 at 00:11 +, Henry Beberman wrote:
> From: Henry Beberman
>
> This patch adds a new bootable configuration for Windows 10 IoT Core on
> the i.MX7 Dual Sabre board.
>
> It enables SPL on the i.MX7 Sabre in order to support the FIT load of
> OP-TEE and U-Boot proper.
>
>
On Mon, Jul 16, 2018 at 10:25 PM, Andre Przywara wrote:
> Hi,
>
> On 16/07/18 13:59, Maxime Ripard wrote:
>> On Mon, Jul 16, 2018 at 04:58:32PM +0530, Jagan Teki wrote:
>>> Add initial clock driver Allwinner for H3_H5.
>>>
>>> Implemented clock enable and disable functions for
>>> USB OHCI, EHCI,
On 06/14/2018 10:46 PM, Guillaume GARDET wrote:
> As used on some distro, such as openSUSE.
> Signed-off-by: Guillaume GARDET
>
> Cc: Tom Rini
> ---
> include/config_distro_bootcmd.h | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/include/config_distro_bootcmd.h
On Sat, 2018-07-14 at 00:11 +, Henry Beberman wrote:
> From: Henry Beberman
>
> This patch is part of the i.MX Windows 10 IoT Core boot flow.
>
> It adds a modified linker script for SPL to keep all segments in
> on-chip ram. This is to harden the device against potential leaks of
> device
On Sat, 2018-07-14 at 00:11 +, Henry Beberman wrote:
> From: Henry Beberman
>
> This patch enables i.MX platforms to easily add a boot script to their
> U-Boot Proper environment to automatically load and execute an EFI
> firmware from the first FAT partition of an MMC device.
Is there a
This add the initial support of the broadcom reference
board bcm968380gerg with a bcm68380 SoC.
This board has 512 MB of RAM, 128 MB of flash (nand),
2 USB port, 1 UART, 4 ethernet ports and BCM43217 (wifi).
Signed-off-by: Philippe Reynes
---
arch/mips/dts/brcm,bcm968380gerg.dts | 40
This adds an option to force the size of the ram, and
avoid the detection of ram size.
Signed-off-by: Philippe Reynes
---
drivers/ram/bmips_ram.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/ram/bmips_ram.c b/drivers/ram/bmips_ram.c
index cc37dfa..b5f19c9
This adds the initial support of the Broadcom BCM6838 SoC familly,
only cpu, dram, uart and leds are supported.
Signed-off-by: Philippe Reynes
---
arch/mips/dts/brcm,bcm6838.dtsi | 75 +
arch/mips/mach-bmips/Kconfig| 13 +++
Hi,
On 16/07/18 13:59, Maxime Ripard wrote:
> On Mon, Jul 16, 2018 at 04:58:32PM +0530, Jagan Teki wrote:
>> Add initial clock driver Allwinner for H3_H5.
>>
>> Implemented clock enable and disable functions for
>> USB OHCI, EHCI, OTG and PHY gate and clock registers.
>>
>> Signed-off-by: Jagan
On Mon, Jul 16, 2018 at 6:04 PM, Alexey Brodkin
wrote:
>> > Any chance to get a reference to the commit in Linux kernel that
>> > introduces that change?
>> >
>> In fact I believe that the property never existed in the
>> am33xx.dtsi file from Linux. U-Boot commit 85cf0e6299 shows that the
>>
Hi Felix,
> -Original Message-
> From: Felix Brack [mailto:f...@ltec.ch]
> Sent: Sunday, July 15, 2018 5:02 PM
> To: Alexey Brodkin ; Tom Rini
>
> Cc: u-boot@lists.denx.de; Stefan Roese ; Alexander Graf
> ; Michal Simek ;
> Wolfgang Denk
> Subject: Re: [U-Boot] [PATCH] serial:
Hi Martin,
On Mon, Jul 16, 2018 at 5:24 AM, Martin Kaiser wrote:
> diff --git a/arch/arm/include/asm/arch-mx25/imx-regs.h
> b/arch/arm/include/asm/arch-mx25/imx-regs.h
> index 1b00ed7..28cebeb 100644
> --- a/arch/arm/include/asm/arch-mx25/imx-regs.h
> +++
On Mon, Jul 16, 2018 at 03:58:51PM +0530, Jagan Teki wrote:
> On Mon, Jul 16, 2018 at 3:00 PM, Maxime Ripard
> wrote:
> > On Mon, Jul 16, 2018 at 01:49:32PM +0530, Jagan Teki wrote:
> >> DM_MMC need MMC nodes in dtsi need to update and
> >> follow Linux notation to support dm driven mmc driver.
>
From: Siva Durga Prasad Paladugu
Add configuration files/dtses for mini u-boot configuration
which runs on smaller footprint OCM memory. This configuration
only has required parallel nor flash support.
Signed-off-by: Siva Durga Prasad Paladugu
Signed-off-by: Michal Simek
---
Changes in v5:
From: Siva Durga Prasad Paladugu
Remove the SDRAM_BASE nad SDRAM_SIZE as it can now get these
details from DT.
Signed-off-by: Siva Durga Prasad Paladugu
Signed-off-by: Michal Simek
---
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2:
- Removed commit reference from
From: Siva Durga Prasad Paladugu
Add configuration files/dtses for mini u-boot configuration
which runs on smaller footprint of memory. This configuration
has only required nand flash support.
Signed-off-by: Siva Durga Prasad Paladugu
Signed-off-by: Michal Simek
---
Changes in v5: None
From: Siva Durga Prasad Paladugu
This patch renames the routine fdtdec_setup_memory_size()
to fdtdec_setup_mem_size_base() as it now fills the
mem base as well along with size.
Signed-off-by: Siva Durga Prasad Paladugu
Signed-off-by: Michal Simek
Reviewed-by: Tom Rini
---
Changes in v5:
-
From: Siva Durga Prasad Paladugu
This patch updates the ram_base to store the start address of
the first bank DRAM and the use this ram_base to calculate ram_top
properly. This patch fixes the erroneous calculation of ram_top
incase of non zero ram start address.
Signed-off-by: Siva Durga
On Mon, Jul 16, 2018 at 04:09:35PM +0530, Jagan Teki wrote:
> On Mon, Jul 16, 2018 at 3:32 PM, Maxime Ripard
> wrote:
> > On Mon, Jul 16, 2018 at 03:25:08PM +0530, Jagan Teki wrote:
> >> On Mon, Jul 16, 2018 at 3:09 PM, Maxime Ripard
> >> wrote:
> >> > On Mon, Jul 16, 2018 at 01:49:37PM +0530,
From: Vipul Kumar
This patch added support of mmio read and write commands. These commands
can be used to read and write registers from the u-boot command line.
It can be useful in debugging.
Signed-off-by: Vipul Kumar
Signed-off-by: Michal Simek
---
board/xilinx/zynqmp/cmds.c | 48
Hi Tom,
Please pull this PR.
thanks,
Jagan.
The following changes since commit 5e9a9645816edcc68c09729f257e0c863292bf26:
mach-stm32: Rename CONFIG_SPL_RESET_SUPPORT to CONFIG_SPL_DM_RESET
(2018-07-13 14:47:29 -0400)
are available in the Git repository at:
On Mon, Jul 16, 2018 at 04:58:32PM +0530, Jagan Teki wrote:
> Add initial clock driver Allwinner for H3_H5.
>
> Implemented clock enable and disable functions for
> USB OHCI, EHCI, OTG and PHY gate and clock registers.
>
> Signed-off-by: Jagan Teki
> ---
> drivers/clk/sunxi/Kconfig | 7 ++
>
On 07/16/2018 02:49 PM, Michal Simek wrote:
> From: Vipul Kumar
>
> Update the DWC3 USB driver to support a live tree.
>
> Signed-off-by: Vipul Kumar
> Tested-by: Michal Simek
> Signed-off-by: Michal Simek
Applied, thanks
--
Best regards,
Marek Vasut
This patch updates the zynq gem driver to support livetree.
Signed-off-by: Siva Durga Prasad Paladugu
Signed-off-by: Vipul Kumar
---
Changes for v2:
- Note that this patch is based on below two series.
https://patchwork.ozlabs.org/cover/936370/
and
https://patchwork.ozlabs.org/cover/936380/
---
On 07/14/2018 05:49 PM, Tom Rini wrote:
On Sat, Jul 14, 2018 at 12:47:21PM +0200, Wolfgang Denk wrote:
Dear Felix,
In message <1531492980-16543-1-git-send-email...@ltec.ch> you wrote:
The motivation for writing this patch originates in the
effort of synchronizing U-Boot DT to Linux DT for
From: Vipul Kumar
Update the DWC3 USB driver to support a live tree.
Signed-off-by: Vipul Kumar
Tested-by: Michal Simek
Signed-off-by: Michal Simek
---
drivers/usb/common/common.c | 11 +--
drivers/usb/dwc3/dwc3-generic.c | 17 +++--
drivers/usb/host/xhci-dwc3.c
On 16.07.2018 14:42, Wolfgang Denk wrote:
> Dear Felix,
>
> In message <1b0d33fa-adfb-9825-5ae8-8bded1678...@ltec.ch> you wrote:
>>
This needs to be rewritten.
>>>
>>> To try and help clarify, the property in question means "quantity to
>>> shift the register offsets by." It should be
Dear Michal,
In message <93bad62d-1e53-668d-5e68-d5397c81b...@monstr.eu> you wrote:
>
> looks good. I expect there was consideration to keep these config files
> out of the main repo.
I can't remember clearly. I think there was.
I have no real preferences.
Best regards,
Wolfgang Denk
--
Dear Felix,
In message <1b0d33fa-adfb-9825-5ae8-8bded1678...@ltec.ch> you wrote:
>
> >> This needs to be rewritten.
> >
> > To try and help clarify, the property in question means "quantity to
> > shift the register offsets by." It should be clear in our Kconfig help
> > entry as well that this
HI Joe,
> -Original Message-
> From: Siva Durga Prasad Paladugu
> Sent: Monday, July 16, 2018 2:32 PM
> To: 'joe.hershber...@ni.com' ; Grygorii Strashko
>
> Cc: u-boot ; Michal Simek ;
> Vipul Kumar
> Subject: RE: [U-Boot] [PATCH 3/3] net: zynq_gem: convert to use livetree
>
> Hi Joe,
Enable led support for boards which have "gpio-leds" node.
And also for microblaze which is converted to DM_GPIO now.
Tested on zcu100.
Signed-off-by: Michal Simek
---
configs/microblaze-generic_defconfig | 2 ++
configs/xilinx_zynqmp_zcu100_revC_defconfig | 2 ++
IP itself has no reg/no bit which can be used for this functionality.
Add this note to the driver to make sure that none will be asking for
that. Current method is to setup 1s timeout and hang() which is done via
wdt_expire_now().
Signed-off-by: Michal Simek
---
drivers/watchdog/cdns_wdt.c | 1
Now Allwinner platform is all set to use Generic USB
controller drivers, so remove the legacy sunxi drivers.
Cc: Marek Vasut
Signed-off-by: Jagan Teki
---
drivers/usb/host/Makefile | 2 -
drivers/usb/host/ehci-sunxi.c | 204 -
drivers/usb/host/ohci-sunxi.c |
On Mon, Jul 16, 2018 at 4:38 PM, Andre Przywara wrote:
> Hi,
>
> On 16/07/18 10:52, Maxime Ripard wrote:
>> On Mon, Jul 16, 2018 at 04:35:09PM +0800, Chen-Yu Tsai wrote:
>>> On Mon, Jul 16, 2018 at 4:19 PM, Jagan Teki
>>> wrote:
Enabling DM_MMC is not straight forward for Allwinner SoC's
Now clock and reset drivers are available for respective
SoC's so use clk and reset ops on phy driver.
Cc: Marek Vasut
Signed-off-by: Jagan Teki
---
drivers/phy/allwinner/phy-sun4i-usb.c | 63 ++-
1 file changed, 42 insertions(+), 21 deletions(-)
diff --git
Add initial clock driver Allwinner A23.
Implemented clock enable and disable functions for
USB OHCI, EHCI, OTG and PHY gate and clock registers.
Signed-off-by: Jagan Teki
---
drivers/clk/sunxi/Kconfig | 7 +++
drivers/clk/sunxi/Makefile | 1 +
drivers/clk/sunxi/clk_a23.c | 112
There is no reason to save variables to flash only.
Select option via Kconfig instead.
Signed-off-by: Michal Simek
---
There is dependency on:
https://lists.denx.de/pipermail/u-boot/2018-July/334899.html
---
arch/microblaze/Kconfig | 1 -
1 file changed, 1 deletion(-)
diff --git
Converting GPIO to DM requires to do changes in reset subsystem
that's why support for Microblaze soft reset via sysreset and GPIO
sysreset support was added.
These two patches enables enabling GPIO DM.
Microblaze soft reset is bind at last reset method.
GPIO reset is handled via sysreset with
A33 has separate clock driver in Linux because of
few clock differences wrt to A23 like audio etc,.
these may not useful for U-Boot so added a33 ccu
compatible on existing a23 clock driver.
Signed-off-by: Jagan Teki
---
drivers/clk/sunxi/Kconfig | 6 +++---
drivers/clk/sunxi/clk_a23.c | 1 +
Add initial clock driver Allwinner A83T.
Implemented clock enable and disable functions for
USB OHCI, EHCI, OTG and PHY gate and clock registers.
Signed-off-by: Jagan Teki
---
drivers/clk/sunxi/Kconfig| 7 ++
drivers/clk/sunxi/Makefile | 1 +
drivers/clk/sunxi/clk_a83t.c | 120
Add initial reset driver for Allwinner A10s/A13.
Implement reset deassert and assert functions for
USB OHCI, EHCI, OTG and PHY bus reset and clock registers.
Signed-off-by: Jagan Teki
---
drivers/reset/sunxi/Kconfig | 7 +++
drivers/reset/sunxi/Makefile | 1 +
CLK and RESET drivers are now available for most
of the Allwinner platforms, so enable in mach-sunxi/Kconfig
Signed-off-by: Jagan Teki
---
arch/arm/mach-sunxi/Kconfig | 18 ++
1 file changed, 18 insertions(+)
diff --git a/arch/arm/mach-sunxi/Kconfig
Add initial clock driver Allwinner for A10/A20.
Implemented clock enable and disable functions for
USB OHCI, EHCI, OTG and PHY gate and clock registers.
Signed-off-by: Jagan Teki
---
drivers/clk/sunxi/Kconfig | 7 +++
drivers/clk/sunxi/Makefile | 1 +
drivers/clk/sunxi/clk_a10.c | 105
Create the template for a new DM reset driver for the Allwinner A64 SoC.
Signed-off-by: Jagan Teki
---
drivers/reset/Kconfig | 2 +
drivers/reset/Makefile | 1 +
drivers/reset/sunxi/Kconfig | 19 ++
drivers/reset/sunxi/Makefile| 7
Add initial clock driver Allwinner for A31/A31s.
Implemented clock enable and disable functions for
USB OHCI, EHCI, OTG and PHY gate and clock registers.
Signed-off-by: Jagan Teki
---
drivers/clk/sunxi/Kconfig | 7 ++
drivers/clk/sunxi/Makefile | 1 +
drivers/clk/sunxi/clk_a31.c | 130
Add initial reset driver for Allwinner H3_H5.
Implement reset deassert and assert functions for
USB OHCI, EHCI, OTG and PHY bus reset and clock registers.
Signed-off-by: Jagan Teki
---
drivers/reset/sunxi/Kconfig| 7 ++
drivers/reset/sunxi/Makefile | 1 +
Now clock and reset drivers are available for respective
SoC's so use clk and reset ops on musb driver.
Cc: Marek Vasut
Signed-off-by: Jagan Teki
---
drivers/usb/musb-new/sunxi.c | 82 +++-
1 file changed, 53 insertions(+), 29 deletions(-)
diff --git
Like CLK support is handling via A23 driver, even RESET
can handle in similar way. So enable reset_a23 for A33
as well.
Signed-off-by: Jagan Teki
---
drivers/reset/sunxi/Kconfig | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/reset/sunxi/Kconfig
Once of key blocker for using USB Generic host controller
drivers in Allwinner are CLK and RESET drivers, now these
available for USB usage. So switch to use EHCI and OHCI
Generic controllers.
Enabling USB is wisely a board choise, so Enable USB_OHCI_HCD
where it already have USB_EHCI_HCD
Cc:
Implement USB reset asser, deasset, request functions for
OHCI, EHCI, OTG and USBPHY reset registers.
Signed-off-by: Jagan Teki
---
drivers/reset/sunxi/reset_a64.c | 60 +
1 file changed, 54 insertions(+), 6 deletions(-)
diff --git
Add initial clock driver Allwinner for A10s/A13.
Implemented clock enable and disable functions for
USB OHCI, EHCI, OTG and PHY gate and clock registers.
Signed-off-by: Jagan Teki
---
drivers/clk/sunxi/Kconfig| 7 +++
drivers/clk/sunxi/Makefile | 1 +
drivers/clk/sunxi/clk_a10s.c |
Add initial reset driver for Allwinner A31/A31s.
Implement reset deassert and assert functions for
USB OHCI, EHCI, OTG and PHY bus reset and clock registers.
Signed-off-by: Jagan Teki
---
drivers/reset/sunxi/Kconfig | 7 ++
drivers/reset/sunxi/Makefile| 1 +
Add initial reset driver for Allwinner A83T.
Implement reset deassert and assert functions for
USB OHCI, EHCI, OTG and PHY bus reset and clock registers.
Signed-off-by: Jagan Teki
---
drivers/reset/sunxi/Kconfig | 7 ++
drivers/reset/sunxi/Makefile | 1 +
Add initial reset driver Allwinner A23.
Implemented reset deassert and assert functions for
USB OHCI, EHCI, OTG and PHY bus reset and clock registers.
Signed-off-by: Jagan Teki
---
drivers/reset/sunxi/Kconfig | 7 ++
drivers/reset/sunxi/Makefile| 1 +
Since clock and reset drivers have same DT node,
we cann't follow another binding for reset so bind
the reset driver from clock driver.
Binding here rely on name of the uclass driver rather
than matching id.
So, this patch will pick the clock driver name as input
and replace the sunfix ccu with
Add initial reset driver for Allwinner A10/A20.
Implement reset deassert and assert functions for
USB OHCI, EHCI, OTG and PHY bus reset and clock registers.
Signed-off-by: Jagan Teki
---
drivers/reset/sunxi/Kconfig | 7 +++
drivers/reset/sunxi/Makefile| 1 +
Implement USB clock enable and disble functions for
OHCI, EHCI, OTG and USBPHY gate and clock registers.
Signed-off-by: Jagan Teki
---
drivers/clk/sunxi/clk_a64.c | 62 ++---
1 file changed, 58 insertions(+), 4 deletions(-)
diff --git
Missing request ops from respective uclass driver
generating "synchronous abort" in Allwinner platform,
may be in arm. So add default request ops and give
a chance to uclass driver to think whether they really
need request or not.
Signed-off-by: Jagan Teki
---
drivers/reset/reset-uclass.c | 10
Add proper kconfig entries for Allwinner platform,
CLK_SUN50I_A64 is kconfig option for A64 clock driver.
Signed-off-by: Jagan Teki
---
drivers/clk/Kconfig| 1 +
drivers/clk/sunxi/Kconfig | 18 ++
drivers/clk/sunxi/Makefile | 2 +-
3 files changed, 20 insertions(+), 1
Add clock disable function for clearing register bits.
Signed-off-by: Jagan Teki
---
drivers/clk/sunxi/clk_a64.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/clk/sunxi/clk_a64.c b/drivers/clk/sunxi/clk_a64.c
index 77afbcafd3..fb9dec3173 100644
---
Add initial clock driver Allwinner for H3_H5.
Implemented clock enable and disable functions for
USB OHCI, EHCI, OTG and PHY gate and clock registers.
Signed-off-by: Jagan Teki
---
drivers/clk/sunxi/Kconfig | 7 ++
drivers/clk/sunxi/Makefile | 2 +
drivers/clk/sunxi/clk_h3.c | 131
Sync include/dt-bindings/reset/sun6i-a31-ccu.h from Linux
with below commit details:
commit c6e6c96d8fa6f21e80e625bdf56c9ef580f43acb
Author: Chen-Yu Tsai
Date: Thu Aug 25 14:21:59 2016 +0800
clk: sunxi-ng: Add A31/A31s clocks
Signed-off-by: Jagan Teki
---
Sync include/dt-bindings/clock/sun5i-ccu.h from Linux
with below commit details:
commit 0adad031ef5d0d89ee92d92964d3799685ea2387
Author: Maxime Ripard
Date: Wed May 17 09:40:37 2017 +0200
clk: sunxi-ng: sun5i: Export video PLLs
Signed-off-by: Jagan Teki
---
Sync include/dt-bindings/reset/sun5i-ccu.h from Linux
with below commit details:
commit 5e73761786d6ff7e10c371703835528dee9306e3
Author: Maxime Ripard
Date: Tue Oct 4 10:09:58 2016 +0200
clk: sunxi-ng: Add sun5i CCU driver
Signed-off-by: Jagan Teki
---
Sync include/dt-bindings/clock/sun6i-a31-ccu.h from Linux
with below commit details:
commit 80815004a45fc68b6e34653af4fca47be7fb96ed
Author: Chen-Yu Tsai
Date: Fri Sep 29 16:22:53 2017 +0800
clk: sunxi-ng: sun6i: Export video PLLs
Signed-off-by: Jagan Teki
---
From: Andre Przywara
Create the template for a new DM clock driver for the Allwinner A64 SoC.
Signed-off-by: Andre Przywara
Signed-off-by: Jagan Teki
---
drivers/clk/Makefile| 1 +
drivers/clk/sunxi/Makefile | 7
drivers/clk/sunxi/clk_a64.c | 77
Make proper ordering for include files to get rid
of build issues with arch/clock.h
Signed-off-by: Jagan Teki
---
drivers/net/sun8i_emac.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c
index 3ba3a1ff8b..709b5e26bd
Sync include/dt-bindings/reset/sun4i-a10-ccu.h from Linux
with below commit details:
commit c84f5683f6e9fee78e054431d89121225ccb7464
Author: Priit Laes
Date: Wed Aug 23 20:23:29 2017 +0300
clk: sunxi-ng: Add sun4i/sun7i CCU driver
Signed-off-by: Jagan Teki
---
Make proper ordering for include files to get rid
of build issues with arch/clock.h
Signed-off-by: Jagan Teki
---
drivers/mtd/nand/sunxi_nand_spl.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/nand/sunxi_nand_spl.c
b/drivers/mtd/nand/sunxi_nand_spl.c
sourcing of sub directiory kconfig files are not in
proper order, so keep them in ascending order.
Signed-off-by: Jagan Teki
---
drivers/clk/Kconfig | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
index edb4ca58ea..3e66dd97c1
This is series is trying to add initial support for CLK and RESET
drivers for Allwinner SoC's with USB as a starting IP.
Linux handle both clock and reset as ccu with common DT bindings,
but besides that U-Boot handle them separately with individual
generic uclass functions. So we need have a
There is only one chipselect on each connector.
Define it directly in board dts file.
There should be an option to use more chipselects via gpios.
Signed-off-by: Michal Simek
---
arch/arm/dts/zynqmp-zcu100-revC.dts | 2 ++
1 file changed, 2 insertions(+)
diff --git
On Mon, Jul 16, 2018 at 11:13 AM Jagan Teki wrote:
>
> On Mon, Jul 16, 2018 at 3:16 PM, Maxime Ripard
> wrote:
> > On Mon, Jul 16, 2018 at 01:49:52PM +0530, Jagan Teki wrote:
> >> Usually eMMC is default env fat device for environment,
> >> if MMC_SUNXI_SLOT_EXTRA != 1 Sunxi always probed emmc
>
On 14.7.2018 22:35, Shreenidhi Shedi wrote:
>
>
> [PATCH 1/3] Removed a bunch of WATCHDOG related macros
> [PATCH 2/3] Support for watchdog_reset function for Microblaze init
> [PATCH 3/3] Xilinx Axi watchdog driver to driver model
>
> Changes in v2:
> - Appropriate commit messages for each
Hi,
On 16/07/18 10:52, Maxime Ripard wrote:
> On Mon, Jul 16, 2018 at 04:35:09PM +0800, Chen-Yu Tsai wrote:
>> On Mon, Jul 16, 2018 at 4:19 PM, Jagan Teki
>> wrote:
>>> Enabling DM_MMC is not straight forward for Allwinner SoC's to
>>> make proper compatibility in mmc driver vs DT nodes.
>>>
From: Shreenidhi Shedi
Xilinx Axi wdt driver conversion to driver model & Kconfig update
for the same.
Signed-off-by: Shreenidhi Shedi
Signed-off-by: Michal Simek
---
Changes in v3:
- Fix commit message
- s/Axi/AXI
- Use platdata instead of private data.
- Remove \n from wdt reset to
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