On Wed, Mar 13, 2019 at 6:47 AM Stefan Roese wrote:
>
> On 12.03.19 22:01, Simon Goldschmidt wrote:
> > This adds a compatible string for m41t82. This ensures that this driver
> > can be used for m41t82 in DM mode, too (as it was usable for this model
> > in non-DM mode before).
> >
> > This patch
On Wed, 2019-03-13 at 04:30 +0100, Marek Vasut wrote:
> On 3/13/19 4:03 AM, Ley Foon Tan wrote:
> >
> > Syscon register is required in dts to select correct
> > PHY interface.
> >
> > Fix error below:
> >
> > Net: Failed to get syscon: -2
> >
> > Signed-off-by: Ley Foon Tan
> Is this fixed i
On 12.03.19 22:01, Simon Goldschmidt wrote:
This enables DM_RTC and RTC_M41T62 to enable support for the rtc on the
socrates board.
Signed-off-by: Simon Goldschmidt
Reviewed-by: Stefan Roese
Thanks,
Stefan
___
U-Boot mailing list
U-Boot@lists.denx
On 12.03.19 22:01, Simon Goldschmidt wrote:
This patch makes the on-board RTC work on the socfpga_socrates board.
This rtc is present on the board, but it does not work (fails with a
timeout).
This patch adds a weak pull-up on the I2C0-SCL pin connected to the m41t82
RTC on this board. While the
On 12.03.19 22:01, Simon Goldschmidt wrote:
This adds a compatible string for m41t82. This ensures that this driver
can be used for m41t82 in DM mode, too (as it was usable for this model
in non-DM mode before).
This patch ensures this driver works on socfpga_socrates.
Signed-off-by: Simon Gold
Hello Simon,
Am 12.03.2019 um 22:01 schrieb Simon Goldschmidt:
Using this driver on socfpga gen5 with DM_I2C enabled leads to a data abort
as the 'i2c' reset property cannot be found (the gen5 dtsi does not provide
reset-names).
The actual bug was to check 'if (&priv->reset_ctl)', which is neve
Fix the following spit from pytest:
u-boot/test/py/conftest.py:438: RemovedInPytest4Warning: MarkInfo objects are
deprecated as they contain merged marks which are hard to deal with correctly.
Please use node.get_closest_marker(name) or node.iter_markers(name).
Docs: https://docs.pytest.org/e
On 3/13/19 4:03 AM, Ley Foon Tan wrote:
> Syscon register is required in dts to select correct
> PHY interface.
>
> Fix error below:
>
> Net: Failed to get syscon: -2
>
> Signed-off-by: Ley Foon Tan
Is this fixed in mainline Linux too ?
> ---
> arch/arm/dts/socfpga_stratix10.dtsi | 3 +++
>
Syscon register is required in dts to select correct
PHY interface.
Fix error below:
Net: Failed to get syscon: -2
Signed-off-by: Ley Foon Tan
---
arch/arm/dts/socfpga_stratix10.dtsi | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/dts/socfpga_stratix10.dtsi
b/arch/arm/dts/so
Thanks a lot, Stefano.
Please let me know if you need me to do anything. Once they are picked up, I
will start the work for driver cleaning up.
Best regards,
Yangbo Lu
> -Original Message-
> From: Stefano Babic
> Sent: Wednesday, March 13, 2019 2:14 AM
> To: Y.b. Lu ; u-boot@lists.denx.
Hi Lukas
於 2019年3月12日 週二 下午7:04寫道：
>
>
>
> > -Original Message-
> > From: Lukas Auer [mailto:lukas.a...@aisec.fraunhofer.de]
> > Sent: Wednesday, March 06, 2019 6:53 AM
> > To: u-boot@lists.denx.de
> > Cc: Atish Patra; Anup Patel; Bin Meng; Andreas Schwab; Palmer Dabbelt;
> > Alexander Gr
---
arch/arm/include/asm/arch-sunxi/gpio.h | 3 +++
arch/arm/mach-sunxi/board.c | 12
include/configs/sunxi-common.h | 8 +---
3 files changed, 20 insertions(+), 3 deletions(-)
diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h
b/arch/arm/include/asm/arch-sunxi/gpio.h
index 4
Add TQMa7D SoM support when mounted on MBa7 evaluation board.
Signed-off-by: Bruno Thomsen
---
arch/arm/mach-imx/Kconfig | 2 +-
arch/arm/mach-imx/cpu.c | 2 +-
arch/arm/mach-imx/mx7/Kconfig | 9 +
arch/arm/mach-imx/mx7/soc.c | 7 +
board/tqc/c
This work is based on the vendor BSP and an attempt to mainline tqma7
board support. The module is used by many long life products, so it
would be nice with upstream supported bootloader. So it's easier to
update when secure boot and TPM 2.0 support improves. This patch
focus on core bootloader fea
On 3/12/19 8:30 PM, Eugeniu Rosca wrote:
> Hi Marek cc: Michael
Hi,
> On Tue, Mar 5, 2019 at 4:37 AM Marek Vasut wrote:
>>
>> The ATF can pass additional information via the first four registers,
>> x0...x3. The R-Car Gen3 with mainline ATF, register x1 contains pointer
>> to a device tree with
On 3/12/19 9:29 PM, Eugeniu Rosca wrote:
> Hi Tom,
Hi,
> On Tue, Mar 12, 2019 at 03:42:24PM -0400, Tom Rini wrote:
>> On Tue, Mar 12, 2019 at 07:59:40PM +0100, Eugeniu Rosca wrote:
>>> Hi Marek,
>>>
>>> On Tue, Mar 5, 2019 at 4:41 AM Marek Vasut wrote:
>>> [..]
+.align 8
+.globl rcar_a
This enables DM_RTC and RTC_M41T62 to enable support for the rtc on the
socrates board.
Signed-off-by: Simon Goldschmidt
---
configs/socfpga_socrates_defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/configs/socfpga_socrates_defconfig
b/configs/socfpga_socrates_defconfig
index 45
Using this driver on socfpga gen5 with DM_I2C enabled leads to a data abort
as the 'i2c' reset property cannot be found (the gen5 dtsi does not provide
reset-names).
The actual bug was to check 'if (&priv->reset_ctl)', which is never false.
While at it, convert the driver to use 'reset_get_bulk'
This patch makes the on-board RTC work on the socfpga_socrates board.
This rtc is present on the board, but it does not work (fails with a
timeout).
This patch adds a weak pull-up on the I2C0-SCL pin connected to the m41t82
RTC on this board. While the SDA line has a pull-up on the pcb, the pull-u
This adds a compatible string for m41t82. This ensures that this driver
can be used for m41t82 in DM mode, too (as it was usable for this model
in non-DM mode before).
This patch ensures this driver works on socfpga_socrates.
Signed-off-by: Simon Goldschmidt
---
drivers/rtc/m41t62.c | 1 +
1 f
This series contains fixes and config changes to enable the 'date' command
talking to the rtc on the socrates board.
It contains fixes to the designware i2c driver, enables DM support for the
rtc used on the socrates board, adds a missing pull-up and changes the
defconfig to enable rtc support by
Am 12.03.2019 um 07:02 schrieb Stefan Roese:
Hi Simon,
On 11.03.19 22:35, Simon Goldschmidt wrote:
This introduces a new Kconfig option SPL_CLEAR_BSS_F. If enabled, it clears
the bss before calling board_init_f() instead of clearing it before calling
board_init_r().
This also ensures that vari
Hi Tom,
On Tue, Mar 12, 2019 at 03:42:24PM -0400, Tom Rini wrote:
> On Tue, Mar 12, 2019 at 07:59:40PM +0100, Eugeniu Rosca wrote:
> > Hi Marek,
> >
> > On Tue, Mar 5, 2019 at 4:41 AM Marek Vasut wrote:
> > [..]
> > > +.align 8
> > > +.globl rcar_atf_boot_args
> > > +rcar_atf_boot_args:
> > > +
On Tue, Mar 12, 2019 at 07:59:40PM +0100, Eugeniu Rosca wrote:
> Hi Marek,
>
> On Tue, Mar 5, 2019 at 4:41 AM Marek Vasut wrote:
> [..]
> > +.align 8
> > +.globl rcar_atf_boot_args
> > +rcar_atf_boot_args:
> > + .dword 0
> > + .dword 0
> > + .dword 0
> > + .dword 0
> > +
>
Hi Marek cc: Michael
On Tue, Mar 5, 2019 at 4:37 AM Marek Vasut wrote:
>
> The ATF can pass additional information via the first four registers,
> x0...x3. The R-Car Gen3 with mainline ATF, register x1 contains pointer
> to a device tree with platform information. Parse this device tree and
> ext
Hi Marek,
On Tue, Mar 5, 2019 at 4:41 AM Marek Vasut wrote:
[..]
> +.align 8
> +.globl rcar_atf_boot_args
> +rcar_atf_boot_args:
> + .dword 0
> + .dword 0
> + .dword 0
> + .dword 0
> +
> +ENTRY(save_boot_params)
> + adr x8, rcar_atf_boot_args
> + stp x0
Hi
On Mon, Mar 11, 2019 at 10:47 PM Joris Offouga wrote:
>
> This reverts commit 9e3c0174da842dd88f5feaffbf843ba332233897.
>
> This commit breaks U-Boot when is load with imx-usb-loader.
>
> Signed-off-by: Joris Offouga
Can you try just define CONFIG_SYS_MALLOC_F_LEN=0x2000.
What is the value o
Hi Y.B.,
On 01/03/19 04:15, Y.b. Lu wrote:
> Any comments on the patch-set?
> Thanks a lot.
Patch is tin the right direction, it just touch (as it must be) a huge
number of boards. I cannot pick it up now, so I will push it into my
-next branch.
Regards,
Stefano
>
>> -Original Message-
Dear Tom,
In message <20190312173125.GP4690@bill-the-cat> you wrote:
>
> > I think you were misled by Heiko's description. What he really ment
> > was just that the addresses where the boot ROM stored the
> > information about the boot device etc. gets overwriteen when the SPL
>
> For clarity, t
On 11/03/19 18:36, Chris Spencer wrote:
> On Sat, 2 Mar 2019 at 06:27, Peng Fan wrote:
>>> On Mon, 4 Feb 2019 at 10:05, Chris Spencer wrote:
From: Chris Spencer
The Ethernet controller is not able to initialise correctly without
the pinctrl driver.
This config setti
On Tue, Mar 12, 2019 at 06:08:32PM +0100, Wolfgang Denk wrote:
> Dear Tom,
>
> In message <20190312140417.GJ4690@bill-the-cat> you wrote:
> >
> > To answer that, no, I don't suppose there's a problem with auditing the
> > code to make sure that we can pass in gd, rather than U-Boot proper
> > ass
Hi Anatolij,
On Tue, Mar 12, 2019 at 4:10 AM Anatolij Gustschin wrote:
>
> Hi Joe,
>
> On Tue, 5 Mar 2019 12:05:38 -0600
> Joe Hershberger joe.hershber...@ni.com wrote:
>
> > Hi Andrejs,
> >
> > https://patchwork.ozlabs.org/patch/1050177/ was applied to
> > http://git.denx.de/?p=u-boot/u-boot-ne
Hi Tom,
These patches passed the CI build here:
https://travis-ci.org/jhershbe/u-boot/builds/501807294
The following changes since commit 2e8092d94f40a5692baf3ec768ce3216a7bf032a:
Merge branch 'master' of git://git.denx.de/u-boot-sunxi (2019-03-11 15:48:57
-0400)
are available in the git re
Dear Tom,
In message <20190312140417.GJ4690@bill-the-cat> you wrote:
>
> To answer that, no, I don't suppose there's a problem with auditing the
> code to make sure that we can pass in gd, rather than U-Boot proper
> assuming it's the first thing to touch gd, if configured.
> But that to
> me is
Hi Bruno,
On Tue, Mar 12, 2019 at 1:58 PM Bruno Thomsen wrote:
> diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
> index 8631fbd481..0335c0e8db 100644
> --- a/arch/arm/mach-imx/Kconfig
> +++ b/arch/arm/mach-imx/Kconfig
> @@ -46,7 +46,7 @@ config SECURE_BOOT
> config CMD_BMODE
On Tue, Mar 12, 2019 at 07:46:35AM +0100, Stefan Roese wrote:
> When checking for boards that are enabling a SATA driver that isn't
> converted to DM yet we need to be sure to not also trip over boards that
> do set CONFIG_AHCI & CONFIG_BLK by itself, as that is not a bug.
>
> This was detected w
On Mon, Mar 11, 2019 at 10:59:35PM +0530, Jagan Teki wrote:
> Hi Tom,
>
> Please pull this PR.
>
> Summary:
> - axp818 fix
> - fix warnings for ethernet clock code
>
> The following changes since commit f18b7b2798cc37b613b5d3dda2e1461857a913b8:
>
> Merge branch 'master' of git://git.denx.de
The cache UCLASS will be used for configure settings that can be found
in a CPU's L2 cache controller.
Add a uclass and a test for cache.
Signed-off-by: Dinh Nguyen
---
v2: separate out uclass patch from driver and add test
---
drivers/Kconfig | 2 ++
drivers/Makefile
Find the UCLASS_CACHE driver to configure the cache controller's
settings.
Reviewed-by: Marek Vasut
Signed-off-by: Dinh Nguyen
---
arch/arm/mach-socfpga/misc.c | 16 +++-
1 file changed, 3 insertions(+), 13 deletions(-)
diff --git a/arch/arm/mach-socfpga/misc.c b/arch/arm/mach-socf
Add a PL310 cache controller driver that is usually found on
ARMv7(32-bit) devices. The driver configures the cache settings that can
be found in the device tree files.
This initial revision only configures basic settings(data & instruction
prefetch, shared-override, data & tag latency). I believe
Select the PL310 UCLASS_CACHE driver for SoCFPGA.
Reviewed-by: Marek Vasut
Signed-off-by: Dinh Nguyen
---
arch/arm/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index f42eccef80..f4c6262bb0 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@
Linux commit 8ecd7f5970c5 ("ARM: 8483/1: Documentation: l2c: Rename
l2cc to l2c2x0")
Linux docs:
Documentation/devicetree/bindings/arm/l2c2x0.txt
Copied from Linux kernel v5.0.
"The documentation in the l2cc.txt is specific to the L2 cache
controllers L2C210/L2C220/L2C310 (also known as PL210/PL
Add the PL310 macros for latency control setup, read and write bits.
Reviewed-by: Marek Vasut
Signed-off-by: Dinh Nguyen
---
arch/arm/include/asm/pl310.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/include/asm/pl310.h b/arch/arm/include/asm/pl310.h
index b83978b1cc..f69e9e45
Hi,
This is V2 of the series to add a UCLASS_CACHE dm driver to handling
the configuration of cache settings. Place this new driver under
/drivers/cache. In this initial revision, the driver is only configuring
what I think are essential cache settings. The more comprehensive cache
settings can be
On 3/12/19 3:33 PM, Westergreen, Dalon wrote:
> On Tue, 2019-03-12 at 11:46 +0100, Marek Vasut wrote:
>> On 3/12/19 9:31 AM, Ley Foon Tan wrote:
>>> Add board_get_usable_ram_top() function. Limit maximum usable
>>> ram top to 2GB.
>>
>> Why ? There are ARM64 platforms which can access the entire DR
On Tue, 2019-03-12 at 11:46 +0100, Marek Vasut wrote:
> On 3/12/19 9:31 AM, Ley Foon Tan wrote:
> > Add board_get_usable_ram_top() function. Limit maximum usable
> > ram top to 2GB.
>
> Why ? There are ARM64 platforms which can access the entire DRAM range
> just fine, what's the problem ?
>
The
On Tue, 2019-03-12 at 11:45 +0100, Marek Vasut wrote:
> On 3/12/19 9:31 AM, Ley Foon Tan wrote:
> > Setup bi_dram struct based on returned from setup_memory_banks().
> >
> > Signed-off-by: Ley Foon Tan
> > ---
> > arch/arm/mach-socfpga/board.c | 16 +++-
> > 1 file changed, 15 insert
On Mon, Mar 11, 2019 at 12:44:24PM +0100, Heinrich Schuchardt wrote:
> On 3/11/19 9:03 AM, Ard Biesheuvel wrote:
> > On Mon, 11 Mar 2019 at 01:16, Heinrich Schuchardt
> > wrote:
> >>
> >> From: Alexander Graf
> >>
> >> While discussing something compeltely different, Ard pointed out
> >> that it
On Tue, 2019-03-12 at 11:44 +0100, Marek Vasut wrote:
> On 3/12/19 9:31 AM, Ley Foon Tan wrote:
> > Setup bank start address and size based on total SDRAM
> > memory size calculated from hardware. Update sdram_size_check()
> > to support multiple banks.
> >
> > Stratix10 supports up to 2 memory ba
On Tue, Mar 12, 2019 at 02:42:02PM +0100, Wolfgang Denk wrote:
> Dear Tom,
>
> In message <20190312121957.GI4690@bill-the-cat> you wrote:
> >
> > > Yes, doable ... but the question is more, do we really want to read
> > > such infos twice, instead reading them in SPL and passing them from
> > > S
Dear Tom,
In message <20190312121957.GI4690@bill-the-cat> you wrote:
>
> > Yes, doable ... but the question is more, do we really want to read
> > such infos twice, instead reading them in SPL and passing them from
> > SPL to U-Boot ?
>
> Probably so, yes. Since we're talking about SPL and a "lo
On Mon, Feb 25, 2019 at 9:54 PM Adam Ford wrote:
>
> In order to fully support SPL_OF_CONTROL, we need BSS to be a bit
> larger. This patch relocates BSS to SDRAM instead of SRAM which
> is similar to how ARMv7 boards (like OMAP2+) do it.
>
> This means two new variables are required:
> CONFIG_SPL
From: Thierry Reding
This eliminates the need for intermediate helper functions and allow the
macros to return a value so that it can be used subsequently.
Signed-off-by: Thierry Reding
---
Changes in v2:
- new patch
lib/fdtdec_test.c | 64 ---
1 fi
From: Thierry Reding
Implement carveout tests for 32-bit and 64-bit builds.
Signed-off-by: Thierry Reding
---
Changes in v2:
- new patch
lib/fdtdec_test.c | 152 ++
1 file changed, 152 insertions(+)
diff --git a/lib/fdtdec_test.c b/lib/fdtdec_test.
From: Thierry Reding
The fdtdec_get_carveout() and fdtdec_set_carveout() function can be used
to read a carveout from a given node or add a carveout to a given node
using the standard device tree bindings (involving reserved-memory nodes
and the memory-region property).
Reviewed-by: Simon Glass
From: Thierry Reding
Enable fdtdec tests on sandbox configurations so that they can be run to
validate the fdtdec implementation.
Signed-off-by: Thierry Reding
---
Changes in v2:
- new patch
configs/sandbox64_defconfig | 1 +
configs/sandbox_defconfig | 1 +
2 files changed, 2 insertions(+)
From: Thierry Reding
Hide the declaration of the "fd" variable When not building a DEBUG
configuration, to avoid the variable being unused.
Signed-off-by: Thierry Reding
---
Changes in v2:
- new patch
lib/fdtdec_test.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/lib/fdtdec_test.c b/
From: Thierry Reding
Runtime tests are provided as a test_fdtdec command implementation. Add
a Kconfig symbol that allows this command to be built so that the tests
can be used.
Signed-off-by: Thierry Reding
---
Changes in v2:
- new patch
lib/Kconfig | 4
1 file changed, 4 insertions(+)
From: Thierry Reding
This function can be used to add subnodes in the /reserved-memory node.
Reviewed-by: Simon Glass
Signed-off-by: Thierry Reding
---
Changes in v2:
- split fdt_{addr,size}_unpack() helpers into separate patch
- use name@x,y notation only if the upper cell is > 0
- use debug(
From: Thierry Reding
This function can be used to set a phandle for a given node.
Signed-off-by: Thierry Reding
---
Changes in v2:
- don't emit deprecated linux,phandle property
include/fdtdec.h | 11 +++
lib/fdtdec.c | 7 +++
2 files changed, 18 insertions(+)
diff --git a/i
From: Thierry Reding
This function generates a new, unused phandle by looking up the highest
phandle value stored in a device tree and adding one.
Signed-off-by: Thierry Reding
---
Changes in v2:
- rename to fdtdec_generate_phandle()
include/fdtdec.h | 12
lib/fdtdec.c | 28 +
From: Thierry Reding
These helpers can be used to unpack variables of type fdt_addr_t and
fdt_size_t into a pair of 32-bit variables. This is useful in cases
where such variables need to be written to properties (such as "reg")
of a device tree node where they need to be split into cells.
Signed
From: Thierry Reding
These macros are useful for converting the endianness of variables of
type fdt_addr_t and fdt_size_t.
Reviewed-by: Simon Glass
Signed-off-by: Thierry Reding
---
Changes in v2:
- add Reviewed-by from Simon
include/fdtdec.h | 4
1 file changed, 4 insertions(+)
diff -
Reviewed-by: Sam Protsenko
On Thu, Feb 14, 2019 at 2:37 PM Igor Opaniuk wrote:
>
> AVB 2.0 spec. revision 1.1 introduces support for named persistent values
> that must be tamper evident and allows AVB to store arbitrary key-value
> pairs [1].
>
> Introduce implementation of two additional AVB o
Hi Simon,
> -Original Message-
> From: Simon Glass
> Sent: 10 March 2019 21:51
> To: Ibai Erkiaga Elorza
> Cc: U-Boot Mailing List ; Patrick Delaunay
> ; Andy Shevchenko
> ; Bin Meng ;
> Patrice Chotard
> Subject: Re: [U-Boot][PATCH] dm: check OF_LIVE is enabled
>
> Hi Ibai,
>
> On Tu
On Tue, Mar 12, 2019 at 12:37:20PM +0100, Heiko Schocher wrote:
> Hello Tom,
>
> Am 12.03.2019 um 12:16 schrieb Tom Rini:
> >On Tue, Mar 12, 2019 at 09:21:36AM +0100, Heiko Schocher wrote:
> >>Hello Simon, Tom,
> >>
> >>I am just stumbeld on an am437x basd board over the problem to pass
> >>the bo
Hello Tom,
Am 12.03.2019 um 12:16 schrieb Tom Rini:
On Tue, Mar 12, 2019 at 09:21:36AM +0100, Heiko Schocher wrote:
Hello Simon, Tom,
I am just stumbeld on an am437x basd board over the problem to pass
the bootmode from SPL to U-Boot. On am437x the bootmode info get
overwritten from SPL stack,
On Tue, Mar 12, 2019 at 09:21:36AM +0100, Heiko Schocher wrote:
> Hello Simon, Tom,
>
> I am just stumbeld on an am437x basd board over the problem to pass
> the bootmode from SPL to U-Boot. On am437x the bootmode info get
> overwritten from SPL stack, and I need this info in U-Boot.
>
> Hack wou
On Tue, Mar 12, 2019 at 9:31 AM Ley Foon Tan wrote:
>
> This patchset update Stratix 10 SDRAM driver to support:
> - Multi-banks memory (Patch [1-8])
> - Stratix 10 support up to 2 memory banks:
> Bank 0: Address 0, size 2GB
> Bank 1: Address 0x1, size 124GB
> - Add warm
On 3/12/19 9:31 AM, Ley Foon Tan wrote:
> Scrub memory content if ECC is enabled and it is not
> from warm reset boot.
>
> Enable icache and dcache before scrub memory
> and use "DC ZVA" instruction to clear memory
> to zeros. This instruction writes a cache line
> at a time and it can prevent fal
On 3/12/19 9:31 AM, Ley Foon Tan wrote:
> Add ft_board_setup() function to setup memory banks before
> boot to Linux.
Shouldn't bootm/booti be doing just that already ?
> Signed-off-by: Ley Foon Tan
> ---
> board/altera/stratix10-socdk/socfpga.c | 25 +
> 1 file changed,
On 3/12/19 9:31 AM, Ley Foon Tan wrote:
> Add board_get_usable_ram_top() function. Limit maximum usable
> ram top to 2GB.
Why ? There are ARM64 platforms which can access the entire DRAM range
just fine, what's the problem ?
> Signed-off-by: Dalon Westergreen
> Signed-off-by: Ley Foon Tan
> ---
On 3/12/19 9:31 AM, Ley Foon Tan wrote:
> Setup bi_dram struct based on returned from setup_memory_banks().
>
> Signed-off-by: Ley Foon Tan
> ---
> arch/arm/mach-socfpga/board.c | 16 +++-
> 1 file changed, 15 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/mach-socfpga/board
On 3/12/19 9:31 AM, Ley Foon Tan wrote:
> Move SDRAM size check to SDRAM driver. sdram_calculate_size()
> is called in SDRAM initialization already, avoid calling
> twice in size check function.
>
> Signed-off-by: Ley Foon Tan
> ---
> arch/arm/mach-socfpga/spl_s10.c | 11 ---
> drivers/d
On 3/12/19 9:31 AM, Ley Foon Tan wrote:
> Setup bank start address and size based on total SDRAM
> memory size calculated from hardware. Update sdram_size_check()
> to support multiple banks.
>
> Stratix10 supports up to 2 memory banks.
>
> Bank 0: Address 0, size 2GB
> Bank 1: Address 0x1000
Reviewed-by: Igor Opaniuk
On Fri, 8 Feb 2019 at 19:16, Marcel Ziswiler wrote:
>
> From: Marcel Ziswiler
>
> Remove obsolete USB_GADGET_MASS_STORAGE configuration.
>
> Signed-off-by: Marcel Ziswiler
>
> ---
>
> Changes in v2: None
>
> include/configs/apalis_imx6.h | 2 --
> 1 file changed, 2 d
Hi Marcel,
s/Enbale/Enable/g
On Fri, 8 Feb 2019 at 19:13, Marcel Ziswiler wrote:
>
> From: Marcel Ziswiler
>
> Enbale FIT image, GPT command, i.MX thermal and EFI loader support.
>
> Signed-off-by: Marcel Ziswiler
>
> ---
>
> Changes in v2: None
>
> configs/apalis_imx6_defconfig | 4 +++-
>
From: Thierry Reding
If 64-bit physical addresses support is enabled, make sure the sandox
defines the correct types for phys_addr_t and phys_size_t.
Signed-off-by: Thierry Reding
---
arch/sandbox/include/asm/types.h | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --gi
From: Thierry Reding
Use the %pap printf specifier to print physical addresses. The physical
address is passed by reference and hence avoids the need to play tricks
with the preprocessor to use the correct specifier.
Signed-off-by: Thierry Reding
---
arch/sandbox/lib/pci_io.c | 2 +-
1 file ch
From: Thierry Reding
When phys_addr_t printf specifier support was first introduced in commit
1eebd14b7902 ("vsprintf: Add modifier for phys_addr_t"), it was enabled
only if CONFIG_CMD_NET was selected. Since physical addresses are not
unique to networking support it doesn't make sense to conditi
Hello Simon, Tom,
Am 12.03.2019 um 09:21 schrieb Heiko Schocher:
Hello Simon, Tom,
I am just stumbeld on an am437x basd board over the problem to pass
the bootmode from SPL to U-Boot. On am437x the bootmode info get
overwritten from SPL stack, and I need this info in U-Boot.
Hack would be to m
The function mscc_miim_reset resets all the phys, but it is called for
each phy separetely. One consequence of this is that the boot time
is increased by 2 seconds.
The fix consists for calling the mscc_miim_reset function only once for
all phys.
Signed-off-by: Horatiu Vultur
---
drivers/net/ms
Hi Joe,
On Tue, 5 Mar 2019 12:05:42 -0600
Joe Hershberger joe.hershber...@ni.com wrote:
> Hi Andrejs,
>
> https://patchwork.ozlabs.org/patch/1050178/ was applied to
> http://git.denx.de/?p=u-boot/u-boot-net.git
This patch is marked as accepted on patchwork, but it is not in mainline
tree yet.
Hi Joe,
On Tue, 5 Mar 2019 12:05:38 -0600
Joe Hershberger joe.hershber...@ni.com wrote:
> Hi Andrejs,
>
> https://patchwork.ozlabs.org/patch/1050177/ was applied to
> http://git.denx.de/?p=u-boot/u-boot-net.git
This patch is not in mainline tree yet, but it is marked as accepted
on patchwork.
On Mon, 11 Mar 2019 07:33:25 PDT (-0700), bmeng...@gmail.com wrote:
On Thu, Feb 14, 2019 at 7:58 AM Kevin Hilman wrote:
Kevin Hilman writes:
> Hi Anup,
>
> Anup Patel writes:
>
>> This patchset adds SiFive Freedom Unleashed (FU540) support
>> to RISC-V U-Boot.
>>
>> The patches are based up
Hi Akashi,
On 11/09/18 12:29 PM, Akashi, Takahiro wrote:
> From: AKASHI Takahiro
>
> The current write implementation is quite simple: remove existing clusters
> and then allocating new ones and filling them with data. This, inevitably,
> enforces always writing from the beginning of a file.
>
When running mkimage with "-f auto", the loadable property
needs to be set in order to allow SPL FIT support to boot.
Signed-off-by: Abel Vesa
---
tools/fit_image.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/tools/fit_image.c b/tools/fit_image.c
index 4b62635..3b867e0 100644
--- a/tools
If FIT_IMAGE_TINY is enabled, spl_fit_image_get_os returns -ENOTSUPP.
In this case, we should default to IH_OS_U_BOOT not to IH_OS_INVALID.
Signed-off-by: Abel Vesa
---
Changes since v1:
* added the #if FIT_IMAGE_TINY as suggested by Mark Vasut
common/spl/spl_fit.c | 4
1 file changed, 4
Scrub memory content if ECC is enabled and it is not
from warm reset boot.
Enable icache and dcache before scrub memory
and use "DC ZVA" instruction to clear memory
to zeros. This instruction writes a cache line
at a time and it can prevent false ECC error
trigger if write cache line partially.
S
Stratix 10 SoC support 2 DRAM banks.
Signed-off-by: Ley Foon Tan
---
configs/socfpga_stratix10_defconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/configs/socfpga_stratix10_defconfig
b/configs/socfpga_stratix10_defconfig
index 9e6d582ee3..4a14ea039e 100644
--- a/config
Add ft_board_setup() function to setup memory banks before
boot to Linux.
Signed-off-by: Ley Foon Tan
---
board/altera/stratix10-socdk/socfpga.c | 25 +
1 file changed, 25 insertions(+)
diff --git a/board/altera/stratix10-socdk/socfpga.c
b/board/altera/stratix10-socdk/s
Enable OF_BOARD_SETUP for Stratix 10.
Signed-off-by: Ley Foon Tan
---
arch/arm/mach-socfpga/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig
index 5e87371f8c..990e46fe06 100644
--- a/arch/arm/mach-socfpga/Kconfig
+++ b/arch
Add helper function cpu_has_been_warmreset() to check
if CPU is from warm reset boot.
Signed-off-by: Ley Foon Tan
---
arch/arm/mach-socfpga/include/mach/reset_manager_s10.h | 3 +++
arch/arm/mach-socfpga/reset_manager_s10.c | 9 +
2 files changed, 12 insertions(+)
diff --gi
Add board_get_usable_ram_top() function. Limit maximum usable
ram top to 2GB.
Signed-off-by: Dalon Westergreen
Signed-off-by: Ley Foon Tan
---
board/altera/stratix10-socdk/socfpga.c | 12
1 file changed, 12 insertions(+)
diff --git a/board/altera/stratix10-socdk/socfpga.c
b/board
Setup bi_dram struct based on returned from setup_memory_banks().
Signed-off-by: Ley Foon Tan
---
arch/arm/mach-socfpga/board.c | 16 +++-
1 file changed, 15 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-socfpga/board.c b/arch/arm/mach-socfpga/board.c
index 7c8c05cc31..a0e
Includes Stratix10 SDRAM header file.
Signed-off-by: Ley Foon Tan
---
arch/arm/mach-socfpga/include/mach/sdram.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/mach-socfpga/include/mach/sdram.h
b/arch/arm/mach-socfpga/include/mach/sdram.h
index 79cb9e6064..2c1f55a87a 100644
---
Setup bank start address and size based on total SDRAM
memory size calculated from hardware. Update sdram_size_check()
to support multiple banks.
Stratix10 supports up to 2 memory banks.
Bank 0: Address 0, size 2GB
Bank 1: Address 0x1, size 124GB
Signed-off-by: Dalon Westergreen
Signed-
Move SDRAM size check to SDRAM driver. sdram_calculate_size()
is called in SDRAM initialization already, avoid calling
twice in size check function.
Signed-off-by: Ley Foon Tan
---
arch/arm/mach-socfpga/spl_s10.c | 11 ---
drivers/ddr/altera/sdram_s10.c | 15 +++
2 files cha
This patchset update Stratix 10 SDRAM driver to support:
- Multi-banks memory (Patch [1-8])
- Stratix 10 support up to 2 memory banks:
Bank 0: Address 0, size 2GB
Bank 1: Address 0x1, size 124GB
- Add warm reset boot checking function, to use in patch [10] (Patch[9])
- Add
Hi Tom,
The following changes since commit e8e3f2d2d48f97b2c79b698eccedce8f4f880993:
Merge branch '2019-03-08-master-imports' (2019-03-08 18:04:13 -0500)
are available in the git repository at:
git://git.denx.de/u-boot-samsung master
for you to fetch changes up to 0fd36730396a86e5513b4522
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