Re: [U-Boot] [PATCH v6 1/4] dm: spi: Convert Freescale ESPI driver to driver model

[Prabhakar Kushwaha]

> -Original Message-
> From: Jagan Teki 
> Sent: Friday, September 13, 2019 7:58 AM
> To: Prabhakar Kushwaha 
> Cc: Xiaowei Bao ; Priyanka Jain
> ; w...@denx.de; Shengzhou Liu
> ; Ruchika Gupta ;
> s...@chromium.org; Chuanhua Han ; Jagdish
> Gediya ; bmeng...@gmail.com; u-
> b...@lists.denx.de; York Sun ; Jiafei Pan
> 
> Subject: Re: [PATCH v6 1/4] dm: spi: Convert Freescale ESPI driver to driver
> model
> 
> On Mon, Sep 9, 2019 at 1:13 PM Prabhakar Kushwaha
>  wrote:
> >
> >
> > > -Original Message-
> > > From: Jagan Teki 
> > > Sent: Monday, September 9, 2019 11:37 AM
> > > To: Xiaowei Bao 
> > > Cc: Prabhakar Kushwaha ;
> w...@denx.de;
> > > Shengzhou Liu ; Ruchika Gupta
> > > ; s...@chromium.org; Chuanhua Han
> > > ; Jagdish Gediya ;
> > > bmeng...@gmail.com; u-boot@lists.denx.de; York Sun
> > > ; Jiafei Pan 
> > > Subject: Re: [PATCH v6 1/4] dm: spi: Convert Freescale ESPI driver
> > > to driver model
> > >
> > > On Mon, Sep 9, 2019 at 9:27 AM Xiaowei Bao 
> wrote:
> > > >
> > > >
> > > >
> > > > > -Original Message-
> > > > > From: Prabhakar Kushwaha
> > > > > Sent: 2019年8月26日 23:12
> > > > > To: Xiaowei Bao ; w...@denx.de; Shengzhou
> Liu
> > > > > ; Ruchika Gupta
> ;
> > > > > ja...@amarulasolutions.com; s...@chromium.org; Chuanhua Han
> > > > > ; Jagdish Gediya
> ;
> > > > > bmeng...@gmail.com; u-boot@lists.denx.de
> > > > > Cc: York Sun ; Xiaowei Bao
> > > > > 
> > > > > Subject: RE: [PATCH v6 1/4] dm: spi: Convert Freescale ESPI
> > > > > driver to driver model
> > > > >
> > > > > Dear Jagan,
> > > > >
> > > > > > -Original Message-
> > > > > > From: Xiaowei Bao 
> > > > > > Sent: Monday, August 26, 2019 2:55 PM
> > > > > > To: w...@denx.de; Shengzhou Liu ;
> Ruchika
> > > > > > Gupta ; ja...@amarulasolutions.com;
> > > > > s...@chromium.org;
> > > > > > Prabhakar Kushwaha ;
> Chuanhua Han
> > > > > > ; Jagdish Gediya
> > > > > > ; bmeng...@gmail.com;
> > > > > > u-boot@lists.denx.de
> > > > > > Cc: York Sun ; Xiaowei Bao
> > > > > > 
> > > > > > Subject: [PATCH v6 1/4] dm: spi: Convert Freescale ESPI driver
> > > > > > to driver model
> > > > > >
> > > > > > From: Chuanhua Han 
> > > > > >
> > > > > > Modify the Freescale ESPI driver to support the driver model.
> > > > > > Also resolved the following problems:
> > > > > >
> > > > > > = WARNING
> == This
> > > > > board does
> > > > > > not use CONFIG_DM_SPI. Please update the board before
> v2019.04
> > > > > > for no dm conversion and v2019.07 for partially dm converted
> drivers.
> > > > > > Failure to update can lead to driver/board removal See
> > > > > > doc/driver- model/MIGRATION.txt for more info.
> > > > > >
> 
> > > > > > = WARNING
> == This
> > > > > board does
> > > > > > not use CONFIG_DM_SPI_FLASH. Please update the board to use
> > > > > > CONFIG_SPI_FLASH before the v2019.07 release.
> > > > > > Failure to update by the deadline may result in board removal.
> > > > > > See doc/driver-model/MIGRATION.txt for more info.
> > > > > >
> 
> > > > > >
> > > > > > Signed-off-by: Chuanhua Han 
> > > > > > Signed-off-by: Xiaowei Bao 
> > > > > > ---
> > > > > > depends on:
> > > > > > https://patc
> > > > > > hwo
> > > > > >
> > > > >
> > >
> rk.ozlabs.org%2Fcover%2F1146494%2F&data=02%7C01%7Cprabhaka
> r.k
> > > > > us
> > > > > >
> > > > >
> hwaha%40nxp.com%7Ccc2424972d4e4d6835f908d72a08b877%7C686ea1
> d3
> > > > > bc2
> > > > > >
> > > > >
> b4c6fa92cd99c5c301635%7C0%7C0%7C637024089250212151&sdat
> a=
> > > > > 3Ki9
> > > > > >
> mrnn9YXWMR0vjoDmeE2eKBIn1RKlgnRC81SZQbU%3D&reserved=0
> > > > > > Changes in v6:
> > > > > > - Change #ifndef CONFIG_DM_SPI to #if
> !CONFIG_IS_ENABLED(DM_SPI).
> > > > > > Changes in v5:
> > > > > > - Modify the function spi_cs_activate to fsl_spi_cs_activate.
> > > > > > - Move cs to the parameter of the fsl_spi_cs_activate function.
> > > > > > Changes in v4:
> > > > > > - Update copyright information.
> > > > > > - Move the fsl_espi_platdata data structure to the
> > > > > > include/dm/platform_data/.
> > > > > > - Merge the contents of the fsl_espi_priv structure into
> > > > > > the fsl_spi_slave structure.
> > > > > > - Implement the fsl_espi_set_speed function.
> > > > > > - Implement the fsl_espi_set_mode function.
> > > > > > - Implement the espi_release_bus function.
> > > > > > - Remove unwanted fsl_espi_bind functions.
> > > > > > - Implement the fsl_espi_child_pre_probe function as needed.
> > > > > > - Use #if CONFIG_IS_ENABLED(OF_CONTROL) &&
> > > > > > !CONFIG_IS_ENABLED(OF_PLATDATA).
> > > > > > Changes in v3:
> > > > > > - Add a cover-letter for this patch set.
> > > > > > Changes in v2:
> > > > > > - The fsl_espi driver support both OF_CONTROL and PLATDATA.
> > > > > >
> > > > > >  drivers/spi/fsl_espi.c  | 445

Re: [U-Boot] OMAP watchdog timer reset on BBB

[Suniel Mahesh]

Hi Sam,

On 12/09/19 22:03, Sam Protsenko wrote:
> Hi Stefan,
> 
> On Thu, Sep 12, 2019 at 5:38 PM Stefan Roese  wrote:
>>
>> Hi Sam,
>>
>> On 12.09.19 15:45, Sam Protsenko wrote:
>>> Hi Suniel,
>>>
>>> After transition to DM WDT, watchdog timer on BeagleBone Black resets
>>> the board after 1 minute or so. I'm using this defconfig: [1]. After
>>> disabling CONFIG_WDT and CONFIG_WATCHDOG options the board doesn't
>>> reset. I guess it might be happening on other boards using
>>> CONFIG_WDT_OMAP3 as well. The issue can be reproduced by stopping in
>>> U-Boot shell (=>) and waiting for 1 minute.
>>>
>>> Do you know by chance why it might be happening, or maybe some fix
>>> already exists?
>>>
>>> Thanks!
>>>
>>> [1] https://pastebin.ubuntu.com/p/Zz5bY6cYXS/
>>
>> So you have enabled the watchdog and should see something like this
>> upon bootup:
>>
>> WDT:   Started without servicing (60s timeout)
>>
>> Is this correct? Then you need to enable the U-Boot internal WDT
>> servicing by enabling CONFIG_WATCHDOG as well, as this will
>> result in the internal U-Boot servicing of the watchdog. Then
>> you should see this upon bootup and no reset will appear in
>> U-Boot:
>>
>> WDT:   Started with servicing (60s timeout)
>>
> 
> I'm seeing this ("with servicing") line, and CONFIG_WATCHDOG is
> already enabled in am335x_evm_defconfig. So I think it's an issue,
> which *probably* appeared when watchdog drivers were converted to
> Driver Model (this defconfig is using CONFIG_WDT + CONFIG_WDT_OMAP3
> options).

No, I didn't see any target reset issues because of DM WDT.
It was well tested when it was converted to DM(both on hardware and travis). 
Yes the config uses both CONFIG_WDT + CONFIG_WDT_OMAP3.

Any clues what can be wrong?

compiled and ran latest u-boot (am335x_evm_defconfig) as it is on the 
target(BBB). 
Checked three boot modes MMC, SD and serial, didn't see any issues.
https://paste.ubuntu.com/p/tjcPhv4FMQ/ (sd card boot)
https://pastebin.ubuntu.com/p/X4tkp4ngMK/ (serial boot)

I am suspecting something else might be causing the issue.
Hope this helps

Thanks
Suniel
> 
>> Does this help?
>>
>> Thanks,
>> Stefan

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[U-Boot] rk3288: HDMI out causing boot hang

[Jagan Teki]

Hi All,

Did anyone tried HDMI out on rk3288? Enabling HDMI out causing boot
hang, during stdout initialization from console.c

Enabled below configs and stdin/out/err environment to probe the
DM_VIDEO, seems like the console initialization hangs during stdout
initialization.

Log:
Model: Tinker-RK3288
DRAM:  2 GiB
MMC:   dwmmc@ff0c: 1
Loading Environment from MMC... OK
1. console_init_r
2. console_init_r
2.1 console_init_r
rk3288_vop_probe
vop@ff93: probing regulator 'vcc18_lcd'
vop@ff93: probing regulator 'VCC18_LCD'
vop@ff93: probing regulator 'vdd10_lcd_pwren_h'
vop@ff93: probing regulator 'vdd10_lcd'
vop@ff93: probing regulator 'VDD10_LCD'
vop@ff93: probing regulator 'vcc33_lcd'
rk_display_init(vop@ff93, 2139095040, endpoint@0)
vop_id=0
remote vop_id=0
rk_display_init(vop@ff93): no UCLASS_DISPLAY for remote-endpoint
Device failed: ret=-22
rk_display_init(vop@ff93, 2139095040, endpoint@1)
vop_id=1
remote vop_id=0
Found device 'hdmi@ff98', disp_uc_priv=7cf71710
rk3288_hdmi_probe
hdmi@ff98: probing regulator 'vcc50_hdmi'
rk_hdmi_probe: 1
rk_hdmi_probe: 2
rk_hdmi_probe: done!
fb=7f80, size=2560 1440
rk3288_vop_probe done!

Changes:
+CONFIG_DM_VIDEO=y
+CONFIG_DISPLAY=y
+CONFIG_VIDEO_ROCKCHIP=y
+CONFIG_DISPLAY_ROCKCHIP_HDMI=y
+CONFIG_CONSOLE_SCROLL_LINES=10

+#define ROCKCHIP_DEVICE_SETTINGS \
+   "stdout=serial,vidconsole\0" \
+   "stderr=serial,vidconsole\0"

Any inputs?

Jagan.
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Re: [U-Boot] Tinker-rk3288 SPL broken with MMC timeout

[Jagan Teki]

On Thu, Sep 12, 2019 at 8:25 PM Tom Rini  wrote:
>
> On Thu, Sep 12, 2019 at 08:55:24AM +0530, Jagan Teki wrote:
>
> > I have seen this even on v2019.07 release, and the only release that
> > it got working with on v2019.01 (SPL, BROM_RETURN)
> >
> > Any idea? here is the log dump.
> >
> > U-Boot TPL 2019.10-rc3-00297-g5ba8b12543 (Sep 12 2019 - 08:50:36)
> > Trying to boot from BOOTROM
> > Returning to boot ROM...
> >
> > U-Boot SPL 2019.10-rc3-00297-g5ba8b12543 (Sep 12 2019 - 08:50:36 +0530)
> > Trying to boot from MMC1
> > spl: mmc init failed with error: -110
> > SPL: failed to boot from all boot devices
> > ### ERROR ### Please RESET the board ###
>
> Time to run 'git bisect' since you know when it worked last at least?

Look hard to bisect, few of commits in between seems SPL size
blow-out, doesn't boot etc. May be verify with respect boards might
help.
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[U-Boot] [PATCH] doc: driver-model: Update SPI migration status

[Jagan Teki]

Update SPI drivers, driver model conversion status for
v2019.10 release.

Signed-off-by: Jagan Teki 
---
 doc/driver-model/migration.rst | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/doc/driver-model/migration.rst b/doc/driver-model/migration.rst
index 75b85235ef..fd499fb74a 100644
--- a/doc/driver-model/migration.rst
+++ b/doc/driver-model/migration.rst
@@ -58,10 +58,8 @@ to move the migration with in the deadline.
 
 No dm conversion yet::
 
-   drivers/spi/cf_spi.c
drivers/spi/fsl_espi.c
drivers/spi/lpc32xx_ssp.c
-   drivers/spi/mxs_spi.c
drivers/spi/sh_spi.c
drivers/spi/soft_spi_legacy.c
 
@@ -74,6 +72,7 @@ Partially converted::
drivers/spi/fsl_dspi.c
drivers/spi/kirkwood_spi.c
drivers/spi/mxc_spi.c
+   drivers/spi/mxs_spi.c
drivers/spi/omap3_spi.c
drivers/spi/sh_qspi.c
 
-- 
2.18.0.321.gffc6fa0e3

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Re: [U-Boot] [PATCH v6 1/4] dm: spi: Convert Freescale ESPI driver to driver model

[Jagan Teki]

On Mon, Sep 9, 2019 at 1:13 PM Prabhakar Kushwaha
 wrote:
>
>
> > -Original Message-
> > From: Jagan Teki 
> > Sent: Monday, September 9, 2019 11:37 AM
> > To: Xiaowei Bao 
> > Cc: Prabhakar Kushwaha ; w...@denx.de;
> > Shengzhou Liu ; Ruchika Gupta
> > ; s...@chromium.org; Chuanhua Han
> > ; Jagdish Gediya ;
> > bmeng...@gmail.com; u-boot@lists.denx.de; York Sun ;
> > Jiafei Pan 
> > Subject: Re: [PATCH v6 1/4] dm: spi: Convert Freescale ESPI driver to driver
> > model
> >
> > On Mon, Sep 9, 2019 at 9:27 AM Xiaowei Bao  wrote:
> > >
> > >
> > >
> > > > -Original Message-
> > > > From: Prabhakar Kushwaha
> > > > Sent: 2019年8月26日 23:12
> > > > To: Xiaowei Bao ; w...@denx.de; Shengzhou Liu
> > > > ; Ruchika Gupta ;
> > > > ja...@amarulasolutions.com; s...@chromium.org; Chuanhua Han
> > > > ; Jagdish Gediya ;
> > > > bmeng...@gmail.com; u-boot@lists.denx.de
> > > > Cc: York Sun ; Xiaowei Bao 
> > > > Subject: RE: [PATCH v6 1/4] dm: spi: Convert Freescale ESPI driver
> > > > to driver model
> > > >
> > > > Dear Jagan,
> > > >
> > > > > -Original Message-
> > > > > From: Xiaowei Bao 
> > > > > Sent: Monday, August 26, 2019 2:55 PM
> > > > > To: w...@denx.de; Shengzhou Liu ; Ruchika
> > > > > Gupta ; ja...@amarulasolutions.com;
> > > > s...@chromium.org;
> > > > > Prabhakar Kushwaha ; Chuanhua Han
> > > > > ; Jagdish Gediya ;
> > > > > bmeng...@gmail.com; u-boot@lists.denx.de
> > > > > Cc: York Sun ; Xiaowei Bao 
> > > > > Subject: [PATCH v6 1/4] dm: spi: Convert Freescale ESPI driver to
> > > > > driver model
> > > > >
> > > > > From: Chuanhua Han 
> > > > >
> > > > > Modify the Freescale ESPI driver to support the driver model.
> > > > > Also resolved the following problems:
> > > > >
> > > > > = WARNING == This
> > > > board does
> > > > > not use CONFIG_DM_SPI. Please update the board before v2019.04 for
> > > > > no dm conversion and v2019.07 for partially dm converted drivers.
> > > > > Failure to update can lead to driver/board removal See doc/driver-
> > > > > model/MIGRATION.txt for more info.
> > > > > 
> > > > > = WARNING == This
> > > > board does
> > > > > not use CONFIG_DM_SPI_FLASH. Please update the board to use
> > > > > CONFIG_SPI_FLASH before the v2019.07 release.
> > > > > Failure to update by the deadline may result in board removal.
> > > > > See doc/driver-model/MIGRATION.txt for more info.
> > > > > 
> > > > >
> > > > > Signed-off-by: Chuanhua Han 
> > > > > Signed-off-by: Xiaowei Bao 
> > > > > ---
> > > > > depends on:
> > > > > https://patc
> > > > > hwo
> > > > >
> > > >
> > rk.ozlabs.org%2Fcover%2F1146494%2F&data=02%7C01%7Cprabhakar.k
> > > > us
> > > > >
> > > > hwaha%40nxp.com%7Ccc2424972d4e4d6835f908d72a08b877%7C686ea1d3
> > > > bc2
> > > > >
> > > > b4c6fa92cd99c5c301635%7C0%7C0%7C637024089250212151&sdata=
> > > > 3Ki9
> > > > > mrnn9YXWMR0vjoDmeE2eKBIn1RKlgnRC81SZQbU%3D&reserved=0
> > > > > Changes in v6:
> > > > > - Change #ifndef CONFIG_DM_SPI to #if !CONFIG_IS_ENABLED(DM_SPI).
> > > > > Changes in v5:
> > > > > - Modify the function spi_cs_activate to fsl_spi_cs_activate.
> > > > > - Move cs to the parameter of the fsl_spi_cs_activate function.
> > > > > Changes in v4:
> > > > > - Update copyright information.
> > > > > - Move the fsl_espi_platdata data structure to the
> > > > > include/dm/platform_data/.
> > > > > - Merge the contents of the fsl_espi_priv structure into the
> > > > > fsl_spi_slave structure.
> > > > > - Implement the fsl_espi_set_speed function.
> > > > > - Implement the fsl_espi_set_mode function.
> > > > > - Implement the espi_release_bus function.
> > > > > - Remove unwanted fsl_espi_bind functions.
> > > > > - Implement the fsl_espi_child_pre_probe function as needed.
> > > > > - Use #if CONFIG_IS_ENABLED(OF_CONTROL) &&
> > > > > !CONFIG_IS_ENABLED(OF_PLATDATA).
> > > > > Changes in v3:
> > > > > - Add a cover-letter for this patch set.
> > > > > Changes in v2:
> > > > > - The fsl_espi driver support both OF_CONTROL and PLATDATA.
> > > > >
> > > > >  drivers/spi/fsl_espi.c  | 445
> > > > ++--
> > > > >  drivers/spi/fsl_espi.c  | 445
> > > > ++--
> > > > >  include/dm/platform_data/fsl_espi.h |  16 ++
> > > > >  2 files changed, 337 insertions(+), 124 deletions(-)  create mode
> > > > > 100644
> > > >
> > > > Please review this patch-set and provide your comments.
> > > >
> > > > Once reviewed, I will send pull request via mpc85xx tree
> > >
> > > Hi Prabhakar and Jagan,
> > >
> > > What is the progress, if there are any comments, please let me know,
> > > if no comments, please help to merge it, thanks a lot.
> >
> > I marked my r-b tag, and Prabhakar would take this via his tree (as he
> > mentioned)
>
> Th

Re: [U-Boot] [PATCH v2 1/2] MTD: SPI: add missing SST26* flash IC protection ops

[Jagan Teki]

On Tue, Sep 10, 2019 at 1:03 AM Eugeniy Paltsev
 wrote:
>
> Commit c4e8862308d4 (mtd: spi: Switch to new SPI NOR framework)
> performs switch from previous 'spi_flash' infrastructure without
> proper testing/investigations which results in a regressions for
> SST26 flash series.
>
> Add missing SST26* flash IC protection ops which were introduced
> previously by
> Commit 3d4fed87a5fa (mtd: sf: Add support of sst26wf* flash ICs
> protection ops)
>
> Signed-off-by: Eugeniy Paltsev 
> ---

Applied both to u-boot-spi/master
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Re: [U-Boot] [PATCH v2 2/2] efi_loader: device_path: show a host device in understandable form

[AKASHI Takahiro]

On Thu, Sep 12, 2019 at 11:50:04AM +0200, Heinrich Schuchardt wrote:
> On 9/12/19 11:07 AM, AKASHI Takahiro wrote:
> > On Thu, Sep 12, 2019 at 09:59:01AM +0200, Heinrich Schuchardt wrote:
> >> On 9/12/19 6:52 AM, AKASHI Takahiro wrote:
> >>> It would be better to give a user-friendly text to a host device
> >>> on sandbox instead of just dumping its guid.
> >>>
> >>> => host bind 0 /opt/disk/uboot_sandbox_fat.img
> >>> => efi devices
> >>> Device   Device Path
> >>>  
> >>> 15c1f3a0 /VenHw(e61d73b9-a384-4acc-aeab-82e828f3628b)
> >>> 15c20f00 /VenHw(e61d73b9-a384-4acc-aeab-82e828f3628b)/Hostdev(0)
> >>>
> >>> Signed-off-by: AKASHI Takahiro 
> >>> ---
> >>>  lib/efi_loader/efi_device_path_to_text.c | 5 +
> >>>  1 file changed, 5 insertions(+)
> >>>
> >>> diff --git a/lib/efi_loader/efi_device_path_to_text.c 
> >>> b/lib/efi_loader/efi_device_path_to_text.c
> >>> index 96fd08971b73..40a06b70e08a 100644
> >>> --- a/lib/efi_loader/efi_device_path_to_text.c
> >>> +++ b/lib/efi_loader/efi_device_path_to_text.c
> >>> @@ -62,6 +62,11 @@ static char *dp_hardware(char *s, struct 
> >>> efi_device_path *dp)
> >>>   case DEVICE_PATH_SUB_TYPE_VENDOR: {
> >>>   struct efi_device_path_vendor *vdp =
> >>>   (struct efi_device_path_vendor *)dp;
> >>> +#ifdef CONFIG_SANDBOX
> >>> + if (!guidcmp(&vdp->guid, &efi_guid_host_dev))
> >>> + s += sprintf(s, "Hostdev(%d)", vdp->vendor_data[0]);
> >>
> >> This does not conform to the UEFI spec.
> >
> > Okay, so I'd like to change the format again.
> > Instead of 'Vendor' subtype, use 'Controller' subtype.
> > This way, the example above can be seen as:
> >
> > 15c1f3a0 /VenHw(e61d73b9-a384-4acc-aeab-82e828f3628b)
> > 15c20f00 /VenHw(e61d73b9-a384-4acc-aeab-82e828f3628b)/Ctrl(0)
> >
> > Looks nice, doesn't it?
> 
> A controller is a handle that bears the EFI_DRIVER_BINDING_PROTOCOL.

To my best knowledge, I don't find such a definition in the specification.

> >> The purpose of the sandbox is testing. What would make sense to me is
> >> checking in a Python test that The VenHw() output contains the GUID and
> >> the drive number.

For *that* reason, we don't have to stick to strict *standardized*
form for Sandbox host device. It would never cause any problems
as such a text would never come up on any other platforms.

-Takahiro Akashi


> >>
> >> Best regards
> >>
> >> Heinrich
> >>
> >>> + else
> >>> +#endif
> >>>   s += sprintf(s, "VenHw(%pUl)", &vdp->guid);
> >>>   break;
> >>>   }
> >>>
> >>
> >
> 
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[U-Boot] [PATCH] Revert "env: net: Move eth_parse_enetaddr() to net.c/h"

[megous]

From: Ondrej Jirman 

The reverted patch causes linking error with disabled CONFIG_NET:

  cmd/built-in.o: In function `eth_env_get_enetaddr':
  u-boot-v2019.10/cmd/nvedit.c:363: undefined reference to `eth_parse_enetaddr'

Function setup_environment() in board/sunxi/board.c calls
eth_env_set_enetaddr() to setup stable mac address for ethernet interfaces.

This needs to be implemented and succeed even if net is disabled in u-boot,
as it ensures Linux will not generate random MAC addresses, and picks the
ones provided by u-boot via DT. See fdt_fixup_ethernet().

This feature is independent of the whole network stack and network drivers
in u-boot.

This revert fixes the linking error.

Signed-off-by: Ondrej Jirman 
---
 cmd/nvedit.c   | 12 
 include/env_internal.h | 11 +++
 include/net.h  | 11 ---
 net/net.c  | 12 
 4 files changed, 23 insertions(+), 23 deletions(-)

diff --git a/cmd/nvedit.c b/cmd/nvedit.c
index 1cb0bc1460..399f6d6ce1 100644
--- a/cmd/nvedit.c
+++ b/cmd/nvedit.c
@@ -358,6 +358,18 @@ ulong env_get_hex(const char *varname, ulong default_val)
return value;
 }
 
+void eth_parse_enetaddr(const char *addr, uint8_t *enetaddr)
+{
+   char *end;
+   int i;
+
+   for (i = 0; i < 6; ++i) {
+   enetaddr[i] = addr ? simple_strtoul(addr, &end, 16) : 0;
+   if (addr)
+   addr = (*end) ? end + 1 : end;
+   }
+}
+
 int eth_env_get_enetaddr(const char *name, uint8_t *enetaddr)
 {
eth_parse_enetaddr(env_get(name), enetaddr);
diff --git a/include/env_internal.h b/include/env_internal.h
index b1ddcb5adf..27eb5bd1e7 100644
--- a/include/env_internal.h
+++ b/include/env_internal.h
@@ -273,6 +273,17 @@ struct env_driver {
 
 extern struct hsearch_data env_htab;
 
+/**
+ * eth_parse_enetaddr() - Parse a MAC address
+ *
+ * Convert a string MAC address
+ *
+ * @addr: MAC address in aa:bb:cc:dd:ee:ff format, where each part is a 2-digit
+ * hex value
+ * @enetaddr: Place to put MAC address (6 bytes)
+ */
+void eth_parse_enetaddr(const char *addr, uint8_t *enetaddr);
+
 #endif /* DO_DEPS_ONLY */
 
 #endif /* _ENV_INTERNAL_H_ */
diff --git a/include/net.h b/include/net.h
index 75a16e4c8f..e208cc43a0 100644
--- a/include/net.h
+++ b/include/net.h
@@ -875,15 +875,4 @@ int update_tftp(ulong addr, char *interface, char 
*devstring);
 
 /**/
 
-/**
- * eth_parse_enetaddr() - Parse a MAC address
- *
- * Convert a string MAC address
- *
- * @addr: MAC address in aa:bb:cc:dd:ee:ff format, where each part is a 2-digit
- * hex value
- * @enetaddr: Place to put MAC address (6 bytes)
- */
-void eth_parse_enetaddr(const char *addr, uint8_t *enetaddr);
-
 #endif /* __NET_H__ */
diff --git a/net/net.c b/net/net.c
index ded86e7456..4d2b7ead3b 100644
--- a/net/net.c
+++ b/net/net.c
@@ -1628,15 +1628,3 @@ ushort env_get_vlan(char *var)
 {
return string_to_vlan(env_get(var));
 }
-
-void eth_parse_enetaddr(const char *addr, uint8_t *enetaddr)
-{
-   char *end;
-   int i;
-
-   for (i = 0; i < 6; ++i) {
-   enetaddr[i] = addr ? simple_strtoul(addr, &end, 16) : 0;
-   if (addr)
-   addr = (*end) ? end + 1 : end;
-   }
-}
-- 
2.23.0

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Re: [U-Boot] [PATCH v2 19/40] env: net: Move eth_parse_enetaddr() to net.c/h

[Ondřej Jirman]

On Thu, Sep 12, 2019 at 01:28:10PM -0600, Simon Glass wrote:
> Hi,
> 
> On Thu, 12 Sep 2019 at 12:28, Ondřej Jirman  wrote:
> >
> > Hi,
> >
> > On Thu, Sep 12, 2019 at 12:22:15PM -0600, Simon Glass wrote:
> > > Hi,
> > >
> > > On Thu, 12 Sep 2019 at 10:59, Ondřej Jirman  wrote:
> > > >
> > > > Hello,
> > > >
> > > > On Thu, Aug 01, 2019 at 09:46:54AM -0600, Simon Glass wrote:
> > > > > This function fits better with the network subsystem, so move it.
> > > >
> > > > Unfortunately, this breaks builds without CONFIG_NET. Reverting it
> > > > fixes the issue.
> > > >
> > > >   LD  u-boot
> > > > cmd/built-in.o: In function `eth_env_get_enetaddr':
> > > > u-boot-v2019.10/cmd/nvedit.c:363: undefined reference to 
> > > > `eth_parse_enetaddr'
> > > > make[1]: *** [u-boot-v2019.10/Makefile:1594: u-boot] Error 1
> > > > make[1]: Leaving directory 'builds/.tmp/u-pc-5.4'
> > > > make: *** [Makefile:148: sub-make] Error 2
> > > >
> > >
> > > Which board is this please?
> >
> > It's orangepi_pc_defconfig with some menuconfig changes to disable 
> > CONFIG_NET.
> >
> > The issue is that by moving eth_parse_enetaddr to net/ if net is disabled, 
> > this
> > function will not be available to nvedit.c.
> >
> > The board doesn't really matter.
> 
> The offending call is in setup_environment() in board/sunxi/board.c so
> I think the board does matter. There might be something else I am
> missing but I cannot see it at present.
> 
> Would you like to send a patch?

I'd like to send a patch to revert this change and move eth_parse_enetaddr back.

The call eth_env_set_enetaddr() is correct and should succeed even if net
is disabled in u-boot. It determines the stable MAC address to use for ethernet
interfaces described in DT for Linux to use.

See fdt_fixup_ethernet() that does that.

That feature is independent of the whole network stack and network drivers
in u-boot.

regards,
o.

> Regards,
> Simon
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Re: [U-Boot] [PATCH] arm64: zynqmp: Define default SPL_TEXT_BASE address in Kconfig

[Luca Ceresoli]

Hi Michal,

On 11/09/19 07:54, Michal Simek wrote:
> Define default address via Kconfig. There is no need to change this address
> for most of the boards but it is also possible. This one line save a lot of
> lines in defconfigs that's why make sense to do it.
> 
> The similar change has been done by commit 9340d8fe8beb
> ("sunxi: move CONFIG_SPL_TEXT_BASE from *_defconfig to Kconfig")
> 
> Signed-off-by: Michal Simek 

Reviewed-by: Luca Ceresoli 

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Re: [U-Boot] Please pull pico-imx7d-2019.10-1 from https://github.com/OSSystems/u-boot

[Joris Offouga]

Hello,

Just put CONFIG_DM_VIDEO in the defconfig

Best regards,

Joris Offouga

Le 12/09/2019 à 23:18, Otavio Salvador a écrit :

Hello,

On Thu, Sep 12, 2019 at 5:20 PM Joris Offouga  wrote:

Can you test and apply my series in your pull request ?

% grep CONFIG_VIDEO configs/pico-*7d*

   :(
configs/pico-dwarf-imx7d_defconfig:CONFIG_VIDEO=y
configs/pico-nymph-imx7d_defconfig:CONFIG_VIDEO=y

Those also need update. Please check and let me know when done so I
make a new PR.




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Re: [U-Boot] Please pull pico-imx7d-2019.10-1 from https://github.com/OSSystems/u-boot

[Otavio Salvador]

Hello,

On Thu, Sep 12, 2019 at 5:20 PM Joris Offouga  wrote:
> Can you test and apply my series in your pull request ?

% grep CONFIG_VIDEO configs/pico-*7d*

  :(
configs/pico-dwarf-imx7d_defconfig:CONFIG_VIDEO=y
configs/pico-nymph-imx7d_defconfig:CONFIG_VIDEO=y

Those also need update. Please check and let me know when done so I
make a new PR.



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Re: [U-Boot] [PATCH 1/1] Dockerfile: build GRUB UEFI target for RISC-V 64bit

[Tom Rini]

On Thu, Sep 12, 2019 at 10:31:39PM +0200, Heinrich Schuchardt wrote:
> On 8/4/19 3:31 PM, Bin Meng wrote:
> >On Sun, Aug 4, 2019 at 8:10 PM Heinrich Schuchardt  
> >wrote:
> >>
> >>Build GRUB UEFI target grubriscv64.efi. It is needed for running
> >>test_efi_grub_net().
> >>
> >>Signed-off-by: Heinrich Schuchardt 
> >>---
> >>This patch applies to
> >>https://gitlab.denx.de/u-boot/gitlab-ci-runner
> >>---
> >>  Dockerfile | 14 ++
> >>  1 file changed, 14 insertions(+)
> >>
> >
> >Reviewed-by: Bin Meng 
> >___
> >U-Boot mailing list
> >U-Boot@lists.denx.de
> >https://lists.denx.de/listinfo/u-boot
> >
> Hello Tom,
> 
> the patch did not yet make it into
> 
> https://gitlab.denx.de/u-boot/gitlab-ci-runner.git
> 
> Anything I should do?

Sorry, I assume this is blocking being able to then enable tests on the
platform?  If so, I'll go spin things around shortly and in the future
feel free to poke me if I don't turn them around in a day or two.

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Re: [U-Boot] [U-Boot-DM] Sample RAM disk image for powerpc based boards

[Simon Glass]

+Moving to normal mailing list as the -dm one isn't really used.

+Marek Vasut do you think we could delete it or disable subscriptions?


On Thu, 12 Sep 2019 at 07:22, Matt Sykes  wrote:
>
> I am new to this and having a play to see how it all works, and have a board 
> up and running (UBoot, LInux, Device Tree) with the uRamdisk image off the 
> 4.2 ELDK.
>
> I was trying out the 5.5.2 powerpc base image 
> ftp://ftp.denx.de/pub/eldk/5.5.3/targets/powerpc/core-image-base-generic-powerpc.tar.gz
>  but it reports errors when running (invalid nodes).
>
> Is this not a RAM disk image, or am I missing something?
>
> If not are there any other PPC ram disk images I can play with?
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Re: [U-Boot] [NXP-IMX] please pull nxp-imx-9-11-2019

[Stefano Babic]

Hi Peng,

On 11/09/19 14:28, Peng Fan wrote:
> Hi Stefano,
> 
> Please pull nxp-imx-9-11-2019. This pull request was based on imx/master.
> 
> But I also created a new branch based on origin/master, imx-master-9-11-2019 
> and
> CI is based the branch: https://travis-ci.org/MrVan/u-boot/builds/583504418
> 
> 
> Fix usb start issue for i.MX6Q-SDB DM
> Move U-Boot specific dts change to u-boot.dtsi for i.MX6QDL
> Fix U-Boot RAW sector for i.MX8QXP-MEK
> i.MX8 Container support
> misc i.MX8QM bug fix and update.
> 
> 

Thanks for help, I pull it.

Regards,
Stefano

> Thanks,
> Peng.
> 
> The following changes since commit 333027284f9a591747ec469ede2b13b3fb8df65a:
> 
>   Merge branch 'nxp-imx-8-13' of https://github.com/MrVan/u-boot (2019-08-18 
> 12:10:11 +0200)
> 
> are available in the Git repository at:
> 
>   https://github.com/MrVan/u-boot.git nxp-imx-9-11-2019
> 
> for you to fetch changes up to cacc604a32591b682b1b6440c6f48f7fcdef3f8b:
> 
>   imx8: cpu: fix mac fuse word for i.MX8QM (2019-09-11 20:32:07 +0800)
> 
> 
> Peng Fan (21):
>   imx: mx6sabresd: fix usb start when DM enabled
>   imx: imx6qdl: dtsi: move U-Boot specific change to u-boot.dtsi
>   imx: imx8qxp_mek: fix CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR
>   imx8: support parsing i.MX8 Container file
>   spl: mmc: support loading i.MX container format file
>   imx: add container target
>   imx8qxp_mek: switch to use container image
>   imx8qm_mek: switch to use container image
>   doc: imx: mkimage: introduce i.MX8 image format
>   imx: sys_proto: add is_imx8qm helper
>   imx8qm: power up SMMU
>   imx8qm: correct fdt_file
>   imx8: disable node when the resource is not owned
>   configs: imx8qm/qxp_mek: enable CONFIG_OF_SYSTEM_SETUP
>   imx: scu_api: add sc_rm_set_master_sid
>   imx8: fdt: configure sid for masters
>   imx8: save args passed from ATF
>   imx8: fdt: add optee node
>   imx: scu_api: add sc_pm_is_partition_started
>   imx8: move i.MX8 cpu desc code to drivers/cpu/imx8_cpu.c
>   imx8: cpu: fix mac fuse word for i.MX8QM
> 
> Ye Li (1):
>   imx8: Probe the SCU driver by using uclass function
> 
>  Makefile|   8 
>  arch/arm/dts/imx6qdl-u-boot.dtsi|   6 +++
>  arch/arm/dts/imx6qdl.dtsi   |   3 --
>  arch/arm/include/asm/arch-imx8/image.h  |  56 
> 
>  arch/arm/include/asm/arch-imx8/sci/rpc.h|   5 ++-
>  arch/arm/include/asm/arch-imx8/sci/sci.h|   2 +
>  arch/arm/include/asm/arch-imx8/sys_proto.h  |   1 +
>  arch/arm/include/asm/mach-imx/sys_proto.h   |   1 +
>  arch/arm/mach-imx/Makefile  |  14 +-
>  arch/arm/mach-imx/imx8/Kconfig  |  13 ++
>  arch/arm/mach-imx/imx8/Makefile |   7 ++-
>  arch/arm/mach-imx/imx8/cpu.c| 189 
> ++--
>  arch/arm/mach-imx/imx8/fdt.c| 292 
> 
>  arch/arm/mach-imx/imx8/lowlevel_init.S  |  36 
>  arch/arm/mach-imx/imx8/parse-container.c| 120 
> +++
>  board/freescale/imx8qm_mek/README   |   4 +-
>  board/freescale/imx8qm_mek/uboot-container.cfg  |  13 ++
>  board/freescale/imx8qxp_mek/README  |   4 +-
>  board/freescale/imx8qxp_mek/uboot-container.cfg |  13 ++
>  common/spl/spl_mmc.c|  10 +
>  configs/imx8qm_mek_defconfig|   9 ++--
>  configs/imx8qxp_mek_defconfig   |   6 +--
>  configs/mx6sabresd_defconfig|   1 +
>  doc/imx/mkimage/imx8image.txt   |  45 +++
>  drivers/cpu/Makefile|   1 +
>  drivers/cpu/imx8_cpu.c  | 182 
> +
>  drivers/misc/imx8/scu_api.c |  49 +
>  include/configs/imx8qm_mek.h|   2 +-
>  include/configs/imx8qxp_mek.h   |   2 +-
>  include/spl.h   |  12 ++
>  30 files changed, 910 insertions(+), 196 deletions(-)
>  create mode 100644 arch/arm/include/asm/arch-imx8/image.h
>  create mode 100644 arch/arm/mach-imx/imx8/fdt.c
>  create mode 100644 arch/arm/mach-imx/imx8/lowlevel_init.S
>  create mode 100644 arch/arm/mach-imx/imx8/parse-container.c
>  create mode 100644 board/freescale/imx8qm_mek/uboot-container.cfg
>  create mode 100644 board/fre

Re: [U-Boot] [PATCH 1/1] Dockerfile: build GRUB UEFI target for RISC-V 64bit

[Heinrich Schuchardt]

On 8/4/19 3:31 PM, Bin Meng wrote:

On Sun, Aug 4, 2019 at 8:10 PM Heinrich Schuchardt  wrote:


Build GRUB UEFI target grubriscv64.efi. It is needed for running
test_efi_grub_net().

Signed-off-by: Heinrich Schuchardt 
---
This patch applies to
https://gitlab.denx.de/u-boot/gitlab-ci-runner
---
  Dockerfile | 14 ++
  1 file changed, 14 insertions(+)



Reviewed-by: Bin Meng 
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Hello Tom,

the patch did not yet make it into

https://gitlab.denx.de/u-boot/gitlab-ci-runner.git

Anything I should do?

Best regards

Heinrich
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Re: [U-Boot] Please pull pico-imx7d-2019.10-1 from https://github.com/OSSystems/u-boot

[Joris Offouga]

Hi Otavio,

Can you test and apply my series in your pull request ?

https://patchwork.ozlabs.org/patch/1155917/

https://patchwork.ozlabs.org/patch/1155916/

https://patchwork.ozlabs.org/patch/1155914/

Best Regards,

Joris Offouga



Le jeu. 12 sept. 2019 à 21:38, Otavio Salvador 
> a écrit :


   Hello Stefano,

   The same patches I sent before are also online. See:

   The following changes since commit
   333027284f9a591747ec469ede2b13b3fb8df65a:

  Merge branch 'nxp-imx-8-13' of https://github.com/MrVan/u-boot
   (2019-08-18 12:10:11 +0200)

   are available in the Git repository at:

   https://github.com/OSSystems/u-boot pico-imx7d-2019.10-1

   for you to fetch changes up to 697cc0eaa7104950a52425786c2c830879b044d4:

  logos: Add the TechNexion's logo (2019-09-12 16:35:59 -0300)

   
   Fabio Berton (1):
      pico-imx7d: Sync pico-hobbit-imx7d_defconfig

   Fabio Estevam (3):
      pico-imx7d: Add instructions for booting in Falcon mode
      pico-imx7d: Provide a way to escape the Falcon mode
      logos: Add the TechNexion's logo

   Otavio Salvador (2):
      pico-imx7d: Add DWARF baseboard support
      pico-imx7d: Add NYMPH baseboard support

 board/technexion/pico-imx7d/README  |  91
   
 board/technexion/pico-imx7d/spl.c   |   4 ++
 configs/pico-dwarf-imx7d_defconfig  |  68 +++
 configs/pico-hobbit-imx7d_defconfig |   2 +-
 configs/pico-nymph-imx7d_defconfig  |  68 +++
 include/configs/pico-imx7d.h        |   6 ++-
 tools/logos/technexion.bmp          | Bin 0 -> 22390 bytes
 7 files changed, 237 insertions(+), 2 deletions(-)
 create mode 100644 configs/pico-dwarf-imx7d_defconfig
 create mode 100644 configs/pico-nymph-imx7d_defconfig
 create mode 100644 tools/logos/technexion.bmp


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[U-Boot] [PATCH 1/1] drivers: mmc: Add sdhci driver for Broadcom iProc platform

[Arun Parameswaran]

Add SDHCI driver for iProc family of Broadcom devices.

Signed-off-by: Corneliu Doban 
Signed-off-by: Pramod Kumar 
Signed-off-by: Pavithra Ravi 
Signed-off-by: Bharat Kumar Reddy Gooty 
Signed-off-by: Vladimir Olovyannikov 
Signed-off-by: Arun Parameswaran 
---
 .../include/asm/iproc-common/iproc_sdhci.h|  12 +
 drivers/mmc/Kconfig   |  11 +
 drivers/mmc/Makefile  |   1 +
 drivers/mmc/iproc_sdhci.c | 247 ++
 4 files changed, 271 insertions(+)
 create mode 100644 arch/arm/include/asm/iproc-common/iproc_sdhci.h
 create mode 100644 drivers/mmc/iproc_sdhci.c

diff --git a/arch/arm/include/asm/iproc-common/iproc_sdhci.h 
b/arch/arm/include/asm/iproc-common/iproc_sdhci.h
new file mode 100644
index 00..4e299217fc
--- /dev/null
+++ b/arch/arm/include/asm/iproc-common/iproc_sdhci.h
@@ -0,0 +1,12 @@
+/* SPDX-License-Identifier:  */
+/*
+ * Copyright 2019 Broadcom
+ *
+ */
+
+#ifndef __IPROC_SDHCI_H
+#define __IPROC_SDHCI_H
+
+int iproc_sdhci_init(int dev_index, u32 quirks);
+
+#endif
diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
index 0ccb1ea701..7d71f56248 100644
--- a/drivers/mmc/Kconfig
+++ b/drivers/mmc/Kconfig
@@ -479,6 +479,17 @@ config MMC_SDHCI_AM654
  Support for Secure Digital Host Controller Interface (SDHCI)
  controllers present on TI's AM654 SOCs.
 
+config MMC_SDHCI_IPROC
+   bool "SDHCI support for the iProc SD/MMC Controller"
+   depends on MMC_SDHCI
+   help
+ This selects the iProc SD/MMC controller.
+
+ If you have a Broadcom IPROC platform with SD or MMC devices,
+ say Y or M here.
+
+ If unsure, say N.
+
 config MMC_SDHCI_KONA
bool "SDHCI support on Broadcom KONA platform"
depends on MMC_SDHCI
diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile
index 6cc018bb67..b72cb5a2a2 100644
--- a/drivers/mmc/Makefile
+++ b/drivers/mmc/Makefile
@@ -51,6 +51,7 @@ obj-$(CONFIG_MMC_SDHCI_BCM2835)   += 
bcm2835_sdhci.o
 obj-$(CONFIG_MMC_SDHCI_BCMSTB) += bcmstb_sdhci.o
 obj-$(CONFIG_MMC_SDHCI_CADENCE)+= sdhci-cadence.o
 obj-$(CONFIG_MMC_SDHCI_AM654)  += am654_sdhci.o
+obj-$(CONFIG_MMC_SDHCI_IPROC)  += iproc_sdhci.o
 obj-$(CONFIG_MMC_SDHCI_KONA)   += kona_sdhci.o
 obj-$(CONFIG_MMC_SDHCI_MSM)+= msm_sdhci.o
 obj-$(CONFIG_MMC_SDHCI_MV) += mv_sdhci.o
diff --git a/drivers/mmc/iproc_sdhci.c b/drivers/mmc/iproc_sdhci.c
new file mode 100644
index 00..831dd32eb7
--- /dev/null
+++ b/drivers/mmc/iproc_sdhci.c
@@ -0,0 +1,247 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2019 Broadcom.
+ *
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct sdhci_iproc_host {
+   struct sdhci_host host;
+   u32 shadow_cmd;
+   u32 shadow_blk;
+};
+
+#define REG_OFFSET_IN_BITS(reg) ((reg) << 3 & 0x18)
+
+static inline struct sdhci_iproc_host *to_iproc(struct sdhci_host *host)
+{
+   return (struct sdhci_iproc_host *)host;
+}
+
+#ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS
+static u32 sdhci_iproc_readl(struct sdhci_host *host, int reg)
+{
+   u32 val = readl(host->ioaddr + reg);
+#ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS_TRACE
+   printf("%s %d: readl [0x%02x] 0x%08x\n",
+  host->name, host->index, reg, val);
+#endif
+   return val;
+}
+
+static u16 sdhci_iproc_readw(struct sdhci_host *host, int reg)
+{
+   u32 val = sdhci_iproc_readl(host, (reg & ~3));
+   u16 word = val >> REG_OFFSET_IN_BITS(reg) & 0x;
+   return word;
+}
+
+static u8 sdhci_iproc_readb(struct sdhci_host *host, int reg)
+{
+   u32 val = sdhci_iproc_readl(host, (reg & ~3));
+   u8 byte = val >> REG_OFFSET_IN_BITS(reg) & 0xff;
+   return byte;
+}
+
+static void sdhci_iproc_writel(struct sdhci_host *host, u32 val, int reg)
+{
+   u32 clock = 0;
+#ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS_TRACE
+   printf("%s %d: writel [0x%02x] 0x%08x\n",
+  host->name, host->index, reg, val);
+#endif
+   writel(val, host->ioaddr + reg);
+
+   if (host->mmc)
+   clock = host->mmc->clock;
+   if (clock <= 40) {
+   /* Round up to micro-second four SD clock delay */
+   if (clock)
+   udelay((4 * 100 + clock - 1) / clock);
+   else
+   udelay(10);
+   }
+}
+
+/*
+ * The Arasan has a bugette whereby it may lose the content of successive
+ * writes to the same register that are within two SD-card clock cycles of
+ * each other (a clock domain crossing problem). The data
+ * register does not have this problem, which is just as well - otherwise we'd
+ * have to nobble the DMA engine too.
+ *
+ * This wouldn't be a problem with the code except that we can only write the
+ * controller with 32-bit writes.  So two different 16-bit registers are
+ * written back to back creates the problem.
+ 

[U-Boot] Saving u-boot environment on LS1046ardb QSPI bricks flash memory

[Matthew Ratson]

Hi there,

I am currently working with a LS1046ardb development board from
NXP/Layerscape. Using their provided firmware image from the primary QSPI
memory bank, I have tried to flash my own compiled u-boot (using the
ls1046ardb_qspi_defconfig file) onto the alternate memory bank. I have also
flashed a Reset Configuration Word (RCW) which was provided by NXP.

This process is successful and the alternate bank boots into u-boot.
However, I discovered that after simply executing a "saveenv" command and
then rebooting again into the alternate bank, the alternate flash memory
seems to be "bricked". I can no longer boot into the alternate bank and
instead, the board will boot into the default bank.

I am wondering if this issue and has been noticed already by someone or if
there is something I am not doing correctly.

Is their a specific denx RCW that I should use instead, rather than the one
provided by NXP?

Any help would be greatly appreciated!
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[U-Boot] Please pull pico-imx7d-2019.10-1 from https://github.com/OSSystems/u-boot

[Otavio Salvador]

Hello Stefano,

The same patches I sent before are also online. See:

The following changes since commit 333027284f9a591747ec469ede2b13b3fb8df65a:

  Merge branch 'nxp-imx-8-13' of https://github.com/MrVan/u-boot
(2019-08-18 12:10:11 +0200)

are available in the Git repository at:

  https://github.com/OSSystems/u-boot pico-imx7d-2019.10-1

for you to fetch changes up to 697cc0eaa7104950a52425786c2c830879b044d4:

  logos: Add the TechNexion's logo (2019-09-12 16:35:59 -0300)


Fabio Berton (1):
  pico-imx7d: Sync pico-hobbit-imx7d_defconfig

Fabio Estevam (3):
  pico-imx7d: Add instructions for booting in Falcon mode
  pico-imx7d: Provide a way to escape the Falcon mode
  logos: Add the TechNexion's logo

Otavio Salvador (2):
  pico-imx7d: Add DWARF baseboard support
  pico-imx7d: Add NYMPH baseboard support

 board/technexion/pico-imx7d/README  |  91 
 board/technexion/pico-imx7d/spl.c   |   4 ++
 configs/pico-dwarf-imx7d_defconfig  |  68 +++
 configs/pico-hobbit-imx7d_defconfig |   2 +-
 configs/pico-nymph-imx7d_defconfig  |  68 +++
 include/configs/pico-imx7d.h|   6 ++-
 tools/logos/technexion.bmp  | Bin 0 -> 22390 bytes
 7 files changed, 237 insertions(+), 2 deletions(-)
 create mode 100644 configs/pico-dwarf-imx7d_defconfig
 create mode 100644 configs/pico-nymph-imx7d_defconfig
 create mode 100644 tools/logos/technexion.bmp


-- 
Otavio Salvador O.S. Systems
http://www.ossystems.com.brhttp://code.ossystems.com.br
Mobile: +55 (53) 9 9981-7854  Mobile: +1 (347) 903-9750
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[U-Boot] Please pull pico-imx6ul-2019.10-1 from https://github.com/OSSystems/u-boot

[Otavio Salvador]

Hello Stefano,

The same patches I sent before are also online. See:

The following changes since commit 333027284f9a591747ec469ede2b13b3fb8df65a:

  Merge branch 'nxp-imx-8-13' of https://github.com/MrVan/u-boot
(2019-08-18 12:10:11 +0200)

are available in the Git repository at:

  https://github.com/OSSystems/u-boot pico-imx6ul-2019.10-1

for you to fetch changes up to 5ab1f8ab701e08e7a798729cf552b6f87f14a18a:

  pico-imx6ul: Provide a way to escape the Falcon mode (2019-09-12
16:25:43 -0300)


Fabio Estevam (4):
  pico-imx6ul: Increase the CONFIG_ENV_OFFSET size
  pico-imx6ul: Add LCD support
  pico-imx6ul: Update the Falcon mode instructions
  pico-imx6ul: Provide a way to escape the Falcon mode

Otavio Salvador (1):
  pico-imx6ul: Add DWARF baseboard support

 board/technexion/pico-imx6ul/README|  8 ++--
 board/technexion/pico-imx6ul/pico-imx6ul.c | 55 -
 board/technexion/pico-imx6ul/spl.c |  4 ++
 configs/pico-dwarf-imx6ul_defconfig| 65 ++
 configs/pico-hobbit-imx6ul_defconfig   |  1 +
 configs/pico-imx6ul_defconfig  |  1 +
 configs/pico-pi-imx6ul_defconfig   |  1 +
 include/configs/pico-imx6ul.h  | 33 +--
 8 files changed, 160 insertions(+), 8 deletions(-)
 create mode 100644 configs/pico-dwarf-imx6ul_defconfig


-- 
Otavio Salvador O.S. Systems
http://www.ossystems.com.brhttp://code.ossystems.com.br
Mobile: +55 (53) 9 9981-7854  Mobile: +1 (347) 903-9750
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Re: [U-Boot] [PATCH v2 19/40] env: net: Move eth_parse_enetaddr() to net.c/h

[Simon Glass]

Hi,

On Thu, 12 Sep 2019 at 12:28, Ondřej Jirman  wrote:
>
> Hi,
>
> On Thu, Sep 12, 2019 at 12:22:15PM -0600, Simon Glass wrote:
> > Hi,
> >
> > On Thu, 12 Sep 2019 at 10:59, Ondřej Jirman  wrote:
> > >
> > > Hello,
> > >
> > > On Thu, Aug 01, 2019 at 09:46:54AM -0600, Simon Glass wrote:
> > > > This function fits better with the network subsystem, so move it.
> > >
> > > Unfortunately, this breaks builds without CONFIG_NET. Reverting it
> > > fixes the issue.
> > >
> > >   LD  u-boot
> > > cmd/built-in.o: In function `eth_env_get_enetaddr':
> > > u-boot-v2019.10/cmd/nvedit.c:363: undefined reference to 
> > > `eth_parse_enetaddr'
> > > make[1]: *** [u-boot-v2019.10/Makefile:1594: u-boot] Error 1
> > > make[1]: Leaving directory 'builds/.tmp/u-pc-5.4'
> > > make: *** [Makefile:148: sub-make] Error 2
> > >
> >
> > Which board is this please?
>
> It's orangepi_pc_defconfig with some menuconfig changes to disable CONFIG_NET.
>
> The issue is that by moving eth_parse_enetaddr to net/ if net is disabled, 
> this
> function will not be available to nvedit.c.
>
> The board doesn't really matter.

The offending call is in setup_environment() in board/sunxi/board.c so
I think the board does matter. There might be something else I am
missing but I cannot see it at present.

Would you like to send a patch?

Regards,
Simon
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Re: [U-Boot] [PATCH v2 1/2] Revert "configs: Remove am335x_boneblack_defconfig"

[Sam Protsenko]

Hi Tom,

On Thu, Sep 12, 2019 at 8:50 PM Sam Protsenko
 wrote:
>
> Commit 8fa7f65dd02c ("configs: Remove am335x_boneblack_defconfig")
> removes defconfig for BeagleBone Black board, and it's advised to use
> am335x_evm_defconfig for all AM335x boards. But it's impossible to store
> environment in eMMC with am335x_evm_defconfig without modifications
> (NAND must be disabled, MMC enabled, etc). This is inconvenient for user
> to do such modifications via menuconfig (only developer knows what
> should be done). Furthermore, enabling MMC options in
> am335x_evm_defconfig leads to wrong pin-muxing scheme in
> board/ti/am335x/mux.c, because both NAND and MMC options are enabled in
> the config, so that pins are muxed for BBB with NAND cape, which in turn
> leads to non-functioning eMMC. There is no way to make the single defconfig
> working for both eMMC and NAND use-cases, because we can't figure out in
> run-time which board configuration is used by user (EVM, BBB, or BBB with
> NAND cape). Hence we rely on CONFIG options to figure out which
> configuration is used. Because of this we can't use single defconfig for
> AM335x EVM and BBB.
>
> All that said, let's bring back am335x_boneblack_defconfig, because
> right now users are not able to use U-Boot for BBB. Further patch will
> update this defconfig by enabling Driver Model and pulling some other
> useful options from am335x_evm_defconfig.
>
> Fixes: 8fa7f65dd02c ("configs: Remove am335x_boneblack_defconfig")
> Signed-off-by: Sam Protsenko 
> ---

As stated in the commit message, we can't use single defconfig for all
AM335x boards. So I'm thinking, maybe it's a good idea to:
  1. Rename am335x_evm_defconfig -> am335x_nand_defconfig
  2. Rename am335x_boneblack_defconfig -> am335x_emmc_defconfig

because "evm" word only confuses the user, and we actually need
multiple defconfigs for AM335x to cover all board configurations
(eMMC/NAND/NOR).

What do you think?

> Changes in v2:
>   - improve commit message by saying explicitly about eMMC env
>
>  configs/am335x_boneblack_defconfig | 50 ++
>  1 file changed, 50 insertions(+)
>  create mode 100644 configs/am335x_boneblack_defconfig
>
> diff --git a/configs/am335x_boneblack_defconfig 
> b/configs/am335x_boneblack_defconfig
> new file mode 100644
> index 00..439d0cba05
> --- /dev/null
> +++ b/configs/am335x_boneblack_defconfig
> @@ -0,0 +1,50 @@
> +CONFIG_ARM=y
> +CONFIG_ARCH_OMAP2PLUS=y
> +CONFIG_TI_COMMON_CMD_OPTIONS=y
> +CONFIG_AM33XX=y
> +CONFIG_SPL=y
> +CONFIG_DISTRO_DEFAULTS=y
> +CONFIG_SYS_EXTRA_OPTIONS="EMMC_BOOT"
> +CONFIG_BOOTCOMMAND="if test ${boot_fit} -eq 1; then run update_to_fit; fi; 
> run findfdt; run init_console; run envboot; run distro_bootcmd"
> +CONFIG_SYS_CONSOLE_INFO_QUIET=y
> +CONFIG_VERSION_VARIABLE=y
> +CONFIG_ARCH_MISC_INIT=y
> +CONFIG_SPL_MUSB_NEW_SUPPORT=y
> +# CONFIG_SPL_NAND_SUPPORT is not set
> +CONFIG_SPL_OS_BOOT=y
> +CONFIG_AUTOBOOT_KEYED=y
> +CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n"
> +CONFIG_AUTOBOOT_DELAY_STR="d"
> +CONFIG_AUTOBOOT_STOP_STR=" "
> +CONFIG_CMD_SPL=y
> +# CONFIG_CMD_FLASH is not set
> +# CONFIG_CMD_SETEXPR is not set
> +CONFIG_ENV_IS_IN_MMC=y
> +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
> +CONFIG_BOOTCOUNT_LIMIT=y
> +CONFIG_DFU_TFTP=y
> +CONFIG_DFU_MMC=y
> +CONFIG_DFU_RAM=y
> +CONFIG_USB_FUNCTION_FASTBOOT=y
> +CONFIG_FASTBOOT_FLASH=y
> +CONFIG_FASTBOOT_FLASH_MMC_DEV=1
> +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
> +CONFIG_MMC_OMAP_HS=y
> +CONFIG_SPI_FLASH=y
> +CONFIG_SPI_FLASH_WINBOND=y
> +CONFIG_MII=y
> +CONFIG_DRIVER_TI_CPSW=y
> +CONFIG_SPI=y
> +CONFIG_OMAP3_SPI=y
> +CONFIG_USB=y
> +CONFIG_USB_MUSB_HOST=y
> +CONFIG_USB_MUSB_GADGET=y
> +CONFIG_USB_MUSB_DSPS=y
> +CONFIG_USB_GADGET=y
> +CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments"
> +CONFIG_USB_GADGET_VENDOR_NUM=0x0451
> +CONFIG_USB_GADGET_PRODUCT_NUM=0xd022
> +CONFIG_USB_ETHER=y
> +CONFIG_USBNET_HOST_ADDR="de:ad:be:af:00:00"
> +CONFIG_LZO=y
> +CONFIG_OF_LIBFDT=y
> --
> 2.23.0
>
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[U-Boot] [PATCH] logos: Add the TechNexion's logo

[Otavio Salvador]

From: Fabio Estevam 

Add the TechNexion's logo from their internal U-Boot tree.

Signed-off-by: Fabio Estevam 
Signed-off-by: Otavio Salvador 
---

 tools/logos/technexion.bmp | Bin 0 -> 22390 bytes
 1 file changed, 0 insertions(+), 0 deletions(-)
 create mode 100644 tools/logos/technexion.bmp

diff --git a/tools/logos/technexion.bmp b/tools/logos/technexion.bmp
new file mode 100644
index 
..bccde2de5922cb5d015ce302b74937b2812404ee
GIT binary patch
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zMwYlWiF`t?fm{Q*267GL8pt(}YarJ^u7O+wxdw6#https://lists.denx.de/listinfo/u-boot

[U-Boot] [PATCH 4/5] pico-imx7d: Add instructions for booting in Falcon mode

[Otavio Salvador]

From: Fabio Estevam 

Improve the README by adding instructions on how to boot using
Falcon mode, which allows the SPL to load the kernel directly,
without using U-Boot proper.

Signed-off-by: Fabio Estevam 
Signed-off-by: Otavio Salvador 
---

 board/technexion/pico-imx7d/README | 91 ++
 1 file changed, 91 insertions(+)

diff --git a/board/technexion/pico-imx7d/README 
b/board/technexion/pico-imx7d/README
index 6aa0d25af5..4d57cdbfa8 100644
--- a/board/technexion/pico-imx7d/README
+++ b/board/technexion/pico-imx7d/README
@@ -66,3 +66,94 @@ Remove power from the pico board.
 Put pico board into normal boot mode.
 
 Power up the board and the new updated U-Boot should boot from eMMC.
+
+Booting in Falcon mode
+==
+
+Generate a uImage kernel:
+
+$ make imx_v6_v7_defconfig (Using the default imx_v6_v7_defconfig configuration
+just for an example. In order to boot faster the user should customize the
+defconfig by only enabling the minimal required drivers).
+
+$ make -j4 uImage LOADADDR=0x80008000
+
+$ cp arch/arm/boot/uImage /tftpboot
+$ cp arch/arm/boot/dts/imx7d-pico-pi.dtb /tftpboot
+
+In the U-Boot prompt:
+
+Setup the server and board IP addresses:
+=> setenv serverip 192.168.0.10
+=> setenv ipaddr 192.168.0.11
+
+Get the dtb file:
+=> tftp ${fdt_addr} imx7d-pico-pi.dtb
+
+Get the kernel:
+=> tftp ${loadaddr} uImage
+
+Write the kernel at 2MB offset:
+=> mmc write ${loadaddr} 0x1000 0x5000
+
+Setup the bootargs:
+=> setenv bootargs 'console=ttymxc4,115200 root=/dev/mmcblk2p1 rootfstype=ext4 
rootwait rw'
+
+Prepare args:
+=> spl export fdt ${loadaddr} - ${fdt_addr}
+## Booting kernel from Legacy Image at 8080 ...
+   Image Name:   Linux-5.2.14
+   Image Type:   ARM Linux Kernel Image (uncompressed)
+   Data Size:9077544 Bytes = 8.7 MiB
+   Load Address: 80008000
+   Entry Point:  80008000
+   Verifying Checksum ... OK
+## Flattened Device Tree blob at 8300
+   Booting using the fdt blob at 0x8300
+   Loading Kernel Image
+   Using Device Tree in place at 8300, end 8300b615
+subcommand not supported
+subcommand not supported
+   Using Device Tree in place at 8300, end 8300e615
+Argument image is now in RAM: 0x8300
+=>
+
+Write 1MB of args data (0x800 sectors) to 1MB offset (0x800 sectors):
+
+=> mmc write ${fdt_addr} 0x800 0x800
+
+In order to boot with Falcon mode, activate the CONFIG_SPL_OS_BOOT
+option in the defconfig
+
+--- a/configs/pico-imx7d_defconfig
 b/configs/pico-imx7d_defconfig
+@@ -67,3 +67,4 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x0525
+ CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
+ CONFIG_CI_UDC=y
+ CONFIG_VIDEO=y
++CONFIG_SPL_OS_BOOT=y
+
+Then rebuild U-Boot:
+
+$ make pico-imx7d_defconfig
+$ make -j4
+
+Launch UMS:
+=> ums 0 mmc 0
+
+Flash the new binaries:
+
+$ sudo dd if=SPL of=/dev/sdX bs=1k seek=1; sync
+$ sudo dd if=u-boot-dtb.img  of=/dev/sdX bs=1k seek=69; sync
+
+And then SPL binary will load and jump directly to the kernel:
+
+U-Boot SPL 2019.10-rc3-00284-g001c8ea94a-dirty (Sep 10 2019 - 12:46:01 -0300)
+Trying to boot from MMC1
+[0.00] Booting Linux on physical CPU 0x0
+[0.00] Linux version 5.2.14 (fabio@fabio-OptiPlex-7010) (gcc version 
7.4.0 (Ubuntu/Linaro 7.4.0-1ubuntu1~18.04.1)) #30 SMP Wed Sep 10 12:36:27 -03 
2019
+[0.00] CPU: ARMv7 Processor [410fc075] revision 5 (ARMv7), cr=10c5387d
+[0.00] CPU: div instructions available: patching division code
+[0.00] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing 
instruction cache
+[0.00] OF: fdt: Machine model: TechNexion PICO-IMX7D Board and PI 
baseboard
+...
-- 
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[U-Boot] [PATCH 5/5] pico-imx7d: Provide a way to escape the Falcon mode

[Otavio Salvador]

From: Fabio Estevam 

When CONFIG_SPL_OS_BOOT is selected, it is still convenient to be able
to escape from Falcon mode and boot to U-Boot proper.

Add a mechanism that allows booting in U-Boot proper when the
key 'c' is entered on console at boot time.

Signed-off-by: Fabio Estevam 
Signed-off-by: Otavio Salvador 
---

 board/technexion/pico-imx7d/spl.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/board/technexion/pico-imx7d/spl.c 
b/board/technexion/pico-imx7d/spl.c
index c55a35d864..8955622b81 100644
--- a/board/technexion/pico-imx7d/spl.c
+++ b/board/technexion/pico-imx7d/spl.c
@@ -21,6 +21,10 @@
 #ifdef CONFIG_SPL_OS_BOOT
 int spl_start_uboot(void)
 {
+   /* Break into full U-Boot on 'c' */
+   if (serial_tstc() && serial_getc() == 'c')
+   return 1;
+
return 0;
 }
 #endif
-- 
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[U-Boot] [PATCH 2/5] pico-imx7d: Add DWARF baseboard support

[Otavio Salvador]

This add the boot menu option for the DWARF baseboard as well as a
specific config file for users which wish to use it as a pre-defined
board.

Signed-off-by: Otavio Salvador 
---

 configs/pico-dwarf-imx7d_defconfig | 68 ++
 include/configs/pico-imx7d.h   |  4 +-
 2 files changed, 71 insertions(+), 1 deletion(-)
 create mode 100644 configs/pico-dwarf-imx7d_defconfig

diff --git a/configs/pico-dwarf-imx7d_defconfig 
b/configs/pico-dwarf-imx7d_defconfig
new file mode 100644
index 00..b8a5fb60ad
--- /dev/null
+++ b/configs/pico-dwarf-imx7d_defconfig
@@ -0,0 +1,68 @@
+CONFIG_ARM=y
+CONFIG_ARCH_MX7=y
+CONFIG_SYS_TEXT_BASE=0x8780
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_TARGET_PICO_IMX7D=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_SPL=y
+CONFIG_ARMV7_BOOT_SEC_DEFAULT=y
+CONFIG_IMX_RDC=y
+CONFIG_IMX_BOOTAUX=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
+CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd"
+CONFIG_DEFAULT_FDT_FILE="imx7d-pico-dwarf.dtb"
+CONFIG_BOUNCE_BUFFER=y
+CONFIG_SPL_TEXT_BASE=0x00911000
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_USB_HOST_SUPPORT=y
+CONFIG_SPL_USB_GADGET=y
+CONFIG_SPL_USB_SDP_SUPPORT=y
+# CONFIG_CMD_BOOTD is not set
+CONFIG_CMD_BOOTMENU=y
+# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_XIMG is not set
+CONFIG_CMD_SPL=y
+CONFIG_CMD_SPL_WRITE_SIZE=0x2
+CONFIG_CMD_DFU=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_SDP=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_MII is not set
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="imx7d-pico-pi"
+CONFIG_DFU_MMC=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x8200
+CONFIG_FASTBOOT_BUF_SIZE=0x1000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
+CONFIG_DM_GPIO=y
+CONFIG_DM_MMC=y
+CONFIG_SUPPORT_EMMC_BOOT=y
+CONFIG_FSL_ESDHC=y
+CONFIG_PHYLIB=y
+CONFIG_MII=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_IMX7=y
+CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_MXC_USB_OTG_HACTIVE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="FSL"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0525
+CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
+CONFIG_CI_UDC=y
+CONFIG_VIDEO=y
diff --git a/include/configs/pico-imx7d.h b/include/configs/pico-imx7d.h
index 91015402ef..e66fa3e5e1 100644
--- a/include/configs/pico-imx7d.h
+++ b/include/configs/pico-imx7d.h
@@ -70,7 +70,9 @@
 #define PICO_BOOT_ENV \
"bootmenu_0=Boot using PICO-Hobbit baseboard=" \
"setenv fdtfile imx7d-pico-hobbit.dtb\0" \
-   "bootmenu_1=Boot using PICO-Pi baseboard=" \
+   "bootmenu_1=Boot using PICO-Dwarf baseboard=" \
+   "setenv fdtfile imx7d-pico-dwarf.dtb\0" \
+   "bootmenu_2=Boot using PICO-Pi baseboard=" \
"setenv fdtfile imx7d-pico-pi.dtb\0" \
BOOTENV
 #endif
-- 
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[U-Boot] [PATCH 3/5] pico-imx7d: Add NYMPH baseboard support

[Otavio Salvador]

This add the boot menu option for the NYMPH baseboard as well as a
specific config file for users which wish to use it as a pre-defined
board.

Signed-off-by: Otavio Salvador 
---

 configs/pico-nymph-imx7d_defconfig | 68 ++
 include/configs/pico-imx7d.h   |  4 +-
 2 files changed, 71 insertions(+), 1 deletion(-)
 create mode 100644 configs/pico-nymph-imx7d_defconfig

diff --git a/configs/pico-nymph-imx7d_defconfig 
b/configs/pico-nymph-imx7d_defconfig
new file mode 100644
index 00..b8a5fb60ad
--- /dev/null
+++ b/configs/pico-nymph-imx7d_defconfig
@@ -0,0 +1,68 @@
+CONFIG_ARM=y
+CONFIG_ARCH_MX7=y
+CONFIG_SYS_TEXT_BASE=0x8780
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_TARGET_PICO_IMX7D=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_SPL=y
+CONFIG_ARMV7_BOOT_SEC_DEFAULT=y
+CONFIG_IMX_RDC=y
+CONFIG_IMX_BOOTAUX=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
+CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd"
+CONFIG_DEFAULT_FDT_FILE="imx7d-pico-dwarf.dtb"
+CONFIG_BOUNCE_BUFFER=y
+CONFIG_SPL_TEXT_BASE=0x00911000
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_USB_HOST_SUPPORT=y
+CONFIG_SPL_USB_GADGET=y
+CONFIG_SPL_USB_SDP_SUPPORT=y
+# CONFIG_CMD_BOOTD is not set
+CONFIG_CMD_BOOTMENU=y
+# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_XIMG is not set
+CONFIG_CMD_SPL=y
+CONFIG_CMD_SPL_WRITE_SIZE=0x2
+CONFIG_CMD_DFU=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_SDP=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_MII is not set
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="imx7d-pico-pi"
+CONFIG_DFU_MMC=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x8200
+CONFIG_FASTBOOT_BUF_SIZE=0x1000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
+CONFIG_DM_GPIO=y
+CONFIG_DM_MMC=y
+CONFIG_SUPPORT_EMMC_BOOT=y
+CONFIG_FSL_ESDHC=y
+CONFIG_PHYLIB=y
+CONFIG_MII=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_IMX7=y
+CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_MXC_USB_OTG_HACTIVE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="FSL"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0525
+CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
+CONFIG_CI_UDC=y
+CONFIG_VIDEO=y
diff --git a/include/configs/pico-imx7d.h b/include/configs/pico-imx7d.h
index e66fa3e5e1..cd86cf2d2d 100644
--- a/include/configs/pico-imx7d.h
+++ b/include/configs/pico-imx7d.h
@@ -72,7 +72,9 @@
"setenv fdtfile imx7d-pico-hobbit.dtb\0" \
"bootmenu_1=Boot using PICO-Dwarf baseboard=" \
"setenv fdtfile imx7d-pico-dwarf.dtb\0" \
-   "bootmenu_2=Boot using PICO-Pi baseboard=" \
+   "bootmenu_2=Boot using PICO-Nymph baseboard=" \
+   "setenv fdtfile imx7d-pico-nymph.dtb\0" \
+   "bootmenu_3=Boot using PICO-Pi baseboard=" \
"setenv fdtfile imx7d-pico-pi.dtb\0" \
BOOTENV
 #endif
-- 
2.23.0

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[U-Boot] [PATCH 1/5] pico-imx7d: Sync pico-hobbit-imx7d_defconfig

[Otavio Salvador]

From: Fabio Berton 

Update pico-hobbit-imx7d_defconfig using pico-imx7d_defconfig as base
to fix device tree file generation. With this all pico-imx7d are
creating u-boot-dtb.img files.

Signed-off-by: Fabio Berton 
Signed-off-by: Otavio Salvador 
---

 configs/pico-hobbit-imx7d_defconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/configs/pico-hobbit-imx7d_defconfig 
b/configs/pico-hobbit-imx7d_defconfig
index 3869eb70cc..aaf916c2d0 100644
--- a/configs/pico-hobbit-imx7d_defconfig
+++ b/configs/pico-hobbit-imx7d_defconfig
@@ -41,7 +41,7 @@ CONFIG_CMD_USB_MASS_STORAGE=y
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_OF_CONTROL=y
-CONFIG_DEFAULT_DEVICE_TREE="imx7d-pico-hobbit"
+CONFIG_DEFAULT_DEVICE_TREE="imx7d-pico-pi"
 CONFIG_DFU_MMC=y
 CONFIG_USB_FUNCTION_FASTBOOT=y
 CONFIG_FASTBOOT_BUF_ADDR=0x8200
-- 
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[U-Boot] [PATCH 5/5] pico-imx6ul: Provide a way to escape the Falcon mode

[Otavio Salvador]

From: Fabio Estevam 

When CONFIG_SPL_OS_BOOT is selected, it is still convenient to be able
to escape from Falcon mode and boot to U-Boot proper.

Add a mechanism that allows booting in U-Boot proper when the
key 'c' is entered on console at boot time.

Signed-off-by: Fabio Estevam 
Signed-off-by: Otavio Salvador 
---

 board/technexion/pico-imx6ul/spl.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/board/technexion/pico-imx6ul/spl.c 
b/board/technexion/pico-imx6ul/spl.c
index 284aa40db6..7f520beeb0 100644
--- a/board/technexion/pico-imx6ul/spl.c
+++ b/board/technexion/pico-imx6ul/spl.c
@@ -19,6 +19,10 @@
 #ifdef CONFIG_SPL_OS_BOOT
 int spl_start_uboot(void)
 {
+   /* Break into full U-Boot on 'c' */
+   if (serial_tstc() && serial_getc() == 'c')
+   return 1;
+
return 0;
 }
 #endif
-- 
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[U-Boot] [PATCH 3/5] pico-imx6ul: Add LCD support

[Otavio Salvador]

From: Fabio Estevam 

Add support for the VXT VL050-8048NT-C01 panel connected through
the 24 bit parallel LCDIF interface.

Signed-off-by: Fabio Estevam 
Signed-off-by: Otavio Salvador 
---

 board/technexion/pico-imx6ul/pico-imx6ul.c | 55 +-
 configs/pico-dwarf-imx6ul_defconfig|  1 +
 configs/pico-hobbit-imx6ul_defconfig   |  1 +
 configs/pico-imx6ul_defconfig  |  1 +
 configs/pico-pi-imx6ul_defconfig   |  1 +
 include/configs/pico-imx6ul.h  | 13 +
 6 files changed, 71 insertions(+), 1 deletion(-)

diff --git a/board/technexion/pico-imx6ul/pico-imx6ul.c 
b/board/technexion/pico-imx6ul/pico-imx6ul.c
index 95b482a602..e27a03c212 100644
--- a/board/technexion/pico-imx6ul/pico-imx6ul.c
+++ b/board/technexion/pico-imx6ul/pico-imx6ul.c
@@ -42,6 +42,9 @@ DECLARE_GLOBAL_DATA_PTR;
 
 #define ENET_CLK_PAD_CTRL  (PAD_CTL_DSE_40ohm   | PAD_CTL_SRE_FAST)
 
+#define LCD_PAD_CTRL(PAD_CTL_HYS | PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \
+   PAD_CTL_PKE | PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm)
+
 #define RMII_PHY_RESET IMX_GPIO_NR(1, 28)
 
 static iomux_v3_cfg_t const fec_pads[] = {
@@ -105,6 +108,54 @@ static int setup_fec(void)
return 0;
 }
 
+#ifdef CONFIG_VIDEO_MXS
+static iomux_v3_cfg_t const lcd_pads[] = {
+   MX6_PAD_LCD_CLK__LCDIF_CLK | MUX_PAD_CTRL(LCD_PAD_CTRL),
+   MX6_PAD_LCD_ENABLE__LCDIF_ENABLE | MUX_PAD_CTRL(LCD_PAD_CTRL),
+   MX6_PAD_LCD_HSYNC__LCDIF_HSYNC | MUX_PAD_CTRL(LCD_PAD_CTRL),
+   MX6_PAD_LCD_VSYNC__LCDIF_VSYNC | MUX_PAD_CTRL(LCD_PAD_CTRL),
+   MX6_PAD_LCD_DATA00__LCDIF_DATA00 | MUX_PAD_CTRL(LCD_PAD_CTRL),
+   MX6_PAD_LCD_DATA01__LCDIF_DATA01 | MUX_PAD_CTRL(LCD_PAD_CTRL),
+   MX6_PAD_LCD_DATA02__LCDIF_DATA02 | MUX_PAD_CTRL(LCD_PAD_CTRL),
+   MX6_PAD_LCD_DATA03__LCDIF_DATA03 | MUX_PAD_CTRL(LCD_PAD_CTRL),
+   MX6_PAD_LCD_DATA04__LCDIF_DATA04 | MUX_PAD_CTRL(LCD_PAD_CTRL),
+   MX6_PAD_LCD_DATA05__LCDIF_DATA05 | MUX_PAD_CTRL(LCD_PAD_CTRL),
+   MX6_PAD_LCD_DATA06__LCDIF_DATA06 | MUX_PAD_CTRL(LCD_PAD_CTRL),
+   MX6_PAD_LCD_DATA07__LCDIF_DATA07 | MUX_PAD_CTRL(LCD_PAD_CTRL),
+   MX6_PAD_LCD_DATA08__LCDIF_DATA08 | MUX_PAD_CTRL(LCD_PAD_CTRL),
+   MX6_PAD_LCD_DATA09__LCDIF_DATA09 | MUX_PAD_CTRL(LCD_PAD_CTRL),
+   MX6_PAD_LCD_DATA10__LCDIF_DATA10 | MUX_PAD_CTRL(LCD_PAD_CTRL),
+   MX6_PAD_LCD_DATA11__LCDIF_DATA11 | MUX_PAD_CTRL(LCD_PAD_CTRL),
+   MX6_PAD_LCD_DATA12__LCDIF_DATA12 | MUX_PAD_CTRL(LCD_PAD_CTRL),
+   MX6_PAD_LCD_DATA13__LCDIF_DATA13 | MUX_PAD_CTRL(LCD_PAD_CTRL),
+   MX6_PAD_LCD_DATA14__LCDIF_DATA14 | MUX_PAD_CTRL(LCD_PAD_CTRL),
+   MX6_PAD_LCD_DATA15__LCDIF_DATA15 | MUX_PAD_CTRL(LCD_PAD_CTRL),
+   MX6_PAD_LCD_DATA16__LCDIF_DATA16 | MUX_PAD_CTRL(LCD_PAD_CTRL),
+   MX6_PAD_LCD_DATA17__LCDIF_DATA17 | MUX_PAD_CTRL(LCD_PAD_CTRL),
+   MX6_PAD_LCD_DATA18__LCDIF_DATA18 | MUX_PAD_CTRL(LCD_PAD_CTRL),
+   MX6_PAD_LCD_DATA19__LCDIF_DATA19 | MUX_PAD_CTRL(LCD_PAD_CTRL),
+   MX6_PAD_LCD_DATA20__LCDIF_DATA20 | MUX_PAD_CTRL(LCD_PAD_CTRL),
+   MX6_PAD_LCD_DATA21__LCDIF_DATA21 | MUX_PAD_CTRL(LCD_PAD_CTRL),
+   MX6_PAD_LCD_DATA22__LCDIF_DATA22 | MUX_PAD_CTRL(LCD_PAD_CTRL),
+   MX6_PAD_LCD_DATA23__LCDIF_DATA23 | MUX_PAD_CTRL(LCD_PAD_CTRL),
+   /* LCD_BLT_CTRL: GPIO for Brightness adjustment  */
+   MX6_PAD_NAND_ALE__GPIO4_IO10 | MUX_PAD_CTRL(NO_PAD_CTRL),
+   /* LCD_VDD_EN: LCD enabled */
+   MX6_PAD_JTAG_TMS__GPIO1_IO11 | MUX_PAD_CTRL(NO_PAD_CTRL),
+};
+
+void setup_lcd(void)
+{
+   imx_iomux_v3_setup_multiple_pads(lcd_pads, ARRAY_SIZE(lcd_pads));
+   gpio_request(IMX_GPIO_NR(4, 10), "lcd_brightness");
+   gpio_request(IMX_GPIO_NR(1, 11), "lcd_enable");
+   /* Set Brightness to high */
+   gpio_direction_output(IMX_GPIO_NR(4, 10) , 1);
+   /* Set LCD enable to high */
+   gpio_direction_output(IMX_GPIO_NR(1, 11) , 1);
+}
+#endif
+
 int board_phy_config(struct phy_device *phydev)
 {
phy_write(phydev, MDIO_DEVAD_NONE, 0x1f, 0x8190);
@@ -214,7 +265,9 @@ int board_init(void)
 
setup_fec();
setup_usb();
-
+#ifdef CONFIG_VIDEO_MXS
+   setup_lcd();
+#endif
return 0;
 }
 
diff --git a/configs/pico-dwarf-imx6ul_defconfig 
b/configs/pico-dwarf-imx6ul_defconfig
index e7af415abd..33bb70bf1f 100644
--- a/configs/pico-dwarf-imx6ul_defconfig
+++ b/configs/pico-dwarf-imx6ul_defconfig
@@ -62,3 +62,4 @@ CONFIG_USB_GADGET_MANUFACTURER="FSL"
 CONFIG_USB_GADGET_VENDOR_NUM=0x0525
 CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
 CONFIG_CI_UDC=y
+CONFIG_VIDEO=y
diff --git a/configs/pico-hobbit-imx6ul_defconfig 
b/configs/pico-hobbit-imx6ul_defconfig
index 7395598599..b420846aea 100644
--- a/configs/pico-hobbit-imx6ul_defconfig
+++ b/configs/pico-hobbit-imx6ul_defconfig
@@ -65,3 +65,4 @@ CONFIG_USB_GADGET_MANUFACTURER="FSL"
 CONFIG_USB_GADGET_VENDOR_NUM=0x0525
 CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
 CONFIG_CI_UDC=y
+CONFIG_VIDEO=y
diff --git a/configs/pico-imx6ul_defconfig b/configs/pico

[U-Boot] [PATCH 4/5] pico-imx6ul: Update the Falcon mode instructions

[Otavio Salvador]

From: Fabio Estevam 

Sync the Falcon mode instructions with the ones fro pico-imx7d.

Signed-off-by: Fabio Estevam 
Signed-off-by: Otavio Salvador 
---

 board/technexion/pico-imx6ul/README | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/board/technexion/pico-imx6ul/README 
b/board/technexion/pico-imx6ul/README
index bb8ee3f463..40d4344142 100644
--- a/board/technexion/pico-imx6ul/README
+++ b/board/technexion/pico-imx6ul/README
@@ -75,7 +75,7 @@ $ make imx_v6_v7_defconfig (Using the default 
imx_v6_v7_defconfig configuration
 just for an example. In order to boot faster the user should customize the
 defconfig by only enabling the minimal required drivers).
 
-$ make -j4 uImage LOADADDR=0x8080
+$ make -j4 uImage LOADADDR=0x80008000
 
 $ cp arch/arm/boot/uImage /tftpboot
 $ cp arch/arm/boot/dts/imx6ul-pico-hobbit.dtb /tftpboot
@@ -93,7 +93,7 @@ Get the kernel:
 => tftp ${loadaddr} uImage
 
 Write the kernel at 2MB offset:
-=> mmc write ${loadaddr} 0x1000 0x4000
+=> mmc write ${loadaddr} 0x1000 0x5000
 
 Setup the bootargs:
 => setenv bootargs 'console=ttymxc5,115200 root=/dev/mmcblk0p2 rootfstype=ext4 
rootwait rw'
@@ -104,8 +104,8 @@ Prepare args:
Image Name:   Linux-4.19.0-rc2-next-20180905-0
Image Type:   ARM Linux Kernel Image (uncompressed)
Data Size:8365608 Bytes = 8 MiB
-   Load Address: 8080
-   Entry Point:  8080
+   Load Address: 80008000
+   Entry Point:  80008000
Verifying Checksum ... OK
 ## Flattened Device Tree blob at 8300
Booting using the fdt blob at 0x8300
-- 
2.23.0

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[U-Boot] [PATCH 2/5] pico-imx6ul: Increase the CONFIG_ENV_OFFSET size

[Otavio Salvador]

From: Fabio Estevam 

U-Boot binary has grown in such a way that it goes beyond the reserved
area for the environment variables.

Running "saveenv" causes U-Boot to hang because of this overlap.

Fix this problem by increasing the CONFIG_ENV_OFFSET size.

Also, in order to prevent this same problem in the future, use
CONFIG_BOARD_SIZE_LIMIT, which will detect the overlap in build-time.

CONFIG_BOARD_SIZE_LIMIT does not accept math expressions, so declare
CONFIG_ENV_OFFSET with its direct value instead.

Signed-off-by: Fabio Estevam 
Signed-off-by: Fabio Berton 
Signed-off-by: Otavio Salvador 
---

 include/configs/pico-imx6ul.h | 14 +-
 1 file changed, 13 insertions(+), 1 deletion(-)

diff --git a/include/configs/pico-imx6ul.h b/include/configs/pico-imx6ul.h
index 39c83a8c78..2666e7ac52 100644
--- a/include/configs/pico-imx6ul.h
+++ b/include/configs/pico-imx6ul.h
@@ -134,7 +134,19 @@
 
 /* environment organization */
 #define CONFIG_ENV_SIZESZ_8K
-#define CONFIG_ENV_OFFSET  (8 * SZ_64K)
+/* Environment starts at 768k = 768 * 1024 = 786432 */
+#define CONFIG_ENV_OFFSET  786432
+/*
+ * Detect overlap between U-Boot image and environment area in build-time
+ *
+ * CONFIG_BOARD_SIZE_LIMIT = CONFIG_ENV_OFFSET - u-boot.img offset
+ * CONFIG_BOARD_SIZE_LIMIT = 768k - 69k = 699k = 715776
+ *
+ * Currently CONFIG_BOARD_SIZE_LIMIT does not handle expressions, so
+ * write the direct value here
+ */
+#define CONFIG_BOARD_SIZE_LIMIT715776
+
 
 #define CONFIG_SYS_MMC_ENV_DEV 0
 #define CONFIG_SYS_MMC_ENV_PART0
-- 
2.23.0

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[U-Boot] [PATCH 1/5] pico-imx6ul: Add DWARF baseboard support

[Otavio Salvador]

This add the boot menu option for the DWARF baseboard as well as a
specific config file for users which wish to use it as a pre-defined
board.

Signed-off-by: Otavio Salvador 
---

 configs/pico-dwarf-imx6ul_defconfig | 64 +
 include/configs/pico-imx6ul.h   |  6 ++-
 2 files changed, 68 insertions(+), 2 deletions(-)
 create mode 100644 configs/pico-dwarf-imx6ul_defconfig

diff --git a/configs/pico-dwarf-imx6ul_defconfig 
b/configs/pico-dwarf-imx6ul_defconfig
new file mode 100644
index 00..e7af415abd
--- /dev/null
+++ b/configs/pico-dwarf-imx6ul_defconfig
@@ -0,0 +1,64 @@
+CONFIG_ARM=y
+CONFIG_ARCH_MX6=y
+CONFIG_SYS_TEXT_BASE=0x8780
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_TARGET_PICO_IMX6UL=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
+CONFIG_BOOTDELAY=3
+CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd"
+CONFIG_DEFAULT_FDT_FILE="imx6ul-pico-dwarf.dtb"
+CONFIG_BOUNCE_BUFFER=y
+CONFIG_BOARD_EARLY_INIT_F=y
+CONFIG_SPL_USB_HOST_SUPPORT=y
+CONFIG_SPL_USB_GADGET=y
+CONFIG_SPL_USB_SDP_SUPPORT=y
+CONFIG_CMD_BOOTMENU=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_DFU=y
+# CONFIG_CMD_FLASH is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_SDP=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="imx6ul-pico-pi"
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_DFU_MMC=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_FASTBOOT_BUF_SIZE=0x1000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
+CONFIG_DM_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_DM_MMC=y
+CONFIG_FSL_ESDHC=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_MICREL=y
+CONFIG_MII=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_IMX6=y
+CONFIG_DM_PMIC=y
+CONFIG_DM_PMIC_PFUZE100=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_PFUZE100=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_USB=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="FSL"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0525
+CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
+CONFIG_CI_UDC=y
diff --git a/include/configs/pico-imx6ul.h b/include/configs/pico-imx6ul.h
index cd051bf263..39c83a8c78 100644
--- a/include/configs/pico-imx6ul.h
+++ b/include/configs/pico-imx6ul.h
@@ -63,9 +63,11 @@
"rootfs part 0 1\0" \
 
 #define BOOTMENU_ENV \
-   "bootmenu_0=Boot using PICO-Hobbit baseboard=" \
+   "bootmenu_0=Boot using PICO-Dwarf baseboard=" \
+   "setenv fdtfile imx6ul-pico-dwarf.dtb\0" \
+   "bootmenu_1=Boot using PICO-Hobbit baseboard=" \
"setenv fdtfile imx6ul-pico-hobbit.dtb\0" \
-   "bootmenu_1=Boot using PICO-Pi baseboard=" \
+   "bootmenu_2=Boot using PICO-Pi baseboard=" \
"setenv fdtfile imx6ul-pico-pi.dtb\0" \
 
 #define CONFIG_SYS_MMC_IMG_LOAD_PART   1
-- 
2.23.0

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Re: [U-Boot] [PATCH v2 19/40] env: net: Move eth_parse_enetaddr() to net.c/h

[Ondřej Jirman]

Hi,

On Thu, Sep 12, 2019 at 12:22:15PM -0600, Simon Glass wrote:
> Hi,
> 
> On Thu, 12 Sep 2019 at 10:59, Ondřej Jirman  wrote:
> >
> > Hello,
> >
> > On Thu, Aug 01, 2019 at 09:46:54AM -0600, Simon Glass wrote:
> > > This function fits better with the network subsystem, so move it.
> >
> > Unfortunately, this breaks builds without CONFIG_NET. Reverting it
> > fixes the issue.
> >
> >   LD  u-boot
> > cmd/built-in.o: In function `eth_env_get_enetaddr':
> > u-boot-v2019.10/cmd/nvedit.c:363: undefined reference to 
> > `eth_parse_enetaddr'
> > make[1]: *** [u-boot-v2019.10/Makefile:1594: u-boot] Error 1
> > make[1]: Leaving directory 'builds/.tmp/u-pc-5.4'
> > make: *** [Makefile:148: sub-make] Error 2
> >
> 
> Which board is this please?

It's orangepi_pc_defconfig with some menuconfig changes to disable CONFIG_NET.

The issue is that by moving eth_parse_enetaddr to net/ if net is disabled, this
function will not be available to nvedit.c.

The board doesn't really matter.

regards,
o.

> Regards,
> Simon
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Re: [U-Boot] [PATCH v2 19/40] env: net: Move eth_parse_enetaddr() to net.c/h

[Simon Glass]

Hi,

On Thu, 12 Sep 2019 at 10:59, Ondřej Jirman  wrote:
>
> Hello,
>
> On Thu, Aug 01, 2019 at 09:46:54AM -0600, Simon Glass wrote:
> > This function fits better with the network subsystem, so move it.
>
> Unfortunately, this breaks builds without CONFIG_NET. Reverting it
> fixes the issue.
>
>   LD  u-boot
> cmd/built-in.o: In function `eth_env_get_enetaddr':
> u-boot-v2019.10/cmd/nvedit.c:363: undefined reference to `eth_parse_enetaddr'
> make[1]: *** [u-boot-v2019.10/Makefile:1594: u-boot] Error 1
> make[1]: Leaving directory 'builds/.tmp/u-pc-5.4'
> make: *** [Makefile:148: sub-make] Error 2
>

Which board is this please?

Regards,
Simon
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Re: [U-Boot] [PATCH 1/2] Revert "configs: Remove am335x_boneblack_defconfig"

[Sam Protsenko]

On Thu, Sep 12, 2019 at 6:23 PM Sam Protsenko
 wrote:
>
> Commit 8fa7f65dd02c ("configs: Remove am335x_boneblack_defconfig")
> removes defconfig for BeagleBone Black board, and it's advised to use
> am335x_evm_defconfig for all AM335x boards. But it's impossible to use
> am335x_evm_defconfig in eMMC use-case without modifications for BBB
> (NAND must be disabled, MMC enabled, etc). This is inconvenient for user
> to do such modifications via menuconfig (only developer knows what
> should be done). Furthermore, enabling MMC options in
> am335x_evm_defconfig leads to wrong pin-muxing scheme in
> board/ti/am335x/mux.c, because both NAND and MMC options are going to be
> enabled in the config, so that pins are muxed for BBB with NAND cape,
> which in turn leads to non-functioning eMMC. There is no way to make the
> single defconfig working for both eMMC and NAND use-cases, because we
> can't figure out in run-time which board configuration is used by user
> (EVM, BBB, or BBB with NAND cape). Hence we rely on CONFIG options to
> figure out which configuration is used. Because of this we can't use
> single defconfig for AM335x EVM and BBB.
>
> All that said, let's bring back am335x_boneblack_defconfig, because
> right now users are not able to use U-Boot for BBB. Further patch will
> update this defconfig by enabling Driver Model and pulling some other
> useful options from am335x_evm_defconfig.
>
> Fixes: 8fa7f65dd02c ("configs: Remove am335x_boneblack_defconfig")
> Signed-off-by: Sam Protsenko 
> ---

Superseded by v2.

>  configs/am335x_boneblack_defconfig | 50 ++
>  1 file changed, 50 insertions(+)
>  create mode 100644 configs/am335x_boneblack_defconfig
>
> diff --git a/configs/am335x_boneblack_defconfig 
> b/configs/am335x_boneblack_defconfig
> new file mode 100644
> index 00..439d0cba05
> --- /dev/null
> +++ b/configs/am335x_boneblack_defconfig
> @@ -0,0 +1,50 @@
> +CONFIG_ARM=y
> +CONFIG_ARCH_OMAP2PLUS=y
> +CONFIG_TI_COMMON_CMD_OPTIONS=y
> +CONFIG_AM33XX=y
> +CONFIG_SPL=y
> +CONFIG_DISTRO_DEFAULTS=y
> +CONFIG_SYS_EXTRA_OPTIONS="EMMC_BOOT"
> +CONFIG_BOOTCOMMAND="if test ${boot_fit} -eq 1; then run update_to_fit; fi; 
> run findfdt; run init_console; run envboot; run distro_bootcmd"
> +CONFIG_SYS_CONSOLE_INFO_QUIET=y
> +CONFIG_VERSION_VARIABLE=y
> +CONFIG_ARCH_MISC_INIT=y
> +CONFIG_SPL_MUSB_NEW_SUPPORT=y
> +# CONFIG_SPL_NAND_SUPPORT is not set
> +CONFIG_SPL_OS_BOOT=y
> +CONFIG_AUTOBOOT_KEYED=y
> +CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n"
> +CONFIG_AUTOBOOT_DELAY_STR="d"
> +CONFIG_AUTOBOOT_STOP_STR=" "
> +CONFIG_CMD_SPL=y
> +# CONFIG_CMD_FLASH is not set
> +# CONFIG_CMD_SETEXPR is not set
> +CONFIG_ENV_IS_IN_MMC=y
> +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
> +CONFIG_BOOTCOUNT_LIMIT=y
> +CONFIG_DFU_TFTP=y
> +CONFIG_DFU_MMC=y
> +CONFIG_DFU_RAM=y
> +CONFIG_USB_FUNCTION_FASTBOOT=y
> +CONFIG_FASTBOOT_FLASH=y
> +CONFIG_FASTBOOT_FLASH_MMC_DEV=1
> +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
> +CONFIG_MMC_OMAP_HS=y
> +CONFIG_SPI_FLASH=y
> +CONFIG_SPI_FLASH_WINBOND=y
> +CONFIG_MII=y
> +CONFIG_DRIVER_TI_CPSW=y
> +CONFIG_SPI=y
> +CONFIG_OMAP3_SPI=y
> +CONFIG_USB=y
> +CONFIG_USB_MUSB_HOST=y
> +CONFIG_USB_MUSB_GADGET=y
> +CONFIG_USB_MUSB_DSPS=y
> +CONFIG_USB_GADGET=y
> +CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments"
> +CONFIG_USB_GADGET_VENDOR_NUM=0x0451
> +CONFIG_USB_GADGET_PRODUCT_NUM=0xd022
> +CONFIG_USB_ETHER=y
> +CONFIG_USBNET_HOST_ADDR="de:ad:be:af:00:00"
> +CONFIG_LZO=y
> +CONFIG_OF_LIBFDT=y
> --
> 2.23.0.rc1
>
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[U-Boot] [PATCH v2 2/2] configs: am335x_boneblack: Sync with am335x_evm

[Sam Protsenko]

Old am335x_boneblack defconfig doesn't have Driver Model enabled. Pull
DM options from am335x_evm, along with some others, like ones for
shrinking SPL, making am335x_boneblack defconfig as close as possible to
am335x_evm.

Main differences betweend am335x_boneblack and am335x_evm defconfigs:
  - eMMC related options are enabled
  - NAND related options are disabled
  - keep watchdog disabled for now, as it doesn't work properly (needs
to be enabled once it's fixed)
  - keep log level at default value (4), as it's useful to see some
errors, like "No USB device found"

Fixes: 8fa7f65dd02c ("configs: Remove am335x_boneblack_defconfig")
Signed-off-by: Sam Protsenko 
---
Changes in v2:
  - improve commit message
  - keep log level at default value (4)

 configs/am335x_boneblack_defconfig | 36 --
 1 file changed, 29 insertions(+), 7 deletions(-)

diff --git a/configs/am335x_boneblack_defconfig 
b/configs/am335x_boneblack_defconfig
index 439d0cba05..b8defc9d51 100644
--- a/configs/am335x_boneblack_defconfig
+++ b/configs/am335x_boneblack_defconfig
@@ -4,23 +4,32 @@ CONFIG_TI_COMMON_CMD_OPTIONS=y
 CONFIG_AM33XX=y
 CONFIG_SPL=y
 CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_EXTRA_OPTIONS="EMMC_BOOT"
 CONFIG_BOOTCOMMAND="if test ${boot_fit} -eq 1; then run update_to_fit; fi; run 
findfdt; run init_console; run envboot; run distro_bootcmd"
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
 CONFIG_VERSION_VARIABLE=y
 CONFIG_ARCH_MISC_INIT=y
+CONFIG_SPL_FIT_IMAGE_TINY=y
+CONFIG_SPL_ETH_SUPPORT=y
+# CONFIG_SPL_FS_EXT4 is not set
 CONFIG_SPL_MUSB_NEW_SUPPORT=y
 # CONFIG_SPL_NAND_SUPPORT is not set
+CONFIG_SPL_NET_SUPPORT=y
+CONFIG_SPL_NET_VCI_STRING="AM335x U-Boot SPL"
 CONFIG_SPL_OS_BOOT=y
-CONFIG_AUTOBOOT_KEYED=y
-CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n"
-CONFIG_AUTOBOOT_DELAY_STR="d"
-CONFIG_AUTOBOOT_STOP_STR=" "
+CONFIG_SPL_USB_GADGET=y
+CONFIG_SPL_USB_ETHER=y
 CONFIG_CMD_SPL=y
 # CONFIG_CMD_FLASH is not set
 # CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="am335x-boneblack"
+CONFIG_OF_LIST="am335x-boneblack am335x-bonegreen"
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+CONFIG_SPL_ENV_IS_NOWHERE=y
 CONFIG_BOOTCOUNT_LIMIT=y
 CONFIG_DFU_TFTP=y
 CONFIG_DFU_MMC=y
@@ -29,22 +38,35 @@ CONFIG_USB_FUNCTION_FASTBOOT=y
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=1
 CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
+CONFIG_DM_I2C=y
+CONFIG_MISC=y
+CONFIG_DM_MMC=y
 CONFIG_MMC_OMAP_HS=y
+CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DM_ETH=y
 CONFIG_MII=y
 CONFIG_DRIVER_TI_CPSW=y
 CONFIG_SPI=y
+CONFIG_DM_SPI=y
 CONFIG_OMAP3_SPI=y
+CONFIG_TIMER=y
+CONFIG_OMAP_TIMER=y
 CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_DM_USB_GADGET=y
+CONFIG_SPL_DM_USB_GADGET=y
 CONFIG_USB_MUSB_HOST=y
 CONFIG_USB_MUSB_GADGET=y
-CONFIG_USB_MUSB_DSPS=y
+CONFIG_USB_MUSB_TI=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments"
 CONFIG_USB_GADGET_VENDOR_NUM=0x0451
 CONFIG_USB_GADGET_PRODUCT_NUM=0xd022
 CONFIG_USB_ETHER=y
-CONFIG_USBNET_HOST_ADDR="de:ad:be:af:00:00"
+# CONFIG_SPL_WDT is not set
+CONFIG_DYNAMIC_CRC_TABLE=y
+CONFIG_RSA=y
 CONFIG_LZO=y
-CONFIG_OF_LIBFDT=y
+# CONFIG_OF_LIBFDT_OVERLAY is not set
-- 
2.23.0

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[U-Boot] [PATCH v2 1/2] Revert "configs: Remove am335x_boneblack_defconfig"

[Sam Protsenko]

Commit 8fa7f65dd02c ("configs: Remove am335x_boneblack_defconfig")
removes defconfig for BeagleBone Black board, and it's advised to use
am335x_evm_defconfig for all AM335x boards. But it's impossible to store
environment in eMMC with am335x_evm_defconfig without modifications
(NAND must be disabled, MMC enabled, etc). This is inconvenient for user
to do such modifications via menuconfig (only developer knows what
should be done). Furthermore, enabling MMC options in
am335x_evm_defconfig leads to wrong pin-muxing scheme in
board/ti/am335x/mux.c, because both NAND and MMC options are enabled in
the config, so that pins are muxed for BBB with NAND cape, which in turn
leads to non-functioning eMMC. There is no way to make the single defconfig
working for both eMMC and NAND use-cases, because we can't figure out in
run-time which board configuration is used by user (EVM, BBB, or BBB with
NAND cape). Hence we rely on CONFIG options to figure out which
configuration is used. Because of this we can't use single defconfig for
AM335x EVM and BBB.

All that said, let's bring back am335x_boneblack_defconfig, because
right now users are not able to use U-Boot for BBB. Further patch will
update this defconfig by enabling Driver Model and pulling some other
useful options from am335x_evm_defconfig.

Fixes: 8fa7f65dd02c ("configs: Remove am335x_boneblack_defconfig")
Signed-off-by: Sam Protsenko 
---
Changes in v2:
  - improve commit message by saying explicitly about eMMC env

 configs/am335x_boneblack_defconfig | 50 ++
 1 file changed, 50 insertions(+)
 create mode 100644 configs/am335x_boneblack_defconfig

diff --git a/configs/am335x_boneblack_defconfig 
b/configs/am335x_boneblack_defconfig
new file mode 100644
index 00..439d0cba05
--- /dev/null
+++ b/configs/am335x_boneblack_defconfig
@@ -0,0 +1,50 @@
+CONFIG_ARM=y
+CONFIG_ARCH_OMAP2PLUS=y
+CONFIG_TI_COMMON_CMD_OPTIONS=y
+CONFIG_AM33XX=y
+CONFIG_SPL=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_EXTRA_OPTIONS="EMMC_BOOT"
+CONFIG_BOOTCOMMAND="if test ${boot_fit} -eq 1; then run update_to_fit; fi; run 
findfdt; run init_console; run envboot; run distro_bootcmd"
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
+CONFIG_VERSION_VARIABLE=y
+CONFIG_ARCH_MISC_INIT=y
+CONFIG_SPL_MUSB_NEW_SUPPORT=y
+# CONFIG_SPL_NAND_SUPPORT is not set
+CONFIG_SPL_OS_BOOT=y
+CONFIG_AUTOBOOT_KEYED=y
+CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n"
+CONFIG_AUTOBOOT_DELAY_STR="d"
+CONFIG_AUTOBOOT_STOP_STR=" "
+CONFIG_CMD_SPL=y
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_DFU_TFTP=y
+CONFIG_DFU_MMC=y
+CONFIG_DFU_RAM=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=1
+CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
+CONFIG_MMC_OMAP_HS=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_MII=y
+CONFIG_DRIVER_TI_CPSW=y
+CONFIG_SPI=y
+CONFIG_OMAP3_SPI=y
+CONFIG_USB=y
+CONFIG_USB_MUSB_HOST=y
+CONFIG_USB_MUSB_GADGET=y
+CONFIG_USB_MUSB_DSPS=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0451
+CONFIG_USB_GADGET_PRODUCT_NUM=0xd022
+CONFIG_USB_ETHER=y
+CONFIG_USBNET_HOST_ADDR="de:ad:be:af:00:00"
+CONFIG_LZO=y
+CONFIG_OF_LIBFDT=y
-- 
2.23.0

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[U-Boot] [PATCH 2/2] fs: fat: get_contents() always returns -1 for errors

[Heinrich Schuchardt]

If out of memory, return -1 and not -ENOMEM from get_contents().

Signed-off-by: Heinrich Schuchardt 
---
 fs/fat/fat.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/fs/fat/fat.c b/fs/fat/fat.c
index b4e8083734..da822f4f38 100644
--- a/fs/fat/fat.c
+++ b/fs/fat/fat.c
@@ -364,7 +364,7 @@ static int get_contents(fsdata *mydata, dir_entry *dentptr, 
loff_t pos,
tmp_buffer = malloc_cache_aligned(actsize);
if (!tmp_buffer) {
debug("Error: allocating buffer\n");
-   return -ENOMEM;
+   return -1;
}

if (get_cluster(mydata, curclust, tmp_buffer, actsize) != 0) {
--
2.23.0

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[U-Boot] [PATCH 1/2] fs: fat: treat invalid FAT clusters as errors

[Heinrich Schuchardt]

When hitting an invalid FAT cluster while reading a file always print an
error message and return an error code.

Signed-off-by: Heinrich Schuchardt 
---
 fs/fat/fat.c | 30 --
 1 file changed, 20 insertions(+), 10 deletions(-)

diff --git a/fs/fat/fat.c b/fs/fat/fat.c
index 73a89fc9e3..b4e8083734 100644
--- a/fs/fat/fat.c
+++ b/fs/fat/fat.c
@@ -301,10 +301,20 @@ get_cluster(fsdata *mydata, __u32 clustnum, __u8 *buffer, 
unsigned long size)
return 0;
 }

-/*
+/**
+ * get_contents() - read from file
+ *
  * Read at most 'maxsize' bytes from 'pos' in the file associated with 
'dentptr'
- * into 'buffer'.
- * Update the number of bytes read in *gotsize or return -1 on fatal errors.
+ * into 'buffer'. Update the number of bytes read in *gotsize or return -1 on
+ * fatal errors.
+ *
+ * @mydata:file system description
+ * @dentprt:   directory entry pointer
+ * @pos:   position from where to read
+ * @buffer:buffer into which to read
+ * @maxsize:   maximum number of bytes to read
+ * @gotsize:   number of bytes actually read
+ * Return: -1 on error, otherwise 0
  */
 static int get_contents(fsdata *mydata, dir_entry *dentptr, loff_t pos,
__u8 *buffer, loff_t maxsize, loff_t *gotsize)
@@ -335,8 +345,8 @@ static int get_contents(fsdata *mydata, dir_entry *dentptr, 
loff_t pos,
curclust = get_fatent(mydata, curclust);
if (CHECK_CLUST(curclust, mydata->fatsize)) {
debug("curclust: 0x%x\n", curclust);
-   debug("Invalid FAT entry\n");
-   return 0;
+   printf("Invalid FAT entry\n");
+   return -1;
}
actsize += bytesperclust;
}
@@ -374,8 +384,8 @@ static int get_contents(fsdata *mydata, dir_entry *dentptr, 
loff_t pos,
curclust = get_fatent(mydata, curclust);
if (CHECK_CLUST(curclust, mydata->fatsize)) {
debug("curclust: 0x%x\n", curclust);
-   debug("Invalid FAT entry\n");
-   return 0;
+   printf("Invalid FAT entry\n");
+   return -1;
}
}

@@ -390,8 +400,8 @@ static int get_contents(fsdata *mydata, dir_entry *dentptr, 
loff_t pos,
goto getit;
if (CHECK_CLUST(newclust, mydata->fatsize)) {
debug("curclust: 0x%x\n", newclust);
-   debug("Invalid FAT entry\n");
-   return 0;
+   printf("Invalid FAT entry\n");
+   return -1;
}
endclust = newclust;
actsize += bytesperclust;
@@ -418,7 +428,7 @@ getit:
if (CHECK_CLUST(curclust, mydata->fatsize)) {
debug("curclust: 0x%x\n", curclust);
printf("Invalid FAT entry\n");
-   return 0;
+   return -1;
}
actsize = bytesperclust;
endclust = curclust;
--
2.23.0

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[U-Boot] [PATCH 0/2] fs: fat: error handling in get_contents()

[Heinrich Schuchardt]

If a FAT entry is corrupted, reading a file should always lead to an
error.

get_contents() should always return -1 when an error occurs.

Heinrich Schuchardt (2):
  fs: fat: treat invalid FAT clusters as errors
  fs: fat: get_contents() always returns -1 for errors

 fs/fat/fat.c | 32 +---
 1 file changed, 21 insertions(+), 11 deletions(-)

--
2.23.0

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[U-Boot] [PATCH 1/1] arm64: print instructions leading to exception

[Heinrich Schuchardt]

If an exception occurs in a loaded image and the relocation offset is
unknown, it is helpful to know the instructions pointed to by the
program counter. This patch adds the missing output.

A possible output is:
Code: 910c4021 aa1303e0 f9400662 d63f0040 (e7f7defb)

The parentheses indicate the instruction causing the exception.

The output can be disassembled using scripts/decodecode:

echo 'Code: 9360 9100b800 94002782 178f (e7f7defb)' | \
  ARCH=arm64 scripts/decodecode

Code: 9360 9100b800 94002782 178f (e7f7defb)
All code

   0:   9360adrpx0, 0x6c000
   4:   9100b800add x0, x0, #0x2e
   8:   94002782bl  0x9e10
   c:   178fb   0xfe48
  10:*  e7f7defb.inst   0xe7f7defb ; undefined <-- trapping instruction

Code starting with the faulting instruction
===
   0:   e7f7defb.inst   0xe7f7defb ; undefined

We already have implemented the same for armv7.

For testing command 'exception undefined' can be used.

Signed-off-by: Heinrich Schuchardt 
---
 arch/arm/lib/interrupts_64.c | 12 
 1 file changed, 12 insertions(+)

diff --git a/arch/arm/lib/interrupts_64.c b/arch/arm/lib/interrupts_64.c
index 0bfdb8d93d..a32a4b6868 100644
--- a/arch/arm/lib/interrupts_64.c
+++ b/arch/arm/lib/interrupts_64.c
@@ -30,6 +30,17 @@ static void show_efi_loaded_images(struct pt_regs *regs)
efi_print_image_infos((void *)regs->elr);
 }

+static void dump_instr(struct pt_regs *regs)
+{
+   u32 *addr = (u32 *)(regs->elr & ~3UL);
+   int i;
+
+   printf("Code: ");
+   for (i = -4; i < 1; i++)
+   printf(i == 0 ? "(%08x) " : "%08x ", addr[i]);
+   printf("\n");
+}
+
 void show_regs(struct pt_regs *regs)
 {
int i;
@@ -44,6 +55,7 @@ void show_regs(struct pt_regs *regs)
printf("x%-2d: %016lx x%-2d: %016lx\n",
   i, regs->regs[i], i+1, regs->regs[i+1]);
printf("\n");
+   dump_instr(regs);
 }

 /*
--
2.23.0

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Re: [U-Boot] [PATCH v2 19/40] env: net: Move eth_parse_enetaddr() to net.c/h

[Ondřej Jirman]

Hello,

On Thu, Aug 01, 2019 at 09:46:54AM -0600, Simon Glass wrote:
> This function fits better with the network subsystem, so move it.

Unfortunately, this breaks builds without CONFIG_NET. Reverting it
fixes the issue.

  LD  u-boot
cmd/built-in.o: In function `eth_env_get_enetaddr':
u-boot-v2019.10/cmd/nvedit.c:363: undefined reference to `eth_parse_enetaddr'
make[1]: *** [u-boot-v2019.10/Makefile:1594: u-boot] Error 1
make[1]: Leaving directory 'builds/.tmp/u-pc-5.4'
make: *** [Makefile:148: sub-make] Error 2

regards,
o.

> Signed-off-by: Simon Glass 
> Suggested-by: Joe Hershberger 
> ---
> 
> Changes in v2:
> - Add new patch to move eth_parse_enetaddr() to net.c/h
> 
>  cmd/nvedit.c  | 12 
>  include/environment.h |  2 --
>  include/net.h | 11 +++
>  net/net.c | 12 
>  4 files changed, 23 insertions(+), 14 deletions(-)
> 
> diff --git a/cmd/nvedit.c b/cmd/nvedit.c
> index 751b77d0e9..01110e9b3a 100644
> --- a/cmd/nvedit.c
> +++ b/cmd/nvedit.c
> @@ -358,18 +358,6 @@ ulong env_get_hex(const char *varname, ulong default_val)
>   return value;
>  }
>  
> -void eth_parse_enetaddr(const char *addr, uint8_t *enetaddr)
> -{
> - char *end;
> - int i;
> -
> - for (i = 0; i < 6; ++i) {
> - enetaddr[i] = addr ? simple_strtoul(addr, &end, 16) : 0;
> - if (addr)
> - addr = (*end) ? end + 1 : end;
> - }
> -}
> -
>  int eth_env_get_enetaddr(const char *name, uint8_t *enetaddr)
>  {
>   eth_parse_enetaddr(env_get(name), enetaddr);
> diff --git a/include/environment.h b/include/environment.h
> index 77915f459e..0de9d3fc60 100644
> --- a/include/environment.h
> +++ b/include/environment.h
> @@ -325,8 +325,6 @@ int env_erase(void);
>   */
>  void env_fix_drivers(void);
>  
> -void eth_parse_enetaddr(const char *addr, uint8_t *enetaddr);
> -
>  #endif /* DO_DEPS_ONLY */
>  
>  #endif /* _ENVIRONMENT_H_ */
> diff --git a/include/net.h b/include/net.h
> index 0262175c81..a54d5eeac5 100644
> --- a/include/net.h
> +++ b/include/net.h
> @@ -875,4 +875,15 @@ int update_tftp(ulong addr, char *interface, char 
> *devstring);
>  
>  /**/
>  
> +/**
> + * eth_parse_enetaddr() - Parse a MAC address
> + *
> + * Convert a string MAC address
> + *
> + * @addr: MAC address in aa:bb:cc:dd:ee:ff format, where each part is a 
> 2-digit
> + *   hex value
> + * @enetaddr: Place to put MAC address (6 bytes)
> + */
> +void eth_parse_enetaddr(const char *addr, uint8_t *enetaddr);
> +
>  #endif /* __NET_H__ */
> diff --git a/net/net.c b/net/net.c
> index 1a175c4597..f0a3996cd6 100644
> --- a/net/net.c
> +++ b/net/net.c
> @@ -1614,3 +1614,15 @@ ushort env_get_vlan(char *var)
>  {
>   return string_to_vlan(env_get(var));
>  }
> +
> +void eth_parse_enetaddr(const char *addr, uint8_t *enetaddr)
> +{
> + char *end;
> + int i;
> +
> + for (i = 0; i < 6; ++i) {
> + enetaddr[i] = addr ? simple_strtoul(addr, &end, 16) : 0;
> + if (addr)
> + addr = (*end) ? end + 1 : end;
> + }
> +}
> -- 
> 2.22.0.709.g102302147b-goog
> 
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Re: [U-Boot] [PATCH v2] patman: Use the Change-Id, version, and prefix in the Message-Id

[Simon Glass]

On Tue, 3 Sep 2019 at 14:15, Douglas Anderson  wrote:
>
> As per the centithread on ksummit-discuss [1], there are folks who
> feel that if a Change-Id is present in a developer's local commit that
> said Change-Id could be interesting to include in upstream posts.
> Specifically if two commits are posted with the same Change-Id there's
> a reasonable chance that they are either the same commit or a newer
> version of the same commit.  Specifically this is because that's how
> gerrit has trained people to work.
>
> There is much angst about Change-Id in upstream Linux, but one thing
> that seems safe and non-controversial is to include the Change-Id as
> part of the string of crud that makes up a Message-Id.
>
> Let's give that a try.
>
> In theory (if there is enough adoption) this could help a tool more
> reliably find various versions of a commit.  This actually might work
> pretty well for U-Boot where (I believe) quite a number of developers
> use patman, so there could be critical mass (assuming that enough of
> these people also use a git hook that adds Change-Id to their
> commits).  I was able to find this git hook by searching for "gerrit
> change id git hook" in my favorite search engine.
>
> In theory one could imagine something like this could be integrated
> into other tools, possibly even git-send-email.  Getting it into
> patman seems like a sane first step, though.
>
> NOTE: this patch is being posted using a patman containing this patch,
> so you should be able to see the Message-Id of this patch and see that
> it contains my local Change-Id, which ends in 2b9 if you want to
> check.
>
> [1] 
> https://lists.linuxfoundation.org/pipermail/ksummit-discuss/2019-August/006739.html
>
> Signed-off-by: Douglas Anderson 
> ---
>
> Changes in v2:
> - Add a "v" before the version part of the Message-Id
> - Reorder the parts of the Message-Id as per Johannes.
>
>  tools/patman/README |  8 +-
>  tools/patman/commit.py  |  3 ++
>  tools/patman/patchstream.py | 57 +++--
>  3 files changed, 65 insertions(+), 3 deletions(-)

Reviewed-by: Simon Glass 
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Re: [U-Boot] OMAP watchdog timer reset on BBB

[Sam Protsenko]

Hi Stefan,

On Thu, Sep 12, 2019 at 5:38 PM Stefan Roese  wrote:
>
> Hi Sam,
>
> On 12.09.19 15:45, Sam Protsenko wrote:
> > Hi Suniel,
> >
> > After transition to DM WDT, watchdog timer on BeagleBone Black resets
> > the board after 1 minute or so. I'm using this defconfig: [1]. After
> > disabling CONFIG_WDT and CONFIG_WATCHDOG options the board doesn't
> > reset. I guess it might be happening on other boards using
> > CONFIG_WDT_OMAP3 as well. The issue can be reproduced by stopping in
> > U-Boot shell (=>) and waiting for 1 minute.
> >
> > Do you know by chance why it might be happening, or maybe some fix
> > already exists?
> >
> > Thanks!
> >
> > [1] https://pastebin.ubuntu.com/p/Zz5bY6cYXS/
>
> So you have enabled the watchdog and should see something like this
> upon bootup:
>
> WDT:   Started without servicing (60s timeout)
>
> Is this correct? Then you need to enable the U-Boot internal WDT
> servicing by enabling CONFIG_WATCHDOG as well, as this will
> result in the internal U-Boot servicing of the watchdog. Then
> you should see this upon bootup and no reset will appear in
> U-Boot:
>
> WDT:   Started with servicing (60s timeout)
>

I'm seeing this ("with servicing") line, and CONFIG_WATCHDOG is
already enabled in am335x_evm_defconfig. So I think it's an issue,
which *probably* appeared when watchdog drivers were converted to
Driver Model (this defconfig is using CONFIG_WDT + CONFIG_WDT_OMAP3
options). Any clues what can be wrong?

> Does this help?
>
> Thanks,
> Stefan
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Re: [U-Boot] [PATCH 1/2] Revert "configs: Remove am335x_boneblack_defconfig"

[Sam Protsenko]

The eMMC boot works fine, but "env save" fails with message:

Saving Environment to FAT... Failed (1)

That's because CONFIG_ENV_IS_IN_MMC=y is not enabled, which wouldn't
work without CONFIG_SYS_EXTRA_OPTIONS="EMMC_BOOT", because in
include/configs/am335x_evm.h it defines eMMC environment options:

...
#elif defined(CONFIG_EMMC_BOOT)
#define CONFIG_SYS_MMC_ENV_DEV1
#define CONFIG_SYS_MMC_ENV_PART0
#define CONFIG_ENV_OFFSET0x26
#define CONFIG_ENV_OFFSET_REDUND(CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
#define CONFIG_SYS_MMC_MAX_DEVICE2

And if we enable those two options in am335x_evm_defconfig, it leads
to wrong pin-muxing in board/ti/am335x/mux.c (because CONFIG_NAND is
also enabled in am335x_evm_defconfig):

} else if (board_is_bone_lt()) {
...
configure_module_pin_mux(mmc0_pin_mux);
#if defined(CONFIG_NAND) && defined(CONFIG_EMMC_BOOT)
configure_module_pin_mux(nand_pin_mux);  < this line is executed
#elif defined(CONFIG_NOR) && defined(CONFIG_EMMC_BOOT)
configure_module_pin_mux(bone_norcape_pin_mux);
#else
configure_module_pin_mux(mmc1_pin_mux);
#endif

So I don't see any other way to overcome this issue other than keeping
separate defconfig for NAND and eMMC board variants. Of course, I can
fix commit message to state the reason more clearly. We can also
rename am335x_boneblack_defconfig to am335x_evm_mmc_defconfig, but it
doesn't change the fact it should be done. If somebody sees another
way around, please do tell.

Thanks!

On Thu, Sep 12, 2019 at 6:43 PM Andre Heider  wrote:
>
> Hi,
>
> On 9/12/19 5:23 PM, Sam Protsenko wrote:
> > Commit 8fa7f65dd02c ("configs: Remove am335x_boneblack_defconfig")
> > removes defconfig for BeagleBone Black board, and it's advised to use
> > am335x_evm_defconfig for all AM335x boards. But it's impossible to use
> > am335x_evm_defconfig in eMMC use-case without modifications for BBB
> > (NAND must be disabled, MMC enabled, etc). This is inconvenient for user
> > to do such modifications via menuconfig (only developer knows what
> > should be done). Furthermore, enabling MMC options in
> > am335x_evm_defconfig leads to wrong pin-muxing scheme in
> > board/ti/am335x/mux.c, because both NAND and MMC options are going to be
> > enabled in the config, so that pins are muxed for BBB with NAND cape,
> > which in turn leads to non-functioning eMMC. There is no way to make the
> > single defconfig working for both eMMC and NAND use-cases, because we
> > can't figure out in run-time which board configuration is used by user
> > (EVM, BBB, or BBB with NAND cape). Hence we rely on CONFIG options to
> > figure out which configuration is used. Because of this we can't use
> > single defconfig for AM335x EVM and BBB.
>
> for the record: I booted my bbb with am335x_evm_defconfig without any
> config changes from emmc using master a few days ago just fine. It works
> just as well as booting from sd card.
>
> That's with using distro boot, the legacy env cmds don't try to boot off
> emmc iirc.
>
> Regards,
> Andre
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Re: [U-Boot] [PATCH 1/2] Revert "configs: Remove am335x_boneblack_defconfig"

[Andre Heider]

Hi,

On 9/12/19 5:23 PM, Sam Protsenko wrote:

Commit 8fa7f65dd02c ("configs: Remove am335x_boneblack_defconfig")
removes defconfig for BeagleBone Black board, and it's advised to use
am335x_evm_defconfig for all AM335x boards. But it's impossible to use
am335x_evm_defconfig in eMMC use-case without modifications for BBB
(NAND must be disabled, MMC enabled, etc). This is inconvenient for user
to do such modifications via menuconfig (only developer knows what
should be done). Furthermore, enabling MMC options in
am335x_evm_defconfig leads to wrong pin-muxing scheme in
board/ti/am335x/mux.c, because both NAND and MMC options are going to be
enabled in the config, so that pins are muxed for BBB with NAND cape,
which in turn leads to non-functioning eMMC. There is no way to make the
single defconfig working for both eMMC and NAND use-cases, because we
can't figure out in run-time which board configuration is used by user
(EVM, BBB, or BBB with NAND cape). Hence we rely on CONFIG options to
figure out which configuration is used. Because of this we can't use
single defconfig for AM335x EVM and BBB.


for the record: I booted my bbb with am335x_evm_defconfig without any 
config changes from emmc using master a few days ago just fine. It works 
just as well as booting from sd card.


That's with using distro boot, the legacy env cmds don't try to boot off 
emmc iirc.


Regards,
Andre
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Re: [U-Boot] [PATCH PATCH v4 04/15] spl: fit: allocate a temporary buffer to load the overlays

[Jean-Jacques Hiblot]

On 13/08/2019 11:33, Simon Glass wrote:

Hi Jean-Jacques,

On Mon, 5 Aug 2019 at 03:44, Jean-Jacques Hiblot  wrote:

If the node describing an overlay does not specify a load address, it will
be loaded at the address previously used.
Fixing it by allocating a temporary 64kB region that will be used as a
default load address.

How did you come to decide on 64KB? Might this be too large or too small?


Signed-off-by: Jean-Jacques Hiblot 

---

Changes in v4:
- make sure that the temp buffer is freed in all cases

Changes in v3: None
Changes in v2: None

  common/spl/spl_fit.c | 28 +++-
  1 file changed, 23 insertions(+), 5 deletions(-)

diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index ab47da5094..977074cd99 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -8,8 +8,9 @@
  #include 
  #include 
  #include 
-#include 
+#include 
  #include 
+#include 

  #ifndef CONFIG_SYS_BOOTM_LEN
  #define CONFIG_SYS_BOOTM_LEN   (64 << 20)
@@ -302,33 +303,50 @@ static int spl_fit_append_fdt(struct spl_image_info 
*spl_image,
 spl_image->fdt_addr = (void *)image_info.load_addr;
  #if !CONFIG_IS_ENABLED(FIT_IMAGE_TINY)
 if (CONFIG_IS_ENABLED(LOAD_FIT_APPLY_OVERLAY)) {
+   void *tmpbuffer;
+   /*
+* allocate 64KB of memory. This will be used to store the DT
+* overlay before it is applied. It may not be used depending on
+* how the overlay is stored, so don't fail yet if the
+* allocation failed.
+*/
+   tmpbuffer = malloc(64 * 1024);
+   if (!tmpbuffer)
+   debug("%s: unable to allocate space for overlays\n",
+ __func__);

Can you adjust this to only allocate buf when you find it is needed?


+
 for (; ; index++) {
 node = spl_fit_get_image_node(fit, images, 
FIT_FDT_PROP,
   index);
 if (node < 0) {
 debug("%s: No additional FDT node\n", 
__func__);
-   return 0;
+   break;
 }

+   image_info.load_addr = (ulong)tmpbuffer;

map_to_sysmem() or this won't work on sandbox.


This makes me think that loading u-boot from a FIT image in SPL probably 
doesn't work on sandbox, otherwise there would be some call to 
map-sysmem() in spl_load_fit_image().


This seems like a big task and honestly I don't have time to work on it. 
So I'll forgo the map_system()/map_to_sysmem(); adding them will only 
trick people into thinking that this work on sandbox.



 ret = spl_load_fit_image(info, sector, fit, 
base_offset,
  node, &image_info);
 if (ret < 0)
-   return ret;
+   break;

 /* Make room in FDT for changes from the overlay */
 ret = fdt_increase_size(spl_image->fdt_addr,
 image_info.size);
 if (ret < 0)
-   return ret;
+   break;

 ret = fdt_overlay_apply_verbose(spl_image->fdt_addr,
 (void 
*)image_info.load_addr);

map_sysmem()


 if (ret)
-   return ret;
+   break;

 debug("%s: DT overlay %s applied\n", __func__,
   fit_get_name(fit, node, NULL));
 }
+   if (tmpbuffer)
+   free(tmpbuffer);
+   if (ret)
+   return ret;
 }
 /* Try to make space, so we can inject details on the loadables */
 ret = fdt_shrink_to_minimum(spl_image->fdt_addr, 8192);
--
2.17.1


Regads,
Simon


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[U-Boot] [PATCH 2/2] configs: am335x_boneblack: Sync with am335x_evm

[Sam Protsenko]

Old am335x_boneblack defconfig doesn't have Driver Model enabled. Pull
DM options from am335x_evm, along with some others, like ones for
shrinking SPL, making am335x_boneblack defconfig as close as possible to
am335x_evm.

Fixes: 8fa7f65dd02c ("configs: Remove am335x_boneblack_defconfig")
Signed-off-by: Sam Protsenko 
---
 configs/am335x_boneblack_defconfig | 37 --
 1 file changed, 30 insertions(+), 7 deletions(-)

diff --git a/configs/am335x_boneblack_defconfig 
b/configs/am335x_boneblack_defconfig
index 439d0cba05..2b9dfdb5fc 100644
--- a/configs/am335x_boneblack_defconfig
+++ b/configs/am335x_boneblack_defconfig
@@ -4,23 +4,33 @@ CONFIG_TI_COMMON_CMD_OPTIONS=y
 CONFIG_AM33XX=y
 CONFIG_SPL=y
 CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_EXTRA_OPTIONS="EMMC_BOOT"
 CONFIG_BOOTCOMMAND="if test ${boot_fit} -eq 1; then run update_to_fit; fi; run 
findfdt; run init_console; run envboot; run distro_bootcmd"
+CONFIG_LOGLEVEL=3
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
 CONFIG_VERSION_VARIABLE=y
 CONFIG_ARCH_MISC_INIT=y
+CONFIG_SPL_FIT_IMAGE_TINY=y
+CONFIG_SPL_ETH_SUPPORT=y
+# CONFIG_SPL_FS_EXT4 is not set
 CONFIG_SPL_MUSB_NEW_SUPPORT=y
 # CONFIG_SPL_NAND_SUPPORT is not set
+CONFIG_SPL_NET_SUPPORT=y
+CONFIG_SPL_NET_VCI_STRING="AM335x U-Boot SPL"
 CONFIG_SPL_OS_BOOT=y
-CONFIG_AUTOBOOT_KEYED=y
-CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n"
-CONFIG_AUTOBOOT_DELAY_STR="d"
-CONFIG_AUTOBOOT_STOP_STR=" "
+CONFIG_SPL_USB_GADGET=y
+CONFIG_SPL_USB_ETHER=y
 CONFIG_CMD_SPL=y
 # CONFIG_CMD_FLASH is not set
 # CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="am335x-boneblack"
+CONFIG_OF_LIST="am335x-boneblack am335x-bonegreen"
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+CONFIG_SPL_ENV_IS_NOWHERE=y
 CONFIG_BOOTCOUNT_LIMIT=y
 CONFIG_DFU_TFTP=y
 CONFIG_DFU_MMC=y
@@ -29,22 +39,35 @@ CONFIG_USB_FUNCTION_FASTBOOT=y
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=1
 CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
+CONFIG_DM_I2C=y
+CONFIG_MISC=y
+CONFIG_DM_MMC=y
 CONFIG_MMC_OMAP_HS=y
+CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DM_ETH=y
 CONFIG_MII=y
 CONFIG_DRIVER_TI_CPSW=y
 CONFIG_SPI=y
+CONFIG_DM_SPI=y
 CONFIG_OMAP3_SPI=y
+CONFIG_TIMER=y
+CONFIG_OMAP_TIMER=y
 CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_DM_USB_GADGET=y
+CONFIG_SPL_DM_USB_GADGET=y
 CONFIG_USB_MUSB_HOST=y
 CONFIG_USB_MUSB_GADGET=y
-CONFIG_USB_MUSB_DSPS=y
+CONFIG_USB_MUSB_TI=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments"
 CONFIG_USB_GADGET_VENDOR_NUM=0x0451
 CONFIG_USB_GADGET_PRODUCT_NUM=0xd022
 CONFIG_USB_ETHER=y
-CONFIG_USBNET_HOST_ADDR="de:ad:be:af:00:00"
+# CONFIG_SPL_WDT is not set
+CONFIG_DYNAMIC_CRC_TABLE=y
+CONFIG_RSA=y
 CONFIG_LZO=y
-CONFIG_OF_LIBFDT=y
+# CONFIG_OF_LIBFDT_OVERLAY is not set
-- 
2.23.0.rc1

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[U-Boot] [PATCH 1/2] Revert "configs: Remove am335x_boneblack_defconfig"

[Sam Protsenko]

Commit 8fa7f65dd02c ("configs: Remove am335x_boneblack_defconfig")
removes defconfig for BeagleBone Black board, and it's advised to use
am335x_evm_defconfig for all AM335x boards. But it's impossible to use
am335x_evm_defconfig in eMMC use-case without modifications for BBB
(NAND must be disabled, MMC enabled, etc). This is inconvenient for user
to do such modifications via menuconfig (only developer knows what
should be done). Furthermore, enabling MMC options in
am335x_evm_defconfig leads to wrong pin-muxing scheme in
board/ti/am335x/mux.c, because both NAND and MMC options are going to be
enabled in the config, so that pins are muxed for BBB with NAND cape,
which in turn leads to non-functioning eMMC. There is no way to make the
single defconfig working for both eMMC and NAND use-cases, because we
can't figure out in run-time which board configuration is used by user
(EVM, BBB, or BBB with NAND cape). Hence we rely on CONFIG options to
figure out which configuration is used. Because of this we can't use
single defconfig for AM335x EVM and BBB.

All that said, let's bring back am335x_boneblack_defconfig, because
right now users are not able to use U-Boot for BBB. Further patch will
update this defconfig by enabling Driver Model and pulling some other
useful options from am335x_evm_defconfig.

Fixes: 8fa7f65dd02c ("configs: Remove am335x_boneblack_defconfig")
Signed-off-by: Sam Protsenko 
---
 configs/am335x_boneblack_defconfig | 50 ++
 1 file changed, 50 insertions(+)
 create mode 100644 configs/am335x_boneblack_defconfig

diff --git a/configs/am335x_boneblack_defconfig 
b/configs/am335x_boneblack_defconfig
new file mode 100644
index 00..439d0cba05
--- /dev/null
+++ b/configs/am335x_boneblack_defconfig
@@ -0,0 +1,50 @@
+CONFIG_ARM=y
+CONFIG_ARCH_OMAP2PLUS=y
+CONFIG_TI_COMMON_CMD_OPTIONS=y
+CONFIG_AM33XX=y
+CONFIG_SPL=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_EXTRA_OPTIONS="EMMC_BOOT"
+CONFIG_BOOTCOMMAND="if test ${boot_fit} -eq 1; then run update_to_fit; fi; run 
findfdt; run init_console; run envboot; run distro_bootcmd"
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
+CONFIG_VERSION_VARIABLE=y
+CONFIG_ARCH_MISC_INIT=y
+CONFIG_SPL_MUSB_NEW_SUPPORT=y
+# CONFIG_SPL_NAND_SUPPORT is not set
+CONFIG_SPL_OS_BOOT=y
+CONFIG_AUTOBOOT_KEYED=y
+CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n"
+CONFIG_AUTOBOOT_DELAY_STR="d"
+CONFIG_AUTOBOOT_STOP_STR=" "
+CONFIG_CMD_SPL=y
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_DFU_TFTP=y
+CONFIG_DFU_MMC=y
+CONFIG_DFU_RAM=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=1
+CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
+CONFIG_MMC_OMAP_HS=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_MII=y
+CONFIG_DRIVER_TI_CPSW=y
+CONFIG_SPI=y
+CONFIG_OMAP3_SPI=y
+CONFIG_USB=y
+CONFIG_USB_MUSB_HOST=y
+CONFIG_USB_MUSB_GADGET=y
+CONFIG_USB_MUSB_DSPS=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0451
+CONFIG_USB_GADGET_PRODUCT_NUM=0xd022
+CONFIG_USB_ETHER=y
+CONFIG_USBNET_HOST_ADDR="de:ad:be:af:00:00"
+CONFIG_LZO=y
+CONFIG_OF_LIBFDT=y
-- 
2.23.0.rc1

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Re: [U-Boot] [PATCH 2/4] habv4: tools: Avoid hardcoded CSF size for SPL targets

[Breno Matheus Lima]

Hi Peng,

Em qua, 11 de set de 2019 às 22:07, Peng Fan  escreveu:
>
> Hi Breno,
>
> > Subject: [PATCH 2/4] habv4: tools: Avoid hardcoded CSF size for SPL targets
>
> I saw this patch in imx/master, not in Tom's tree. But this patch breaks
> build for other archs, such as arc and etc.
>

Thanks for reporting the issue, I will submit a fix.

Best regards,
Breno Lima
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Re: [U-Boot] Tinker-rk3288 SPL broken with MMC timeout

[Tom Rini]

On Thu, Sep 12, 2019 at 08:55:24AM +0530, Jagan Teki wrote:

> I have seen this even on v2019.07 release, and the only release that
> it got working with on v2019.01 (SPL, BROM_RETURN)
> 
> Any idea? here is the log dump.
> 
> U-Boot TPL 2019.10-rc3-00297-g5ba8b12543 (Sep 12 2019 - 08:50:36)
> Trying to boot from BOOTROM
> Returning to boot ROM...
> 
> U-Boot SPL 2019.10-rc3-00297-g5ba8b12543 (Sep 12 2019 - 08:50:36 +0530)
> Trying to boot from MMC1
> spl: mmc init failed with error: -110
> SPL: failed to boot from all boot devices
> ### ERROR ### Please RESET the board ###

Time to run 'git bisect' since you know when it worked last at least?

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Re: [U-Boot] Why do we need both MDIO and MII commands

[Tom Rini]

On Wed, Sep 11, 2019 at 10:58:22PM +0300, Ramon Fried wrote:

> Hi.
> Marek raised this issue in IRC several weeks ago and I was wondering
> the same. why do we support this two commands which accomplish
> basically the same ?
> 
> Can we ditch the mii comand and move the missing functionality to the
> mdio command ?

Patch that also include a compatibility option would be a good thing to
see, yes.

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[U-Boot] [PATCH 3/3] ubi: Add "skipcheck" command to set/clear this bit in the UBI volume hdr

[Stefan Roese]

U-Boot now supports the "skip_check" flag to optionally skip the CRC
check at open time. Currently its only possible to set this bit upon
UBI volume creation. But it might be very useful to also set this bit
on already installed systems (e.g. field upgrade) to make also use of
the boot-time decrease on those systems.

This patch now adds a new "ubi" command "ubi skipcheck" to set or clear
this bit in the UBI volume header:

=> ubi skipcheck rootfs0 on
Setting skip_check on volume rootfs0

BTW: This saves approx. 10 seconds Linux bootup time on a MT7688 based
target with 128MiB of SPI NAND.

Signed-off-by: Stefan Roese 
Cc: Quentin Schulz 
Cc: Boris Brezillon 
Cc: Heiko Schocher 
---
 cmd/ubi.c | 34 ++
 1 file changed, 34 insertions(+)

diff --git a/cmd/ubi.c b/cmd/ubi.c
index c857f07d93..42b5641b32 100644
--- a/cmd/ubi.c
+++ b/cmd/ubi.c
@@ -419,6 +419,30 @@ static int ubi_dev_scan(struct mtd_info *info, const char 
*vid_header_offset)
return 0;
 }
 
+static int ubi_set_skip_check(char *volume, bool skip_check)
+{
+   struct ubi_vtbl_record vtbl_rec;
+   struct ubi_volume *vol;
+
+   vol = ubi_find_volume(volume);
+   if (vol == NULL)
+   return ENODEV;
+
+   printf("%sing skip_check on volume %s\n",
+  skip_check ? "Sett" : "Clear", volume);
+
+   vtbl_rec = ubi->vtbl[vol->vol_id];
+   if (skip_check) {
+   vtbl_rec.flags |= UBI_VTBL_SKIP_CRC_CHECK_FLG;
+   vol->skip_check = 1;
+   } else {
+   vtbl_rec.flags &= ~UBI_VTBL_SKIP_CRC_CHECK_FLG;
+   vol->skip_check = 0;
+   }
+
+   return ubi_change_vtbl_record(ubi, vol->vol_id, &vtbl_rec);
+}
+
 static int ubi_detach(void)
 {
 #ifdef CONFIG_CMD_UBIFS
@@ -578,6 +602,14 @@ static int do_ubi(cmd_tbl_t *cmdtp, int flag, int argc, 
char * const argv[])
return ubi_remove_vol(argv[2]);
}
 
+   if (strncmp(argv[1], "skipcheck", 9) == 0) {
+   /* E.g., change skip_check flag */
+   if (argc == 4) {
+   skipcheck = strncmp(argv[3], "on", 2) == 0;
+   return ubi_set_skip_check(argv[2], skipcheck);
+   }
+   }
+
if (strncmp(argv[1], "write", 5) == 0) {
int ret;
 
@@ -658,6 +690,8 @@ U_BOOT_CMD(
" - Read volume to address with size\n"
"ubi remove[vol] volume"
" - Remove volume\n"
+   "ubi skipcheck volume on/off"
+   " - Set or clear skip_check flag in volume header\n"
"[Legends]\n"
" volume: character name\n"
" size: specified in bytes\n"
-- 
2.23.0

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[U-Boot] [PATCH 2/3] ubi: Print skip_check in ubi_dump_vol_info()

[Stefan Roese]

It might be interesting, if "skip_check" is set of not, so lets print
this flag in ubi_dump_vol_info() as well.

Signed-off-by: Stefan Roese 
Cc: Quentin Schulz 
Cc: Boris Brezillon 
Cc: Heiko Schocher 
---
 drivers/mtd/ubi/debug.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/mtd/ubi/debug.c b/drivers/mtd/ubi/debug.c
index 0a7427522c..f3d348da83 100644
--- a/drivers/mtd/ubi/debug.c
+++ b/drivers/mtd/ubi/debug.c
@@ -109,6 +109,7 @@ void ubi_dump_vol_info(const struct ubi_volume *vol)
printf("\tlast_eb_bytes   %d\n", vol->last_eb_bytes);
printf("\tcorrupted   %d\n", vol->corrupted);
printf("\tupd_marker  %d\n", vol->upd_marker);
+   printf("\tskip_check  %d\n", vol->skip_check);
 
if (vol->name_len <= UBI_VOL_NAME_MAX &&
strnlen(vol->name, vol->name_len + 1) == vol->name_len) {
-- 
2.23.0

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[U-Boot] [PATCH 1/3] ubi: provide a way to skip CRC checks

[Stefan Roese]

From: Quentin Schulz 

Some users of static UBI volumes implement their own integrity check,
thus making the volume CRC check done at open time useless. For
instance, this is the case when one use the ubiblock + dm-verity +
squashfs combination, where dm-verity already checks integrity of the
block device but this time at the block granularity instead of verifying
the whole volume.

Skipping this test drastically improves the boot-time.

Adapted to U-Boot by Stefan Roese.

Signed-off-by: Quentin Schulz 
Signed-off-by: Stefan Roese 
Cc: Quentin Schulz 
Cc: Boris Brezillon 
Cc: Heiko Schocher 
---
 cmd/ubi.c   | 25 +++--
 drivers/mtd/ubi/kapi.c  |  2 +-
 drivers/mtd/ubi/ubi-media.h |  6 ++
 drivers/mtd/ubi/ubi.h   |  4 
 drivers/mtd/ubi/vmt.c   | 12 
 drivers/mtd/ubi/vtbl.c  |  3 +++
 include/mtd/ubi-user.h  | 18 --
 7 files changed, 61 insertions(+), 9 deletions(-)

diff --git a/cmd/ubi.c b/cmd/ubi.c
index ca5dc9021b..c857f07d93 100644
--- a/cmd/ubi.c
+++ b/cmd/ubi.c
@@ -146,7 +146,8 @@ bad:
return err;
 }
 
-static int ubi_create_vol(char *volume, int64_t size, int dynamic, int vol_id)
+static int ubi_create_vol(char *volume, int64_t size, int dynamic, int vol_id,
+ bool skipcheck)
 {
struct ubi_mkvol_req req;
int err;
@@ -163,7 +164,10 @@ static int ubi_create_vol(char *volume, int64_t size, int 
dynamic, int vol_id)
strcpy(req.name, volume);
req.name_len = strlen(volume);
req.name[req.name_len] = '\0';
-   req.padding1 = 0;
+   req.flags = 0;
+   if (skipcheck)
+   req.flags |= UBI_VOL_SKIP_CRC_CHECK_FLG;
+
/* It's duplicated at drivers/mtd/ubi/cdev.c */
err = verify_mkvol_req(ubi, &req);
if (err) {
@@ -469,6 +473,7 @@ static int do_ubi(cmd_tbl_t *cmdtp, int flag, int argc, 
char * const argv[])
 {
int64_t size = 0;
ulong addr = 0;
+   bool skipcheck = false;
 
if (argc < 2)
return CMD_RET_USAGE;
@@ -527,6 +532,12 @@ static int do_ubi(cmd_tbl_t *cmdtp, int flag, int argc, 
char * const argv[])
/* Use maximum available size */
size = 0;
 
+   /* E.g., create volume with "skipcheck" bit set */
+   if (argc == 7) {
+   skipcheck = strncmp(argv[6], "--skipcheck", 11) == 0;
+   argc--;
+   }
+
/* E.g., create volume size type vol_id */
if (argc == 6) {
id = simple_strtoull(argv[5], NULL, 16);
@@ -555,8 +566,10 @@ static int do_ubi(cmd_tbl_t *cmdtp, int flag, int argc, 
char * const argv[])
printf("No size specified -> Using max size (%lld)\n", 
size);
}
/* E.g., create volume */
-   if (argc == 3)
-   return ubi_create_vol(argv[2], size, dynamic, id);
+   if (argc == 3) {
+   return ubi_create_vol(argv[2], size, dynamic, id,
+ skipcheck);
+   }
}
 
if (strncmp(argv[1], "remove", 6) == 0) {
@@ -623,7 +636,7 @@ static int do_ubi(cmd_tbl_t *cmdtp, int flag, int argc, 
char * const argv[])
 }
 
 U_BOOT_CMD(
-   ubi, 6, 1, do_ubi,
+   ubi, 7, 1, do_ubi,
"ubi commands",
"detach"
" - detach ubi from a mtd partition\n"
@@ -634,7 +647,7 @@ U_BOOT_CMD(
" - Display volume and ubi layout information\n"
"ubi check volumename"
" - check if volumename exists\n"
-   "ubi create[vol] volume [size] [type] [id]\n"
+   "ubi create[vol] volume [size] [type] [id] [--skipcheck]\n"
" - create volume name with size ('-' for maximum"
" available size)\n"
"ubi write[vol] address volume size"
diff --git a/drivers/mtd/ubi/kapi.c b/drivers/mtd/ubi/kapi.c
index 2e171b0209..bcea71b1b2 100644
--- a/drivers/mtd/ubi/kapi.c
+++ b/drivers/mtd/ubi/kapi.c
@@ -196,7 +196,7 @@ struct ubi_volume_desc *ubi_open_volume(int ubi_num, int 
vol_id, int mode)
desc->mode = mode;
 
mutex_lock(&ubi->ckvol_mutex);
-   if (!vol->checked) {
+   if (!vol->checked && !vol->skip_check) {
/* This is the first open - check the volume */
err = ubi_check_volume(ubi, vol_id);
if (err < 0) {
diff --git a/drivers/mtd/ubi/ubi-media.h b/drivers/mtd/ubi/ubi-media.h
index bd7a580961..4af85c4247 100644
--- a/drivers/mtd/ubi/ubi-media.h
+++ b/drivers/mtd/ubi/ubi-media.h
@@ -48,6 +48,11 @@ enum {
  * Volume flags used in the volume table record.
  *
  * @UBI_VTBL_AUTORESIZE_FLG: auto-resize this volume
+ * @UBI_VTBL_SKIP_CRC_CHECK_FLG: skip the CRC check done on a static volume at
+ *  open time. Should only be set on volumes that
+ *  

Re: [U-Boot] OMAP watchdog timer reset on BBB

[Stefan Roese]

Hi Sam,

On 12.09.19 15:45, Sam Protsenko wrote:

Hi Suniel,

After transition to DM WDT, watchdog timer on BeagleBone Black resets
the board after 1 minute or so. I'm using this defconfig: [1]. After
disabling CONFIG_WDT and CONFIG_WATCHDOG options the board doesn't
reset. I guess it might be happening on other boards using
CONFIG_WDT_OMAP3 as well. The issue can be reproduced by stopping in
U-Boot shell (=>) and waiting for 1 minute.

Do you know by chance why it might be happening, or maybe some fix
already exists?

Thanks!

[1] https://pastebin.ubuntu.com/p/Zz5bY6cYXS/


So you have enabled the watchdog and should see something like this
upon bootup:

WDT:   Started without servicing (60s timeout)

Is this correct? Then you need to enable the U-Boot internal WDT
servicing by enabling CONFIG_WATCHDOG as well, as this will
result in the internal U-Boot servicing of the watchdog. Then
you should see this upon bootup and no reset will appear in
U-Boot:

WDT:   Started with servicing (60s timeout)

Does this help?

Thanks,
Stefan
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Re: [U-Boot] Pull request: u-boot-rockchip-20190912

[Tom Rini]

On Thu, Sep 12, 2019 at 09:32:00AM +0800, Kever Yang wrote:

> Hi Tom,
> 
> Please pull the rockchip update:
> - add idbloader.img target for rockchip tpl+spl;
> - usb ehci/ohci: go on process if clock driver don't have clk_enable();
> - remove clk_enable() for rockchip clock drivers;
> - add boot order for rockpro64
> 
> Gitlab CI:
> https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip/pipelines/652
> 
> Thanks,
> - Kever
> 
> The following changes since commit 001c8ea94ae710d8340829237a7d788b25ce2ae7:
> 
>   Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86 (2019-09-10 
> 08:52:00 -0400)
> 
> are available in the Git repository at:
> 
>   https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip.git 
> tags/u-boot-rockchip-20190912
> 
> for you to fetch changes up to 326b2624192336c99ba18d5151b51d0c07c23193:
> 
>   doc: lion_rk3368: use idbloader.img for rk3368 (2019-09-11 16:16:12 +0800)
> 

Applied to u-boot/master, thanks!

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Re: [U-Boot] OMAP watchdog timer reset on BBB

[Grygorii Strashko]

CC: Lokesh

On 12/09/2019 16:45, Sam Protsenko wrote:

Hi Suniel,

After transition to DM WDT, watchdog timer on BeagleBone Black resets
the board after 1 minute or so. I'm using this defconfig: [1]. After
disabling CONFIG_WDT and CONFIG_WATCHDOG options the board doesn't
reset. I guess it might be happening on other boards using
CONFIG_WDT_OMAP3 as well. The issue can be reproduced by stopping in
U-Boot shell (=>) and waiting for 1 minute.

Do you know by chance why it might be happening, or maybe some fix
already exists?

Thanks!

[1] https://pastebin.ubuntu.com/p/Zz5bY6cYXS/
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Re: [U-Boot] nxp: HABv4 secure boot on iMX7 NAND broken

[Igor Opaniuk]

Hy Bryan, Breno,

On Tue, Jul 30, 2019 at 5:33 PM Bryan O'Donoghue
 wrote:
>
>
>
> On 30/07/2019 15:26, Igor Opaniuk wrote:
> > Anyway, let me go through this article one more time,
> > and I'll get back to you.
>
> If I've understood you, you are using the same binary for serial
> download and flash booting.
>
> Won't work unfortunately - there's an extra DCD directive in the
> recovery image.
>
> Here's my recovery CSF
>
> deckard@event-horizon:~/Development/mbl-u-boot$ cat uboot-c-s-f-recover.txt
> # SPDX-License-Identifier:  GPL-2.0
> [Header]
> Version = 4.1
> Security Configuration = Open
> Hash Algorithm = sha256
> Engine Configuration = 0
> Certificate Format = X509
> Signature Format = CMS
> Engine = CAAM
>
> [Install SRK]
> File = "SRK_1_2_3_4_table.bin"
> Source index = 0
>
> [Install CSFK]
> File = "CSF1_1_sha256_2048_65537_v3_usr_crt.pem"
>
> [Authenticate CSF]
>
> [Install Key]
> # Key slot index used to authenticate the key to be installed
> Verification index = 0
> # Key to install
> Target index = 2
> File = "IMG1_1_sha256_2048_65537_v3_usr_crt.pem"
>
> [Authenticate Data]
> Verification index = 2
> Blocks = HAB_BLOCKS_REPLACE "IMAGE_IMX_HAB_NAME_REPLACE"
>
> [Authenticate Data]
> Verification index = 2
> Blocks = DCD_BLOCKS_REPLACE "IMAGE_IMX_DCD_NAME_REPLACE"
>
> and my eMMC CSF
>
> deckard@event-horizon:~/Development/mbl-u-boot$ cat uboot-c-s-f.txt
> # SPDX-License-Identifier:  GPL-2.0
> [Header]
> Version = 4.1
> Security Configuration = Open
> Hash Algorithm = sha256
> Engine Configuration = 0
> Certificate Format = X509
> Signature Format = CMS
> Engine = CAAM
>
> [Install SRK]
> File = "SRK_1_2_3_4_table.bin"
> Source index = 0
>
> [Install CSFK]
> File = "CSF1_1_sha256_2048_65537_v3_usr_crt.pem"
>
> [Authenticate CSF]
>
> [Install Key]
> # Key slot index used to authenticate the key to be installed
> Verification index = 0
> # Key to install
> Target index = 2
> File = "IMG1_1_sha256_2048_65537_v3_usr_crt.pem"
>
> [Authenticate Data]
> Verification index = 2
> Blocks = HAB_BLOCKS_REPLACE "IMAGE_IMX_HAB_NAME_REPLACE"

So I've finally got back to this issue.
I've spent some time digging into links you provided and
 `Secure Boot on i.MX 50, i.MX 53, i.MX 6 and i.MX 7 Series using HABv4` doc
from NXP [1]. Some observations/statements I made (correct me if I'm
wrong) + questions:

1. Based on information from [1],  if SRK isn't fused and device isn't "closed",
BootROM HABv4 component actually doesn't care about CSF region at all.
In case if SRK is fused, but device is still in "open" state, it
performs verification of
binary (IVT + Boot Data + DCD Table + U-boot itself), but it continue loading
U-boot  regardless of the verification results (but in case of invalid signature
we will  observe HABv4 events by running `hab_status`). Is it correct?

2. I tried to boot U-boot on i.MX7D rev1.3 NAND with concatenated CSF binary
built using the configuration file you provided and without it (no
fuses are fused) -
in both cases it doesn't boot.

3. When `CSF` CMD is removed from imximage.cfg, the image starts booting,
so obviosly I assumed that something was wrong with IMX image layout
and how it's
stored in OCRAM. After analizing IVT table values and input from mkimage for the
final u-boot-dtb.imx, found out that DCD table is loaded to 0x0091 (OCRAM):

Image Type:   Freescale IMX Boot Image
Image Ver:2 (i.MX53/6/7 compatible)
Mode: DCD
Data Size:659456 Bytes = 644.00 KiB = 0.63 MiB
Load Address: 877ff420
Entry Point:  8780
HAB Blocks:   0x877ff400 0x 0x0009cc00
DCD Blocks:   0x0091 0x002c 0x01b4
   

In [1] F.1. Signing code downloadable with the manufacturing tool from the
document about Secure Boot, found the NOTE which says:

"Due to an issue with i.MX7D Rev D, the first 4K of OCRAM is not
available during boot time, on this case users must set the image start
address greater or equal to 0x911000. For more details please check
E11166 in Mask Set Errata for Mask 3N09P."

E11166 description in [2]:
"e11166: OCRAM: The first 4K of OCRAM (0x91 - 0x910fff) is not
available during
boot time

Description: The first 4K of OCRAM (0x91 – 0x910fff) is not available
during boot time which effects plug-ins and custom boot images.Using
this space may
cause image corruption during boot time. At time of boot failure, the system may
enter into serial download mode.

Workaround: Users must set the boot or plugin image start address greater or
equal to 0x911000 (if the boot image or plug-in is running in OCRAM).
Alternatively,
users can use a boot/plugin image load address in the external DDR
memory instead of
the internal OCRAM."

Could it be the root cause why I'm facing this issue?

4. BTW,  is there any publicly available information about analysis of
BootROM log buffer
that can be obtained by reading data pointed by Log Buffer Pointer (at
0x01E0)
on iMX7?

[1] https://www.nxp.com/docs/en/application-note/AN4581.

[U-Boot] OMAP watchdog timer reset on BBB

[Sam Protsenko]

Hi Suniel,

After transition to DM WDT, watchdog timer on BeagleBone Black resets
the board after 1 minute or so. I'm using this defconfig: [1]. After
disabling CONFIG_WDT and CONFIG_WATCHDOG options the board doesn't
reset. I guess it might be happening on other boards using
CONFIG_WDT_OMAP3 as well. The issue can be reproduced by stopping in
U-Boot shell (=>) and waiting for 1 minute.

Do you know by chance why it might be happening, or maybe some fix
already exists?

Thanks!

[1] https://pastebin.ubuntu.com/p/Zz5bY6cYXS/
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Re: [U-Boot] [EXT] Re: [PATCH 1/6] spi: fsl_qspi: Fix DDR mode setting for latest iMX platforms

[Stefan Roese]

Hi Ashish,

On 12.09.19 07:03, Ashish Kumar wrote:




Please suggest way forward. How to correct this issue?


The first thigh would be to make sure the Linux driver works for all
platforms and then do the porting to U-Boot. I will be out of office
for
10 days. After that I can try to work on this, but I need support
and testing for other platforms. I only have i.MX6UL/ULL.


Hi Frieder,

I have found some break though after porting to 2019.10 and few

modification in driver code, I will update in a weeks' time. Please  do not
invest time on this.

If I need some help I will update.


Thanks for your work. Do you already have some news? Can you share
your results?


I'm most likely currently running in similar issues on tests with the i.MX6ULL
EVK. QSPI does not work reliably. So before digging deeper into the QSPI
driver, I wanted to check on the status of any updates in the driver. Is there
anything available that I could use for testing already?

Hi Stefan,  Frieder,

The spi-mem version is still under debug, I could make it working
for ls1088rdb, ls1046rdb, but it is failing for
ls1012ardb and ls2088ardb and untested for i.mx and other Layerscape
silicon/boards . It is derived from work done by Frieder earlier.
This version can be found here:
https://github.com/erashish007/u-boot-spi-mem/tree/spi-mem-port


Many thanks. I did some tests with this version and it seems to work
fine in general on the i.MX6ULL EVK. My first tests show that reading
and writing has no issues. So this is very promising. The only thing
I noticed is, that when using SPI for environment via
CONFIG_ENV_IS_IN_SPI_FLASH, the board hangs upon bootup while trying
to read the env. Since you already added some debug print's to the
env code, I suspect that you also did run into this problem.

I'll try to help with this driver version. At least I can debug this
env issue and can always do some test on my mx6ull platform for you
once you have any updates here. Just let me know.
 

There is completely working version of fsl_qspi.c based on old xfer
method, which was not accepted  in upstream,
considering it is recommended to migrate to spi-mem frame. This
version is located here:
https://github.com/erashish007/u-boot-spi-mem/tree/xfer_wrking


This one does not work for me on the i.MX6ULL EVK. "sf read" command
returns almost immediately and the data is not read as it seems. I
did not dig into this deeper though.

Thanks,
Stefan
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Re: [U-Boot] [PATCH V2] ARM: dts: imx6q-logicpd: Add missing imx6q-logicpd-u-boot for SPL

[Adam Ford]

On Mon, Aug 19, 2019 at 8:22 AM Adam Ford  wrote:
>
> On Wed, Aug 7, 2019 at 10:16 AM Adam Ford  wrote:
> >
> > The SPL device tree is missing the entires for gpio1, uart1, usdhc1 and
> > usdhc2.  This creates the missing imx6q-logicpd-u-boot.dtsi file
> > which will enable these functions so SPL can properly setup UART, detect
> > microSD card, and startup.
> >
>
> Stefano / Tom,
>
> Is there any way we can pull this in for the next RC candidate?
> Without this patch, the imx6_logic boards are broken because I forgot
> to include this file in my original patch when I enabled
> SPL_OF_CONTROL.
>  We can disregard the original patch for this V2 if helps clean up the
> to-do list in patchwork.
>

Pretty please, with sugar on top, can this patch be applied?

My board does not start without it, because I forgot to include it
when I converted to use SPL_OF_CONTROL


> thank you,
>
> adam
>
> > Fixes: 8f4691e31a18 ("ARM: imx6q_logic: With SPL_OF_CONTROL enabled,
> > remove MMC init")
> >
> > Signed-off-by: Adam Ford 
> > ---
> > V2:  Update MAINTAINER
> >  Remove unnecessary empty node.
> >  Update subject to reflect this was missing to imply it should have 
> > been there before.
> >
> > diff --git a/arch/arm/dts/imx6q-logicpd-u-boot.dtsi 
> > b/arch/arm/dts/imx6q-logicpd-u-boot.dtsi
> > new file mode 100644
> > index 00..625bed8f7d
> > --- /dev/null
> > +++ b/arch/arm/dts/imx6q-logicpd-u-boot.dtsi
> > @@ -0,0 +1,18 @@
> > +// SPDX-License-Identifier: GPL-2.0+
> > +/*
> > + * Copyright (C) 2019 Logic PD 
> > + */
> > +
> > +#include "imx6qdl-u-boot.dtsi"
> > +
> > +&uart1 {
> > +   u-boot,dm-spl;
> > +};
> > +
> > +&usdhc1 {
> > +   u-boot,dm-spl;
> > +};
> > +
> > +&usdhc2 {
> > +   u-boot,dm-spl;
> > +};
> > diff --git a/board/logicpd/imx6/MAINTAINERS b/board/logicpd/imx6/MAINTAINERS
> > index 20ec5918e4..4280315269 100644
> > --- a/board/logicpd/imx6/MAINTAINERS
> > +++ b/board/logicpd/imx6/MAINTAINERS
> > @@ -7,3 +7,4 @@ F: configs/imx6q_logic_defconfig
> >  F: arch/arm/dts/imx6-logicpd-baseboard.dtsi
> >  F: arch/arm/dts/imx6-logicpd-som.dtsi
> >  F: arch/arm/dts/imx6q-logicpd.dts
> > +F: arch/arm/dts/imx6q-logicpd-u-boot.dtsi
> > --
> > 2.17.1
> >
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Re: [U-Boot] Regressions in MTD / SPI FLASH

[Eugeniy Paltsev]

Hi Vignesh,

I doesn't have access to board with n25q512ax3 currently, however I can test 
this on Monday (16.09)

---
 Eugeniy Paltsev



From: Vignesh Raghavendra 
Sent: Tuesday, September 10, 2019 15:27
To: Eugeniy Paltsev; Jagan Teki
Cc: u-boot@lists.denx.de; Alexey Brodkin; tr...@konsulko.com; 
uboot-snps-...@synopsys.com
Subject: Re: [U-Boot] Regressions in MTD / SPI FLASH

Hi Eugeniy,

One more request:

I am trying to find a better way to identify parts that don't support
4byte addressing.

Could you enable CONFIG_SPI_FLASH_SFDP_SUPPORT and also enable debug
prints in spi_mem_exec_op() (in drivers/spi/spi-mem.c like before) and
provide logs?

Just logs of "sf probe" should be sufficient.

Regards
Vignesh

On 10/09/19 5:24 PM, Vignesh Raghavendra wrote:
>
>
> On 10/09/19 5:11 PM, Eugeniy Paltsev wrote:
>> Hi Vignesh,
>>
>> that patch helps - both erase and  write works fine.
>>
>
> Thanks for testing! I will cleanup the patches and send formal patches
> to the list with your tested by.
>
> Regards
> Vignesh
>
>> For n25q512ax3:
>> Tested-by: "Eugeniy Paltsev "
>>
>> ---
>>  Eugeniy Paltsev
>>
>>
>> 
>> From: Vignesh Raghavendra 
>> Sent: Tuesday, September 10, 2019 08:07
>> To: Eugeniy Paltsev; Jagan Teki
>> Cc: u-boot@lists.denx.de; uboot-snps-...@synopsys.com; Alexey Brodkin; 
>> tr...@konsulko.com
>> Subject: Re: Regressions in MTD / SPI FLASH
>>
>> Hi,
>>
>> On 10/09/19 12:18 AM, Eugeniy Paltsev wrote:
>>> Hi!
>>> Comments are inlined:
>>>
 On 04/09/19 11:37 PM, Eugeniy Paltsev wrote:
> We faced with regressions caused by
> commit c4e8862308d4 (mtd: spi: Switch to new SPI NOR framework)
> This switch was performed by removing entire u-boot spi-flash
> core implementation and copying it from another project.
> However the switch is performed without proper testing and
> investigations about fixes/improvements were made in u-boot
> spi-flash core. This results in regressions.
>

 Apologies for the trouble...
 As stated in cover letter, this change was necessary as U-Boot SPI flash
 stack at that time did not features such as 4 byte addressing, SFDP
 parsing, SPI controllers with MMIO interfaces etc. Also there was need
 to move to SPI MEM framework to support both SPI NAND and SPI NOR
 flashes using a single SPI controller drivers.
 I have to disagree on the part that there was no proper testing... As
 evident from mailing list archives, patch series was reviewed by
 multiple reviewers and tested on their platforms as well...
 Unfortunately its impossible to get all boards owners to test it.
>>>
>>> I'm not talking about getting all customers board and testing changes on 
>>> them.
>>> It could be done another way - i.e. like it is done for u-boot driver-model 
>>> migration:
>>> by introducing the option for choosing which stack will be used and allow 
>>> customers
>>> to switch the flash IC they use to new stack until some deadline.
>>>
>>
>> I did start off with this. But maintaining two stacks is too cumbersome
>> and adds to code size (which is a big factor for SPL stage)
>>
>>
> One of regression we faced with is related to SST26 flash series which
> is used on HSDK board. The cause is that SST26 protection ops
> implementation was dropped. The fix of this regression is send
> as a patch in this series.
>

 I retained most U-Boot specific code as is (like support for BANK
 address registers, restriction in transfer sizes) but I somehow
 overlooked this part. Sorry for that

> However there are another regressions. I.E: we also faced with broken
> SPI flash on another SNPS boards - AXS101 and AXS103. They use different
> flash IC (n25q512ax3) and I didn't investigate the cause yet.
>

 Could you provide more details here:
 What exactly fails? Is the detected correctly? Does reads work fine? Is
 Erase or Write broken?
>>>
>>> It seems to me that something is wrong with protection ops.
>>> The erase and write finish without errors however nothing actually happens.
>>>
>>
>> I doubt so, because if the blocks were protected, erase/write would have 
>> failed
>> and Read status/Read flag status register should have reported error values.
>> Anyways, I guess I found a wrt how 4 Byte addressing is handled wrt n25q512* 
>> series.
>>
>> Could you try with below patch helps[1]?
>> If not please provide logs similar what you have provide now.
>>
>> If below patch does not help, then please try enabling CONFIG_SPI_FLASH_BAR 
>> and see if that helps.
>>
>> [1]
>>
>> ---8<-
>>
>> From 1de4c447cd4b2590c98f9ceccf8ed32029b42d36 Mon Sep 17 00:00:00 2001
>> From: Vignesh Raghavendra 
>> Date: Tue, 10 Sep 2019 10:25:17 +0530
>> Subject: [TST PATCH] mtd: spi: spi-nor-ids: Disable SPI_NOR_4B_OPCODES
>>
>> Not all variants of n25q256* and n25q512* support 4 Byte stateless
>> addre

[U-Boot] [PATCH] net: xilinx_axiemac: Fill the phy node pointer in phydev

[Michal Simek]

From: Siva Durga Prasad Paladugu 

This patch assings the phynode pointer to the phydev node as it is needed
later in the corresponding phy driver to read phy properties from DT.

Signed-off-by: Siva Durga Prasad Paladugu 
Signed-off-by: Michal Simek 
---

This feature is present in these drivers:
drivers/net/ti/am65-cpsw-nuss.c:573:phydev->node = priv->phy_node;
drivers/net/ti/cpsw.c:853:  phydev->node = 
offset_to_ofnode(slave->data->phy_of_handle);
drivers/net/ti/keystone_net.c:594:  priv->phydev->node = 
offset_to_ofnode(priv->phy_of_handle);
drivers/net/zynq_gem.c:322: priv->phydev->node = priv->phy_of_node;
---
 drivers/net/xilinx_axi_emac.c | 7 ++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/net/xilinx_axi_emac.c b/drivers/net/xilinx_axi_emac.c
index 26c21c6d70fa..36d651109cbc 100644
--- a/drivers/net/xilinx_axi_emac.c
+++ b/drivers/net/xilinx_axi_emac.c
@@ -93,6 +93,7 @@ struct axidma_priv {
struct phy_device *phydev;
struct mii_dev *bus;
u8 eth_hasnobuf;
+   int phy_of_handle;
 };
 
 /* BD descriptors */
@@ -276,6 +277,8 @@ static int axiemac_phy_init(struct udevice *dev)
phydev->supported &= supported;
phydev->advertising = phydev->supported;
priv->phydev = phydev;
+   if (priv->phy_of_handle)
+   priv->phydev->node = offset_to_ofnode(priv->phy_of_handle);
phy_config(phydev);
 
return 0;
@@ -736,8 +739,10 @@ static int axi_emac_ofdata_to_platdata(struct udevice *dev)
priv->phyaddr = -1;
 
offset = fdtdec_lookup_phandle(gd->fdt_blob, node, "phy-handle");
-   if (offset > 0)
+   if (offset > 0) {
priv->phyaddr = fdtdec_get_int(gd->fdt_blob, offset, "reg", -1);
+   priv->phy_of_handle = offset;
+   }
 
phy_mode = fdt_getprop(gd->fdt_blob, node, "phy-mode", NULL);
if (phy_mode)
-- 
2.17.1

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Re: [U-Boot] [PATCH 0/3] Support distro boot in pico-imx7d BL33 case

[Jun Nie]

Peng Fan  于2019年9月11日周三 下午2:02写道：
>
>
>
> > -Original Message-
> > From: Jun Nie 
> > Sent: 2019年9月9日 21:47
> > To: Peng Fan 
> > Cc: Stefano Babic ; Fabio Estevam ;
> > Otavio Salvador ; Vanessa Maegima
> > ; Bryan O'Donoghue
> > ; U-Boot Mailing List 
> > Subject: Re: [PATCH 0/3] Support distro boot in pico-imx7d BL33 case
> >
> > Peng Fan  于2019年9月3日周二 上午9:39写道：
> > >
> > > Hi Jun,
> > >
> > > > Subject: Re: [PATCH 0/3] Support distro boot in pico-imx7d BL33 case
> > > >
> > > > Jun Nie  于2019年8月8日周四 下午12:04写道：
> > > > >
> > > > > Jun Nie  于2019年7月16日周二 下午3:43写
> > 道：
> > > > > >
> > > > > > Support distro boot in pico-imx7d BL33 case with changing the
> > > > > > enviroment variables. While the other two patches are for
> > > > > > polishing clock code and for feature enablement.
> > > > > >
> > > > > > Jun Nie (3):
> > > > > >   pico-imx7d: add config to enable CAAM
> > > > > >   pico-imx7d: Support distro boot for FIT image case
> > > > > >   pico-imx7d: polish uart clock id definition
> > > > > >
> > > > > >  arch/arm/include/asm/arch-mx7/clock.h | 18 +
> > > > > >  configs/pico-imx7d_bl33_defconfig |  1 +
> > > > > >  include/configs/pico-imx7d.h  | 37
> > > > +++
> > > > > >  3 files changed, 13 insertions(+), 43 deletions(-)
> > > > > >
> > > > > > --
> > > > >
> > > > > Hi Vanessa,
> > > > >
> > > > > Do you have any comments on these 3 patches? Or we can merge it
> > now?
> > > > Thanks!
> > > > >
> > > > > Best Regards
> > > > > Jun
> > > >
> > > > Hi,
> > > >
> > > > Does anyone has comments on these patches? Maybe we can merge them
> > > > as no comments for a long time. Thanks!
> > >
> > > I could merge this patchset into nxp-imx and send pull request to
> > > Stefano, if you are fine with that.
> > >
> > > Regards,
> > > Peng.
> >
> > Peng,
> >
> > It is appreciated to help on this. Any comments from Stefan? Thanks!
>
> CI build failed:
> https://travis-ci.org/MrVan/u-boot/jobs/583445551
> I need drop your patchset.
>
> Thanks,
> Peng.

Thanks for the result. Can you help to only drop the patch for
polishing clock? The three patches are not tightly coupled actually.

Regards,
Jun

>
> >
> > Regards,
> > Jun
> > >
> > > >
> > > > Regards,
> > > > Jun
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[U-Boot] [PATCH] gpio: fix issue in set gpio output direction

[Michal Simek]

From: Ashok Reddy Soma 

This patch fixes zynq_gpio_direction() to call driver specific
zynq_gpio_set_value function rather than top level gpio_set_value.

Signed-off-by: Ashok Reddy Soma 
Signed-off-by: Michal Simek 
---

 drivers/gpio/zynq_gpio.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpio/zynq_gpio.c b/drivers/gpio/zynq_gpio.c
index 55a5cba0688e..a760c5bdda68 100644
--- a/drivers/gpio/zynq_gpio.c
+++ b/drivers/gpio/zynq_gpio.c
@@ -292,7 +292,7 @@ static int zynq_gpio_direction_output(struct udevice *dev, 
unsigned gpio,
writel(reg, platdata->base + ZYNQ_GPIO_OUTEN_OFFSET(bank_num));
 
/* set the state of the pin */
-   gpio_set_value(gpio, value);
+   zynq_gpio_set_value(dev, gpio, value);
return 0;
 }
 
-- 
2.17.1

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[U-Boot] [PATCH v4 17/17] arm: socfpga: agilex: Enable Agilex SoC build

[Ley Foon Tan]

Add build support for Agilex SoC.

Signed-off-by: Ley Foon Tan 
Reviewed-by: Simon Goldschmidt 

---
v3:
- Disable CONFIG_USE_TINY_PRINTF

v2:
- Remove IC_CLK define, use clock DM method to get i2c clock
- Change CONFIG_ENV_SIZE to 4KB since CONFIG_SPI_FLASH_USE_4K_SECTORS is 
enabled.
---
 arch/arm/Kconfig   |   4 +-
 arch/arm/mach-socfpga/Kconfig  |  15 ++
 arch/arm/mach-socfpga/Makefile |   9 ++
 configs/socfpga_agilex_defconfig   |  59 +++
 include/configs/socfpga_agilex_socdk.h | 207 +
 5 files changed, 292 insertions(+), 2 deletions(-)
 create mode 100644 configs/socfpga_agilex_defconfig
 create mode 100644 include/configs/socfpga_agilex_socdk.h

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 3b0e315061..e6c9d19968 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -888,7 +888,7 @@ config ARCH_SOCFPGA
bool "Altera SOCFPGA family"
select ARCH_EARLY_INIT_R
select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
-   select ARM64 if TARGET_SOCFPGA_STRATIX10
+   select ARM64 if TARGET_SOCFPGA_STRATIX10 || TARGET_SOCFPGA_AGILEX
select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
select DM
select DM_SERIAL
@@ -900,7 +900,7 @@ config ARCH_SOCFPGA
select SPL_LIBGENERIC_SUPPORT
select SPL_NAND_SUPPORT if SPL_NAND_DENALI
select SPL_OF_CONTROL
-   select SPL_SEPARATE_BSS if TARGET_SOCFPGA_STRATIX10
+   select SPL_SEPARATE_BSS if TARGET_SOCFPGA_STRATIX10 || 
TARGET_SOCFPGA_AGILEX
select SPL_SERIAL_SUPPORT
select SPL_SYSRESET
select SPL_WATCHDOG_SUPPORT
diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig
index 1d914648e3..b64477a081 100644
--- a/arch/arm/mach-socfpga/Kconfig
+++ b/arch/arm/mach-socfpga/Kconfig
@@ -26,6 +26,14 @@ config SYS_TEXT_BASE
default 0x0140 if TARGET_SOCFPGA_ARRIA10
default 0x0140 if TARGET_SOCFPGA_GEN5
 
+config TARGET_SOCFPGA_AGILEX
+   bool
+   select ARMV8_MULTIENTRY
+   select ARMV8_SET_SMPEN
+   select ARMV8_SPIN_TABLE
+   select CLK
+   select SPL_CLK if SPL
+
 config TARGET_SOCFPGA_ARRIA5
bool
select TARGET_SOCFPGA_GEN5
@@ -72,6 +80,10 @@ choice
prompt "Altera SOCFPGA board select"
optional
 
+config TARGET_SOCFPGA_AGILEX_SOCDK
+   bool "Intel SOCFPGA SoCDK (Agilex)"
+   select TARGET_SOCFPGA_AGILEX
+
 config TARGET_SOCFPGA_ARIES_MCVEVK
bool "Aries MCVEVK (Cyclone V)"
select TARGET_SOCFPGA_CYCLONE5
@@ -132,6 +144,7 @@ config TARGET_SOCFPGA_TERASIC_SOCKIT
 endchoice
 
 config SYS_BOARD
+   default "agilex-socdk" if TARGET_SOCFPGA_AGILEX_SOCDK
default "arria5-socdk" if TARGET_SOCFPGA_ARRIA5_SOCDK
default "arria10-socdk" if TARGET_SOCFPGA_ARRIA10_SOCDK
default "cyclone5-socdk" if TARGET_SOCFPGA_CYCLONE5_SOCDK
@@ -148,6 +161,7 @@ config SYS_BOARD
default "vining_fpga" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA
 
 config SYS_VENDOR
+   default "intel" if TARGET_SOCFPGA_AGILEX_SOCDK
default "altera" if TARGET_SOCFPGA_ARRIA5_SOCDK
default "altera" if TARGET_SOCFPGA_ARRIA10_SOCDK
default "altera" if TARGET_SOCFPGA_CYCLONE5_SOCDK
@@ -165,6 +179,7 @@ config SYS_SOC
default "socfpga"
 
 config SYS_CONFIG_NAME
+   default "socfpga_agilex_socdk" if TARGET_SOCFPGA_AGILEX_SOCDK
default "socfpga_arria5_socdk" if TARGET_SOCFPGA_ARRIA5_SOCDK
default "socfpga_arria10_socdk" if TARGET_SOCFPGA_ARRIA10_SOCDK
default "socfpga_cyclone5_socdk" if TARGET_SOCFPGA_CYCLONE5_SOCDK
diff --git a/arch/arm/mach-socfpga/Makefile b/arch/arm/mach-socfpga/Makefile
index 9d334e9e1b..30c87b1efd 100644
--- a/arch/arm/mach-socfpga/Makefile
+++ b/arch/arm/mach-socfpga/Makefile
@@ -41,6 +41,14 @@ endif
 
 ifdef CONFIG_TARGET_SOCFPGA_AGILEX
 obj-y  += clock_manager_agilex.o
+obj-y  += mailbox_s10.o
+obj-y  += misc_s10.o
+obj-y  += mmu-arm64_s10.o
+obj-y  += reset_manager_s10.o
+obj-y  += system_manager_s10.o
+obj-y  += timer_s10.o
+obj-y  += wrap_pinmux_config_s10.o
+obj-y  += wrap_pll_config_s10.o
 endif
 
 ifdef CONFIG_SPL_BUILD
@@ -60,6 +68,7 @@ obj-y += spl_s10.o
 endif
 ifdef CONFIG_TARGET_SOCFPGA_AGILEX
 obj-y  += ccu_agilex.o
+obj-y  += firewall.o
 obj-y  += spl_agilex.o
 endif
 endif
diff --git a/configs/socfpga_agilex_defconfig b/configs/socfpga_agilex_defconfig
new file mode 100644
index 00..daf71ff0eb
--- /dev/null
+++ b/configs/socfpga_agilex_defconfig
@@ -0,0 +1,59 @@
+CONFIG_ARM=y
+CONFIG_ARCH_SOCFPGA=y
+CONFIG_SYS_TEXT_BASE=0x1000
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_NR_DRAM_BANKS=2
+CONFIG_TARGET_SOCFPGA_AGILEX_SOCDK=y
+CONFIG_IDENT_STRING="socfpga_agilex"
+CONFIG_SPL_FS_FAT=y
+CONFIG_SPL_TEXT_BASE=0xFFE0
+CONFIG_BOOTDELAY=5
+CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x3c0
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_PROMPT="SOCFPGA_AGILEX # "
+CONFIG_CMD_MEMTEST=y
+# CONFIG_CMD_FLASH

[U-Boot] [PATCH v4 13/17] ddr: altera: agilex: Add SDRAM driver for Agilex

[Ley Foon Tan]

Add SDRAM driver for Agilex SoC.

Signed-off-by: Tien Fong Chee 
Signed-off-by: Ley Foon Tan 

---
v4:
- Fixed checkpatch warnings

v3:
- Use sdmmc_soc64.*
- Change compatible string to use "intel" (intel,sdr-ctl-agilex).
- Improve error handing if DDR size mismatched.
---
 drivers/ddr/altera/Kconfig|   6 +-
 drivers/ddr/altera/Makefile   |   1 +
 drivers/ddr/altera/sdram_agilex.c | 168 ++
 drivers/ddr/altera/sdram_soc64.h  |   1 +
 4 files changed, 173 insertions(+), 3 deletions(-)
 create mode 100644 drivers/ddr/altera/sdram_agilex.c

diff --git a/drivers/ddr/altera/Kconfig b/drivers/ddr/altera/Kconfig
index 2b1c1be3b5..8f590dc5f6 100644
--- a/drivers/ddr/altera/Kconfig
+++ b/drivers/ddr/altera/Kconfig
@@ -1,8 +1,8 @@
 config SPL_ALTERA_SDRAM
bool "SoCFPGA DDR SDRAM driver in SPL"
depends on SPL
-   depends on TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10 || 
TARGET_SOCFPGA_STRATIX10
-   select RAM if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_STRATIX10
-   select SPL_RAM if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_STRATIX10
+   depends on TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10 || 
TARGET_SOCFPGA_STRATIX10 || TARGET_SOCFPGA_AGILEX
+   select RAM if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_STRATIX10 || 
TARGET_SOCFPGA_AGILEX
+   select SPL_RAM if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_STRATIX10 || 
TARGET_SOCFPGA_AGILEX
help
  Enable DDR SDRAM controller for the SoCFPGA devices.
diff --git a/drivers/ddr/altera/Makefile b/drivers/ddr/altera/Makefile
index eb8da13b7d..39dfee5d5a 100644
--- a/drivers/ddr/altera/Makefile
+++ b/drivers/ddr/altera/Makefile
@@ -10,4 +10,5 @@ ifdef CONFIG_$(SPL_)ALTERA_SDRAM
 obj-$(CONFIG_TARGET_SOCFPGA_GEN5) += sdram_gen5.o sequencer.o
 obj-$(CONFIG_TARGET_SOCFPGA_ARRIA10) += sdram_arria10.o
 obj-$(CONFIG_TARGET_SOCFPGA_STRATIX10) += sdram_soc64.o sdram_s10.o
+obj-$(CONFIG_TARGET_SOCFPGA_AGILEX) += sdram_soc64.o sdram_agilex.o
 endif
diff --git a/drivers/ddr/altera/sdram_agilex.c 
b/drivers/ddr/altera/sdram_agilex.c
new file mode 100644
index 00..cc7679a6e4
--- /dev/null
+++ b/drivers/ddr/altera/sdram_agilex.c
@@ -0,0 +1,168 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2019 Intel Corporation 
+ *
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include "sdram_soc64.h"
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int sdram_mmr_init_full(struct udevice *dev)
+{
+   struct altera_sdram_platdata *plat = dev->platdata;
+   struct altera_sdram_priv *priv = dev_get_priv(dev);
+   u32 i;
+   int ret;
+   phys_size_t hw_size;
+   bd_t bd = {0};
+
+   /* Ensure HMC clock is running */
+   if (poll_hmc_clock_status()) {
+   debug("DDR: Error as HMC clock was not running\n");
+   return -EPERM;
+   }
+
+   /* Trying 3 times to do a calibration */
+   for (i = 0; i < 3; i++) {
+   ret = wait_for_bit_le32((const void *)(plat->hmc +
+   DDRCALSTAT),
+   DDR_HMC_DDRCALSTAT_CAL_MSK, true, 1000,
+   false);
+   if (!ret)
+   break;
+
+   emif_reset(plat);
+   }
+
+   if (ret) {
+   puts("DDR: Error as SDRAM calibration failed\n");
+   return -EPERM;
+   }
+   debug("DDR: Calibration success\n");
+
+   /*
+* Configure the DDR IO size
+* niosreserve0: Used to indicate DDR width &
+*  bit[7:0] = Number of data bits (bit[6:5] 0x01=32bit, 0x10=64bit)
+*  bit[8]   = 1 if user-mode OCT is present
+*  bit[9]   = 1 if warm reset compiled into EMIF Cal Code
+*  bit[10]  = 1 if warm reset is on during generation in EMIF Cal
+* niosreserve1: IP ADCDS version encoded as 16 bit value
+*  bit[2:0] = Variant (0=not special,1=FAE beta, 2=Customer beta,
+*  3=EAP, 4-6 are reserved)
+*  bit[5:3] = Service Pack # (e.g. 1)
+*  bit[9:6] = Minor Release #
+*  bit[14:10] = Major Release #
+*/
+   /* Configure DDR IO size x16, x32 and x64 mode */
+   u32 update_value;
+
+   update_value = hmc_readl(plat, NIOSRESERVED0);
+   update_value = (update_value & 0xFF) >> 5;
+
+   /* Configure DDR data rate 0-HAlf-rate 1-Quarter-rate */
+   update_value |= (hmc_readl(plat, CTRLCFG3) & 0x4);
+   hmc_ecc_writel(plat, update_value, DDRIOCTRL);
+
+   /* Copy values MMR IOHMC dramaddrw to HMC adp DRAMADDRWIDTH */
+   hmc_ecc_writel(plat, hmc_readl(plat, DRAMADDRW), DRAMADDRWIDTH);
+
+   /* assigning the SDRAM size */
+   phys_size_t size = sdram_calculate_size(plat);
+
+   if (size <= 0)
+   hw_size = PHYS_SDRAM_1_SIZE;
+   else
+ 

[U-Boot] [PATCH v4 07/17] arm: socfpga: Move Stratix10 and Agilex clock manager common code

[Ley Foon Tan]

Move Stratix10 and Agilex clock manager common code to new header file.

Fixed CLKMGR_INTOSC_HZ to 400MHz instead of 460MHz.

Signed-off-by: Ley Foon Tan 
---
 .../include/mach/clock_manager_s10.h  | 16 +++--
 .../include/mach/clock_manager_soc64.h| 23 +++
 2 files changed, 26 insertions(+), 13 deletions(-)
 create mode 100644 arch/arm/mach-socfpga/include/mach/clock_manager_soc64.h

diff --git a/arch/arm/mach-socfpga/include/mach/clock_manager_s10.h 
b/arch/arm/mach-socfpga/include/mach/clock_manager_s10.h
index fa0ba26f09..223940ba0c 100644
--- a/arch/arm/mach-socfpga/include/mach/clock_manager_s10.h
+++ b/arch/arm/mach-socfpga/include/mach/clock_manager_s10.h
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0
  *
- * Copyright (C) 2016-2018 Intel Corporation 
+ * Copyright (C) 2016-2019 Intel Corporation 
  *
  */
 
@@ -14,18 +14,6 @@ unsigned int cm_get_l4_sp_clk_hz(void);
 unsigned int cm_get_mmc_controller_clk_hz(void);
 unsigned int cm_get_qspi_controller_clk_hz(void);
 unsigned int cm_get_spi_controller_clk_hz(void);
-const unsigned int cm_get_osc_clk_hz(void);
-const unsigned int cm_get_f2s_per_ref_clk_hz(void);
-const unsigned int cm_get_f2s_sdr_ref_clk_hz(void);
-const unsigned int cm_get_intosc_clk_hz(void);
-const unsigned int cm_get_fpga_clk_hz(void);
-
-#define CLKMGR_EOSC1_HZ2500
-#define CLKMGR_INTOSC_HZ   46000
-#define CLKMGR_FPGA_CLK_HZ 5000
-
-/* Clock configuration accessors */
-const struct cm_config * const cm_get_default_config(void);
 
 struct cm_config {
/* main group */
@@ -186,4 +174,6 @@ void cm_basic_init(const struct cm_config * const cfg);
 
 #define CLKMGR_PERPLLGRP_EN_SDMMCCLK_MASK  0x0020
 
+#include 
+
 #endif /* _CLOCK_MANAGER_S10_ */
diff --git a/arch/arm/mach-socfpga/include/mach/clock_manager_soc64.h 
b/arch/arm/mach-socfpga/include/mach/clock_manager_soc64.h
new file mode 100644
index 00..1a134b89ba
--- /dev/null
+++ b/arch/arm/mach-socfpga/include/mach/clock_manager_soc64.h
@@ -0,0 +1,23 @@
+/* SPDX-License-Identifier: GPL-2.0
+ *
+ * Copyright (C) 2016-2019 Intel Corporation 
+ *
+ */
+
+#ifndef _CLOCK_MANAGER_SOC64_
+#define _CLOCK_MANAGER_SOC64_
+
+const unsigned int cm_get_osc_clk_hz(void);
+const unsigned int cm_get_f2s_per_ref_clk_hz(void);
+const unsigned int cm_get_f2s_sdr_ref_clk_hz(void);
+const unsigned int cm_get_intosc_clk_hz(void);
+const unsigned int cm_get_fpga_clk_hz(void);
+
+#define CLKMGR_EOSC1_HZ2500
+#define CLKMGR_INTOSC_HZ   4
+#define CLKMGR_FPGA_CLK_HZ 5000
+
+/* Clock configuration accessors */
+const struct cm_config * const cm_get_default_config(void);
+
+#endif /* _CLOCK_MANAGER_SOC64_ */
-- 
2.19.0

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[U-Boot] [PATCH v4 06/17] arm: socfpga: agilex: Add system manager support

[Ley Foon Tan]

Add system manager support for Agilex.

Signed-off-by: Ley Foon Tan 

---
v3:
- Change include filename to system_manager_soc64.h.
- Move to use defines instead of struct.

v2:
- Include system_manager_s10_agilex_common.h in system_manager_agilex.h
---
 arch/arm/mach-socfpga/include/mach/system_manager.h   |  2 ++
 .../mach-socfpga/include/mach/system_manager_agilex.h | 11 +++
 2 files changed, 13 insertions(+)
 create mode 100644 arch/arm/mach-socfpga/include/mach/system_manager_agilex.h

diff --git a/arch/arm/mach-socfpga/include/mach/system_manager.h 
b/arch/arm/mach-socfpga/include/mach/system_manager.h
index 803305eb35..a4a6bbf600 100644
--- a/arch/arm/mach-socfpga/include/mach/system_manager.h
+++ b/arch/arm/mach-socfpga/include/mach/system_manager.h
@@ -10,6 +10,8 @@ extern phys_addr_t socfpga_sysmgr_base;
 
 #if defined(CONFIG_TARGET_SOCFPGA_STRATIX10)
 #include 
+#elif defined(CONFIG_TARGET_SOCFPGA_AGILEX)
+#include 
 #else
 #define SYSMGR_ROMCODEGRP_CTRL_WARMRSTCFGPINMUXBIT(0)
 #define SYSMGR_ROMCODEGRP_CTRL_WARMRSTCFGIOBIT(1)
diff --git a/arch/arm/mach-socfpga/include/mach/system_manager_agilex.h 
b/arch/arm/mach-socfpga/include/mach/system_manager_agilex.h
new file mode 100644
index 00..cb284114be
--- /dev/null
+++ b/arch/arm/mach-socfpga/include/mach/system_manager_agilex.h
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2019 Intel Corporation 
+ */
+
+#ifndef_SYSTEM_MANAGER_AGILEX_
+#define_SYSTEM_MANAGER_AGILEX_
+
+#include 
+
+#endif /* _SYSTEM_MANAGER_AGILEX_ */
-- 
2.19.0

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[U-Boot] [PATCH v4 09/17] arm: socfpga: agilex: Add clock wrapper functions

[Ley Foon Tan]

Add clock wrapper functions call to clock DM functions to get clock
frequency and used in cm_print_clock_quick_summary().

Signed-off-by: Ley Foon Tan 

---
v4:
- Change to use SYSMGR_SOC64* prefix.

v3:
- Improved commit message.
- Rename STRATIX10_* to SOCFPGA_SOC64_*
- Include clock_manager_soc64.h and clk-agilex.h.

v2:
- Get clocks from clock DM.
---
 arch/arm/mach-socfpga/Makefile|  4 +
 arch/arm/mach-socfpga/clock_manager_agilex.c  | 84 +++
 .../mach-socfpga/include/mach/clock_manager.h |  2 +
 .../include/mach/clock_manager_agilex.h   | 14 
 4 files changed, 104 insertions(+)
 create mode 100644 arch/arm/mach-socfpga/clock_manager_agilex.c
 create mode 100644 arch/arm/mach-socfpga/include/mach/clock_manager_agilex.h

diff --git a/arch/arm/mach-socfpga/Makefile b/arch/arm/mach-socfpga/Makefile
index dab34d0ef2..a403b46b47 100644
--- a/arch/arm/mach-socfpga/Makefile
+++ b/arch/arm/mach-socfpga/Makefile
@@ -39,6 +39,10 @@ obj-y+= wrap_pinmux_config_s10.o
 obj-y  += wrap_pll_config_s10.o
 endif
 
+ifdef CONFIG_TARGET_SOCFPGA_AGILEX
+obj-y  += clock_manager_agilex.o
+endif
+
 ifdef CONFIG_SPL_BUILD
 ifdef CONFIG_TARGET_SOCFPGA_GEN5
 obj-y  += spl_gen5.o
diff --git a/arch/arm/mach-socfpga/clock_manager_agilex.c 
b/arch/arm/mach-socfpga/clock_manager_agilex.c
new file mode 100644
index 00..9e0b3ef29d
--- /dev/null
+++ b/arch/arm/mach-socfpga/clock_manager_agilex.c
@@ -0,0 +1,84 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2019 Intel Corporation 
+ *
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static ulong cm_get_rate_dm(u32 id)
+{
+   struct udevice *dev;
+   struct clk clk;
+   ulong rate;
+   int ret;
+
+   ret = uclass_get_device_by_driver(UCLASS_CLK,
+ DM_GET_DRIVER(socfpga_agilex_clk),
+ &dev);
+   if (ret)
+   return 0;
+
+   clk.id = id;
+   ret = clk_request(dev, &clk);
+   if (ret < 0)
+   return 0;
+
+   rate = clk_get_rate(&clk);
+
+   clk_free(&clk);
+
+   if ((rate == (unsigned long)-ENOSYS) ||
+   (rate == (unsigned long)-ENXIO) ||
+   (rate == (unsigned long)-EIO)) {
+   debug("%s id %u: clk_get_rate err: %ld\n",
+ __func__, id, rate);
+   return 0;
+   }
+
+   return rate;
+}
+
+static u32 cm_get_rate_dm_khz(u32 id)
+{
+   return cm_get_rate_dm(id) / 1000;
+}
+
+unsigned long cm_get_mpu_clk_hz(void)
+{
+   return cm_get_rate_dm(SOCFPGA_SOC64_MPU_CLK);
+}
+
+unsigned int cm_get_l4_sys_free_clk_hz(void)
+{
+   return cm_get_rate_dm(SOCFPGA_SOC64_L4_SYS_FREE_CLK);
+}
+
+u32 cm_get_qspi_controller_clk_hz(void)
+{
+   return readl(socfpga_sysmgr_base + SYSMGR_SOC64_BOOT_SCRATCH_COLD0);
+}
+
+void cm_print_clock_quick_summary(void)
+{
+   printf("MPU   %10d kHz\n",
+  cm_get_rate_dm_khz(SOCFPGA_SOC64_MPU_CLK));
+   printf("L4 Main %8d kHz\n",
+  cm_get_rate_dm_khz(SOCFPGA_SOC64_L4_MAIN_CLK));
+   printf("L4 sys free %8d kHz\n",
+  cm_get_rate_dm_khz(SOCFPGA_SOC64_L4_SYS_FREE_CLK));
+   printf("L4 MP   %8d kHz\n",
+  cm_get_rate_dm_khz(SOCFPGA_SOC64_L4_MP_CLK));
+   printf("L4 SP   %8d kHz\n",
+  cm_get_rate_dm_khz(SOCFPGA_SOC64_L4_SP_CLK));
+   printf("SDMMC   %8d kHz\n",
+  cm_get_rate_dm_khz(SOCFPGA_SOC64_SDMMC_CLK));
+}
diff --git a/arch/arm/mach-socfpga/include/mach/clock_manager.h 
b/arch/arm/mach-socfpga/include/mach/clock_manager.h
index 4f9d10dd78..5d3ee2a83f 100644
--- a/arch/arm/mach-socfpga/include/mach/clock_manager.h
+++ b/arch/arm/mach-socfpga/include/mach/clock_manager.h
@@ -20,6 +20,8 @@ void cm_print_clock_quick_summary(void);
 #include 
 #elif defined(CONFIG_TARGET_SOCFPGA_STRATIX10)
 #include 
+#elif defined(CONFIG_TARGET_SOCFPGA_AGILEX)
+#include 
 #endif
 
 #endif /* _CLOCK_MANAGER_H_ */
diff --git a/arch/arm/mach-socfpga/include/mach/clock_manager_agilex.h 
b/arch/arm/mach-socfpga/include/mach/clock_manager_agilex.h
new file mode 100644
index 00..386e82a4e3
--- /dev/null
+++ b/arch/arm/mach-socfpga/include/mach/clock_manager_agilex.h
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2019 Intel Corporation 
+ */
+
+#ifndef _CLOCK_MANAGER_AGILEX_
+#define _CLOCK_MANAGER_AGILEX_
+
+unsigned long cm_get_mpu_clk_hz(void);
+
+#include 
+#include "../../../../../drivers/clk/altera/clk-agilex.h"
+
+#endif /* _CLOCK_MANAGER_AGILEX_ */
-- 
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[U-Boot] [PATCH v4 12/17] ddr: altera: Restructure Stratix 10 SDRAM driver

[Ley Foon Tan]

Restructure Stratix 10 SDRAM driver. Move common code to separate
file, in preparation to support SDRAM driver for Agilex.

Signed-off-by: Ley Foon Tan 

---
v4:
- Change to use base address from DT.

v3:
- Change sdram_common.* to sdram_soc64.*
---
 drivers/ddr/altera/Makefile   |   2 +-
 drivers/ddr/altera/sdram_s10.c| 296 +
 drivers/ddr/altera/sdram_s10.h| 148 +
 drivers/ddr/altera/sdram_soc64.c  | 304 ++
 .../ddr/altera/{sdram_s10.h => sdram_soc64.h} |  70 ++--
 5 files changed, 341 insertions(+), 479 deletions(-)
 create mode 100644 drivers/ddr/altera/sdram_soc64.c
 copy drivers/ddr/altera/{sdram_s10.h => sdram_soc64.h} (79%)

diff --git a/drivers/ddr/altera/Makefile b/drivers/ddr/altera/Makefile
index 341ac0d73b..eb8da13b7d 100644
--- a/drivers/ddr/altera/Makefile
+++ b/drivers/ddr/altera/Makefile
@@ -9,5 +9,5 @@
 ifdef CONFIG_$(SPL_)ALTERA_SDRAM
 obj-$(CONFIG_TARGET_SOCFPGA_GEN5) += sdram_gen5.o sequencer.o
 obj-$(CONFIG_TARGET_SOCFPGA_ARRIA10) += sdram_arria10.o
-obj-$(CONFIG_TARGET_SOCFPGA_STRATIX10) += sdram_s10.o
+obj-$(CONFIG_TARGET_SOCFPGA_STRATIX10) += sdram_soc64.o sdram_s10.o
 endif
diff --git a/drivers/ddr/altera/sdram_s10.c b/drivers/ddr/altera/sdram_s10.c
index 9578aa743d..fcab3ae3e4 100644
--- a/drivers/ddr/altera/sdram_s10.c
+++ b/drivers/ddr/altera/sdram_s10.c
@@ -14,28 +14,14 @@
 #include "sdram_s10.h"
 #include 
 #include 
-#include 
 #include 
 #include 
 #include 
 
-struct altera_sdram_priv {
-   struct ram_info info;
-   struct reset_ctl_bulk resets;
-};
-
-struct altera_sdram_platdata {
-   void __iomem *hmc;
-   void __iomem *ddr_sch;
-   void __iomem *iomhc;
-};
-
 DECLARE_GLOBAL_DATA_PTR;
 
 #define DDR_CONFIG(A, B, C, R) (((A) << 24) | ((B) << 16) | ((C) << 8) | (R))
 
-#define PGTABLE_OFF0x4000
-
 /* The followring are the supported configurations */
 u32 ddr_config[] = {
/* DDR_CONFIG(Address order,Bank,Column,Row) */
@@ -62,28 +48,6 @@ u32 ddr_config[] = {
DDR_CONFIG(1, 4, 10, 17),
 };
 
-static u32 hmc_readl(struct altera_sdram_platdata *plat, u32 reg)
-{
-   return readl(plat->iomhc + reg);
-}
-
-static u32 hmc_ecc_readl(struct altera_sdram_platdata *plat, u32 reg)
-{
-   return readl(plat->hmc + reg);
-}
-
-static u32 hmc_ecc_writel(struct altera_sdram_platdata *plat,
- u32 data, u32 reg)
-{
-   return writel(data, plat->hmc + reg);
-}
-
-static u32 ddr_sch_writel(struct altera_sdram_platdata *plat, u32 data,
- u32 reg)
-{
-   return writel(data, plat->ddr_sch + reg);
-}
-
 int match_ddr_conf(u32 ddr_conf)
 {
int i;
@@ -95,193 +59,12 @@ int match_ddr_conf(u32 ddr_conf)
return 0;
 }
 
-static int emif_clear(struct altera_sdram_platdata *plat)
-{
-   hmc_ecc_writel(plat, 0, RSTHANDSHAKECTRL);
-
-   return wait_for_bit_le32((const void *)(plat->hmc +
-RSTHANDSHAKESTAT),
-DDR_HMC_RSTHANDSHAKE_MASK,
-false, 1000, false);
-}
-
-static int emif_reset(struct altera_sdram_platdata *plat)
-{
-   u32 c2s, s2c, ret;
-
-   c2s = hmc_ecc_readl(plat, RSTHANDSHAKECTRL) & DDR_HMC_RSTHANDSHAKE_MASK;
-   s2c = hmc_ecc_readl(plat, RSTHANDSHAKESTAT) & DDR_HMC_RSTHANDSHAKE_MASK;
-
-   debug("DDR: c2s=%08x s2c=%08x nr0=%08x nr1=%08x nr2=%08x dst=%08x\n",
- c2s, s2c, hmc_readl(plat, NIOSRESERVED0),
- hmc_readl(plat, NIOSRESERVED1), hmc_readl(plat, NIOSRESERVED2),
- hmc_readl(plat, DRAMSTS));
-
-   if (s2c && emif_clear(plat)) {
-   printf("DDR: emif_clear() failed\n");
-   return -1;
-   }
-
-   debug("DDR: Triggerring emif reset\n");
-   hmc_ecc_writel(plat, DDR_HMC_CORE2SEQ_INT_REQ, RSTHANDSHAKECTRL);
-
-   /* if seq2core[3] = 0, we are good */
-   ret = wait_for_bit_le32((const void *)(plat->hmc +
-RSTHANDSHAKESTAT),
-DDR_HMC_SEQ2CORE_INT_RESP_MASK,
-false, 1000, false);
-   if (ret) {
-   printf("DDR: failed to get ack from EMIF\n");
-   return ret;
-   }
-
-   ret = emif_clear(plat);
-   if (ret) {
-   printf("DDR: emif_clear() failed\n");
-   return ret;
-   }
-
-   debug("DDR: %s triggered successly\n", __func__);
-   return 0;
-}
-
-static int poll_hmc_clock_status(void)
-{
-   return wait_for_bit_le32((const void *)(socfpga_sysmgr_base +
-SYSMGR_SOC64_HMC_CLK),
-SYSMGR_HMC_CLK_STATUS_MSK, true, 1000, false);
-}
-
-static void sdram_clear_mem(phys_addr_t addr, phys_size_t size)
-{
-   phys_size_t i;
-
-   if (addr % CONFIG_SYS_CACHELINE_SIZE) {
-   printf("DDR: address 0x%llx is not cacheline size aligned.\n",
- 

[U-Boot] [PATCH v4 10/17] arm: socfpga: agilex: Add CCU support for Agilex

[Ley Foon Tan]

Add Cache Coherency Unit (CCU) support for Agilex.
CCU is to ensures consistency of shared data between multi masters
in the system.

Software need to initialize CCU's directories and coherency agent
interfaces in CCU IP.

Signed-off-by: Ley Foon Tan 
Reviewed-by: Simon Goldschmidt 
---
 arch/arm/mach-socfpga/Makefile|  3 +
 arch/arm/mach-socfpga/ccu_agilex.c| 99 +++
 .../mach-socfpga/include/mach/ccu_agilex.h| 67 +
 3 files changed, 169 insertions(+)
 create mode 100644 arch/arm/mach-socfpga/ccu_agilex.c
 create mode 100644 arch/arm/mach-socfpga/include/mach/ccu_agilex.h

diff --git a/arch/arm/mach-socfpga/Makefile b/arch/arm/mach-socfpga/Makefile
index a403b46b47..6f39dc06ed 100644
--- a/arch/arm/mach-socfpga/Makefile
+++ b/arch/arm/mach-socfpga/Makefile
@@ -58,6 +58,9 @@ ifdef CONFIG_TARGET_SOCFPGA_STRATIX10
 obj-y  += firewall.o
 obj-y  += spl_s10.o
 endif
+ifdef CONFIG_TARGET_SOCFPGA_AGILEX
+obj-y  += ccu_agilex.o
+endif
 endif
 
 ifdef CONFIG_TARGET_SOCFPGA_GEN5
diff --git a/arch/arm/mach-socfpga/ccu_agilex.c 
b/arch/arm/mach-socfpga/ccu_agilex.c
new file mode 100644
index 00..f27a48b523
--- /dev/null
+++ b/arch/arm/mach-socfpga/ccu_agilex.c
@@ -0,0 +1,99 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2019 Intel Corporation 
+ *
+ */
+#include 
+#include 
+#include 
+
+static void ccu_init_dirs(void)
+{
+   ulong i, f;
+   int ret;
+   u32 num_of_dirs;
+   u32 num_of_snoop_filters;
+   u32 reg;
+
+   num_of_dirs = CSUIDR_NUMDIRUS_GET(readl(CCU_REG_ADDR(CSUIDR)));
+   num_of_snoop_filters =
+   CSIDR_NUMSFS_GET(readl(CCU_REG_ADDR(CSIDR))) + 1;
+
+   /* Initialize each snoop filter in each directory */
+   for (f = 0; f < num_of_snoop_filters; f++) {
+   reg = f << DIRUSFMCR_SFID_SHIFT;
+   for (i = 0; i < num_of_dirs; i++) {
+   /* Initialize all entries */
+   writel(reg, CCU_DIR_REG_ADDR(i, DIRUSFMCR));
+
+   /* Poll snoop filter maintenance operation active
+* bit become 0.
+*/
+   ret = wait_for_bit_le32((const void *)
+   CCU_DIR_REG_ADDR(i, DIRUSFMAR),
+   BIT(0), false, 1000, false);
+   if (ret) {
+   puts("CCU: Directory initialization failed!\n");
+   hang();
+   }
+
+   /* Enable snoop filter, a bit per snoop filter */
+   setbits_le32((ulong)CCU_DIR_REG_ADDR(i, DIRUSFER),
+BIT(f));
+   }
+   }
+}
+
+void ccu_init_coh_agent_intf(void)
+{
+   u32 num_of_coh_agent_intf;
+   u32 num_of_dirs;
+   u32 reg;
+   u32 type;
+   u32 i, dir;
+
+   num_of_coh_agent_intf =
+   CSUIDR_NUMCAIUS_GET(readl(CCU_REG_ADDR(CSUIDR)));
+   num_of_dirs = CSUIDR_NUMDIRUS_GET(readl(CCU_REG_ADDR(CSUIDR)));
+
+   for (i = 0; i < num_of_coh_agent_intf; i++) {
+   reg = readl((ulong)CCU_CAIU_REG_ADDR(i, CAIUIDR));
+   if (CAIUIDR_CA_GET(reg)) {
+   /* Caching agent bit is enabled, enable caching agent
+* snoop in each directory
+*/
+   for (dir = 0; dir < num_of_dirs; dir++) {
+   setbits_le32((ulong)
+CCU_DIR_REG_ADDR(dir, DIRUCASER0),
+BIT(i));
+   }
+   }
+
+   type = CAIUIDR_TYPE_GET(reg);
+   if (type == CAIUIDR_TYPE_ACE_CAI_DVM_SUPPORT ||
+   type == CAIUIDR_TYPE_ACELITE_CAI_DVM_SUPPORT) {
+   /* DVM support is enabled, enable ACE DVM snoop*/
+   setbits_le32((ulong)(CCU_REG_ADDR(CSADSER0)),
+BIT(i));
+   }
+   }
+}
+
+static void ocram_bypass_firewall(void)
+{
+   clrbits_le32((ulong)(COH_CPU0_BYPASS_REG_ADDR(OCRAM_BLK_CGF_01_REG)),
+OCRAM_PRIVILEGED_MASK | OCRAM_SECURE_MASK);
+   clrbits_le32((ulong)(COH_CPU0_BYPASS_REG_ADDR(OCRAM_BLK_CGF_02_REG)),
+OCRAM_PRIVILEGED_MASK | OCRAM_SECURE_MASK);
+   clrbits_le32((ulong)(COH_CPU0_BYPASS_REG_ADDR(OCRAM_BLK_CGF_03_REG)),
+OCRAM_PRIVILEGED_MASK | OCRAM_SECURE_MASK);
+   clrbits_le32((ulong)(COH_CPU0_BYPASS_REG_ADDR(OCRAM_BLK_CGF_04_REG)),
+OCRAM_PRIVILEGED_MASK | OCRAM_SECURE_MASK);
+}
+
+void ccu_init(void)
+{
+   ccu_init_dirs();
+   ccu_init_coh_agent_intf();
+   ocram_bypass_firewall();
+}
diff --git a/arch/arm/mach-socfpga/include/mach/ccu_agilex.h 
b/arch/arm/mach-socfpga/include/m

[U-Boot] [PATCH v4 14/17] board: intel: agilex: Add socdk board support for Intel Agilex SoC

[Ley Foon Tan]

Add socdk board support for Intel Agilex SoC

Signed-off-by: Ley Foon Tan 
Reviewed-by: Simon Goldschmidt 
---
 board/intel/agilex-socdk/MAINTAINERS | 7 +++
 board/intel/agilex-socdk/Makefile| 7 +++
 board/intel/agilex-socdk/socfpga.c   | 7 +++
 3 files changed, 21 insertions(+)
 create mode 100644 board/intel/agilex-socdk/MAINTAINERS
 create mode 100644 board/intel/agilex-socdk/Makefile
 create mode 100644 board/intel/agilex-socdk/socfpga.c

diff --git a/board/intel/agilex-socdk/MAINTAINERS 
b/board/intel/agilex-socdk/MAINTAINERS
new file mode 100644
index 00..b8e28f0b24
--- /dev/null
+++ b/board/intel/agilex-socdk/MAINTAINERS
@@ -0,0 +1,7 @@
+SOCFPGA BOARD
+M: Ley Foon Tan 
+M: Chee Hong Ang 
+S: Maintained
+F: board/intel/agilex-socdk/
+F: include/configs/socfpga_agilex_socdk.h
+F: configs/socfpga_agilex_defconfig
diff --git a/board/intel/agilex-socdk/Makefile 
b/board/intel/agilex-socdk/Makefile
new file mode 100644
index 00..b86223a571
--- /dev/null
+++ b/board/intel/agilex-socdk/Makefile
@@ -0,0 +1,7 @@
+#
+# Copyright (C) 2019 Intel Corporation 
+#
+# SPDX-License-Identifier: GPL-2.0
+#
+
+obj-y  := socfpga.o
diff --git a/board/intel/agilex-socdk/socfpga.c 
b/board/intel/agilex-socdk/socfpga.c
new file mode 100644
index 00..72a3e0836d
--- /dev/null
+++ b/board/intel/agilex-socdk/socfpga.c
@@ -0,0 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2019 Intel Corporation 
+ *
+ */
+
+#include 
-- 
2.19.0

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[U-Boot] [PATCH v4 15/17] arm: socfpga: agilex: Add SPL for Agilex SoC

[Ley Foon Tan]

Add SPL support for Agilex SoC.

Signed-off-by: Ley Foon Tan 
Reviewed-by: Simon Goldschmidt 

---
v4:
- Move spl_early_init() to entry of board_init_f
- Add socfpga_get_manager_addr().
- Remove SYSMGR_DMA and SYSMGR_DMA_PERIPH, already set in firewall_setup().

v2:
- Change clock driver probing to DM.
- Remove unused OSC1TIMER0 reset
- Remove debug_uart_init(). UART depends on clock driver setup, no point to call
  debug_uart_init() after spl_early_init() and clock driver initialization.
---
 arch/arm/mach-socfpga/Makefile |  1 +
 arch/arm/mach-socfpga/spl_agilex.c | 95 ++
 2 files changed, 96 insertions(+)
 create mode 100644 arch/arm/mach-socfpga/spl_agilex.c

diff --git a/arch/arm/mach-socfpga/Makefile b/arch/arm/mach-socfpga/Makefile
index 6f39dc06ed..9d334e9e1b 100644
--- a/arch/arm/mach-socfpga/Makefile
+++ b/arch/arm/mach-socfpga/Makefile
@@ -60,6 +60,7 @@ obj-y += spl_s10.o
 endif
 ifdef CONFIG_TARGET_SOCFPGA_AGILEX
 obj-y  += ccu_agilex.o
+obj-y  += spl_agilex.o
 endif
 endif
 
diff --git a/arch/arm/mach-socfpga/spl_agilex.c 
b/arch/arm/mach-socfpga/spl_agilex.c
new file mode 100644
index 00..c05954664d
--- /dev/null
+++ b/arch/arm/mach-socfpga/spl_agilex.c
@@ -0,0 +1,95 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2019 Intel Corporation 
+ *
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+u32 spl_boot_device(void)
+{
+   return BOOT_DEVICE_MMC1;
+}
+
+#ifdef CONFIG_SPL_MMC_SUPPORT
+u32 spl_boot_mode(const u32 boot_device)
+{
+#if defined(CONFIG_SPL_FS_FAT) || defined(CONFIG_SPL_FS_EXT4)
+   return MMCSD_MODE_FS;
+#else
+   return MMCSD_MODE_RAW;
+#endif
+}
+#endif
+
+void board_init_f(ulong dummy)
+{
+   int ret;
+   struct udevice *dev;
+
+   ret = spl_early_init();
+   if (ret)
+   hang();
+
+   socfpga_get_manager_addr();
+
+#ifdef CONFIG_HW_WATCHDOG
+   /* Ensure watchdog is paused when debugging is happening */
+   writel(SYSMGR_WDDBG_PAUSE_ALL_CPU,
+  socfpga_sysmgr_base + SYSMGR_SOC64_WDDBG);
+
+   /* Enable watchdog before initializing the HW */
+   socfpga_per_reset(SOCFPGA_RESET(L4WD0), 1);
+   socfpga_per_reset(SOCFPGA_RESET(L4WD0), 0);
+   hw_watchdog_init();
+#endif
+
+   /* ensure all processors are not released prior Linux boot */
+   writeq(0, CPU_RELEASE_ADDR);
+
+   timer_init();
+
+   sysmgr_pinmux_init();
+
+   ret = uclass_get_device(UCLASS_CLK, 0, &dev);
+   if (ret) {
+   debug("Clock init failed: %d\n", ret);
+   hang();
+   }
+
+   preloader_console_init();
+   cm_print_clock_quick_summary();
+
+   firewall_setup();
+   ccu_init();
+
+#if CONFIG_IS_ENABLED(ALTERA_SDRAM)
+   ret = uclass_get_device(UCLASS_RAM, 0, &dev);
+   if (ret) {
+   debug("DRAM init failed: %d\n", ret);
+   hang();
+   }
+#endif
+
+   mbox_init();
+
+#ifdef CONFIG_CADENCE_QSPI
+   mbox_qspi_open();
+#endif
+}
-- 
2.19.0

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[U-Boot] [PATCH v4 16/17] arm: dts: agilex: Add base dtsi and devkit dts

[Ley Foon Tan]

Add device tree files for Agilex SoC platform.

Based on Linux Commit ID4b36daf9ada30.

Signed-off-by: Ley Foon Tan 

---
v4:
- Add u-boot,dm-pre-reloc to sysmgr node.

v3:
- Fixed bank 1 memory alias base address to 0x28000.
- Rename STRATIX10_*_CLK to SOCFPGA_SOC64_*_CLK.
- Include socfpga-soc64-clock.h
- Change to "intel,sdr-ctl-agilex" for SDRAM node.

v2:
- Add clock property to device node.
- Change memory size to 8GB
- Enable i2c1
---
 arch/arm/dts/Makefile |   1 +
 arch/arm/dts/socfpga_agilex.dtsi  | 495 ++
 arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi |  75 +++
 arch/arm/dts/socfpga_agilex_socdk.dts | 136 +
 4 files changed, 707 insertions(+)
 create mode 100644 arch/arm/dts/socfpga_agilex.dtsi
 create mode 100644 arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi
 create mode 100644 arch/arm/dts/socfpga_agilex_socdk.dts

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index aac1b83d49..de79635f34 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -308,6 +308,7 @@ dtb-$(CONFIG_TI816X) += dm8168-evm.dtb
 dtb-$(CONFIG_THUNDERX) += thunderx-88xx.dtb
 
 dtb-$(CONFIG_ARCH_SOCFPGA) +=  \
+   socfpga_agilex_socdk.dtb\
socfpga_arria5_socdk.dtb\
socfpga_arria10_socdk_sdmmc.dtb \
socfpga_cyclone5_mcvevk.dtb \
diff --git a/arch/arm/dts/socfpga_agilex.dtsi b/arch/arm/dts/socfpga_agilex.dtsi
new file mode 100644
index 00..a5732f29db
--- /dev/null
+++ b/arch/arm/dts/socfpga_agilex.dtsi
@@ -0,0 +1,495 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2019 Intel Corporation
+ */
+
+/dts-v1/;
+#include 
+#include 
+#include 
+
+/ {
+   compatible = "intel,socfpga-agilex";
+   #address-cells = <2>;
+   #size-cells = <2>;
+
+   cpus {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   cpu0: cpu@0 {
+   compatible = "arm,cortex-a53";
+   device_type = "cpu";
+   enable-method = "psci";
+   reg = <0x0>;
+   };
+
+   cpu1: cpu@1 {
+   compatible = "arm,cortex-a53";
+   device_type = "cpu";
+   enable-method = "psci";
+   reg = <0x1>;
+   };
+
+   cpu2: cpu@2 {
+   compatible = "arm,cortex-a53";
+   device_type = "cpu";
+   enable-method = "psci";
+   reg = <0x2>;
+   };
+
+   cpu3: cpu@3 {
+   compatible = "arm,cortex-a53";
+   device_type = "cpu";
+   enable-method = "psci";
+   reg = <0x3>;
+   };
+   };
+
+   pmu {
+   compatible = "arm,armv8-pmuv3";
+   interrupts = <0 120 8>,
+<0 121 8>,
+<0 122 8>,
+<0 123 8>;
+   interrupt-affinity = <&cpu0>,
+<&cpu1>,
+<&cpu2>,
+<&cpu3>;
+   interrupt-parent = <&intc>;
+   };
+
+   psci {
+   compatible = "arm,psci-0.2";
+   method = "smc";
+   };
+
+   intc: intc@fffc1000 {
+   compatible = "arm,gic-400", "arm,cortex-a15-gic";
+   #interrupt-cells = <3>;
+   interrupt-controller;
+   reg = <0x0 0xfffc1000 0x0 0x1000>,
+ <0x0 0xfffc2000 0x0 0x2000>,
+ <0x0 0xfffc4000 0x0 0x2000>,
+ <0x0 0xfffc6000 0x0 0x2000>;
+   };
+
+   soc {
+   #address-cells = <1>;
+   #size-cells = <1>;
+   compatible = "simple-bus";
+   device_type = "soc";
+   interrupt-parent = <&intc>;
+   ranges = <0 0 0 0x>;
+
+   clkmgr: clock-controller@ffd1 {
+   compatible = "intel,agilex-clkmgr";
+   reg = <0xffd1 0x1000>;
+   #clock-cells = <1>;
+   };
+
+   gmac0: ethernet@ff80 {
+   compatible = "altr,socfpga-stmmac", "snps,dwmac-3.74a", 
"snps,dwmac";
+   reg = <0xff80 0x2000>;
+   interrupts = <0 90 4>;
+   interrupt-names = "macirq";
+   mac-address = [00 00 00 00 00 00];
+   resets = <&rst EMAC0_RESET>, <&rst EMAC0_OCP_RESET>;
+   reset-names = "stmmaceth", "stmmaceth-ocp";
+   clocks = <&clkmgr SOCFPGA_SOC64_EMAC0_CLK>;
+   clock-names = "st

[U-Boot] [PATCH v4 11/17] arm: agilex: Add clock handoff offset for Agilex

[Ley Foon Tan]

Add clock handoff offset for Agilex. Remove S10 prefix to avoid confusion.

Signed-off-by: Ley Foon Tan 
---
 arch/arm/mach-socfpga/include/mach/handoff_s10.h | 9 +++--
 arch/arm/mach-socfpga/wrap_pll_config_s10.c  | 5 +++--
 2 files changed, 10 insertions(+), 4 deletions(-)

diff --git a/arch/arm/mach-socfpga/include/mach/handoff_s10.h 
b/arch/arm/mach-socfpga/include/mach/handoff_s10.h
index ba0f1fd1b2..abf04d9b04 100644
--- a/arch/arm/mach-socfpga/include/mach/handoff_s10.h
+++ b/arch/arm/mach-socfpga/include/mach/handoff_s10.h
@@ -26,8 +26,13 @@
 #define S10_HANDOFF_OFFSET_LENGTH  0x4
 #define S10_HANDOFF_OFFSET_DATA0x10
 
-#define S10_HANDOFF_CLOCK_OSC  (S10_HANDOFF_BASE + 0x608)
-#define S10_HANDOFF_CLOCK_FPGA (S10_HANDOFF_BASE + 0x60C)
+#ifdef TARGET_SOCFPGA_STRATIX10
+#define HANDOFF_CLOCK_OSC  (S10_HANDOFF_BASE + 0x608)
+#define HANDOFF_CLOCK_FPGA (S10_HANDOFF_BASE + 0x60C)
+#else
+#define HANDOFF_CLOCK_OSC  (S10_HANDOFF_BASE + 0x5fc)
+#define HANDOFF_CLOCK_FPGA (S10_HANDOFF_BASE + 0x600)
+#endif
 
 #define S10_HANDOFF_SIZE   4096
 
diff --git a/arch/arm/mach-socfpga/wrap_pll_config_s10.c 
b/arch/arm/mach-socfpga/wrap_pll_config_s10.c
index b002f38215..d27accab57 100644
--- a/arch/arm/mach-socfpga/wrap_pll_config_s10.c
+++ b/arch/arm/mach-socfpga/wrap_pll_config_s10.c
@@ -33,7 +33,8 @@ const struct cm_config * const cm_get_default_config(void)
 const unsigned int cm_get_osc_clk_hz(void)
 {
 #ifdef CONFIG_SPL_BUILD
-   u32 clock = readl(S10_HANDOFF_CLOCK_OSC);
+
+   u32 clock = readl(HANDOFF_CLOCK_OSC);
 
writel(clock, socfpga_sysmgr_base + SYSMGR_SOC64_BOOT_SCRATCH_COLD1);
 #endif
@@ -48,7 +49,7 @@ const unsigned int cm_get_intosc_clk_hz(void)
 const unsigned int cm_get_fpga_clk_hz(void)
 {
 #ifdef CONFIG_SPL_BUILD
-   u32 clock = readl(S10_HANDOFF_CLOCK_FPGA);
+   u32 clock = readl(HANDOFF_CLOCK_FPGA);
 
writel(clock, socfpga_sysmgr_base + SYSMGR_SOC64_BOOT_SCRATCH_COLD2);
 #endif
-- 
2.19.0

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[U-Boot] [PATCH v4 08/17] clk: agilex: Add clock driver for Agilex

[Ley Foon Tan]

Add clock manager driver for Agilex. Provides clock initialization
and get_rate functions.

Rename stratix10-clock.h to socfpga-soc64-clock.h.

stratix10-clock.h is from Linux commit ID   89727949ea1e.

Signed-off-by: Chee Hong Ang 
Signed-off-by: Ley Foon Tan 

---
v4:
- Get address from DT.

v3:
- Fixed clear PLL's lostlock bypass mode to ensure the clock manager provide 
glitchless clock
to downstream logic
- Changed CM_REG_CLRBITS(), CM_REG_SETBITS() and CM_REG_CLRSETBITS() macros
argument ordering, to match with clrbits_le32, setbits_le32 and clrsetbits_le32.
- Rename stratix10-clock.h to socfpga-soc64-clock.h.
- Convert struct to defines and move defines to clk-agilex.h

v2:
- Convert Clock driver to DM
---
 arch/arm/mach-socfpga/misc.c  |   4 +
 drivers/clk/altera/Makefile   |   1 +
 drivers/clk/altera/clk-agilex.c   | 579 ++
 drivers/clk/altera/clk-agilex.h   | 237 +++
 .../dt-bindings/clock/socfpga-soc64-clock.h   |  84 +++
 5 files changed, 905 insertions(+)
 create mode 100644 drivers/clk/altera/clk-agilex.c
 create mode 100644 drivers/clk/altera/clk-agilex.h
 create mode 100644 include/dt-bindings/clock/socfpga-soc64-clock.h

diff --git a/arch/arm/mach-socfpga/misc.c b/arch/arm/mach-socfpga/misc.c
index dffd1b2e41..f540606569 100644
--- a/arch/arm/mach-socfpga/misc.c
+++ b/arch/arm/mach-socfpga/misc.c
@@ -240,7 +240,11 @@ void socfpga_get_manager_addr(void)
if (!socfpga_sysmgr_base)
hang();
 
+#ifdef CONFIG_TARGET_SOCFPGA_AGILEX
+   socfpga_clkmgr_base = socfpga_get_base_addr("intel,agilex-clkmgr");
+#else
socfpga_clkmgr_base = socfpga_get_base_addr("altr,clk-mgr");
+#endif
if (!socfpga_clkmgr_base)
hang();
 }
diff --git a/drivers/clk/altera/Makefile b/drivers/clk/altera/Makefile
index a3ae8b24b0..96215ad5c4 100644
--- a/drivers/clk/altera/Makefile
+++ b/drivers/clk/altera/Makefile
@@ -3,4 +3,5 @@
 # Copyright (C) 2018 Marek Vasut 
 #
 
+obj-$(CONFIG_TARGET_SOCFPGA_AGILEX) += clk-agilex.o
 obj-$(CONFIG_TARGET_SOCFPGA_ARRIA10) += clk-arria10.o
diff --git a/drivers/clk/altera/clk-agilex.c b/drivers/clk/altera/clk-agilex.c
new file mode 100644
index 00..f796016d73
--- /dev/null
+++ b/drivers/clk/altera/clk-agilex.c
@@ -0,0 +1,579 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2019 Intel Corporation 
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct socfpga_clk_platdata {
+   void __iomem *regs;
+};
+
+/*
+ * function to write the bypass register which requires a poll of the
+ * busy bit
+ */
+static void clk_write_bypass_mainpll(struct socfpga_clk_platdata *plat, u32 
val)
+{
+   CM_REG_WRITEL(plat, val, CLKMGR_MAINPLL_BYPASS);
+   cm_wait_for_fsm();
+}
+
+static void clk_write_bypass_perpll(struct socfpga_clk_platdata *plat, u32 val)
+{
+   CM_REG_WRITEL(plat, val, CLKMGR_PERPLL_BYPASS);
+   cm_wait_for_fsm();
+}
+
+/* function to write the ctrl register which requires a poll of the busy bit */
+static void clk_write_ctrl(struct socfpga_clk_platdata *plat, u32 val)
+{
+   CM_REG_WRITEL(plat, val, CLKMGR_CTRL);
+   cm_wait_for_fsm();
+}
+
+#define MEMBUS_MAINPLL 0
+#define MEMBUS_PERPLL  1
+#define MEMBUS_TIMEOUT 1000
+#define MEMBUS_ADDR_CLKSLICE   0x27
+#define MEMBUS_CLKSLICE_SYNC_MODE_EN   0x80
+
+static int membus_wait_for_req(struct socfpga_clk_platdata *plat, u32 pll,
+  int timeout)
+{
+   int cnt = 0;
+   u32 req_status;
+
+   if (pll == MEMBUS_MAINPLL)
+   req_status = CM_REG_READL(plat, CLKMGR_MAINPLL_MEM);
+   else
+   req_status = CM_REG_READL(plat, CLKMGR_PERPLL_MEM);
+
+   while ((cnt < timeout) && (req_status & CLKMGR_MEM_REQ_SET_MSK)) {
+   if (pll == MEMBUS_MAINPLL)
+   req_status = CM_REG_READL(plat, CLKMGR_MAINPLL_MEM);
+   else
+   req_status = CM_REG_READL(plat, CLKMGR_PERPLL_MEM);
+   cnt++;
+   }
+
+   if (cnt >= timeout)
+   return -ETIMEDOUT;
+
+   return 0;
+}
+
+static int membus_write_pll(struct socfpga_clk_platdata *plat, u32 pll,
+   u32 addr_offset, u32 wdat, int timeout)
+{
+   u32 addr;
+   u32 val;
+
+   addr = ((addr_offset | CLKMGR_MEM_ADDR_START) & CLKMGR_MEM_ADDR_MASK);
+
+   val = (CLKMGR_MEM_REQ_SET_MSK | CLKMGR_MEM_WR_SET_MSK |
+  (wdat << CLKMGR_MEM_WDAT_LSB_OFFSET) | addr);
+
+   if (pll == MEMBUS_MAINPLL)
+   CM_REG_WRITEL(plat, val, CLKMGR_MAINPLL_MEM);
+   else
+   CM_REG_WRITEL(plat, val, CLKMGR_PERPLL_MEM);
+
+   debug("MEMBUS: Write 0x%08x to addr = 0x%08x\n", wdat, addr);
+
+   return membus_wait_for_req(plat, pll, timeout)

[U-Boot] [PATCH v4 04/17] arm: socfpga: agilex: Add reset manager support

[Ley Foon Tan]

Add reset manager support for Agilex.

Signed-off-by: Ley Foon Tan 

---
v3:
- Add reset_manager_soc64.h
- Convert to use defines instead of struct.
---
 arch/arm/mach-socfpga/include/mach/reset_manager.h|  2 ++
 .../mach-socfpga/include/mach/reset_manager_agilex.h  | 11 +++
 2 files changed, 13 insertions(+)
 create mode 100644 arch/arm/mach-socfpga/include/mach/reset_manager_agilex.h

diff --git a/arch/arm/mach-socfpga/include/mach/reset_manager.h 
b/arch/arm/mach-socfpga/include/mach/reset_manager.h
index a5b6931350..019c518ae4 100644
--- a/arch/arm/mach-socfpga/include/mach/reset_manager.h
+++ b/arch/arm/mach-socfpga/include/mach/reset_manager.h
@@ -45,6 +45,8 @@ void socfpga_per_reset_all(void);
 #include 
 #elif defined(CONFIG_TARGET_SOCFPGA_STRATIX10)
 #include 
+#elif defined(CONFIG_TARGET_SOCFPGA_AGILEX)
+#include 
 #endif
 
 #endif /* _RESET_MANAGER_H_ */
diff --git a/arch/arm/mach-socfpga/include/mach/reset_manager_agilex.h 
b/arch/arm/mach-socfpga/include/mach/reset_manager_agilex.h
new file mode 100644
index 00..617e06ec06
--- /dev/null
+++ b/arch/arm/mach-socfpga/include/mach/reset_manager_agilex.h
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2019 Intel Corporation 
+ */
+
+#ifndef_RESET_MANAGER_AGILEX_
+#define_RESET_MANAGER_AGILEX_
+
+#include 
+
+#endif /* _RESET_MANAGER_AGILEX_ */
-- 
2.19.0

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[U-Boot] [PATCH v4 05/17] arm: socfpga: Move Stratix10 and Agilex system manager common code

[Ley Foon Tan]

Move Stratix10 and Agilex system manager common code to system_manager_soc64.h.

Signed-off-by: Ley Foon Tan 

---
v4:
- Change prefix from SYSMGR_S10* to SYSMGR_SOC64*.

v3:
- Change filename to system_manager_soc64.h
- Move to use defines instead of struct.

v2:
- Move common defines for Stratix 10 and Agilex to 
system_manager_s10_agilex_common.h
---
 arch/arm/mach-socfpga/clock_manager_s10.c |   2 +-
 arch/arm/mach-socfpga/firewall.c  |   4 +-
 .../include/mach/system_manager_s10.h | 116 +
 .../include/mach/system_manager_soc64.h   | 123 ++
 arch/arm/mach-socfpga/mailbox_s10.c   |   2 +-
 arch/arm/mach-socfpga/misc_s10.c  |   4 +-
 arch/arm/mach-socfpga/reset_manager_s10.c |  14 +-
 arch/arm/mach-socfpga/spl_s10.c   |   2 +-
 arch/arm/mach-socfpga/system_manager_s10.c|  26 ++--
 arch/arm/mach-socfpga/wrap_pll_config_s10.c   |   8 +-
 drivers/ddr/altera/sdram_s10.c|   2 +-
 11 files changed, 157 insertions(+), 146 deletions(-)
 create mode 100644 arch/arm/mach-socfpga/include/mach/system_manager_soc64.h

diff --git a/arch/arm/mach-socfpga/clock_manager_s10.c 
b/arch/arm/mach-socfpga/clock_manager_s10.c
index c6269701f0..bae07e02b6 100644
--- a/arch/arm/mach-socfpga/clock_manager_s10.c
+++ b/arch/arm/mach-socfpga/clock_manager_s10.c
@@ -382,7 +382,7 @@ unsigned int cm_get_l4_sp_clk_hz(void)
 
 unsigned int cm_get_qspi_controller_clk_hz(void)
 {
-   return readl(socfpga_sysmgr_base + SYSMGR_S10_BOOT_SCRATCH_COLD0);
+   return readl(socfpga_sysmgr_base + SYSMGR_SOC64_BOOT_SCRATCH_COLD0);
 }
 
 unsigned int cm_get_spi_controller_clk_hz(void)
diff --git a/arch/arm/mach-socfpga/firewall.c b/arch/arm/mach-socfpga/firewall.c
index 7c9d317896..c32a7c84b5 100644
--- a/arch/arm/mach-socfpga/firewall.c
+++ b/arch/arm/mach-socfpga/firewall.c
@@ -101,7 +101,7 @@ void firewall_setup(void)
 
/* enable non-secure interface to DMA330 DMA and peripherals */
writel(SYSMGR_DMA_IRQ_NS | SYSMGR_DMA_MGR_NS,
-  socfpga_sysmgr_base + SYSMGR_S10_DMA);
+  socfpga_sysmgr_base + SYSMGR_SOC64_DMA);
writel(SYSMGR_DMAPERIPH_ALL_NS,
-  socfpga_sysmgr_base + SYSMGR_S10_DMA_PERIPH);
+  socfpga_sysmgr_base + SYSMGR_SOC64_DMA_PERIPH);
 }
diff --git a/arch/arm/mach-socfpga/include/mach/system_manager_s10.h 
b/arch/arm/mach-socfpga/include/mach/system_manager_s10.h
index e68a8e730e..c537fb300c 100644
--- a/arch/arm/mach-socfpga/include/mach/system_manager_s10.h
+++ b/arch/arm/mach-socfpga/include/mach/system_manager_s10.h
@@ -1,124 +1,12 @@
 /* SPDX-License-Identifier: GPL-2.0
  *
- * Copyright (C) 2016-2018 Intel Corporation 
+ * Copyright (C) 2016-2019 Intel Corporation 
  *
  */
 
 #ifndef_SYSTEM_MANAGER_S10_
 #define_SYSTEM_MANAGER_S10_
 
-void sysmgr_pinmux_init(void);
-void populate_sysmgr_fpgaintf_module(void);
-void populate_sysmgr_pinmux(void);
-void sysmgr_pinmux_table_sel(const u32 **table, unsigned int *table_len);
-void sysmgr_pinmux_table_ctrl(const u32 **table, unsigned int *table_len);
-void sysmgr_pinmux_table_fpga(const u32 **table, unsigned int *table_len);
-void sysmgr_pinmux_table_delay(const u32 **table, unsigned int *table_len);
-
-#define SYSMGR_S10_WDDBG   0x8
-#define SYSMGR_S10_DMA 0x20
-#define SYSMGR_S10_DMA_PERIPH  0x24
-#define SYSMGR_S10_SDMMC   0x28
-#define SYSMGR_S10_SDMMC_L3MASTER  0x2c
-#define SYSMGR_S10_EMAC_GLOBAL 0x40
-#define SYSMGR_S10_EMAC0   0x44
-#define SYSMGR_S10_EMAC1   0x48
-#define SYSMGR_S10_EMAC2   0x4c
-#define SYSMGR_S10_EMAC0_ACE   0x50
-#define SYSMGR_S10_EMAC1_ACE   0x54
-#define SYSMGR_S10_EMAC2_ACE   0x58
-#define SYSMGR_S10_NAND_AXUSER 0x5c
-#define SYSMGR_S10_FPGAINTF_EN10x68
-#define SYSMGR_S10_FPGAINTF_EN20x6c
-#define SYSMGR_S10_FPGAINTF_EN30x70
-#define SYSMGR_S10_DMA_L3MASTER0x74
-#define SYSMGR_S10_HMC_CLK 0xb4
-#define SYSMGR_S10_IO_PA_CTRL  0xb8
-#define SYSMGR_S10_NOC_TIMEOUT 0xc0
-#define SYSMGR_S10_NOC_IDLEREQ_SET 0xc4
-#define SYSMGR_S10_NOC_IDLEREQ_CLR 0xc8
-#define SYSMGR_S10_NOC_IDLEREQ_VAL 0xcc
-#define SYSMGR_S10_NOC_IDLEACK 0xd0
-#define SYSMGR_S10_NOC_IDLESTATUS  0xd4
-#define SYSMGR_S10_FPGA2SOC_CTRL   0xd8
-#define SYSMGR_S10_FPGA_CONFIG 0xdc
-#define SYSMGR_S10_IOCSRCLK_GATE   0xe0
-#define SYSMGR_S10_GPO 0xe4
-#define SYSMGR_S10_GPI 0xe8
-#define SYSMGR_S10_MPU 0xf0
-#define SYSMGR_S10_BOOT_SCRATCH_COLD0  

[U-Boot] [PATCH v4 03/17] arm: socfpga: Move Stratix10 and Agilex reset manager common code

[Ley Foon Tan]

Move Stratix10 and Agilex reset manager common code to reset_manager_soc64.h.

Remove unused RSTMGR_XXX defines.

Signed-off-by: Ley Foon Tan 

---
v4:
- Change prefix from RSTMGR_S10* to RSTMGR_SOC64*.

v3:
- Add new reset_manager_soc64.h
- Convert to use defines instead of struct.
---
 .../include/mach/reset_manager_s10.h  | 87 +--
 .../include/mach/reset_manager_soc64.h| 38 
 arch/arm/mach-socfpga/reset_manager_s10.c | 20 ++---
 3 files changed, 50 insertions(+), 95 deletions(-)
 create mode 100644 arch/arm/mach-socfpga/include/mach/reset_manager_soc64.h

diff --git a/arch/arm/mach-socfpga/include/mach/reset_manager_s10.h 
b/arch/arm/mach-socfpga/include/mach/reset_manager_s10.h
index b602129656..fdc9c8c9a4 100644
--- a/arch/arm/mach-socfpga/include/mach/reset_manager_s10.h
+++ b/arch/arm/mach-socfpga/include/mach/reset_manager_s10.h
@@ -1,95 +1,12 @@
 /* SPDX-License-Identifier: GPL-2.0
  *
- * Copyright (C) 2016-2018 Intel Corporation 
+ * Copyright (C) 2016-2019 Intel Corporation 
  *
  */
 
 #ifndef_RESET_MANAGER_S10_
 #define_RESET_MANAGER_S10_
 
-void reset_cpu(ulong addr);
-int cpu_has_been_warmreset(void);
-
-void socfpga_bridges_reset(int enable);
-
-void socfpga_per_reset(u32 reset, int set);
-void socfpga_per_reset_all(void);
-
-#define RSTMGR_S10_STATUS  0
-#define RSTMGR_S10_MPUMODRST   0x20
-#define RSTMGR_S10_PER0MODRST  0x24
-#define RSTMGR_S10_PER1MODRST  0x28
-#define RSTMGR_S10_BRGMODRST   0x2c
-
-#define RSTMGR_MPUMODRST_CORE0 0
-#define RSTMGR_PER0MODRST_OCP_MASK 0x0020bf00
-#define RSTMGR_BRGMODRST_DDRSCH_MASK   0X0040
-#define RSTMGR_BRGMODRST_FPGA2SOC_MASK 0x0004
-
-/* Watchdogs and MPU warm reset mask */
-#define RSTMGR_L4WD_MPU_WARMRESET_MASK 0x000F0F00
-
-/*
- * Define a reset identifier, from which a permodrst bank ID
- * and reset ID can be extracted using the subsequent macros
- * RSTMGR_RESET() and RSTMGR_BANK().
- */
-#define RSTMGR_BANK_OFFSET 8
-#define RSTMGR_BANK_MASK   0x7
-#define RSTMGR_RESET_OFFSET0
-#define RSTMGR_RESET_MASK  0x1f
-#define RSTMGR_DEFINE(_bank, _offset)  \
-   ((_bank) << RSTMGR_BANK_OFFSET) | ((_offset) << RSTMGR_RESET_OFFSET)
-
-/* Extract reset ID from the reset identifier. */
-#define RSTMGR_RESET(_reset)   \
-   (((_reset) >> RSTMGR_RESET_OFFSET) & RSTMGR_RESET_MASK)
-
-/* Extract bank ID from the reset identifier. */
-#define RSTMGR_BANK(_reset)\
-   (((_reset) >> RSTMGR_BANK_OFFSET) & RSTMGR_BANK_MASK)
-
-/*
- * SocFPGA Stratix10 reset IDs, bank mapping is as follows:
- * 0 ... mpumodrst
- * 1 ... per0modrst
- * 2 ... per1modrst
- * 3 ... brgmodrst
- */
-#define RSTMGR_EMAC0   RSTMGR_DEFINE(1, 0)
-#define RSTMGR_EMAC1   RSTMGR_DEFINE(1, 1)
-#define RSTMGR_EMAC2   RSTMGR_DEFINE(1, 2)
-#define RSTMGR_USB0RSTMGR_DEFINE(1, 3)
-#define RSTMGR_USB1RSTMGR_DEFINE(1, 4)
-#define RSTMGR_NANDRSTMGR_DEFINE(1, 5)
-#define RSTMGR_SDMMC   RSTMGR_DEFINE(1, 7)
-#define RSTMGR_EMAC0_OCP   RSTMGR_DEFINE(1, 8)
-#define RSTMGR_EMAC1_OCP   RSTMGR_DEFINE(1, 9)
-#define RSTMGR_EMAC2_OCP   RSTMGR_DEFINE(1, 10)
-#define RSTMGR_USB0_OCPRSTMGR_DEFINE(1, 11)
-#define RSTMGR_USB1_OCPRSTMGR_DEFINE(1, 12)
-#define RSTMGR_NAND_OCPRSTMGR_DEFINE(1, 13)
-#define RSTMGR_SDMMC_OCP   RSTMGR_DEFINE(1, 15)
-#define RSTMGR_DMA RSTMGR_DEFINE(1, 16)
-#define RSTMGR_SPIM0   RSTMGR_DEFINE(1, 17)
-#define RSTMGR_SPIM1   RSTMGR_DEFINE(1, 18)
-#define RSTMGR_L4WD0   RSTMGR_DEFINE(2, 0)
-#define RSTMGR_L4WD1   RSTMGR_DEFINE(2, 1)
-#define RSTMGR_L4WD2   RSTMGR_DEFINE(2, 2)
-#define RSTMGR_L4WD3   RSTMGR_DEFINE(2, 3)
-#define RSTMGR_OSC1TIMER0  RSTMGR_DEFINE(2, 4)
-#define RSTMGR_I2C0RSTMGR_DEFINE(2, 8)
-#define RSTMGR_I2C1RSTMGR_DEFINE(2, 9)
-#define RSTMGR_I2C2RSTMGR_DEFINE(2, 10)
-#define RSTMGR_I2C3RSTMGR_DEFINE(2, 11)
-#define RSTMGR_I2C4RSTMGR_DEFINE(2, 12)
-#define RSTMGR_UART0   RSTMGR_DEFINE(2, 16)
-#define RSTMGR_UART1   RSTMGR_DEFINE(2, 17)
-#define RSTMGR_GPIO0   RSTMGR_DEFINE(2, 24)
-#define RSTMGR_GPIO1   RSTMGR_DEFINE(2, 25)
-#define RSTMGR_SDR RSTMGR_DEFINE(3, 6)
-
-/* Create a human-readable reference to SoCFPGA reset. */
-#define SOCFPGA_RESET(_name)   RSTMGR_##_name
+#include 
 
 #endif /* _RESET_MANAGER_S10_ */
diff --git a/arch/arm/mach-socfpga/include/mach/reset_manager_soc64.h 
b/arch/arm/mach-socfpga/include/mach/reset_manager_soc64.h
new file mode 100644
index 00..3b739a0202
--- /dev/null
+++ b/arch/arm/mach-socfpga/include/mach/reset_manager_soc64.h
@@ -0,0 +1,38 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ *  Copyright (C) 2016-2019 Intel Corporation 
+ */
+
+#ifndef _RESET_MANAGER_SOC64_H_
+#defi

[U-Boot] [PATCH v4 00/17] Add Intel Agilex SoC support

[Ley Foon Tan]

This is 4th version of patchset to add Intel Agilex SoC[1] support.
Most of changes are related to _SOC64 prefix change and use base
address from DT for managers access. Detail changelog can find in
commit message.

This patchset needs to apply after patchset in [2] for manager driver
struct to defines conversion.

Patch status:
No change: Patch 1, 4, 6, 7, 10, 11, 14, 17
Have changes: Patch 2, 3, 5, 8, 9, 12, 13, 15, 16

Detail change log is in patch commit message.

Intel Agilex SoC is with a 64-bit quad core ARM Cortex-A53 MPCore
hard processor system (HPS). New IPs in Agilex are CCU, clock manager and SDRAM,
other IPs have minor changes compared to Stratix 10.

Intel Agilex HPS TRM:
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/agilex/mnl-1100.pdf

v3->v4:
---
- Rename _S10 to _SOC64 perfix for S10 and Agilex common defines.
- Use base address from DT for managers access.
- Add u-boot,dm-pre-reloc to sysmgr node in dts

History:
-
[v1]: https://patchwork.ozlabs.org/cover/1097830/
[v2]: https://patchwork.ozlabs.org/cover/1127440/
[v3]: https://patchwork.ozlabs.org/cover/1149863/

[1]: 
https://www.intel.com/content/www/us/en/products/programmable/fpga/agilex.html
[2]: https://patchwork.ozlabs.org/cover/1160079/

Ley Foon Tan (17):
  arm: socfpga: agilex: Add base address for Intel Agilex SoC
  arm: socfpga: Move firewall code to firewall file
  arm: socfpga: Move Stratix10 and Agilex reset manager common code
  arm: socfpga: agilex: Add reset manager support
  arm: socfpga: Move Stratix10 and Agilex system manager common code
  arm: socfpga: agilex: Add system manager support
  arm: socfpga: Move Stratix10 and Agilex clock manager common code
  clk: agilex: Add clock driver for Agilex
  arm: socfpga: agilex: Add clock wrapper functions
  arm: socfpga: agilex: Add CCU support for Agilex
  arm: agilex: Add clock handoff offset for Agilex
  ddr: altera: Restructure Stratix 10 SDRAM driver
  ddr: altera: agilex: Add SDRAM driver for Agilex
  board: intel: agilex: Add socdk board support for Intel Agilex SoC
  arm: socfpga: agilex: Add SPL for Agilex SoC
  arm: dts: agilex: Add base dtsi and devkit dts
  arm: socfpga: agilex: Enable Agilex SoC build

 arch/arm/Kconfig  |   4 +-
 arch/arm/dts/Makefile |   1 +
 arch/arm/dts/socfpga_agilex.dtsi  | 495 +++
 arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi |  75 +++
 arch/arm/dts/socfpga_agilex_socdk.dts | 136 
 arch/arm/mach-socfpga/Kconfig |  15 +
 arch/arm/mach-socfpga/Makefile|  18 +
 arch/arm/mach-socfpga/ccu_agilex.c|  99 +++
 arch/arm/mach-socfpga/clock_manager_agilex.c  |  84 +++
 arch/arm/mach-socfpga/clock_manager_s10.c |   2 +-
 .../mach-socfpga/{spl_s10.c => firewall.c}| 122 +---
 .../mach-socfpga/include/mach/base_addr_s10.h |   4 +
 .../mach-socfpga/include/mach/ccu_agilex.h|  67 ++
 .../mach-socfpga/include/mach/clock_manager.h |   2 +
 .../include/mach/clock_manager_agilex.h   |  14 +
 .../include/mach/clock_manager_s10.h  |  16 +-
 .../include/mach/clock_manager_soc64.h|  23 +
 .../mach/{firewall_s10.h => firewall.h}   |  10 +-
 .../mach-socfpga/include/mach/handoff_s10.h   |   9 +-
 .../mach-socfpga/include/mach/reset_manager.h |   2 +
 .../include/mach/reset_manager_agilex.h   |  11 +
 .../include/mach/reset_manager_s10.h  |  87 +--
 .../include/mach/reset_manager_soc64.h|  38 ++
 .../include/mach/system_manager.h |   2 +
 .../include/mach/system_manager_agilex.h  |  11 +
 .../include/mach/system_manager_s10.h | 116 +---
 .../include/mach/system_manager_soc64.h   | 123 
 arch/arm/mach-socfpga/mailbox_s10.c   |   2 +-
 arch/arm/mach-socfpga/misc.c  |   4 +
 arch/arm/mach-socfpga/misc_s10.c  |   4 +-
 arch/arm/mach-socfpga/reset_manager_s10.c |  34 +-
 arch/arm/mach-socfpga/spl_agilex.c|  95 +++
 arch/arm/mach-socfpga/spl_s10.c   |  95 +--
 arch/arm/mach-socfpga/system_manager_s10.c|  26 +-
 arch/arm/mach-socfpga/wrap_pll_config_s10.c   |  13 +-
 board/intel/agilex-socdk/MAINTAINERS  |   7 +
 board/intel/agilex-socdk/Makefile |   7 +
 board/intel/agilex-socdk/socfpga.c|   7 +
 configs/socfpga_agilex_defconfig  |  59 ++
 drivers/clk/altera/Makefile   |   1 +
 drivers/clk/altera/clk-agilex.c   | 579 ++
 drivers/clk/altera/clk-agilex.h   | 237 +++
 drivers/ddr/altera/Kconfig|   6 +-
 drivers/ddr/altera/Makefile   |   3 +-
 drivers/ddr/altera/sdram_agilex.c | 168 +
 drivers/ddr/altera/sdram_s10.c| 298 +
 drivers/ddr/altera/sdram_s10.h| 148 +
 drivers/ddr/altera/sdram_soc64.c  | 304 +
 .../ddr/altera/{sdram_s10.h =

[U-Boot] [PATCH v4 02/17] arm: socfpga: Move firewall code to firewall file

[Ley Foon Tan]

Move firewall related code to new firewall.c, to share
code in Stratix 10 and Agilex.

SDMMC will transfer data to OCRAM in SPL. So, enable privilege for SDMMC
to allow DMA transfer to OCRAM.

Signed-off-by: Ley Foon Tan 

---
v4:
- Move SYSMGR_DMA* to firewall.c

v3:
- Move SOCFPGA_FIREWALL_TCU to firewall.c
---
 arch/arm/mach-socfpga/Makefile|   1 +
 .../mach-socfpga/{spl_s10.c => firewall.c}| 120 +++---
 .../mach/{firewall_s10.h => firewall.h}   |  10 +-
 arch/arm/mach-socfpga/spl_s10.c   |  93 +-
 drivers/ddr/altera/sdram_s10.c|   2 +-
 5 files changed, 26 insertions(+), 200 deletions(-)
 copy arch/arm/mach-socfpga/{spl_s10.c => firewall.c} (56%)
 rename arch/arm/mach-socfpga/include/mach/{firewall_s10.h => firewall.h} (94%)

diff --git a/arch/arm/mach-socfpga/Makefile b/arch/arm/mach-socfpga/Makefile
index fc1181cb27..dab34d0ef2 100644
--- a/arch/arm/mach-socfpga/Makefile
+++ b/arch/arm/mach-socfpga/Makefile
@@ -51,6 +51,7 @@ ifdef CONFIG_TARGET_SOCFPGA_ARRIA10
 obj-y  += spl_a10.o
 endif
 ifdef CONFIG_TARGET_SOCFPGA_STRATIX10
+obj-y  += firewall.o
 obj-y  += spl_s10.o
 endif
 endif
diff --git a/arch/arm/mach-socfpga/spl_s10.c b/arch/arm/mach-socfpga/firewall.c
similarity index 56%
copy from arch/arm/mach-socfpga/spl_s10.c
copy to arch/arm/mach-socfpga/firewall.c
index 16f19f901d..7c9d317896 100644
--- a/arch/arm/mach-socfpga/spl_s10.c
+++ b/arch/arm/mach-socfpga/firewall.c
@@ -1,45 +1,15 @@
 // SPDX-License-Identifier: GPL-2.0
 /*
- * Copyright (C) 2016-2018 Intel Corporation 
+ * Copyright (C) 2016-2019 Intel Corporation 
  *
  */
 
 #include 
-#include 
-#include 
 #include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
+#include 
 #include 
-#include 
-#include 
 
-DECLARE_GLOBAL_DATA_PTR;
-
-u32 spl_boot_device(void)
-{
-   /* TODO: Get from SDM or handoff */
-   return BOOT_DEVICE_MMC1;
-}
-
-#ifdef CONFIG_SPL_MMC_SUPPORT
-u32 spl_boot_mode(const u32 boot_device)
-{
-#if defined(CONFIG_SPL_FS_FAT) || defined(CONFIG_SPL_FS_EXT4)
-   return MMCSD_MODE_FS;
-#else
-   return MMCSD_MODE_RAW;
-#endif
-}
-#endif
-
-void spl_disable_firewall_l4_per(void)
+static void firewall_l4_per_disable(void)
 {
const struct socfpga_firwall_l4_per *firwall_l4_per_base =
(struct socfpga_firwall_l4_per *)SOCFPGA_FIREWALL_L4_PER;
@@ -79,7 +49,7 @@ void spl_disable_firewall_l4_per(void)
writel(FIREWALL_L4_DISABLE_ALL, addr[i]);
 }
 
-void spl_disable_firewall_l4_sys(void)
+static void firewall_l4_sys_disable(void)
 {
const struct socfpga_firwall_l4_sys *firwall_l4_sys_base =
(struct socfpga_firwall_l4_sys *)SOCFPGA_FIREWALL_L4_SYS;
@@ -113,83 +83,25 @@ void spl_disable_firewall_l4_sys(void)
writel(FIREWALL_L4_DISABLE_ALL, addr[i]);
 }
 
-void board_init_f(ulong dummy)
+static void firewall_bridge_disable(void)
 {
-   const struct cm_config *cm_default_cfg = cm_get_default_config();
-   int ret;
-
-   ret = spl_early_init();
-   if (ret)
-   hang();
-
-   socfpga_get_manager_addr();
-
-#ifdef CONFIG_HW_WATCHDOG
-   /* Ensure watchdog is paused when debugging is happening */
-   writel(SYSMGR_WDDBG_PAUSE_ALL_CPU,
-  socfpga_sysmgr_base + SYSMGR_S10_WDDBG);
-
-   /* Enable watchdog before initializing the HW */
-   socfpga_per_reset(SOCFPGA_RESET(L4WD0), 1);
-   socfpga_per_reset(SOCFPGA_RESET(L4WD0), 0);
-   hw_watchdog_init();
-#endif
-
-   /* ensure all processors are not released prior Linux boot */
-   writeq(0, CPU_RELEASE_ADDR);
-
-   socfpga_per_reset(SOCFPGA_RESET(OSC1TIMER0), 0);
-   timer_init();
-
-   sysmgr_pinmux_init();
-
-   /* configuring the HPS clocks */
-   cm_basic_init(cm_default_cfg);
+   /* disable lwsocf2fpga and soc2fpga bridge security */
+   writel(FIREWALL_BRIDGE_DISABLE_ALL, SOCFPGA_FIREWALL_SOC2FPGA);
+   writel(FIREWALL_BRIDGE_DISABLE_ALL, SOCFPGA_FIREWALL_LWSOC2FPGA);
+}
 
-#ifdef CONFIG_DEBUG_UART
-   socfpga_per_reset(SOCFPGA_RESET(UART0), 0);
-   debug_uart_init();
-#endif
+void firewall_setup(void)
+{
+   firewall_l4_per_disable();
+   firewall_l4_sys_disable();
+   firewall_bridge_disable();
 
-   preloader_console_init();
-   cm_print_clock_quick_summary();
+   /* disable SMMU security */
+   writel(FIREWALL_L4_DISABLE_ALL, SOCFPGA_FIREWALL_TCU);
 
/* enable non-secure interface to DMA330 DMA and peripherals */
writel(SYSMGR_DMA_IRQ_NS | SYSMGR_DMA_MGR_NS,
   socfpga_sysmgr_base + SYSMGR_S10_DMA);
writel(SYSMGR_DMAPERIPH_ALL_NS,
   socfpga_sysmgr_base + SYSMGR_S10_DMA_PERIPH);
-
-   spl_disable_firewall_l4_per();
-
-   spl_disable_firewall_l4_sys();
-
-   /* disable lwsocf2fpga and soc2fpga bridge security */
-   writel(FIREWALL_BRIDGE_DISABLE_ALL, SOCFPGA_FIREWALL_SOC2F

[U-Boot] [PATCH v4 01/17] arm: socfpga: agilex: Add base address for Intel Agilex SoC

[Ley Foon Tan]

Add base address for Intel Agilex SoC.

Reuse base_addr_s10.h for Agilex, only one base address is
different from S10.

Signed-off-by: Ley Foon Tan 
Reviewed-by: Simon Goldschmidt 

---
v2:
- Reuse base_addr_s10.h and add #ifdef Agilex for SOCFPGA_FW_MPU_DDR_SCR_ADDRESS
---
 arch/arm/mach-socfpga/include/mach/base_addr_s10.h | 4 
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/mach-socfpga/include/mach/base_addr_s10.h 
b/arch/arm/mach-socfpga/include/mach/base_addr_s10.h
index 1f549d7e70..d3eca65e97 100644
--- a/arch/arm/mach-socfpga/include/mach/base_addr_s10.h
+++ b/arch/arm/mach-socfpga/include/mach/base_addr_s10.h
@@ -10,7 +10,11 @@
 #define SOCFPGA_SDR_SCHEDULER_ADDRESS  0xf8000400
 #define SOCFPGA_HMC_MMR_IO48_ADDRESS   0xf801
 #define SOCFPGA_SDR_ADDRESS0xf8011000
+#ifdef CONFIG_TARGET_SOCFPGA_AGILEX
+#define SOCFPGA_FW_MPU_DDR_SCR_ADDRESS 0xf8020200
+#else
 #define SOCFPGA_FW_MPU_DDR_SCR_ADDRESS 0xf8020100
+#endif
 #define SOCFPGA_SMMU_ADDRESS   0xfa00
 #define SOCFPGA_MAILBOX_ADDRESS0xffa3
 #define SOCFPGA_UART0_ADDRESS  0xffc02000
-- 
2.19.0

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[U-Boot] Pull request for UEFI sub-system for v2019.10-rc4 (4)

[Heinrich Schuchardt]

The following changes since commit 2f760735c170c854ffca76be5607cec5c56fdc4f:

  Merge branch 'master' of git://git.denx.de/u-boot-sh (2019-09-07
13:49:39 -0400)

are available in the Git repository at:

  https://gitlab.denx.de/u-boot/custodians/u-boot-efi.git
tags/efi-2019-10-rc4-4

for you to fetch changes up to 8262578535f18cdab95318828e6fd6464721ac54:

  efi_loader: parameter checks EFI_FILE_PROTOCOL.SetInfo() (2019-09-11
21:51:38 +0200)

No errors are reported in Gitlab CI nor in Travis CI:
https://gitlab.denx.de/u-boot/custodians/u-boot-efi/pipelines/661
https://travis-ci.org/xypron2/u-boot/builds/583835035

Primary key fingerprint:
6DC4 F9C7 1F29 A6FA 06B7  6D33 C481 DBBC 2C05 1AC4


Pull request for UEFI sub-system for v2019.10-rc4 (4)

Fixes for the EFI_FILE_PROTOCOL:

* correctly iterate over directories
* correct Unicode conversion of file names
* parameter checks


Heinrich Schuchardt (8):
  efi_loader: EFI_FILE_PROTOCOL.Write() check args
  efi_loader: eliminate inline function ascii2unicode()
  efi_loader: correct reading of directories
  efi_loader: file size checks
  efi_loader: EFI_FILE_PROTOCOL rev 2 stub
  efi_loader: volume name in EFI_FILE_PROTOCOL.GetInfo()
  efi_loader: check parameters EFI_FILE_PROTOCOL.GetInfo()
  efi_loader: parameter checks EFI_FILE_PROTOCOL.SetInfo()

 include/efi_api.h|  24 +++-
 include/efi_loader.h |  16 ---
 lib/efi_loader/efi_device_path_to_text.c |  10 +-
 lib/efi_loader/efi_file.c| 226
---
 4 files changed, 174 insertions(+), 102 deletions(-)
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Re: [U-Boot] [PATCH v2 2/2] efi_loader: device_path: show a host device in understandable form

[Heinrich Schuchardt]

On 9/12/19 11:07 AM, AKASHI Takahiro wrote:
> On Thu, Sep 12, 2019 at 09:59:01AM +0200, Heinrich Schuchardt wrote:
>> On 9/12/19 6:52 AM, AKASHI Takahiro wrote:
>>> It would be better to give a user-friendly text to a host device
>>> on sandbox instead of just dumping its guid.
>>>
>>> => host bind 0 /opt/disk/uboot_sandbox_fat.img
>>> => efi devices
>>> Device   Device Path
>>>  
>>> 15c1f3a0 /VenHw(e61d73b9-a384-4acc-aeab-82e828f3628b)
>>> 15c20f00 /VenHw(e61d73b9-a384-4acc-aeab-82e828f3628b)/Hostdev(0)
>>>
>>> Signed-off-by: AKASHI Takahiro 
>>> ---
>>>  lib/efi_loader/efi_device_path_to_text.c | 5 +
>>>  1 file changed, 5 insertions(+)
>>>
>>> diff --git a/lib/efi_loader/efi_device_path_to_text.c 
>>> b/lib/efi_loader/efi_device_path_to_text.c
>>> index 96fd08971b73..40a06b70e08a 100644
>>> --- a/lib/efi_loader/efi_device_path_to_text.c
>>> +++ b/lib/efi_loader/efi_device_path_to_text.c
>>> @@ -62,6 +62,11 @@ static char *dp_hardware(char *s, struct efi_device_path 
>>> *dp)
>>> case DEVICE_PATH_SUB_TYPE_VENDOR: {
>>> struct efi_device_path_vendor *vdp =
>>> (struct efi_device_path_vendor *)dp;
>>> +#ifdef CONFIG_SANDBOX
>>> +   if (!guidcmp(&vdp->guid, &efi_guid_host_dev))
>>> +   s += sprintf(s, "Hostdev(%d)", vdp->vendor_data[0]);
>>
>> This does not conform to the UEFI spec.
>
> Okay, so I'd like to change the format again.
> Instead of 'Vendor' subtype, use 'Controller' subtype.
> This way, the example above can be seen as:
>
> 15c1f3a0 /VenHw(e61d73b9-a384-4acc-aeab-82e828f3628b)
> 15c20f00 /VenHw(e61d73b9-a384-4acc-aeab-82e828f3628b)/Ctrl(0)
>
> Looks nice, doesn't it?

A controller is a handle that bears the EFI_DRIVER_BINDING_PROTOCOL.

Best regards

Heinrich

>
> -Takahiro Akashi
>
>> The purpose of the sandbox is testing. What would make sense to me is
>> checking in a Python test that The VenHw() output contains the GUID and
>> the drive number.
>>
>> Best regards
>>
>> Heinrich
>>
>>> +   else
>>> +#endif
>>> s += sprintf(s, "VenHw(%pUl)", &vdp->guid);
>>> break;
>>> }
>>>
>>
>

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Re: [U-Boot] [PATCH v2 2/3] efi_loader: disk: install FILE_SYSTEM_PROTOCOL only if available

[AKASHI Takahiro]

On Thu, Sep 12, 2019 at 11:43:07AM +0200, Heinrich Schuchardt wrote:
> On 9/12/19 11:17 AM, AKASHI Takahiro wrote:
> > On Thu, Sep 12, 2019 at 10:57:20AM +0200, Heinrich Schuchardt wrote:
> >> On 9/12/19 6:51 AM, AKASHI Takahiro wrote:
> >>> In the current implementation, EFI_SIMPLEFILE_SYSTEM_PROTOCOL is always
> >>> installed to all the partitions even if some of them may house no file
> >>> system.
> >>>
> >>> With this patch, that protocol will be installed only if FAT file system
> >>> exists.
> >>>
> >>> Signed-off-by: AKASHI Takahiro 
> >>> ---
> >>>  lib/efi_loader/efi_disk.c | 16 +++-
> >>>  1 file changed, 15 insertions(+), 1 deletion(-)
> >>>
> >>> diff --git a/lib/efi_loader/efi_disk.c b/lib/efi_loader/efi_disk.c
> >>> index 7a6b06821a47..d72f455901f2 100644
> >>> --- a/lib/efi_loader/efi_disk.c
> >>> +++ b/lib/efi_loader/efi_disk.c
> >>> @@ -9,6 +9,7 @@
> >>>  #include 
> >>>  #include 
> >>>  #include 
> >>> +#include 
> >>>  #include 
> >>>  #include 
> >>>
> >>> @@ -217,6 +218,19 @@ efi_fs_from_path(struct efi_device_path *full_path)
> >>>   return handler->protocol_interface;
> >>>  }
> >>>
> >>> +static int efi_fs_exists(struct blk_desc *desc, int part)
> >>> +{
> >>> + if (fs_set_blk_dev_with_part(desc, part))
> >>> + return 0;
> >>> +
> >>> + if (strcmp(fs_get_type_name(), "fat"))
> >>
> >> Before your patch we could use any supported file system (e.g. EXT2). I
> >> see no need for a restriction to FAT. You could compare the string to
> >> "unsupported":
> >
> > No. As far as you want to stick to compliance to UEFI specification,
> > "fat" is the only file system supported by UEFI.
> 
> In the case of device path node VenHw() there is a direct rule in the
> spec indicating how it should be rendered. I have not seen anything in
> the UEFI spec saying that you should not support file systems besides
> FAT. So there is no compliance issue. I would be reluctant to remove an
> existing capability of U-Boot.

See section 13.3. It says,
The file system supported by the Extensible Firmware Interface is
based on the FAT file system.

-Takahiro Akashi

> >
> >> if (!strcmp(fs_get_type_name(), "unsupported"))
> >>return 0;
> >>
> >> But wouldn't it be preferable to have a function to access fs_type (in
> >> fs/fs.c) directly instead of a string representation?
> >
> > Agree, but there is no direct function in fs/fs.c.
> > I'm reluctant to invent a new function just for this purpose.
> 
> In that case we should compare to a string that is defined as constant
> in fs.h.
> 
> Best regards
> 
> Heinrich
> 
> >
> > -Takahiro Akashi
> >
> >
> >> Otherwise we should convert the string "unsupported" of fstypes[] into a
> >> constant in fs.h so that we can be sure we are using the same value.
> >>
> >> Best regards
> >>
> >> Heinrich
> >>
> >>> + return 0;
> >>> +
> >>> + fs_close();
> >>> +
> >>> + return 1;
> >>> +}
> >>> +
> >>>  /*
> >>>   * Create a handle for a partition or disk
> >>>   *
> >>> @@ -270,7 +284,7 @@ static efi_status_t efi_disk_add_dev(
> >>>  diskobj->dp);
> >>>   if (ret != EFI_SUCCESS)
> >>>   return ret;
> >>> - if (part >= 1) {
> >>> + if (part >= 1 && efi_fs_exists(desc, part)) {
> >>>   diskobj->volume = efi_simple_file_system(desc, part,
> >>>diskobj->dp);
> >>>   ret = efi_add_protocol(&diskobj->header,
> >>>
> >>
> >
> 
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Re: [U-Boot] [PATCH v2 2/3] efi_loader: disk: install FILE_SYSTEM_PROTOCOL only if available

[Heinrich Schuchardt]

On 9/12/19 11:17 AM, AKASHI Takahiro wrote:
> On Thu, Sep 12, 2019 at 10:57:20AM +0200, Heinrich Schuchardt wrote:
>> On 9/12/19 6:51 AM, AKASHI Takahiro wrote:
>>> In the current implementation, EFI_SIMPLEFILE_SYSTEM_PROTOCOL is always
>>> installed to all the partitions even if some of them may house no file
>>> system.
>>>
>>> With this patch, that protocol will be installed only if FAT file system
>>> exists.
>>>
>>> Signed-off-by: AKASHI Takahiro 
>>> ---
>>>  lib/efi_loader/efi_disk.c | 16 +++-
>>>  1 file changed, 15 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/lib/efi_loader/efi_disk.c b/lib/efi_loader/efi_disk.c
>>> index 7a6b06821a47..d72f455901f2 100644
>>> --- a/lib/efi_loader/efi_disk.c
>>> +++ b/lib/efi_loader/efi_disk.c
>>> @@ -9,6 +9,7 @@
>>>  #include 
>>>  #include 
>>>  #include 
>>> +#include 
>>>  #include 
>>>  #include 
>>>
>>> @@ -217,6 +218,19 @@ efi_fs_from_path(struct efi_device_path *full_path)
>>> return handler->protocol_interface;
>>>  }
>>>
>>> +static int efi_fs_exists(struct blk_desc *desc, int part)
>>> +{
>>> +   if (fs_set_blk_dev_with_part(desc, part))
>>> +   return 0;
>>> +
>>> +   if (strcmp(fs_get_type_name(), "fat"))
>>
>> Before your patch we could use any supported file system (e.g. EXT2). I
>> see no need for a restriction to FAT. You could compare the string to
>> "unsupported":
>
> No. As far as you want to stick to compliance to UEFI specification,
> "fat" is the only file system supported by UEFI.

In the case of device path node VenHw() there is a direct rule in the
spec indicating how it should be rendered. I have not seen anything in
the UEFI spec saying that you should not support file systems besides
FAT. So there is no compliance issue. I would be reluctant to remove an
existing capability of U-Boot.

>
>> if (!strcmp(fs_get_type_name(), "unsupported"))
>>  return 0;
>>
>> But wouldn't it be preferable to have a function to access fs_type (in
>> fs/fs.c) directly instead of a string representation?
>
> Agree, but there is no direct function in fs/fs.c.
> I'm reluctant to invent a new function just for this purpose.

In that case we should compare to a string that is defined as constant
in fs.h.

Best regards

Heinrich

>
> -Takahiro Akashi
>
>
>> Otherwise we should convert the string "unsupported" of fstypes[] into a
>> constant in fs.h so that we can be sure we are using the same value.
>>
>> Best regards
>>
>> Heinrich
>>
>>> +   return 0;
>>> +
>>> +   fs_close();
>>> +
>>> +   return 1;
>>> +}
>>> +
>>>  /*
>>>   * Create a handle for a partition or disk
>>>   *
>>> @@ -270,7 +284,7 @@ static efi_status_t efi_disk_add_dev(
>>>diskobj->dp);
>>> if (ret != EFI_SUCCESS)
>>> return ret;
>>> -   if (part >= 1) {
>>> +   if (part >= 1 && efi_fs_exists(desc, part)) {
>>> diskobj->volume = efi_simple_file_system(desc, part,
>>>  diskobj->dp);
>>> ret = efi_add_protocol(&diskobj->header,
>>>
>>
>

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Re: [U-Boot] [PATCH v2 3/3] efi_loader: disk: install file system protocol to a whole disk

[Heinrich Schuchardt]

On 9/12/19 6:51 AM, AKASHI Takahiro wrote:
> Currently, a whole disk without any partitions is not associated
> with EFI_SIMPLE_FILE_SYSTEM_PROTOCOL. So even if it houses FAT
> file system, there is a chance that we may not be able to access
> it, particularly, when accesses are to be attempted after searching
> that protocol against a device handle.
>
> With this patch, EFI_SIMPLE_FILE_SYSTEM_PROTOCOL is installed
> to such a disk if part_get_info() shows there is not partition
> table installed on it.
>
> Signed-off-by: AKASHI Takahiro 
> ---
>  lib/efi_loader/efi_disk.c | 5 -
>  1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/lib/efi_loader/efi_disk.c b/lib/efi_loader/efi_disk.c
> index d72f455901f2..d36f22cedc52 100644
> --- a/lib/efi_loader/efi_disk.c
> +++ b/lib/efi_loader/efi_disk.c
> @@ -253,6 +253,7 @@ static efi_status_t efi_disk_add_dev(
>   struct efi_disk_obj **disk)
>  {
>   struct efi_disk_obj *diskobj;
> + disk_partition_t info;
>   efi_status_t ret;
>
>   /* Don't add empty devices */
> @@ -284,7 +285,9 @@ static efi_status_t efi_disk_add_dev(
>  diskobj->dp);
>   if (ret != EFI_SUCCESS)
>   return ret;
> - if (part >= 1 && efi_fs_exists(desc, part)) {
> + /* partitions or whole disk without partitions */
> + if ((part >= 1 || part_get_info(desc, part, &info)) &&

part_get_info() returns -1 for part = 0 on a DOS partioned disk. So this
check does not work.

Best regards

Heinrich

> + efi_fs_exists(desc, part)) {
>   diskobj->volume = efi_simple_file_system(desc, part,
>diskobj->dp);
>   ret = efi_add_protocol(&diskobj->header,
>

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[U-Boot] [PATCH 0/4] arm: mxs: mxs_set_gpmiclk

[Rasmus Villemoes]

While trying to implement an mxs_set_gpmiclk() I stumbled on a few minor things.

Rasmus Villemoes (4):
  arm: mxs: fix register definitions for clkctrl_gpmi and clkctrl_sspX
  arm: mxs: fix comments in arch_cpu_init to match the code
  arm: mxs: be more careful when enabling gpmi_clk
  arm: mxs: implement mxs_set_gpmiclk

 arch/arm/cpu/arm926ejs/mxs/clock.c| 41 +++
 arch/arm/cpu/arm926ejs/mxs/mxs.c  |  9 ++--
 arch/arm/include/asm/arch-mxs/clock.h |  1 +
 .../include/asm/arch-mxs/regs-clkctrl-mx23.h  |  6 ++-
 .../include/asm/arch-mxs/regs-clkctrl-mx28.h  | 15 ---
 5 files changed, 62 insertions(+), 10 deletions(-)

-- 
2.20.1

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[U-Boot] [PATCH 4/4] arm: mxs: implement mxs_set_gpmiclk

[Rasmus Villemoes]

This allows a board file to set the gpmiclk to something other than
the default 24 MHz based on ref_xtal.

I don't have an mx23-based board, but I believe there's a bug in the
current mxs_get_gpmiclk: According to the data sheet, the gpmiclk can
be derived from ref_io, not ref_cpu. Since other clocks are also
derived from ref_io, it seems most sensible to require the board file
to set that appropriately first, then derive the divider from its
current setting.

For mx28 boards, OTOH, there's a separate ref_gpmi only used for
clk_gpmi. For simplicity, if !xtal, simply enable that at its maximum
frequency.

Signed-off-by: Rasmus Villemoes 
---
 arch/arm/cpu/arm926ejs/mxs/clock.c| 41 +++
 arch/arm/include/asm/arch-mxs/clock.h |  1 +
 2 files changed, 42 insertions(+)

diff --git a/arch/arm/cpu/arm926ejs/mxs/clock.c 
b/arch/arm/cpu/arm926ejs/mxs/clock.c
index 43d044d917..d247da56fe 100644
--- a/arch/arm/cpu/arm926ejs/mxs/clock.c
+++ b/arch/arm/cpu/arm926ejs/mxs/clock.c
@@ -138,6 +138,47 @@ static uint32_t mxs_get_gpmiclk(void)
return (PLL_FREQ_MHZ * PLL_FREQ_COEF / frac) / div;
 }
 
+void mxs_set_gpmiclk(uint32_t freq, int xtal)
+{
+   struct mxs_clkctrl_regs *clkctrl_regs =
+   (struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
+   uint32_t clk, div;
+
+   if (xtal) {
+   clk = XTAL_FREQ_KHZ;
+   } else {
+#if defined(CONFIG_MX23)
+   clk = mxs_get_ioclk(MXC_IOCLK0);
+#elif defined(CONFIG_MX28)
+   /* enable ref_gpmi at 480 MHz. */
+   writeb(CLKCTRL_FRAC_CLKGATE,
+   
&clkctrl_regs->hw_clkctrl_frac1_set[CLKCTRL_FRAC1_GPMI]);
+   writeb(CLKCTRL_FRAC_CLKGATE | PLL_FREQ_COEF,
+   &clkctrl_regs->hw_clkctrl_frac1[CLKCTRL_FRAC1_GPMI]);
+   writeb(CLKCTRL_FRAC_CLKGATE,
+   
&clkctrl_regs->hw_clkctrl_frac1_clr[CLKCTRL_FRAC1_GPMI]);
+   clk = PLL_FREQ_KHZ;
+#endif
+   }
+   if (freq > clk)
+   return;
+   div = clk / freq;
+   if (div > CLKCTRL_GPMI_DIV_MASK)
+   div = CLKCTRL_GPMI_DIV_MASK;
+
+   clrbits_le32(&clkctrl_regs->hw_clkctrl_gpmi, CLKCTRL_GPMI_CLKGATE);
+   while (readl(&clkctrl_regs->hw_clkctrl_gpmi) & CLKCTRL_GPMI_CLKGATE)
+   ;
+   clrsetbits_le32(&clkctrl_regs->hw_clkctrl_gpmi, CLKCTRL_GPMI_DIV_MASK, 
div);
+   while (readl(&clkctrl_regs->hw_clkctrl_gpmi) & CLKCTRL_GPMI_BUSY)
+   ;
+
+   if (xtal)
+   writel(CLKCTRL_CLKSEQ_BYPASS_GPMI, 
&clkctrl_regs->hw_clkctrl_clkseq_set);
+   else
+   writel(CLKCTRL_CLKSEQ_BYPASS_GPMI, 
&clkctrl_regs->hw_clkctrl_clkseq_clr);
+}
+
 /*
  * Set IO clock frequency, in kHz
  */
diff --git a/arch/arm/include/asm/arch-mxs/clock.h 
b/arch/arm/include/asm/arch-mxs/clock.h
index ee56d10fec..0a6625eb90 100644
--- a/arch/arm/include/asm/arch-mxs/clock.h
+++ b/arch/arm/include/asm/arch-mxs/clock.h
@@ -44,6 +44,7 @@ uint32_t mxc_get_clock(enum mxc_clock clk);
 
 void mxs_set_ioclk(enum mxs_ioclock io, uint32_t freq);
 void mxs_set_sspclk(enum mxs_sspclock ssp, uint32_t freq, int xtal);
+void mxs_set_gpmiclk(uint32_t freq, int xtal);
 void mxs_set_ssp_busclock(unsigned int bus, uint32_t freq);
 void mxs_set_lcdclk(uint32_t __maybe_unused lcd_base, uint32_t freq);
 
-- 
2.20.1

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[U-Boot] [PATCH 2/4] arm: mxs: fix comments in arch_cpu_init to match the code

[Rasmus Villemoes]

The comment says to clear the bypass bit, but in fact it sets it, thus
selecting ref_xtal. And the next line of code does not set the divider
to 12, but to (the reset value of) 1.

Signed-off-by: Rasmus Villemoes 
---
 arch/arm/cpu/arm926ejs/mxs/mxs.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/cpu/arm926ejs/mxs/mxs.c b/arch/arm/cpu/arm926ejs/mxs/mxs.c
index 85c65dcb44..585c53baf6 100644
--- a/arch/arm/cpu/arm926ejs/mxs/mxs.c
+++ b/arch/arm/cpu/arm926ejs/mxs/mxs.c
@@ -98,11 +98,11 @@ int arch_cpu_init(void)
/*
 * Enable NAND clock
 */
-   /* Clear bypass bit */
+   /* Set bypass bit */
writel(CLKCTRL_CLKSEQ_BYPASS_GPMI,
&clkctrl_regs->hw_clkctrl_clkseq_set);
 
-   /* Set GPMI clock to ref_gpmi / 12 */
+   /* Set GPMI clock to ref_xtal / 1 */
clrsetbits_le32(&clkctrl_regs->hw_clkctrl_gpmi,
CLKCTRL_GPMI_CLKGATE | CLKCTRL_GPMI_DIV_MASK, 1);
 
-- 
2.20.1

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[U-Boot] [PATCH 3/4] arm: mxs: be more careful when enabling gpmi_clk

[Rasmus Villemoes]

The data sheet says that the DIV field cannot change while the CLKGATE
bit is set or modified. So do it a little more carefully, by first
clearing the bit, waiting for that to appear, then setting the DIV
field.

Signed-off-by: Rasmus Villemoes 
---
 arch/arm/cpu/arm926ejs/mxs/mxs.c | 5 -
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/arch/arm/cpu/arm926ejs/mxs/mxs.c b/arch/arm/cpu/arm926ejs/mxs/mxs.c
index 585c53baf6..183aa40b6d 100644
--- a/arch/arm/cpu/arm926ejs/mxs/mxs.c
+++ b/arch/arm/cpu/arm926ejs/mxs/mxs.c
@@ -103,8 +103,11 @@ int arch_cpu_init(void)
&clkctrl_regs->hw_clkctrl_clkseq_set);
 
/* Set GPMI clock to ref_xtal / 1 */
+   clrbits_le32(&clkctrl_regs->hw_clkctrl_gpmi, CLKCTRL_GPMI_CLKGATE);
+   while (readl(&clkctrl_regs->hw_clkctrl_gpmi) & CLKCTRL_GPMI_CLKGATE)
+   ;
clrsetbits_le32(&clkctrl_regs->hw_clkctrl_gpmi,
-   CLKCTRL_GPMI_CLKGATE | CLKCTRL_GPMI_DIV_MASK, 1);
+   CLKCTRL_GPMI_DIV_MASK, 1);
 
udelay(1000);
 
-- 
2.20.1

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[U-Boot] [PATCH 1/4] arm: mxs: fix register definitions for clkctrl_gpmi and clkctrl_sspX

[Rasmus Villemoes]

I tried clearing a bit by writing to hw_clkctrl_gpmi_clr, then
busy-waiting for it to actually clear. My board hung. The data sheet
agrees, these registers do not have _set, _clr, _tog, so fix up the
definitions. git grep -E 'clkctrl_(gpmi|ssp[0-9])_' says that nobody
uses those non-existing ops registers.

Signed-off-by: Rasmus Villemoes 
---
 arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h |  6 --
 arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h | 15 ++-
 2 files changed, 14 insertions(+), 7 deletions(-)

diff --git a/arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h 
b/arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h
index 6e9ffeb6d5..50fdc9cd03 100644
--- a/arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h
+++ b/arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h
@@ -24,8 +24,10 @@ struct mxs_clkctrl_regs {
mxs_reg_32(hw_clkctrl_xbus) /* 0x40 */
mxs_reg_32(hw_clkctrl_xtal) /* 0x50 */
mxs_reg_32(hw_clkctrl_pix)  /* 0x60 */
-   mxs_reg_32(hw_clkctrl_ssp0) /* 0x70 */
-   mxs_reg_32(hw_clkctrl_gpmi) /* 0x80 */
+   uint32_thw_clkctrl_ssp0;/* 0x70 */
+   uint32_treserved_ssp0[3];   /* 0x74-0x7c */
+   uint32_thw_clkctrl_gpmi;/* 0x80 */
+   uint32_treserved_gpmi[3];   /* 0x84-0x8c */
mxs_reg_32(hw_clkctrl_spdif)/* 0x90 */
mxs_reg_32(hw_clkctrl_emi)  /* 0xa0 */
 
diff --git a/arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h 
b/arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h
index 01e0a7a053..caef9e4b1f 100644
--- a/arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h
+++ b/arch/arm/include/asm/arch-mxs/regs-clkctrl-mx28.h
@@ -27,11 +27,16 @@ struct mxs_clkctrl_regs {
mxs_reg_32(hw_clkctrl_hbus) /* 0x60 */
mxs_reg_32(hw_clkctrl_xbus) /* 0x70 */
mxs_reg_32(hw_clkctrl_xtal) /* 0x80 */
-   mxs_reg_32(hw_clkctrl_ssp0) /* 0x90 */
-   mxs_reg_32(hw_clkctrl_ssp1) /* 0xa0 */
-   mxs_reg_32(hw_clkctrl_ssp2) /* 0xb0 */
-   mxs_reg_32(hw_clkctrl_ssp3) /* 0xc0 */
-   mxs_reg_32(hw_clkctrl_gpmi) /* 0xd0 */
+   uint32_thw_clkctrl_ssp0;/* 0x90 */
+   uint32_treserved_ssp0[3];   /* 0x94-0x9c */
+   uint32_thw_clkctrl_ssp1;/* 0xa0 */
+   uint32_treserved_ssp1[3];   /* 0xa4-0xac */
+   uint32_thw_clkctrl_ssp2;/* 0xb0 */
+   uint32_treserved_ssp2[3];   /* 0xb4-0xbc */
+   uint32_thw_clkctrl_ssp3;/* 0xc0 */
+   uint32_treserved_ssp3[3];   /* 0xc4-0xcc */
+   uint32_thw_clkctrl_gpmi;/* 0xd0 */
+   uint32_treserved_gpmi[3];   /* 0xd4-0xdc */
mxs_reg_32(hw_clkctrl_spdif)/* 0xe0 */
mxs_reg_32(hw_clkctrl_emi)  /* 0xf0 */
mxs_reg_32(hw_clkctrl_saif0)/* 0x100 */
-- 
2.20.1

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Re: [U-Boot] [PATCH v3 0/3] spi: Split CONFIG_DM_SPI* to CONFIG_{SPL_TPL}DM_SPI*

[Schrempf Frieder]

On 12.09.19 11:03, Lukasz Majewski wrote:
> Hi Frieder,
> 
>> Hi Lukasz,
>>
>> On 10.09.19 12:22, Lukasz Majewski wrote:
>>> Hi Frieder,
>>>
 On Mon, 9 Sep 2019 11:11:50 +
 Schrempf Frieder  wrote:
   
> Hi Lukasz,
>
> On 05.09.19 20:09, Tom Rini wrote:
>> On Thu, Sep 05, 2019 at 12:16:36AM +0200, Lukasz Majewski wrote:
>>   
>>> This patch series introduces new SPL and TPL specific Kconfig
>>> entries for DM_SPI* options. Such change allows using the spi
>>> driver in SPL/TPL or U-Boot proper.
>>>
>>> First two patches - related to ls10{42}* NXP soc fix some issues
>>> with defining the DM_SPI* defines in .h file instead of
>>> Kconfig.
>>>
>>> This series doesn't introduce build breaks, but board
>>> maintainers are kindly asked to check if their boards still
>>> boots.
>>>
>>> Buildman setup for binary size regression checking:
>>>
>>> ./tools/buildman/buildman.py -b HEAD --count=4 ls1043
>>> --output-dir=../BUILD/ --force-build -CveE
>>> ./tools/buildman/buildman.py -b HEAD --count=4 ls1043
>>> --output-dir=../BUILD/ -Ssdel
>>
>> So you did fix the ls1043 problems but ls1046 is still a problem.
>>
>
> I was trying to clean up this config mess some weeks ago. I
> stumbled over the same issues (size deltas below) when I tested
> with buildman and finally gave up on it. This was my testing
> branch for reference: [1].
>
> Thanks for your work and I hope you/we can get this sorted out
> somehow...

 For now I've only posted the patch to introduce SPL_DM_SPI in
 Kconig: https://patchwork.ozlabs.org/patch/1159655/
>>>
>>> However, I've looked on your patchset and IMHO this work could be
>>> divided (as doing it at once is not feasible).
>>>
>>> For example the CONFIG_SPI_FLASH_MTD could be converted to
>>> (SPL_TPL_)SPI_FLASH_MTD and then one could use
>>>
>>> #if CONFIG_IS_ENABLED(SPI_FLASH_MTD) in drivers/mtd/spi/sf_probe.c
>>> (as it is only used there).
>>>
>>> Then we could avoid situations where code is added as you remove it
>>> here [1]:
>>> https://github.com/fschrempf/u-boot/commit/b6489fb5928c2b41d7e4cb39933f078659b4f10e#diff-9d3e174d033b8b9c9d380a22a81600aaL136
>>>
>>> What I'm afraid though, is that split of SPI_FLASH_MTD will require
>>> adding unwillingly SPL_(TPL_)SPI_FLASH_MTD to all boards which
>>> already define it (and only drop ones, which use in .h file
>>> pattern as [1]).
>>
>> Yes, this looks like what I've tried to do separately in this branch
>> [1].
>>
>> The problem with some socfpga boards is, that they enable
>> CONFIG_SPI_FLASH_MTD in socfpga_common.h, without enabling
>> CONFIG_SPI_FLASH, which is probably wrong.
> 
> It looks to me like the code in:
> https://github.com/fschrempf/u-boot/commit/059d67efa34da92aaf738758e596f436203c84c2#diff-9d3e174d033b8b9c9d380a22a81600aaL136
> 
> is to prevent ALL socfpgas from compiling in FLASH MTD support to SPL,
> as it causes build breaks (as I do have such situation in one of my
> boards - it uses tiny SPI in SPL to read data from SPI-NOR, without the
> need to enable MTD there) .
> 
> In other words those boards only use FLASH MTD driver in U-Boot proper.
> (and probably there shall not be any deltas in buildman build binaries
> [*])

Right.

> 
>> So I tried to correct
>> this, but looking at it again, this should be done separately.
>>
>> So if I remove the added "CONFIG_SPI_FLASH=y" from my patches and
>> rebase, this should be ok.
> 
> I think yes. I guess that ALL socfpgas shall have added
> CONFIG_SPI_FLASH_MTD=y to their _defconfigs

Right.

> 
> 
> It may also happen that boards, which define CONFIG_SPI_FLASH_MTD would
> require both CONFIG_SPI_FLASH_MTD and CONFIG_SPL_SPI_FLASH_MTD defined
> (if they don't use socfpga style .h code) to have the same
> binaries build.

Last time I looked such boards didn't exist, but I'll check again.

> 
>>
>> For this set I have still one question: Should I split the patches as
>> currently done in [1]? This would mean after the first patch some
>> boards miss SPI_FLASH_MTD code and the subsequent board config
>> patches correct it afterwards. Or should I merge all the changes to a
>> single patch, to not break the boards in between.
> 
> I would opt for preparing one single patch with conversion (to avoid
> build breaks). This would also allow easy buildman testing [*] to see
> if there is any difference in sizes of binaries (elf sections to be
> precise).
> 
> I would also add the patch to define CONFIG_SPL_SPI_FLASH_MTD in
> Kconfig to show that such option is available for use after the
> conversion (IMHO it shall be added before the conversion patch).

Ok. Last time I worked on this, there was no board using SPI_FLASH_MTD 
in SPL. But this might not be true anymore. Anyway, I'll add the option.

> 
>> Unfortunately I can't do it the other way round and apply the board
>> config changes first, as this breaks t

Re: [U-Boot] [PATCH v2 2/3] efi_loader: disk: install FILE_SYSTEM_PROTOCOL only if available

[AKASHI Takahiro]

On Thu, Sep 12, 2019 at 10:57:20AM +0200, Heinrich Schuchardt wrote:
> On 9/12/19 6:51 AM, AKASHI Takahiro wrote:
> > In the current implementation, EFI_SIMPLEFILE_SYSTEM_PROTOCOL is always
> > installed to all the partitions even if some of them may house no file
> > system.
> >
> > With this patch, that protocol will be installed only if FAT file system
> > exists.
> >
> > Signed-off-by: AKASHI Takahiro 
> > ---
> >  lib/efi_loader/efi_disk.c | 16 +++-
> >  1 file changed, 15 insertions(+), 1 deletion(-)
> >
> > diff --git a/lib/efi_loader/efi_disk.c b/lib/efi_loader/efi_disk.c
> > index 7a6b06821a47..d72f455901f2 100644
> > --- a/lib/efi_loader/efi_disk.c
> > +++ b/lib/efi_loader/efi_disk.c
> > @@ -9,6 +9,7 @@
> >  #include 
> >  #include 
> >  #include 
> > +#include 
> >  #include 
> >  #include 
> >
> > @@ -217,6 +218,19 @@ efi_fs_from_path(struct efi_device_path *full_path)
> > return handler->protocol_interface;
> >  }
> >
> > +static int efi_fs_exists(struct blk_desc *desc, int part)
> > +{
> > +   if (fs_set_blk_dev_with_part(desc, part))
> > +   return 0;
> > +
> > +   if (strcmp(fs_get_type_name(), "fat"))
> 
> Before your patch we could use any supported file system (e.g. EXT2). I
> see no need for a restriction to FAT. You could compare the string to
> "unsupported":

No. As far as you want to stick to compliance to UEFI specification,
"fat" is the only file system supported by UEFI.

> if (!strcmp(fs_get_type_name(), "unsupported"))
>   return 0;
> 
> But wouldn't it be preferable to have a function to access fs_type (in
> fs/fs.c) directly instead of a string representation?

Agree, but there is no direct function in fs/fs.c.
I'm reluctant to invent a new function just for this purpose.

-Takahiro Akashi


> Otherwise we should convert the string "unsupported" of fstypes[] into a
> constant in fs.h so that we can be sure we are using the same value.
> 
> Best regards
> 
> Heinrich
> 
> > +   return 0;
> > +
> > +   fs_close();
> > +
> > +   return 1;
> > +}
> > +
> >  /*
> >   * Create a handle for a partition or disk
> >   *
> > @@ -270,7 +284,7 @@ static efi_status_t efi_disk_add_dev(
> >diskobj->dp);
> > if (ret != EFI_SUCCESS)
> > return ret;
> > -   if (part >= 1) {
> > +   if (part >= 1 && efi_fs_exists(desc, part)) {
> > diskobj->volume = efi_simple_file_system(desc, part,
> >  diskobj->dp);
> > ret = efi_add_protocol(&diskobj->header,
> >
> 
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[U-Boot] [PATCH v1 5/5] colibri_t30: disable rs232 serial transceiver forceoff pins

[Marcel Ziswiler]

From: Marcel Ziswiler 

Use gpio_early_init_uart() function to disable RS232 serial transceiver
ForceOFF# pins on Iris.

Signed-off-by: Marcel Ziswiler 

---

 board/toradex/colibri_t30/colibri_t30.c | 11 +++
 1 file changed, 11 insertions(+)

diff --git a/board/toradex/colibri_t30/colibri_t30.c 
b/board/toradex/colibri_t30/colibri_t30.c
index b6b00e3860..eb53fa6126 100644
--- a/board/toradex/colibri_t30/colibri_t30.c
+++ b/board/toradex/colibri_t30/colibri_t30.c
@@ -55,6 +55,17 @@ void pinmux_init(void)
   ARRAY_SIZE(colibri_t30_padctrl));
 }
 
+/*
+ * Disable RS232 serial transceiver ForceOFF# pins on Iris
+ */
+void gpio_early_init_uart(void)
+{
+   gpio_request(TEGRA_GPIO(X, 6), "Force OFF# X13");
+   gpio_direction_output(TEGRA_GPIO(X, 6), 1);
+   gpio_request(TEGRA_GPIO(X, 7), "Force OFF# X14");
+   gpio_direction_output(TEGRA_GPIO(X, 7), 1);
+}
+
 /*
  * Enable AX88772B USB to LAN controller
  */
-- 
2.21.0

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