Hi Simon,
On Sat, Oct 12, 2019 at 11:38 AM Simon Glass wrote:
>
> Hi Bin,
>
> On Fri, 11 Oct 2019 at 07:19, Bin Meng wrote:
> >
> > Hi Simon,
> >
> > On Fri, Oct 11, 2019 at 1:06 AM Simon Glass wrote:
> > >
> > > Hi Bin,
> > >
> > > On Sat, 5 Oct 2019 at 08:36, Bin Meng wrote:
> > > >
> > > >
Hi Simon,
On Sat, Oct 12, 2019 at 11:38 AM Simon Glass wrote:
>
> Hi Bin,
>
> On Thu, 10 Oct 2019 at 03:50, Bin Meng wrote:
> >
> > Hi Simon,
> >
> > On Wed, Sep 25, 2019 at 10:59 PM Simon Glass wrote:
> > >
> > > Newer Intel SoCs have different ways of setting up cache-as-ram (CAR).
> > > Add
Hi Simon,
On Sat, Oct 12, 2019 at 11:38 AM Simon Glass wrote:
>
> Hi Bin,
>
> On Thu, 10 Oct 2019 at 00:23, Bin Meng wrote:
> >
> > Hi Simon,
> >
> > On Wed, Sep 25, 2019 at 10:59 PM Simon Glass wrote:
> > >
> > > This should take account of the end of the new cache record since a record
> > >
Hi Simon,
On Sat, Oct 12, 2019 at 11:08 AM Simon Glass wrote:
>
> Hi Bin,
>
> On Wed, 9 Oct 2019 at 07:55, Bin Meng wrote:
> >
> > Hi Simon,
> >
> > On Wed, Sep 25, 2019 at 10:12 PM Simon Glass wrote:
> > >
> > > On x86 platforms the SPI flash can be mapped into memory so that the
> > > content
Jagan,
On 2019/9/19 下午2:02, Jagan Teki wrote:
Add initial support for Libre Computer Board ROC-RK3399-PC.
Specification
- Rockchip RK3399
- 4GB LPDDR4 dual-channel 64-bit RAM
- SD card slot
- eMMC socket
- 16M Byte SPI Flash
- Gigabit ethernet
- PCIe 4X slot
- WiFI/BT module socket
- HDMI Out,
Hi Bin,
On Fri, 11 Oct 2019 at 07:19, Bin Meng wrote:
>
> Hi Simon,
>
> On Fri, Oct 11, 2019 at 1:06 AM Simon Glass wrote:
> >
> > Hi Bin,
> >
> > On Sat, 5 Oct 2019 at 08:36, Bin Meng wrote:
> > >
> > > Hi Simon,
> > >
> > > On Wed, Sep 25, 2019 at 10:58 PM Simon Glass wrote:
> > > >
> > > >
Hi Bin,
On Thu, 10 Oct 2019 at 03:50, Bin Meng wrote:
>
> Hi Simon,
>
> On Wed, Sep 25, 2019 at 10:59 PM Simon Glass wrote:
> >
> > Newer Intel SoCs have different ways of setting up cache-as-ram (CAR).
> > Add support for these along with suitable configuration options.
> >
>
> I wonder why do
Hi Bin,
On Thu, 10 Oct 2019 at 03:19, Bin Meng wrote:
>
> On Wed, Sep 25, 2019 at 10:59 PM Simon Glass wrote:
> >
> > Set up MTRRs for the FST SDRAM regions to improve performance.
> >
> > Signed-off-by: Simon Glass
> > ---
> >
> > arch/x86/lib/fsp/fsp_dram.c | 3 +++
> > 1 file changed, 3 ins
Hi Bin,
On Wed, 9 Oct 2019 at 22:57, Bin Meng wrote:
>
> Hi Simon,
>
> On Wed, Sep 25, 2019 at 10:59 PM Simon Glass wrote:
> >
> > The Primary-to-Sideband bus (P2SB) is used to access various peripherals
> > through memory-mapped I/O in a large chunk of PCI space. The space is
> > segmented into
Hi Bin,
On Sun, 6 Oct 2019 at 18:32, Bin Meng wrote:
>
> Hi Simon,
>
> On Wed, Sep 25, 2019 at 10:58 PM Simon Glass wrote:
> >
> > This function can be called before the timer is set up. Make sure that the
> > init function is called so that it works correctly.
> >
> > Signed-off-by: Simon Glass
Hi Bin,
On Thu, 10 Oct 2019 at 00:23, Bin Meng wrote:
>
> Hi Simon,
>
> On Wed, Sep 25, 2019 at 10:59 PM Simon Glass wrote:
> >
> > This should take account of the end of the new cache record since a record
> > cannot extend beyond the end of the flash region. This problem was not
> > seen befor
Hi Bin,
On Wed, 9 Oct 2019 at 21:11, Bin Meng wrote:
>
> Hi Simon,
>
> On Wed, Sep 25, 2019 at 10:58 PM Simon Glass wrote:
> >
> > Intel x86 SoCs have a power manager/controller which handles several
> > power-related aspects of the platform. Add a uclass for this, with a few
> > useful operatio
Hi Bin,
On Wed, 9 Oct 2019 at 07:55, Bin Meng wrote:
>
> Hi Simon,
>
> On Wed, Sep 25, 2019 at 10:12 PM Simon Glass wrote:
> >
> > On x86 platforms the SPI flash can be mapped into memory so that the
> > contents can be read with normal memory accesses.
> >
> > Add a new SPI flash method to find
Hi Bin,
On Wed, 2 Oct 2019 at 08:08, Bin Meng wrote:
>
> On Wed, Sep 25, 2019 at 10:13 PM Simon Glass wrote:
> >
> > Most x86 CPUs use a mechanism where the SPI flash is mapped into the very
> > top of 32-bit address space, so that it can be executed in place and read
> > simply by copying from
On Tue, 13 Aug 2019 at 03:34, Simon Glass wrote:
>
> On Fri, 2 Aug 2019 at 06:48, Patrick Delaunay wrote:
> >
> > In the Linux pinctrl binding, the pin configuration nodes don't need to
> > be direct children of the pin controller device (may be grandchildren for
> > example). This behavior is ma
On Thu, 26 Sep 2019 at 07:44, Jean-Jacques Hiblot wrote:
>
> When DEVRES is not set, devm_kmalloc_array() is spelled
> devm_kmaloc_array() (with one 'l' only).
> Fixing it so that the name is the same with and without DEVRES.
>
> Signed-off-by: Jean-Jacques Hiblot
> ---
> include/dm/device.h | 4
Hi Lokesh,
On Fri, 27 Sep 2019 at 02:19, Lokesh Vutla wrote:
>
> In some remoteproc cases, enabling the power domain of the core will
> start running the core. In such cases image should be loaded before
> enabling the power domain. But the current DM framework enables the
> power-domain by defau
On Mon, 30 Sep 2019 at 02:19, Patrick Delaunay wrote:
>
> At present the 'Index' column of 'dm tree' assumes there is
> two digits, this patch increase it to 3 digits.
>
> It also aligns output of 'dm uclass', assuming the same 3 digits index.
>
> The boards with CONFIG_PINCTRL_FULL activated have
On Fri, 27 Sep 2019 at 02:19, Lokesh Vutla wrote:
>
> Enable DM_FLAG_DEFAULT_PD_CTRL_OFF for arm64 remote core so that
> pd can be enabled after loading the image.
>
> Signed-off-by: Lokesh Vutla
> ---
> drivers/remoteproc/ti_k3_arm64_rproc.c | 1 +
> 1 file changed, 1 insertion(+)
Reviewed-by:
On Thu, 3 Oct 2019 at 21:41, AKASHI Takahiro wrote:
>
> Without this patch, compiling may potentially fail.
>
> Signed-off-by: AKASHI Takahiro
> ---
> arch/sandbox/include/asm/u-boot-sandbox.h | 2 ++
> 1 file changed, 2 insertions(+)
Reviewed-by: Simon Glass
Applied to u-boot-dm, thanks!
___
On Fri, 27 Sep 2019 at 02:19, Lokesh Vutla wrote:
>
> Add dev_power_domain_off() api to disable all the power-domains
> corresponding to a device
>
> Signed-off-by: Lokesh Vutla
> ---
> drivers/power/domain/power-domain-uclass.c | 34 +-
> include/power-domain.h
On Fri, 27 Sep 2019 at 02:19, Lokesh Vutla wrote:
>
> From: Anatolij Gustschin
>
> The power domain associated with a device is enabled when probing,
> but currently the domain remains enabled when the device is removed.
> Some boards started to disable power domains for selected devices
> via cu
On Sat, Oct 12, 2019 at 6:28 AM Simon Glass wrote:
>
> From: Jean-Jacques Hiblot
>
> The test did reads after writes but didn't check the value.
> It probably was because the sandbox didn't implement the writeX/readX
> functions.
>
> Signed-off-by: Jean-Jacques Hiblot
> Updated to use sandbox_se
On Sat, Oct 12, 2019 at 6:25 AM Simon Glass wrote:
>
> This function assumes that the 'val' parameter has no masked bits set.
> This is not defined by the function prototype though. Fix the function to
> mask the value and update the documentation.
>
> Signed-off-by: Simon Glass
> ---
>
> driver
On Sat, Oct 12, 2019 at 6:28 AM Simon Glass wrote:
>
> Quite a few tests use addresses or hex values for comparisons. Add hex
> output for test failures, e.g.:
>
>0x55ca22fa == reg: Expected 0x55ca22fa (1439310586),
> got 0x55ea22fb (1441407739)
>
> Signed-off-by: Simon Glass
> ---
>
On Sat, Oct 12, 2019 at 6:22 AM Simon Glass wrote:
>
> This function needs a prototype so that tests can use it. Add one.
>
> Signed-off-by: Simon Glass
> ---
>
> arch/sandbox/include/asm/test.h | 11 +++
> 1 file changed, 11 insertions(+)
>
Reviewed-by: Bin Meng
__
Hi Simon,
On Sat, Oct 12, 2019 at 6:22 AM Simon Glass wrote:
>
> This function writes to its address so the address should not be declared
> as const. Fix it.
>
> Signed-off-by: Simon Glass
> ---
>
> arch/sandbox/cpu/cpu.c| 3 +--
> arch/sandbox/include/asm/io.h | 11 +--
> 2 f
Hi Simon,
On Thu, 26 Sep 2019 at 06:23, Simon Goldschmidt
wrote:
>
> Hi Simon,
>
> On Wed, Sep 25, 2019 at 5:36 PM Simon Glass wrote:
> >
> > We have the ability to enforce a maximum size for SPL but not yet for TPL.
> > Add a new option for this.
> >
> > Document the size check macro while we a
Hi Aaron,
On Wed, 25 Sep 2019 at 22:08, Aaron Williams wrote:
>
> Hi Simon,
>
> On Wednesday, September 25, 2019 8:40:48 PM PDT Bin Meng wrote:
> > External Email
> >
> > --
> > +Simon
> >
> > Hi Aaron,
> >
> > On Thu, Sep 26, 20
On Fri, Oct 11, 2019 at 04:21:56PM -0600, Simon Glass wrote:
> On Fri, 11 Oct 2019 at 14:30, Tom Rini wrote:
> >
> > At this point, all drivers that do not use CONFIG_BLK are past their
> > migration deadlines, so remove this config as it's no longer helpful and
> > hinders enhancing block drivers
Hi Lukasz,
On Wed, 9 Oct 2019 at 03:02, Lukasz Majewski wrote:
>
> Dear Tom,
>
> > This define indicates if DM_GPIO shall be supported in SPL. This
> > allows proper operation of DM converted GPIO drivers in SPL, which use
> > boards.
> >
> > Signed-off-by: Lukasz Majewski
> > ---
> >
> > Change
On Fri, 27 Sep 2019 at 02:19, Lokesh Vutla wrote:
>
> From: Anatolij Gustschin
>
> The power domain associated with a device is enabled when probing,
> but currently the domain remains enabled when the device is removed.
> Some boards started to disable power domains for selected devices
> via cu
Quite a few tests use addresses or hex values for comparisons. Add hex
output for test failures, e.g.:
0x55ca22fa == reg: Expected 0x55ca22fa (1439310586),
got 0x55ea22fb (1441407739)
Signed-off-by: Simon Glass
---
include/test/ut.h | 3 ++-
1 file changed, 2 insertions(+), 1 deleti
On Mon, 30 Sep 2019 at 02:19, Patrick Delaunay wrote:
>
> At present the 'Index' column of 'dm tree' assumes there is
> two digits, this patch increase it to 3 digits.
>
> It also aligns output of 'dm uclass', assuming the same 3 digits index.
>
> The boards with CONFIG_PINCTRL_FULL activated have
Recently a feature was added to allow sandbox to do memory-mapped IO using
readl(), writel(), etc. This adds a few fixes and improvements to this.
It also includes an updated version of Jean-Jacques patch to add more
tests for regmap.
Jean-Jacques Hiblot (1):
test: regmap: check the values rea
From: Jean-Jacques Hiblot
The test did reads after writes but didn't check the value.
It probably was because the sandbox didn't implement the writeX/readX
functions.
Signed-off-by: Jean-Jacques Hiblot
Updated to use sandbox_set_enable_memio():
Signed-off-by: Simon Glass
---
test/dm/regmap.c
This function writes to its address so the address should not be declared
as const. Fix it.
Signed-off-by: Simon Glass
---
arch/sandbox/cpu/cpu.c| 3 +--
arch/sandbox/include/asm/io.h | 11 +--
2 files changed, 6 insertions(+), 8 deletions(-)
diff --git a/arch/sandbox/cpu/cpu.
This function assumes that the 'val' parameter has no masked bits set.
This is not defined by the function prototype though. Fix the function to
mask the value and update the documentation.
Signed-off-by: Simon Glass
---
drivers/core/regmap.c | 2 +-
include/regmap.h | 3 ++-
2 files chang
This function needs a prototype so that tests can use it. Add one.
Signed-off-by: Simon Glass
---
arch/sandbox/include/asm/test.h | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/sandbox/include/asm/test.h b/arch/sandbox/include/asm/test.h
index cd2b9e3155d..b885e1a14f1 100
On Fri, 27 Sep 2019 at 02:19, Lokesh Vutla wrote:
>
> Add dev_power_domain_off() api to disable all the power-domains
> corresponding to a device
>
> Signed-off-by: Lokesh Vutla
> ---
> drivers/power/domain/power-domain-uclass.c | 34 +-
> include/power-domain.h
Hi Jean-Jacques,
On Wed, 2 Oct 2019 at 03:29, Jean-Jacques Hiblot wrote:
>
> The sandbox architecture does not implement the writeX nor readX functions.
> This prevents testing properly the regmaps and the other stuff relying on
> it.
I just added a feature to sandbox to support mmio. I'll send
On Thu, 26 Sep 2019 at 07:44, Jean-Jacques Hiblot wrote:
>
> When DEVRES is not set, devm_kmalloc_array() is spelled
> devm_kmaloc_array() (with one 'l' only).
> Fixing it so that the name is the same with and without DEVRES.
>
> Signed-off-by: Jean-Jacques Hiblot
> ---
> include/dm/device.h | 4
Hi Jean-Jacques,
On Wed, 2 Oct 2019 at 03:28, Jean-Jacques Hiblot wrote:
>
> The test did reads after writes but didn't check the value.
> It probably was because the sandbox didn't implement the writeX/readX
> functions.
>
> Signed-off-by: Jean-Jacques Hiblot
>
> ---
>
> test/dm/regmap.c | 15
Hi Jean-Jacques,
On Wed, 2 Oct 2019 at 03:29, Jean-Jacques Hiblot wrote:
>
> Those functions are used by the regmap core. Without them regmaps are
> not working on sandbox.
> The implementation is taken from arch/x86/include/asm/io.h.
>
> Signed-off-by: Jean-Jacques Hiblot
> ---
>
> arch/sandbo
On Fri, 27 Sep 2019 at 02:19, Lokesh Vutla wrote:
>
> Enable DM_FLAG_DEFAULT_PD_CTRL_OFF for arm64 remote core so that
> pd can be enabled after loading the image.
>
> Signed-off-by: Lokesh Vutla
> ---
> drivers/remoteproc/ti_k3_arm64_rproc.c | 1 +
> 1 file changed, 1 insertion(+)
Reviewed-by:
On Fri, 20 Sep 2019 at 09:28, Jean-Jacques Hiblot wrote:
>
> Make the board driver available in the SPL too. The board driver is a way
> to provide useful information about the board and that can be useful in
> the SPL too.
>
> Signed-off-by: Jean-Jacques Hiblot
>
> ---
>
> Changes in v5: None
>
On Fri, 11 Oct 2019 at 14:30, Tom Rini wrote:
>
> At this point, all drivers that do not use CONFIG_BLK are past their
> migration deadlines, so remove this config as it's no longer helpful and
> hinders enhancing block drivers.
>
> Cc: Simon Glass
> Cc: Faiz Abbas
> Signed-off-by: Tom Rini
> -
Hi Lokesh,
On Fri, 27 Sep 2019 at 02:19, Lokesh Vutla wrote:
>
> In some remoteproc cases, enabling the power domain of the core will
> start running the core. In such cases image should be loaded before
> enabling the power domain. But the current DM framework enables the
> power-domain by defau
Hi Simon,
On Fri, 11 Oct 2019 at 12:31, Simon Goldschmidt
wrote:
>
>
>
> Simon Glass schrieb am Fr., 11. Okt. 2019, 20:27:
>>
>> Hi Simon,
>>
>> On Tue, 8 Oct 2019 at 14:34, Simon Goldschmidt
>> wrote:
>> >
>> > In a series I'm currently preparing, I've stumbled accross the fact that
>> > IS_ER
At this point, all drivers that do not use CONFIG_BLK are past their
migration deadlines, so remove this config as it's no longer helpful and
hinders enhancing block drivers.
Cc: Simon Glass
Cc: Faiz Abbas
Signed-off-by: Tom Rini
---
This is required for Faiz's series that adds UFS support to S
Hi Fabien,
On 10/9/19 10:36 AM, Fabien Dessenne wrote:
> Load the optional resource table from the firmware, and write its
> address in the dedicated backup register.
What processor is this? Reason I ask is that you are using 0 as a no
resource table address, and if it is a valid address for that
On 10/9/19 10:36 AM, Fabien Dessenne wrote:
> The .is_running() ops expects a return value of 0 if the processor is
> running, 1 if not running : align to this.
>
> Signed-off-by: Fabien Dessenne
This patch should be earlier than patch4, right?
Reviewed-by: Suman Anna
> ---
> drivers/remotep
Hi Fabien,
On 10/9/19 10:36 AM, Fabien Dessenne wrote:
> When the coprocessor has been started, provide the context to Linux
> kernel so it can handle it:
> - update the coprocessor node of kernel DeviceTree with the
> "early-booted" property.
Has this property been acked by DT maintainers at t
On 9/4/19 2:53 AM, Fabien Dessenne wrote:
> Fix an issue where some sections are never loaded : if p_type is
> different from PT_LOAD the phdr pointer must be incremented.
>
Good catch Fabien.
Fixes: 7a7c4cb0f044 ("remoteproc: add elf file load support")
> Signed-off-by: Fabien Dessenne
Acked
On 11/10/2019 20:28, Simon Glass wrote:
> Hi Matthias,
>
> On Mon, 7 Oct 2019 at 07:31, Matthias Brugger wrote:
>>
>> Hi Simon,
>>
>> On 28/09/2019 01:28, s...@google.com wrote:
>>> From: Matthias Brugger
>>>
>>> Add internal fdt_cells() to avoid copy and paste. Fix typo in
>>> fdt_size_cells(
Simon Glass schrieb am Fr., 11. Okt. 2019, 20:27:
> Hi Simon,
>
> On Tue, 8 Oct 2019 at 14:34, Simon Goldschmidt
> wrote:
> >
> > In a series I'm currently preparing, I've stumbled accross the fact that
> > IS_ERR_VALUE() doesn't reliably work on socfpga SPL as the onchip SRAM
> > begins at 0xff
Hi Matthias,
On Mon, 7 Oct 2019 at 07:31, Matthias Brugger wrote:
>
> Hi Simon,
>
> On 28/09/2019 01:28, s...@google.com wrote:
> > From: Matthias Brugger
> >
> > Add internal fdt_cells() to avoid copy and paste. Fix typo in
> > fdt_size_cells() documentation comment.
> >
> > This is based in up
Hi Simon,
On Tue, 8 Oct 2019 at 14:34, Simon Goldschmidt
wrote:
>
> In a series I'm currently preparing, I've stumbled accross the fact that
> IS_ERR_VALUE() doesn't reliably work on socfpga SPL as the onchip SRAM
> begins at 0x and the heap is at the end of the 32 bit range.
>
Which fun
On Wed, Sep 11, 2019 at 07:14:59PM +0800, mingming lee wrote:
> This adds a general board file based on MT8518 SoCs from MediaTek.
>
> Apart from the generic parts (cpu) we add some low level init codes
> and initialize the early clocks.
>
> This commit is adding the basic boot support for the M
On Fri, Aug 30, 2019 at 03:21:40PM +0800, Iru Cai wrote:
> The memory write and recover loop in get_ram_size() work correctly
> only if maxsize is power of two, otherwise the function will return a
> small size.
>
> Signed-off-by: Iru Cai
> ---
> common/memsize.c | 4
> 1 file changed, 4 i
Hi Michal,
On Fri, 11 Oct 2019 at 01:50, Michal Simek wrote:
>
> On 10. 10. 19 19:06, Simon Glass wrote:
> > Hi Michal,
> >
> > On Thu, 10 Oct 2019 at 05:44, Michal Simek wrote:
> >>
> >> Extend test suite to cover also automatic octal/hex converstions which
> >> haven't been implemented in past
Hi Heiko,
On Thu, 10 Oct 2019 at 12:28, Heiko Stübner wrote:
>
> Hi Simon,
>
> Am Donnerstag, 10. Oktober 2019, 19:06:12 CEST schrieb Simon Glass:
> > On Tue, 1 Oct 2019 at 14:23, Heiko Stuebner wrote:
> > > A trusted execution environment should also get loaded as loadable from
> > > a fit imag
On Thu, 2019-10-10 at 16:09 +0300, Igor Opaniuk wrote:
> From: Igor Opaniuk
>
> This fixes the issues with calculation of controller indexes in
> ehci_usb_bind() for iMX7, as USB controllers on iMX7 SoCs aren't
> placed next to each other, and their addresses incremented by
> 0x1.
>
> Exampl
The SM1 clock controller is almost identical to the G12A and
so far the differences don't matter.
Signed-off-by: Neil Armstrong
---
drivers/clk/meson/g12a.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/meson/g12a.c b/drivers/clk/meson/g12a.c
index c03738b6ca..1b2523bbf1 100644
From: Guillaume La Roque
Add separate config file to handle the different eMMC size on
the sei610 board.
Signed-off-by: Guillaume La Roque
Signed-off-by: Neil Armstrong
---
board/amlogic/sei610/MAINTAINERS | 1 +
configs/sei610_defconfig | 2 +-
include/configs/sei610.h | 31
Import the Amlogic SM1 DT and the SEI610 board DT from [1]
[1] da0c9ea146cb ("Linux 5.4-rc2")
Signed-off-by: Neil Armstrong
---
arch/arm/dts/Makefile | 3 +-
arch/arm/dts/meson-sm1-sei610.dts | 383
arch/arm/dts/meson-sm1.dtsi
Add support for the customer board SEI610 manufactured by SEI Robotics
with the following specifications:
- Amlogic S905X3 ARM Cortex-A35 quad-core SoC
- 2GB DDR4 SDRAM
- 10/100 Ethernet (Internal PHY)
- 1 x USB 3.0 Host
- 1 x USB Type-C DRD
- 1 x FTDI USB Serial Debug Interface
- eMMC
- SD
Rename meson-g12a-u-boot.dtsi into meson-g12-common-u-boot.dtsi to
match the new DT architecture and add meson-sm1-sei610-u-boot.dtsi
to handle the U-Boot specific DT for graphics.
Signed-off-by: Neil Armstrong
---
...meson-g12a-u-boot.dtsi => meson-g12-common-u-boot.dtsi} | 0
arch/arm/dts/meso
Add support for mmc-pwrseq-emmc in the meson-gx mmc driver to support
enabling the eMMC.
Signed-off-by: Neil Armstrong
---
drivers/mmc/meson_gx_mmc.c | 51 ++
1 file changed, 51 insertions(+)
diff --git a/drivers/mmc/meson_gx_mmc.c b/drivers/mmc/meson_gx_mmc.
From: Guillaume La Roque
Move android generic config and boot sequence in meson64_android header
and fix size of userdata to use all eMMC on SEI510.
Signed-off-by: Guillaume La Roque
Signed-off-by: Neil Armstrong
---
MAINTAINERS | 1 +
include/configs/meson64_android.h
Add the missing IDs to detect the SM1 S905X3 SoC.
Signed-off-by: Neil Armstrong
---
arch/arm/mach-meson/board-info.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/mach-meson/board-info.c b/arch/arm/mach-meson/board-info.c
index 9571b5a189..0d3b40a249 100644
--- a/arch/arm/mach-m
Add support for the customer board SEI610 manufactured by SEI Robotics
with the following specifications:
- Amlogic S905X3 ARM Cortex-A35 quad-core SoC
- 2GB DDR4 SDRAM
- 10/100 Ethernet (Internal PHY)
- 1 x USB 3.0 Host
- 1 x USB Type-C DRD
- 1 x FTDI USB Serial Debug Interface
- eMMC
- SD
Hi Patrick
On 9/13/19 3:24 PM, Patrick Delaunay wrote:
> Select the correct USB product id used by the download gadget
> for ST stm32mp1 boards.
>
> The board stm32mp1 select the correct product id, as defined in
> http://www.linux-usb.org/usb.ids for the STMicroelectronics
> vendor id = 0x0483 (C
Hi Patrice,
> From: Patrice CHOTARD
> Sent: lundi 16 septembre 2019 10:57
>
> Set ramdisk_addr_r to 0xC060.
Acked-by: Patrick Delaunay
> Reported-by: Christophe Priouzeau
> Signed-off-by: Patrice Chotard
> ---
>
> include/configs/stm32f746-disco.h | 2 +-
> 1 file changed, 1 insert
Hi Patrice,
> From: Patrice CHOTARD
> Sent: mardi 17 septembre 2019 10:10
>
> Network support was never added on this board, disable CONFIG_NET flag to
> avoid following warning:
>
> = WARNING == This board
> does not use CONFIG_DM_ETH (Driver Model for E
Hi Patrice,
> From: Patrice CHOTARD
> Sent: mardi 17 septembre 2019 10:10
>
> Network support was never added on this board, disable CONFIG_NET flag to
> avoid following warning:
>
> = WARNING == This board
> does not use CONFIG_DM_ETH (Driver Model for E
Hi,
> From: Patrice CHOTARD
> Sent: mardi 17 septembre 2019 10:10
>
> Network support was never added on this board, disable CONFIG_NET flag to
> avoid following warning:
>
> = WARNING == This board
> does not use CONFIG_DM_ETH (Driver Model for Ethernet
Hi,
> From: Patrice CHOTARD
> Sent: mardi 17 septembre 2019 10:10
>
> Network support was never added on this board, disable CONFIG_NET flag to
> avoid following warning:
>
> = WARNING == This board
> does not use CONFIG_DM_ETH (Driver Model for Ethernet
Hi Patrice,
> From: Patrice CHOTARD
> Sent: mardi 17 septembre 2019 10:10
>
> Network support was never added on this board, disable CONFIG_NET flag to
> avoid following warning:
>
> = WARNING == This board
> does not use CONFIG_DM_ETH (Driver Model for E
On Wed, Oct 09, 2019 at 12:30:36PM +0200, Michal Simek wrote:
> Hi Tom,
>
> please pull the following changes to your tree. I have also included
> trivial patch for apalis board. Networking stuff have been assigned to
> me in patchwork that's why I am also including them.
>
> Gitlab CI failed bu
Hi Tom,
This PR includes the following changes:
- Remember the device being emulated for Sandbox PCI
- Update Kconfig options for FSP 1.0
- Drop RESET_BASE and RESET_SEG_SIZE that are no longer used
The following changes since commit 548aefa5b9e5c31681e0a8bd78e96b66eedd1137:
travis: Move keys
On Wed, Aug 28, 2019 at 11:24:35AM +0200, Roman Kapl wrote:
> Allow 64-bit DMA on AHCI. If not supported by the host controller, at
> least print a message and fail.
>
> Signed-off-by: Roman Kapl
> ---
>
> Please disregard the previous patch, I've send a wrong version that does not
> even compi
On 10/10/2019 23:33, Tom Rini wrote:
> Fully take over the ARM maintainers entry.
>
> Signed-off-by: Tom Rini
> ---
> MAINTAINERS| 2 +-
> doc/git-mailrc | 3 +--
> 2 files changed, 2 insertions(+), 3 deletions(-)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 2ef29768555c..bdc998a55e11
Hi Simon,
On Fri, Oct 11, 2019 at 1:06 AM Simon Glass wrote:
>
> Hi Bin,
>
> On Sat, 5 Oct 2019 at 08:36, Bin Meng wrote:
> >
> > Hi Simon,
> >
> > On Wed, Sep 25, 2019 at 10:58 PM Simon Glass wrote:
> > >
> > > Most of the timer-calibration methods are not needed on recent Intel CPUs
> > > and
Based on the 54ecb8f7028c ("Linux 5.4-rc1") Everything-Else power domain
driver for Amlogic SoCs.
This driver handles the VPU Power domain and other domains from the
Everything-Else part of the SM1 and G12A SoCs.
Signed-off-by: Neil Armstrong
---
drivers/power/domain/Kconfig | 7 +
dr
The GX VPU Power Domain driver has been replaced by the Everything-Else
Power Domain driver for G12A and SM1.
Signed-off-by: Neil Armstrong
---
configs/sei510_defconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/configs/sei510_defconfig b/configs/sei510_defconfig
index 9
For SM1 support a new Power Domain driver is needed to handle more than
the VPU power domain.
This Power Domain driver is also used for G12A to also control the Ethernet
Power Domain for example.
Neil Armstrong (2):
power: domain: add Amlogic Everything-Else power domain driver
configs: sei51
On 30/08/2019 14:09, Neil Armstrong wrote:
> This patchset adds Amlogic G12A support for HDMI & Composite video output like
> the Amlogic GXBB/GXL/GXM, by syncing from the latest Linux VPU DRM driver.
>
> It also adds VPU/VAPB/HDMI Clock & VPU Power Domain support.
>
> Finally it adds the necessa
Hi Joe, Tom
On 19/09/2019 11:16, Grygorii Strashko wrote:
Hi All,
This series introduces set of fixes and improvements for TI CPSW and AM654x
CPSW networking drivers.
Patch 1 - Enables support of 10Mbit link speeds for TI CPSW driver.
Patch 3 - Adds support of standard Ethernet "max-speed" DT
Doug,
> > --- save as .git/hooks/sendemail-validate ---
> > #!/bin/sh
> >
> > set -e
> >
> > changeid=$(sed 's/^Change-Id: \(I.*\)$/\1/;t;d' $1)
> > date=$(date +%s)
> > sed 's/^Change-Id: I.*$//;T;d' -i $1
> > sed "s/^From: /Message-Id: <$date-$changeid@changeid>\nFrom: /" -i $1
> > #--- end sc
This adds platform code and the device tree for the Phytium FT2004 SoC.
The initial support comprises the UART and the GMAC.
v2:
- Some printf() are removed or replace by debug(). @Tom
- The ft2004_defconfig file is generated with savedefconfig.
@Tom, @Heinrich
Cc: Tom Rini
Cc: Heinrich Schuch
Hi Alex,
> -Original Message-
> From: U-Boot On Behalf Of Alex Marginean
> Sent: Thursday, August 8, 2019 7:45 PM
> To: u-boot@lists.denx.de
> Cc: Joe Hershberger ; Razvan Ionut Cirjan
>
> Subject: [EXT] [U-Boot] [PATCH 05/11] drivers: net: aquantia: set up SI
> protocol based on interfa
From: Igor Opaniuk
Remove legacy sdboot wrapper as distroboot can be used instead.
Signed-off-by: Igor Opaniuk
---
include/configs/colibri_imx7.h | 23 ---
1 file changed, 23 deletions(-)
diff --git a/include/configs/colibri_imx7.h b/include/configs/colibri_imx7.h
index a
From: Igor Opaniuk
Remove legacy sdboot wrapper as distroboot can be used instead.
Signed-off-by: Igor Opaniuk
---
include/configs/colibri_imx6.h | 18 --
1 file changed, 18 deletions(-)
diff --git a/include/configs/colibri_imx6.h b/include/configs/colibri_imx6.h
index 69bf82
Add clock handoff offset for Agilex. Remove S10 prefix to avoid confusion.
Signed-off-by: Ley Foon Tan
Reviewed-by: Simon Goldschmidt
---
arch/arm/mach-socfpga/include/mach/handoff_s10.h | 9 +++--
arch/arm/mach-socfpga/wrap_pll_config_s10.c | 5 +++--
2 files changed, 10 insertions(+)
Add SDRAM driver for Agilex SoC.
Signed-off-by: Tien Fong Chee
Signed-off-by: Ley Foon Tan
Reviewed-by: Simon Goldschmidt
---
v4:
- Fixed checkpatch warnings
v3:
- Use sdmmc_soc64.*
- Change compatible string to use "intel" (intel,sdr-ctl-agilex).
- Improve error handing if DDR size mismatche
Move Stratix10 and Agilex system manager common code to
system_manager_soc64.h. Changed macros to use SYSMGR_SOC64_*.
Signed-off-by: Ley Foon Tan
Reviewed-by: Simon Goldschmidt
---
v5:
- Remove system_manager_s10.h and use system_manager_soc64.h.
v4:
- Change prefix from SYSMGR_S10* to SYSMGR_
Enable cache driver build in SPL.
Signed-off-by: Ley Foon Tan
---
drivers/Makefile | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/Makefile b/drivers/Makefile
index a4bb5e4975..0d231cddbb 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -30,6 +30,7 @@ obj-$(CONFIG_$(SPL_TPL_)T
From: Igor Opaniuk
Remove legacy sdboot wrapper as distroboot can be used instead.
Signed-off-by: Igor Opaniuk
---
include/configs/apalis_imx6.h | 19 ---
1 file changed, 19 deletions(-)
diff --git a/include/configs/apalis_imx6.h b/include/configs/apalis_imx6.h
index 5139b01a
Add system manager support for Agilex.
Signed-off-by: Ley Foon Tan
---
v5:
- Remove system_manager_agilex.h and use system_manager_soc64.h directly.
v3:
- Change include filename to system_manager_soc64.h.
- Move to use defines instead of struct.
v2:
- Include system_manager_s10_agilex_common.
1 - 100 of 148 matches
Mail list logo
