Re: [U-Boot] [PATCH v5 22/26] mtd: spi: SPI_FLASH_MTD depends on MTD

[Tom Rini]

On Thu, Oct 03, 2019 at 07:50:24PM +0200, Miquel Raynal wrote:

> It is already the case that all defconfigs with SPI_FLASH_MTD also
> declare using MTD, but let's make this consistent and enforce it in
> Kconfig. Most of the time SPI_FLASH_MTD is used in conjunction with
> UBI, which already depends on MTD.
> 
> Suggested-by: Vignesh R 
> Signed-off-by: Miquel Raynal 

Applied to u-boot/master, thanks!

-- 
Tom


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[v3 5/8] dm: ls1012a: add i2c DM support

[Biwen Li]

This supports i2c DM and enables CONFIG_DM_I2C
for SoC LS1012A

Signed-off-by: Biwen Li 
---
Changes in v3:
- none

Changes in v2:
- merge some patches to one patch

 arch/arm/include/asm/gpio.h   |   1 +
 board/freescale/ls1012aqds/ls1012aqds.c   |  20 ++-
 board/freescale/ls1012ardb/eth.c  |  35 +
 board/freescale/ls1012ardb/ls1012ardb.c   | 147 +++---
 configs/ls1012a2g5rdb_qspi_defconfig  |   3 +
 configs/ls1012a2g5rdb_tfa_defconfig   |   3 +
 configs/ls1012afrdm_qspi_defconfig|   3 +
 configs/ls1012afrdm_tfa_defconfig |   3 +
 .../ls1012afrwy_qspi_SECURE_BOOT_defconfig|   3 +
 configs/ls1012afrwy_qspi_defconfig|   3 +
 configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig |   3 +
 configs/ls1012afrwy_tfa_defconfig |   3 +
 configs/ls1012aqds_qspi_defconfig |   3 +
 configs/ls1012aqds_tfa_SECURE_BOOT_defconfig  |   3 +
 configs/ls1012aqds_tfa_defconfig  |   3 +
 configs/ls1012ardb_qspi_SECURE_BOOT_defconfig |   3 +
 configs/ls1012ardb_qspi_defconfig |   3 +
 configs/ls1012ardb_tfa_SECURE_BOOT_defconfig  |   3 +
 configs/ls1012ardb_tfa_defconfig  |   3 +
 include/configs/ls1012a_common.h  |   5 +
 20 files changed, 227 insertions(+), 26 deletions(-)

diff --git a/arch/arm/include/asm/gpio.h b/arch/arm/include/asm/gpio.h
index 6ff5f42424..9f8c9da564 100644
--- a/arch/arm/include/asm/gpio.h
+++ b/arch/arm/include/asm/gpio.h
@@ -3,6 +3,7 @@
!defined(CONFIG_ARCH_BCM63158) && !defined(CONFIG_ARCH_ROCKCHIP) && \
!defined(CONFIG_ARCH_LX2160A) && !defined(CONFIG_ARCH_LS1028A) && \
!defined(CONFIG_ARCH_LS2080A) && !defined(CONFIG_ARCH_LS1088A) && \
+   !defined(CONFIG_ARCH_LS1012A) && \
!defined(CONFIG_ARCH_ASPEED)
 #include 
 #endif
diff --git a/board/freescale/ls1012aqds/ls1012aqds.c 
b/board/freescale/ls1012aqds/ls1012aqds.c
index 86c72ee357..30bf1047d5 100644
--- a/board/freescale/ls1012aqds/ls1012aqds.c
+++ b/board/freescale/ls1012aqds/ls1012aqds.c
@@ -107,10 +107,26 @@ int board_early_init_f(void)
 int misc_init_r(void)
 {
u8 mux_sdhc_cd = 0x80;
-
-   i2c_set_bus_num(0);
+   int bus_num = 0;
+
+#ifdef CONFIG_DM_I2C
+   struct udevice *dev;
+   int ret;
+
+   ret = i2c_get_chip_for_busnum(bus_num, CONFIG_SYS_I2C_FPGA_ADDR,
+ 1, );
+   if (ret) {
+   printf("%s: Cannot find udev for a bus %d\n", __func__,
+  bus_num);
+   return ret;
+   }
+   dm_i2c_write(dev, 0x5a, _sdhc_cd, 1);
+#else
+   i2c_set_bus_num(bus_num);
 
i2c_write(CONFIG_SYS_I2C_FPGA_ADDR, 0x5a, 1, _sdhc_cd, 1);
+#endif
+
return 0;
 }
 #endif
diff --git a/board/freescale/ls1012ardb/eth.c b/board/freescale/ls1012ardb/eth.c
index b35d5343e4..0f33128996 100644
--- a/board/freescale/ls1012ardb/eth.c
+++ b/board/freescale/ls1012ardb/eth.c
@@ -27,12 +27,47 @@ static inline void ls1012ardb_reset_phy(void)
 {
 #ifdef CONFIG_TARGET_LS1012ARDB
/* Through reset IO expander reset both RGMII and SGMII PHYs */
+#ifdef CONFIG_DM_I2C
+   struct udevice *dev;
+   int ret;
+
+   /*
+* The I2C IO-expander PCAL9555A is mouted on I2C1 bus(bus number is 0).
+*/
+   ret = i2c_get_chip_for_busnum(0, I2C_MUX_IO2_ADDR,
+ 1, );
+   if (ret) {
+   printf("%s: Cannot find udev for a bus %d\n", __func__,
+  0);
+   return;
+   }
+   /* Config port 0
+* - config pin IOXP_RST_ETH1_B and IOXP_RST_ETH2_B
+*   are enabled as an output.
+*/
+   dm_i2c_reg_write(dev, 6, __PHY_MASK);
+
+   /*
+* Set port 0 output a value to reset ETH2 interface
+* - pin IOXP_RST_ETH2_B output 0b0
+*/
+   dm_i2c_reg_write(dev, 2, __PHY_ETH2_MASK);
+   mdelay(10);
+   dm_i2c_reg_write(dev, 2, __PHY_ETH1_MASK);
+   /*
+* Set port 0 output a value to reset ETH1 interface
+* - pin IOXP_RST_ETH1_B output 0b0
+*/
+   mdelay(10);
+   dm_i2c_reg_write(dev, 2, 0xFF);
+#else
i2c_reg_write(I2C_MUX_IO2_ADDR, 6, __PHY_MASK);
i2c_reg_write(I2C_MUX_IO2_ADDR, 2, __PHY_ETH2_MASK);
mdelay(10);
i2c_reg_write(I2C_MUX_IO2_ADDR, 2, __PHY_ETH1_MASK);
mdelay(10);
i2c_reg_write(I2C_MUX_IO2_ADDR, 2, 0xFF);
+#endif
mdelay(50);
 #endif
 }
diff --git a/board/freescale/ls1012ardb/ls1012ardb.c 
b/board/freescale/ls1012ardb/ls1012ardb.c
index e4527c19b8..271227a976 100644
--- a/board/freescale/ls1012ardb/ls1012ardb.c
+++ b/board/freescale/ls1012ardb/ls1012ardb.c
@@ -32,13 +32,27 @@ int checkboard(void)
 {
 #ifdef CONFIG_TARGET_LS1012ARDB
u8 in1;
+   int ret, bus_num = 0;
 
puts("Board: LS1012ARDB ");
 
/* Initialize i2c early for Serial flash bank 

Re: [U-Boot] [PATCH v2 1/1] net: avoid address-of-packed-member error

[Heinrich Schuchardt]

On 11/6/19 12:07 AM, Joe Hershberger wrote:

On Tue, Nov 5, 2019 at 5:49 AM Heinrich Schuchardt  wrote:


sandbox_defconfig does not compile using GCC 9.2.1:

net/net.c: In function ‘net_process_received_packet’:
net/net.c:1288:23: error: taking address of packed member of ‘struct
ip_udp_hdr’ may result in an unaligned pointer value
[-Werror=address-of-packed-member]
  1288 |sumptr = (ushort *)&(ip->udp_src);
   |   ^~

Avoid the error by using a u8 pointer instead of an u16 pointer and
in-lining ntohs().


Seems reasonable.


Simplify the checksumming of the last message byte.

Signed-off-by: Heinrich Schuchardt 


Acked-by: Joe Hershberger 



Hello Joe,

this patch did not yet make it into
https://gitlab.denx.de/u-boot/custodians/u-boot-net/commits/master

Is there something that needs to be changed?

Best regards

Heinrich

[PATCH 0/2] travis-ci: provide 'addr' in file2env()

[Heinrich Schuchardt]

Function fetch_tftp_file() in test/py/tests/test_efi_loader.py expects that
the dictionary describing a file contains an entry 'addr' specifying the
loading address. Otherwise it defaults to the start of RAM. On
qemu_arm64_defconfig and qemu_arm_defconfig this collides with the hardware
supplied device tree.

Add an optional parameter in function file2env() to set the 'addr' entry.

Set the load address for files to the value of $kernel_addr_r for the
qemu_arm64_defconfig and qemu_arm_defconfig boards to avoid collisions with
the device tree.

Heinrich Schuchardt (2):
  travis-ci: provide 'addr' in file2env()
  travis-ci: set load address for files

 py/travis-ci/travis_tftp.py   | 18 --
 py/travis-ci/u_boot_boardenv_qemu_arm64_na.py |  6 +++---
 py/travis-ci/u_boot_boardenv_qemu_arm_na.py   |  6 +++---
 3 files changed, 22 insertions(+), 8 deletions(-)

--
2.24.0

Re: [U-Boot] [PATCH v5 03/26] mtd: rename CONFIG_MTD_DEVICE -> CONFIG_MTD

[Tom Rini]

On Thu, Oct 03, 2019 at 07:50:05PM +0200, Miquel Raynal wrote:

> Like in Linux, just use CONFIG_MTD to compile the MTD stack.
> 
> Signed-off-by: Miquel Raynal 
> Reviewed-by: Boris Brezillon 

After re-running the migration:
Applied to u-boot/master, thanks!

-- 
Tom


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RE: [U-Boot] [EXT] Re: [PATCHv2 1/2] PCI: layerscape: Add Support for ls2088 PCIe EP mode

[Xiaowei Bao]

> -Original Message-
> From: Ramon Fried 
> Sent: 2019年12月4日 15:34
> To: Xiaowei Bao 
> Cc: Ramon Fried ; Hongbo Wang
> ; u-boot@lists.denx.de; York Sun
> ; Z.q. Hou ; Mingkai Hu
> 
> Subject: Re: [U-Boot] [EXT] Re: [PATCHv2 1/2] PCI: layerscape: Add Support
> for ls2088 PCIe EP mode
> 
> On Wed, Dec 4, 2019 at 4:23 AM Xiaowei Bao 
> wrote:
> >
> >
> >
> > > -Original Message-
> > > From: Ramon Fried 
> > > Sent: 2019年12月4日 4:01
> > > To: Xiaowei Bao 
> > > Cc: Ramon Fried ; Hongbo Wang
> > > ; u-boot@lists.denx.de; York Sun
> > > ; Z.q. Hou ; Mingkai Hu
> > > 
> > > Subject: Re: [U-Boot] [EXT] Re: [PATCHv2 1/2] PCI: layerscape: Add
> > > Support for ls2088 PCIe EP mode
> > >
> > > On Tue, Dec 3, 2019 at 4:32 AM Xiaowei Bao 
> wrote:
> > > >
> > > > Hi Ramon,
> > > >
> > > > Do you have any comments about this? Thanks a lot.
> > > >
> > > > Best regards
> > > > Xiaowei
> > > >
> > > > From: Xiaowei Bao
> > > > Sent: 2019年11月26日 10:52
> > > > To: Ramon Fried 
> > > > Cc: Bin Meng ; Simon Glass
> ;
> > > > M.h. Lian ; Z.q. Hou
> > > > ; Mingkai Hu ; Hongbo
> > > > Wang
> > > ;
> > > > York Sun ; u-boot@lists.denx.de
> > > > Subject: RE: [EXT] Re: [U-Boot] [PATCHv2 1/2] PCI: layerscape: Add
> > > > Support for ls2088 PCIe EP mode
> > > >
> > > > H Ramon,
> > > >
> > > > Thanks for your comments.
> > > > If we reimplement the PCIe EP driver base on PCIe UCLASS, we must
> > > > test it
> > > in u-boot, but I have no idea how to test the actual device, do I
> > > need to implement our own test case, how to verify the cadence-ep
> actual device?
> > > >
> > > I'm not sure I understand what you're trying to achieve and why
> > > you're referring to the cadence.
> > > You're developing a driver, just test it against a client (IE. a
> > > real PCIe root-complex).
> > > The cadence is irrelevant, it's just another implementation of endpoint
> driver.
> >
> > Thanks for your comments, do you mean that we can use the 'pci' and
> > 'md' command of u-boot to test the EP device when the controller which
> > work as a EP device connect to a RC port, we can access the BAR base
> > on the "pci header" command, yes? but if I want to test memory access
> > from EP to RC, what should I do, because there is not a command which
> similar to 'pci' to test.
> >
> No, I don't mean that. Currently there's no cmd line interface for PCIe
> endpoint (patches welcome).
> You should test the driver against a *real* setup, where you configure the
> endpoint using some init function in the board startup sequence.

OK, thanks for your comments.

> 
> 
> > Another issue is that, due to the history reason of Layerscape PCIe
> > controller driver, the EP and RC codes are combined, if I separate the
> > EP and RC code, there will have many duplicate code.
> So create a common.c file for both of them.
> >
> > Thanks
> > Xiaowei
> >
> >
> >
> > > Thanks,
> > > Ramon.
> > > > Best regards
> > > > Xiaowei
> > > > U-Boot@lists.denx.de
> > > > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2F
> > > > list
> > > >
> > >
> s.denx.de%2Flistinfo%2Fu-bootdata=02%7C01%7Cxiaowei.bao%40nxp
> > > .com
> > > > %7Cad7a366db91f4e40273308d7782b7fc8%7C686ea1d3bc2b4c6fa92c
> d99
> > > c5c301635
> > > > %7C0%7C0%7C63711532938430sdata=T0D3QR5RzdFv96sy
> OlG
> > > VK7OEBQyNdl
> > > > 8M9pfd%2F4vxOIg%3Dreserved=0

RE: [v3 7/8] dm: arm: ls1046a: add i2c DM support

[Priyanka Jain]

>-Original Message-
>From: Biwen Li 
>Sent: Thursday, December 5, 2019 11:41 AM
>To: Jagdish Gediya ; Priyanka Jain
>; h...@denx.de; ja...@amarulasolutions.com;
>aford...@gmail.com; Alison Wang ;
>bhaskar.upadh...@nxp.com; feng.l...@nxp.com; jh80.ch...@samsung.com;
>Pramod Kumar ; Rajesh Bhagat
>; Ruchika Gupta ;
>olte...@gmail.com
>Cc: Xiaobo Xie ; Jiafei Pan ; u-
>b...@lists.denx.de; Biwen Li 
>Subject: [v3 7/8] dm: arm: ls1046a: add i2c DM support
>
>This supports i2c DM and enables CONFIG_DM_I2C for SoC LS1046A
>
>Signed-off-by: Biwen Li 
>---
>Changes in v3:
>   - none
>
>Changes in v2:
>   - merge some patches to one patch
>
> arch/arm/dts/fsl-ls1046a-frwy.dts |  3 ++
> arch/arm/dts/fsl-ls1046a-qds.dtsi |  4 ++
> arch/arm/dts/fsl-ls1046a-rdb.dts  |  8 
> arch/arm/include/asm/gpio.h   |  1 +
> board/freescale/ls1046afrwy/ls1046afrwy.c | 17 ++-
> board/freescale/ls1046aqds/ls1046aqds.c   | 24 --
> configs/ls1046afrwy_tfa_defconfig |  2 +
> configs/ls1046aqds_SECURE_BOOT_defconfig  |  2 +
> configs/ls1046aqds_defconfig  |  2 +
> configs/ls1046aqds_lpuart_defconfig   |  2 +
> configs/ls1046aqds_nand_defconfig |  2 +
> configs/ls1046aqds_qspi_defconfig |  2 +
> configs/ls1046aqds_sdcard_ifc_defconfig   |  2 +
> configs/ls1046aqds_sdcard_qspi_defconfig  |  2 +
> configs/ls1046aqds_tfa_SECURE_BOOT_defconfig  |  2 +
> configs/ls1046aqds_tfa_defconfig  |  2 +
> configs/ls1046ardb_emmc_defconfig |  2 +
> configs/ls1046ardb_qspi_SECURE_BOOT_defconfig |  2 +
> configs/ls1046ardb_qspi_defconfig |  2 +
> configs/ls1046ardb_qspi_spl_defconfig |  2 +
> .../ls1046ardb_sdcard_SECURE_BOOT_defconfig   |  2 +
> configs/ls1046ardb_sdcard_defconfig   |  2 +
> configs/ls1046ardb_tfa_SECURE_BOOT_defconfig  |  2 +
> configs/ls1046ardb_tfa_defconfig  |  2 +
> drivers/power/power_i2c.c | 45 ++-
> include/configs/ls1046a_common.h  |  6 +++
> 26 files changed, 136 insertions(+), 8 deletions(-)
>
>diff --git a/arch/arm/dts/fsl-ls1046a-frwy.dts b/arch/arm/dts/fsl-ls1046a-
>frwy.dts
>index 3d41e3bd44..d39159322a 100644
>--- a/arch/arm/dts/fsl-ls1046a-frwy.dts
>+++ b/arch/arm/dts/fsl-ls1046a-frwy.dts
>@@ -32,3 +32,6 @@
>
> };
>
>+ {
>+  status = "okay";
>+};
>diff --git a/arch/arm/dts/fsl-ls1046a-qds.dtsi b/arch/arm/dts/fsl-ls1046a-
>qds.dtsi
>index c95f44fc36..76dc397328 100644
>--- a/arch/arm/dts/fsl-ls1046a-qds.dtsi
>+++ b/arch/arm/dts/fsl-ls1046a-qds.dtsi
>@@ -80,3 +80,7 @@
>  {
>   status = "okay";
> };
>+
>+ {
>+  status = "okay";
>+};
>diff --git a/arch/arm/dts/fsl-ls1046a-rdb.dts b/arch/arm/dts/fsl-ls1046a-
>rdb.dts
>index a05c9e9b9e..83e34ab02a 100644
>--- a/arch/arm/dts/fsl-ls1046a-rdb.dts
>+++ b/arch/arm/dts/fsl-ls1046a-rdb.dts
>@@ -43,3 +43,11 @@
>  {
>   status = "okay";
> };
>+
>+ {
>+  status = "okay";
>+};
>+
>+ {
>+  status = "okay";
>+};
>diff --git a/arch/arm/include/asm/gpio.h b/arch/arm/include/asm/gpio.h
>index 45cb04801c..9adebf6c04 100644
>--- a/arch/arm/include/asm/gpio.h
>+++ b/arch/arm/include/asm/gpio.h
>@@ -4,6 +4,7 @@
>   !defined(CONFIG_ARCH_LX2160A) &&
>!defined(CONFIG_ARCH_LS1028A) && \
>   !defined(CONFIG_ARCH_LS2080A) &&
>!defined(CONFIG_ARCH_LS1088A) && \
>   !defined(CONFIG_ARCH_LS1012A) &&
>!defined(CONFIG_ARCH_LS1043A) && \
>+  !defined(CONFIG_ARCH_LS1046A) && \
>   !defined(CONFIG_ARCH_ASPEED)
> #include 
> #endif
>diff --git a/board/freescale/ls1046afrwy/ls1046afrwy.c
>b/board/freescale/ls1046afrwy/ls1046afrwy.c
>index ac2f8ee436..4a9189b3ee 100644
>--- a/board/freescale/ls1046afrwy/ls1046afrwy.c
>+++ b/board/freescale/ls1046afrwy/ls1046afrwy.c
>@@ -35,11 +35,24 @@
>
> DECLARE_GLOBAL_DATA_PTR;
>
>-int select_i2c_ch_pca9547(u8 ch)
>+int select_i2c_ch_pca9547(u8 ch, int bus_num)
> {
>   int ret;
>
>+#ifdef CONFIG_DM_I2C
>+  struct udevice *dev;
>+
>+  ret = i2c_get_chip_for_busnum(bus_num, I2C_MUX_PCA_ADDR_PRI,
>+1, );
>+  if (ret) {
>+  printf("%s: Cannot find udev for a bus %d\n", __func__,
>+ bus_num);
>+  return ret;
>+  }
>+  ret = dm_i2c_write(dev, 0, , 1);
>+#else
>   ret = i2c_write(I2C_MUX_PCA_ADDR_PRI, 0, 1, , 1);
>+#endif
>   if (ret) {
>   puts("PCA: failed to select proper channel\n");
>   return ret;
>@@ -144,7 +157,7 @@ val = (in_le32(SMMU_SCR0) | SCR0_CLIENTPD_MASK)
>& ~(SCR0_USFCFG_MASK);
>   sec_init();
> #endif
>
>-  select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT);
>+  select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT, 0);
>   return 0;
> }
>
>diff --git a/board/freescale/ls1046aqds/ls1046aqds.c
>b/board/freescale/ls1046aqds/ls1046aqds.c
>index aac5d9aa84..e8d321b6c1 100644
>--- a/board/freescale/ls1046aqds/ls1046aqds.c
>+++ 

RE: [v3 6/8] dm: arm: ls1043a: add i2c DM support

[Priyanka Jain]

>-Original Message-
>From: Biwen Li 
>Sent: Thursday, December 5, 2019 11:41 AM
>To: Jagdish Gediya ; Priyanka Jain
>; h...@denx.de; ja...@amarulasolutions.com;
>aford...@gmail.com; Alison Wang ;
>bhaskar.upadh...@nxp.com; feng.l...@nxp.com; jh80.ch...@samsung.com;
>Pramod Kumar ; Rajesh Bhagat
>; Ruchika Gupta ;
>olte...@gmail.com
>Cc: Xiaobo Xie ; Jiafei Pan ; u-
>b...@lists.denx.de; Biwen Li 
>Subject: [v3 6/8] dm: arm: ls1043a: add i2c DM support
>
>This supports i2c DM and enables CONFIG_DM_I2C for SoC LS1043A
>
>Signed-off-by: Biwen Li 
>---
>Changes in v3:
>   - none
>
>Changes in v2:
>   - merge some patches to one patch
>
> arch/arm/include/asm/gpio.h   |  2 +-
> board/freescale/ls1043aqds/ls1043aqds.c   | 97 +--
> configs/ls1043aqds_defconfig  |  2 +
> configs/ls1043aqds_lpuart_defconfig   |  2 +
> configs/ls1043aqds_nand_defconfig |  2 +
> configs/ls1043aqds_nor_ddr3_defconfig |  2 +
> configs/ls1043aqds_qspi_defconfig |  2 +
> configs/ls1043aqds_sdcard_ifc_defconfig   |  2 +
> configs/ls1043aqds_sdcard_qspi_defconfig  |  2 +
> configs/ls1043aqds_tfa_SECURE_BOOT_defconfig  |  2 +
> configs/ls1043aqds_tfa_defconfig  |  2 +
> configs/ls1043ardb_SECURE_BOOT_defconfig  |  2 +
> configs/ls1043ardb_defconfig  |  2 +
> configs/ls1043ardb_nand_SECURE_BOOT_defconfig |  2 +
> configs/ls1043ardb_nand_defconfig |  2 +
> .../ls1043ardb_sdcard_SECURE_BOOT_defconfig   |  2 +
> configs/ls1043ardb_sdcard_defconfig   |  2 +
> configs/ls1043ardb_tfa_SECURE_BOOT_defconfig  |  2 +
> configs/ls1043ardb_tfa_defconfig  |  2 +
> include/configs/ls1043a_common.h  |  5 +
> 20 files changed, 131 insertions(+), 7 deletions(-)
>
>diff --git a/arch/arm/include/asm/gpio.h b/arch/arm/include/asm/gpio.h
>index 9f8c9da564..45cb04801c 100644
>--- a/arch/arm/include/asm/gpio.h
>+++ b/arch/arm/include/asm/gpio.h
>@@ -3,7 +3,7 @@
>   !defined(CONFIG_ARCH_BCM63158) &&
>!defined(CONFIG_ARCH_ROCKCHIP) && \
>   !defined(CONFIG_ARCH_LX2160A) &&
>!defined(CONFIG_ARCH_LS1028A) && \
>   !defined(CONFIG_ARCH_LS2080A) &&
>!defined(CONFIG_ARCH_LS1088A) && \
>-  !defined(CONFIG_ARCH_LS1012A) && \
>+  !defined(CONFIG_ARCH_LS1012A) &&
>!defined(CONFIG_ARCH_LS1043A) && \
>   !defined(CONFIG_ARCH_ASPEED)
> #include 
> #endif
>diff --git a/board/freescale/ls1043aqds/ls1043aqds.c
>b/board/freescale/ls1043aqds/ls1043aqds.c
>index 8c96b962b7..a0680d513e 100644
>--- a/board/freescale/ls1043aqds/ls1043aqds.c
>+++ b/board/freescale/ls1043aqds/ls1043aqds.c
>@@ -271,11 +271,24 @@ unsigned long get_board_ddr_clk(void)
>   return ;
> }
>
>-int select_i2c_ch_pca9547(u8 ch)
>+int select_i2c_ch_pca9547(u8 ch, int bus_num)
> {
>   int ret;
>
>+#ifdef CONFIG_DM_I2C
>+  struct udevice *dev;
>+
>+  ret = i2c_get_chip_for_busnum(bus_num, I2C_MUX_PCA_ADDR_PRI,
>+1, );
>+  if (ret) {
>+  printf("%s: Cannot find udev for a bus %d\n", __func__,
>+ bus_num);
>+  return ret;
>+  }
>+  ret = dm_i2c_write(dev, 0, , 1);
>+#else
>   ret = i2c_write(I2C_MUX_PCA_ADDR_PRI, 0, 1, , 1);
>+#endif
>   if (ret) {
>   puts("PCA: failed to select proper channel\n");
>   return ret;
>@@ -290,8 +303,10 @@ int dram_init(void)
>* When resuming from deep sleep, the I2C channel may not be
>* in the default channel. So, switch to the default channel
>* before accessing DDR SPD.
>+   *
>+   * PCA9547 mount on I2C1 bus
>*/
>-  select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT);
>+  select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT, 0);
>   fsl_initdram();
> #if (!defined(CONFIG_SPL) && !defined(CONFIG_TFABOOT)) || \
>   defined(CONFIG_SPL_BUILD)
>@@ -304,16 +319,83 @@ int dram_init(void)
>
> int i2c_multiplexer_select_vid_channel(u8 channel)  {
>-  return select_i2c_ch_pca9547(channel);
>+  return select_i2c_ch_pca9547(channel, 0);
> }
>
> void board_retimer_init(void)
> {
>   u8 reg;
>+  int bus_num = 0;
>
>   /* Retimer is connected to I2C1_CH7_CH5 */
>-  select_i2c_ch_pca9547(I2C_MUX_CH7);
>+  select_i2c_ch_pca9547(I2C_MUX_CH7, bus_num);
>   reg = I2C_MUX_CH5;
>+#ifdef CONFIG_DM_I2C
>+  struct udevice *dev;
>+  int ret;
>+
>+  ret = i2c_get_chip_for_busnum(bus_num, I2C_MUX_PCA_ADDR_SEC,
>+1, );
>+  if (ret) {
>+  printf("%s: Cannot find udev for a bus %d\n", __func__,
>+ bus_num);
>+  return;
>+  }
>+  dm_i2c_write(dev, 0, , 1);
>+
>+  /* Access to Control/Shared register */
>+  ret = i2c_get_chip_for_busnum(bus_num, I2C_RETIMER_ADDR,
>+1, );
>+  if (ret) {
>+  printf("%s: Cannot find udev for a bus 

[PATCH 2/2] travis-ci: set load address for files

[Heinrich Schuchardt]

Set the load address for files to the value of $kernel_addr_r for the
qemu_arm64_defconfig and qemu_arm_defconfig boards to avoid collisions with
the device tree.

Signed-off-by: Heinrich Schuchardt 
---
 py/travis-ci/u_boot_boardenv_qemu_arm64_na.py | 6 +++---
 py/travis-ci/u_boot_boardenv_qemu_arm_na.py   | 6 +++---
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/py/travis-ci/u_boot_boardenv_qemu_arm64_na.py 
b/py/travis-ci/u_boot_boardenv_qemu_arm64_na.py
index 80cba23..2986115 100644
--- a/py/travis-ci/u_boot_boardenv_qemu_arm64_na.py
+++ b/py/travis-ci/u_boot_boardenv_qemu_arm64_na.py
@@ -3,6 +3,6 @@ import travis_tftp
 env__net_uses_pci = True
 env__net_dhcp_server = True

-env__net_tftp_readable_file = travis_tftp.file2env('u-boot.bin')
-env__efi_loader_helloworld_file = 
travis_tftp.file2env('lib/efi_loader/helloworld.efi')
-env__efi_loader_grub_file = travis_tftp.file2env('grub_arm64.efi')
+env__net_tftp_readable_file = travis_tftp.file2env('u-boot.bin', 0x4040)
+env__efi_loader_helloworld_file = 
travis_tftp.file2env('lib/efi_loader/helloworld.efi', 0x4040)
+env__efi_loader_grub_file = travis_tftp.file2env('grub_arm64.efi', 0x4040)
diff --git a/py/travis-ci/u_boot_boardenv_qemu_arm_na.py 
b/py/travis-ci/u_boot_boardenv_qemu_arm_na.py
index 834edd0..391e3c4 100644
--- a/py/travis-ci/u_boot_boardenv_qemu_arm_na.py
+++ b/py/travis-ci/u_boot_boardenv_qemu_arm_na.py
@@ -3,6 +3,6 @@ import travis_tftp
 env__net_uses_pci = True
 env__net_dhcp_server = True

-env__net_tftp_readable_file = travis_tftp.file2env('u-boot.bin')
-env__efi_loader_helloworld_file = 
travis_tftp.file2env('lib/efi_loader/helloworld.efi')
-env__efi_loader_grub_file = travis_tftp.file2env('grub_arm.efi')
+env__net_tftp_readable_file = travis_tftp.file2env('u-boot.bin', 0x4040)
+env__efi_loader_helloworld_file = 
travis_tftp.file2env('lib/efi_loader/helloworld.efi', 0x4040)
+env__efi_loader_grub_file = travis_tftp.file2env('grub_arm.efi', 0x4040)
--
2.24.0

Re: [PATCH v5 085/101] x86: apl: Add UART driver

[Simon Glass]

Hi Bin,

On Sun, 1 Dec 2019 at 22:26, Bin Meng  wrote:
>
> Hi Simon,
>
> On Mon, Nov 25, 2019 at 12:12 PM Simon Glass  wrote:
> >
> > Add a driver for the Apollo Lake UART. It uses the standard ns16550 device
> > but also sets up the input clock with LPSS and supports configuration via
> > of-platdata.
> >
> > Signed-off-by: Simon Glass 
> > ---
> >
> > Changes in v5: None
> > Changes in v4:
> > - Add an extra comment to apl_uart_init()
> > - Tidy up header guards
> > - apollolake -> Apollo Lake
> >
> > Changes in v3:
> > - Use the LPSS code from a separate file
> >
> > Changes in v2: None
> >
> >  arch/x86/cpu/apollolake/Makefile|   1 +
> >  arch/x86/cpu/apollolake/uart.c  | 141 
> >  arch/x86/include/asm/arch-apollolake/uart.h |  20 +++
> >  3 files changed, 162 insertions(+)
> >  create mode 100644 arch/x86/cpu/apollolake/uart.c
> >  create mode 100644 arch/x86/include/asm/arch-apollolake/uart.h
> >
> > diff --git a/arch/x86/cpu/apollolake/Makefile 
> > b/arch/x86/cpu/apollolake/Makefile
> > index 5e136b6515..fdda748ea3 100644
> > --- a/arch/x86/cpu/apollolake/Makefile
> > +++ b/arch/x86/cpu/apollolake/Makefile
> > @@ -3,3 +3,4 @@
> >  # Copyright 2019 Google LLC
> >
> >  obj-y += pmc.o
> > +obj-y += uart.o
> > diff --git a/arch/x86/cpu/apollolake/uart.c b/arch/x86/cpu/apollolake/uart.c
> > new file mode 100644
> > index 00..1dc4d33e52
> > --- /dev/null
> > +++ b/arch/x86/cpu/apollolake/uart.c
> > @@ -0,0 +1,141 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * Special driver to handle of-platdata
> > + *
> > + * Copyright 2019 Google LLC
> > + *
> > + * Some code from coreboot lpss.c
> > + */
> > +
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +
> > +/* Low-power Subsystem (LPSS) clock register */
> > +enum {
> > +   LPSS_CLOCK_CTL_REG  = 0x200,
> > +   LPSS_CNT_CLOCK_EN   = 1,
> > +   LPSS_CNT_CLK_UPDATE = 1U << 31,
> > +   LPSS_CLOCK_DIV_N_SHIFT  = 16,
> > +   LPSS_CLOCK_DIV_N_MASK   = 0x7fff << LPSS_CLOCK_DIV_N_SHIFT,
> > +   LPSS_CLOCK_DIV_M_SHIFT  = 1,
> > +   LPSS_CLOCK_DIV_M_MASK   = 0x7fff << LPSS_CLOCK_DIV_M_SHIFT,
> > +
> > +   /* These set the UART input clock speed */
> > +   LPSS_UART_CLK_M_VAL = 0x25a,
> > +   LPSS_UART_CLK_N_VAL = 0x7fff,
> > +};
> > +
> > +static void lpss_clk_update(void *regs, u32 clk_m_val, u32 clk_n_val)
> > +{
> > +   u32 clk_sel;
> > +
> > +   clk_sel = clk_n_val << LPSS_CLOCK_DIV_N_SHIFT |
> > +clk_m_val << LPSS_CLOCK_DIV_M_SHIFT;
> > +   clk_sel |= LPSS_CNT_CLK_UPDATE | LPSS_CNT_CLOCK_EN;
> > +
> > +   writel(clk_sel, regs + LPSS_CLOCK_CTL_REG);
> > +}
> > +
> > +static void uart_lpss_init(void *regs)
> > +{
> > +   /* Take UART out of reset */
> > +   lpss_reset_release(regs);
> > +
> > +   /* Set M and N divisor inputs and enable clock */
> > +   lpss_clk_update(regs, LPSS_UART_CLK_M_VAL, LPSS_UART_CLK_N_VAL);
> > +}
> > +
> > +void apl_uart_init(pci_dev_t bdf, ulong base)
> > +{
> > +   /* Set UART base address */
> > +   pci_x86_write_config(bdf, PCI_BASE_ADDRESS_0, base, PCI_SIZE_32);
> > +
> > +   /* Enable memory access and bus master */
> > +   pci_x86_write_config(bdf, PCI_COMMAND, PCI_COMMAND_MEMORY |
> > +PCI_COMMAND_MASTER, PCI_SIZE_32);
> > +
> > +   uart_lpss_init((void *)base);
> > +}
> > +
> > +/*
> > + * This driver uses its own compatible string but almost everything else 
> > from
> > + * the standard ns16550 driver. This allows us to provide an of-platdata
> > + * implementation, since the platdata produced by of-platdata does not 
> > match
> > + * struct ns16550_platdata.
> > + *
> > + * When running with of-platdata (generally TPL), the platdata is 
> > converted to
> > + * something that ns16550 expects. When running withoutof-platdata (SPL, 
> > U-Boot
> > + * proper), we use ns16550's ofdata_to_platdata routine.
> > + */
> > +
> > +static int apl_ns16550_probe(struct udevice *dev)
> > +{
> > +   struct ns16550_platdata *plat = dev_get_platdata(dev);
> > +
> > +   if (!CONFIG_IS_ENABLED(PCI))
> > +   apl_uart_init(plat->bdf, plat->base);
> > +
> > +   return ns16550_serial_probe(dev);
> > +}
> > +
> > +static int apl_ns16550_ofdata_to_platdata(struct udevice *dev)
> > +{
> > +   struct ns16550_platdata *plat;
> > +#if CONFIG_IS_ENABLED(OF_PLATDATA)
> > +   struct dtd_intel_apl_ns16550 *dtplat = dev_get_platdata(dev);
> > +
> > +   /*
> > +* Convert our platdata to the ns16550's platdata, so we can just 
> > use
> > +* that driver
> > +*/
> > +   plat = malloc(sizeof(*plat));
> > +   if (!plat)
> > +   return -ENOMEM;
> > +   plat->base = dtplat->early_regs[0];
> > +   plat->reg_width = 1;
> > +   plat->reg_shift = dtplat->reg_shift;
> > +   

[v3 1/8] rtc: pcf8563: support driver model

[Biwen Li]

This supports driver model for pcf8563

Signed-off-by: Biwen Li 
---
Changes in v3:
- update commit messages

Changes in v2:
- none

 drivers/rtc/pcf8563.c | 107 ++
 1 file changed, 107 insertions(+)

diff --git a/drivers/rtc/pcf8563.c b/drivers/rtc/pcf8563.c
index a839d6cc98..44204e133e 100644
--- a/drivers/rtc/pcf8563.c
+++ b/drivers/rtc/pcf8563.c
@@ -12,9 +12,11 @@
 
 #include 
 #include 
+#include 
 #include 
 #include 
 
+#if !CONFIG_IS_ENABLED(DM_RTC)
 static uchar rtc_read  (uchar reg);
 static void  rtc_write (uchar reg, uchar val);
 
@@ -115,3 +117,108 @@ static void rtc_write (uchar reg, uchar val)
 {
i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, reg, val);
 }
+#else
+static int pcf8563_rtc_get(struct udevice *dev, struct rtc_time *tmp)
+{
+   int rel = 0;
+   uchar sec, min, hour, mday, wday, mon_cent, year;
+
+   sec = dm_i2c_reg_read(dev, 0x02);
+   min = dm_i2c_reg_read(dev, 0x03);
+   hour= dm_i2c_reg_read(dev, 0x04);
+   mday= dm_i2c_reg_read(dev, 0x05);
+   wday= dm_i2c_reg_read(dev, 0x06);
+   mon_cent = dm_i2c_reg_read(dev, 0x07);
+   year= dm_i2c_reg_read(dev, 0x08);
+
+   debug ("Get RTC year: %02x mon/cent: %02x mday: %02x wday: %02x "
+  "hr: %02x min: %02x sec: %02x\n",
+  year, mon_cent, mday, wday,
+  hour, min, sec);
+   debug ("Alarms: wday: %02x day: %02x hour: %02x min: %02x\n",
+  dm_i2c_reg_read(dev, 0x0C),
+  dm_i2c_reg_read(dev, 0x0B),
+  dm_i2c_reg_read(dev, 0x0A),
+  dm_i2c_reg_read(dev, 0x09));
+
+   if (sec & 0x80) {
+   puts ("### Warning: RTC Low Voltage - date/time not 
reliable\n");
+   rel = -1;
+   }
+
+   tmp->tm_sec = bcd2bin (sec & 0x7F);
+   tmp->tm_min = bcd2bin (min & 0x7F);
+   tmp->tm_hour = bcd2bin (hour & 0x3F);
+   tmp->tm_mday = bcd2bin (mday & 0x3F);
+   tmp->tm_mon = bcd2bin (mon_cent & 0x1F);
+   tmp->tm_year = bcd2bin (year) + ((mon_cent & 0x80) ? 1900 : 2000);
+   tmp->tm_wday = bcd2bin (wday & 0x07);
+   tmp->tm_yday = 0;
+   tmp->tm_isdst = 0;
+
+   debug ("Get DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
+  tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
+  tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
+
+   return rel;
+}
+
+static int pcf8563_rtc_set(struct udevice *dev, const struct rtc_time *tmp)
+{
+   uchar century;
+
+   debug ("Set DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
+  tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
+  tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
+
+   dm_i2c_reg_write(dev, 0x08, bin2bcd(tmp->tm_year % 100));
+
+   century = (tmp->tm_year >= 2000) ? 0 : 0x80;
+   dm_i2c_reg_write(dev, 0x07, bin2bcd(tmp->tm_mon) | century);
+
+   dm_i2c_reg_write(dev, 0x06, bin2bcd(tmp->tm_wday));
+   dm_i2c_reg_write(dev, 0x05, bin2bcd(tmp->tm_mday));
+   dm_i2c_reg_write(dev, 0x04, bin2bcd(tmp->tm_hour));
+   dm_i2c_reg_write(dev, 0x03, bin2bcd(tmp->tm_min));
+   dm_i2c_reg_write(dev, 0x02, bin2bcd(tmp->tm_sec));
+
+   return 0;
+}
+
+static int pcf8563_rtc_reset(struct udevice *dev)
+{
+   /* clear all control & status registers */
+   dm_i2c_reg_write(dev, 0x00, 0x00);
+   dm_i2c_reg_write(dev, 0x01, 0x00);
+   dm_i2c_reg_write(dev, 0x0D, 0x00);
+
+   /* clear Voltage Low bit */
+   dm_i2c_reg_write(dev, 0x02, dm_i2c_reg_read (dev, 0x02) & 0x7F);
+
+   /* reset all alarms */
+   dm_i2c_reg_write(dev, 0x09, 0x00);
+   dm_i2c_reg_write(dev, 0x0A, 0x00);
+   dm_i2c_reg_write(dev, 0x0B, 0x00);
+   dm_i2c_reg_write(dev, 0x0C, 0x00);
+
+   return 0;
+}
+
+static const struct rtc_ops pcf8563_rtc_ops = {
+   .get = pcf8563_rtc_get,
+   .set = pcf8563_rtc_set,
+   .reset = pcf8563_rtc_reset,
+};
+
+static const struct udevice_id pcf8563_rtc_ids[] = {
+   { .compatible = "nxp,pcf8563" },
+   { }
+};
+
+U_BOOT_DRIVER(rtc_pcf8563) = {
+   .name   = "rtc-pcf8563",
+   .id = UCLASS_RTC,
+   .of_match = pcf8563_rtc_ids,
+   .ops= _rtc_ops,
+};
+#endif
-- 
2.17.1

[PATCH 1/2] travis-ci: provide 'addr' in file2env()

[Heinrich Schuchardt]

Function fetch_tftp_file() in test/py/tests/test_efi_loader.py expects that
the dictionary describing a file contains an entry 'addr' specifying the
loading address.

Add an optional parameter in function file2env() to set the 'addr' entry.

Signed-off-by: Heinrich Schuchardt 
---
 py/travis-ci/travis_tftp.py | 18 --
 1 file changed, 16 insertions(+), 2 deletions(-)

diff --git a/py/travis-ci/travis_tftp.py b/py/travis-ci/travis_tftp.py
index 7289e22..4ea5c06 100644
--- a/py/travis-ci/travis_tftp.py
+++ b/py/travis-ci/travis_tftp.py
@@ -1,14 +1,28 @@
 import os
 import binascii

-def file2env(file_name):
+def file2env(file_name, addr=None):
+"""Create dictionary describing file
+
+@filename:  name of the file to be described
+@addr:  address used for loading the file as int (e.g. 0x4040)
+Return: dictionary describing the file with entries
+* fn- filename
+* size  - file size in bytes
+* crc32 - checksum using CRC-32 algorithm
+* addr  - loading address, optional
+"""
 file_full = os.environ['UBOOT_TRAVIS_BUILD_DIR'] + "/" + file_name

 if not os.path.isfile(file_full):
 return None

-return {
+ret = {
 "fn": file_name,
 "size": os.path.getsize(file_full),
 "crc32": hex(binascii.crc32(open(file_full, 'rb').read()) & 
0x)[2:],
 }
+if addr is not None:
+ret['addr'] = addr
+
+return ret
--
2.24.0

RE: [v3 4/8] Kconfigs: layerscape: use a convenient default value for SYS_MALLOC_F_LEN

[Priyanka Jain]

>-Original Message-
>From: Biwen Li 
>Sent: Thursday, December 5, 2019 11:41 AM
>To: Jagdish Gediya ; Priyanka Jain
>; h...@denx.de; ja...@amarulasolutions.com;
>aford...@gmail.com; Alison Wang ;
>bhaskar.upadh...@nxp.com; feng.l...@nxp.com; jh80.ch...@samsung.com;
>Pramod Kumar ; Rajesh Bhagat
>; Ruchika Gupta ;
>olte...@gmail.com
>Cc: Xiaobo Xie ; Jiafei Pan ; u-
>b...@lists.denx.de; Biwen Li 
>Subject: [v3 4/8] Kconfigs: layerscape: use a convenient default value for
>SYS_MALLOC_F_LEN
>
>The default value of CONFIG_SYS_MALLOC_F_LEN (0x400) leaves U-Boot with
>not enough memory to load i2c driver before relocate, causing it to hang.
>
>Change the default value of CONFIG_SYS_MALLOC_F_LEN for below SoCs,
>- LS1012A
>- LS1021A
>- LS1043A
>- LS1046A
>
>Signed-off-by: Biwen Li 
>---
>Changes in v3:
>   - update commit messages
>
>Changes in v2:
>   - none
>
> Kconfig | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
>diff --git a/Kconfig b/Kconfig
>index e22417ec44..3e6d9f26ea 100644
>--- a/Kconfig
>+++ b/Kconfig
>@@ -146,7 +146,9 @@ config SYS_MALLOC_F_LEN
>   default 0x1000 if AM33XX
>   default 0x2800 if SANDBOX
>   default 0x2000 if (ARCH_IMX8 || ARCH_IMX8M || ARCH_MX7 || \
>- ARCH_MX7ULP || ARCH_MX6 || ARCH_MX5)
>+ ARCH_MX7ULP || ARCH_MX6 || ARCH_MX5 || \
>+ ARCH_LS1012A || ARCH_LS1021A || ARCH_LS1043A
>|| \
>+ ARCH_LS1046A)
>   default 0x400
>   help
> Before relocation, memory is very limited on many platforms. Still,
>--
>2.17.1
Reviewed-by: Priyanka Jain 

RE: [v3 3/8] i2c: mxc_i2c: add DM_FLAG_PRE_RELOC flag

[Priyanka Jain]

>-Original Message-
>From: Biwen Li 
>Sent: Thursday, December 5, 2019 11:40 AM
>To: Jagdish Gediya ; Priyanka Jain
>; h...@denx.de; ja...@amarulasolutions.com;
>aford...@gmail.com; Alison Wang ;
>bhaskar.upadh...@nxp.com; feng.l...@nxp.com; jh80.ch...@samsung.com;
>Pramod Kumar ; Rajesh Bhagat
>; Ruchika Gupta ;
>olte...@gmail.com
>Cc: Xiaobo Xie ; Jiafei Pan ; u-
>b...@lists.denx.de; Biwen Li 
>Subject: [v3 3/8] i2c: mxc_i2c: add DM_FLAG_PRE_RELOC flag
>
>This adds DM_FLAG_PRE_RELOC flag to probe i2c driver before relocation
>
>Signed-off-by: Biwen Li 
>---
>Changes in v3:
>   - none
>
>Changes in v2:
>   - none
>
> drivers/i2c/mxc_i2c.c | 1 +
> 1 file changed, 1 insertion(+)
>
>diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c index
>786b5a2226..6b7ce985b3 100644
>--- a/drivers/i2c/mxc_i2c.c
>+++ b/drivers/i2c/mxc_i2c.c
>@@ -1049,5 +1049,6 @@ U_BOOT_DRIVER(i2c_mxc) = {
>   .probe = mxc_i2c_probe,
>   .priv_auto_alloc_size = sizeof(struct mxc_i2c_bus),
>   .ops = _i2c_ops,
>+  .flags = DM_FLAG_PRE_RELOC,
> };
> #endif
>--
>2.17.1
Reviewed-by: Priyanka Jain 

[v3 7/8] dm: arm: ls1046a: add i2c DM support

[Biwen Li]

This supports i2c DM and enables CONFIG_DM_I2C
for SoC LS1046A

Signed-off-by: Biwen Li 
---
Changes in v3:
- none

Changes in v2:
- merge some patches to one patch

 arch/arm/dts/fsl-ls1046a-frwy.dts |  3 ++
 arch/arm/dts/fsl-ls1046a-qds.dtsi |  4 ++
 arch/arm/dts/fsl-ls1046a-rdb.dts  |  8 
 arch/arm/include/asm/gpio.h   |  1 +
 board/freescale/ls1046afrwy/ls1046afrwy.c | 17 ++-
 board/freescale/ls1046aqds/ls1046aqds.c   | 24 --
 configs/ls1046afrwy_tfa_defconfig |  2 +
 configs/ls1046aqds_SECURE_BOOT_defconfig  |  2 +
 configs/ls1046aqds_defconfig  |  2 +
 configs/ls1046aqds_lpuart_defconfig   |  2 +
 configs/ls1046aqds_nand_defconfig |  2 +
 configs/ls1046aqds_qspi_defconfig |  2 +
 configs/ls1046aqds_sdcard_ifc_defconfig   |  2 +
 configs/ls1046aqds_sdcard_qspi_defconfig  |  2 +
 configs/ls1046aqds_tfa_SECURE_BOOT_defconfig  |  2 +
 configs/ls1046aqds_tfa_defconfig  |  2 +
 configs/ls1046ardb_emmc_defconfig |  2 +
 configs/ls1046ardb_qspi_SECURE_BOOT_defconfig |  2 +
 configs/ls1046ardb_qspi_defconfig |  2 +
 configs/ls1046ardb_qspi_spl_defconfig |  2 +
 .../ls1046ardb_sdcard_SECURE_BOOT_defconfig   |  2 +
 configs/ls1046ardb_sdcard_defconfig   |  2 +
 configs/ls1046ardb_tfa_SECURE_BOOT_defconfig  |  2 +
 configs/ls1046ardb_tfa_defconfig  |  2 +
 drivers/power/power_i2c.c | 45 ++-
 include/configs/ls1046a_common.h  |  6 +++
 26 files changed, 136 insertions(+), 8 deletions(-)

diff --git a/arch/arm/dts/fsl-ls1046a-frwy.dts 
b/arch/arm/dts/fsl-ls1046a-frwy.dts
index 3d41e3bd44..d39159322a 100644
--- a/arch/arm/dts/fsl-ls1046a-frwy.dts
+++ b/arch/arm/dts/fsl-ls1046a-frwy.dts
@@ -32,3 +32,6 @@
 
 };
 
+ {
+   status = "okay";
+};
diff --git a/arch/arm/dts/fsl-ls1046a-qds.dtsi 
b/arch/arm/dts/fsl-ls1046a-qds.dtsi
index c95f44fc36..76dc397328 100644
--- a/arch/arm/dts/fsl-ls1046a-qds.dtsi
+++ b/arch/arm/dts/fsl-ls1046a-qds.dtsi
@@ -80,3 +80,7 @@
  {
status = "okay";
 };
+
+ {
+   status = "okay";
+};
diff --git a/arch/arm/dts/fsl-ls1046a-rdb.dts b/arch/arm/dts/fsl-ls1046a-rdb.dts
index a05c9e9b9e..83e34ab02a 100644
--- a/arch/arm/dts/fsl-ls1046a-rdb.dts
+++ b/arch/arm/dts/fsl-ls1046a-rdb.dts
@@ -43,3 +43,11 @@
  {
status = "okay";
 };
+
+ {
+   status = "okay";
+};
+
+ {
+   status = "okay";
+};
diff --git a/arch/arm/include/asm/gpio.h b/arch/arm/include/asm/gpio.h
index 45cb04801c..9adebf6c04 100644
--- a/arch/arm/include/asm/gpio.h
+++ b/arch/arm/include/asm/gpio.h
@@ -4,6 +4,7 @@
!defined(CONFIG_ARCH_LX2160A) && !defined(CONFIG_ARCH_LS1028A) && \
!defined(CONFIG_ARCH_LS2080A) && !defined(CONFIG_ARCH_LS1088A) && \
!defined(CONFIG_ARCH_LS1012A) && !defined(CONFIG_ARCH_LS1043A) && \
+   !defined(CONFIG_ARCH_LS1046A) && \
!defined(CONFIG_ARCH_ASPEED)
 #include 
 #endif
diff --git a/board/freescale/ls1046afrwy/ls1046afrwy.c 
b/board/freescale/ls1046afrwy/ls1046afrwy.c
index ac2f8ee436..4a9189b3ee 100644
--- a/board/freescale/ls1046afrwy/ls1046afrwy.c
+++ b/board/freescale/ls1046afrwy/ls1046afrwy.c
@@ -35,11 +35,24 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-int select_i2c_ch_pca9547(u8 ch)
+int select_i2c_ch_pca9547(u8 ch, int bus_num)
 {
int ret;
 
+#ifdef CONFIG_DM_I2C
+   struct udevice *dev;
+
+   ret = i2c_get_chip_for_busnum(bus_num, I2C_MUX_PCA_ADDR_PRI,
+ 1, );
+   if (ret) {
+   printf("%s: Cannot find udev for a bus %d\n", __func__,
+  bus_num);
+   return ret;
+   }
+   ret = dm_i2c_write(dev, 0, , 1);
+#else
ret = i2c_write(I2C_MUX_PCA_ADDR_PRI, 0, 1, , 1);
+#endif
if (ret) {
puts("PCA: failed to select proper channel\n");
return ret;
@@ -144,7 +157,7 @@ val = (in_le32(SMMU_SCR0) | SCR0_CLIENTPD_MASK) & 
~(SCR0_USFCFG_MASK);
sec_init();
 #endif
 
-   select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT);
+   select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT, 0);
return 0;
 }
 
diff --git a/board/freescale/ls1046aqds/ls1046aqds.c 
b/board/freescale/ls1046aqds/ls1046aqds.c
index aac5d9aa84..e8d321b6c1 100644
--- a/board/freescale/ls1046aqds/ls1046aqds.c
+++ b/board/freescale/ls1046aqds/ls1046aqds.c
@@ -269,11 +269,23 @@ u32 get_lpuart_clk(void)
 }
 #endif
 
-int select_i2c_ch_pca9547(u8 ch)
+int select_i2c_ch_pca9547(u8 ch, int bus_num)
 {
int ret;
+#ifdef CONFIG_DM_I2C
+   struct udevice *dev;
 
+   ret = i2c_get_chip_for_busnum(bus_num, I2C_MUX_PCA_ADDR_PRI,
+ 1, );
+   if (ret) {
+   printf("%s: Cannot find udev for a bus %d\n", __func__,
+  bus_num);
+   return ret;
+   }
+   ret = dm_i2c_write(dev, 0, , 

[v3 8/8] dm: arm: ls1021a: add i2c DM support

[Biwen Li]

This supports i2c DM and enables CONFIG_DM_I2C
for SoC LS1021A

Signed-off-by: Biwen Li 
---
Changes in v3:
- none

Changes in v2:
- merge some patches to one patch

 board/freescale/common/dcu_sii9022a.c | 94 +++
 board/freescale/common/diu_ch7301.c   | 79 
 board/freescale/ls1021aqds/dcu.c  | 43 -
 board/freescale/ls1021aqds/ls1021aqds.c   | 20 +++-
 board/freescale/ls1021atwr/ls1021atwr.c   | 26 -
 configs/ls1021aiot_qspi_defconfig |  2 +
 configs/ls1021aiot_sdcard_defconfig   |  2 +
 configs/ls1021aqds_ddr4_nor_defconfig |  2 +
 configs/ls1021aqds_ddr4_nor_lpuart_defconfig  |  2 +
 configs/ls1021aqds_nand_defconfig |  2 +
 configs/ls1021aqds_nor_SECURE_BOOT_defconfig  |  2 +
 configs/ls1021aqds_nor_defconfig  |  2 +
 configs/ls1021aqds_nor_lpuart_defconfig   |  2 +
 configs/ls1021aqds_qspi_defconfig |  2 +
 configs/ls1021aqds_sdcard_ifc_defconfig   |  2 +
 configs/ls1021aqds_sdcard_qspi_defconfig  |  2 +
 configs/ls1021atsn_qspi_defconfig |  2 +
 configs/ls1021atsn_sdcard_defconfig   |  2 +
 configs/ls1021atwr_nor_SECURE_BOOT_defconfig  |  2 +
 configs/ls1021atwr_nor_defconfig  |  2 +
 configs/ls1021atwr_nor_lpuart_defconfig   |  2 +
 configs/ls1021atwr_qspi_defconfig |  2 +
 ...s1021atwr_sdcard_ifc_SECURE_BOOT_defconfig |  2 +
 configs/ls1021atwr_sdcard_ifc_defconfig   |  2 +
 configs/ls1021atwr_sdcard_qspi_defconfig  |  2 +
 include/configs/ls1021aiot.h  |  3 +
 include/configs/ls1021aqds.h  |  2 +
 include/configs/ls1021atsn.h  |  2 +
 include/configs/ls1021atwr.h  |  3 +
 29 files changed, 305 insertions(+), 7 deletions(-)

diff --git a/board/freescale/common/dcu_sii9022a.c 
b/board/freescale/common/dcu_sii9022a.c
index 3bf71abf55..736b689e08 100644
--- a/board/freescale/common/dcu_sii9022a.c
+++ b/board/freescale/common/dcu_sii9022a.c
@@ -63,7 +63,100 @@ int dcu_set_dvi_encoder(struct fb_videomode *videomode)
u8 temp;
u16 temp1, temp2;
u32 temp3;
+#ifdef CONFIG_DM_I2C
+   struct udevice *dev;
+   int ret;
+
+   ret = i2c_get_chip_for_busnum(CONFIG_SYS_I2C_DVI_BUS_NUM, 
CONFIG_SYS_I2C_DVI_ADDR,
+ 1, );
+   if (ret) {
+   printf("%s: Cannot find udev for a bus %d\n", __func__,
+  CONFIG_SYS_I2C_DVI_BUS_NUM);
+   return ret;
+   }
 
+   /* Enable TPI transmitter mode */
+   temp = TPI_TRANS_MODE_ENABLE;
+   dm_i2c_write(dev, TPI_TRANS_MODE_REG, , 1);
+
+   /* Enter into D0 state, full operation */
+   dm_i2c_read(dev, TPI_PWR_STAT_REG, , 1);
+   temp &= ~TPI_PWR_STAT_MASK;
+   temp |= TPI_PWR_STAT_D0;
+   dm_i2c_write(dev, TPI_PWR_STAT_REG, , 1);
+
+   /* Enable source termination */
+   temp = TPI_SET_PAGE_SII9022A;
+   dm_i2c_write(dev, TPI_SET_PAGE_REG, , 1);
+   temp = TPI_SET_OFFSET_SII9022A;
+   dm_i2c_write(dev, TPI_SET_OFFSET_REG, , 1);
+
+   dm_i2c_read(dev, TPI_RW_ACCESS_REG, , 1);
+   temp |= TPI_RW_EN_SRC_TERMIN;
+   dm_i2c_write(dev, TPI_RW_ACCESS_REG, , 1);
+
+   /* Set TPI system control */
+   temp = TPI_SYS_TMDS_OUTPUT | TPI_SYS_AV_NORAML | TPI_SYS_DVI_MODE;
+   dm_i2c_write(dev, TPI_SYS_CTRL_REG, , 1);
+
+   /* Set pixel clock */
+   temp1 = PICOS2KHZ(videomode->pixclock) / 10;
+   temp = (u8)(temp1 & 0xFF);
+   dm_i2c_write(dev, PIXEL_CLK_LSB_REG, , 1);
+   temp = (u8)(temp1 >> 8);
+   dm_i2c_write(dev, PIXEL_CLK_MSB_REG, , 1);
+
+   /* Set total pixels per line */
+   temp1 = videomode->hsync_len + videomode->left_margin +
+   videomode->xres + videomode->right_margin;
+   temp = (u8)(temp1 & 0xFF);
+   dm_i2c_write(dev, TOTAL_PIXELS_LSB_REG, , 1);
+   temp = (u8)(temp1 >> 8);
+   dm_i2c_write(dev, TOTAL_PIXELS_MSB_REG, , 1);
+
+   /* Set total lines */
+   temp2 = videomode->vsync_len + videomode->upper_margin +
+   videomode->yres + videomode->lower_margin;
+   temp = (u8)(temp2 & 0xFF);
+   dm_i2c_write(dev, TOTAL_LINES_LSB_REG, , 1);
+   temp = (u8)(temp2 >> 8);
+   dm_i2c_write(dev, TOTAL_LINES_MSB_REG, , 1);
+
+   /* Set vertical frequency in Hz */
+   temp3 = temp1 * temp2;
+   temp3 = (PICOS2KHZ(videomode->pixclock) * 1000) / temp3;
+   temp1 = (u16)temp3 * 100;
+   temp = (u8)(temp1 & 0xFF);
+   dm_i2c_write(dev, VERT_FREQ_LSB_REG, , 1);
+   temp = (u8)(temp1 >> 8);
+   dm_i2c_write(dev, VERT_FREQ_MSB_REG, , 1);
+
+   /* Set TPI input bus and pixel repetition data */
+   temp = TPI_INBUS_CLOCK_RATIO_1 | TPI_INBUS_FULL_PIXEL_WIDE |
+   TPI_INBUS_RISING_EDGE;
+   dm_i2c_write(dev, TPI_INBUS_FMT_REG, , 1);
+
+   /* Set TPI AVI Input 

[v3 6/8] dm: arm: ls1043a: add i2c DM support

[Biwen Li]

This supports i2c DM and enables CONFIG_DM_I2C
for SoC LS1043A

Signed-off-by: Biwen Li 
---
Changes in v3:
- none

Changes in v2:
- merge some patches to one patch

 arch/arm/include/asm/gpio.h   |  2 +-
 board/freescale/ls1043aqds/ls1043aqds.c   | 97 +--
 configs/ls1043aqds_defconfig  |  2 +
 configs/ls1043aqds_lpuart_defconfig   |  2 +
 configs/ls1043aqds_nand_defconfig |  2 +
 configs/ls1043aqds_nor_ddr3_defconfig |  2 +
 configs/ls1043aqds_qspi_defconfig |  2 +
 configs/ls1043aqds_sdcard_ifc_defconfig   |  2 +
 configs/ls1043aqds_sdcard_qspi_defconfig  |  2 +
 configs/ls1043aqds_tfa_SECURE_BOOT_defconfig  |  2 +
 configs/ls1043aqds_tfa_defconfig  |  2 +
 configs/ls1043ardb_SECURE_BOOT_defconfig  |  2 +
 configs/ls1043ardb_defconfig  |  2 +
 configs/ls1043ardb_nand_SECURE_BOOT_defconfig |  2 +
 configs/ls1043ardb_nand_defconfig |  2 +
 .../ls1043ardb_sdcard_SECURE_BOOT_defconfig   |  2 +
 configs/ls1043ardb_sdcard_defconfig   |  2 +
 configs/ls1043ardb_tfa_SECURE_BOOT_defconfig  |  2 +
 configs/ls1043ardb_tfa_defconfig  |  2 +
 include/configs/ls1043a_common.h  |  5 +
 20 files changed, 131 insertions(+), 7 deletions(-)

diff --git a/arch/arm/include/asm/gpio.h b/arch/arm/include/asm/gpio.h
index 9f8c9da564..45cb04801c 100644
--- a/arch/arm/include/asm/gpio.h
+++ b/arch/arm/include/asm/gpio.h
@@ -3,7 +3,7 @@
!defined(CONFIG_ARCH_BCM63158) && !defined(CONFIG_ARCH_ROCKCHIP) && \
!defined(CONFIG_ARCH_LX2160A) && !defined(CONFIG_ARCH_LS1028A) && \
!defined(CONFIG_ARCH_LS2080A) && !defined(CONFIG_ARCH_LS1088A) && \
-   !defined(CONFIG_ARCH_LS1012A) && \
+   !defined(CONFIG_ARCH_LS1012A) && !defined(CONFIG_ARCH_LS1043A) && \
!defined(CONFIG_ARCH_ASPEED)
 #include 
 #endif
diff --git a/board/freescale/ls1043aqds/ls1043aqds.c 
b/board/freescale/ls1043aqds/ls1043aqds.c
index 8c96b962b7..a0680d513e 100644
--- a/board/freescale/ls1043aqds/ls1043aqds.c
+++ b/board/freescale/ls1043aqds/ls1043aqds.c
@@ -271,11 +271,24 @@ unsigned long get_board_ddr_clk(void)
return ;
 }
 
-int select_i2c_ch_pca9547(u8 ch)
+int select_i2c_ch_pca9547(u8 ch, int bus_num)
 {
int ret;
 
+#ifdef CONFIG_DM_I2C
+   struct udevice *dev;
+
+   ret = i2c_get_chip_for_busnum(bus_num, I2C_MUX_PCA_ADDR_PRI,
+ 1, );
+   if (ret) {
+   printf("%s: Cannot find udev for a bus %d\n", __func__,
+  bus_num);
+   return ret;
+   }
+   ret = dm_i2c_write(dev, 0, , 1);
+#else
ret = i2c_write(I2C_MUX_PCA_ADDR_PRI, 0, 1, , 1);
+#endif
if (ret) {
puts("PCA: failed to select proper channel\n");
return ret;
@@ -290,8 +303,10 @@ int dram_init(void)
 * When resuming from deep sleep, the I2C channel may not be
 * in the default channel. So, switch to the default channel
 * before accessing DDR SPD.
+*
+* PCA9547 mount on I2C1 bus
 */
-   select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT);
+   select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT, 0);
fsl_initdram();
 #if (!defined(CONFIG_SPL) && !defined(CONFIG_TFABOOT)) || \
defined(CONFIG_SPL_BUILD)
@@ -304,16 +319,83 @@ int dram_init(void)
 
 int i2c_multiplexer_select_vid_channel(u8 channel)
 {
-   return select_i2c_ch_pca9547(channel);
+   return select_i2c_ch_pca9547(channel, 0);
 }
 
 void board_retimer_init(void)
 {
u8 reg;
+   int bus_num = 0;
 
/* Retimer is connected to I2C1_CH7_CH5 */
-   select_i2c_ch_pca9547(I2C_MUX_CH7);
+   select_i2c_ch_pca9547(I2C_MUX_CH7, bus_num);
reg = I2C_MUX_CH5;
+#ifdef CONFIG_DM_I2C
+   struct udevice *dev;
+   int ret;
+
+   ret = i2c_get_chip_for_busnum(bus_num, I2C_MUX_PCA_ADDR_SEC,
+ 1, );
+   if (ret) {
+   printf("%s: Cannot find udev for a bus %d\n", __func__,
+  bus_num);
+   return;
+   }
+   dm_i2c_write(dev, 0, , 1);
+
+   /* Access to Control/Shared register */
+   ret = i2c_get_chip_for_busnum(bus_num, I2C_RETIMER_ADDR,
+ 1, );
+   if (ret) {
+   printf("%s: Cannot find udev for a bus %d\n", __func__,
+  bus_num);
+   return;
+   }
+
+   reg = 0x0;
+   dm_i2c_write(dev, 0xff, , 1);
+
+   /* Read device revision and ID */
+   dm_i2c_read(dev, 1, , 1);
+   debug("Retimer version id = 0x%x\n", reg);
+
+   /* Enable Broadcast. All writes target all channel register sets */
+   reg = 0x0c;
+   dm_i2c_write(dev, 0xff, , 1);
+
+   /* Reset Channel Registers */
+   dm_i2c_read(dev, 0, , 1);
+   reg |= 0x4;
+   dm_i2c_write(dev, 0, , 

[v3 4/8] Kconfigs: layerscape: use a convenient default value for SYS_MALLOC_F_LEN

[Biwen Li]

The default value of CONFIG_SYS_MALLOC_F_LEN (0x400)
leaves U-Boot with not enough memory to load i2c driver
before relocate, causing it to hang.

Change the default value of CONFIG_SYS_MALLOC_F_LEN
for below SoCs,
- LS1012A
- LS1021A
- LS1043A
- LS1046A

Signed-off-by: Biwen Li 
---
Changes in v3:
- update commit messages

Changes in v2:
- none

 Kconfig | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/Kconfig b/Kconfig
index e22417ec44..3e6d9f26ea 100644
--- a/Kconfig
+++ b/Kconfig
@@ -146,7 +146,9 @@ config SYS_MALLOC_F_LEN
default 0x1000 if AM33XX
default 0x2800 if SANDBOX
default 0x2000 if (ARCH_IMX8 || ARCH_IMX8M || ARCH_MX7 || \
-  ARCH_MX7ULP || ARCH_MX6 || ARCH_MX5)
+  ARCH_MX7ULP || ARCH_MX6 || ARCH_MX5 || \
+  ARCH_LS1012A || ARCH_LS1021A || ARCH_LS1043A || \
+  ARCH_LS1046A)
default 0x400
help
  Before relocation, memory is very limited on many platforms. Still,
-- 
2.17.1

[v3 3/8] i2c: mxc_i2c: add DM_FLAG_PRE_RELOC flag

[Biwen Li]

This adds DM_FLAG_PRE_RELOC flag to probe i2c driver
before relocation

Signed-off-by: Biwen Li 
---
Changes in v3:
- none

Changes in v2:
- none

 drivers/i2c/mxc_i2c.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c
index 786b5a2226..6b7ce985b3 100644
--- a/drivers/i2c/mxc_i2c.c
+++ b/drivers/i2c/mxc_i2c.c
@@ -1049,5 +1049,6 @@ U_BOOT_DRIVER(i2c_mxc) = {
.probe = mxc_i2c_probe,
.priv_auto_alloc_size = sizeof(struct mxc_i2c_bus),
.ops = _i2c_ops,
+   .flags = DM_FLAG_PRE_RELOC,
 };
 #endif
-- 
2.17.1

[v3 2/8] armv8: fsl-layerscape: spl: fix build error when DM_I2C is enabled

[Biwen Li]

Fix below SPL build error when DM_I2C is enabled,
- arch/arm/cpu/armv8/built-in.o: In function `board_init_f:
  arch/arm/cpu/armv8/fsl-layerscape/spl.c:74: undefined reference to 
`i2c_init_all'
  arch/arm/cpu/armv8/fsl-layerscape/spl.c:74:(.text.board_init_f+0x30):
  relocation truncated to fit: R_AARCH64_CALL26 against undefined symbol
  `i2c_init_all'
  make[2]: *** [spl/u-boot-spl] Error 1
  make[1]: *** [spl/u-boot-spl] Error 2
  make: *** [sub-make] Error 2
  arch/arm/cpu/armv8/fsl-layerscape/spl.c: In function 'board_init_f':
  arch/arm/cpu/armv8/fsl-layerscape/spl.c:74:2: warning: implicit
  declaration of function 'i2c_init_all'; did you mean 'misc_init_r'?
  [-Wimplicit-function-declaration]`

Signed-off-by: Biwen Li 
---
Changes in v3:
- update commit messages

Changes in v2:
- none

 arch/arm/cpu/armv8/fsl-layerscape/spl.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/spl.c 
b/arch/arm/cpu/armv8/fsl-layerscape/spl.c
index 58a39e1123..b5038f1d3b 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/spl.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/spl.c
@@ -71,9 +71,11 @@ void board_init_f(ulong dummy)
preloader_console_init();
spl_set_bd();
 
+#ifdef CONFIG_SYS_I2C
 #ifdef CONFIG_SPL_I2C_SUPPORT
i2c_init_all();
 #endif
+#endif
 #ifdef CONFIG_VID
init_func_vid();
 #endif
-- 
2.17.1

Re: [U-Boot] [PATCH v5 12/26] mtd: ensure CMD_NAND is compiled when its options are selected

[Tom Rini]

On Thu, Oct 03, 2019 at 07:50:14PM +0200, Miquel Raynal wrote:

> In some files, options of CMD_NAND are selected but not the command
> itself. Fix this inconsistency.
> 
> Signed-off-by: Miquel Raynal 
> Reviewed-by: Boris Brezillon 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [PATCH v5 084/101] x86: apl: Add PMC driver

[Simon Glass]

Hi BIn,
On Sun, 1 Dec 2019 at 22:26, Bin Meng  wrote:
>
> Hi Simon,
>
> On Mon, Nov 25, 2019 at 12:12 PM Simon Glass  wrote:
> >
> > Add a driver for the Apollo Lake SoC. It supports the basic operations and
> > can use device tree or of-platdata.
> >
> > Signed-off-by: Simon Glass 
> > ---
> >
> > Changes in v5: None
> > Changes in v4:
> > - Fix Makefile copyright message
> > - Fix incorrect mask check in pmc_gpe_init()
> > - Switch over to use pinctrl for pad init/config
> > - Tidy up header guards
> > - Use pci_ofplat_get_devfn()
> > - apollolake -> Apollo Lake
> >
> > Changes in v3:
> > - Use pci_get_devfn()
> >
> > Changes in v2: None
> >
> >  arch/x86/cpu/apollolake/Makefile  |   5 +
> >  arch/x86/cpu/apollolake/pmc.c | 216 ++
> >  arch/x86/include/asm/arch-apollolake/pm.h |  19 ++
> >  drivers/power/acpi_pmc/acpi-pmc-uclass.c  |  56 ++
> >  4 files changed, 296 insertions(+)
> >  create mode 100644 arch/x86/cpu/apollolake/Makefile
> >  create mode 100644 arch/x86/cpu/apollolake/pmc.c
> >  create mode 100644 arch/x86/include/asm/arch-apollolake/pm.h
> >

[..]

> > diff --git a/drivers/power/acpi_pmc/acpi-pmc-uclass.c 
> > b/drivers/power/acpi_pmc/acpi-pmc-uclass.c
> > index 653c71b948..d43de87126 100644
> > --- a/drivers/power/acpi_pmc/acpi-pmc-uclass.c
> > +++ b/drivers/power/acpi_pmc/acpi-pmc-uclass.c
> > @@ -9,6 +9,9 @@
> >  #include 
> >  #include 
> >  #include 
> > +#ifdef CONFIG_X86
> > +#include 
> > +#endif
> >  #include 
> >  #include 
> >
> > @@ -34,6 +37,59 @@ enum {
> > TCO1_CNT_HLT= 1 << 11,
> >  };
> >
> > +#ifdef CONFIG_X86
> > +static int gpe0_shift(struct acpi_pmc_upriv *upriv, int regnum)
> > +{
> > +   return upriv->gpe0_dwx_shift_base + regnum * 4;
> > +}
> > +
> > +int pmc_gpe_init(struct udevice *dev)
>
> Where is this function called? and why should this be put in the
> acpi-pmc-uclass driver?

It is called from cpu_spl.c - it is here because this driver the GPE
information.

Regards,
Simon

[PATCH 1/1] arch: arm: Program GIC LPI configuration table

[Vladimir Olovyannikov]

From: Bharat Kumar Reddy Gooty 

Programs the following:
1. Redistributor PROCBASER configuration table (which
is common for all redistributors)
2. Redistributor pending table (PENDBASER), for all the
available redistributors.

Signed-off-by: Bharat Kumar Reddy Gooty 
Signed-off-by: Vladimir Olovyannikov 
---
 arch/arm/Kconfig  |  11 +++
 arch/arm/include/asm/gic-v3.h | 134 ++
 arch/arm/lib/Makefile |   3 +
 arch/arm/lib/gic-v3-its.c | 100 +
 4 files changed, 248 insertions(+)
 create mode 100644 arch/arm/include/asm/gic-v3.h
 create mode 100644 arch/arm/lib/gic-v3-its.c

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index f96841c777..cf46aa867d 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -61,6 +61,17 @@ config LNX_KRNL_IMG_TEXT_OFFSET_BASE
 endif
 endif
 
+config GIC_V3_ITS
+   bool "ARM GICV3 ITS"
+   default n
+   help
+ ARM GICV3 Interrupt translation service (ITS).
+ Basic support for programming locality specific peripheral
+ interrupts (LPI) configuration tables and enable LPI tables.
+ LPI configuration table can be used by u-boot or Linux.
+ ARM GICV3 has limitation, once the LPI table is enabled, LPI
+ configuration table can not be re-programmed, unless GICV3 reset.
+
 config STATIC_RELA
bool
default y if ARM64 && !POSITION_INDEPENDENT
diff --git a/arch/arm/include/asm/gic-v3.h b/arch/arm/include/asm/gic-v3.h
new file mode 100644
index 00..ac6c9e7013
--- /dev/null
+++ b/arch/arm/include/asm/gic-v3.h
@@ -0,0 +1,134 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2019 Broadcom.
+ */
+
+#ifndef __GIC_V3_H__
+#define __GIC_V3_H__
+
+#define GICR_CTLR_ENABLE_LPIS  BIT(0)
+#define GICR_CTLR_RWP  BIT(3)
+
+#define GICR_TYPER_CPU_NUMBER(r)   (((r) >> 8) & 0x)
+
+#define GICR_WAKER_PROCESSORSLEEP  BIT(1)
+#define GICR_WAKER_CHILDRENASLEEP  BIT(2)
+
+#define GIC_BASER_CACHE_NCNB   0ULL
+#define GIC_BASER_CACHE_SAMEASINNER0ULL
+#define GIC_BASER_CACHE_NC 1ULL
+#define GIC_BASER_CACHE_RAWT   2ULL
+#define GIC_BASER_CACHE_RAWB   3ULL
+#define GIC_BASER_CACHE_WAWT   4ULL
+#define GIC_BASER_CACHE_WAWB   5ULL
+#define GIC_BASER_CACHE_RAWAWT 6ULL
+#define GIC_BASER_CACHE_RAWAWB 7ULL
+#define GIC_BASER_CACHE_MASK   7ULL
+#define GIC_BASER_NONSHAREABLE 0ULL
+#define GIC_BASER_INNERSHAREABLE   1ULL
+#define GIC_BASER_OUTERSHAREABLE   2ULL
+#define GIC_BASER_SHAREABILITY_MASK3ULL
+
+#define GIC_BASER_CACHEABILITY(reg, inner_outer, type) \
+   (GIC_BASER_CACHE_##type << reg##_##inner_outer##_CACHEABILITY_SHIFT)
+
+#define GIC_BASER_SHAREABILITY(reg, type)  \
+   (GIC_BASER_##type << reg##_SHAREABILITY_SHIFT)
+
+/* encode a size field of width @w containing @n - 1 units */
+#define GIC_ENCODE_SZ(n, w) (((unsigned long)(n) - 1) &\
+GENMASK_ULL(((w) - 1), 0))
+
+#define GICR_PROPBASER_SHAREABILITY_SHIFT  (10)
+#define GICR_PROPBASER_INNER_CACHEABILITY_SHIFT(7)
+#define GICR_PROPBASER_OUTER_CACHEABILITY_SHIFT(56)
+#define GICR_PROPBASER_SHAREABILITY_MASK   \
+   GIC_BASER_SHAREABILITY(GICR_PROPBASER, SHAREABILITY_MASK)
+#define GICR_PROPBASER_INNER_CACHEABILITY_MASK \
+   GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, MASK)
+#define GICR_PROPBASER_OUTER_CACHEABILITY_MASK \
+   GIC_BASER_CACHEABILITY(GICR_PROPBASER, OUTER, MASK)
+#define GICR_PROPBASER_CACHEABILITY_MASK GICR_PROPBASER_INNER_CACHEABILITY_MASK
+
+#define GICR_PROPBASER_INNERSHAREABLE  \
+   GIC_BASER_SHAREABILITY(GICR_PROPBASER, INNERSHAREABLE)
+
+#define GICR_PROPBASER_NCNB\
+   GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, NCNB)
+#define GICR_PROPBASER_NC  \
+   GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, NC)
+#define GICR_PROPBASER_RAWT\
+   GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, RAWT)
+#define GICR_PROPBASER_RAWB\
+   GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, RAWB)
+#define GICR_PROPBASER_WAWT\
+   GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, WAWT)
+#define GICR_PROPBASER_WAWB\
+   GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, WAWB)
+#define GICR_PROPBASER_RAWAWT  \
+   GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, RAWAWT)
+#define GICR_PROPBASER_RAWAWB  \
+   GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, RAWAWB)
+
+#define GICR_PROPBASER_IDBITS_MASK (0x1f)
+#define GICR_PROPBASER_ADDRESS(x)  ((x) & GENMASK_ULL(51, 12))
+#define GICR_PENDBASER_ADDRESS(x)  ((x) & GENMASK_ULL(51, 16))
+
+#define GICR_PENDBASER_SHAREABILITY_SHIFT  (10)
+#define GICR_PENDBASER_INNER_CACHEABILITY_SHIFT(7)
+#define GICR_PENDBASER_OUTER_CACHEABILITY_SHIFT(56)
+#define GICR_PENDBASER_SHAREABILITY_MASK   \
+   

Re: [U-Boot] [PATCH v5 20/26] dfu: add dependency on the raw NAND core

[Tom Rini]

On Thu, Oct 03, 2019 at 07:50:22PM +0200, Miquel Raynal wrote:

> CONFIG_DFU_NAND needs the raw NAND core being compiled.
> 
> Also fix the colibri_vf defconfig to reflect this dependency.
> 
> Signed-off-by: Miquel Raynal 
> Reviewed-by: Boris Brezillon 

Applied to u-boot/master, thanks!

-- 
Tom


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RE: [PATCH 2/2] drivers: net: phy: aquantia: make it less verbose

[Priyanka Jain]

>-Original Message-
>From: U-Boot  On Behalf Of Alex Marginean
>Sent: Wednesday, December 4, 2019 7:02 PM
>To: u-boot@lists.denx.de
>Cc: Joe Hershberger 
>Subject: [PATCH 2/2] drivers: net: phy: aquantia: make it less verbose
>
>The driver now unconditionally prints some information that's not universally
>useful.  Replace printf with debug.
>
>Signed-off-by: Alex Marginean 
>---
> drivers/net/phy/aquantia.c | 24 
> 1 file changed, 12 insertions(+), 12 deletions(-)
>
>diff --git a/drivers/net/phy/aquantia.c b/drivers/net/phy/aquantia.c index
>2af09907a1..aa0deb1f78 100644
>--- a/drivers/net/phy/aquantia.c
>+++ b/drivers/net/phy/aquantia.c
>@@ -409,9 +409,9 @@ int aquantia_config(struct phy_device *phydev)
>   fault = phy_read(phydev, MDIO_MMD_VEND1, GLOBAL_FAULT);
>
>   if (id != 0)
>-  printf("%s running firmware version %X.%X.%X\n",
>- phydev->dev->name, (id >> 8), id & 0xff,
>- (rstatus >> 4) & 0xf);
>+  debug("%s running firmware version %X.%X.%X\n",
>+phydev->dev->name, (id >> 8), id & 0xff,
>+(rstatus >> 4) & 0xf);
>
>   if (fault != 0)
>   printf("%s fault 0x%04x detected\n", phydev->dev->name,
>fault); @@ -492,12 +492,12 @@ int aquantia_config(struct phy_device
>*phydev)
>
>   if (usx_an) {
>   reg_val1 |=
>AQUANTIA_USX_AUTONEG_CONTROL_ENA;
>-  printf("%s: system interface USXGMII\n",
>- phydev->dev->name);
>+  debug("%s: system interface USXGMII\n",
>+phydev->dev->name);
>   } else {
>   reg_val1 &=
>~AQUANTIA_USX_AUTONEG_CONTROL_ENA;
>-  printf("%s: system interface XFI\n",
>- phydev->dev->name);
>+  debug("%s: system interface XFI\n",
>+phydev->dev->name);
>   }
>
>   phy_write(phydev, MDIO_MMD_PHYXS,
>@@ -524,11 +524,11 @@ int aquantia_config(struct phy_device *phydev)
>   val = phy_read(phydev, MDIO_MMD_VEND1,
>AQUANTIA_RESERVED_STATUS);
>   reg_val1 = phy_read(phydev, MDIO_MMD_VEND1,
>AQUANTIA_FIRMWARE_ID);
>
>-  printf("%s: %s Firmware Version %x.%x.%x\n", phydev->dev->name,
>- phydev->drv->name,
>- (reg_val1 & AQUANTIA_FIRMWARE_MAJOR_MASK) >> 8,
>- reg_val1 & AQUANTIA_FIRMWARE_MINOR_MASK,
>- (val & AQUANTIA_FIRMWARE_BUILD_MASK) >> 4);
>+  debug("%s: %s Firmware Version %x.%x.%x\n", phydev->dev->name,
>+phydev->drv->name,
>+(reg_val1 & AQUANTIA_FIRMWARE_MAJOR_MASK) >> 8,
>+reg_val1 & AQUANTIA_FIRMWARE_MINOR_MASK,
>+(val & AQUANTIA_FIRMWARE_BUILD_MASK) >> 4);
>
>   return 0;
> }
>--
>2.17.1
Reviewed-by: Priyanka Jain 

Re: [U-Boot] [PATCH v5 06/26] mtd: ensure MTD is compiled when there is a SPI NOR flash using MTD

[Tom Rini]

On Thu, Oct 03, 2019 at 07:50:08PM +0200, Miquel Raynal wrote:

> MTD must be enabled when there is a SPI NOR flash using the
> SPI_FLASH_MTD config entry.
> 
> Signed-off-by: Miquel Raynal 
> Reviewed-by: Boris Brezillon 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [PATCH v5 006/101] net: Move the checksum functions to lib/

[Bin Meng]

Hi Simon,

On Thu, Dec 5, 2019 at 12:28 PM Simon Glass  wrote:
>
> Hi Bin,
>
> On Mon, 25 Nov 2019 at 08:11, Bin Meng  wrote:
> >
> > Hi Simon,
> >
> > On Mon, Nov 25, 2019 at 12:11 PM Simon Glass  wrote:
> > >
> > > These functions are used by code outside the network support, so move them
> > > to lib/ to be more accessible.
> > >
> > > Without this, the functions are only accessible if CONFIG_NET is defined.
> >
> > I still don't understand this. net/checksum.c is built unconditionally
> > and is not controlled by CONFIG_NET.
>
> The net/ subdir is built unconditionally for U-Boot but not for SPL
> and TPL. So if we want this function without networking, we must move
> it.
>

Thanks. I guess we will need a clearer commit message :)

Regards,
Bin

RE: [PATCH 1/2] drivers: net: phy: aquantia: drop XGMII as a valid system interface proto

[Priyanka Jain]

>-Original Message-
>From: U-Boot  On Behalf Of Alex Marginean
>Sent: Wednesday, December 4, 2019 7:02 PM
>To: u-boot@lists.denx.de
>Cc: Joe Hershberger 
>Subject: [PATCH 1/2] drivers: net: phy: aquantia: drop XGMII as a valid system
>interface proto
>
>Use either USXGMII or XFI in aquantia_set_proto and drop XGMII as a valid
>protocol configuration.  The PHY doesn't support it, it's just used as an alias
>for one of the other two protocols.
>
>Signed-off-by: Florin Chiculita 
>Signed-off-by: Alex Marginean 
>---
>
>Depends on:
>https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatchw
>ork.ozlabs.org%2Fproject%2Fuboot%2Flist%2F%3Fseries%3D142879data
>=02%7C01%7Cpriyanka.jain%40nxp.com%7Ca188babb8ac44ea01a0f08d778c32
>b7a%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C637110651953798
>880sdata=09%2Fd1o844AoHOs4YdedTEK5FznY3FBHqlzBcC82EVZs%3D&
>amp;reserved=0
>
> drivers/net/phy/aquantia.c | 17 +
> 1 file changed, 9 insertions(+), 8 deletions(-)
>
>diff --git a/drivers/net/phy/aquantia.c b/drivers/net/phy/aquantia.c index
>7817d3cb8d..2af09907a1 100644
>--- a/drivers/net/phy/aquantia.c
>+++ b/drivers/net/phy/aquantia.c
>@@ -303,30 +303,29 @@ struct {
>
>AQUANTIA_VND1_GSTART_RATE_1G},
>   [PHY_INTERFACE_MODE_SGMII_2500] = {0x144,
>AQUANTIA_VND1_GSYSCFG_2_5G,
>
>AQUANTIA_VND1_GSTART_RATE_2_5G},
>-  [PHY_INTERFACE_MODE_XGMII] =  {0x100,
>AQUANTIA_VND1_GSYSCFG_10G,
>-
>AQUANTIA_VND1_GSTART_RATE_10G},
>   [PHY_INTERFACE_MODE_XFI] ={0x100,
>AQUANTIA_VND1_GSYSCFG_10G,
>
>AQUANTIA_VND1_GSTART_RATE_10G},
>   [PHY_INTERFACE_MODE_USXGMII] ={0x080,
>AQUANTIA_VND1_GSYSCFG_10G,
>
>AQUANTIA_VND1_GSTART_RATE_10G},  };
>
>-static int aquantia_set_proto(struct phy_device *phydev)
>+static int aquantia_set_proto(struct phy_device *phydev,
>+phy_interface_t interface)
> {
>   int i;
>
>-  if (!aquantia_syscfg[phydev->interface].cnt)
>+  if (!aquantia_syscfg[interface].cnt)
>   return 0;
>
>   /* set the default rate to enable the SI link */
>   phy_write(phydev, MDIO_MMD_VEND1,
>AQUANTIA_VND1_GSTART_RATE,
>-aquantia_syscfg[phydev->interface].start_rate);
>+aquantia_syscfg[interface].start_rate);
>
>   /* set selected protocol for all relevant line side link speeds */
>-  for (i = 0; i <= aquantia_syscfg[phydev->interface].cnt; i++)
>+  for (i = 0; i <= aquantia_syscfg[interface].cnt; i++)
>   phy_write(phydev, MDIO_MMD_VEND1,
> AQUANTIA_VND1_GSYSCFG_BASE + i,
>-aquantia_syscfg[phydev->interface].syscfg);
>+aquantia_syscfg[interface].syscfg);
>   return 0;
> }
>
>@@ -429,6 +428,8 @@ int aquantia_config(struct phy_device *phydev)
>* on FW config
>*/
>   if (interface == PHY_INTERFACE_MODE_XGMII) {
>+  debug("use XFI or USXGMII SI protos, XGMII is not valid\n");
>+
>   reg_val1 = phy_read(phydev, MDIO_MMD_PHYXS,
>   AQUANTIA_SYSTEM_INTERFACE_SR);
>   if ((reg_val1 & AQUANTIA_SI_IN_USE_MASK) ==
>AQUANTIA_SI_USXGMII) @@ -451,7 +452,7 @@ int aquantia_config(struct
>phy_device *phydev)
>   mdelay(10);
>
>   /* configure protocol based on phydev->interface */
>-  aquantia_set_proto(phydev);
>+  aquantia_set_proto(phydev, interface);
>   /* apply custom configuration based on DT */
>   aquantia_dts_config(phydev);
>
>--
>2.17.1
Reviewed-by: Priyanka Jain 

Re: [U-Boot] [PATCH v5 01/26] mtd: rename CONFIG_NAND -> CONFIG_MTD_RAW_NAND

[Tom Rini]

On Thu, Oct 03, 2019 at 07:50:03PM +0200, Miquel Raynal wrote:

> Add more clarity by changing the Kconfig entry name.
> 
> Signed-off-by: Miquel Raynal 
> Reviewed-by: Boris Brezillon 

After re-running the migration:
Applied to u-boot/master, thanks!

-- 
Tom


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Re: [PATCH v5 008/101] i2c: designware: Avoid using static data

[Simon Glass]

Hi Bin,

On Mon, 25 Nov 2019 at 08:14, Bin Meng  wrote:
>
> Hi Simon,
>
> On Mon, Nov 25, 2019 at 12:11 PM Simon Glass  wrote:
> >
> > Drivers are not allowed to use static data since they may be used in SPL
> > where BSS is not available.
> >
> > It is possible that driver model may provide support for numbering devices
> > in the future. But for now, move this to global_data.
>
> Can we add such functionality in driver model now? I feel a little bit
> odd to add a device number in the global data.

I suspect we could, but it is well outside the scope of this series.

I think someone is working on combining seq and req_seq and it could
perhaps be done as part of that. But any such redesign needs serious
through and effort. If we don't see movement in the next few months
then I could take a look.

This patches cleans up what is there to make it work. Hopefully we can
drop it one day.

Regards,
Simon

Re: [PATCH v5 006/101] net: Move the checksum functions to lib/

[Simon Glass]

Hi Bin,

On Mon, 25 Nov 2019 at 08:11, Bin Meng  wrote:
>
> Hi Simon,
>
> On Mon, Nov 25, 2019 at 12:11 PM Simon Glass  wrote:
> >
> > These functions are used by code outside the network support, so move them
> > to lib/ to be more accessible.
> >
> > Without this, the functions are only accessible if CONFIG_NET is defined.
>
> I still don't understand this. net/checksum.c is built unconditionally
> and is not controlled by CONFIG_NET.

The net/ subdir is built unconditionally for U-Boot but not for SPL
and TPL. So if we want this function without networking, we must move
it.


>
> > Many boards do not enable that option but still want to do checksums in
> > this format.
> >
> > Fix up a few code-style nits while we are here.
> >
> > Signed-off-by: Simon Glass 
> > ---
> >
> > Changes in v5: None
> > Changes in v4:
> > - Expand commit message to better explain the need to checksum functions
> >
> > Changes in v3: None
> > Changes in v2: None
> >
> >  lib/Makefile|  2 +-
> >  lib/net_utils.c | 48 
> >  net/Makefile|  1 -
> >  net/checksum.c  | 59 -
> >  4 files changed, 49 insertions(+), 61 deletions(-)
> >  delete mode 100644 net/checksum.c
> >
>

Regards,
Simon

Re: [U-Boot] [PATCH] binman: README: fix default filename of u-boot-with-ucode-ptr

[Simon Glass]

On Sun, 24 Nov 2019 at 18:48, Bin Meng  wrote:
>
> On Mon, Nov 25, 2019 at 9:45 AM Masahiro Yamada
>  wrote:
> >
> > The suffix should be ".bin" instead of ".dtb" .
> >
> > Signed-off-by: Masahiro Yamada 
> > ---
> >
> >  tools/binman/README.entries | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> >
>
> Reviewed-by: Bin Meng 

Reviewed-by: Simon Glass 

Re: [U-Boot] [PATCH v6 3/3] mtd: Makefile: deep cleanup

[Tom Rini]

On Fri, Oct 25, 2019 at 07:39:31PM +0200, Miquel Raynal wrote:

> Move MTD-related lines out of the root Makefile. Put them in their
> respective directories. Enclose some of these new lines to skip them
> when building the SPL. MTD core files and some MTD device drivers are
> compiled in a mtd.o object and included in the final object only if
> MTD support is required (there are two different symbols for that, one
> for U-Boot and one for the SPL).
> 
> Now that all defconfigs have been fixed, we can stop the logic where
> enabling a command selects the core files to compile. This logic is
> broken since selecting a symbol with a 'depends on' will not enforce
> this secondary dependency.
> 
> Signed-off-by: Miquel Raynal 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [U-Boot] [PATCH v6 2/3] cmd: make MTD commands depend on MTD

[Tom Rini]

On Fri, Oct 25, 2019 at 07:39:30PM +0200, Miquel Raynal wrote:

> Defconfigs have been fixed, now we can add proper dependencies in
> Kconfig. SPI FLASH is still not dependent on MTD (deeper rework needed).
> 
> Signed-off-by: Miquel Raynal 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [U-Boot] [PATCH v6 1/3] cmd: nand/sf: isolate legacy code

[Tom Rini]

On Fri, Oct 25, 2019 at 07:39:29PM +0200, Miquel Raynal wrote:

> The 'sf' command is not supposed to rely on the MTD stack, but both
> 'sf' and 'nand' commands use helpers located in mtd_uboot.c. Despite
> their location, these functions do not depend at all on the MTD
> stack.
> 
> This file (drivers/mtd/mtd_uboot.c) is only compiled if CONFIG_MTD is
> selected, which is inconsistent with the current situation. Solve this
> by moving these three functions (which are only used by the above two
> commands) out of mtd_uboot.c and put them in a C file only compiled
> with cmd/sf.c and cmd/nand.c.
> 
> Signed-off-by: Miquel Raynal 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [U-Boot] [PATCH v5 23/26] cmd: mtdparts: Kconfig: join mtdparts command entry with its options

[Tom Rini]

On Thu, Oct 03, 2019 at 07:50:25PM +0200, Miquel Raynal wrote:

> Move the Kconfig entry of the option right after the entry of the
> mtdparts command.
> 
> Signed-off-by: Miquel Raynal 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [U-Boot] [PATCH v5 19/26] mtd: nand: add includes in NAND core to avoid warnings

[Tom Rini]

On Thu, Oct 03, 2019 at 07:50:21PM +0200, Miquel Raynal wrote:

> Because of the include's game, when some files are compiled for a SPI
> NAND device, no warning appears. But when it is for a raw NAND device,
> GCC complains. Fix these warning by including .
> 
> Signed-off-by: Miquel Raynal 
> Reviewed-by: Boris Brezillon 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [U-Boot] [PATCH v5 17/26] configs: socfpga: mcvevk: Remove useless UBI infos

[Tom Rini]

On Thu, Oct 03, 2019 at 07:50:19PM +0200, Miquel Raynal wrote:

> There is no flash on this board, there is no reason to define MTD
> environment variables nor UBI. Drop them from the configuration file.
> 
> Signed-off-by: Miquel Raynal 
> Reviewed-by: Wolfgang Grandegger 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [U-Boot] [PATCH v5 21/26] mtd: nor: NOR flashes depend on MTD

[Tom Rini]

On Thu, Oct 03, 2019 at 07:50:23PM +0200, Miquel Raynal wrote:

> A NOR flash needs the MTD core, ensure this dependency is met by
> adding a "depends on" in Kconfig. This is fine since defconfigs have
> been fixed.
> 
> Signed-off-by: Miquel Raynal 

This is not correct and has been dropped (same comment as before about
mtdcore.o / mtd_uboot.o inclusion).

-- 
Tom


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Re: [U-Boot] [PATCH v5 07/26] mtd: ensure UBI is compiled when using fastmap

[Tom Rini]

On Thu, Oct 03, 2019 at 07:50:09PM +0200, Miquel Raynal wrote:

> UBI must be enabled when using fastmap, reflect this is defconfigs.
> 
> Signed-off-by: Miquel Raynal 
> Reviewed-by: Boris Brezillon 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [U-Boot] [PATCH v5 04/26] mtd: ensure MTD is compiled when there is a NOR flash

[Tom Rini]

On Thu, Oct 03, 2019 at 07:50:06PM +0200, Miquel Raynal wrote:

> CONFIG_MTD must be enabled when there is a NOR flash selected.
> 
> Signed-off-by: Miquel Raynal 
> Reviewed-by: Boris Brezillon 

This is not applied.  On deeper inspection of the overall changes, there
are a number of cases and parts of NOR access that do not require the
MTD subsystem.  At the end of the series CONFIG_MTD is not entirely and
wholly only a gating symbol but also grabs mtdcore.o / mtd_uboot.o and
so causes size growth without functional change in some boards.
Thanks!

-- 
Tom


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Re: [U-Boot] [PATCH v5 02/26] mtd: rename CONFIG_MTD -> CONFIG_DM_MTD

[Tom Rini]

On Thu, Oct 03, 2019 at 07:50:04PM +0200, Miquel Raynal wrote:

> CONFIG_MTD must be reserved for the MTD core. Like any other
> subsystem, prefix the symbol by DM when it comes to DM support.
> 
> Signed-off-by: Miquel Raynal 
> Reviewed-by: Boris Brezillon 

After re-running the migration:
Applied to u-boot/master, thanks!

-- 
Tom


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Re: [PULL] u-boot-sh/master

[Tom Rini]

On Wed, Dec 04, 2019 at 06:57:53PM +0100, Marek Vasut wrote:

> The following changes since commit 94d022bb400890f22fe35220d2519c3bce73f05e:
> 
>   Merge tag 'efi-2020-01-rc5' of
> https://gitlab.denx.de/u-boot/custodians/u-boot-efi (2019-12-03 18:12:58
> -0500)
> 
> are available in the Git repository at:
> 
>   git://git.denx.de/u-boot-sh.git master
> 
> for you to fetch changes up to 019c9b3ea842514b3b4b90f7af01c3dc278a972e:
> 
>   ARM: rmobile: Convert M2N Gose to DM_SPI{,_FLASH} (2019-12-04 18:57:05
> +0100)
> 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [U-Boot] [PATCH v5 16/26] configs: remove MTD support from bcm11130 and M54418TWR defconfigs

[Tom Rini]

On Thu, Oct 03, 2019 at 07:50:18PM +0200, Miquel Raynal wrote:

> While the right Kconfig entries were selected, because of the missing
> CMD_NAND symbol the raw NAND core was never compiled. Remove it from
> the defconfigs otherwise the build will fail.
> 
> Signed-off-by: Miquel Raynal 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [U-Boot] [PATCH v5 15/26] configs: remove raw NAND core from k2g defconfigs

[Tom Rini]

On Thu, Oct 03, 2019 at 07:50:17PM +0200, Miquel Raynal wrote:

> Due to previous Makefile organization, the raw NAND subdirectory was
> not compiled in if CMD_NAND was not enabled. Because the Denali driver
> does not compile with these boards (undefined environment offset),
> remove the dependency within the defconfig over the controller driver
> (was ignored anyway in the past).
> 
> Signed-off-by: Miquel Raynal 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [U-Boot] [PATCH v5 14/26] configs: move CONFIG_MTD in defconfigs when set in arch includes

[Tom Rini]

On Thu, Oct 03, 2019 at 07:50:16PM +0200, Miquel Raynal wrote:

> Let's be consistent and always declare CONFIG_MTD from the defconfig
> file when needed.
> 
> Signed-off-by: Miquel Raynal 
> Reviewed-by: Boris Brezillon 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [U-Boot] [PATCH v5 13/26] mtd: ensure MTD is compiled when CMD_MTDPARTS is selected

[Tom Rini]

On Thu, Oct 03, 2019 at 07:50:15PM +0200, Miquel Raynal wrote:

> MTD support must be enabled when using mtdparts. Indeed, functions
> like get_mtd_info(), get_mtd_device() and put_mtd_device() are in
> drivers/mtd/mtd_uboot.c and are built only with CONFIG_MTD.
> 
> Signed-off-by: Miquel Raynal 
> Reviewed-by: Boris Brezillon 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [U-Boot] [PATCH v5 11/26] mtd: ensure MTD_RAW_NAND is compiled when ENV_IS_IN_NAND is selected

[Tom Rini]

On Thu, Oct 03, 2019 at 07:50:13PM +0200, Miquel Raynal wrote:

> Raw NAND support must be enabled when the environment is in NAND.
> 
> Signed-off-by: Miquel Raynal 
> Reviewed-by: Boris Brezillon 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [U-Boot] [PATCH v5 09/26] mtd: ensure UBI is compiled when CMD_UBI is selected

[Tom Rini]

On Thu, Oct 03, 2019 at 07:50:11PM +0200, Miquel Raynal wrote:

> UBI must be enabled when CMD_UBI is used, this is mandatory and will
> later be reflected thanks to a "depends on" in Kconfig. But first,
> defconfigs needs to be fixed.
> 
> Signed-off-by: Miquel Raynal 
> Reviewed-by: Boris Brezillon 

This is not applied.  Upon full migration in the initial part of this
series this patch is no longer required, so is dropped.  Thanks!

-- 
Tom


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Re: [U-Boot] [PATCH v5 08/26] mtd: ensure MTD is compiled when UBI is used

[Tom Rini]

On Thu, Oct 03, 2019 at 07:50:10PM +0200, Miquel Raynal wrote:

> MTD must be enabled when UBI is used, this is mandatory and will later
> be reflected thanks to a "depends on" in Kconfig. But first,
> defconfigs need to be fixed.
> 
> Signed-off-by: Miquel Raynal 
> Reviewed-by: Boris Brezillon 

This is not applied.  Upon full migration in the initial part of this
series this patch is no longer required, so is dropped.  Thanks!

-- 
Tom


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Re: [U-Boot] [PATCH v5 05/26] mtd: ensure MTD/the raw NAND core are compiled when there is a NAND flash

[Tom Rini]

On Thu, Oct 03, 2019 at 07:50:07PM +0200, Miquel Raynal wrote:

> Both symbols must be enabled when there is a raw NAND driver
> selected. Also enable them when CONFIG_CMD_NAND is selected to avoid
> breaking things when we'll further rework the MTD dependency
> description.
> 
> Signed-off-by: Miquel Raynal 
> Reviewed-by: Boris Brezillon 

After re-running the migration but also adjusting many of the migrations
based on deeper inspection of the changes visible in u-boot.cfg before
and after the entire series:
Applied to u-boot/master, thanks!

-- 
Tom


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Re: [U-Boot] [PATCH v5 00/26]MTD defconfigs/Kconfigs/Makefiles heavy cleanup

[Tom Rini]

On Thu, Oct 03, 2019 at 07:50:02PM +0200, Miquel Raynal wrote:

> Hello,
> 
> A year ago, while working on SPI-NAND support in U-Boot, I discovered
> when modifying Makefiles a confusing organization where:
> * Sub-directories/files are compiled from the root Makefile
> * Commands are at the root of everything
> 
> First I sent a series to move Makefile entries in their respective
> directories. Then, I decided to continue working on the clarification
> of the Makefile hierarchy in MTD and I sent four iterations of this
> series which did not got merge at that time. Anyway, I revived this
> series by rebasing all my work and updating everything that needed an
> update.
> 
> Here are the main points of the re-organization:
> * Rename CONFIG_MTD into CONFIG_DM_MTD to reserve CONFIG_MTD to what
>   is called today CONFIG_MTD_DEVICE.
> * Fix build dependencies in defconfigs, like: "UBI and NAND depend on MTD".
> * Fix the Kconfig files to reflect these dependencies (as defconfigs
>   have been updated, nothing should break).
> * Simplify the Makefiles: compiling the drivers/mtd/nand/raw/
>   sub-directory should just depend on MTD being compiled and the NAND
>   core as well, there is absolutely no logic to make it depend on
>   CMD_NAND.
> 
> The New green Travis CI build for the fifth version of this series is
> there (yes, 53 iterations):
> 
> Please note that the only red test fails because of timeout, not an
> actual error (at least I could not spot it). It is possible that this
> series will produce noticeable changes for the users. The only reason
> for that is because their configuration file was wrong. I have done my
> best to fix them one by one, but I am not omniscient.
> 
> Thanks,
> Miquèl
> 
> 
> Note: as the number of Cc:'ed people reached 184 with
> get_maintainers.pl I decided to trim the list to:
> * People interested by the MTD subsystem.
> * A few maintainers: I had to tweak some defconfigs after more digging
>   than with other boards (k2g, bcm11130, M54418TWR,
>   ls104/108/208). Maintainers of these platforms are Cc:'ed.
> 
> 
> Changes since v4:
> =
> * Rebased on top of v2019.10-rc4.
> * Fixed tens of configurations that got broken since the last version
>   of this series several months ago.
> * Added a specific commit for ls104/108/208 configurations.
> 
> Changes since v3:
> =
> * As suggested by Vignesh, SPI_FLASH_MTD depends on MTD. Enforce this
>   in Kconfig with a new patch. There is no defconfig to fix, all
>   defconfigs with SPI_FLASH_MTD already use MTD.
> * s/coherent Makefile/appropriate Makefile/ in commit title of patch 1.
> * s/Kconfig/Makefile in commit message of "mtd: nand: remove
>   dependency on commands in Kconfig" and "mtd: ubi: remove dependency
>   on command in Kconfig".
> * Add Boris R-b tags.
> * Correct typos pointed by Boris.
> * Remove the if/endif in cmd/Kconfig about mtdparts, let the "depends
>   on" that was already present.
> * Use an if/endif block to compile legacy-mtd-utils.c (to avoid
>   failures when both 'sf' and 'nand' commands are compiled-in).
> * Merge all Makefile changes in one consistent commit as suggested by
>   Boris.
> 
> Changes since v2:
> =
> * Cleanup also applied to the SPL in an additional patch.
> * NOR dependency on MTD extracted from the patch adding MTD
>   dependencies on commands only to do it in a separate change.
> * Typo s/copile/compile/ in "rename CONFIG_MTD_DEVICE..." commit log.
> * No more MTD depencency on SPI_FLASH, only kept on SPI_FLASH_MTD.
> * Same applies to the sf command.
> * Avoid compiling the NAND core while it is not needed (not speaking
>   about the raw NAND core, really what is in drivers/mtd/nand:).
> * Last patch dropping CONFIG_MTD_PARTITIONS forgotten. We need them in
>   order to reduce the final binary size.
> * Additional fixes in cmd/Kconfig.
> 
> Changes since v1:
> =
> * Squashed both patches from the first series and included them in
>   "mtd: simplify Makefiles".
> * Added all other patches.
> * Renamed CONFIG_NAND into CONFIG_MTD_RAW_NAND as suggested.
> 
> 
> Miquel Raynal (26):
>   mtd: rename CONFIG_NAND -> CONFIG_MTD_RAW_NAND
>   mtd: rename CONFIG_MTD -> CONFIG_DM_MTD
>   mtd: rename CONFIG_MTD_DEVICE -> CONFIG_MTD
>   mtd: ensure MTD is compiled when there is a NOR flash
>   mtd: ensure MTD/the raw NAND core are compiled when there is a NAND
> flash
>   mtd: ensure MTD is compiled when there is a SPI NOR flash using MTD
>   mtd: ensure UBI is compiled when using fastmap
>   mtd: ensure MTD is compiled when UBI is used
>   mtd: ensure UBI is compiled when CMD_UBI is selected
>   mtd: ensure UBI is compiled when ENV_IS_IN_UBI is selected
>   mtd: ensure MTD_RAW_NAND is compiled when ENV_IS_IN_NAND is selected
>   mtd: ensure CMD_NAND is compiled when its options are selected
>   mtd: ensure MTD is compiled when CMD_MTDPARTS is selected
>   configs: move CONFIG_MTD in defconfigs when set in arch includes
>   

Re: [PATCH] Makefile: Ensure tools directory exists in output prior to use

[Bin Meng]

On Thu, Dec 5, 2019 at 7:54 AM Tom Rini  wrote:
>
> With the change to make tools/version.h a file we need to make sure that
> the output directory exists first otherwise we will get a build failure.
>
> Reported-by: Peter Robinson 
> Tested-by: Peter Robinson 
> Fixes: 4d90f6cd9813 ("tools: Avoid creating symbolic links for 
> tools/version.h")
> Signed-off-by: Tom Rini 
> ---
>  Makefile | 1 +
>  1 file changed, 1 insertion(+)
>

Reviewed-by: Bin Meng 

Re: [PATCH v2 00/16] efi_loader: add secure boot support

[Tom Rini]

On Wed, Dec 04, 2019 at 05:28:59PM +0900, AKASHI Takahiro wrote:
> On Wed, Dec 04, 2019 at 08:31:26AM +0100, Heinrich Schuchardt wrote:
> > On 12/4/19 3:43 AM, AKASHI Takahiro wrote:
> > >Tom, Simon, Heinrich,
> > >
> > >I have submitted three major patch sets for UEFI secure boot:
> > >* x509/pkcs7 parser
> > >* RSA library extension
> > >* UEFI secure boot
> > >
> > >I have no technical issues to fix now and have seen only a few minor
> > >comments on them (if I confirm that you have no more comments,
> > >I can submit new version almost immediately).
> > >Considering those, can I expect that those patches be merged
> > >in v2020.01?
> > >
> > >If not, do you need to have more time for your reviewing?
> > >What else do you expect from my side to accelerate the upstream?
> > 
> > We are reaching the end of the release cycle. So do not expect any of
> > these patch series to be merged in v2020.01.
> > cf. https://www.denx.de/wiki/U-Boot/ReleaseCycle
> 
> I have often seen several patches (not bug fix) merged
> even after "merge window".
> Anyway,

Please keep pushing back on me when you see "large" changes go in later
than probably should.  I try and hold to what I say, but I don't always
make it.

> > To my understanding the UEFI secure boot series depends on the other two
> > so it must be merged last.
> 
> So once the first two patch set are accepted by the maintainers,
> do you agree to merging the third one (i.e. secure boot patch itself)
> promptly?
> -> Heinrich
> 
> As I said, I have had no technical issues on the first two patches
> and haven't heard any comments/objections from the maintainers so far.
> Are you willing to accept them for the next release?
> -> Tom, Simon

My hope is to put some of this in to -next and see what comes out.  As I
send this I'm doing what I hope will be a last test of the MTD clean up
series, which has been what's eating all of my "try something" cycles
since the end of Oct.

-- 
Tom


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[PATCH] Makefile: Ensure tools directory exists in output prior to use

[Tom Rini]

With the change to make tools/version.h a file we need to make sure that
the output directory exists first otherwise we will get a build failure.

Reported-by: Peter Robinson 
Tested-by: Peter Robinson 
Fixes: 4d90f6cd9813 ("tools: Avoid creating symbolic links for tools/version.h")
Signed-off-by: Tom Rini 
---
 Makefile | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Makefile b/Makefile
index 0ee0c701022a..960926caad45 100644
--- a/Makefile
+++ b/Makefile
@@ -1889,6 +1889,7 @@ checkarmreloc: u-boot
fi
 
 tools/version.h: include/version.h
+   $(Q)mkdir -p $(dir $@)
$(call if_changed,copy)
 
 envtools: scripts_basic $(version_h) $(timestamp_h) tools/version.h
-- 
2.17.1

[PATCH 14/20] serial_lpuart: add clock enable if CONFIG_CLK is defined

[Giulio Benetti]

This driver assumes that lpuart clock is already enabled before probing
but using DM only lpuart won't be automatically enabled so add
clk_enable() when probing if CONFIG_CLK is defined.

Signed-off-by: Giulio Benetti 
---
 drivers/serial/serial_lpuart.c | 13 +
 1 file changed, 13 insertions(+)

diff --git a/drivers/serial/serial_lpuart.c b/drivers/serial/serial_lpuart.c
index 4b0a964d1b..52bd2baf7d 100644
--- a/drivers/serial/serial_lpuart.c
+++ b/drivers/serial/serial_lpuart.c
@@ -483,6 +483,19 @@ static int lpuart_serial_pending(struct udevice *dev, bool 
input)
 
 static int lpuart_serial_probe(struct udevice *dev)
 {
+#if CONFIG_IS_ENABLED(CLK)
+   struct clk per_clk;
+   int ret;
+
+   ret = clk_get_by_name(dev, "per", _clk);
+   if (ret) {
+   dev_err(dev, "Failed to get per clk: %d\n", ret);
+   return ret;
+   }
+
+   clk_enable(_clk);
+#endif
+
if (is_lpuart32(dev))
return _lpuart32_serial_init(dev);
else
-- 
2.20.1

Re: [PATCH] RFE: tools: fix parallel build of tools-all

[Peter Robinson]

On Wed, Dec 4, 2019 at 8:37 PM Tom Rini  wrote:
>
> On Wed, Dec 04, 2019 at 03:53:01PM +, Peter Robinson wrote:
> > > > Commit 4d90f6cd9813 breaks parallel builds in 2020.01-rc series. This
> > > > fixes the issue, reverting it also fixes it. Not sure which is the best
> > > > route.
> > > >
> > > > Signed-off-by: Peter Robinson 
> > > > ---
> > > >  Makefile | 6 +++---
> > > >  1 file changed, 3 insertions(+), 3 deletions(-)
> > > >
> > > > diff --git a/Makefile b/Makefile
> > > > index 8024baaddf..4330c2f3a4 100644
> > > > --- a/Makefile
> > > > +++ b/Makefile
> > > > @@ -1895,14 +1895,14 @@ checkarmreloc: u-boot
> > > >   false; \
> > > >   fi
> > > >
> > > > -tools/version.h: include/version.h
> > > > +version.h: include/version.h
> > > >   $(call if_changed,copy)
> > > >
> > > > -envtools: scripts_basic $(version_h) $(timestamp_h) tools/version.h
> > > > +envtools: scripts_basic $(version_h) $(timestamp_h) version.h
> > > >   $(Q)$(MAKE) $(build)=tools/env
> > > >
> > > >  tools-only: export TOOLS_ONLY=y
> > > > -tools-only: scripts_basic $(version_h) $(timestamp_h) tools/version.h
> > > > +tools-only: scripts_basic $(version_h) $(timestamp_h) version.h
> > > >   $(Q)$(MAKE) $(build)=tools
> > > >
> > > >  tools-all: export HOST_TOOLS_ALL=y
> > >
> > > It's a heck of a build machine you're throwing this at I assume.  Can
> >
> > I can reproduce it on my laptop when doing a local rpm build, the full
> > logs output on the build system is in the link below. I'm trying to
> > work out if a specific build flag causes the issue.
> >
> > https://kojipkgs.fedoraproject.org//work/tasks/467/39430467/build.log
>
> Ah, interesting.  So the tools directory doesn't exist yet, in this
> case.  I'm not sure why it does when we're building via buildman.  Can
> you try this:

That works for my local build, just trying on the build system but you
can add my tested by, thanks for the proper fix, my make fu is
limited.

Tested-by: Peter Robinson 

> diff --git a/Makefile b/Makefile
> index 0ee0c701022a..960926caad45 100644
> --- a/Makefile
> +++ b/Makefile
> @@ -1889,6 +1889,7 @@ checkarmreloc: u-boot
> fi
>
>  tools/version.h: include/version.h
> +   $(Q)mkdir -p $(dir $@)
> $(call if_changed,copy)
>
>  envtools: scripts_basic $(version_h) $(timestamp_h) tools/version.h
>
> --
> Tom

Re: [PATCH 13/20] ARM: dts: imxrt1050: add dtsi file

[Giulio Benetti]

Hello all,

On 12/4/19 6:44 PM, Giulio Benetti wrote:

Add dtsi file for i.MXRT1050.

Signed-off-by: Giulio Benetti 
---
  arch/arm/dts/imxrt1050.dtsi  | 146 +++
  include/dt-bindings/pinctrl/pins-imxrt1050.h | 993 +++
  2 files changed, 1139 insertions(+)
  create mode 100644 arch/arm/dts/imxrt1050.dtsi
  create mode 100644 include/dt-bindings/pinctrl/pins-imxrt1050.h

diff --git a/arch/arm/dts/imxrt1050.dtsi b/arch/arm/dts/imxrt1050.dtsi
new file mode 100644
index 00..4fcca098aa
--- /dev/null
+++ b/arch/arm/dts/imxrt1050.dtsi
@@ -0,0 +1,146 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+/*
+ * Copyright (C) 2019
+ * Author(s): Giulio Benetti 
+ */
+
+#include "skeleton.dtsi"
+#include "armv7-m.dtsi"
+#include 
+#include 


Here i've made a mistake, this ^ must be imxrt1050-clock.h 
and...



+#include 
+#include 
+
+/ {
+   aliases {
+   gpio0 = 
+   gpio1 = 
+   gpio2 = 
+   gpio3 = 
+   gpio4 = 
+   mmc0 = 
+   serial0 = 
+   };
+
+   clocks {
+   u-boot,dm-spl;
+
+   osc {
+   u-boot,dm-spl;
+   compatible = "fsl,imx-osc", "fixed-clock";
+   #clock-cells = <0>;
+   clock-frequency = <2400>;
+   };
+   };
+
+   soc {
+   u-boot,dm-spl;
+
+   semc: semc@402f {
+   u-boot,dm-spl;
+   compatible = "fsl,imxrt-semc";
+   reg = <0x402f 0x4000>;
+   clocks = < IMXRT_CLK_SEMC>;


this^^ must be 
IMXRT1050_CLK_SEMC and all the other occurences in this file must be 
changed from IMXRT_CLK_ to IMXRT1050_CLK_


This prevents from compiling .dts

Do I have to wait before sending a v2 patchset with this fixed?

Sorry for the noise

Best regards
--
Giulio Benetti
Benetti Engineering sas


+   pinctrl-0 = <_semc>;
+   pinctrl-names = "default";
+   status = "okay";
+   };
+
+   lpuart1: serial@40184000 {
+   compatible = "fsl,imxrt-lpuart";
+   reg = <0x40184000 0x4000>;
+   interrupts = ;
+   clocks = < IMXRT_CLK_LPUART1>;
+   clock-names = "per";
+   status = "disabled";
+   };
+
+   iomuxc: iomuxc@401f8000 {
+   compatible = "fsl,imxrt-iomuxc";
+   reg = <0x401f8000 0x4000>;
+   fsl,mux_mask = <0x7>;
+   };
+
+   clks: ccm@400fc000 {
+   u-boot,dm-spl;
+   compatible = "fsl,imxrt-ccm";
+   reg = <0x400fc000 0x4000>;
+   interrupts = ,
+;
+   #clock-cells = <1>;
+   };
+
+   usdhc1: usdhc@402c {
+   u-boot,dm-spl;
+   compatible = "fsl,imxrt-usdhc";
+   reg = <0x402c 0x1>;
+   interrupts = ;
+   clocks = < IMXRT_CLK_USDHC1>;
+   clock-names = "per";
+   bus-width = <4>;
+   fsl,tuning-start-tap = <20>;
+   fsl,tuning-step= <2>;
+   status = "disabled";
+   };
+
+   gpio1: gpio@401b8000 {
+   u-boot,dm-spl;
+   compatible = "fsl,imxrt-gpio", "fsl,imx35-gpio";
+   reg = <0x401b8000 0x4000>;
+   interrupts = ,
+;
+   gpio-controller;
+   #gpio-cells = <2>;
+   interrupt-controller;
+   #interrupt-cells = <2>;
+   };
+
+   gpio2: gpio@401bc000 {
+   u-boot,dm-spl;
+   compatible = "fsl,imxrt-gpio", "fsl,imx35-gpio";
+   reg = <0x401bc000 0x4000>;
+   interrupts = ,
+   ;
+   gpio-controller;
+   #gpio-cells = <2>;
+   interrupt-controller;
+   #interrupt-cells = <2>;
+   };
+
+   gpio3: gpio@401c {
+   u-boot,dm-spl;
+   compatible = "fsl,imxrt-gpio", "fsl,imx35-gpio";
+   reg = <0x401c 0x4000>;
+   interrupts = ,
+   ;
+   gpio-controller;
+   #gpio-cells = <2>;
+   interrupt-controller;
+  

[PATCH 17/20] mmc: fsl_esdhc: make if(CONFIG_IS_ENABLED(CLK)) an #if statement

[Giulio Benetti]

Not all architectures(i.e. i.MXRT) support mxc_get_clock() and use DM_CLK
instead. So building could result in failure due to missing
mxc_get_clock().

Make if(CONFIG_IS_ENABLED(CLK)) an #if statement.

Signed-off-by: Giulio Benetti 
---
 drivers/mmc/fsl_esdhc_imx.c | 38 ++---
 1 file changed, 19 insertions(+), 19 deletions(-)

diff --git a/drivers/mmc/fsl_esdhc_imx.c b/drivers/mmc/fsl_esdhc_imx.c
index f1afab742d..afdca9cd07 100644
--- a/drivers/mmc/fsl_esdhc_imx.c
+++ b/drivers/mmc/fsl_esdhc_imx.c
@@ -1514,27 +1514,27 @@ static int fsl_esdhc_probe(struct udevice *dev)
 
init_clk_usdhc(dev->seq);
 
-   if (CONFIG_IS_ENABLED(CLK)) {
-   /* Assigned clock already set clock */
-   ret = clk_get_by_name(dev, "per", >per_clk);
-   if (ret) {
-   printf("Failed to get per_clk\n");
-   return ret;
-   }
-   ret = clk_enable(>per_clk);
-   if (ret) {
-   printf("Failed to enable per_clk\n");
-   return ret;
-   }
+#if CONFIG_IS_ENABLED(CLK)
+   /* Assigned clock already set clock */
+   ret = clk_get_by_name(dev, "per", >per_clk);
+   if (ret) {
+   printf("Failed to get per_clk\n");
+   return ret;
+   }
+   ret = clk_enable(>per_clk);
+   if (ret) {
+   printf("Failed to enable per_clk\n");
+   return ret;
+   }
 
-   priv->sdhc_clk = clk_get_rate(>per_clk);
-   } else {
-   priv->sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK + dev->seq);
-   if (priv->sdhc_clk <= 0) {
-   dev_err(dev, "Unable to get clk for %s\n", dev->name);
-   return -EINVAL;
-   }
+   priv->sdhc_clk = clk_get_rate(>per_clk);
+#else
+   priv->sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK + dev->seq);
+   if (priv->sdhc_clk <= 0) {
+   dev_err(dev, "Unable to get clk for %s\n", dev->name);
+   return -EINVAL;
}
+#endif
 
ret = fsl_esdhc_init(priv, plat);
if (ret) {
-- 
2.20.1

[PATCH 20/20] imx: imxrt1050-evk: Add support for the NXP i.MXRT1050-EVK

[Giulio Benetti]

This commit adds board support for i.MXRT1050-EVK from NXP. This board
is an evaluation kit provided by NXP for i.MXRT105x processor family.

More information about this board can be found here:
https://www.nxp.com/design/development-boards/i.mx-evaluation-and-development-boards/i.mx-rt1050-evaluation-kit:MIMXRT1050-EVK

The initial supported/tested devices include:
- Debug serial
- SD

Signed-off-by: Giulio Benetti 
---
 arch/arm/dts/Makefile |   2 +
 arch/arm/dts/imxrt1050-evk.dts| 209 ++
 board/freescale/imxrt1050-evk/Kconfig |  22 ++
 board/freescale/imxrt1050-evk/MAINTAINERS |   6 +
 board/freescale/imxrt1050-evk/Makefile|   6 +
 board/freescale/imxrt1050-evk/README  |  31 +++
 board/freescale/imxrt1050-evk/imximage.cfg|  36 +++
 board/freescale/imxrt1050-evk/imxrt1050-evk.c |  81 +++
 configs/imxrt1050-evk_defconfig   |  74 +++
 include/configs/imxrt1050-evk.h   |  59 +
 10 files changed, 526 insertions(+)
 create mode 100644 arch/arm/dts/imxrt1050-evk.dts
 create mode 100644 board/freescale/imxrt1050-evk/Kconfig
 create mode 100644 board/freescale/imxrt1050-evk/MAINTAINERS
 create mode 100644 board/freescale/imxrt1050-evk/Makefile
 create mode 100644 board/freescale/imxrt1050-evk/README
 create mode 100644 board/freescale/imxrt1050-evk/imximage.cfg
 create mode 100644 board/freescale/imxrt1050-evk/imxrt1050-evk.c
 create mode 100644 configs/imxrt1050-evk_defconfig
 create mode 100644 include/configs/imxrt1050-evk.h

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 3dc9c4d41c..1cba8809f2 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -672,6 +672,8 @@ dtb-$(CONFIG_ARCH_IMX8M) += \
imx8mn-ddr4-evk.dtb \
imx8mq-evk.dtb
 
+dtb-$(CONFIG_ARCH_IMXRT) += imxrt1050-evk.dtb
+
 dtb-$(CONFIG_RCAR_GEN2) += \
r8a7790-lager-u-boot.dtb \
r8a7790-stout-u-boot.dtb \
diff --git a/arch/arm/dts/imxrt1050-evk.dts b/arch/arm/dts/imxrt1050-evk.dts
new file mode 100644
index 00..28ec079129
--- /dev/null
+++ b/arch/arm/dts/imxrt1050-evk.dts
@@ -0,0 +1,209 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+/*
+ * Copyright (C) 2019
+ * Author(s): Giulio Benetti 
+ */
+
+/dts-v1/;
+#include "imxrt1050.dtsi"
+#include 
+
+/ {
+   model = "NXP IMXRT1050-evk board";
+   compatible = "fsl,imxrt1050-evk", "fsl,imxrt1050";
+
+   chosen {
+   u-boot,dm-spl;
+   bootargs = "root=/dev/ram";
+   stdout-path = "serial0:115200n8";
+   };
+
+   memory {
+   reg = <0x8000 0x200>;
+   };
+};
+
+ { /* console */
+   u-boot,dm-spl;
+   pinctrl-names = "default";
+   pinctrl-0 = <_lpuart1>;
+   status = "okay";
+};
+
+ {
+   /*
+* Memory configuration from sdram datasheet IS42S16160J-6BLI
+*/
+   fsl,sdram-mux = /bits/ 8 ;
+   fsl,sdram-control = /bits/ 8 ;
+   fsl,sdram-timing = /bits/ 8 <0x2
+0x2
+0x9
+0x1
+0x5
+0x6
+
+0x20
+0x09
+0x01
+0x00
+
+0x04
+0x0A
+0x21
+0x50>;
+
+   bank1: bank@0 {
+   u-boot,dm-spl;
+   fsl,base-address = <0x8000>;
+   fsl,memory-size = ;
+   };
+};
+
+ {
+   u-boot,dm-spl;
+   pinctrl-names = "default";
+   pinctrl-0 = <_lpuart1>;
+
+   imxrt1050-evk {
+   u-boot,dm-spl;
+   pinctrl_lpuart1: lpuart1grp {
+   u-boot,dm-spl;
+   fsl,pins = <
+   MXRT1050_IOMUXC_GPIO_AD_B0_12_LPUART1_TXD
+   0xf1
+   MXRT1050_IOMUXC_GPIO_AD_B0_13_LPUART1_RXD
+   0xf1
+   >;
+   };
+
+   pinctrl_semc: semcgrp {
+   u-boot,dm-spl;
+   fsl,pins = <
+   MXRT1050_IOMUXC_GPIO_EMC_00_SEMC_DA00
+   0xf1/* SEMC_D0 */
+   MXRT1050_IOMUXC_GPIO_EMC_01_SEMC_DA01
+   0xf1/* SEMC_D1 */
+   MXRT1050_IOMUXC_GPIO_EMC_02_SEMC_DA02
+   0xf1/* SEMC_D2 */
+   MXRT1050_IOMUXC_GPIO_EMC_03_SEMC_DA03
+   0xf1/* SEMC_D3 */
+   

[PATCH 16/20] ram: add SDRAM driver for i.MXRT SoCs

[Giulio Benetti]

Add SDRAM driver for i.MXRT SoCs.

Signed-off-by: Giulio Benetti 
---
 drivers/ram/Kconfig  |   8 +
 drivers/ram/Makefile |   2 +
 drivers/ram/imxrt_sdram.c| 439 +++
 include/dt-bindings/memory/imxrt-sdram.h | 100 ++
 4 files changed, 549 insertions(+)
 create mode 100644 drivers/ram/imxrt_sdram.c
 create mode 100644 include/dt-bindings/memory/imxrt-sdram.h

diff --git a/drivers/ram/Kconfig b/drivers/ram/Kconfig
index b454ceb599..56fea7c94c 100644
--- a/drivers/ram/Kconfig
+++ b/drivers/ram/Kconfig
@@ -65,5 +65,13 @@ config K3_J721E_DDRSS
  Enabling this config adds support for the DDR memory controller
  on J721E family of SoCs.
 
+config IMXRT_SDRAM
+   bool "Enable i.MXRT SDRAM support"
+   depends on RAM
+   help
+ i.MXRT family devices support smart external memory controller(SEMC)
+ to support external memories like sdram, psram & nand.
+ This driver is for the sdram memory interface with the SEMC.
+
 source "drivers/ram/rockchip/Kconfig"
 source "drivers/ram/stm32mp1/Kconfig"
diff --git a/drivers/ram/Makefile b/drivers/ram/Makefile
index 4b77969b39..5c897410c6 100644
--- a/drivers/ram/Makefile
+++ b/drivers/ram/Makefile
@@ -15,3 +15,5 @@ obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/
 obj-$(CONFIG_K3_AM654_DDRSS) += k3-am654-ddrss.o
 obj-$(CONFIG_ARCH_MEDIATEK) += mediatek/
 obj-$(CONFIG_K3_J721E_DDRSS) += k3-j721e/
+
+obj-$(CONFIG_IMXRT_SDRAM) += imxrt_sdram.o
diff --git a/drivers/ram/imxrt_sdram.c b/drivers/ram/imxrt_sdram.c
new file mode 100644
index 00..af7400be82
--- /dev/null
+++ b/drivers/ram/imxrt_sdram.c
@@ -0,0 +1,439 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019
+ * Author(s): Giulio Benetti 
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/* SDRAM Command Code */
+#define SD_CC_ARD  0x0 /* Master Bus (AXI) command - Read */
+#define SD_CC_AWR  0x1 /* Master Bus (AXI) command - Write */
+#define SD_CC_IRD  0x8 /* IP command - Read */
+#define SD_CC_IWR  0x9 /* IP command - Write */
+#define SD_CC_IMS  0xA /* IP command - Set Mode Register */
+#define SD_CC_IACT 0xB /* IP command - ACTIVE */
+#define SD_CC_IAF  0xC /* IP command - Auto Refresh */
+#define SD_CC_ISF  0xD /* IP Command - Self Refresh */
+#define SD_CC_IPRE 0xE /* IP command - Precharge */
+#define SD_CC_IPREA0xF /* IP command - Precharge ALL */
+
+#define SEMC_MCR_MDIS  BIT(1)
+#define SEMC_MCR_DQSMD BIT(2)
+
+#define SEMC_INTR_IPCMDERR BIT(1)
+#define SEMC_INTR_IPCMDDONEBIT(0)
+
+#define SEMC_IPCMD_KEY 0xA55A
+
+struct imxrt_semc_regs {
+   /* 0x0 */
+   u32 mcr;
+   u32 iocr;
+   u32 bmcr0;
+   u32 bmcr1;
+   u32 br[9];
+
+   /* 0x34 */
+   u32 res1;
+   u32 inten;
+   u32 intr;
+   /* 0x40 */
+   u32 sdramcr0;
+   u32 sdramcr1;
+   u32 sdramcr2;
+   u32 sdramcr3;
+   /* 0x50 */
+   u32 nandcr0;
+   u32 nandcr1;
+   u32 nandcr2;
+   u32 nandcr3;
+   /* 0x60 */
+   u32 norcr0;
+   u32 norcr1;
+   u32 norcr2;
+   u32 norcr3;
+   /* 0x70 */
+   u32 sramcr0;
+   u32 sramcr1;
+   u32 sramcr2;
+   u32 sramcr3;
+   /* 0x80 */
+   u32 dbicr0;
+   u32 dbicr1;
+   u32 res2[2];
+   /* 0x90 */
+   u32 ipcr0;
+   u32 ipcr1;
+   u32 ipcr2;
+   u32 ipcmd;
+   /* 0xA0 */
+   u32 iptxdat;
+   u32 res3[3];
+   /* 0xB0 */
+   u32 iprxdat;
+   u32 res4[3];
+   /* 0xC0 */
+   u32 sts[16];
+};
+
+#define SEMC_IOCR_MUX_A8_SHIFT 0
+#define SEMC_IOCR_MUX_CSX0_SHIFT   3
+#define SEMC_IOCR_MUX_CSX1_SHIFT   6
+#define SEMC_IOCR_MUX_CSX2_SHIFT   9
+#define SEMC_IOCR_MUX_CSX3_SHIFT   12
+#define SEMC_IOCR_MUX_RDY_SHIFT15
+
+struct imxrt_sdram_mux {
+   u8 a8;
+   u8 csx0;
+   u8 csx1;
+   u8 csx2;
+   u8 csx3;
+   u8 rdy;
+};
+
+#define SEMC_SDRAMCR0_PS_SHIFT 0
+#define SEMC_SDRAMCR0_BL_SHIFT 4
+#define SEMC_SDRAMCR0_COL_SHIFT8
+#define SEMC_SDRAMCR0_CL_SHIFT 10
+
+struct imxrt_sdram_control {
+   u8 memory_width;
+   u8 burst_len;
+   u8 no_columns;
+   u8 cas_latency;
+};
+
+#define SEMC_SDRAMCR1_PRE2ACT_SHIFT0
+#define SEMC_SDRAMCR1_ACT2RW_SHIFT 4
+#define SEMC_SDRAMCR1_RFRC_SHIFT   8
+#define SEMC_SDRAMCR1_WRC_SHIFT13
+#define SEMC_SDRAMCR1_CKEOFF_SHIFT 16
+#define SEMC_SDRAMCR1_ACT2PRE_SHIFT20
+
+#define SEMC_SDRAMCR2_SRRC_SHIFT   0
+#define SEMC_SDRAMCR2_REF2REF_SHIFT8
+#define SEMC_SDRAMCR2_ACT2ACT_SHIFT16
+#define SEMC_SDRAMCR2_ITO_SHIFT24
+
+#define SEMC_SDRAMCR3_REN  BIT(0)
+#define 

[PATCH 19/20] imx: Add basic support for the NXP IMXRT10xx SoC family

[Giulio Benetti]

Add i.IMXRT family basic support.

Signed-off-by: Giulio Benetti 
---
 arch/arm/Kconfig| 10 ++
 arch/arm/Makefile   |  4 +--
 arch/arm/include/asm/arch-imxrt/clock.h | 10 ++
 arch/arm/include/asm/arch-imxrt/gpio.h  | 19 +++
 arch/arm/include/asm/arch-imxrt/imx-regs.h  | 20 
 arch/arm/include/asm/arch-imxrt/imxrt.h | 11 +++
 arch/arm/include/asm/arch-imxrt/sys_proto.h | 11 +++
 arch/arm/mach-imx/Makefile  |  3 +-
 arch/arm/mach-imx/imxrt/Kconfig | 21 +
 arch/arm/mach-imx/imxrt/Makefile|  7 +
 arch/arm/mach-imx/imxrt/soc.c   | 35 +
 11 files changed, 148 insertions(+), 3 deletions(-)
 create mode 100644 arch/arm/include/asm/arch-imxrt/clock.h
 create mode 100644 arch/arm/include/asm/arch-imxrt/gpio.h
 create mode 100644 arch/arm/include/asm/arch-imxrt/imx-regs.h
 create mode 100644 arch/arm/include/asm/arch-imxrt/imxrt.h
 create mode 100644 arch/arm/include/asm/arch-imxrt/sys_proto.h
 create mode 100644 arch/arm/mach-imx/imxrt/Kconfig
 create mode 100644 arch/arm/mach-imx/imxrt/Makefile
 create mode 100644 arch/arm/mach-imx/imxrt/soc.c

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index f96841c777..24c6a6dbbf 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -797,6 +797,14 @@ config ARCH_IMX8M
select SUPPORT_SPL
imply CMD_DM
 
+config ARCH_IMXRT
+   bool "NXP i.MXRT platform"
+   select CPU_V7M
+   select DM
+   select DM_SERIAL
+   select SUPPORT_SPL
+   imply CMD_DM
+
 config ARCH_MX23
bool "NXP i.MX23 family"
select CPU_ARM926EJS
@@ -1720,6 +1728,8 @@ source "arch/arm/mach-imx/imx8/Kconfig"
 
 source "arch/arm/mach-imx/imx8m/Kconfig"
 
+source "arch/arm/mach-imx/imxrt/Kconfig"
+
 source "arch/arm/mach-imx/mxs/Kconfig"
 
 source "arch/arm/mach-omap2/Kconfig"
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 60af7e3199..22e2815cc1 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -104,11 +104,11 @@ libs-y += arch/arm/cpu/
 libs-y += arch/arm/lib/
 
 ifeq ($(CONFIG_SPL_BUILD),y)
-ifneq (,$(CONFIG_MX23)$(CONFIG_MX28)$(CONFIG_MX35)$(filter $(SOC), mx25 mx5 
mx6 mx7 mx35 imx8m imx8))
+ifneq (,$(CONFIG_MX23)$(CONFIG_MX28)$(CONFIG_MX35)$(filter $(SOC), mx25 mx5 
mx6 mx7 mx35 imx8m imx8 imxrt))
 libs-y += arch/arm/mach-imx/
 endif
 else
-ifneq (,$(filter $(SOC), mx25 mx27 mx5 mx6 mx7 mx7ulp mx31 mx35 mxs imx8m imx8 
vf610))
+ifneq (,$(filter $(SOC), mx25 mx27 mx5 mx6 mx7 mx7ulp mx31 mx35 mxs imx8m imx8 
imxrt vf610))
 libs-y += arch/arm/mach-imx/
 endif
 endif
diff --git a/arch/arm/include/asm/arch-imxrt/clock.h 
b/arch/arm/include/asm/arch-imxrt/clock.h
new file mode 100644
index 00..7409028b9a
--- /dev/null
+++ b/arch/arm/include/asm/arch-imxrt/clock.h
@@ -0,0 +1,10 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2019
+ * Author(s): Giulio Benetti 
+ */
+
+#ifndef __ASM_ARCH_CLOCK_H
+#define __ASM_ARCH_CLOCK_H
+
+#endif /* __ASM_ARCH_CLOCK_H */
diff --git a/arch/arm/include/asm/arch-imxrt/gpio.h 
b/arch/arm/include/asm/arch-imxrt/gpio.h
new file mode 100644
index 00..da31a7438a
--- /dev/null
+++ b/arch/arm/include/asm/arch-imxrt/gpio.h
@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2019
+ * Author(s): Giulio Benetti 
+ */
+
+#ifndef __ASM_ARCH_GPIO_H__
+#define __ASM_ARCH_GPIO_H__
+
+#if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
+/* GPIO registers */
+struct gpio_regs {
+   u32 gpio_dr;/* data */
+   u32 gpio_dir;   /* direction */
+   u32 gpio_psr;   /* pad satus */
+};
+#endif
+
+#endif /* __ASM_ARCH_GPIO_H__ */
diff --git a/arch/arm/include/asm/arch-imxrt/imx-regs.h 
b/arch/arm/include/asm/arch-imxrt/imx-regs.h
new file mode 100644
index 00..d21450cfc6
--- /dev/null
+++ b/arch/arm/include/asm/arch-imxrt/imx-regs.h
@@ -0,0 +1,20 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright(C) 2019
+ * Author(s): Giulio Benetti 
+ */
+
+#ifndef __ASM_ARCH_IMX_REGS_H__
+#define __ASM_ARCH_IMX_REGS_H__
+
+#define ARCH_MXC
+
+#define ANATOP_BASE_ADDR   0x400d8000
+
+#define MXS_LCDIF_BASE 0x402b8000
+
+#if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
+#include 
+#endif
+
+#endif /* __ASM_ARCH_IMX_REGS_H__ */
diff --git a/arch/arm/include/asm/arch-imxrt/imxrt.h 
b/arch/arm/include/asm/arch-imxrt/imxrt.h
new file mode 100644
index 00..1cb2c57d31
--- /dev/null
+++ b/arch/arm/include/asm/arch-imxrt/imxrt.h
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2019
+ * Author(s): Giulio Benetti 
+ */
+
+#ifndef _ASM_ARCH_IMXRT_H
+#define _ASM_ARCH_IMXRT_H
+
+#endif /* _ASM_ARCH_IMXRT_H */
+
diff --git a/arch/arm/include/asm/arch-imxrt/sys_proto.h 
b/arch/arm/include/asm/arch-imxrt/sys_proto.h
new file mode 100644
index 00..eb878e672e
--- /dev/null
+++ 

Re: What is the difference between ARCH_XXX MACH_XXX TARGET_XXX macros

[Tom Rini]

On Wed, Dec 04, 2019 at 05:49:09PM +0800, Tim Williams wrote:

> Hello, I am trying to port u-boot to a new board,
> 
> There are several macros, how to use them properly?
> 
>  CONFIG_ARCH_XXX
>  CONFIG_MACH_XXX
>  CONFIG_TARGET_XXX
> 
> for example, my board has:
> 
>   SoC: LS2K1000
>   ISA: MIPS32r1, MIPS32r2, MIPS64r1, MIPS64r2
> Board: UselessRouter or HelloRouter, TBD
>   NIC: 4 1000Mbps NIC(No built in switcher)

Code that is generic to LS2K1000 but not your boards should use
CONFIG_SOC_xxx and everything board-specific should be
CONFIG_TARGET_xxx.  CONFIG_ARCH_xxx / CONFIG_MACH_xxx should get used
likely sparingly, but we are indeed inconsistent and could use
CONFIG_SOC_xxx in some of those cases.

-- 
Tom


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[PATCH 18/20] mmc: fsl_esdhc: add compatible for fsl, imxrt-usdhc

[Giulio Benetti]

Add compatible "fsl,imxrt-usdhc" to make mmc working on i.MXRT platforms
with CONFIG_DM_MMC=y.

Signed-off-by: Giulio Benetti 
---
 drivers/mmc/Kconfig | 2 +-
 drivers/mmc/fsl_esdhc_imx.c | 3 ++-
 2 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
index 85fd1906bd..9974b995a2 100644
--- a/drivers/mmc/Kconfig
+++ b/drivers/mmc/Kconfig
@@ -732,7 +732,7 @@ config FSL_ESDHC_IMX
 
 config FSL_USDHC
bool "Freescale/NXP i.MX uSDHC controller support"
-   depends on MX6 || MX7 ||ARCH_MX7ULP || IMX8 || IMX8M || 
TARGET_S32V234EVB
+   depends on MX6 || MX7 ||ARCH_MX7ULP || IMX8 || IMX8M || 
TARGET_S32V234EVB || ARCH_IMXRT
select FSL_ESDHC_IMX
help
  This enables the Ultra Secured Digital Host Controller enhancements
diff --git a/drivers/mmc/fsl_esdhc_imx.c b/drivers/mmc/fsl_esdhc_imx.c
index afdca9cd07..318c1a1913 100644
--- a/drivers/mmc/fsl_esdhc_imx.c
+++ b/drivers/mmc/fsl_esdhc_imx.c
@@ -78,7 +78,7 @@ struct fsl_esdhc {
uintvendorspec;
uintmmcboot;
uintvendorspec2;
-   uinttuning_ctrl;/* on i.MX6/7/8 */
+   uinttuning_ctrl;/* on i.MX6/7/8/RT */
charreserved5[44];
uinthostver;/* Host controller version register */
charreserved6[4];   /* reserved */
@@ -1651,6 +1651,7 @@ static const struct udevice_id fsl_esdhc_ids[] = {
{ .compatible = "fsl,imx8mm-usdhc", .data = (ulong)_imx8qm_data,},
{ .compatible = "fsl,imx8mn-usdhc", .data = (ulong)_imx8qm_data,},
{ .compatible = "fsl,imx8mq-usdhc", .data = (ulong)_imx8qm_data,},
+   { .compatible = "fsl,imxrt-usdhc", },
{ .compatible = "fsl,esdhc", },
{ /* sentinel */ }
 };
-- 
2.20.1

Re: [PATCH v1 3/5] colibri_imx6: add update_uboot wrapper

[Lukasz Majewski]

Hi Igor,

> From: Igor Opaniuk 
> 
> Add universal update_uboot wrapper that helps to update
> U-Boot image on internal storage.
> 
> > tftpboot ${loadaddr} ${board_name}/u-boot.img
> > run update_uboot
> > tftpboot ${loadaddr} ${board_name}/SPL
> > run update_spl  
> 
> Signed-off-by: Igor Opaniuk 
> ---
> 
>  include/configs/colibri_imx6.h | 12 
>  1 file changed, 12 insertions(+)
> 
> diff --git a/include/configs/colibri_imx6.h
> b/include/configs/colibri_imx6.h index 95b5a14b59..750463ef47 100644
> --- a/include/configs/colibri_imx6.h
> +++ b/include/configs/colibri_imx6.h
> @@ -110,6 +110,17 @@
>   "imx6dl-colibri-eval-v3.dtb fat 0 1;" \
>   "imx6dl-colibri-cam-eval-v3.dtb fat 0 1"
>  
> +#define UBOOT_UPDATE \
> + "uboot_hwpart=1\0" \
> + "uboot_blk=8a\0" \
> + "uboot_spl_blk=2\0" \
> + "set_blkcnt=setexpr blkcnt ${filesize} + 0x1ff && " \
> + "setexpr blkcnt ${blkcnt} / 0x200\0" \
> + "update_uboot=run set_blkcnt && mmc dev 0 ${uboot_hwpart} &&
> " \
> + "mmc write ${loadaddr} ${uboot_blk} ${blkcnt}\0" \
> + "update_spl=run set_blkcnt && mmc dev 0 ${uboot_hwpart} && "
> \
> + "mmc write ${loadaddr} ${uboot_spl_blk} ${blkcnt}\0"
> +

Do you see any chance to make this code common and being re-usable by
other imx6 devices?

>  #define EMMC_BOOTCMD \
>   "set_emmcargs=setenv emmcargs ip=off root=PARTUUID=${uuid} "\
>   "rw,noatime rootfstype=ext4 " \
> @@ -163,6 +174,7 @@
>   "fdt_fixup=;\0" \
>   MEM_LAYOUT_ENV_SETTINGS \
>   NFS_BOOTCMD \
> + UBOOT_UPDATE \
>   "setethupdate=if env exists ethaddr; then; else setenv
> ethaddr " \ "00:14:2d:00:00:00; fi; tftpboot ${loadaddr} " \
>   "flash_eth.img && source ${loadaddr}\0" \




Best regards,

Lukasz Majewski

--

DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lu...@denx.de


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Re: [PATCH 4/4] cmd: dtimg: Get start and size based on --id and --rev

[Sam Protsenko]

Hi,

On Fri, Nov 29, 2019 at 9:31 PM Eugeniu Rosca  wrote:
>
> Currently, it is only possible to get the ${index}'s entry of a DTB/DTBO
> image [*]. The "dtimg" command is agnostic on the "id" and "rev" fields
> and is unable to take them as input for a more fine-grained DTB/DTBO
> search/retrieval.
>
> This is a major limitation, as users would like [**] to employ the
> "id"/"rev" fields to e.g. differentiate between DTBs/DTBOs
> associated to multiple HW revisions or several platforms.
>
> Given a sample DTBO image [***], the new options work like below:
>
>  => dtimg start 0x4800 0 --id invalid
> Error: Bad value '--id=invalid'
>  => dtimg start 0x4800 0 --id 0x100
> Error: No #0 entry having id=0x100 && rev=0x0
>  => dtimg start 0x4800 0 --id 00779000
> 0x480006ac
>  => dtimg start 0x4800 1 --id 00779000
> 0x48000b46
>  => dtimg start 0x4800 2 --id 00779000
> Error: No #2 entry having id=0x779000 && rev=0x0
>  => dtimg start 0x4800 99 --id 00779000
> Error: index >= dt_entry_count (99 >= 6)
>  => dtimg start 0x4800 0
> 0x48e0
>  => dtimg start 0x4800 1
> 0x48e0
>  => dtimg start 0x4800 2
> 0x480004d0
>  => dtimg start 0x4800 3
> 0x480005be
>  => dtimg start 0x4800 4
> 0x480006ac
>  => dtimg start 0x4800 5
> 0x48000b46
>  => dtimg start 0x4800 6
> Error: index >= dt_entry_count (6 >= 6)
>  => dtimg size 0x4800 0 --id 00779000
> 0x49a
>  => dtimg size 0x4800 1 --id 00779000
> 0x248
>
> [*] https://source.android.com/devices/architecture/dto/partitions
> [**] https://patchwork.ozlabs.org/patch/958594/#2302310
> [***] Sample/dummy DTBO image:
>  => dtimg dump 0x4800
>  dt_table_header:
> magic = d7b7ab1e
>total_size = 3470
>   header_size = 32
> dt_entry_size = 32
>dt_entry_count = 6
> dt_entries_offset = 32
> page_size = 4096
>   version = 0
>  dt_table_entry[0]:
>   dt_size = 1008
> dt_offset = 224
>id = 0b779530
>   rev = 
> custom[0] = 
> custom[1] = 
> custom[2] = 
> custom[3] = 
> (FDT)size = 1008
>   (FDT)compatible = (unknown)
>  dt_table_entry[1]:
>   dt_size = 1008
> dt_offset = 224
>id = 0b779520
>   rev = 
> custom[0] = 
> custom[1] = 
> custom[2] = 
> custom[3] = 
> (FDT)size = 1008
>   (FDT)compatible = (unknown)
>  dt_table_entry[2]:
>   dt_size = 238
> dt_offset = 1232
>id = 0b779530
>   rev = 
> custom[0] = 
> custom[1] = 
> custom[2] = 
> custom[3] = 
> (FDT)size = 238
>   (FDT)compatible = (unknown)
>  dt_table_entry[3]:
>   dt_size = 238
> dt_offset = 1470
>id = 0b779520
>   rev = 
> custom[0] = 
> custom[1] = 
> custom[2] = 
> custom[3] = 
> (FDT)size = 238
>   (FDT)compatible = (unknown)
>  dt_table_entry[4]:
>   dt_size = 1178
> dt_offset = 1708
>id = 00779000
>   rev = 
> custom[0] = 
> custom[1] = 
> custom[2] = 
> custom[3] = 
> (FDT)size = 1178
>   (FDT)compatible = (unknown)
>  dt_table_entry[5]:
>   dt_size = 584
> dt_offset = 2886
>id = 00779000
>   rev = 
> custom[0] = 
> custom[1] = 
> custom[2] = 
> custom[3] = 
> (FDT)size = 584
>   (FDT)compatible = (unknown)
>
> Signed-off-by: Eugeniu Rosca 
> ---
>  cmd/dtimg.c| 81 +++---
>  common/image-android-dt.c  | 64 --
>  include/image-android-dt.h |  5 ++-

[strong opinion] Can you please split it into two patches? First to
introduce new functionality to common/image-android-dt.c, second one
to use it in dtimg. Atomicity reasons... I understand that we don't
introduce unused code, but it will be used in the same patch series,
though later (in some hypothetical scenario) we would be able to e.g.
revert cmd related changes, if someone else (see 'abootimg') already
uses API from common/image-android-dt.c. Also easier to review this
way.

>  3 files changed, 138 insertions(+), 12 deletions(-)
>
> diff --git a/cmd/dtimg.c b/cmd/dtimg.c
> index 5348a4ad46e8..10e909ce551b 100644
> --- 

Re: [U-Boot] Sharing a hardware lab

[Tom Rini]

On Fri, Nov 29, 2019 at 09:23:43PM -0700, Simon Glass wrote:

> Hi Tom,
> 
> I have been meaning to have a crack at setting up a little hardware
> lab for a while.
> 
> I made some progress recently and hooked up a rpi_3 with sdwire for
> USB/SD, ykush for power and a little computer to control it. It builds
> U-Boot, sticks it on the SD card and runs pytest.
> 
> I pushed a tree here and hopefully you can see the 'hwlab' thing at the end:
> 
> https://gitlab.denx.de/u-boot/custodians/u-boot-dm/pipelines/148
> 
> So far it is just running the 'help' test. It seems to hang with
> serial console problems if I try to do more. It is not 100% reliable
> yet. I based it on Stephen's test hooks:
> 
> https://github.com/sglass68/uboot-test-hooks
> 
> Is it possible to share this so that others can use the lab when they
> push trees? Is it as simple as adding to the .gitlab-ci.yml file as I
> have done here?
> 
> https://gitlab.denx.de/u-boot/custodians/u-boot-dm/blob/gitlab-working/.gitlab-ci.yml
> 
> I also got tbot going in a similar way, to test booting into Linux.
> Should we look at integrating that at the same time? It should be
> fairly easy to do.
> 
> I have quite a lot of random boards and in principle it should not be
> too hard to hook up some more of them, with sufficient SDwires, hubs
> and patience.

There's two parts of this.  The first part I think is that we need some
good examples of how to have one private CI job poll / monitor other
public jobs and run.  I believe some labs do this today.  This would be
helpful as at least personally I'm kicking my hardware tests manually.
This is because as best I can tell there isn't a way to include an
optional stage/portion of a CI job.

The second part is that long term, we need to most likely develop some
LAVA experience as that will get us easier access to various kernelci
labs and in turn be included in kernelci labs, when the overall SoC and
lab support being able to test firmware.

-- 
Tom


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Re: [U-Boot] amlogic a96 mini

[Tom Rini]

On Fri, Nov 29, 2019 at 12:06:33PM +0100, Belisko Marek wrote:

> Hi,
> 
> I'm trying to run mainline u-boot on amlogic a96mini device but before
> I try to flash it does anybody have an idea if it will work on
> mainline. As I have limited number of devices and I know that after
> flashing I can brick the board so would like to ask if anybody have
> experience with this device and running mainline. Thanks and BR,

I would strongly recommend making
https://github.com/superna/linux/wiki/Amlogic-HDMI-Boot-Dongle as a
back-up.  While I have before managed to interrupt a re-flash cycle such
that the DTB on-board is still there and so the binary portions of the
firmware are happy it will then load U-Boot from SD card.  I did not
play with mainline however.

-- 
Tom


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Re: [U-Boot] [PATCH] arm64: zynqmp: Point zcu216 defconfig to correct dts file

[Tom Rini]

On Mon, Nov 25, 2019 at 10:28:45AM +0100, Michal Simek wrote:

> Defconfig is pointing to incorrect DT file which needs to be fix.
> 
> Signed-off-by: Michal Simek 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [PATCH 2/2] rpi: Enable DRAM bank initialization on arm64

[Heinrich Schuchardt]

On 12/4/19 5:52 PM, matthias@kernel.org wrote:

From: Matthias Brugger 

Up to now we only update the DRAM banks when we are define
CONFIG_BCM2711. But our one binary approach uses a config that supports
BCM2837 and BCM2711. As a result we only see one gigabyte of RAM on


%s/gigabyte/gibibyte/

There are RPi 4 with 1GiB, 2GiB, 4GiB. All have more than 1 GB but only
some have more than 1GiB.


Raspberry Pi 4, although it has more RAM.


I guess this should be changed to "even if it has more RAM" as you can
also buy a RPi 4 with 1 GiB of RAM.


Fix this by calling dram_init_banksize when we are booting a U-Boot build
for arm64.

Fixes: 5694090670 ("ARM: defconfig: add unified config for RPi3 and RPi4")

Signed-off-by: Matthias Brugger 

---

  board/raspberrypi/rpi/rpi.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c
index 76f1c55b65..35fcef2b56 100644
--- a/board/raspberrypi/rpi/rpi.c
+++ b/board/raspberrypi/rpi/rpi.c
@@ -271,7 +271,7 @@ int dram_init(void)
  }

  #ifdef CONFIG_OF_BOARD
-#ifdef CONFIG_BCM2711
+#ifdef CONFIG_ARM64


The change does not relate to your commit message.

Please, explain why you enable fdtdec_decode_ram_size() on the RPi 3 in
64bit configuration and disables it on the RPi 4 in 32bit configuration.

What happens here if we have a RPi 4 with more than 1 GiB of memory and
use a 32bit U-Boot?

Best regards

Heinrich


  int dram_init_banksize(void)
  {
int ret;

Re: [PATCH] RFE: tools: fix parallel build of tools-all

[Tom Rini]

On Wed, Dec 04, 2019 at 03:53:01PM +, Peter Robinson wrote:
> > > Commit 4d90f6cd9813 breaks parallel builds in 2020.01-rc series. This
> > > fixes the issue, reverting it also fixes it. Not sure which is the best
> > > route.
> > >
> > > Signed-off-by: Peter Robinson 
> > > ---
> > >  Makefile | 6 +++---
> > >  1 file changed, 3 insertions(+), 3 deletions(-)
> > >
> > > diff --git a/Makefile b/Makefile
> > > index 8024baaddf..4330c2f3a4 100644
> > > --- a/Makefile
> > > +++ b/Makefile
> > > @@ -1895,14 +1895,14 @@ checkarmreloc: u-boot
> > >   false; \
> > >   fi
> > >
> > > -tools/version.h: include/version.h
> > > +version.h: include/version.h
> > >   $(call if_changed,copy)
> > >
> > > -envtools: scripts_basic $(version_h) $(timestamp_h) tools/version.h
> > > +envtools: scripts_basic $(version_h) $(timestamp_h) version.h
> > >   $(Q)$(MAKE) $(build)=tools/env
> > >
> > >  tools-only: export TOOLS_ONLY=y
> > > -tools-only: scripts_basic $(version_h) $(timestamp_h) tools/version.h
> > > +tools-only: scripts_basic $(version_h) $(timestamp_h) version.h
> > >   $(Q)$(MAKE) $(build)=tools
> > >
> > >  tools-all: export HOST_TOOLS_ALL=y
> >
> > It's a heck of a build machine you're throwing this at I assume.  Can
> 
> I can reproduce it on my laptop when doing a local rpm build, the full
> logs output on the build system is in the link below. I'm trying to
> work out if a specific build flag causes the issue.
> 
> https://kojipkgs.fedoraproject.org//work/tasks/467/39430467/build.log

Ah, interesting.  So the tools directory doesn't exist yet, in this
case.  I'm not sure why it does when we're building via buildman.  Can
you try this:

diff --git a/Makefile b/Makefile
index 0ee0c701022a..960926caad45 100644
--- a/Makefile
+++ b/Makefile
@@ -1889,6 +1889,7 @@ checkarmreloc: u-boot
fi
 
 tools/version.h: include/version.h
+   $(Q)mkdir -p $(dir $@)
$(call if_changed,copy)
 
 envtools: scripts_basic $(version_h) $(timestamp_h) tools/version.h

-- 
Tom


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[PATCH 12/20] pinctrl: add i.MXRT driver

[Giulio Benetti]

Add i.MXRT pinctrl driver.

Signed-off-by: Giulio Benetti 
---
 drivers/pinctrl/nxp/Kconfig | 14 ++
 drivers/pinctrl/nxp/Makefile|  1 +
 drivers/pinctrl/nxp/pinctrl-imxrt.c | 40 +
 3 files changed, 55 insertions(+)
 create mode 100644 drivers/pinctrl/nxp/pinctrl-imxrt.c

diff --git a/drivers/pinctrl/nxp/Kconfig b/drivers/pinctrl/nxp/Kconfig
index f2e67ca231..ec55351e61 100644
--- a/drivers/pinctrl/nxp/Kconfig
+++ b/drivers/pinctrl/nxp/Kconfig
@@ -99,6 +99,20 @@ config PINCTRL_MXS
  familiy, e.g. i.MX28. This feature depends on device tree
  configuration.
 
+config PINCTRL_IMXRT
+   bool "IMXRT pinctrl driver"
+   depends on ARCH_IMXRT && PINCTRL_FULL
+   select DEVRES
+   select PINCTRL_IMX
+   help
+ Say Y here to enable the imxrt pinctrl driver
+
+ This provides a simple pinctrl driver for i.MXRT SoC familiy.
+ This feature depends on device tree configuration. This driver
+ is different from the linux one, this is a simple implementation,
+ only parses the 'fsl,pins' property and configure related
+ registers.
+
 config PINCTRL_VYBRID
bool "Vybrid (vf610) pinctrl driver"
depends on ARCH_VF610 && PINCTRL_FULL
diff --git a/drivers/pinctrl/nxp/Makefile b/drivers/pinctrl/nxp/Makefile
index b86448aac9..066ca75b65 100644
--- a/drivers/pinctrl/nxp/Makefile
+++ b/drivers/pinctrl/nxp/Makefile
@@ -8,3 +8,4 @@ obj-$(CONFIG_PINCTRL_IMX8)  += pinctrl-imx8.o
 obj-$(CONFIG_PINCTRL_IMX8M)+= pinctrl-imx8m.o
 obj-$(CONFIG_PINCTRL_MXS)  += pinctrl-mxs.o
 obj-$(CONFIG_PINCTRL_VYBRID)   += pinctrl-vf610.o
+obj-$(CONFIG_PINCTRL_IMXRT)+= pinctrl-imxrt.o
diff --git a/drivers/pinctrl/nxp/pinctrl-imxrt.c 
b/drivers/pinctrl/nxp/pinctrl-imxrt.c
new file mode 100644
index 00..4a93941927
--- /dev/null
+++ b/drivers/pinctrl/nxp/pinctrl-imxrt.c
@@ -0,0 +1,40 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019
+ * Author(s): Giulio Benetti 
+ */
+
+#include 
+#include 
+#include 
+
+#include "pinctrl-imx.h"
+
+static struct imx_pinctrl_soc_info imxrt_pinctrl_soc_info = {
+   .flags = ZERO_OFFSET_VALID,
+};
+
+static int imxrt_pinctrl_probe(struct udevice *dev)
+{
+   struct imx_pinctrl_soc_info *info =
+   (struct imx_pinctrl_soc_info *)dev_get_driver_data(dev);
+
+   return imx_pinctrl_probe(dev, info);
+}
+
+static const struct udevice_id imxrt_pinctrl_match[] = {
+   { .compatible = "fsl,imxrt-iomuxc",
+ .data = (ulong)_pinctrl_soc_info },
+   { /* sentinel */ }
+};
+
+U_BOOT_DRIVER(imxrt_pinctrl) = {
+   .name = "imxrt-pinctrl",
+   .id = UCLASS_PINCTRL,
+   .of_match = of_match_ptr(imxrt_pinctrl_match),
+   .probe = imxrt_pinctrl_probe,
+   .remove = imx_pinctrl_remove,
+   .priv_auto_alloc_size = sizeof(struct imx_pinctrl_priv),
+   .ops = _pinctrl_ops,
+   .flags = DM_FLAG_PRE_RELOC,
+};
-- 
2.20.1

[PATCH 00/20] Add i.MXRT family support

[Giulio Benetti]

This patchset add support for i.MXRT family starting from i.MXRT1050 SoC.
It provides:
- i.MXRT1050 SoC entry
- i.MXRT pinctrl driver
- i.MXRT serial driver tweaking
- i.MXRT sdram controller driver
- i.MXRT usdhc driver tweaking
- i.MXRT1050-evk initial support

It uses all DM clocks all around and it loads correctly a basic Linux zImage.

Giulio Benetti (20):
  armv7m: cache: add mmu_set_region_dcache_behaviour() stub for
compatibility
  spl: fix entry_point equal to load_addr
  clk: imx: pllv3: register PLLV3 GENERIC and USB as 2 different clocks
  clk: imx: pllv3: set div_mask differently if PLLV3 is GENERIC or USB
  clk: imx: pllv3: add enable() support
  clk: imx: pllv3: add disable() support
  clk: imx: pllv3: add set_rate() support
  clk: imx: pllv3: add PLLV3_SYS support
  clk: imx: pllv3: add support for PLLV3_AV type
  clk: imx: pfd: add set_rate()
  clk: imx: add i.IMXRT1050 clk driver
  pinctrl: add i.MXRT driver
  ARM: dts: imxrt1050: add dtsi file
  serial_lpuart: add clock enable if CONFIG_CLK is defined
  serial_lpuart: add support for i.MXRT
  ram: add SDRAM driver for i.MXRT SoCs
  mmc: fsl_esdhc: make if(CONFIG_IS_ENABLED(CLK)) an #if statement
  mmc: fsl_esdhc: add compatible for fsl, imxrt-usdhc
  imx: Add basic support for the NXP IMXRT10xx SoC family
  imx: imxrt1050-evk: Add support for the NXP i.MXRT1050-EVK

 arch/arm/Kconfig  |  10 +
 arch/arm/Makefile |   4 +-
 arch/arm/cpu/armv7m/cache.c   |   6 +
 arch/arm/dts/Makefile |   2 +
 arch/arm/dts/imxrt1050-evk.dts| 209 
 arch/arm/dts/imxrt1050.dtsi   | 146 +++
 arch/arm/include/asm/arch-imxrt/clock.h   |  10 +
 arch/arm/include/asm/arch-imxrt/gpio.h|  19 +
 arch/arm/include/asm/arch-imxrt/imx-regs.h|  20 +
 arch/arm/include/asm/arch-imxrt/imxrt.h   |  11 +
 arch/arm/include/asm/arch-imxrt/sys_proto.h   |  11 +
 arch/arm/mach-imx/Makefile|   3 +-
 arch/arm/mach-imx/imxrt/Kconfig   |  21 +
 arch/arm/mach-imx/imxrt/Makefile  |   7 +
 arch/arm/mach-imx/imxrt/soc.c |  35 +
 board/freescale/imxrt1050-evk/Kconfig |  22 +
 board/freescale/imxrt1050-evk/MAINTAINERS |   6 +
 board/freescale/imxrt1050-evk/Makefile|   6 +
 board/freescale/imxrt1050-evk/README  |  31 +
 board/freescale/imxrt1050-evk/imximage.cfg|  36 +
 board/freescale/imxrt1050-evk/imxrt1050-evk.c |  81 ++
 common/spl/spl.c  |   4 +-
 configs/imxrt1050-evk_defconfig   |  74 ++
 drivers/clk/imx/Kconfig   |  16 +
 drivers/clk/imx/Makefile  |   2 +
 drivers/clk/imx/clk-imxrt1050.c   | 292 +
 drivers/clk/imx/clk-pfd.c |  22 +
 drivers/clk/imx/clk-pllv3.c   | 218 +++-
 drivers/mmc/Kconfig   |   2 +-
 drivers/mmc/fsl_esdhc_imx.c   |  41 +-
 drivers/pinctrl/nxp/Kconfig   |  14 +
 drivers/pinctrl/nxp/Makefile  |   1 +
 drivers/pinctrl/nxp/pinctrl-imxrt.c   |  40 +
 drivers/ram/Kconfig   |   8 +
 drivers/ram/Makefile  |   2 +
 drivers/ram/imxrt_sdram.c | 439 
 drivers/serial/serial_lpuart.c|  28 +-
 include/configs/imxrt1050-evk.h   |  59 ++
 include/dt-bindings/clock/imxrt1050-clock.h   |  65 ++
 include/dt-bindings/memory/imxrt-sdram.h  | 100 ++
 include/dt-bindings/pinctrl/pins-imxrt1050.h  | 993 ++
 include/fsl_lpuart.h  |   3 +-
 42 files changed, 3083 insertions(+), 36 deletions(-)
 create mode 100644 arch/arm/dts/imxrt1050-evk.dts
 create mode 100644 arch/arm/dts/imxrt1050.dtsi
 create mode 100644 arch/arm/include/asm/arch-imxrt/clock.h
 create mode 100644 arch/arm/include/asm/arch-imxrt/gpio.h
 create mode 100644 arch/arm/include/asm/arch-imxrt/imx-regs.h
 create mode 100644 arch/arm/include/asm/arch-imxrt/imxrt.h
 create mode 100644 arch/arm/include/asm/arch-imxrt/sys_proto.h
 create mode 100644 arch/arm/mach-imx/imxrt/Kconfig
 create mode 100644 arch/arm/mach-imx/imxrt/Makefile
 create mode 100644 arch/arm/mach-imx/imxrt/soc.c
 create mode 100644 board/freescale/imxrt1050-evk/Kconfig
 create mode 100644 board/freescale/imxrt1050-evk/MAINTAINERS
 create mode 100644 board/freescale/imxrt1050-evk/Makefile
 create mode 100644 board/freescale/imxrt1050-evk/README
 create mode 100644 board/freescale/imxrt1050-evk/imximage.cfg
 create mode 100644 board/freescale/imxrt1050-evk/imxrt1050-evk.c
 create mode 100644 configs/imxrt1050-evk_defconfig
 create mode 100644 drivers/clk/imx/clk-imxrt1050.c
 create mode 100644 drivers/pinctrl/nxp/pinctrl-imxrt.c
 create mode 100644 drivers/ram/imxrt_sdram.c
 create mode 100644 include/configs/imxrt1050-evk.h
 create mode 100644 

[PATCH 10/20] clk: imx: pfd: add set_rate()

[Giulio Benetti]

Implement set_rate() for pfd.

Signed-off-by: Giulio Benetti 
---
 drivers/clk/imx/clk-pfd.c | 22 ++
 1 file changed, 22 insertions(+)

diff --git a/drivers/clk/imx/clk-pfd.c b/drivers/clk/imx/clk-pfd.c
index 188b2b3b90..4ae55f5a07 100644
--- a/drivers/clk/imx/clk-pfd.c
+++ b/drivers/clk/imx/clk-pfd.c
@@ -52,8 +52,30 @@ static unsigned long clk_pfd_recalc_rate(struct clk *clk)
return tmp;
 }
 
+static unsigned long clk_pfd_set_rate(struct clk *clk, unsigned long rate)
+{
+   struct clk_pfd *pfd = to_clk_pfd(clk);
+   unsigned long parent_rate = clk_get_parent_rate(clk);
+   u64 tmp = parent_rate;
+   u8 frac;
+
+   tmp = tmp * 18 + rate / 2;
+   do_div(tmp, rate);
+   frac = tmp;
+   if (frac < 12)
+   frac = 12;
+   else if (frac > 35)
+   frac = 35;
+
+   writel(0x3f << (pfd->idx * 8), pfd->reg + CLR);
+   writel(frac << (pfd->idx * 8), pfd->reg + SET);
+
+   return 0;
+}
+
 static const struct clk_ops clk_pfd_ops = {
.get_rate   = clk_pfd_recalc_rate,
+   .set_rate   = clk_pfd_set_rate,
 };
 
 struct clk *imx_clk_pfd(const char *name, const char *parent_name,
-- 
2.20.1

Re: [U-Boot] [PATCH v2 3/8] cmd: bootimg: Add bootimg command

[Sam Protsenko]

Hi,

On Wed, Dec 4, 2019 at 8:25 PM Eugeniu Rosca  wrote:
>
> Hi again,
>
> [I would be willing to take this discussion offline, if you consider it
> too noisy for ML]
>

Agreed. Please find me on freenode IRC, nick: joeskb7. There is
#u-boot channel, or #linaro-android, whichever suits you best.

> On Wed, Oct 23, 2019 at 05:34:22PM +0300, Sam Protsenko wrote:
> > +U_BOOT_CMD(
> > + bootimg, CONFIG_SYS_MAXARGS, 0, do_bootimg,
> > + "manipulate Android Boot Image",
> > + "set_addr \n"
> > + "- set the address in RAM where boot image is located\n"
> > + "  ($loadaddr is used by default)\n"
> > + "bootimg ver \n"
> > + "- get header version\n"
> > + "bootimg get_dtbo  [size_var]\n"
> > + "- get address and size (hex) of recovery DTBO area in the 
> > image\n"
> > + "  : variable name to contain DTBO area address\n"
> > + "  [size_var]: variable name to contain DTBO area size\n"
> > + "bootimg dtb_dump\n"
> > + "- print info for all files in DTB area\n"
>
> I now see that "DTBO area" is used intermixed with "DTB area".
> I think it makes sense to use one of the two consistently and drop the
> other. Otherwise, users might think there are two distinct areas in
> the same Android image.
>

Those are, in fact, two different areas in boot.img. "DTBO area" is a
payload in boot.img where recovery dtbo file can be placed. "DTB area"
is a payload in boot.img where DTB files can be placed (either
concatenated or wrapped into DTBO image format).

> > + "bootimg dtb_load_addr \n"
> > + "- get load address (hex) of DTB\n"
>
> This is actually not something retrieved from the DTB/DTBO area, but
> from the "dtb_addr" field of the Android Image itself, as defined in
> https://android.googlesource.com/platform/system/tools/mkbootimg/+/refs/heads/master/include/bootimg/bootimg.h
>
> I think this little bit of information is essential, but not sure how to
> make it more transparent to the user, since purely based on the
> available help message, I tend to infer that there is connection between
> "DTB" in "get load address (hex) of DTB" and the "DTBO area", while
> there is no connection whatsoever.
>

Let's keep command usage length reasonable. We are bloating U-Boot
footprint too much as it is already... I think user shouldn't care
where the load address is obtained from, really. Prefer to keep it
short, as it is.

> > + "bootimg get_dtb_file   [size_var]\n"
> > + "- get address and size (hex) of DTB file in the image\n"
> > + "  : index of desired DTB file in DTB area\n"
> > + "  : variable name to contain DTB file address\n"
> > + "  [size_var]: variable name to contain DTB file size\n"
>
> Would it make more sense to use "DTB entry" instead of "DTB file"
> since this is the wording used in the Google spec/header?
>

I'd argue that "DTB file" is more clear for user, than "entry". If you
don't have a strong preference on this one, let's keep it as is.

> Another general comment regarding the current sub-commands:
>  - set_addr
>  - ver
>  - get_dtbo
>  - dtb_dump
>  - dtb_load_addr
>  - get_dtb_file
>
> I observe the following (inconsistent) pattern:
>  - _
>  - 
>  - _
>  - _
>  - __
>  - _
>
> Looking at the "fdt" command, I find its sub-commands
> somehow better partitioned and easier to digest/remember:
>
> fdt addr [-c]   []
> fdt apply 
> fdt move 
> fdt resize []
> fdt print   []
> fdt list[]
> fdt get value   
> fdt get name   
> fdt get addr   
> fdt get size   []
> fdt set  []
> fdt mknode  
> fdt rm  []
> fdt header [get  ]
>
> Its syntax seems to be:
> [options]
>
> Would it make sense to borrow this naming style/principle?
> It could translate to the following for abootimg:
>
> abootimg (current sub-command name enclosed in brackets):
>  - addr (set_addr)
>  - ver
>  - dump dtbo (dtb_dump)
>  - get dtbo (get_dtbo)
>  - get dtbe (get_dtb_file)
>  - get dtla (dtb_load_addr)
>

Makes sense. I'll think about it.

Thanks for review!

> > +);
>
> --
> Best Regards,
> Eugeniu

Re: [U-Boot] [PATCH v2 3/8] cmd: bootimg: Add bootimg command

[Sam Protsenko]

Hi,

On Tue, Dec 3, 2019 at 9:29 PM Eugeniu Rosca  wrote:
>
> Hi Sam,
> Cc: Aleksandr, Roman
>
> As expressed in the attached e-mail, to minimize the headaches extending
> the argument list of "bootimg" in future, can we please agree on below?
>
> On Wed, Oct 23, 2019 at 05:34:22PM +0300, Sam Protsenko wrote:
> > +U_BOOT_CMD(
> > + bootimg, CONFIG_SYS_MAXARGS, 0, do_bootimg,
> > + "manipulate Android Boot Image",
> > + "set_addr \n"
> > + "- set the address in RAM where boot image is located\n"
> > + "  ($loadaddr is used by default)\n"
> > + "bootimg ver \n"
>
> Can we make  optional, with the background provided in [1]?
>

Already done in v3 (will send soon).

> > + "- get header version\n"
> > + "bootimg get_dtbo  [size_var]\n"
>
> How about converting  to an optional argument too?
>

Already done in v3.

> > + "- get address and size (hex) of recovery DTBO area in the 
> > image\n"
> > + "  : variable name to contain DTBO area address\n"
> > + "  [size_var]: variable name to contain DTBO area size\n"
> > + "bootimg dtb_dump\n"
> > + "- print info for all files in DTB area\n"
> > + "bootimg dtb_load_addr \n"
>
> Same as above w.r.t. .
>

Already done in v3.

> > + "- get load address (hex) of DTB\n"
> > + "bootimg get_dtb_file   [size_var]\n"
>
> How about converting  to an optional argument too?

Already done in v3.

> How do you foresee getting a blob entry based on id= and/or
> rev=? Which of below is your favorite option?
>
>  - get_dtb_file  [--id=] [--rev=] [addr_var] [size_var]
>where: - in case  and/or  are provided,  tells the
> command to pick the N's entry in the selection filtered by
>  and 
>   - in case neither  nor  is provided, 
> behaves like in the current patch (selects a blob entry
> found at absolute index value ${index} in the image)
>
>  - get_dtb_file [|[--id=|--rev=]] [addr_var] [size_var]
>To make it clear, some example commands would be:
>- get_dtb_file 
>  => current behavior
>- get_dtb_file --id=
>  => get _first_ blob entry matching id value 
>- get_dtb_file --rev=
>  => get _first_ blob entry matching rev value 
>- get_dtb_file --id= --rev=
>  => get _first_ blob entry matching id  _and_ rev=
>- get_dtb_file  --id=
>- get_dtb_file  --rev=
>  => Wrong usage
>
>  - get_dtb_file  anything else?
>

I already came up with next usage:

abootimg get_dtb_file index  [addr_var] [size_var]

It's already done in v3. Once your patch series is merged, I will add
next two sub-commands:

abootimg get_dtb_file id [addr_var] [size_var]
abootimg get_dtb_file rev[addr_var] [size_var]

This way it's extensible. Also please see my review for your patches,
esp. for patch 4/4, where I discuss similar matter in context of
'dtimg' command.

> I think it is crucial to agree on the above, since the very first
> revision of "bootimg"/"abootimg" may impose strict limitations on how
> the command can be extended in future.
>

All those are addressed in v3 now. Along with renaming: 'bootimg' -> 'abootimg'.

The only thing remains to be addressed is Kconfig/Makefile decisions
you mentioned. Will look into that tomorrow, and either make it as you
pointed out or explain why it's good as it is.

> [just noticed your reply shedding more light on a subset of these
> questions, but still sending this out; please skip if already answered]
>
> > + "- get address and size (hex) of DTB file in the image\n"
> > + "  : index of desired DTB file in DTB area\n"
> > + "  : variable name to contain DTB file address\n"
> > + "  [size_var]: variable name to contain DTB file size\n"
> > +);
>
> [1] https://patchwork.ozlabs.org/patch/1202579/
> ("cmd: dtimg: Make  an optional argument")
>
> --
> Best Regards,
> Eugeniu

Re: [U-Boot] [PATCH v2 3/8] cmd: bootimg: Add bootimg command

[Sam Protsenko]

Hi,

On Wed, Dec 4, 2019 at 7:33 PM Eugeniu Rosca  wrote:
>
> Hello Sam,
> Please, see one more suggestion below.
>
> On Tue, Dec 03, 2019 at 08:29:10PM +0100, Eugeniu Rosca wrote:
> > Hi Sam,
> > Cc: Aleksandr, Roman
> >
> > As expressed in the attached e-mail, to minimize the headaches extending
> > the argument list of "bootimg" in future, can we please agree on below?
> >
> > On Wed, Oct 23, 2019 at 05:34:22PM +0300, Sam Protsenko wrote:
> > > +U_BOOT_CMD(
> > > +   bootimg, CONFIG_SYS_MAXARGS, 0, do_bootimg,
> > > +   "manipulate Android Boot Image",
> > > +   "set_addr \n"
> > > +   "- set the address in RAM where boot image is located\n"
> > > +   "  ($loadaddr is used by default)\n"
> > > +   "bootimg ver \n"
> >
> > Can we make  optional, with the background provided in [1]?
> >
> > > +   "- get header version\n"
> > > +   "bootimg get_dtbo  [size_var]\n"
> >
> > How about converting  to an optional argument too?
> >
> > > +   "- get address and size (hex) of recovery DTBO area in the 
> > > image\n"
> > > +   "  : variable name to contain DTBO area address\n"
> > > +   "  [size_var]: variable name to contain DTBO area size\n"
> > > +   "bootimg dtb_dump\n"
> > > +   "- print info for all files in DTB area\n"
> > > +   "bootimg dtb_load_addr \n"
> >
> > Same as above w.r.t. .
> >
> > > +   "- get load address (hex) of DTB\n"
> > > +   "bootimg get_dtb_file   [size_var]\n"
>
> How about "get_dte" or "get_dtbe" instead of "get_dtb_file" ?
> It's shorter and should be easier to remember (dt{b}e = DT{B} Entry).
>

Sorry, I like get_dtb more. It's .dtb file in the end, and it's called
exactly "dtb" in boot.img struct. So this is a keeper :)

> --
> Best Regards,
> Eugeniu

[PATCH v3 6/6] configs: j721e_evm_a72_defconfig: Enable DMA and Ethernet

[Vignesh Raghavendra]

Enable configs related to DMA and Ethernet so as to support networking at
U-Boot prompt

Signed-off-by: Vignesh Raghavendra 
Acked-by: Joe Hershberger 
Reviewed-by: Grygorii Strashko 
---
 configs/j721e_evm_a72_defconfig | 8 
 1 file changed, 8 insertions(+)

diff --git a/configs/j721e_evm_a72_defconfig b/configs/j721e_evm_a72_defconfig
index 2112ce813be9..a73de0857734 100644
--- a/configs/j721e_evm_a72_defconfig
+++ b/configs/j721e_evm_a72_defconfig
@@ -51,6 +51,7 @@ CONFIG_DEFAULT_DEVICE_TREE="k3-j721e-common-proc-board"
 CONFIG_SPL_MULTI_DTB_FIT=y
 CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM=y
 CONFIG_SPL_DM=y
 CONFIG_SPL_DM_SEQ_ALIAS=y
@@ -61,6 +62,8 @@ CONFIG_SPL_OF_TRANSLATE=y
 CONFIG_CLK=y
 CONFIG_SPL_CLK=y
 CONFIG_CLK_TI_SCI=y
+CONFIG_DMA_CHANNELS=y
+CONFIG_TI_K3_NAVSS_UDMA=y
 CONFIG_TI_SCI_PROTOCOL=y
 CONFIG_DM_MAILBOX=y
 CONFIG_K3_SEC_PROXY=y
@@ -79,6 +82,10 @@ CONFIG_SYS_FLASH_CFI=y
 CONFIG_HBMC_AM654=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHY_TI=y
+CONFIG_PHY_FIXED=y
+CONFIG_DM_ETH=y
+CONFIG_TI_AM65_CPSW_NUSS=y
 CONFIG_PINCTRL=y
 # CONFIG_PINCTRL_GENERIC is not set
 CONFIG_SPL_PINCTRL=y
@@ -93,6 +100,7 @@ CONFIG_RESET_TI_SCI=y
 CONFIG_SCSI=y
 CONFIG_DM_SCSI=y
 CONFIG_DM_SERIAL=y
+CONFIG_SOC_TI=y
 CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_CADENCE_QSPI=y
-- 
2.24.0

[PATCH 13/20] ARM: dts: imxrt1050: add dtsi file

[Giulio Benetti]

Add dtsi file for i.MXRT1050.

Signed-off-by: Giulio Benetti 
---
 arch/arm/dts/imxrt1050.dtsi  | 146 +++
 include/dt-bindings/pinctrl/pins-imxrt1050.h | 993 +++
 2 files changed, 1139 insertions(+)
 create mode 100644 arch/arm/dts/imxrt1050.dtsi
 create mode 100644 include/dt-bindings/pinctrl/pins-imxrt1050.h

diff --git a/arch/arm/dts/imxrt1050.dtsi b/arch/arm/dts/imxrt1050.dtsi
new file mode 100644
index 00..4fcca098aa
--- /dev/null
+++ b/arch/arm/dts/imxrt1050.dtsi
@@ -0,0 +1,146 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+/*
+ * Copyright (C) 2019
+ * Author(s): Giulio Benetti 
+ */
+
+#include "skeleton.dtsi"
+#include "armv7-m.dtsi"
+#include 
+#include 
+#include 
+#include 
+
+/ {
+   aliases {
+   gpio0 = 
+   gpio1 = 
+   gpio2 = 
+   gpio3 = 
+   gpio4 = 
+   mmc0 = 
+   serial0 = 
+   };
+
+   clocks {
+   u-boot,dm-spl;
+
+   osc {
+   u-boot,dm-spl;
+   compatible = "fsl,imx-osc", "fixed-clock";
+   #clock-cells = <0>;
+   clock-frequency = <2400>;
+   };
+   };
+
+   soc {
+   u-boot,dm-spl;
+
+   semc: semc@402f {
+   u-boot,dm-spl;
+   compatible = "fsl,imxrt-semc";
+   reg = <0x402f 0x4000>;
+   clocks = < IMXRT_CLK_SEMC>;
+   pinctrl-0 = <_semc>;
+   pinctrl-names = "default";
+   status = "okay";
+   };
+
+   lpuart1: serial@40184000 {
+   compatible = "fsl,imxrt-lpuart";
+   reg = <0x40184000 0x4000>;
+   interrupts = ;
+   clocks = < IMXRT_CLK_LPUART1>;
+   clock-names = "per";
+   status = "disabled";
+   };
+
+   iomuxc: iomuxc@401f8000 {
+   compatible = "fsl,imxrt-iomuxc";
+   reg = <0x401f8000 0x4000>;
+   fsl,mux_mask = <0x7>;
+   };
+
+   clks: ccm@400fc000 {
+   u-boot,dm-spl;
+   compatible = "fsl,imxrt-ccm";
+   reg = <0x400fc000 0x4000>;
+   interrupts = ,
+;
+   #clock-cells = <1>;
+   };
+
+   usdhc1: usdhc@402c {
+   u-boot,dm-spl;
+   compatible = "fsl,imxrt-usdhc";
+   reg = <0x402c 0x1>;
+   interrupts = ;
+   clocks = < IMXRT_CLK_USDHC1>;
+   clock-names = "per";
+   bus-width = <4>;
+   fsl,tuning-start-tap = <20>;
+   fsl,tuning-step= <2>;
+   status = "disabled";
+   };
+
+   gpio1: gpio@401b8000 {
+   u-boot,dm-spl;
+   compatible = "fsl,imxrt-gpio", "fsl,imx35-gpio";
+   reg = <0x401b8000 0x4000>;
+   interrupts = ,
+;
+   gpio-controller;
+   #gpio-cells = <2>;
+   interrupt-controller;
+   #interrupt-cells = <2>;
+   };
+
+   gpio2: gpio@401bc000 {
+   u-boot,dm-spl;
+   compatible = "fsl,imxrt-gpio", "fsl,imx35-gpio";
+   reg = <0x401bc000 0x4000>;
+   interrupts = ,
+   ;
+   gpio-controller;
+   #gpio-cells = <2>;
+   interrupt-controller;
+   #interrupt-cells = <2>;
+   };
+
+   gpio3: gpio@401c {
+   u-boot,dm-spl;
+   compatible = "fsl,imxrt-gpio", "fsl,imx35-gpio";
+   reg = <0x401c 0x4000>;
+   interrupts = ,
+   ;
+   gpio-controller;
+   #gpio-cells = <2>;
+   interrupt-controller;
+   #interrupt-cells = <2>;
+   };
+
+   gpio4: gpio@401c4000 {
+   u-boot,dm-spl;
+   compatible = "fsl,imxrt-gpio", "fsl,imx35-gpio";
+   reg = <0x401c4000 0x4000>;
+   interrupts = ,
+   ;
+   gpio-controller;
+   #gpio-cells = <2>;
+   interrupt-controller;
+   

Re: [PATCH 3/4] cmd: dtimg: Make an optional argument

[Sam Protsenko]

Hi,

On Fri, Nov 29, 2019 at 9:30 PM Eugeniu Rosca  wrote:
>
> Unlike dtimg, U-Boot commands like part [1], fstype [2] and uuid [3]
> accept an _optional_  parameter, which means that they will
> output the result to console whenever  is skipped. This is
> extremely useful during development.
>
> Allow "dtimg" to behave in a similar fashion [4]. In addition:
>  - replace env_set() by env_set_hex()

Thanks, didn't know that existed. I like it.

>  - track and report the failures of env_set_hex()

"grep -Ir env_set cmd/" shows nobody really cares to check env_set*
error codes. Probably it's very unlikely that environment is broken at
the point of commands execution?

>  - amend command's help/usage text
>
> [1] => part start mmc 0 1
> 800
> => part start mmc 0 1 myvar; print myvar
> myvar=800
> [2] => fstype mmc 0:1
> ext4
> => fstype mmc 0:1 myvar; print myvar
> myvar=ext4
> [3] => uuid
> b3909b50-55df-4173-b83c-b05343d2d5d2
> => uuid myvar; print myvar
> myvar=4c04b15f-d0c1-4f98-9aca-ab62a66be864
> [4] => dtimg start 0x4800 0
> 0x48e0
> => dtimg start 0x4800 0 myvar; print myvar
> myvar=48e0
>
> Signed-off-by: Eugeniu Rosca 
> ---
>  cmd/dtimg.c | 22 +++---
>  1 file changed, 15 insertions(+), 7 deletions(-)
>
> diff --git a/cmd/dtimg.c b/cmd/dtimg.c
> index 5989081b0c14..5348a4ad46e8 100644
> --- a/cmd/dtimg.c
> +++ b/cmd/dtimg.c
> @@ -55,9 +55,10 @@ static int dtimg_get_fdt(int argc, char * const argv[], 
> enum cmd_dtimg_info cmd)
> char *endp;
> ulong fdt_addr;
> u32 fdt_size;
> -   char buf[65];
> +   ulong envval;
> +   int ret;
>
> -   if (argc != 4)
> +   if (argc < 3)
> return CMD_RET_USAGE;
>
> if (dtimg_get_argv_addr(argv[1], _addr) != CMD_RET_SUCCESS)
> @@ -74,17 +75,24 @@ static int dtimg_get_fdt(int argc, char * const argv[], 
> enum cmd_dtimg_info cmd)
>
> switch (cmd) {
> case CMD_DTIMG_START:
> -   snprintf(buf, sizeof(buf), "%lx", fdt_addr);
> +   envval = fdt_addr;
> break;
> case CMD_DTIMG_SIZE:
> -   snprintf(buf, sizeof(buf), "%x", fdt_size);
> +   envval = fdt_size;
> break;
> default:
> printf("Error: Unknown cmd_dtimg_info value: %d\n", cmd);
> return CMD_RET_FAILURE;
> }
>
> -   env_set(argv[3], buf);
> +   if (argv[3]) {
> +   ret = env_set_hex(argv[3], envval);
> +   if (ret)
> +   printf("Error(%d) env-setting '%s=0x%lx'\n",
> +  ret, argv[3], envval);
> +   } else {
> +   printf("0x%lx\n", envval);
> +   }
>
> return CMD_RET_SUCCESS;
>  }
> @@ -131,12 +139,12 @@ U_BOOT_CMD(
> "dump \n"
> "- parse specified image and print its structure info\n"
> "  : image address in RAM, in hex\n"
> -   "dtimg start   \n"
> +   "dtimg start   []\n"

Bikeshedding: maybe use just [varname]?

> "- get address (hex) of FDT in the image, by index\n"
> "  : image address in RAM, in hex\n"
> "  : index of desired FDT in the image\n"
> "  : name of variable where to store address of FDT\n"
> -   "dtimg size   \n"
> +   "dtimg size   []\n"
> "- get size (hex, bytes) of FDT in the image, by index\n"
> "  : image address in RAM, in hex\n"
> "  : index of desired FDT in the image\n"
> --
> 2.24.0
>

Other than those minor comments:

Reviewed-by: Sam Protsenko 

[PATCH 09/20] clk: imx: pllv3: add support for PLLV3_AV type

[Giulio Benetti]

Add support for PLLV3 AV type.

Signed-off-by: Giulio Benetti 
---
 drivers/clk/imx/clk-pllv3.c | 76 +
 1 file changed, 76 insertions(+)

diff --git a/drivers/clk/imx/clk-pllv3.c b/drivers/clk/imx/clk-pllv3.c
index d5087a104e..fc16416d5f 100644
--- a/drivers/clk/imx/clk-pllv3.c
+++ b/drivers/clk/imx/clk-pllv3.c
@@ -6,6 +6,7 @@
 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -16,6 +17,10 @@
 #define UBOOT_DM_CLK_IMX_PLLV3_GENERIC "imx_clk_pllv3_generic"
 #define UBOOT_DM_CLK_IMX_PLLV3_SYS "imx_clk_pllv3_sys"
 #define UBOOT_DM_CLK_IMX_PLLV3_USB "imx_clk_pllv3_usb"
+#define UBOOT_DM_CLK_IMX_PLLV3_AV  "imx_clk_pllv3_av"
+
+#define PLL_NUM_OFFSET 0x10
+#define PLL_DENOM_OFFSET   0x20
 
 #define BM_PLL_POWER   (0x1 << 12)
 #define BM_PLL_LOCK(0x1 << 31)
@@ -143,6 +148,65 @@ static const struct clk_ops clk_pllv3_sys_ops = {
.set_rate   = clk_pllv3_sys_set_rate,
 };
 
+static ulong clk_pllv3_av_get_rate(struct clk *clk)
+{
+   struct clk_pllv3 *pll = to_clk_pllv3(clk);
+   unsigned long parent_rate = clk_get_parent_rate(clk);
+   u32 mfn = readl(pll->base + PLL_NUM_OFFSET);
+   u32 mfd = readl(pll->base + PLL_DENOM_OFFSET);
+   u32 div = readl(pll->base) & pll->div_mask;
+   u64 temp64 = (u64)parent_rate;
+
+   temp64 *= mfn;
+   do_div(temp64, mfd);
+
+   return parent_rate * div + (unsigned long)temp64;
+}
+
+static ulong clk_pllv3_av_set_rate(struct clk *clk, ulong rate)
+{
+   struct clk_pllv3 *pll = to_clk_pllv3(clk);
+   unsigned long parent_rate = clk_get_parent_rate(clk);
+   unsigned long min_rate = parent_rate * 27;
+   unsigned long max_rate = parent_rate * 54;
+   u32 val, div;
+   u32 mfn, mfd = 100;
+   u32 max_mfd = 0x3FFF;
+   u64 temp64;
+
+   if (rate < min_rate || rate > max_rate)
+   return -EINVAL;
+
+   if (parent_rate <= max_mfd)
+   mfd = parent_rate;
+
+   div = rate / parent_rate;
+   temp64 = (u64)(rate - div * parent_rate);
+   temp64 *= mfd;
+   do_div(temp64, parent_rate);
+   mfn = temp64;
+
+   val = readl(pll->base);
+   val &= ~pll->div_mask;
+   val |= div;
+   writel(val, pll->base);
+   writel(mfn, pll->base + PLL_NUM_OFFSET);
+   writel(mfd, pll->base + PLL_DENOM_OFFSET);
+
+   /* Wait for PLL to lock */
+   while (!(readl(pll->base) & BM_PLL_LOCK))
+   ;
+
+   return 0;
+}
+
+static const struct clk_ops clk_pllv3_av_ops = {
+   .enable = clk_pllv3_generic_enable,
+   .disable= clk_pllv3_generic_disable,
+   .get_rate   = clk_pllv3_av_get_rate,
+   .set_rate   = clk_pllv3_av_set_rate,
+};
+
 struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name,
  const char *parent_name, void __iomem *base,
  u32 div_mask)
@@ -174,6 +238,11 @@ struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const 
char *name,
pll->div_shift = 1;
pll->powerup_set = true;
break;
+   case IMX_PLLV3_AV:
+   drv_name = UBOOT_DM_CLK_IMX_PLLV3_AV;
+   pll->div_shift = 0;
+   pll->powerup_set = false;
+   break;
default:
kfree(pll);
return ERR_PTR(-ENOTSUPP);
@@ -212,3 +281,10 @@ U_BOOT_DRIVER(clk_pllv3_usb) = {
.ops= _pllv3_generic_ops,
.flags = DM_FLAG_PRE_RELOC,
 };
+
+U_BOOT_DRIVER(clk_pllv3_av) = {
+   .name   = UBOOT_DM_CLK_IMX_PLLV3_AV,
+   .id = UCLASS_CLK,
+   .ops= _pllv3_av_ops,
+   .flags = DM_FLAG_PRE_RELOC,
+};
-- 
2.20.1

Re: [U-Boot] [PATCH v2 3/8] cmd: bootimg: Add bootimg command

[Eugeniu Rosca]

Hi again,

[I would be willing to take this discussion offline, if you consider it
too noisy for ML]

On Wed, Oct 23, 2019 at 05:34:22PM +0300, Sam Protsenko wrote:
> +U_BOOT_CMD(
> + bootimg, CONFIG_SYS_MAXARGS, 0, do_bootimg,
> + "manipulate Android Boot Image",
> + "set_addr \n"
> + "- set the address in RAM where boot image is located\n"
> + "  ($loadaddr is used by default)\n"
> + "bootimg ver \n"
> + "- get header version\n"
> + "bootimg get_dtbo  [size_var]\n"
> + "- get address and size (hex) of recovery DTBO area in the image\n"
> + "  : variable name to contain DTBO area address\n"
> + "  [size_var]: variable name to contain DTBO area size\n"
> + "bootimg dtb_dump\n"
> + "- print info for all files in DTB area\n"

I now see that "DTBO area" is used intermixed with "DTB area".
I think it makes sense to use one of the two consistently and drop the
other. Otherwise, users might think there are two distinct areas in
the same Android image.

> + "bootimg dtb_load_addr \n"
> + "- get load address (hex) of DTB\n"

This is actually not something retrieved from the DTB/DTBO area, but
from the "dtb_addr" field of the Android Image itself, as defined in
https://android.googlesource.com/platform/system/tools/mkbootimg/+/refs/heads/master/include/bootimg/bootimg.h

I think this little bit of information is essential, but not sure how to
make it more transparent to the user, since purely based on the
available help message, I tend to infer that there is connection between
"DTB" in "get load address (hex) of DTB" and the "DTBO area", while
there is no connection whatsoever.

> + "bootimg get_dtb_file   [size_var]\n"
> + "- get address and size (hex) of DTB file in the image\n"
> + "  : index of desired DTB file in DTB area\n"
> + "  : variable name to contain DTB file address\n"
> + "  [size_var]: variable name to contain DTB file size\n"

Would it make more sense to use "DTB entry" instead of "DTB file"
since this is the wording used in the Google spec/header?

Another general comment regarding the current sub-commands:
 - set_addr
 - ver
 - get_dtbo
 - dtb_dump
 - dtb_load_addr
 - get_dtb_file

I observe the following (inconsistent) pattern:
 - _
 - 
 - _
 - _
 - __
 - _

Looking at the "fdt" command, I find its sub-commands
somehow better partitioned and easier to digest/remember:

fdt addr [-c]   []
fdt apply 
fdt move 
fdt resize []
fdt print   []
fdt list[]
fdt get value   
fdt get name   
fdt get addr   
fdt get size   []
fdt set  []
fdt mknode  
fdt rm  []
fdt header [get  ]

Its syntax seems to be:
[options]

Would it make sense to borrow this naming style/principle?
It could translate to the following for abootimg:

abootimg (current sub-command name enclosed in brackets):
 - addr (set_addr)
 - ver
 - dump dtbo (dtb_dump)
 - get dtbo (get_dtbo)
 - get dtbe (get_dtb_file)
 - get dtla (dtb_load_addr)

> +);

-- 
Best Regards,
Eugeniu

[PATCH v3 0/6] J721e: Add networking support

[Vignesh Raghavendra]

This patch enables networking support for TI's J721e SoC.
Patch 1 adds a new interface to DMA uclass to get channel specific
private/configuration data. Patch 2 to 4 use this interface to pass data
from J721e's UDMA driver to CPSW ethernet driver. Last two patches add
DMA and CPSW DT nodes and configs.

Depends on [1] for ethernet to work

[1] https://patchwork.ozlabs.org/project/uboot/list/?series=146508

v3:
Add a debug print to print flow ID

v2:
Address comments from Grygorii.
Collect Acks

Vignesh Raghavendra (6):
  dma: Introduce dma_get_cfg() interface
  dma: ti: k3-udma: Implement dma_get_cfg() interface
  net: ti: am65-cpsw-nuss: Rework RX flow ID handling
  net: ti: am65-cpsw-nuss: Add new compatible for J721e
  arm: dts: k3-j721e-common-proc-board: Add DMA and CPSW related DT
nodes
  configs: j721e_evm_a72_defconfig: Enable DMA and Ethernet

 .../k3-j721e-common-proc-board-u-boot.dtsi| 238 ++
 configs/j721e_evm_a72_defconfig   |   8 +
 drivers/dma/dma-uclass.c  |  12 +
 drivers/dma/ti/k3-udma.c  |  30 ++-
 drivers/net/ti/am65-cpsw-nuss.c   |  16 +-
 include/dma-uclass.h  |  11 +
 include/dma.h |  11 +
 include/linux/soc/ti/ti-udma.h|  19 ++
 8 files changed, 335 insertions(+), 10 deletions(-)

-- 
2.24.0

[PATCH 02/20] spl: fix entry_point equal to load_addr

[Giulio Benetti]

At the moment entry_point is set to image_get_load(header) that sets it
to "load address" instead of "entry point", assuming entry_point is
equal to load_addr, but it's not true. Then load_addr is set to
"entry_point - header_size", but this is wrong too since load_addr is
not an entry point.

So use image_get_ep() for entry_point assignment and image_get_load()
for load_addr assignment.

Signed-off-by: Giulio Benetti 
---
 common/spl/spl.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/common/spl/spl.c b/common/spl/spl.c
index d51dbe9942..24da164b43 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -264,9 +264,9 @@ int spl_parse_image_header(struct spl_image_info *spl_image,
spl_image->entry_point = image_get_ep(header);
spl_image->size = image_get_data_size(header);
} else {
-   spl_image->entry_point = image_get_load(header);
+   spl_image->entry_point = image_get_ep(header);
/* Load including the header */
-   spl_image->load_addr = spl_image->entry_point -
+   spl_image->load_addr = image_get_load(header) -
header_size;
spl_image->size = image_get_data_size(header) +
header_size;
-- 
2.20.1

[PATCH 07/20] clk: imx: pllv3: add set_rate() support

[Giulio Benetti]

Add generic set_rate() support.

Signed-off-by: Giulio Benetti 
---
 drivers/clk/imx/clk-pllv3.c | 27 +++
 1 file changed, 27 insertions(+)

diff --git a/drivers/clk/imx/clk-pllv3.c b/drivers/clk/imx/clk-pllv3.c
index 9b37cd9cd9..a721dbee94 100644
--- a/drivers/clk/imx/clk-pllv3.c
+++ b/drivers/clk/imx/clk-pllv3.c
@@ -17,6 +17,7 @@
 #define UBOOT_DM_CLK_IMX_PLLV3_USB "imx_clk_pllv3_usb"
 
 #define BM_PLL_POWER   (0x1 << 12)
+#define BM_PLL_LOCK(0x1 << 31)
 
 struct clk_pllv3 {
struct clk  clk;
@@ -39,6 +40,31 @@ static ulong clk_pllv3_generic_get_rate(struct clk *clk)
return (div == 1) ? parent_rate * 22 : parent_rate * 20;
 }
 
+static ulong clk_pllv3_generic_set_rate(struct clk *clk, ulong rate)
+{
+   struct clk_pllv3 *pll = to_clk_pllv3(clk);
+   unsigned long parent_rate = clk_get_parent_rate(clk);
+   u32 val, div;
+
+   if (rate == parent_rate * 22)
+   div = 1;
+   else if (rate == parent_rate * 20)
+   div = 0;
+   else
+   return -EINVAL;
+
+   val = readl(pll->base);
+   val &= ~(pll->div_mask << pll->div_shift);
+   val |= (div << pll->div_shift);
+   writel(val, pll->base);
+
+   /* Wait for PLL to lock */
+   while (!(readl(pll->base) & BM_PLL_LOCK))
+   ;
+
+   return 0;
+}
+
 static int clk_pllv3_generic_enable(struct clk *clk)
 {
struct clk_pllv3 *pll = to_clk_pllv3(clk);
@@ -73,6 +99,7 @@ static const struct clk_ops clk_pllv3_generic_ops = {
.get_rate   = clk_pllv3_generic_get_rate,
.enable = clk_pllv3_generic_enable,
.disable= clk_pllv3_generic_disable,
+   .set_rate   = clk_pllv3_generic_set_rate,
 };
 
 struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name,
-- 
2.20.1

[PATCH 06/20] clk: imx: pllv3: add disable() support

[Giulio Benetti]

Add disable() support.

Signed-off-by: Giulio Benetti 
---
 drivers/clk/imx/clk-pllv3.c | 16 
 1 file changed, 16 insertions(+)

diff --git a/drivers/clk/imx/clk-pllv3.c b/drivers/clk/imx/clk-pllv3.c
index d8cbe3dd4e..9b37cd9cd9 100644
--- a/drivers/clk/imx/clk-pllv3.c
+++ b/drivers/clk/imx/clk-pllv3.c
@@ -54,9 +54,25 @@ static int clk_pllv3_generic_enable(struct clk *clk)
return 0;
 }
 
+static int clk_pllv3_generic_disable(struct clk *clk)
+{
+   struct clk_pllv3 *pll = to_clk_pllv3(clk);
+   u32 val;
+
+   val = readl(pll->base);
+   if (pll->powerup_set)
+   val &= ~pll->power_bit;
+   else
+   val |= pll->power_bit;
+   writel(val, pll->base);
+
+   return 0;
+}
+
 static const struct clk_ops clk_pllv3_generic_ops = {
.get_rate   = clk_pllv3_generic_get_rate,
.enable = clk_pllv3_generic_enable,
+   .disable= clk_pllv3_generic_disable,
 };
 
 struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name,
-- 
2.20.1

Re: [U-Boot] [PATCH 16/17] imx: add dtsi for i.MX8MN

[Troy Kisky]

On 12/3/2019 6:13 PM, Peng Fan wrote:
 Troy
>>
>> So, is this code buggy ?
> 
> Yes, please use devfdt_get_addr_size_index
> 
> Regards,
> Peng.
> 

Thanks, that was my problem.

BR
Troy

[PATCH 01/20] armv7m: cache: add mmu_set_region_dcache_behaviour() stub for compatibility

[Giulio Benetti]

Since some driver requires this function add it as an empty stub
when DCACHE is OFF.

Signed-off-by: Giulio Benetti 
---
 arch/arm/cpu/armv7m/cache.c | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/arch/arm/cpu/armv7m/cache.c b/arch/arm/cpu/armv7m/cache.c
index f4ba3ad50e..7353698557 100644
--- a/arch/arm/cpu/armv7m/cache.c
+++ b/arch/arm/cpu/armv7m/cache.c
@@ -291,6 +291,12 @@ void flush_dcache_all(void)
 void invalidate_dcache_all(void)
 {
 }
+
+void mmu_set_region_dcache_behaviour(phys_addr_t start, size_t size,
+enum dcache_option option)
+{
+}
+
 #endif
 
 #if !CONFIG_IS_ENABLED(SYS_ICACHE_OFF)
-- 
2.20.1

[PULL] u-boot-sh/master

[Marek Vasut]

The following changes since commit 94d022bb400890f22fe35220d2519c3bce73f05e:

  Merge tag 'efi-2020-01-rc5' of
https://gitlab.denx.de/u-boot/custodians/u-boot-efi (2019-12-03 18:12:58
-0500)

are available in the Git repository at:

  git://git.denx.de/u-boot-sh.git master

for you to fetch changes up to 019c9b3ea842514b3b4b90f7af01c3dc278a972e:

  ARM: rmobile: Convert M2N Gose to DM_SPI{,_FLASH} (2019-12-04 18:57:05
+0100)


Marek Vasut (3):
  ARM: rmobile: Convert H2 Lager to DM_SPI{,_FLASH}
  ARM: rmobile: Convert M2W Koelsch to DM_SPI{,_FLASH}
  ARM: rmobile: Convert M2N Gose to DM_SPI{,_FLASH}

 configs/gose_defconfig| 4 ++--
 configs/koelsch_defconfig | 4 ++--
 configs/lager_defconfig   | 4 ++--
 3 files changed, 6 insertions(+), 6 deletions(-)

[PATCH 08/20] clk: imx: pllv3: add PLLV3_SYS support

[Giulio Benetti]

Add PLLV3_SYS support by adding set/get_rate() for PLLV3_SYS but keeping
generic enable()/disable(). Add a different driver because ops are
different respect to GENERIC/USB.

Signed-off-by: Giulio Benetti 
---
 drivers/clk/imx/clk-pllv3.c | 53 +
 1 file changed, 53 insertions(+)

diff --git a/drivers/clk/imx/clk-pllv3.c b/drivers/clk/imx/clk-pllv3.c
index a721dbee94..d5087a104e 100644
--- a/drivers/clk/imx/clk-pllv3.c
+++ b/drivers/clk/imx/clk-pllv3.c
@@ -14,6 +14,7 @@
 #include "clk.h"
 
 #define UBOOT_DM_CLK_IMX_PLLV3_GENERIC "imx_clk_pllv3_generic"
+#define UBOOT_DM_CLK_IMX_PLLV3_SYS "imx_clk_pllv3_sys"
 #define UBOOT_DM_CLK_IMX_PLLV3_USB "imx_clk_pllv3_usb"
 
 #define BM_PLL_POWER   (0x1 << 12)
@@ -102,6 +103,46 @@ static const struct clk_ops clk_pllv3_generic_ops = {
.set_rate   = clk_pllv3_generic_set_rate,
 };
 
+static ulong clk_pllv3_sys_get_rate(struct clk *clk)
+{
+   struct clk_pllv3 *pll = to_clk_pllv3(clk);
+   unsigned long parent_rate = clk_get_parent_rate(clk);
+   u32 div = readl(pll->base) & pll->div_mask;
+
+   return parent_rate * div / 2;
+}
+
+static ulong clk_pllv3_sys_set_rate(struct clk *clk, ulong rate)
+{
+   struct clk_pllv3 *pll = to_clk_pllv3(clk);
+   unsigned long parent_rate = clk_get_parent_rate(clk);
+   unsigned long min_rate = parent_rate * 54 / 2;
+   unsigned long max_rate = parent_rate * 108 / 2;
+   u32 val, div;
+
+   if (rate < min_rate || rate > max_rate)
+   return -EINVAL;
+
+   div = rate * 2 / parent_rate;
+   val = readl(pll->base);
+   val &= ~pll->div_mask;
+   val |= div;
+   writel(val, pll->base);
+
+   /* Wait for PLL to lock */
+   while (!(readl(pll->base) & BM_PLL_LOCK))
+   ;
+
+   return 0;
+}
+
+static const struct clk_ops clk_pllv3_sys_ops = {
+   .enable = clk_pllv3_generic_enable,
+   .disable= clk_pllv3_generic_disable,
+   .get_rate   = clk_pllv3_sys_get_rate,
+   .set_rate   = clk_pllv3_sys_set_rate,
+};
+
 struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name,
  const char *parent_name, void __iomem *base,
  u32 div_mask)
@@ -123,6 +164,11 @@ struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const 
char *name,
pll->div_shift = 0;
pll->powerup_set = false;
break;
+   case IMX_PLLV3_SYS:
+   drv_name = UBOOT_DM_CLK_IMX_PLLV3_SYS;
+   pll->div_shift = 0;
+   pll->powerup_set = false;
+   break;
case IMX_PLLV3_USB:
drv_name = UBOOT_DM_CLK_IMX_PLLV3_USB;
pll->div_shift = 1;
@@ -153,6 +199,13 @@ U_BOOT_DRIVER(clk_pllv3_generic) = {
.flags = DM_FLAG_PRE_RELOC,
 };
 
+U_BOOT_DRIVER(clk_pllv3_sys) = {
+   .name   = UBOOT_DM_CLK_IMX_PLLV3_SYS,
+   .id = UCLASS_CLK,
+   .ops= _pllv3_sys_ops,
+   .flags = DM_FLAG_PRE_RELOC,
+};
+
 U_BOOT_DRIVER(clk_pllv3_usb) = {
.name   = UBOOT_DM_CLK_IMX_PLLV3_USB,
.id = UCLASS_CLK,
-- 
2.20.1

[PATCH 11/20] clk: imx: add i.IMXRT1050 clk driver

[Giulio Benetti]

Add i.MXRT1050 clk driver support.

Signed-off-by: Giulio Benetti 
---
 drivers/clk/imx/Kconfig |  16 ++
 drivers/clk/imx/Makefile|   2 +
 drivers/clk/imx/clk-imxrt1050.c | 292 
 include/dt-bindings/clock/imxrt1050-clock.h |  65 +
 4 files changed, 375 insertions(+)
 create mode 100644 drivers/clk/imx/clk-imxrt1050.c
 create mode 100644 include/dt-bindings/clock/imxrt1050-clock.h

diff --git a/drivers/clk/imx/Kconfig b/drivers/clk/imx/Kconfig
index 0ba8bc9f63..d5738b5211 100644
--- a/drivers/clk/imx/Kconfig
+++ b/drivers/clk/imx/Kconfig
@@ -52,3 +52,19 @@ config CLK_IMX8MN
select CLK_CCF
help
  This enables support clock driver for i.MX8MN platforms.
+
+config SPL_CLK_IMXRT1050
+   bool "SPL clock support for i.MXRT1050"
+   depends on ARCH_IMXRT && SPL
+   select SPL_CLK
+   select SPL_CLK_CCF
+   help
+ This enables SPL DM/DTS support for clock driver in i.MXRT1050
+
+config CLK_IMXRT1050
+   bool "Clock support for i.MXRT1050"
+   depends on ARCH_IMXRT
+   select CLK
+   select CLK_CCF
+   help
+ This enables support clock driver for i.MXRT1050 platforms.
diff --git a/drivers/clk/imx/Makefile b/drivers/clk/imx/Makefile
index 222c5a4e08..166cb7bb44 100644
--- a/drivers/clk/imx/Makefile
+++ b/drivers/clk/imx/Makefile
@@ -14,3 +14,5 @@ obj-$(CONFIG_$(SPL_TPL_)CLK_IMX8MM) += clk-imx8mm.o 
clk-pll14xx.o \
clk-composite-8m.o
 obj-$(CONFIG_$(SPL_TPL_)CLK_IMX8MN) += clk-imx8mn.o clk-pll14xx.o \
clk-composite-8m.o
+
+obj-$(CONFIG_$(SPL_TPL_)CLK_IMXRT1050) += clk-imxrt1050.o
diff --git a/drivers/clk/imx/clk-imxrt1050.c b/drivers/clk/imx/clk-imxrt1050.c
new file mode 100644
index 00..44ca52c013
--- /dev/null
+++ b/drivers/clk/imx/clk-imxrt1050.c
@@ -0,0 +1,292 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright(C) 2019
+ * Author(s): Giulio Benetti 
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "clk.h"
+
+static ulong imxrt1050_clk_get_rate(struct clk *clk)
+{
+   struct clk *c;
+   int ret;
+
+   debug("%s(#%lu)\n", __func__, clk->id);
+
+   ret = clk_get_by_id(clk->id, );
+   if (ret)
+   return ret;
+
+   return clk_get_rate(c);
+}
+
+static ulong imxrt1050_clk_set_rate(struct clk *clk, ulong rate)
+{
+   struct clk *c;
+   int ret;
+
+   debug("%s(#%lu), rate: %lu\n", __func__, clk->id, rate);
+
+   ret = clk_get_by_id(clk->id, );
+   if (ret)
+   return ret;
+
+   return clk_set_rate(c, rate);
+}
+
+static int __imxrt1050_clk_enable(struct clk *clk, bool enable)
+{
+   struct clk *c;
+   int ret;
+
+   debug("%s(#%lu) en: %d\n", __func__, clk->id, enable);
+
+   ret = clk_get_by_id(clk->id, );
+   if (ret)
+   return ret;
+
+   if (enable)
+   ret = clk_enable(c);
+   else
+   ret = clk_disable(c);
+
+   return ret;
+}
+
+static int imxrt1050_clk_disable(struct clk *clk)
+{
+   return __imxrt1050_clk_enable(clk, 0);
+}
+
+static int imxrt1050_clk_enable(struct clk *clk)
+{
+   return __imxrt1050_clk_enable(clk, 1);
+}
+
+static struct clk_ops imxrt1050_clk_ops = {
+   .set_rate = imxrt1050_clk_set_rate,
+   .get_rate = imxrt1050_clk_get_rate,
+   .enable = imxrt1050_clk_enable,
+   .disable = imxrt1050_clk_disable,
+};
+
+static const char * const pll_ref_sels[] = {"osc", "dummy", };
+static const char * const pll1_bypass_sels[] = {"pll1_arm", 
"pll1_arm_ref_sel", };
+static const char * const pll2_bypass_sels[] = {"pll2_sys", 
"pll2_sys_ref_sel", };
+static const char * const pll3_bypass_sels[] = {"pll3_usb_otg", 
"pll3_usb_otg_ref_sel", };
+static const char * const pll5_bypass_sels[] = {"pll5_video", 
"pll5_video_ref_sel", };
+
+static const char *const pre_periph_sels[] = { "pll2_sys", "pll2_pfd2_396m", 
"pll2_pfd0_352m", "arm_podf", };
+static const char *const periph_sels[] = { "pre_periph_sel", "todo", };
+static const char *const usdhc_sels[] = { "pll2_pfd2_396m", "pll2_pfd0_352m", 
};
+static const char *const lpuart_sels[] = { "pll3_80m", "osc", };
+static const char *const semc_alt_sels[] = { "pll2_pfd2_396m", 
"pll3_pfd1_664_62m", };
+static const char *const semc_sels[] = { "periph_sel", "semc_alt_sel", };
+static const char *const lcdif_sels[] = { "pll2_sys", "pll3_pfd3_454_74m", 
"pll5_video:", "pll2_pfd0_352m", "pll2_pfd1_594m", "pll3_pfd1_664_62m"};
+
+static int imxrt1050_clk_probe(struct udevice *dev)
+{
+   void *base;
+
+   /* Anatop clocks */
+   base = (void *)ANATOP_BASE_ADDR;
+
+   clk_dm(IMXRT1050_CLK_PLL1_REF_SEL,
+  imx_clk_mux("pll1_arm_ref_sel", base + 0x0, 14, 2,
+  pll_ref_sels, ARRAY_SIZE(pll_ref_sels)));
+   clk_dm(IMXRT1050_CLK_PLL2_REF_SEL,
+  

[PATCH 15/20] serial_lpuart: add support for i.MXRT

[Giulio Benetti]

Add i.MXRT compatible string and cpu type support to lpuart driver,
to use little endian 32 bits configurations.

Also according to RM, the Receive RX FIFO Enable (RXFE) field in LPUART
FIFO register is bit 3, so this definition should change to 0x08 as done
for i.MX8. It needs also to set baudrate the same way as i.MX8 does.

Signed-off-by: Giulio Benetti 
---
 drivers/serial/serial_lpuart.c | 15 +++
 include/fsl_lpuart.h   |  3 ++-
 2 files changed, 13 insertions(+), 5 deletions(-)

diff --git a/drivers/serial/serial_lpuart.c b/drivers/serial/serial_lpuart.c
index 52bd2baf7d..2ac4c6d56a 100644
--- a/drivers/serial/serial_lpuart.c
+++ b/drivers/serial/serial_lpuart.c
@@ -49,7 +49,7 @@
 #define FIFO_RXSIZE_MASK   0x7
 #define FIFO_RXSIZE_OFF0
 #define FIFO_TXFE  0x80
-#ifdef CONFIG_ARCH_IMX8
+#if defined(CONFIG_ARCH_IMX8) || defined(CONFIG_ARCH_IMXRT)
 #define FIFO_RXFE  0x08
 #else
 #define FIFO_RXFE  0x40
@@ -67,7 +67,8 @@ enum lpuart_devtype {
DEV_VF610 = 1,
DEV_LS1021A,
DEV_MX7ULP,
-   DEV_IMX8
+   DEV_IMX8,
+   DEV_IMXRT,
 };
 
 struct lpuart_serial_platdata {
@@ -409,7 +410,8 @@ static int _lpuart32_serial_init(struct udevice *dev)
 
lpuart_write32(plat->flags, >match, 0);
 
-   if (plat->devtype == DEV_MX7ULP || plat->devtype == DEV_IMX8) {
+   if (plat->devtype == DEV_MX7ULP || plat->devtype == DEV_IMX8 ||
+   plat->devtype == DEV_IMXRT) {
_lpuart32_serial_setbrg_7ulp(dev, gd->baudrate);
} else {
/* provide data bits, parity, stop bit, etc */
@@ -426,7 +428,8 @@ static int lpuart_serial_setbrg(struct udevice *dev, int 
baudrate)
struct lpuart_serial_platdata *plat = dev_get_platdata(dev);
 
if (is_lpuart32(dev)) {
-   if (plat->devtype == DEV_MX7ULP || plat->devtype == DEV_IMX8)
+   if (plat->devtype == DEV_MX7ULP || plat->devtype == DEV_IMX8 ||
+   plat->devtype == DEV_IMXRT)
_lpuart32_serial_setbrg_7ulp(dev, baudrate);
else
_lpuart32_serial_setbrg(dev, baudrate);
@@ -527,6 +530,8 @@ static int lpuart_serial_ofdata_to_platdata(struct udevice 
*dev)
plat->devtype = DEV_VF610;
else if (!fdt_node_check_compatible(blob, node, "fsl,imx8qm-lpuart"))
plat->devtype = DEV_IMX8;
+   else if (!fdt_node_check_compatible(blob, node, "fsl,imxrt-lpuart"))
+   plat->devtype = DEV_IMXRT;
 
return 0;
 }
@@ -546,6 +551,8 @@ static const struct udevice_id lpuart_serial_ids[] = {
{ .compatible = "fsl,vf610-lpuart"},
{ .compatible = "fsl,imx8qm-lpuart",
.data = LPUART_FLAG_REGMAP_32BIT_REG },
+   { .compatible = "fsl,imxrt-lpuart",
+   .data = LPUART_FLAG_REGMAP_32BIT_REG },
{ }
 };
 
diff --git a/include/fsl_lpuart.h b/include/fsl_lpuart.h
index fc517d4b7f..511fb84367 100644
--- a/include/fsl_lpuart.h
+++ b/include/fsl_lpuart.h
@@ -4,7 +4,8 @@
  *
  */
 
-#if defined(CONFIG_ARCH_MX7ULP) || defined(CONFIG_ARCH_IMX8)
+#if defined(CONFIG_ARCH_MX7ULP) || defined(CONFIG_ARCH_IMX8) || \
+   defined(CONFIG_ARCH_IMXRT)
 struct lpuart_fsl_reg32 {
u32 verid;
u32 param;
-- 
2.20.1

Re: [U-Boot] [PATCH v2 3/8] cmd: bootimg: Add bootimg command

[Eugeniu Rosca]

Hello Sam,
Please, see one more suggestion below.

On Tue, Dec 03, 2019 at 08:29:10PM +0100, Eugeniu Rosca wrote:
> Hi Sam,
> Cc: Aleksandr, Roman
> 
> As expressed in the attached e-mail, to minimize the headaches extending
> the argument list of "bootimg" in future, can we please agree on below?
> 
> On Wed, Oct 23, 2019 at 05:34:22PM +0300, Sam Protsenko wrote:
> > +U_BOOT_CMD(
> > +   bootimg, CONFIG_SYS_MAXARGS, 0, do_bootimg,
> > +   "manipulate Android Boot Image",
> > +   "set_addr \n"
> > +   "- set the address in RAM where boot image is located\n"
> > +   "  ($loadaddr is used by default)\n"
> > +   "bootimg ver \n"
> 
> Can we make  optional, with the background provided in [1]?
> 
> > +   "- get header version\n"
> > +   "bootimg get_dtbo  [size_var]\n"
> 
> How about converting  to an optional argument too?
> 
> > +   "- get address and size (hex) of recovery DTBO area in the image\n"
> > +   "  : variable name to contain DTBO area address\n"
> > +   "  [size_var]: variable name to contain DTBO area size\n"
> > +   "bootimg dtb_dump\n"
> > +   "- print info for all files in DTB area\n"
> > +   "bootimg dtb_load_addr \n"
> 
> Same as above w.r.t. .
> 
> > +   "- get load address (hex) of DTB\n"
> > +   "bootimg get_dtb_file   [size_var]\n"

How about "get_dte" or "get_dtbe" instead of "get_dtb_file" ?
It's shorter and should be easier to remember (dt{b}e = DT{B} Entry).

-- 
Best Regards,
Eugeniu

[PATCH 04/20] clk: imx: pllv3: set div_mask differently if PLLV3 is GENERIC or USB

[Giulio Benetti]

div_mask is different for GENERIC and USB pll, so set it according.

Signed-off-by: Giulio Benetti 
---
 drivers/clk/imx/clk-pllv3.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/clk/imx/clk-pllv3.c b/drivers/clk/imx/clk-pllv3.c
index d1e4c3fe30..02c75c37ea 100644
--- a/drivers/clk/imx/clk-pllv3.c
+++ b/drivers/clk/imx/clk-pllv3.c
@@ -55,9 +55,11 @@ struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const 
char *name,
switch (type) {
case IMX_PLLV3_GENERIC:
drv_name = UBOOT_DM_CLK_IMX_PLLV3_GENERIC;
+   pll->div_shift = 0;
break;
case IMX_PLLV3_USB:
drv_name = UBOOT_DM_CLK_IMX_PLLV3_USB;
+   pll->div_shift = 1;
break;
default:
kfree(pll);
-- 
2.20.1

[PATCH 03/20] clk: imx: pllv3: register PLLV3 GENERIC and USB as 2 different clocks

[Giulio Benetti]

Better to register the 2 clock as 2 different drivers because they work
slightly differently depending on power_bit and powerup_set bits coming
on next patches.

Signed-off-by: Giulio Benetti 
---
 drivers/clk/imx/clk-pllv3.c | 20 +++-
 1 file changed, 15 insertions(+), 5 deletions(-)

diff --git a/drivers/clk/imx/clk-pllv3.c b/drivers/clk/imx/clk-pllv3.c
index fbb7b24d5e..d1e4c3fe30 100644
--- a/drivers/clk/imx/clk-pllv3.c
+++ b/drivers/clk/imx/clk-pllv3.c
@@ -13,7 +13,8 @@
 #include 
 #include "clk.h"
 
-#define UBOOT_DM_CLK_IMX_PLLV3 "imx_clk_pllv3"
+#define UBOOT_DM_CLK_IMX_PLLV3_GENERIC "imx_clk_pllv3_generic"
+#define UBOOT_DM_CLK_IMX_PLLV3_USB "imx_clk_pllv3_usb"
 
 struct clk_pllv3 {
struct clk  clk;
@@ -24,7 +25,7 @@ struct clk_pllv3 {
 
 #define to_clk_pllv3(_clk) container_of(_clk, struct clk_pllv3, clk)
 
-static ulong clk_pllv3_get_rate(struct clk *clk)
+static ulong clk_pllv3_generic_get_rate(struct clk *clk)
 {
struct clk_pllv3 *pll = to_clk_pllv3(dev_get_clk_ptr(clk->dev));
unsigned long parent_rate = clk_get_parent_rate(clk);
@@ -35,7 +36,7 @@ static ulong clk_pllv3_get_rate(struct clk *clk)
 }
 
 static const struct clk_ops clk_pllv3_generic_ops = {
-   .get_rate   = clk_pllv3_get_rate,
+   .get_rate   = clk_pllv3_generic_get_rate,
 };
 
 struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name,
@@ -53,8 +54,10 @@ struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const 
char *name,
 
switch (type) {
case IMX_PLLV3_GENERIC:
+   drv_name = UBOOT_DM_CLK_IMX_PLLV3_GENERIC;
+   break;
case IMX_PLLV3_USB:
-   drv_name = UBOOT_DM_CLK_IMX_PLLV3;
+   drv_name = UBOOT_DM_CLK_IMX_PLLV3_USB;
break;
default:
kfree(pll);
@@ -75,7 +78,14 @@ struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const 
char *name,
 }
 
 U_BOOT_DRIVER(clk_pllv3_generic) = {
-   .name   = UBOOT_DM_CLK_IMX_PLLV3,
+   .name   = UBOOT_DM_CLK_IMX_PLLV3_GENERIC,
+   .id = UCLASS_CLK,
+   .ops= _pllv3_generic_ops,
+   .flags = DM_FLAG_PRE_RELOC,
+};
+
+U_BOOT_DRIVER(clk_pllv3_usb) = {
+   .name   = UBOOT_DM_CLK_IMX_PLLV3_USB,
.id = UCLASS_CLK,
.ops= _pllv3_generic_ops,
.flags = DM_FLAG_PRE_RELOC,
-- 
2.20.1

[PATCH 05/20] clk: imx: pllv3: add enable() support

[Giulio Benetti]

Before set_rate() pllv3 needs enable() to power the pll up.
Add enable() taking into account different power_bit and
different powerup_set, because some pll needs its power_bit to be
set or reset to be powered on.

Signed-off-by: Giulio Benetti 
---
 drivers/clk/imx/clk-pllv3.c | 24 
 1 file changed, 24 insertions(+)

diff --git a/drivers/clk/imx/clk-pllv3.c b/drivers/clk/imx/clk-pllv3.c
index 02c75c37ea..d8cbe3dd4e 100644
--- a/drivers/clk/imx/clk-pllv3.c
+++ b/drivers/clk/imx/clk-pllv3.c
@@ -16,9 +16,13 @@
 #define UBOOT_DM_CLK_IMX_PLLV3_GENERIC "imx_clk_pllv3_generic"
 #define UBOOT_DM_CLK_IMX_PLLV3_USB "imx_clk_pllv3_usb"
 
+#define BM_PLL_POWER   (0x1 << 12)
+
 struct clk_pllv3 {
struct clk  clk;
void __iomem*base;
+   u32 power_bit;
+   boolpowerup_set;
u32 div_mask;
u32 div_shift;
 };
@@ -35,8 +39,24 @@ static ulong clk_pllv3_generic_get_rate(struct clk *clk)
return (div == 1) ? parent_rate * 22 : parent_rate * 20;
 }
 
+static int clk_pllv3_generic_enable(struct clk *clk)
+{
+   struct clk_pllv3 *pll = to_clk_pllv3(clk);
+   u32 val;
+
+   val = readl(pll->base);
+   if (pll->powerup_set)
+   val |= pll->power_bit;
+   else
+   val &= ~pll->power_bit;
+   writel(val, pll->base);
+
+   return 0;
+}
+
 static const struct clk_ops clk_pllv3_generic_ops = {
.get_rate   = clk_pllv3_generic_get_rate,
+   .enable = clk_pllv3_generic_enable,
 };
 
 struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name,
@@ -52,14 +72,18 @@ struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const 
char *name,
if (!pll)
return ERR_PTR(-ENOMEM);
 
+   pll->power_bit = BM_PLL_POWER;
+
switch (type) {
case IMX_PLLV3_GENERIC:
drv_name = UBOOT_DM_CLK_IMX_PLLV3_GENERIC;
pll->div_shift = 0;
+   pll->powerup_set = false;
break;
case IMX_PLLV3_USB:
drv_name = UBOOT_DM_CLK_IMX_PLLV3_USB;
pll->div_shift = 1;
+   pll->powerup_set = true;
break;
default:
kfree(pll);
-- 
2.20.1

[PATCH v3 3/6] net: ti: am65-cpsw-nuss: Rework RX flow ID handling

[Vignesh Raghavendra]

Get flow ID information for RX DMA channel using dma_get_cfg() interface
instead of reading from DT. This is required in order to avoid DT update
whenever there is change in the range of flow ID allocated to the host.

Signed-off-by: Vignesh Raghavendra 
Acked-by: Joe Hershberger 
Reviewed-by: Grygorii Strashko 
---
 drivers/net/ti/am65-cpsw-nuss.c | 15 ++-
 1 file changed, 6 insertions(+), 9 deletions(-)

diff --git a/drivers/net/ti/am65-cpsw-nuss.c b/drivers/net/ti/am65-cpsw-nuss.c
index 06b06639506a..db686595b782 100644
--- a/drivers/net/ti/am65-cpsw-nuss.c
+++ b/drivers/net/ti/am65-cpsw-nuss.c
@@ -99,7 +99,6 @@ struct am65_cpsw_common {
 
u32 port_num;
struct am65_cpsw_port   ports[AM65_CPSW_CPSWNU_MAX_PORTS];
-   u32 rflow_id_base;
 
struct mii_dev  *bus;
u32 bus_freq;
@@ -276,6 +275,7 @@ static int am65_cpsw_start(struct udevice *dev)
struct am65_cpsw_common *common = priv->cpsw_common;
struct am65_cpsw_port *port = >ports[priv->port_id];
struct am65_cpsw_port *port0 = >ports[0];
+   struct ti_udma_drv_chan_cfg_data *dma_rx_cfg_data;
int ret, i;
 
ret = power_domain_on(>pwrdmn);
@@ -341,8 +341,11 @@ static int am65_cpsw_start(struct udevice *dev)
writel(PKTSIZE_ALIGN, port0->port_base + AM65_CPSW_PN_RX_MAXLEN_REG);
 
/* set base flow_id */
-   writel(common->rflow_id_base,
+   dma_get_cfg(>dma_rx, 0, (void **)_rx_cfg_data);
+   writel(dma_rx_cfg_data->flow_id_base,
   port0->port_base + AM65_CPSW_P0_FLOW_ID_REG);
+   dev_info(dev, "K3 CPSW: rflow_id_base: %u\n",
+dma_rx_cfg_data->flow_id_base);
 
/* Reset and enable the ALE */
writel(AM65_CPSW_ALE_CTL_REG_ENABLE | AM65_CPSW_ALE_CTL_REG_RESET_TBL |
@@ -669,11 +672,6 @@ static int am65_cpsw_probe_cpsw(struct udevice *dev)
AM65_CPSW_CPSW_NU_ALE_BASE;
cpsw_common->mdio_base = cpsw_common->ss_base + AM65_CPSW_MDIO_BASE;
 
-   cpsw_common->rflow_id_base = 0;
-   cpsw_common->rflow_id_base =
-   dev_read_u32_default(dev, "ti,rx-flow-id-base",
-cpsw_common->rflow_id_base);
-
ports_np = dev_read_subnode(dev, "ports");
if (!ofnode_valid(ports_np)) {
ret = -ENOENT;
@@ -761,12 +759,11 @@ static int am65_cpsw_probe_cpsw(struct udevice *dev)
if (ret)
goto out;
 
-   dev_info(dev, "K3 CPSW: nuss_ver: 0x%08X cpsw_ver: 0x%08X ale_ver: 
0x%08X Ports:%u rflow_id_base:%u mdio_freq:%u\n",
+   dev_info(dev, "K3 CPSW: nuss_ver: 0x%08X cpsw_ver: 0x%08X ale_ver: 
0x%08X Ports:%u mdio_freq:%u\n",
 readl(cpsw_common->ss_base),
 readl(cpsw_common->cpsw_base),
 readl(cpsw_common->ale_base),
 cpsw_common->port_num,
-cpsw_common->rflow_id_base,
 cpsw_common->bus_freq);
 
 out:
-- 
2.24.0

[PATCH 1/2] rpi: fix dram bank initialization

[matthias . bgg]

From: Matthias Brugger 

To update the dram bank information from device-tree we use
fdtdec_decode_ram_size() which expectes the the size-cells and
address-cells to be defined in the memory node. For normal system RAM
these values are defined in the root node. When the values differ from
the default values defined in the spec, we can end up with wrong RAM
bank information.

Switch to the "standard" way to update the RAM bank information to
avoid this.

Fixes: 9de5b89e4c ("rpi4: enable dram bank initialization")

Signed-off-by: Matthias Brugger 
---

 board/raspberrypi/rpi/rpi.c | 9 +++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c
index 3d4afaf653..76f1c55b65 100644
--- a/board/raspberrypi/rpi/rpi.c
+++ b/board/raspberrypi/rpi/rpi.c
@@ -274,8 +274,13 @@ int dram_init(void)
 #ifdef CONFIG_BCM2711
 int dram_init_banksize(void)
 {
-   return fdtdec_decode_ram_size(gd->fdt_blob, NULL, 0, NULL,
-(phys_size_t *)>ram_size, gd->bd);
+   int ret;
+
+   ret = fdtdec_setup_memory_banksize();
+   if (ret)
+   return ret;
+
+   return fdtdec_setup_mem_size_base();
 }
 #endif
 #endif
-- 
2.24.0

Re: [U-Boot] [PATCH v2 3/8] cmd: bootimg: Add bootimg command

[Eugeniu Rosca]

Hi Sam,

On Mon, Dec 02, 2019 at 09:07:15PM +0200, Sam Protsenko wrote:
> I'd like this patch series to be applied ASAP (probably before DTBO
> patches you mention are merged). It's been too long as it is. Once
> merged and we are unblocked w.r.t. Android boot stuff, we can then
> look into DTBO changes you mention, and if any C API are changed, we
> can change those usage overall the U-Boot tree. Hope you agree. I will
> help you guys to figure out all DTBO related changes further, but
> please let's get this patch series over with...
> 
> Thanks!

[to avoid this comment of yours unanswered]

I am ready to provide the Reviewed-by for your Android 10 series,
as soon as the review points summarized in [*] are taken care of.

[*] https://patchwork.ozlabs.org/patch/1182207/#2317118

-- 
Best Regards,
Eugeniu

[PATCH v3 1/6] dma: Introduce dma_get_cfg() interface

[Vignesh Raghavendra]

Sometimes, there would be a need to exchange data between DMA provider
and DMA client which are very specific to DMA driver of the SoC/platform
and are not generic enough to be put into struct dma. Therefore, introduce
dma_get_cfg() interface to get DMA provider specific data from client
device. Clients can use unique configuration ID flags to get different
configuration data from DMA driver.

Signed-off-by: Vignesh Raghavendra 
Acked-by: Joe Hershberger 
Reviewed-by: Grygorii Strashko 
---
 drivers/dma/dma-uclass.c | 12 
 include/dma-uclass.h | 11 +++
 include/dma.h| 11 +++
 3 files changed, 34 insertions(+)

diff --git a/drivers/dma/dma-uclass.c b/drivers/dma/dma-uclass.c
index 0ff56f7e88c9..5598bca21c5e 100644
--- a/drivers/dma/dma-uclass.c
+++ b/drivers/dma/dma-uclass.c
@@ -187,6 +187,18 @@ int dma_send(struct dma *dma, void *src, size_t len, void 
*metadata)
 
return ops->send(dma, src, len, metadata);
 }
+
+int dma_get_cfg(struct dma *dma, u32 cfg_id, void **cfg_data)
+{
+   struct dma_ops *ops = dma_dev_ops(dma->dev);
+
+   debug("%s(dma=%p)\n", __func__, dma);
+
+   if (!ops->get_cfg)
+   return -ENOSYS;
+
+   return ops->get_cfg(dma, cfg_id, cfg_data);
+}
 #endif /* CONFIG_DMA_CHANNELS */
 
 int dma_get_device(u32 transfer_type, struct udevice **devp)
diff --git a/include/dma-uclass.h b/include/dma-uclass.h
index 31b43fb4b98e..a1d9d26ac56f 100644
--- a/include/dma-uclass.h
+++ b/include/dma-uclass.h
@@ -108,6 +108,17 @@ struct dma_ops {
 * @return zero on success, or -ve error code.
 */
int (*send)(struct dma *dma, void *src, size_t len, void *metadata);
+   /**
+* get_cfg() - Get DMA channel configuration for client's use
+*
+* @dma:The DMA Channel to manipulate
+* @cfg_id: DMA provider specific ID to identify what
+*  configuration data client needs
+* @data:   Pointer to store pointer to DMA driver specific
+*  configuration data for the given cfg_id (output param)
+* @return zero on success, or -ve error code.
+*/
+   int (*get_cfg)(struct dma *dma, u32 cfg_id, void **data);
 #endif /* CONFIG_DMA_CHANNELS */
/**
 * transfer() - Issue a DMA transfer. The implementation must
diff --git a/include/dma.h b/include/dma.h
index 32885571f7d4..426617b34edf 100644
--- a/include/dma.h
+++ b/include/dma.h
@@ -290,6 +290,17 @@ int dma_receive(struct dma *dma, void **dst, void 
*metadata);
  * @return zero on success, or -ve error code.
  */
 int dma_send(struct dma *dma, void *src, size_t len, void *metadata);
+/**
+ * dma_get_cfg() - Get DMA channel configuration for client's use
+ *
+ * @dma:  The DMA Channel to manipulate
+ * @cfg_id:   DMA provider specific ID to identify what
+ *configuration data client needs
+ * @cfg_data: Pointer to store pointer to DMA driver specific
+ *configuration data for the given cfg_id (output param)
+ * @return zero on success, or -ve error code.
+ */
+int dma_get_cfg(struct dma *dma, u32 cfg_id, void **cfg_data);
 #endif /* CONFIG_DMA_CHANNELS */
 
 #if CONFIG_IS_ENABLED(DMA)
-- 
2.24.0