Re: [PATCH 09/10] usb: Use ofnode as usb_get_dr_mode() parameter

[Neil Armstrong]

On 19/02/2020 02:54, Kever Yang wrote:
> ofnode is more common and no need to convert to offset after we migrate
> other API to use ofnode.
> 
> Signed-off-by: Kever Yang 
> ---
> 
>  drivers/usb/cdns3/core.c   | 2 +-
>  drivers/usb/common/common.c| 7 +++
>  drivers/usb/dwc3/dwc3-generic.c| 6 +++---
>  drivers/usb/dwc3/dwc3-meson-g12a.c | 2 +-
>  drivers/usb/gadget/dwc2_udc_otg.c  | 5 ++---
>  drivers/usb/host/dwc3-sti-glue.c   | 2 +-
>  drivers/usb/host/ehci-mx6.c| 2 +-
>  drivers/usb/host/xhci-dwc3.c   | 3 +--
>  drivers/usb/musb-new/ti-musb.c | 2 +-
>  include/linux/usb/otg.h| 4 ++--
>  10 files changed, 16 insertions(+), 19 deletions(-)
> 

[...]

> diff --git a/drivers/usb/common/common.c b/drivers/usb/common/common.c
> index a55def5aba..4300f711a9 100644
> --- a/drivers/usb/common/common.c
> +++ b/drivers/usb/common/common.c
> @@ -7,7 +7,7 @@
>   */
>  
>  #include 
> -#include 
> +#include 
>  #include 
>  #include 
>  
> @@ -20,13 +20,12 @@ static const char *const usb_dr_modes[] = {
>   [USB_DR_MODE_OTG]   = "otg",
>  };
>  
> -enum usb_dr_mode usb_get_dr_mode(int node)
> +enum usb_dr_mode usb_get_dr_mode(ofnode node)
>  {
> - const void *fdt = gd->fdt_blob;
>   const char *dr_mode;
>   int i;
>  
> - dr_mode = fdt_getprop(fdt, node, "dr_mode", NULL);
> + dr_mode = ofnode_read_string(node, "dr_mode");
>   if (!dr_mode) {
>   pr_err("usb dr_mode not found\n");
>   return USB_DR_MODE_UNKNOWN;
> diff --git a/drivers/usb/dwc3/dwc3-generic.c b/drivers/usb/dwc3/dwc3-generic.c
> index ced0f53bfd..7178f12b47 100644

[..]

> diff --git a/drivers/usb/dwc3/dwc3-meson-g12a.c 
> b/drivers/usb/dwc3/dwc3-meson-g12a.c
> index 832bcd70ff..d4453f8784 100644
> --- a/drivers/usb/dwc3/dwc3-meson-g12a.c
> +++ b/drivers/usb/dwc3/dwc3-meson-g12a.c
> @@ -393,7 +393,7 @@ static int dwc3_meson_g12a_probe(struct udevice *dev)
>   }
>  #endif
>  
> - priv->otg_mode = usb_get_dr_mode(dev_of_offset(dev));
> + priv->otg_mode = usb_get_dr_mode(dev->node);
>  
>   ret = dwc3_meson_g12a_usb_init(priv);
>   if (ret)

For drivers/usb/dwc3/dwc3-meson-g12a.c:
Acked-by: Neil Armstrong 

Re: [PATCH v4 0/5] usb: host: dwc2: use driver model for PHY and CLOCK

[Simon Goldschmidt]

On Tue, Feb 18, 2020 at 6:53 PM Marek Vasut  wrote:
>
> On 2/18/20 9:34 AM, Patrick Delaunay wrote:
> >
> > In this serie I update the DWC2 host driver to use the device tree
> > information and the associated PHY and CLOCK drivers when they are
> > availables.
> >
> > The V4 is rebased on latest master (v2020.04-rc2).
> > CI-Tavis build is OK:
> > https://travis-ci.org/patrickdelaunay/u-boot/builds/651479714
> >
> > NB: CI-Travis build was OK for all target after V3:
> > https://travis-ci.org/patrickdelaunay/u-boot/builds/609496187
> > As in V2, I cause the warnings for some boards:
> > drivers/usb/host/built-in.o: In function `dwc2_usb_remove':
> > drivers/usb/host/dwc2.c:1441: undefined reference to `clk_disable_bulk'
> >
> > I test this serie on stm32mp157c-ev1 board, with PHY and CLK
> > support
> >
> > The U-CLASS are provided by:
> > - PHY by USBPHYC driver = ./drivers/phy/phy-stm32-usbphyc.c
> > - CLOCK by RCC clock driver = drivers/clk/clk_stm32mp1.c
> > - RESET by RCC reset driver = drivers/reset/stm32-reset.c
> >
> > And I activate the configuration
> > +CONFIG_USB_DWC2=y
>
> Simon, can you test this on SOCFPGA ?

I can test if it probes, but I don't have anything running on that USB port
the socfpga_socrates board has. Would that be enought to test?

Regards,
Simon

>
> [...]

Re: [PATCH v6] Add support for SoM "VoCore2".

[Stefan Roese]

On 18.02.20 09:34, Mauro Condarelli wrote:

Small patch to add support for VoCore/VoCore2 board.

VoCore is open hardware and runs OpenWrt/LEDE.
It has WIFI, USB, UART, 20+ GPIOs but is only one inch square.
It will help you to make a smart house, study embedded system
or even make the tiniest router in the world.

Details about this SoM can be found at "https://vocore.io/v2.html;.

Signed-off-by: Mauro Condarelli 
---

Changes in v6:
- Added MAINTAINERS file.
- Removed project-specific configs/vocore2_defconfig_ENV_IN_FAT.
- Removed guard for SPL Serial definitions in include/configs/vocore2.h.
- Removed Baudrate Table definition in include/configs/vocore2.h.
- Moved board-specific DTS settingsto arch/mips/dts/vocore_vocore2.dts.
- Added UART2 pin definitions to arch/mips/dts/vocore_vocore2.dts.
- Removed unused mmc pin definition from arch/mips/dts/vocore_vocore2.dts.
- Added select of SPL_UART2_SPIS_PINMUX in board choice.
- Updated configs/vocore2_defconfig.

Changes in v5:
- Removed unneeded (and wrong) UART2 initialization in board.c
- Added network setup.
- Removed project-specific code.
- Move back environment to SPI NOR.
- Changes to environment default settings.
- Rebase on current u-boot-mips/testing.

Changes in v4:
- Reverted some overzealous DTS cleaning.
- Added support for bootcount.

Changes in v3:
- based on top of Weijie Gao patchset:
 "[v3,xx/20]Refactor the architecture parts of mt7628"

Changes in v2:
- Removed some dead code
- Changed Author to my full name (no nick)
- Removed unwanted fixup to .dts generation (not my call).
- Fixed commit message
- Fixed various variables/filenames to include Vendor name
- Changed Vendor name (Vonger -> Vocore)

  arch/mips/dts/Makefile   |   1 +
  arch/mips/dts/vocore_vocore2.dts |  85 ++
  arch/mips/mach-mtmips/Kconfig|  10 +++
  board/vocore/vocore2/Kconfig |  12 
  board/vocore/vocore2/MAINTAINERS |   7 +++
  board/vocore/vocore2/Makefile|   3 +
  board/vocore/vocore2/board.c |   6 ++
  configs/vocore2_defconfig| 101 +++
  include/configs/vocore2.h|  54 +
  9 files changed, 279 insertions(+)
  create mode 100644 arch/mips/dts/vocore_vocore2.dts
  create mode 100644 board/vocore/vocore2/Kconfig
  create mode 100644 board/vocore/vocore2/MAINTAINERS
  create mode 100644 board/vocore/vocore2/Makefile
  create mode 100644 board/vocore/vocore2/board.c
  create mode 100644 configs/vocore2_defconfig
  create mode 100644 include/configs/vocore2.h

diff --git a/arch/mips/dts/Makefile b/arch/mips/dts/Makefile
index cbd0c8bc8b..f711e9fb59 100644
--- a/arch/mips/dts/Makefile
+++ b/arch/mips/dts/Makefile
@@ -23,6 +23,7 @@ dtb-$(CONFIG_BOARD_NETGEAR_DGND3700V2) += 
netgear,dgnd3700v2.dtb
  dtb-$(CONFIG_BOARD_SAGEM_FAST1704) += sagem,f...@st1704.dtb
  dtb-$(CONFIG_BOARD_SFR_NB4_SER) += sfr,nb4-ser.dtb
  dtb-$(CONFIG_BOARD_TPLINK_WDR4300) += tplink_wdr4300.dtb
+dtb-$(CONFIG_BOARD_VOCORE2) += vocore_vocore2.dtb
  dtb-$(CONFIG_TARGET_JZ4780_CI20) += ci20.dtb
  dtb-$(CONFIG_SOC_LUTON) += luton_pcb090.dtb luton_pcb091.dtb
  dtb-$(CONFIG_SOC_OCELOT) += ocelot_pcb120.dtb ocelot_pcb123.dtb
diff --git a/arch/mips/dts/vocore_vocore2.dts b/arch/mips/dts/vocore_vocore2.dts
new file mode 100644
index 00..3502e4b8b7
--- /dev/null
+++ b/arch/mips/dts/vocore_vocore2.dts
@@ -0,0 +1,85 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019 Mauro Condarelli 
+ */
+
+/dts-v1/;
+
+#include "mt7628a.dtsi"
+#include 
+
+/ {
+   compatible = "vocore,vocore2", "ralink,mt7628a-soc";
+   model = "VoCore2";
+
+   aliases {
+   serial0 = 
+   spi0 = 
+   };
+
+   memory@0 {
+   device_type = "memory";
+   reg = <0x0 0x0800>;
+   };


Nitpicking: It looks nicer with an empty line here as well. But no
need to send v7 because of this. Other than this:

Reviewed-by: Stefan Roese 

Thanks,
Stefan


+   leds {
+   compatible = "gpio-leds";
+
+   power {
+   label = "vocore:power";
+   gpios = < 12 GPIO_ACTIVE_HIGH>;
+   default-state = "off";
+   };
+   };
+
+   chosen {
+   bootargs = "console=ttyS2,115200";
+   stdout-path = 
+   };
+};
+
+ {
+   state_default: pin_state {
+   p0led {
+   groups = "p0led_a";
+   function = "led";
+   };
+   };
+};
+
+ {
+   status = "okay";
+
+   pinctrl-names = "default";
+   pinctrl-0 = <_pwm_pins>;
+};
+
+ {
+   status = "okay";
+   nor0: spi-flash@0 {
+   #address-cells = <1>;
+   #size-cells = <1>;
+   compatible = "jedec,spi-nor";
+   spi-max-frequency = <2500>;
+   reg = <0>;
+   };
+};
+
+ {
+   status = "okay";
+
+   pinctrl-names = 

Re: [PATCH] arm: mvebu: clearfog: add scsi target to distro-boot

[Stefan Roese]

On 17.02.20 19:37, Josua Mayer wrote:

Support for sata devices via the scsi command is available and already
enabled by default for the Clearfog Base and Pro. This change adds scsi
to the list of boot targets used by distro-boot.

Signed-off-by: Josua Mayer 
Cc: Stefan Roese 


Reviewed-by: Stefan Roese 

Thanks,
Stefan


---
  include/configs/clearfog.h | 7 +++
  1 file changed, 7 insertions(+)

diff --git a/include/configs/clearfog.h b/include/configs/clearfog.h
index 633187d86f..33c71b3d51 100644
--- a/include/configs/clearfog.h
+++ b/include/configs/clearfog.h
@@ -104,6 +104,12 @@
  #define BOOT_TARGET_DEVICES_MMC(func)
  #endif
  
+#ifdef CONFIG_SCSI

+#define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0)
+#else
+#define BOOT_TARGET_DEVICES_SCSI(func)
+#endif
+
  #ifdef CONFIG_USB_STORAGE
  #define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0)
  #else
@@ -112,6 +118,7 @@
  
  #define BOOT_TARGET_DEVICES(func) \

BOOT_TARGET_DEVICES_MMC(func) \
+   BOOT_TARGET_DEVICES_SCSI(func) \
BOOT_TARGET_DEVICES_USB(func) \
func(PXE, pxe, na) \
func(DHCP, dhcp, na)




Viele Grüße,
Stefan

--
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: s...@denx.de

RE: [PATCH] arch: arm: Fix SZ_64K undeclared compilation error

[Priyanka Jain (OSS)]

>-Original Message-
>From: U-Boot  On Behalf Of Bharat Kumar
>Reddy
>Sent: Tuesday, February 18, 2020 4:19 PM
>To: Wasim Khan ; Priyanka Jain
>; vladimir.olovyanni...@broadcom.com
>Cc: u-boot@lists.denx.de
>Subject: Re: [PATCH] arch: arm: Fix SZ_64K undeclared compilation error
>
>Looks good to me.
>
>On 14/02/20 11:00 am, Wasim Khan wrote:
>> Macro SZ_64K is undeclared. Include sizes.h to fix the compilation
>> error.
>>
>> Signed-off-by: Wasim Khan 
>> ---
>>   arch/arm/lib/gic-v3-its.c | 1 +
>>   1 file changed, 1 insertion(+)
>>
>> diff --git a/arch/arm/lib/gic-v3-its.c b/arch/arm/lib/gic-v3-its.c
>> index e19ab01..6ee22d2 100644
>> --- a/arch/arm/lib/gic-v3-its.c
>> +++ b/arch/arm/lib/gic-v3-its.c
>> @@ -6,6 +6,7 @@
>>   #include 
>>   #include 
>>   #include 
>> +#include 
>>
>>   static u32 lpi_id_bits;
>>
Tom,
Some of patches in my backlog are dependent on this. Can you please apply this 
fix.

Thanks
priyankajain

[PATCH] bdinfo: Show information about fdt blob via bdinfo

[Heiko Schocher]

PowerPC target supports OF booting, so print the
fdt address and size in bdinfo.

Signed-off-by: Heiko Schocher 
---
Travis build:
https://travis-ci.org/hsdenx/u-boot-test/builds/651885430

 cmd/bdinfo.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/cmd/bdinfo.c b/cmd/bdinfo.c
index d6a7175b37..42b0f49b1a 100644
--- a/cmd/bdinfo.c
+++ b/cmd/bdinfo.c
@@ -208,6 +208,9 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
print_baudrate();
print_num("relocaddr", gd->relocaddr);
board_detail();
+   print_num("fdt_blob", (ulong)gd->fdt_blob);
+   print_num("new_fdt", (ulong)gd->new_fdt);
+   print_num("fdt_size", (ulong)gd->fdt_size);
return 0;
 }
 
-- 
2.24.1

Re: [PATCH] doc: i2c: gpio: Document deblock sequence on probe

[Heiko Schocher]

Hello Marek,

Am 18.02.2020 um 18:24 schrieb Marek Vasut:

Document the gpio-i2c deblocking sequence binding.

Signed-off-by: Marek Vasut 
---
  doc/device-tree-bindings/i2c/i2c-gpio.txt | 2 ++
  1 file changed, 2 insertions(+)


Thanks!

Reviewed-by: Heiko Schocher 

bye,
Heiko
--
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-52   Fax: +49-8142-66989-80   Email: h...@denx.de

Re: [PATCH v4 07/17] spi: dw: Add mem_ops

[Sean Anderson]

On 2/18/20 8:39 PM, Rick Chen wrote:
>>>
>>> Patch 6 and 7 shall be applied via spi tree.
>>> You mix them together, the patchwork will become complicated.
>>> It will be better for me to wait for a period of time to get the
>>> approval(Reviewed-by or Acked-by) of SPI MAINTAINER.
>>>
>>> Thanks
>>> Rick
>>
>> So is this just waiting for approval, or is there a change I should make
>> on my end?
> 
> If they are not highly dependent, you shall separate and send them 
> individually.
> But we can wait for few days and see, if it still no response.
> You can consider separate them.

These patches add support for the on-board spi flash. In the past I have
separated out some unrelated patches, and have been told to keep them in
a series where they are used.

--Sean

[PATCH v2 4/4] pci: Avoid auto-config when chain loading

[Simon Glass]

When U-Boot is not the first-stage bootloader we don't want to
re-configure the PCI devices, since this has already been done. Add a
check to avoid this.

Signed-off-by: Simon Glass 
---

Changes in v2:
- Drop patch 'dm: Avoid initing built-in devices when chain loading'

 drivers/pci/pci-uclass.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c
index 5be2dfd0bf..0ad63b41ac 100644
--- a/drivers/pci/pci-uclass.c
+++ b/drivers/pci/pci-uclass.c
@@ -1004,7 +1004,7 @@ static int pci_uclass_post_probe(struct udevice *bus)
if (ret)
return ret;
 
-   if (CONFIG_IS_ENABLED(PCI_PNP) &&
+   if (CONFIG_IS_ENABLED(PCI_PNP) && ll_boot_init() &&
(!hose->skip_auto_config_until_reloc ||
 (gd->flags & GD_FLG_RELOC))) {
ret = pci_auto_config_devices(bus);
@@ -1026,7 +1026,7 @@ static int pci_uclass_post_probe(struct udevice *bus)
 * Note we only call this 1) after U-Boot is relocated, and 2)
 * root bus has finished probing.
 */
-   if ((gd->flags & GD_FLG_RELOC) && (bus->seq == 0)) {
+   if ((gd->flags & GD_FLG_RELOC) && bus->seq == 0 && ll_boot_init()) {
ret = fsp_init_phase_pci();
if (ret)
return ret;
-- 
2.25.0.265.gbab2e86ba0-goog

[PATCH v2 2/4] x86: apl: Skip init code when chain loading

[Simon Glass]

When U-Boot is not the first-stage bootloader the FSP-S init must be
skipped. Update it to add a check.

Signed-off-by: Simon Glass 
---

Changes in v2: None

 arch/x86/cpu/apollolake/fsp_s.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/x86/cpu/apollolake/fsp_s.c b/arch/x86/cpu/apollolake/fsp_s.c
index b2d9130841..3ee816f44b 100644
--- a/arch/x86/cpu/apollolake/fsp_s.c
+++ b/arch/x86/cpu/apollolake/fsp_s.c
@@ -565,6 +565,8 @@ int arch_fsp_init_r(void)
struct udevice *dev, *itss;
int ret;
 
+   if (!ll_boot_init())
+   return 0;
/*
 * This must be called before any devices are probed. Put any probing
 * into arch_fsps_preinit() above.
-- 
2.25.0.265.gbab2e86ba0-goog

[PATCH v2 3/4] x86: cpu: Skip init code when chain loading

[Simon Glass]

When U-Boot is not the first-stage bootloader the interrupt and cache init
must be skipped, as well as init for various peripherals. Update the code
to add checks for this.

Signed-off-by: Simon Glass 
---

Changes in v2:
- Drop the other check in interrupt_init() which is not needed now

 arch/x86/cpu/cpu.c| 4 +++-
 arch/x86/cpu/i386/interrupt.c | 6 --
 arch/x86/lib/init_helpers.c   | 3 +++
 3 files changed, 10 insertions(+), 3 deletions(-)

diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/cpu.c
index dae06949cc..3db035c2c0 100644
--- a/arch/x86/cpu/cpu.c
+++ b/arch/x86/cpu/cpu.c
@@ -239,8 +239,10 @@ int cpu_init_r(void)
struct udevice *dev;
int ret;
 
-   if (!ll_boot_init())
+   if (!ll_boot_init()) {
+   uclass_first_device(UCLASS_PCI, );
return 0;
+   }
 
ret = x86_init_cpus();
if (ret)
diff --git a/arch/x86/cpu/i386/interrupt.c b/arch/x86/cpu/i386/interrupt.c
index 4c7e9ea215..e67a116ac1 100644
--- a/arch/x86/cpu/i386/interrupt.c
+++ b/arch/x86/cpu/i386/interrupt.c
@@ -264,6 +264,9 @@ int interrupt_init(void)
struct udevice *dev;
int ret;
 
+   if (!ll_boot_init())
+   return 0;
+
/* Try to set up the interrupt router, but don't require one */
ret = irq_first_device_type(X86_IRQT_BASE, );
if (ret && ret != -ENODEV)
@@ -295,8 +298,7 @@ int interrupt_init(void)
 * TODO(s...@chromium.org): But we don't handle these correctly when
 * booted from EFI.
 */
-   if (ll_boot_init())
-   enable_interrupts();
+   enable_interrupts();
 #endif
 
return 0;
diff --git a/arch/x86/lib/init_helpers.c b/arch/x86/lib/init_helpers.c
index 5bb55e256f..d906b528b3 100644
--- a/arch/x86/lib/init_helpers.c
+++ b/arch/x86/lib/init_helpers.c
@@ -30,6 +30,9 @@ int init_cache_f_r(void)
return ret;
}
 
+   if (!ll_boot_init())
+   return 0;
+
/* Initialise the CPU cache(s) */
return init_cache();
 }
-- 
2.25.0.265.gbab2e86ba0-goog

[PATCH v2 1/4] x86: fsp: Allow skipping init code when chain loading

[Simon Glass]

It is useful to be able to boot the same x86 image on a device with or
without a first-stage bootloader. For example, with chromebook_coral, it
is helpful for testing to be able to boot the same U-Boot (complete with
FSP) on bare metal and from coreboot. It allows checking of things like
CPU speed, comparing registers, ACPI tables and the like.

When U-Boot is not the first-stage bootloader much of this code is not
needed and can break booting. Add checks for this to the FSP code.

Rather than checking for the amount of available SDRAM, just use 1GB in
this situation, which should be safe. Using 2GB may run into a memory
hole on some SoCs.

Signed-off-by: Simon Glass 
---

Changes in v2: None

 arch/x86/lib/fsp/fsp_dram.c |  8 
 arch/x86/lib/fsp/fsp_graphics.c |  3 +++
 arch/x86/lib/fsp2/fsp_dram.c| 10 ++
 arch/x86/lib/fsp2/fsp_init.c|  2 +-
 4 files changed, 22 insertions(+), 1 deletion(-)

diff --git a/arch/x86/lib/fsp/fsp_dram.c b/arch/x86/lib/fsp/fsp_dram.c
index 9ce0ddf0d3..15e82de2fe 100644
--- a/arch/x86/lib/fsp/fsp_dram.c
+++ b/arch/x86/lib/fsp/fsp_dram.c
@@ -44,6 +44,14 @@ int dram_init_banksize(void)
phys_addr_t low_end;
uint bank;
 
+   if (!ll_boot_init()) {
+   gd->bd->bi_dram[0].start = 0;
+   gd->bd->bi_dram[0].size = gd->ram_size;
+
+   mtrr_add_request(MTRR_TYPE_WRBACK, 0, gd->ram_size);
+   return 0;
+   }
+
low_end = 0;
for (bank = 1, hdr = gd->arch.hob_list;
 bank < CONFIG_NR_DRAM_BANKS && !end_of_hob(hdr);
diff --git a/arch/x86/lib/fsp/fsp_graphics.c b/arch/x86/lib/fsp/fsp_graphics.c
index 226c7e66b3..98b762209f 100644
--- a/arch/x86/lib/fsp/fsp_graphics.c
+++ b/arch/x86/lib/fsp/fsp_graphics.c
@@ -78,6 +78,9 @@ static int fsp_video_probe(struct udevice *dev)
struct vesa_mode_info *vesa = _info.vesa;
int ret;
 
+   if (!ll_boot_init())
+   return 0;
+
printf("Video: ");
 
/* Initialize vesa_mode_info structure */
diff --git a/arch/x86/lib/fsp2/fsp_dram.c b/arch/x86/lib/fsp2/fsp_dram.c
index 90a238a224..74835eebce 100644
--- a/arch/x86/lib/fsp2/fsp_dram.c
+++ b/arch/x86/lib/fsp2/fsp_dram.c
@@ -12,11 +12,18 @@
 #include 
 #include 
 #include 
+#include 
 
 int dram_init(void)
 {
int ret;
 
+   if (!ll_boot_init()) {
+   /* Use a small and safe amount of 1GB */
+   gd->ram_size = SZ_1G;
+
+   return 0;
+   }
if (spl_phase() == PHASE_SPL) {
 #ifdef CONFIG_HAVE_ACPI_RESUME
bool s3wake = gd->arch.prev_sleep_state == ACPI_S3;
@@ -68,6 +75,9 @@ int dram_init(void)
 
 ulong board_get_usable_ram_top(ulong total_size)
 {
+   if (!ll_boot_init())
+   return gd->ram_size;
+
 #if CONFIG_IS_ENABLED(HANDOFF)
struct spl_handoff *ho = gd->spl_handoff;
 
diff --git a/arch/x86/lib/fsp2/fsp_init.c b/arch/x86/lib/fsp2/fsp_init.c
index da9bd6b45c..c7dc2ea257 100644
--- a/arch/x86/lib/fsp2/fsp_init.c
+++ b/arch/x86/lib/fsp2/fsp_init.c
@@ -23,7 +23,7 @@ int arch_cpu_init_dm(void)
int ret;
 
/* Make sure pads are set up early in U-Boot */
-   if (spl_phase() != PHASE_BOARD_F)
+   if (!ll_boot_init() || spl_phase() != PHASE_BOARD_F)
return 0;
 
/* Probe all pinctrl devices to set up the pads */
-- 
2.25.0.265.gbab2e86ba0-goog

[PATCH v2 0/4] x86: Improve support for chain-loading U-Boot

[Simon Glass]

This little series adds a few checks into the code to allow better
operation when booting a build from a previous-state loader such as
coreboot.

At present we have a 'coreboot' target but this runs very different code
from the bare-metal targets, such as coral. There is very little in common
between them.

It is useful to be able to boot the same U-Boot on a device, with or
without a first-stage bootloader. For example, with chromebook_coral, it
is helpful for testing to be able to boot the same U-Boot (complete with
FSP) on bare metal and from coreboot. It allows checking of things like
CPU speed, comparing registers, ACPI tables and the like.

The idea is to change ll_boot_init() to false, and rebuild without changing
anything else.

This series makes the most important changes to allow coral to boot on
coreboot.

Changes in v2:
- Drop the other check in interrupt_init() which is not needed now
- Drop patch 'dm: Avoid initing built-in devices when chain loading'

Simon Glass (4):
  x86: fsp: Allow skipping init code when chain loading
  x86: apl: Skip init code when chain loading
  x86: cpu: Skip init code when chain loading
  pci: Avoid auto-config when chain loading

 arch/x86/cpu/apollolake/fsp_s.c |  2 ++
 arch/x86/cpu/cpu.c  |  4 +++-
 arch/x86/cpu/i386/interrupt.c   |  6 --
 arch/x86/lib/fsp/fsp_dram.c |  8 
 arch/x86/lib/fsp/fsp_graphics.c |  3 +++
 arch/x86/lib/fsp2/fsp_dram.c| 10 ++
 arch/x86/lib/fsp2/fsp_init.c|  2 +-
 arch/x86/lib/init_helpers.c |  3 +++
 drivers/pci/pci-uclass.c|  4 ++--
 9 files changed, 36 insertions(+), 6 deletions(-)

-- 
2.25.0.265.gbab2e86ba0-goog

[PATCH 05/10] usb: dwc3-generic: Use dev_read_addr() instead of devfdt_get_addr()

[Kever Yang]

Use more common API so that we can support live DT.

Signed-off-by: Kever Yang 
---

 drivers/usb/dwc3/dwc3-generic.c | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/usb/dwc3/dwc3-generic.c b/drivers/usb/dwc3/dwc3-generic.c
index 820cc7075c..ced0f53bfd 100644
--- a/drivers/usb/dwc3/dwc3-generic.c
+++ b/drivers/usb/dwc3/dwc3-generic.c
@@ -88,17 +88,17 @@ static int dwc3_generic_remove(struct udevice *dev,
 static int dwc3_generic_ofdata_to_platdata(struct udevice *dev)
 {
struct dwc3_generic_plat *plat = dev_get_platdata(dev);
-   int node = dev_of_offset(dev);
+   ofnode node = dev->node;
 
-   plat->base = devfdt_get_addr(dev);
+   plat->base = dev_read_addr(dev);
 
-   plat->maximum_speed = usb_get_maximum_speed(node);
+   plat->maximum_speed = usb_get_maximum_speed(ofnode_to_offset(node));
if (plat->maximum_speed == USB_SPEED_UNKNOWN) {
pr_info("No USB maximum speed specified. Using super speed\n");
plat->maximum_speed = USB_SPEED_SUPER;
}
 
-   plat->dr_mode = usb_get_dr_mode(node);
+   plat->dr_mode = usb_get_dr_mode(ofnode_to_offset(node));
if (plat->dr_mode == USB_DR_MODE_UNKNOWN) {
pr_err("Invalid usb mode setup\n");
return -ENODEV;
-- 
2.17.1

[PATCH 10/10] usb: Use ofnode as usb_get_maximum_speed() parameter

[Kever Yang]

ofnode is more common and no need to convert to offset after we migrate
other API to use ofnode.

Signed-off-by: Kever Yang 
---

 drivers/usb/cdns3/gadget.c  | 2 +-
 drivers/usb/common/common.c | 5 ++---
 drivers/usb/dwc3/dwc3-generic.c | 2 +-
 include/linux/usb/otg.h | 4 ++--
 4 files changed, 6 insertions(+), 7 deletions(-)

diff --git a/drivers/usb/cdns3/gadget.c b/drivers/usb/cdns3/gadget.c
index 0e02b77965..2a8838c4cb 100644
--- a/drivers/usb/cdns3/gadget.c
+++ b/drivers/usb/cdns3/gadget.c
@@ -2576,7 +2576,7 @@ static int cdns3_gadget_start(struct cdns3 *cdns)
if (!priv_dev->onchip_buffers)
priv_dev->onchip_buffers = 256;
 
-   max_speed = usb_get_maximum_speed(dev_of_offset(cdns->dev));
+   max_speed = usb_get_maximum_speed(dev_ofnode(cdns->dev));
 
/* Check the maximum_speed parameter */
switch (max_speed) {
diff --git a/drivers/usb/common/common.c b/drivers/usb/common/common.c
index 4300f711a9..0db281b970 100644
--- a/drivers/usb/common/common.c
+++ b/drivers/usb/common/common.c
@@ -47,13 +47,12 @@ static const char *const speed_names[] = {
[USB_SPEED_SUPER] = "super-speed",
 };
 
-enum usb_device_speed usb_get_maximum_speed(int node)
+enum usb_device_speed usb_get_maximum_speed(ofnode node)
 {
-   const void *fdt = gd->fdt_blob;
const char *max_speed;
int i;
 
-   max_speed = fdt_getprop(fdt, node, "maximum-speed", NULL);
+   max_speed = ofnode_read_string(node, "maximum-speed");
if (!max_speed) {
pr_err("usb maximum-speed not found\n");
return USB_SPEED_UNKNOWN;
diff --git a/drivers/usb/dwc3/dwc3-generic.c b/drivers/usb/dwc3/dwc3-generic.c
index 7178f12b47..febcfc0f54 100644
--- a/drivers/usb/dwc3/dwc3-generic.c
+++ b/drivers/usb/dwc3/dwc3-generic.c
@@ -92,7 +92,7 @@ static int dwc3_generic_ofdata_to_platdata(struct udevice 
*dev)
 
plat->base = dev_read_addr(dev);
 
-   plat->maximum_speed = usb_get_maximum_speed(ofnode_to_offset(node));
+   plat->maximum_speed = usb_get_maximum_speed(node);
if (plat->maximum_speed == USB_SPEED_UNKNOWN) {
pr_info("No USB maximum speed specified. Using super speed\n");
plat->maximum_speed = USB_SPEED_SUPER;
diff --git a/include/linux/usb/otg.h b/include/linux/usb/otg.h
index 6ba53fc598..5c67c5b116 100644
--- a/include/linux/usb/otg.h
+++ b/include/linux/usb/otg.h
@@ -27,11 +27,11 @@ enum usb_dr_mode usb_get_dr_mode(ofnode node);
 
 /**
  * usb_get_maximum_speed() - Get maximum speed for given device
- * @node: Node offset to the given device
+ * @node: ofnode of the given device
  *
  * The function gets phy interface string from property 'maximum-speed',
  * and returns the correspondig enum usb_device_speed
  */
-enum usb_device_speed usb_get_maximum_speed(int node);
+enum usb_device_speed usb_get_maximum_speed(ofnode node);
 
 #endif /* __LINUX_USB_OTG_H */
-- 
2.17.1

[PATCH 06/10] usb: host: dwc3-sti-glue: Migrate to use ofnode API

[Kever Yang]

Use ofnode_ instead of fdt_ or fdtdec_ APIs so that the driver can support
live DT.

Signed-off-by: Kever Yang 
---

 drivers/usb/host/dwc3-sti-glue.c | 22 --
 1 file changed, 8 insertions(+), 14 deletions(-)

diff --git a/drivers/usb/host/dwc3-sti-glue.c b/drivers/usb/host/dwc3-sti-glue.c
index ad7cf6e6b5..36c7d4037c 100644
--- a/drivers/usb/host/dwc3-sti-glue.c
+++ b/drivers/usb/host/dwc3-sti-glue.c
@@ -10,8 +10,6 @@
 #include 
 #include 
 #include 
-#include 
-#include 
 #include 
 #include 
 #include 
@@ -109,8 +107,7 @@ static int sti_dwc3_glue_ofdata_to_platdata(struct udevice 
*dev)
int ret;
u32 reg[4];
 
-   ret = fdtdec_get_int_array(gd->fdt_blob, dev_of_offset(dev),
-  "reg", reg, ARRAY_SIZE(reg));
+   ret = ofnode_read_u32_array(dev->node, "reg", reg, ARRAY_SIZE(reg));
if (ret) {
pr_err("unable to find st,stih407-dwc3 reg property(%d)\n", 
ret);
return ret;
@@ -153,24 +150,21 @@ static int sti_dwc3_glue_ofdata_to_platdata(struct 
udevice *dev)
 static int sti_dwc3_glue_bind(struct udevice *dev)
 {
struct sti_dwc3_glue_platdata *plat = dev_get_platdata(dev);
-   int dwc3_node;
+   ofnode dwc3_node;
 
-   /* check if one subnode is present */
-   dwc3_node = fdt_first_subnode(gd->fdt_blob, dev_of_offset(dev));
-   if (dwc3_node <= 0) {
-   pr_err("Can't find subnode for %s\n", dev->name);
-   return -ENODEV;
+   /* Find snps,dwc3 node from subnode */
+   ofnode_for_each_subnode(node, dev->node) {
+   if (ofnode_device_is_compatible(node, "snps,dwc3"))
+   dwc3_node = node;
}
 
-   /* check if the subnode compatible string is the dwc3 one*/
-   if (fdt_node_check_compatible(gd->fdt_blob, dwc3_node,
- "snps,dwc3") != 0) {
+   if (!ofnode_valid(node)) {
pr_err("Can't find dwc3 subnode for %s\n", dev->name);
return -ENODEV;
}
 
/* retrieve the DWC3 dual role mode */
-   plat->mode = usb_get_dr_mode(dwc3_node);
+   plat->mode = usb_get_dr_mode(ofnode_to_offset(dwc3_node));
if (plat->mode == USB_DR_MODE_UNKNOWN)
/* by default set dual role mode to HOST */
plat->mode = USB_DR_MODE_HOST;
-- 
2.17.1

[PATCH 09/10] usb: Use ofnode as usb_get_dr_mode() parameter

[Kever Yang]

ofnode is more common and no need to convert to offset after we migrate
other API to use ofnode.

Signed-off-by: Kever Yang 
---

 drivers/usb/cdns3/core.c   | 2 +-
 drivers/usb/common/common.c| 7 +++
 drivers/usb/dwc3/dwc3-generic.c| 6 +++---
 drivers/usb/dwc3/dwc3-meson-g12a.c | 2 +-
 drivers/usb/gadget/dwc2_udc_otg.c  | 5 ++---
 drivers/usb/host/dwc3-sti-glue.c   | 2 +-
 drivers/usb/host/ehci-mx6.c| 2 +-
 drivers/usb/host/xhci-dwc3.c   | 3 +--
 drivers/usb/musb-new/ti-musb.c | 2 +-
 include/linux/usb/otg.h| 4 ++--
 10 files changed, 16 insertions(+), 19 deletions(-)

diff --git a/drivers/usb/cdns3/core.c b/drivers/usb/cdns3/core.c
index d6ccd3e73c..0b543fed3d 100644
--- a/drivers/usb/cdns3/core.c
+++ b/drivers/usb/cdns3/core.c
@@ -106,7 +106,7 @@ static int cdns3_core_init_role(struct cdns3 *cdns)
enum usb_dr_mode dr_mode;
int ret = 0;
 
-   dr_mode = usb_get_dr_mode(dev_of_offset(dev));
+   dr_mode = usb_get_dr_mode(dev->node);
cdns->role = USB_ROLE_NONE;
 
/*
diff --git a/drivers/usb/common/common.c b/drivers/usb/common/common.c
index a55def5aba..4300f711a9 100644
--- a/drivers/usb/common/common.c
+++ b/drivers/usb/common/common.c
@@ -7,7 +7,7 @@
  */
 
 #include 
-#include 
+#include 
 #include 
 #include 
 
@@ -20,13 +20,12 @@ static const char *const usb_dr_modes[] = {
[USB_DR_MODE_OTG]   = "otg",
 };
 
-enum usb_dr_mode usb_get_dr_mode(int node)
+enum usb_dr_mode usb_get_dr_mode(ofnode node)
 {
-   const void *fdt = gd->fdt_blob;
const char *dr_mode;
int i;
 
-   dr_mode = fdt_getprop(fdt, node, "dr_mode", NULL);
+   dr_mode = ofnode_read_string(node, "dr_mode");
if (!dr_mode) {
pr_err("usb dr_mode not found\n");
return USB_DR_MODE_UNKNOWN;
diff --git a/drivers/usb/dwc3/dwc3-generic.c b/drivers/usb/dwc3/dwc3-generic.c
index ced0f53bfd..7178f12b47 100644
--- a/drivers/usb/dwc3/dwc3-generic.c
+++ b/drivers/usb/dwc3/dwc3-generic.c
@@ -98,7 +98,7 @@ static int dwc3_generic_ofdata_to_platdata(struct udevice 
*dev)
plat->maximum_speed = USB_SPEED_SUPER;
}
 
-   plat->dr_mode = usb_get_dr_mode(ofnode_to_offset(node));
+   plat->dr_mode = usb_get_dr_mode(node);
if (plat->dr_mode == USB_DR_MODE_UNKNOWN) {
pr_err("Invalid usb mode setup\n");
return -ENODEV;
@@ -295,7 +295,7 @@ static int dwc3_glue_bind(struct udevice *parent)
 
debug("%s: subnode name: %s\n", __func__, name);
 
-   dr_mode = usb_get_dr_mode(ofnode_to_offset(node));
+   dr_mode = usb_get_dr_mode(node);
 
switch (dr_mode) {
case USB_DR_MODE_PERIPHERAL:
@@ -398,7 +398,7 @@ static int dwc3_glue_probe(struct udevice *dev)
while (child) {
enum usb_dr_mode dr_mode;
 
-   dr_mode = usb_get_dr_mode(dev_of_offset(child));
+   dr_mode = usb_get_dr_mode(child->node);
device_find_next_child();
if (ops && ops->select_dr_mode)
ops->select_dr_mode(dev, index, dr_mode);
diff --git a/drivers/usb/dwc3/dwc3-meson-g12a.c 
b/drivers/usb/dwc3/dwc3-meson-g12a.c
index 832bcd70ff..d4453f8784 100644
--- a/drivers/usb/dwc3/dwc3-meson-g12a.c
+++ b/drivers/usb/dwc3/dwc3-meson-g12a.c
@@ -393,7 +393,7 @@ static int dwc3_meson_g12a_probe(struct udevice *dev)
}
 #endif
 
-   priv->otg_mode = usb_get_dr_mode(dev_of_offset(dev));
+   priv->otg_mode = usb_get_dr_mode(dev->node);
 
ret = dwc3_meson_g12a_usb_init(priv);
if (ret)
diff --git a/drivers/usb/gadget/dwc2_udc_otg.c 
b/drivers/usb/gadget/dwc2_udc_otg.c
index 35f4147840..70a7313244 100644
--- a/drivers/usb/gadget/dwc2_udc_otg.c
+++ b/drivers/usb/gadget/dwc2_udc_otg.c
@@ -1036,13 +1036,12 @@ void dwc2_phy_shutdown(struct udevice *dev, struct phy 
*usb_phys, int num_phys)
 static int dwc2_udc_otg_ofdata_to_platdata(struct udevice *dev)
 {
struct dwc2_plat_otg_data *platdata = dev_get_platdata(dev);
-   int node = dev_of_offset(dev);
ulong drvdata;
void (*set_params)(struct dwc2_plat_otg_data *data);
int ret;
 
-   if (usb_get_dr_mode(node) != USB_DR_MODE_PERIPHERAL &&
-   usb_get_dr_mode(node) != USB_DR_MODE_OTG) {
+   if (usb_get_dr_mode(dev->node) != USB_DR_MODE_PERIPHERAL &&
+   usb_get_dr_mode(dev->node) != USB_DR_MODE_OTG) {
dev_dbg(dev, "Invalid mode\n");
return -ENODEV;
}
diff --git a/drivers/usb/host/dwc3-sti-glue.c b/drivers/usb/host/dwc3-sti-glue.c
index 36c7d4037c..1cbf0df1ea 100644
--- a/drivers/usb/host/dwc3-sti-glue.c
+++ b/drivers/usb/host/dwc3-sti-glue.c
@@ -164,7 +164,7 @@ static int sti_dwc3_glue_bind(struct udevice *dev)
}
 
/* retrieve the DWC3 dual role mode */
-   plat->mode = usb_get_dr_mode(ofnode_to_offset(dwc3_node));
+   

[PATCH 07/10] usb: musb-new: Migrate to use ofnode API

[Kever Yang]

Use ofnode_ instead of fdt_ APIs so that the driver can support live DT.

Signed-off-by: Kever Yang 
---

 drivers/usb/musb-new/ti-musb.c | 14 ++
 1 file changed, 6 insertions(+), 8 deletions(-)

diff --git a/drivers/usb/musb-new/ti-musb.c b/drivers/usb/musb-new/ti-musb.c
index 20ca2731b4..28172c9c99 100644
--- a/drivers/usb/musb-new/ti-musb.c
+++ b/drivers/usb/musb-new/ti-musb.c
@@ -284,28 +284,26 @@ U_BOOT_DRIVER(ti_musb_peripheral) = {
 #if CONFIG_IS_ENABLED(OF_CONTROL)
 static int ti_musb_wrapper_bind(struct udevice *parent)
 {
-   const void *fdt = gd->fdt_blob;
-   int node;
+   ofnode node;
int ret;
 
-   for (node = fdt_first_subnode(fdt, dev_of_offset(parent)); node > 0;
-node = fdt_next_subnode(fdt, node)) {
+   ofnode_for_each_subnode(node, parent->node) {
struct udevice *dev;
-   const char *name = fdt_get_name(fdt, node, NULL);
+   const char *name = ofnode_get_name(node);
enum usb_dr_mode dr_mode;
struct driver *drv;
 
if (strncmp(name, "usb@", 4))
continue;
 
-   dr_mode = usb_get_dr_mode(node);
+   dr_mode = usb_get_dr_mode(ofnode_to_offset(node));
switch (dr_mode) {
case USB_DR_MODE_PERIPHERAL:
/* Bind MUSB device */
ret = device_bind_driver_to_node(parent,
 "ti-musb-peripheral",
 name,
-offset_to_ofnode(node),
+node,
 );
if (ret)
pr_err("musb - not able to bind usb peripheral 
node\n");
@@ -315,7 +313,7 @@ static int ti_musb_wrapper_bind(struct udevice *parent)
ret = device_bind_driver_to_node(parent,
 "ti-musb-host",
 name,
-offset_to_ofnode(node),
+node,
 );
if (ret)
pr_err("musb - not able to bind usb host 
node\n");
-- 
2.17.1

[PATCH 08/10] usb: dwc3: core: reorder the header file including sequence

[Kever Yang]

Make the including header file in correct sequence.

Signed-off-by: Kever Yang 
---

 drivers/usb/dwc3/core.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 77c555e769..504d85a9b7 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -15,12 +15,12 @@
 
 #include 
 #include 
-#include 
+#include 
 #include 
+#include 
+#include 
 #include 
 #include 
-#include 
-#include 
 #include 
 #include 
 
-- 
2.17.1

[PATCH 00/10] usb: Covert to support Live DT

[Kever Yang]

This patch set convert to use APIs leading with dev_ or ofnode_ which
supports live DT instead of fdt_ or fdtdec or devfdt_.
Two functions update there parameter from offset to ofnode:
- usb_get_maximum_speed()
- usb_get_dr_mode()



Kever Yang (10):
  usb: dwc3-of-simple: Drop redundant inclding header file
  usb: ehci-msm: Use dev interface to get device address
  usb: cdns3: Migrate to use ofnode API for bind function
  usb: dwc3-generic: Migrate to use ofnode API for bind function
  usb: dwc3-generic: Use dev_read_addr() instead of devfdt_get_addr()
  usb: host: dwc3-sti-glue: Migrate to use ofnode API
  usb: musb-new: Migrate to use ofnode API
  usb: dwc3: core: reorder the header file including sequence
  usb: Use ofnode as usb_get_dr_mode() parameter
  usb: Use ofnode as usb_get_maximum_speed() parameter

 drivers/usb/cdns3/core.c   | 17 +++--
 drivers/usb/cdns3/gadget.c |  2 +-
 drivers/usb/common/common.c| 12 +---
 drivers/usb/dwc3/core.c|  6 +++---
 drivers/usb/dwc3/dwc3-generic.c| 16 +++-
 drivers/usb/dwc3/dwc3-meson-g12a.c |  2 +-
 drivers/usb/gadget/dwc2_udc_otg.c  |  5 ++---
 drivers/usb/host/dwc3-of-simple.c  |  1 -
 drivers/usb/host/dwc3-sti-glue.c   | 20 +++-
 drivers/usb/host/ehci-msm.c|  4 +---
 drivers/usb/host/ehci-mx6.c|  2 +-
 drivers/usb/host/xhci-dwc3.c   |  3 +--
 drivers/usb/musb-new/ti-musb.c | 12 +---
 include/linux/usb/otg.h|  8 
 14 files changed, 45 insertions(+), 65 deletions(-)

-- 
2.17.1

[PATCH 01/10] usb: dwc3-of-simple: Drop redundant inclding header file

[Kever Yang]

The fdtdec.h is no use in this file, remove the include code.

Signed-off-by: Kever Yang 
---

 drivers/usb/host/dwc3-of-simple.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/usb/host/dwc3-of-simple.c 
b/drivers/usb/host/dwc3-of-simple.c
index 45df614b09..e4abc6f3b9 100644
--- a/drivers/usb/host/dwc3-of-simple.c
+++ b/drivers/usb/host/dwc3-of-simple.c
@@ -12,7 +12,6 @@
 
 #include 
 #include 
-#include 
 #include 
 #include 
 
-- 
2.17.1

[PATCH 02/10] usb: ehci-msm: Use dev interface to get device address

[Kever Yang]

Use dev_read_addr_ptr() instead of devfdt_get_addr() so that we can support
live DT.

Signed-off-by: Kever Yang 
---

 drivers/usb/host/ehci-msm.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/drivers/usb/host/ehci-msm.c b/drivers/usb/host/ehci-msm.c
index 5c257ccf4d..dd92808ff7 100644
--- a/drivers/usb/host/ehci-msm.c
+++ b/drivers/usb/host/ehci-msm.c
@@ -10,8 +10,6 @@
 #include 
 #include 
 #include 
-#include 
-#include 
 #include 
 #include 
 #include 
@@ -108,7 +106,7 @@ static int ehci_usb_ofdata_to_platdata(struct udevice *dev)
struct msm_ehci_priv *priv = dev_get_priv(dev);
 
priv->ulpi_vp.port_num = 0;
-   priv->ehci = (void *)devfdt_get_addr(dev);
+   priv->ehci = dev_read_addr_ptr(dev);
 
if (priv->ehci == (void *)FDT_ADDR_T_NONE)
return -EINVAL;
-- 
2.17.1

[PATCH 04/10] usb: dwc3-generic: Migrate to use ofnode API for bind function

[Kever Yang]

Use ofnode_ instead of fdt_ APIs so that the driver can support live DT.

Signed-off-by: Kever Yang 
---

 drivers/usb/dwc3/dwc3-generic.c | 12 +---
 1 file changed, 5 insertions(+), 7 deletions(-)

diff --git a/drivers/usb/dwc3/dwc3-generic.c b/drivers/usb/dwc3/dwc3-generic.c
index 3e116b2c5c..820cc7075c 100644
--- a/drivers/usb/dwc3/dwc3-generic.c
+++ b/drivers/usb/dwc3/dwc3-generic.c
@@ -284,20 +284,18 @@ struct dwc3_glue_ops ti_ops = {
 
 static int dwc3_glue_bind(struct udevice *parent)
 {
-   const void *fdt = gd->fdt_blob;
-   int node;
+   ofnode node;
int ret;
 
-   for (node = fdt_first_subnode(fdt, dev_of_offset(parent)); node > 0;
-node = fdt_next_subnode(fdt, node)) {
-   const char *name = fdt_get_name(fdt, node, NULL);
+   ofnode_for_each_subnode(node, parent->node) {
+   const char *name = ofnode_get_name(node);
enum usb_dr_mode dr_mode;
struct udevice *dev;
const char *driver = NULL;
 
debug("%s: subnode name: %s\n", __func__, name);
 
-   dr_mode = usb_get_dr_mode(node);
+   dr_mode = usb_get_dr_mode(ofnode_to_offset(node));
 
switch (dr_mode) {
case USB_DR_MODE_PERIPHERAL:
@@ -322,7 +320,7 @@ static int dwc3_glue_bind(struct udevice *parent)
continue;
 
ret = device_bind_driver_to_node(parent, driver, name,
-offset_to_ofnode(node), );
+node, );
if (ret) {
debug("%s: not able to bind usb device mode\n",
  __func__);
-- 
2.17.1

[PATCH 03/10] usb: cdns3: Migrate to use ofnode API for bind function

[Kever Yang]

Use ofnode_ instead of fdt_ APIs so that the driver can support live DT.

Signed-off-by: Kever Yang 
---

 drivers/usb/cdns3/core.c | 15 ++-
 1 file changed, 6 insertions(+), 9 deletions(-)

diff --git a/drivers/usb/cdns3/core.c b/drivers/usb/cdns3/core.c
index 8c8e02169e..d6ccd3e73c 100644
--- a/drivers/usb/cdns3/core.c
+++ b/drivers/usb/cdns3/core.c
@@ -382,23 +382,21 @@ static const struct udevice_id cdns3_ids[] = {
 
 int cdns3_bind(struct udevice *parent)
 {
-   int from = dev_of_offset(parent);
-   const void *fdt = gd->fdt_blob;
enum usb_dr_mode dr_mode;
struct udevice *dev;
const char *driver;
const char *name;
-   int node;
+   ofnode node;
int ret;
 
-   node = fdt_node_offset_by_compatible(fdt, from, "cdns,usb3");
-   if (node < 0) {
+   node = ofnode_by_compatible(parent->node, "cdns,usb3");
+   if (!ofnode_valid(node)) {
ret = -ENODEV;
goto fail;
}
 
-   name = fdt_get_name(fdt, node, NULL);
-   dr_mode = usb_get_dr_mode(node);
+   name = ofnode_get_name(node);
+   dr_mode = usb_get_dr_mode(ofnode_to_offset(node));
 
switch (dr_mode) {
 #if defined(CONFIG_SPL_USB_HOST_SUPPORT) || \
@@ -420,8 +418,7 @@ int cdns3_bind(struct udevice *parent)
goto fail;
};
 
-   ret = device_bind_driver_to_node(parent, driver, name,
-offset_to_ofnode(node), );
+   ret = device_bind_driver_to_node(parent, driver, name, node, );
if (ret) {
printf("%s: not able to bind usb device mode\n",
   __func__);
-- 
2.17.1

[PATCH 2/2] rockchip: video: Convert to use APIs which support live DT

[Kever Yang]

Use ofnode_ or dev_ APIs instead of fdt_ and fdtdec_ APIs so that the
driver can support live DT.

Signed-off-by: Kever Yang 
---

 drivers/video/rockchip/rk3288_mipi.c |  1 -
 drivers/video/rockchip/rk3399_mipi.c |  1 -
 drivers/video/rockchip/rk_edp.c  |  2 +-
 drivers/video/rockchip/rk_lvds.c | 10 --
 drivers/video/rockchip/rk_mipi.c | 11 +--
 5 files changed, 10 insertions(+), 15 deletions(-)

diff --git a/drivers/video/rockchip/rk3288_mipi.c 
b/drivers/video/rockchip/rk3288_mipi.c
index 65891ce45c..5b2dc2ad02 100644
--- a/drivers/video/rockchip/rk3288_mipi.c
+++ b/drivers/video/rockchip/rk3288_mipi.c
@@ -8,7 +8,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 #include "rk_mipi.h"
diff --git a/drivers/video/rockchip/rk3399_mipi.c 
b/drivers/video/rockchip/rk3399_mipi.c
index a5b7ba69a8..03e1349509 100644
--- a/drivers/video/rockchip/rk3399_mipi.c
+++ b/drivers/video/rockchip/rk3399_mipi.c
@@ -8,7 +8,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 #include "rk_mipi.h"
diff --git a/drivers/video/rockchip/rk_edp.c b/drivers/video/rockchip/rk_edp.c
index 4330725a25..e617a974a5 100644
--- a/drivers/video/rockchip/rk_edp.c
+++ b/drivers/video/rockchip/rk_edp.c
@@ -995,7 +995,7 @@ static int rk_edp_ofdata_to_platdata(struct udevice *dev)
 {
struct rk_edp_priv *priv = dev_get_priv(dev);
 
-   priv->regs = (struct rk3288_edp *)devfdt_get_addr(dev);
+   priv->regs = dev_read_addr_ptr(dev);
priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
 
return 0;
diff --git a/drivers/video/rockchip/rk_lvds.c b/drivers/video/rockchip/rk_lvds.c
index cae8bada32..92e70f6317 100644
--- a/drivers/video/rockchip/rk_lvds.c
+++ b/drivers/video/rockchip/rk_lvds.c
@@ -171,13 +171,11 @@ int rk_lvds_read_timing(struct udevice *dev, struct 
display_timing *timing)
 static int rk_lvds_ofdata_to_platdata(struct udevice *dev)
 {
struct rk_lvds_priv *priv = dev_get_priv(dev);
-   const void *blob = gd->fdt_blob;
-   int node = dev_of_offset(dev);
int ret;
-   priv->regs = (void *)devfdt_get_addr(dev);
+   priv->regs = dev_read_addr_ptr(dev);
priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
 
-   ret = fdtdec_get_int(blob, node, "rockchip,output", -1);
+   ret = dev_read_s32_default(dev, "rockchip,output", -1);
if (ret != -1) {
priv->output = ret;
debug("LVDS output : %d\n", ret);
@@ -186,7 +184,7 @@ static int rk_lvds_ofdata_to_platdata(struct udevice *dev)
priv->output = LVDS_OUTPUT_RGB;
}
 
-   ret = fdtdec_get_int(blob, node, "rockchip,data-mapping", -1);
+   ret = dev_read_s32_default(dev, "rockchip,data-mapping", -1);
if (ret != -1) {
priv->format = ret;
debug("LVDS data-mapping : %d\n", ret);
@@ -195,7 +193,7 @@ static int rk_lvds_ofdata_to_platdata(struct udevice *dev)
priv->format = LVDS_FORMAT_JEIDA;
}
 
-   ret = fdtdec_get_int(blob, node, "rockchip,data-width", -1);
+   ret = dev_read_s32_default(dev, "rockchip,data-width", -1);
if (ret != -1) {
debug("LVDS data-width : %d\n", ret);
if (ret == 24) {
diff --git a/drivers/video/rockchip/rk_mipi.c b/drivers/video/rockchip/rk_mipi.c
index a77bdfd24d..f1c21bb8d7 100644
--- a/drivers/video/rockchip/rk_mipi.c
+++ b/drivers/video/rockchip/rk_mipi.c
@@ -8,7 +8,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 #include "rk_mipi.h"
@@ -76,7 +75,7 @@ static void rk_mipi_dsi_write(uintptr_t regs, u32 reg, u32 
val)
 int rk_mipi_dsi_enable(struct udevice *dev,
   const struct display_timing *timing)
 {
-   int node, timing_node;
+   ofnode node, timing_node;
int val;
struct rk_mipi_priv *priv = dev_get_priv(dev);
uintptr_t regs = priv->regs;
@@ -119,10 +118,10 @@ int rk_mipi_dsi_enable(struct udevice *dev,
rk_mipi_dsi_write(regs, VID_PKT_SIZE, 0x4b0);
 
/* Set dpi color coding depth 24 bit */
-   timing_node = fdt_subnode_offset(gd->fdt_blob, dev_of_offset(dev),
-
"display-timings");
-   node = fdt_first_subnode(gd->fdt_blob, timing_node);
-   val = fdtdec_get_int(gd->fdt_blob, node, "bits-per-pixel", -1);
+   timing_node = ofnode_find_subnode(dev->node, "display-timings");
+   node = ofnode_first_subnode(timing_node);
+
+   val = ofnode_read_u32_default(node, "bits-per-pixel", -1);
switch (val) {
case 16:
rk_mipi_dsi_write(regs, DPI_COLOR_CODING, DPI_16BIT_CFG_1);
-- 
2.17.1

[PATCH 2/2] rockchip: evb-rv1108: Use syscon API to get grf base

[Kever Yang]

Use syscon API to get grf base instead of get from dts.

Signed-off-by: Kever Yang 
---

 board/rockchip/evb_rv1108/evb_rv1108.c | 7 +++
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/board/rockchip/evb_rv1108/evb_rv1108.c 
b/board/rockchip/evb_rv1108/evb_rv1108.c
index 733f29376e..5d622c3737 100644
--- a/board/rockchip/evb_rv1108/evb_rv1108.c
+++ b/board/rockchip/evb_rv1108/evb_rv1108.c
@@ -5,8 +5,9 @@
  */
 
 #include 
+#include 
 #include 
-#include 
+#include 
 #include 
 #include 
 
@@ -14,7 +15,6 @@ DECLARE_GLOBAL_DATA_PTR;
 
 int mach_cpu_init(void)
 {
-   int node;
struct rv1108_grf *grf;
enum {
GPIO3C3_SHIFT   = 6,
@@ -34,8 +34,7 @@ int mach_cpu_init(void)
GPIO2D1_UART2_SIN_M0,
};
 
-   node = fdt_node_offset_by_compatible(gd->fdt_blob, -1, 
"rockchip,rv1108-grf");
-   grf = (struct rv1108_grf *)fdtdec_get_addr(gd->fdt_blob, node, "reg");
+   grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
 
/*evb board use UART2 m0 for debug*/
rk_clrsetreg(>gpio2d_iomux,
-- 
2.17.1

[PATCH 1/2] rockchip: elgin-rv1108: Use syscon API to get grf base

[Kever Yang]

Use syscon API to get grf base instead of get from dts.

Signed-off-by: Kever Yang 
---

 board/elgin/elgin_rv1108/elgin_rv1108.c | 7 +++
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/board/elgin/elgin_rv1108/elgin_rv1108.c 
b/board/elgin/elgin_rv1108/elgin_rv1108.c
index 607667ac63..06df25a326 100644
--- a/board/elgin/elgin_rv1108/elgin_rv1108.c
+++ b/board/elgin/elgin_rv1108/elgin_rv1108.c
@@ -5,8 +5,9 @@
  */
 
 #include 
+#include 
 #include 
-#include 
+#include 
 #include 
 #include 
 #include 
@@ -15,7 +16,6 @@ DECLARE_GLOBAL_DATA_PTR;
 
 int mach_cpu_init(void)
 {
-   int node;
struct rv1108_grf *grf;
enum {
GPIO3C3_SHIFT   = 6,
@@ -35,8 +35,7 @@ int mach_cpu_init(void)
GPIO2D1_UART2_SIN_M0,
};
 
-   node = fdt_node_offset_by_compatible(gd->fdt_blob, -1, 
"rockchip,rv1108-grf");
-   grf = (struct rv1108_grf *)fdtdec_get_addr(gd->fdt_blob, node, "reg");
+   grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
 
/* Elgin board use UART2 m0 for debug*/
rk_clrsetreg(>gpio2d_iomux,
-- 
2.17.1

[PATCH 1/2] rockchip: video: Use ofnode_decode_display_timing() to parse timing

[Kever Yang]

Use ofnode_decode_display_timing() instead of
fdtdec_decode_display_timing() to parse display timing, so that we can
support live DT.

Signed-off-by: Kever Yang 
---

 drivers/video/rockchip/rk_lvds.c | 3 +--
 drivers/video/rockchip/rk_mipi.c | 3 +--
 2 files changed, 2 insertions(+), 4 deletions(-)

diff --git a/drivers/video/rockchip/rk_lvds.c b/drivers/video/rockchip/rk_lvds.c
index cf5c0439b1..cae8bada32 100644
--- a/drivers/video/rockchip/rk_lvds.c
+++ b/drivers/video/rockchip/rk_lvds.c
@@ -160,8 +160,7 @@ int rk_lvds_enable(struct udevice *dev, int panel_bpp,
 
 int rk_lvds_read_timing(struct udevice *dev, struct display_timing *timing)
 {
-   if (fdtdec_decode_display_timing
-   (gd->fdt_blob, dev_of_offset(dev), 0, timing)) {
+   if (ofnode_decode_display_timing(dev_ofnode(dev), 0, timing)) {
debug("%s: Failed to decode display timing\n", __func__);
return -EINVAL;
}
diff --git a/drivers/video/rockchip/rk_mipi.c b/drivers/video/rockchip/rk_mipi.c
index f9280e8607..a77bdfd24d 100644
--- a/drivers/video/rockchip/rk_mipi.c
+++ b/drivers/video/rockchip/rk_mipi.c
@@ -29,8 +29,7 @@ int rk_mipi_read_timing(struct udevice *dev,
 {
int ret;
 
-   ret = fdtdec_decode_display_timing(gd->fdt_blob, dev_of_offset(dev),
-0, timing);
+   ret = ofnode_decode_display_timing(dev_ofnode(dev), 0, timing);
if (ret) {
debug("%s: Failed to decode display timing (ret=%d)\n",
  __func__, ret);
-- 
2.17.1

Re: [PATCH v4 03/17] clk: Unconditionally recursively en-/dis-able clocks

[Rick Chen]

Hi Sean

> On 2/18/20 2:20 AM, Rick Chen wrote:
> > Hi Sean
> >
> >> For clocks not in the CCF, their parents will not have UCLASS_CLK, so we
> >> just enable them as normal. The enable count is local to the struct clk,
> >> but this will never result in the actual en-/dis-able op being called
> >> (unless the same struct clk is enabled twice).
> >>
> >> For clocks in the CCF, we always traverse up the tree when enabling.
> >> Previously, CCF clocks without id set would be skipped, stopping the
> >> traversal too early.
> >>
> >> Signed-off-by: Sean Anderson 
> >> Acked-by: Lukasz Majewski 
> >> ---
> >>
> >> Changes in v4:
> >> - Lint
> >>
> >> Changes in v3:
> >> - New
> >>
> >>  drivers/clk/clk-uclass.c | 59 ++--
> >>  1 file changed, 26 insertions(+), 33 deletions(-)
> >>
> >
> > When I tried to apply this patch-set, there occur a conflict as below:
> >
> > Applying: clk: Always use the supplied struct clk
> > Applying: clk: Check that ops of composite clock components exist before 
> > calling
> > Applying: clk: Unconditionally recursively en-/dis-able clocks
> > error: patch failed: drivers/clk/clk-uclass.c:491
> > error: drivers/clk/clk-uclass.c: patch does not apply
> > Patch failed at 0003 clk: Unconditionally recursively en-/dis-able clocks
> >
> > Thanks
> > Rick
>
> Hm, perhaps you are applying it on a different commit. My series is
> based off of
>
> c00bd81ae0 Merge branch 'next' of 
> https://gitlab.denx.de/u-boot/custodians/u-boot-mpc83xx
>
> What are you applying to?

I applied to u-boot/master

Thanks
Rick

>
> --Sean

Re: [PATCH v4 07/17] spi: dw: Add mem_ops

[Rick Chen]

Hi Sean

> >> The dw spi devices on the Kendryte K210 must be operated in a specific
> >> fasion which cannot be achived through multiple writes to via dw_spi_xfer
> >> (as it is currently written). This patch adds an implementation of exec_op,
> >> which gives correct behaviour when reading/writing spi flash.
> >>
> >> I would like to be able to modify the existing dw_spi_xfer function such
> >> that it works properly (e.g. with the mmc_spi driver). However, the only
> >> example code I have to work off is Kendryte's sdk (which is written in the
> >> exec_op style), and I do not have access to the datasheet (if anyone does,
> >> I would love to have a look!).
> >>
> >> Signed-off-by: Sean Anderson 
> >> ---
> >>
> >> Changes in v4:
> >> - New
> >>
> >>  drivers/spi/designware_spi.c | 123 +--
> >>  1 file changed, 119 insertions(+), 4 deletions(-)
> >>
> >
> > Patch 6 and 7 shall be applied via spi tree.
> > You mix them together, the patchwork will become complicated.
> > It will be better for me to wait for a period of time to get the
> > approval(Reviewed-by or Acked-by) of SPI MAINTAINER.
> >
> > Thanks
> > Rick
>
> So is this just waiting for approval, or is there a change I should make
> on my end?

If they are not highly dependent, you shall separate and send them individually.
But we can wait for few days and see, if it still no response.
You can consider separate them.

Thanks
Rick

>
> --Sean

Re: [PATCH 1/2] dm: core: Add a flag for power domain control on device removal

[Simon Glass]

Hi Anatolij,

On Tue, 18 Feb 2020 at 12:42, Anatolij Gustschin  wrote:
>
> Hi Simon,
>
> On Tue, 18 Feb 2020 11:31:26 -0700
> Simon Glass s...@chromium.org wrote:
>
> > Hi Anatolij,
> >
> > On Mon, 17 Feb 2020 at 04:36, Anatolij Gustschin  wrote:
> > >
> > > In various cases a power domain must stay enabled after device
> > > removal when booting OS (i.e. serial debug console or display).
> > > Add a flag to selectively skip switching off a power domain.
> > >
> > > Fixes: 52edfed65de9 ("dm: core: device: switch off power domain after 
> > > device removal")
> > > Signed-off-by: Anatolij Gustschin 
> > > ---
> > >  drivers/core/device-remove.c | 5 +++--
> > >  include/dm/device.h  | 6 ++
> > >  2 files changed, 9 insertions(+), 2 deletions(-)
> >
> > This seems OK. Should we add a device tree property for this? Or is
> > the driver-level side enough.
>
> For all potential users I'm currently aware of the driver-level
> side is enough. Should this ever be required per device, then we
> can add a property later.

Reviewed-by: Simon Glass 

Thanks,
Simon

Re: [U-Boot] [RFC/RFT PATCH v4 3/3] image: Add compressed Image parsing support in booti.

[Tom Rini]

On Sun, Feb 16, 2020 at 04:48:22PM -0800, Atish Patra wrote:
> On Fri, Feb 14, 2020 at 8:43 AM Tom Rini  wrote:
> >
> > On Thu, Feb 13, 2020 at 11:32:52PM +0200, David Abdurachmanov wrote:
> > > On Thu, Feb 13, 2020 at 6:17 PM Tom Rini  wrote:
> > > >
> > > > On Wed, Feb 05, 2020 at 12:01:38AM +, Atish Patra wrote:
> > > > > On Fri, 2019-11-22 at 18:19 -0800, Atish Patra wrote:
> > > > > > On Wed, 2019-11-13 at 11:47 -0800, Atish Patra wrote:
> > > > > > > On Wed, 2019-11-13 at 15:36 +0200, David Abdurachmanov wrote:
> > > > > > > > On Sat, Nov 9, 2019 at 2:14 AM Atish Patra 
> > > > > > > > wrote:
> > > > > > > > > Add compressed Image parsing support so that booti can parse
> > > > > > > > > both
> > > > > > > > > flat and compressed Image to boot Linux. Currently, it is
> > > > > > > > > difficult
> > > > > > > > > to calculate a safe address for every board where the
> > > > > > > > > compressed
> > > > > > > > > image can be decompressed. It is also not possible to figure
> > > > > > > > > out
> > > > > > > > > the
> > > > > > > > > size of the compressed file as well. Thus, user need to set 
> > > > > > > > > two
> > > > > > > > > additional environment variables kernel_comp_addr_r and
> > > > > > > > > filesize
> > > > > > > > > to
> > > > > > > > > make this work.
> > > > > > > > >
> > > > > > > > > Following compression methods are supported for now.
> > > > > > > > > lzma, lzo, bzip2, gzip.
> > > > > > > > >
> > > > > > > > > lz4 support is not added as ARM64 kernel generates a lz4
> > > > > > > > > compressed
> > > > > > > > > image with legacy header which U-Boot doesn't know how to 
> > > > > > > > > parse
> > > > > > > > > and
> > > > > > > > > decompress.
> > > > > > > > >
> > > > > > > > > Tested on HiFive Unleashed and Qemu for RISC-V.
> > > > > > > > > Tested on Qemu for ARM64.
> > > > > > > > >
> > > > > > > > > Signed-off-by: Atish Patra 
> > > > > > > > > ---
> > > > > > > > > I could not test this patch on any ARM64 boards due to lack of
> > > > > > > > > access to any ARM64 board. If anybody can test it on ARM64,
> > > > > > > > > that
> > > > > > > > > would be great.
> > > > > > > > > ---
> > > > > > > > >  cmd/booti.c| 40 ++-
> > > > > > > > >  doc/README.distro  | 12 +
> > > > > > > > >  doc/board/sifive/fu540.rst | 55
> > > > > > > > > ++
> > > > > > > > >  3 files changed, 106 insertions(+), 1 deletion(-)
> > > > > > > > >
> > > > > > > > > diff --git a/cmd/booti.c b/cmd/booti.c
> > > > > > > > > index c36b0235df8c..cd8670a9a8db 100644
> > > > > > > > > --- a/cmd/booti.c
> > > > > > > > > +++ b/cmd/booti.c
> > > > > > > > > @@ -13,6 +13,7 @@
> > > > > > > > >  #include 
> > > > > > > > >  #include 
> > > > > > > > >
> > > > > > > > > +DECLARE_GLOBAL_DATA_PTR;
> > > > > > > > >  /*
> > > > > > > > >   * Image booting support
> > > > > > > > >   */
> > > > > > > > > @@ -23,6 +24,12 @@ static int booti_start(cmd_tbl_t *cmdtp, 
> > > > > > > > > int
> > > > > > > > > flag, int argc,
> > > > > > > > > ulong ld;
> > > > > > > > > ulong relocated_addr;
> > > > > > > > > ulong image_size;
> > > > > > > > > +   uint8_t *temp;
> > > > > > > > > +   ulong dest;
> > > > > > > > > +   ulong dest_end;
> > > > > > > > > +   unsigned long comp_len;
> > > > > > > > > +   unsigned long decomp_len;
> > > > > > > > > +   int ctype;
> > > > > > > > >
> > > > > > > > > ret = do_bootm_states(cmdtp, flag, argc, argv,
> > > > > > > > > BOOTM_STATE_START,
> > > > > > > > >   images, 1);
> > > > > > > > > @@ -37,6 +44,33 @@ static int booti_start(cmd_tbl_t *cmdtp, 
> > > > > > > > > int
> > > > > > > > > flag, int argc,
> > > > > > > > > debug("*  kernel: cmdline image address =
> > > > > > > > > 0x%08lx\n", ld);
> > > > > > > > > }
> > > > > > > > >
> > > > > > > > > +   temp = map_sysmem(ld, 0);
> > > > > > > > > +   ctype = image_decomp_type(temp, 2);
> > > > > > > > > +   if (ctype > 0) {
> > > > > > > > > +   dest = env_get_ulong("kernel_comp_addr_r", 16,
> > > > > > > > > 0);
> > > > > > > > > +   comp_len = env_get_ulong("filesize", 16, 0);
> > > > > > > > > +   if (!dest || !comp_len) {
> > > > > > > > > +   puts("kernel_comp_addr_r or filesize 
> > > > > > > > > is
> > > > > > > > > not
> > > > > > > > > provided!\n");
> > > > > > > > > +   return -EINVAL;
> > > > > > > > > +   }
> > > > > > > > > +   if (dest < gd->ram_base || dest > gd->ram_top)
> > > > > > > > > {
> > > > > > > > > +   puts("kernel_comp_addr_r is outside of
> > > > > > > > > DRAM
> > > > > > > > > range!\n");
> > > > > > > > > +   return -EINVAL;
> > > > > > > > > +   }
> > > > > > > > > +
> > > > > > > > > +   debug("kernel image compression type %d 

Re: [PATCH v6 0/7] rsa: extend rsa_verify() for UEFI secure boot

[Tom Rini]

On Mon, Feb 17, 2020 at 10:42:41AM +0900, AKASHI Takahiro wrote:
> Hi Tom,
> 
> On Fri, Feb 14, 2020 at 07:29:37AM -0500, Tom Rini wrote:
> > On Mon, Jan 27, 2020 at 07:27:33PM +0900, AKASHI Takahiro wrote:
> > 
> > > # This patch set is a prerequisite for UEFI secure boot.
> > > 
> > > The current rsa_verify() requires five parameters for a RSA public key
> > > for efficiency while RSA, in theory, requires only two. In addition,
> > > those parameters are expected to come from FIT image.
> > > 
> > > So this function won't fit very well when we want to use it for the 
> > > purpose
> > > of implementing UEFI secure boot, in particular, image authentication
> > > as well as variable authentication, where the essential two parameters
> > > are set to be retrieved from one of X509 certificates in signature
> > > database.
> > > 
> > > So, in this patch, additional three parameters will be calculated
> > > on the fly when rsa_verify() is called without fdt which should contain
> > > parameters above.
> > > 
> > > This calculation heavily relies on "big-number (or multi-precision)
> > > library." Therefore some routines from BearSSL[1] under MIT license are
> > > imported in this implementation. See Patch#4.
> > > # Please let me know if this is not appropriate.
> > > 
> > > Prerequisite:
> > > * public key parser in my "import x509/pkcs7 parser" patch[2]
> > > 
> > > # Checkpatch will complain with lots of warnings/errors, but
> > > # I intentionally don't fix them for maximum maintainability.
> > > 
> > >   [1] https://bearssl.org/
> > >   [2] https://lists.denx.de/pipermail/u-boot/2019-November/390127.html
> > 
> > At this point it needs to be rebased again.  There's a ton of failures
> > in https://gitlab.denx.de/u-boot/u-boot/pipelines/2198 which is after I
> 
> I think that you have wrongly merged my rsa extension patch here.
> Looking at your modified commit,
> https://gitlab.denx.de/u-boot/u-boot/commit/13fb61ce20dcd65cd4ccba1554eca6343c92ed6b
> there is one missing hunk from my original.
> Please revert the change in include/image.h and then apply a diff attached 
> below.

Please rebase and repost the series.

> > did
> > https://gitlab.denx.de/u-boot/u-boot/commit/7db0379f85995d8c7673db7b04eb36d96546c9c8
> > and I'll put a proper commit message on that later today and post it and
> > CC relevant parties.
> 
> I believe that your commit above has nothing to do with my patch
> (and test failures).

I'll re-confirm things then with the next post.

> > It's otherwise looking good.  I do want to confirm
> > that on boards like minnowmax the slight growth in fit_image_check_sig
> > is expected.  It's only 6 bytes so it probably is and we get a larger
> > reduction in rsa_verify all-around.
> 
> Growth due to my patch??

Unless it's something else I mis-merged, yes.  But given the area this
series works on, it's not unexpected growth.

Thanks!

-- 
Tom


signature.asc
Description: PGP signature

Re: [PATCH 1/2] dm: core: Add a flag for power domain control on device removal

[Anatolij Gustschin]

Hi Simon,

On Tue, 18 Feb 2020 11:31:26 -0700
Simon Glass s...@chromium.org wrote:

> Hi Anatolij,
> 
> On Mon, 17 Feb 2020 at 04:36, Anatolij Gustschin  wrote:
> >
> > In various cases a power domain must stay enabled after device
> > removal when booting OS (i.e. serial debug console or display).
> > Add a flag to selectively skip switching off a power domain.
> >
> > Fixes: 52edfed65de9 ("dm: core: device: switch off power domain after 
> > device removal")
> > Signed-off-by: Anatolij Gustschin 
> > ---
> >  drivers/core/device-remove.c | 5 +++--
> >  include/dm/device.h  | 6 ++
> >  2 files changed, 9 insertions(+), 2 deletions(-)  
> 
> This seems OK. Should we add a device tree property for this? Or is
> the driver-level side enough.

For all potential users I'm currently aware of the driver-level
side is enough. Should this ever be required per device, then we
can add a property later.

--
Anatolij

[PATCH] mx7dsabresd: Boot in non secure by default

[Fabio Estevam]

Booting a mainline kernel in secure mode on i.MX7D causes only
one CPU to be brought up.

Change it to booting in non secure mode by default, which
allows the two CPUs to be brought up.

It does have a side effect of not probing the CAAM driver.
If CAAM driver is needed then a secure world OS such as OPTEE needs
to be used.

Signed-off-by: Fabio Estevam 
---
 configs/mx7dsabresd_defconfig  | 1 -
 configs/mx7dsabresd_qspi_defconfig | 1 -
 2 files changed, 2 deletions(-)

diff --git a/configs/mx7dsabresd_defconfig b/configs/mx7dsabresd_defconfig
index 2a9fdac338..d9fa1d7017 100644
--- a/configs/mx7dsabresd_defconfig
+++ b/configs/mx7dsabresd_defconfig
@@ -5,7 +5,6 @@ CONFIG_TARGET_MX7DSABRESD=y
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0xC
 CONFIG_NR_DRAM_BANKS=1
-CONFIG_ARMV7_BOOT_SEC_DEFAULT=y
 # CONFIG_ARMV7_VIRT is not set
 CONFIG_IMX_RDC=y
 CONFIG_IMX_BOOTAUX=y
diff --git a/configs/mx7dsabresd_qspi_defconfig 
b/configs/mx7dsabresd_qspi_defconfig
index 865ce30dc2..993a6fb263 100644
--- a/configs/mx7dsabresd_qspi_defconfig
+++ b/configs/mx7dsabresd_qspi_defconfig
@@ -4,7 +4,6 @@ CONFIG_SYS_TEXT_BASE=0x8780
 CONFIG_TARGET_MX7DSABRESD=y
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0xC
-CONFIG_ARMV7_BOOT_SEC_DEFAULT=y
 # CONFIG_ARMV7_VIRT is not set
 CONFIG_IMX_RDC=y
 CONFIG_IMX_BOOTAUX=y
-- 
2.17.1

[PATCH 4/5] dt-bindings: pinctrl: add i.MXRT1020 pins definition

[Giulio Benetti]

Add i.MXRT1020 pins definition.

Signed-off-by: Giulio Benetti 
---
 include/dt-bindings/pinctrl/pins-imxrt1020.h | 763 +++
 1 file changed, 763 insertions(+)
 create mode 100644 include/dt-bindings/pinctrl/pins-imxrt1020.h

diff --git a/include/dt-bindings/pinctrl/pins-imxrt1020.h 
b/include/dt-bindings/pinctrl/pins-imxrt1020.h
new file mode 100644
index 00..c6bacb7378
--- /dev/null
+++ b/include/dt-bindings/pinctrl/pins-imxrt1020.h
@@ -0,0 +1,763 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2020
+ * Author(s): Giulio Benetti 
+ */
+
+#ifndef _DT_BINDINGS_PINCTRL_IMXRT1020_PINFUNC_H
+#define _DT_BINDINGS_PINCTRL_IMXRT1020_PINFUNC_H
+
+/* TODO: continue from LPI2C4_SDA_SELECT_INPUT */
+
+#define IMX_PAD_SION   0x4000
+
+/*
+ * The pin function ID is a tuple of
+ * 
+ */
+
+#define MXRT1020_IOMUXC_GPIO_EMC_00_SEMC_DA00  0x014 
0x188 0x000 0x0 0x0
+#define MXRT1020_IOMUXC_GPIO_EMC_00_QTIMER2_TIMER0 0x014 
0x188 0x420 0x1 0x0
+#define MXRT1020_IOMUXC_GPIO_EMC_00_LPUART4_CTS_B  0x014 
0x188 0x3E0 0x2 0x0
+#define MXRT1020_IOMUXC_GPIO_EMC_00_SPDIF_SR_CLK   0x014 
0x188 0x000 0x3 0x0
+#define MXRT1020_IOMUXC_GPIO_EMC_00_LPSPI2_SCK 0x014 
0x188 0x3B0 0x4 0x0
+#define MXRT1020_IOMUXC_GPIO_EMC_00_GPIO2_IO00 0x014 
0x188 0x000 0x5 0x0
+#define MXRT1020_IOMUXC_GPIO_EMC_00_FLEXCAN1_TX
0x014 0x188 0x000 0x6 0x0
+#define MXRT1020_IOMUXC_GPIO_EMC_00_PIT_TRIGGER02  0x014 
0x188 0x000 0x7 0x0
+
+#define MXRT1020_IOMUXC_GPIO_EMC_01_SEMC_DA01  0x018 
0x18C 0x000 0x0 0x0
+#define MXRT1020_IOMUXC_GPIO_EMC_01_QTIMER2_TIMER1 0x018 
0x18C 0x424 0x1 0x0
+#define MXRT1020_IOMUXC_GPIO_EMC_01_LPUART4_RTS_B  0x018 
0x18C 0x000 0x2 0x0
+#define MXRT1020_IOMUXC_GPIO_EMC_01_SPDIF_OUT  0x018 
0x18C 0x000 0x3 0x0
+#define MXRT1020_IOMUXC_GPIO_EMC_01_LPSPI2_PCS0
0x018 0x18C 0x3AC 0x4 0x0
+#define MXRT1020_IOMUXC_GPIO_EMC_01_GPIO2_IO01 0x018 
0x18C 0x000 0x5 0x0
+#define MXRT1020_IOMUXC_GPIO_EMC_01_FLEXCAN1_RX
0x018 0x18C 0x320 0x6 0x0
+#define MXRT1020_IOMUXC_GPIO_EMC_01_PIT_TRIGGER03  0x018 
0x18C 0x000 0x7 0x0
+
+#define MXRT1020_IOMUXC_GPIO_EMC_02_SEMC_DA02  0x01C 
0x190 0x000 0x0 0x0
+#define MXRT1020_IOMUXC_GPIO_EMC_02_QTIMER2_TIMER2 0x01C 
0x190 0x428 0x1 0x0
+#define MXRT1020_IOMUXC_GPIO_EMC_02_LPUART4_TX 0x01C 
0x190 0x3E8 0x2 0x0
+#define MXRT1020_IOMUXC_GPIO_EMC_02_SPDIF_LOCK 0x01C 
0x190 0x000 0x3 0x0
+#define MXRT1020_IOMUXC_GPIO_EMC_02_LPSPI2_SDO 0x01C 
0x190 0x3B8 0x4 0x0
+#define MXRT1020_IOMUXC_GPIO_EMC_02_GPIO2_IO02 0x01C 
0x190 0x000 0x5 0x0
+#define MXRT1020_IOMUXC_GPIO_EMC_02_LPI2C1_SCL 0x01C 
0x190 0x37C 0x6 0x0
+
+#define MXRT1020_IOMUXC_GPIO_EMC_03_SEMC_DA03  0x020 
0x194 0x000 0x0 0x0
+#define MXRT1020_IOMUXC_GPIO_EMC_03_QTIMER2_TIMER3 0x020 
0x194 0x42C 0x1 0x0
+#define MXRT1020_IOMUXC_GPIO_EMC_03_LPUART4_RX 0x020 
0x194 0x3E4 0x2 0x0
+#define MXRT1020_IOMUXC_GPIO_EMC_03_SPDIF_EXT_CLK  0x020 
0x194 0x000 0x3 0x0
+#define MXRT1020_IOMUXC_GPIO_EMC_03_LPSPI2_SDI 0x020 
0x194 0x3B4 0x4 0x0
+#define MXRT1020_IOMUXC_GPIO_EMC_03_GPIO2_IO03 0x020 
0x194 0x000 0x5 0x0
+#define MXRT1020_IOMUXC_GPIO_EMC_03_LPI2C1_SDA 0x020 
0x194 0x380 0x6 0x1
+
+#define MXRT1020_IOMUXC_GPIO_EMC_04_SEMC_DA04  0x024 
0x198 0x000 0x0 0x0
+#define MXRT1020_IOMUXC_GPIO_EMC_04_XBAR1_INOUT04  0x024 
0x198 0x000 0x1 0x0
+#define MXRT1020_IOMUXC_GPIO_EMC_04_SPDIF_OUT  0x024 
0x198 0x000 0x2 0x0
+#define MXRT1020_IOMUXC_GPIO_EMC_04_SAI2_TX_BCLK   0x024 
0x198 0x464 0x3 0x1
+#define MXRT1020_IOMUXC_GPIO_EMC_04_FLEXIO1_FLEXIO16   0x024 
0x198 0x000 0x4 0x0
+#define MXRT1020_IOMUXC_GPIO_EMC_04_GPIO2_IO04 0x024 
0x198 0x000 0x5 0x0
+
+#define MXRT1020_IOMUXC_GPIO_EMC_05_SEMC_DA05  0x028 
0x19C 0x000 0x0 0x0
+#define MXRT1020_IOMUXC_GPIO_EMC_05_XBAR1_INOUT05  0x028 
0x19C 0x000 0x1 0x0
+#define MXRT1020_IOMUXC_GPIO_EMC_05_SPDIF_IN   0x028 
0x19C 0x488 0x2 0x0
+#define MXRT1020_IOMUXC_GPIO_EMC_05_SAI2_TX_SYNC   0x028 
0x19C 0x468 0x3 0x1
+#define MXRT1020_IOMUXC_GPIO_EMC_05_FLEXIO1_FLEXIO17   0x028 
0x19C 0x000 0x4 0x0
+#define MXRT1020_IOMUXC_GPIO_EMC_05_GPIO2_IO05 

[PATCH 1/5] clk: imx: add i.IMXRT1020 clk driver

[Giulio Benetti]

Add i.MXRT1020 clk driver support.

Signed-off-by: Giulio Benetti 
---
 drivers/clk/imx/Kconfig |  16 ++
 drivers/clk/imx/Makefile|   1 +
 drivers/clk/imx/clk-imxrt1020.c | 227 
 include/dt-bindings/clock/imxrt1020-clock.h |  52 +
 4 files changed, 296 insertions(+)
 create mode 100644 drivers/clk/imx/clk-imxrt1020.c
 create mode 100644 include/dt-bindings/clock/imxrt1020-clock.h

diff --git a/drivers/clk/imx/Kconfig b/drivers/clk/imx/Kconfig
index 059bc2fbb9..96721bcbf3 100644
--- a/drivers/clk/imx/Kconfig
+++ b/drivers/clk/imx/Kconfig
@@ -69,6 +69,22 @@ config CLK_IMX8MP
help
  This enables support clock driver for i.MX8MP platforms.
 
+config SPL_CLK_IMXRT1020
+   bool "SPL clock support for i.MXRT1020"
+   depends on ARCH_IMXRT && SPL
+   select SPL_CLK
+   select SPL_CLK_CCF
+   help
+ This enables SPL DM/DTS support for clock driver in i.MXRT1020
+
+config CLK_IMXRT1020
+   bool "Clock support for i.MXRT1020"
+   depends on ARCH_IMXRT
+   select CLK
+   select CLK_CCF
+   help
+ This enables support clock driver for i.MXRT1020 platforms.
+
 config SPL_CLK_IMXRT1050
bool "SPL clock support for i.MXRT1050"
depends on ARCH_IMXRT && SPL
diff --git a/drivers/clk/imx/Makefile b/drivers/clk/imx/Makefile
index 1e8a49d0f3..01bbbdf3ae 100644
--- a/drivers/clk/imx/Makefile
+++ b/drivers/clk/imx/Makefile
@@ -17,4 +17,5 @@ obj-$(CONFIG_$(SPL_TPL_)CLK_IMX8MN) += clk-imx8mn.o 
clk-pll14xx.o \
 obj-$(CONFIG_$(SPL_TPL_)CLK_IMX8MP) += clk-imx8mp.o clk-pll14xx.o \
clk-composite-8m.o
 
+obj-$(CONFIG_$(SPL_TPL_)CLK_IMXRT1020) += clk-imxrt1020.o
 obj-$(CONFIG_$(SPL_TPL_)CLK_IMXRT1050) += clk-imxrt1050.o
diff --git a/drivers/clk/imx/clk-imxrt1020.c b/drivers/clk/imx/clk-imxrt1020.c
new file mode 100644
index 00..840f783940
--- /dev/null
+++ b/drivers/clk/imx/clk-imxrt1020.c
@@ -0,0 +1,227 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright(C) 2020
+ * Author(s): Giulio Benetti 
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "clk.h"
+
+static ulong imxrt1020_clk_get_rate(struct clk *clk)
+{
+   struct clk *c;
+   int ret;
+
+   debug("%s(#%lu)\n", __func__, clk->id);
+
+   ret = clk_get_by_id(clk->id, );
+   if (ret)
+   return ret;
+
+   return clk_get_rate(c);
+}
+
+static ulong imxrt1020_clk_set_rate(struct clk *clk, unsigned long rate)
+{
+   struct clk *c;
+   int ret;
+
+   debug("%s(#%lu), rate: %lu\n", __func__, clk->id, rate);
+
+   ret = clk_get_by_id(clk->id, );
+   if (ret)
+   return ret;
+
+   return clk_set_rate(c, rate);
+}
+
+static int __imxrt1020_clk_enable(struct clk *clk, bool enable)
+{
+   struct clk *c;
+   int ret;
+
+   debug("%s(#%lu) en: %d\n", __func__, clk->id, enable);
+
+   ret = clk_get_by_id(clk->id, );
+   if (ret)
+   return ret;
+
+   if (enable)
+   ret = clk_enable(c);
+   else
+   ret = clk_disable(c);
+
+   return ret;
+}
+
+static int imxrt1020_clk_disable(struct clk *clk)
+{
+   return __imxrt1020_clk_enable(clk, 0);
+}
+
+static int imxrt1020_clk_enable(struct clk *clk)
+{
+   return __imxrt1020_clk_enable(clk, 1);
+}
+
+static struct clk_ops imxrt1020_clk_ops = {
+   .set_rate = imxrt1020_clk_set_rate,
+   .get_rate = imxrt1020_clk_get_rate,
+   .enable = imxrt1020_clk_enable,
+   .disable = imxrt1020_clk_disable,
+};
+
+static const char * const pll2_bypass_sels[] = {"pll2_sys", "osc", };
+static const char * const pll3_bypass_sels[] = {"pll3_usb_otg", "osc", };
+
+static const char *const pre_periph_sels[] = { "pll2_sys", "pll2_pfd3_297m", 
"pll3_pfd3_454_74m", "arm_podf", };
+static const char *const periph_sels[] = { "pre_periph_sel", "todo", };
+static const char *const usdhc_sels[] = { "pll2_pfd2_396m", "pll2_pfd0_352m", 
};
+static const char *const lpuart_sels[] = { "pll3_80m", "osc", };
+static const char *const semc_alt_sels[] = { "pll2_pfd2_396m", 
"pll3_pfd1_664_62m", };
+static const char *const semc_sels[] = { "periph_sel", "semc_alt_sel", };
+
+static int imxrt1020_clk_probe(struct udevice *dev)
+{
+   void *base;
+
+   /* Anatop clocks */
+   base = (void *)ANATOP_BASE_ADDR;
+
+   clk_dm(IMXRT1020_CLK_PLL2_SYS,
+  imx_clk_pllv3(IMX_PLLV3_GENERIC, "pll2_sys", "osc",
+base + 0x30, 0x1));
+   clk_dm(IMXRT1020_CLK_PLL3_USB_OTG,
+  imx_clk_pllv3(IMX_PLLV3_USB, "pll3_usb_otg", "osc",
+base + 0x10, 0x1));
+
+   /* PLL bypass out */
+   clk_dm(IMXRT1020_CLK_PLL2_BYPASS,
+  imx_clk_mux_flags("pll2_bypass", base + 0x30, 16, 1,
+pll2_bypass_sels,
+

[PATCH 5/5] Add support for i.MXRT1020-EVK board

[Giulio Benetti]

Signed-off-by: Giulio Benetti 
---
 arch/arm/dts/Makefile |   3 +-
 arch/arm/dts/imxrt1020-evk-u-boot.dtsi|  44 
 arch/arm/dts/imxrt1020-evk.dts| 198 ++
 arch/arm/mach-imx/imxrt/Kconfig   |   5 +
 board/freescale/imxrt1020-evk/Kconfig |  22 ++
 board/freescale/imxrt1020-evk/MAINTAINERS |   6 +
 board/freescale/imxrt1020-evk/Makefile|   6 +
 board/freescale/imxrt1020-evk/README  |  31 +++
 board/freescale/imxrt1020-evk/imximage.cfg|  36 
 board/freescale/imxrt1020-evk/imxrt1020-evk.c |  81 +++
 configs/imxrt1020-evk_defconfig   |  67 ++
 include/configs/imxrt1020-evk.h   |  46 
 12 files changed, 544 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/dts/imxrt1020-evk-u-boot.dtsi
 create mode 100644 arch/arm/dts/imxrt1020-evk.dts
 create mode 100644 board/freescale/imxrt1020-evk/Kconfig
 create mode 100644 board/freescale/imxrt1020-evk/MAINTAINERS
 create mode 100644 board/freescale/imxrt1020-evk/Makefile
 create mode 100644 board/freescale/imxrt1020-evk/README
 create mode 100644 board/freescale/imxrt1020-evk/imximage.cfg
 create mode 100644 board/freescale/imxrt1020-evk/imxrt1020-evk.c
 create mode 100644 configs/imxrt1020-evk_defconfig
 create mode 100644 include/configs/imxrt1020-evk.h

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index be4cf029d0..1116c44cf4 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -723,7 +723,8 @@ dtb-$(CONFIG_ARCH_IMX8M) += \
imx8mq-evk.dtb \
imx8mp-evk.dtb
 
-dtb-$(CONFIG_ARCH_IMXRT) += imxrt1050-evk.dtb
+dtb-$(CONFIG_ARCH_IMXRT) += imxrt1050-evk.dtb \
+   imxrt1020-evk.dtb
 
 dtb-$(CONFIG_RCAR_GEN2) += \
r8a7790-lager-u-boot.dtb \
diff --git a/arch/arm/dts/imxrt1020-evk-u-boot.dtsi 
b/arch/arm/dts/imxrt1020-evk-u-boot.dtsi
new file mode 100644
index 00..d32c98de9c
--- /dev/null
+++ b/arch/arm/dts/imxrt1020-evk-u-boot.dtsi
@@ -0,0 +1,44 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+/*
+ * Copyright (C) 2020
+ * Author(s): Giulio Benetti 
+ */
+
+/ {
+   chosen {
+   u-boot,dm-spl;
+   };
+};
+
+ { /* console */
+   u-boot,dm-spl;
+};
+
+ {
+   bank1: bank@0 {
+   u-boot,dm-spl;
+   };
+};
+
+ {
+   u-boot,dm-spl;
+
+   imxrt1020-evk {
+   u-boot,dm-spl;
+   pinctrl_lpuart1: lpuart1grp {
+   u-boot,dm-spl;
+   };
+
+   pinctrl_semc: semcgrp {
+   u-boot,dm-spl;
+   };
+
+   pinctrl_usdhc0: usdhc0grp {
+   u-boot,dm-spl;
+   };
+   };
+};
+
+ {
+   u-boot,dm-spl;
+};
diff --git a/arch/arm/dts/imxrt1020-evk.dts b/arch/arm/dts/imxrt1020-evk.dts
new file mode 100644
index 00..ece13601bd
--- /dev/null
+++ b/arch/arm/dts/imxrt1020-evk.dts
@@ -0,0 +1,198 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+/*
+ * Copyright (C) 2020
+ * Author(s): Giulio Benetti 
+ */
+
+/dts-v1/;
+#include "imxrt1020.dtsi"
+#include "imxrt1020-evk-u-boot.dtsi"
+#include 
+
+/ {
+   model = "NXP IMXRT1020-evk board";
+   compatible = "fsl,imxrt1020-evk", "fsl,imxrt1020";
+
+   chosen {
+   bootargs = "root=/dev/ram";
+   stdout-path = "serial0:115200n8";
+   };
+
+   memory {
+   reg = <0x8000 0x200>;
+   };
+};
+
+ { /* console */
+   pinctrl-names = "default";
+   pinctrl-0 = <_lpuart1>;
+   status = "okay";
+};
+
+ {
+   /*
+* Memory configuration from sdram datasheet IS42S16160J-6TLI
+*/
+   fsl,sdram-mux = /bits/ 8 ;
+   fsl,sdram-control = /bits/ 8 ;
+   fsl,sdram-timing = /bits/ 8 <0x2
+0x2
+0x9
+0x1
+0x5
+0x6
+
+0x20
+0x09
+0x01
+0x00
+
+0x04
+0x0A
+0x21
+0x50>;
+
+   bank1: bank@0 {
+   fsl,base-address = <0x8000>;
+   fsl,memory-size = ;
+   };
+};
+
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_lpuart1>;
+
+   imxrt1020-evk {
+   pinctrl_lpuart1: lpuart1grp {
+   fsl,pins = <
+   MXRT1020_IOMUXC_GPIO_AD_B0_06_LPUART1_TX
+   0xf1
+   MXRT1020_IOMUXC_GPIO_AD_B0_07_LPUART1_RX
+   0xf1
+   >;
+   };
+
+   pinctrl_semc: 

[PATCH 3/5] ARM: dts: imxrt1020: add dtsi file

[Giulio Benetti]

Add dtsi file for i.MXRT1020.

Signed-off-by: Giulio Benetti 
---
 arch/arm/dts/imxrt1020.dtsi | 133 
 1 file changed, 133 insertions(+)
 create mode 100644 arch/arm/dts/imxrt1020.dtsi

diff --git a/arch/arm/dts/imxrt1020.dtsi b/arch/arm/dts/imxrt1020.dtsi
new file mode 100644
index 00..97f3cec9f3
--- /dev/null
+++ b/arch/arm/dts/imxrt1020.dtsi
@@ -0,0 +1,133 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+/*
+ * Copyright (C) 2020
+ * Author(s): Giulio Benetti 
+ */
+
+#include "armv7-m.dtsi"
+#include 
+#include 
+#include 
+#include 
+
+/ {
+   #address-cells = <1>;
+   #size-cells = <1>;
+
+   aliases {
+   gpio0 = 
+   gpio1 = 
+   gpio2 = 
+   mmc0 = 
+   serial0 = 
+   };
+
+   clocks {
+   u-boot,dm-spl;
+   ckil {
+   compatible = "fsl,imx-ckil", "fixed-clock";
+   #clock-cells = <0>;
+   clock-frequency = <32768>;
+   };
+
+   ckih1 {
+   compatible = "fsl,imx-ckih1", "fixed-clock";
+   #clock-cells = <0>;
+   clock-frequency = <0>;
+   };
+
+   osc {
+   u-boot,dm-spl;
+   compatible = "fsl,imx-osc", "fixed-clock";
+   #clock-cells = <0>;
+   clock-frequency = <2400>;
+   };
+   };
+
+   soc {
+   u-boot,dm-spl;
+
+   semc: semc@402f {
+   u-boot,dm-spl;
+   compatible = "fsl,imxrt-semc";
+   reg = <0x402f 0x4000>;
+   clocks = < IMXRT1020_CLK_SEMC>;
+   pinctrl-0 = <_semc>;
+   pinctrl-names = "default";
+   status = "okay";
+   };
+
+   lpuart1: serial@40184000 {
+   compatible = "fsl,imxrt-lpuart";
+   reg = <0x40184000 0x4000>;
+   interrupts = ;
+   clocks = < IMXRT1020_CLK_LPUART1>;
+   clock-names = "per";
+   status = "disabled";
+   };
+
+   iomuxc: iomuxc@401f8000 {
+   compatible = "fsl,imxrt-iomuxc";
+   reg = <0x401f8000 0x4000>;
+   fsl,mux_mask = <0x7>;
+   };
+
+   clks: ccm@400fc000 {
+   u-boot,dm-spl;
+   compatible = "fsl,imxrt1020-ccm";
+   reg = <0x400fc000 0x4000>;
+   interrupts = ,
+;
+   #clock-cells = <1>;
+   };
+
+   usdhc1: usdhc@402c {
+   u-boot,dm-spl;
+   compatible = "fsl,imxrt-usdhc";
+   reg = <0x402c 0x1>;
+   interrupts = ;
+   clocks = < IMXRT1020_CLK_USDHC1>;
+   clock-names = "per";
+   bus-width = <4>;
+   fsl,tuning-start-tap = <20>;
+   fsl,tuning-step= <2>;
+   status = "disabled";
+   };
+
+   gpio1: gpio@401b8000 {
+   u-boot,dm-spl;
+   compatible = "fsl,imxrt-gpio", "fsl,imx35-gpio";
+   reg = <0x401b8000 0x4000>;
+   interrupts = ,
+;
+   gpio-controller;
+   #gpio-cells = <2>;
+   interrupt-controller;
+   #interrupt-cells = <2>;
+   };
+
+   gpio2: gpio@401bc000 {
+   u-boot,dm-spl;
+   compatible = "fsl,imxrt-gpio", "fsl,imx35-gpio";
+   reg = <0x401bc000 0x4000>;
+   interrupts = ,
+   ;
+   gpio-controller;
+   #gpio-cells = <2>;
+   interrupt-controller;
+   #interrupt-cells = <2>;
+   };
+
+   gpio3: gpio@401c {
+   u-boot,dm-spl;
+   compatible = "fsl,imxrt-gpio", "fsl,imx35-gpio";
+   reg = <0x401c 0x4000>;
+   interrupts = ,
+   ;
+   gpio-controller;
+   #gpio-cells = <2>;
+   interrupt-controller;
+   #interrupt-cells = <2>;
+   };
+   };
+};
-- 
2.20.1

[PATCH 2/5] Add i.MXRT1020 support

[Giulio Benetti]

Signed-off-by: Giulio Benetti 
---
 arch/arm/mach-imx/imxrt/Kconfig | 4 
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/mach-imx/imxrt/Kconfig b/arch/arm/mach-imx/imxrt/Kconfig
index e3aff11d48..f28d52d3b7 100644
--- a/arch/arm/mach-imx/imxrt/Kconfig
+++ b/arch/arm/mach-imx/imxrt/Kconfig
@@ -3,6 +3,10 @@ if ARCH_IMXRT
 config IMXRT
bool
 
+config IMXRT1020
+   bool
+   select IMXRT
+
 config IMXRT1050
bool
select IMXRT
-- 
2.20.1

[PATCH 0/5] i.MXRT1020 add basic support

[Giulio Benetti]

Add Soc i.MXRT1020 to i.MXRT family and its evk support.
This Soc has many in common with i.MXRT1050 except clock init and pins
listing.

Giulio Benetti (5):
  clk: imx: add i.IMXRT1020 clk driver
  Add i.MXRT1020 support
  ARM: dts: imxrt1020: add dtsi file
  dt-bindings: pinctrl: add i.MXRT1020 pins definition
  Add support for i.MXRT1020-EVK board

 arch/arm/dts/Makefile |   3 +-
 arch/arm/dts/imxrt1020-evk-u-boot.dtsi|  44 +
 arch/arm/dts/imxrt1020-evk.dts| 198 +
 arch/arm/dts/imxrt1020.dtsi   | 133 +++
 arch/arm/mach-imx/imxrt/Kconfig   |   9 +
 board/freescale/imxrt1020-evk/Kconfig |  22 +
 board/freescale/imxrt1020-evk/MAINTAINERS |   6 +
 board/freescale/imxrt1020-evk/Makefile|   6 +
 board/freescale/imxrt1020-evk/README  |  31 +
 board/freescale/imxrt1020-evk/imximage.cfg|  36 +
 board/freescale/imxrt1020-evk/imxrt1020-evk.c |  81 ++
 configs/imxrt1020-evk_defconfig   |  67 ++
 drivers/clk/imx/Kconfig   |  16 +
 drivers/clk/imx/Makefile  |   1 +
 drivers/clk/imx/clk-imxrt1020.c   | 227 ++
 include/configs/imxrt1020-evk.h   |  46 ++
 include/dt-bindings/clock/imxrt1020-clock.h   |  52 ++
 include/dt-bindings/pinctrl/pins-imxrt1020.h  | 763 ++
 18 files changed, 1740 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/dts/imxrt1020-evk-u-boot.dtsi
 create mode 100644 arch/arm/dts/imxrt1020-evk.dts
 create mode 100644 arch/arm/dts/imxrt1020.dtsi
 create mode 100644 board/freescale/imxrt1020-evk/Kconfig
 create mode 100644 board/freescale/imxrt1020-evk/MAINTAINERS
 create mode 100644 board/freescale/imxrt1020-evk/Makefile
 create mode 100644 board/freescale/imxrt1020-evk/README
 create mode 100644 board/freescale/imxrt1020-evk/imximage.cfg
 create mode 100644 board/freescale/imxrt1020-evk/imxrt1020-evk.c
 create mode 100644 configs/imxrt1020-evk_defconfig
 create mode 100644 drivers/clk/imx/clk-imxrt1020.c
 create mode 100644 include/configs/imxrt1020-evk.h
 create mode 100644 include/dt-bindings/clock/imxrt1020-clock.h
 create mode 100644 include/dt-bindings/pinctrl/pins-imxrt1020.h

-- 
2.20.1

Re: [RFC PATCH] serial: ns16550: Move PCI access from ofdata_to_platdata() to probe()

[Simon Glass]

On Tue, 18 Feb 2020 at 05:36, Wolfgang Wallner
 wrote:
>
> Currently the ofdata_to_platdata() method calls dev_read_addr_pci(),
> which potentially accesses the parent PCI bus. If this happens before
> the parent PCI bus is probed the resulting address will be wrong.
>
> This behavior was triggered by commit 82de42fa1468 ("dm: core:
> Allocate parent data separate from probing parent").
>
> According to a comment in drivers/pci/pci-uclass.c [1] accessing
> the PCI parent bus in ofdata_to_platdata() is not allowed, and the
> access should be moved to the probe() function.
>
> Move the call to dev_read_addr_pci() and the related handling of the
> 'addr' value from the ofdata_to_platdata() to the probe() method.
>
> While moving the code, the comment /* try Processor Local Bus device
> first */ was dropped. It was initially added with commit 3db886a5bf38
> ("serial: ns16550: Support ns16550 compatible pci uart devices") and
> later made obsolete with commit 33c215af4b9d ("dm: pci: Add a function
> to read a PCI BAR").
>
> [1] Comment in drivers/pci/pci-uclass.c:
> "A common cause of this problem is that this function is called in the
> ofdata_to_platdata() method of @dev. Accessing the PCI bus in that
> method is not allowed, since it has not yet been probed. To fix this,
> move that access to the probe() method of @dev instead."
>
> Signed-off-by: Wolfgang Wallner 
>
> Fixes: 82de42fa1468 ("dm: core: Allocate parent data separate from
> probing parent")
>
> ---
> The discussion leading to this patch is located at
> https://lists.denx.de/pipermail/u-boot/2020-February/399811.html
>
>  drivers/serial/ns16550.c | 26 +-
>  1 file changed, 13 insertions(+), 13 deletions(-)

Reviewed-by: Simon Glass 

Re: [PATCH] mpc83xx, abb: remove suvd3 board

[Simon Glass]

On Tue, 18 Feb 2020 at 10:04, Heiko Schocher  wrote:
>
> the mpc83xxx suvd3 variant is not longer used, so
> remove it.
>
> Signed-off-by: Holger Brunck 
> Signed-off-by: Heiko Schocher 
> ---
> Travis build:
>
> https://travis-ci.org/hsdenx/u-boot-test/builds/651885101
>
>  arch/powerpc/cpu/mpc83xx/Kconfig |   4 -
>  board/keymile/km83xx/Kconfig |  19 
>  board/keymile/km83xx/MAINTAINERS |   2 -
>  board/keymile/km83xx/km83xx.c|  32 --
>  configs/suvd3_defconfig  | 184 ---
>  include/configs/suvd3.h  |  34 --
>  scripts/config_whitelist.txt |   1 -
>  7 files changed, 276 deletions(-)
>  delete mode 100644 configs/suvd3_defconfig
>  delete mode 100644 include/configs/suvd3.h

Reviewed-by: Simon Glass 

Re: [PATCH] x86: p2sb: Drop 'apl' prefix

[Simon Glass]

On Tue, 18 Feb 2020 at 07:32, Wolfgang Wallner
 wrote:
>
> Drop the Apollo Lake prefix 'apl' from the functions, types and
> variables in the P2SB driver.
>
> The P2SB is not Apollo Lake specific, and as such it was moved in
> commit 2999846c1127 ("x86: Move P2SB from Apollo Lake to a more generic
> location") from the Apollo Lake folder to the intel_common folder.
>
> Signed-off-by: Wolfgang Wallner 
>
> ---
> This patch follows a similar rational for P2SB as commit 03fe85a27b23
> ("x86: itss: Remove apl-prefix") for the ITSS.
>
>  arch/x86/cpu/intel_common/p2sb.c  | 30 +--
>  arch/x86/dts/chromebook_coral.dts |  2 +-
>  .../gpio/intel,apl-gpio.txt   |  2 +-
>  .../pinctrl/intel,apl-pinctrl.txt |  2 +-
>  4 files changed, 18 insertions(+), 18 deletions(-)

Reviewed-by: Simon Glass 

Re: [PATCH 1/1] dm: pinctrl: include linux/errno.h in pinctrl.h

[Simon Glass]

On Mon, 17 Feb 2020 at 06:14, Sébastien Szymanski
 wrote:
>
> Otherwise the compilation fails with PINCTRL_GENERIC=n :
>
> In file included from drivers/pinctrl/nxp/pinctrl-imx8m.c:7:0:
> include/dm/pinctrl.h: In function ‘pinctrl_generic_set_state’:
> include/dm/pinctrl.h:319:10: error: ‘EINVAL’ undeclared (first use in this 
> function)
>   return -EINVAL;
>   ^~
> include/dm/pinctrl.h:319:10: note: each undeclared identifier is reported 
> only once for each function it appears in
>
> Signed-off-by: Sébastien Szymanski 
> ---
>  include/dm/pinctrl.h | 2 ++
>  1 file changed, 2 insertions(+)

Reviewed-by: Simon Glass 

Re: [PATCH 1/2] dm: core: Add a flag for power domain control on device removal

[Simon Glass]

Hi Anatolij,

On Mon, 17 Feb 2020 at 04:36, Anatolij Gustschin  wrote:
>
> In various cases a power domain must stay enabled after device
> removal when booting OS (i.e. serial debug console or display).
> Add a flag to selectively skip switching off a power domain.
>
> Fixes: 52edfed65de9 ("dm: core: device: switch off power domain after device 
> removal")
> Signed-off-by: Anatolij Gustschin 
> ---
>  drivers/core/device-remove.c | 5 +++--
>  include/dm/device.h  | 6 ++
>  2 files changed, 9 insertions(+), 2 deletions(-)

This seems OK. Should we add a device tree property for this? Or is
the driver-level side enough.

Regards,
Simon

Re: [PATCH v3] dm: core: Move "/chosen" and "/firmware" node scan

[Simon Glass]

On Tue, 18 Feb 2020 at 07:44, Patrick Delaunay  wrote:
>
> Use the new function dm_scan_fdt_ofnode_path() to scan all the nodes
> which aren't devices themselves but may contain some:
> - "/chosen"
> - "/clocks"
> - "/firmware"
>
> The patch removes the strcmp call in recursive function dm_scan_fdt_live()
> and also corrects a conflict with the 2 applied patches in
> the commit 1712ca21924b ("dm: core: Scan /firmware node by default")
> and in the commit 747558d01457 ("dm: fdt: scan for devices under
> /firmware too"): the subnodes of "/firmware" (optee for example)
> are bound 2 times.
>
> For example the dm tree command result on STM32MP1 is:
>
> STM32MP> dm tree
>  Class Index  Probed  DriverName
>  ---
>  root  0  [ + ]   root_driver   root_driver
>  firmware  0  [   ]   psci  |-- psci
>  sysreset  0  [   ]   psci-sysreset |   `-- psci-sysreset
>  simple_bus0  [ + ]   generic_simple_bus|-- soc
> ...
>  tee   0  [ + ]   optee |-- optee
> ...
>  tee   1  [   ]   optee `-- optee
>
> Signed-off-by: Patrick Delaunay 
> Tested-by: Michal Simek 
> ---
>
> Also reported here:
> https://lists.denx.de/pipermail/u-boot/2020-January/395427.html
>
>
> Changes in v3:
> - update test-fdt: use dm_extended_scan_fdt instead of dm_scan_fdt
>
> Changes in v2:
> - update commit message (Serie-cc => Series-cc)
>
>  drivers/core/root.c | 52 +++--
>  test/dm/test-fdt.c  |  2 +-
>  2 files changed, 18 insertions(+), 36 deletions(-)

Reviewed-by: Simon Glass 

Re: [PATCH v2 01/10] net: eth-uclass: eth_get_dev based on SEQ_ALIAS instead of probe order

[Simon Glass]

Hi Keerthy,

On Mon, 17 Feb 2020 at 22:10, Keerthy  wrote:
>
> In case of multiple eth interfaces currently eth_get_dev
> fetches the device based on the probe order which can be
> random hence try with the alias.
>
> Signed-off-by: Keerthy 
> ---
>
> Changes in v2:
>
>   * Fixed comments from Tom & Lokesh as per:
> https://patchwork.ozlabs.org/patch/1142697/
>
>  net/eth-uclass.c | 12 +---
>  1 file changed, 9 insertions(+), 3 deletions(-)

This one is for Joe to review.

But please do add/update the network tests to cover this behaviour.

Regards,
Simon

Re: [PATCH v4 0/5] usb: host: dwc2: use driver model for PHY and CLOCK

[Marek Vasut]

On 2/18/20 9:34 AM, Patrick Delaunay wrote:
> 
> In this serie I update the DWC2 host driver to use the device tree
> information and the associated PHY and CLOCK drivers when they are
> availables.
> 
> The V4 is rebased on latest master (v2020.04-rc2).
> CI-Tavis build is OK:
> https://travis-ci.org/patrickdelaunay/u-boot/builds/651479714
> 
> NB: CI-Travis build was OK for all target after V3:
> https://travis-ci.org/patrickdelaunay/u-boot/builds/609496187
> As in V2, I cause the warnings for some boards:
> drivers/usb/host/built-in.o: In function `dwc2_usb_remove':
> drivers/usb/host/dwc2.c:1441: undefined reference to `clk_disable_bulk'
> 
> I test this serie on stm32mp157c-ev1 board, with PHY and CLK
> support
> 
> The U-CLASS are provided by:
> - PHY by USBPHYC driver = ./drivers/phy/phy-stm32-usbphyc.c
> - CLOCK by RCC clock driver = drivers/clk/clk_stm32mp1.c
> - RESET by RCC reset driver = drivers/reset/stm32-reset.c
> 
> And I activate the configuration
> +CONFIG_USB_DWC2=y

Simon, can you test this on SOCFPGA ?

[...]

Re: [PATCH] ARM: socfpga: Add initial support for the ABB SECU board

[Marek Vasut]

On 2/18/20 8:47 AM, Holger Brunck wrote:
> Hi Marek and Wolfgang,
> 
>>> In message <20200217173249.4805-1-ma...@denx.de> you wrote:

  board/keymile/Kconfig   |  11 +-
  board/keymile/common/ivm.c  |  18 +-
  board/keymile/secu1/Makefile|   7 +
  board/keymile/secu1/qts/iocsr_config.h  | 694
   board/keymile/secu1/qts/pinmux_config.h
>> | 218 
  board/keymile/secu1/qts/pll_config.h|  83 +++
  board/keymile/secu1/qts/sdram_config.h  | 327 +++
  board/keymile/secu1/socfpga.c   |  67 +++
>>> ...
 +select VENDOR_KM
>>>
>>> Would it make sense to rename keymile -> abb (or abb-ch) here (ditto
>>> for KM in the config options / macro names) ?
>>
>> This is more of a question for Holger, but I agree the renaming should
>> eventually happen to align it with current state of things.
> 
> yes I have it on my list to rename this folder to wcom (wiredcom)  or 
> wcom-abb.
> But this goes for all the boards in this folder and not only secu. But until 
> know
> I didn't find the right time to do it as we have currently several activities 
> ongoing for
> u-boot (re-aligning other boards and migrating PPC to DTS).
> 
> I assume SECU goes for v2020.07 as we are too late for v2020.04 or?  I think 
> I can
> spend some time for the next merge window to tackle this folder issue for all 
> boards
> and then we rebase and adapt this  patch.

Boards and drivers which are self-contained can apparently go in even
during RC cycle.

Re: [PATCH] ARM: socfpga: Add initial support for the ABB SECU board

[Marek Vasut]

On 2/18/20 1:54 AM, Tan, Ley Foon wrote:
[...]

>> diff --git a/board/keymile/common/ivm.c b/board/keymile/common/ivm.c
>> index fee7f03c8c..80dae73bb6 100644
>> --- a/board/keymile/common/ivm.c
>> +++ b/board/keymile/common/ivm.c
>> @@ -328,7 +328,23 @@ static int ivm_populate_env(unsigned char *buf, int
>> len, int mac_address_offset)  int ivm_read_eeprom(unsigned char *buf, int
>> len, int mac_address_offset)  {
>>  int ret;
>> +#ifdef CONFIG_DM_I2C
>> +struct udevice *eedev = NULL;
>> +
>> +ret = i2c_get_chip_for_busnum(CONFIG_KM_IVM_BUS,
>> +  CONFIG_SYS_I2C_EEPROM_ADDR, 1,
>> );
>> +if (ret) {
>> +printf("failed to get device for EEPROM at address 0x50\n");
>   Should change 0x50 to value of CONFIG_SYS_I2C_EEPROM_ADDR.

OK

btw please trim the emails, I really had trouble finding this one line
in the sea of quoted text.

>> +return 1;
>> +}
>>
>> +ret = dm_i2c_read(eedev, 0, buf, len);
>> +if (ret != 0) {
>> +printf("Error: Unable to read from I2C EEPROM at
>> address %02X:%02X\n",
>> +   CONFIG_SYS_I2C_EEPROM_ADDR, 0);
>> +return 1;
>> +}
>> +#else

[...]

Re: [PATCH v2 3/8] board: sunxi: change trace level for phy errors managed by uclass

[Marek Vasut]

On 2/18/20 9:38 AM, Patrick Delaunay wrote:
> As the error message is now displayed by generic phy functions,
> the pr_err can be change to pr_idebug.

pr_debug(), not pr_ i debug()

Re: [PATCH v2 6/8] usb: dwc3: change trace level for phy errors managed by uclass

[Marek Vasut]

On 2/18/20 9:38 AM, Patrick Delaunay wrote:
> As the error message is now displayed by generic phy functions,
> the pr_err can be change to pr_debug.
> 
> Signed-off-by: Patrick Delaunay 
> ---
> 
> Changes in v2: None
> 
>  drivers/usb/dwc3/core.c | 12 ++--
>  1 file changed, 6 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
> index c5066529b7..6304036c00 100644
> --- a/drivers/usb/dwc3/core.c
> +++ b/drivers/usb/dwc3/core.c
> @@ -867,8 +867,8 @@ int dwc3_setup_phy(struct udevice *dev, struct phy 
> **array, int *num_phys)
>   for (i = 0; i < count; i++) {
>   ret = generic_phy_init(_phys[i]);
>   if (ret) {
> - pr_err("Can't init USB PHY%d for %s\n",
> -i, dev->name);
> + pr_debug("Can't init USB PHY%d for %s\n",
> +  i, dev->name);

dev_dbg() , since you have a dev pointer.

Re: [PATCH v2 1/8] phy: generic: add error trace to detect PHY issue in uclass

[Marek Vasut]

On 2/18/20 9:38 AM, Patrick Delaunay wrote:
[...]
>  static inline struct phy_ops *phy_dev_ops(struct udevice *dev)
>  {
> @@ -109,56 +110,86 @@ int generic_phy_get_by_name(struct udevice *dev, const 
> char *phy_name,
>  int generic_phy_init(struct phy *phy)
>  {
>   struct phy_ops const *ops;
> + int ret;
>  
>   if (!phy)
>   return 0;
>   ops = phy_dev_ops(phy->dev);
>  
> - return ops->init ? ops->init(phy) : 0;
> + ret = ops->init ? ops->init(phy) : 0;

if (!ops->init)
   return 0;
ret = ops->init();
if (ret)
   dev_err...

return ret;

Please fix globally.

> + if (ret)
> + dev_err(phy->dev, "PHY: Failed to init %s: %d.\n",
> + phy->dev->name, ret);
> +
> + return ret;
[...]

Re: NanoPi-M4 boot issue

[Trevor Woerner]

cc'ing some maintainers...

On Sat 2020-02-15 @ 01:16:36 AM, Trevor Woerner wrote:
> Hi,
> 
> I'm trying to build an image for a NanoPi-M4 but it is not able to get out of
> TPL. The U-Boot build seems to be constructing the idbloader.img properly, but
> the board is failing to boot. Note that this is an original NanoPi-M4 (i.e.
> V1) and not the NanoPi-M4V2.
> 
> From the build log:
>   ...
>   cat tpl/u-boot-tpl-nodtb.bin tpl/u-boot-tpl.dtb > tpl/u-boot-tpl-dtb.bin
>   cp tpl/u-boot-tpl-dtb.bin tpl/u-boot-tpl.bin
>   ./tools/mkimage -n "rk3399" -T rksd -d tpl/u-boot-tpl.bin 
> tpl/u-boot-tpl-rockchip.bin
>   ...
>   cat spl/u-boot-spl-nodtb.bin spl/u-boot-spl.dtb > spl/u-boot-spl-dtb.bin
>   cp spl/u-boot-spl-dtb.bin spl/u-boot-spl.bin
>   cat tpl/u-boot-tpl-rockchip.bin spl/u-boot-spl.bin > idbloader.img
> 
> What I get on the console is:
> 
>   U-Boot TPL 2020.04-rc2 (Feb 15 2020 - 05:36:59)
>   sdram_init: LPDDR3 - 933MHz failed!
>   rk3399_dmc_init DRAM init failed -22
>   Missing DTB
> 
> It's strange that it says the DTB is missing clearly shows the DTB versions of
> TPL and SPL being used to create the idbloader.img.
> 
> In any case, is anyone building and booting U-Boot master for NanoPi-M4?
> 
> Best regards,
>   Trevor

Re: [PATCH] image.h: use uint32_t instead of u32 in android_image_get_dtb*

[Masahiro Yamada]

On Mon, Feb 17, 2020 at 7:24 PM Eugeniu Rosca  wrote:
>
> Replace 'u32' by 'uint32_t' in image.h, since the former may lead to
> build failures in U-Boot tooling (see [1]).
>
> Avoid using 'uint', since it is not a fixed-width type [2], potentially
> leading to a dangerous mismatch between the prototypes and definitions
> of the android_image_get_dtb* functions.
>
> This should be the quickest way to overcome the tooling build failure,
> with more future-proof solutions being proposed by Yamada-san in [1].
>
> [1] https://patchwork.ozlabs.org/patch/1238245/
> [2] Excerpt from https://en.cppreference.com/w/cpp/language/types
>  ---8<
>  Type specifierWidth in bits by data model
>LP32  ILP32  LLP64  LP64
>  unsigned int  1632 32 32
>  ---8<
>
> Cc: Tom Rini 
> Cc: Sam Protsenko 
> Fixes: 7f2531502c74c0 ("image: android: Add routine to get dtbo params")
> Fixes: c3bfad825a71ea ("image: android: Add functions for handling dtb field")
> Suggested-by: Masahiro Yamada 
> Signed-off-by: Eugeniu Rosca 
> ---



Reviewed-by: Masahiro Yamada 


-- 
Best Regards
Masahiro Yamada

Re: [PATCH] fixdep: fix U-Boot own code to handle only valid symbol characters

[Masahiro Yamada]

On Tue, Feb 18, 2020 at 8:06 PM Masahiro Yamada  wrote:
>
> Currently, fixdep skips parsing include/linux/kconfig.h, but if it
> parsed it, it would translate the following code in kconfig.h
>
>   config_enabled(CONFIG_VAL(option##_MODULE)
>
> into:
>
>   $(wildcard include/config/option##/module.h)
>
> When Kbuild includes .*.cmd, it would emit the following error:
>
>   *** unterminated call to function 'wildcard': missing ')'.  Stop.
>
> This issue prevents us from importing the upstream Linux commit
> 638e69cf2230 ("fixdep: do not ignore kconfig.h").
>
> Fix this by handling only alphanumerical characters and underscores.
> This makes sense because they match to the valid character sets in
> Kconfig symbols.
>
> As a side-note, you can reproduce this issue only on GNU Make <= 4.2.1
>
> For GNU Make <= 4.2.1, the '#' always means the start of a comment.
> Hence, GNU Make thinks the closing ')' is missing.
>
> The following commit in GNU Make changed how it handles '#' in
> function invocations. So, this does not happen for GNU Make 4.3
>
> | commit c6966b323811c37acedff05b576b907b06aea5f4
> | Author: Paul Smith 
> | Date:   Thu Dec 22 18:47:26 2016 -0500
> |
> |[SV 20513] Un-escaped # are not comments in function invocations
>
> Signed-off-by: Masahiro Yamada 
> ---
>
> This patch is applicable to the current upstream code.


One more tag:

Reported-by: Tom Rini 




-- 
Best Regards
Masahiro Yamada

Re: [PATCH 4/4] i2c: gpio: Run deblock sequence on probe

[Marek Vasut]

On 2/18/20 8:11 AM, Heiko Schocher wrote:
> Hello Marek,
> 
> Am 07.02.2020 um 16:57 schrieb Marek Vasut:
>> Add deblock dequence for the I2C bus, needed on some devices. This
>> sequence
>> is issued once, when probing the driver, and is controlled by DT
>> property,
>> "i2c-gpio,deblock".
>>
>> Signed-off-by: Marek Vasut 
>> ---
>>   drivers/i2c/i2c-gpio.c | 15 +++
>>   1 file changed, 15 insertions(+)
> 
> Nitpick: I see no entry in doc/device-tree-bindings/i2c/i2c-gpio.txt
> for the new dts binding ... please send a follow up patch which adds it,
> or a v2 for this one, thanks!

Done in
[PATCH] doc: i2c: gpio: Document deblock sequence on probe

Re: [PATCH 3/4] i2c: Add option to send start condition after deblocking

[Marek Vasut]

On 2/18/20 8:07 AM, Heiko Schocher wrote:
> Hello Marek,

Hi,

> Am 07.02.2020 um 16:57 schrieb Marek Vasut:
>> Add option to send start condition after deblocking SDA.
>>
>> Signed-off-by: Marek Vasut 
>> ---
>>   drivers/i2c/i2c-uclass.c | 23 ---
>>   include/i2c.h    |  4 +++-
>>   2 files changed, 23 insertions(+), 4 deletions(-)
> 
> Reviewed-by: Heiko Schocher 
> 
>> diff --git a/drivers/i2c/i2c-uclass.c b/drivers/i2c/i2c-uclass.c
>> index 86f529241f..e9ec388576 100644
>> --- a/drivers/i2c/i2c-uclass.c
>> +++ b/drivers/i2c/i2c-uclass.c
>> @@ -504,9 +504,10 @@ static int i2c_gpio_get_pin(struct gpio_desc *pin)
>>   int i2c_deblock_gpio_loop(struct gpio_desc *sda_pin,
>>     struct gpio_desc *scl_pin,
>>     unsigned int scl_count,
>> +  unsigned int start_count,
>>     unsigned int delay)
>>   {
>> -    int ret = 0;
>> +    int i, ret = -EREMOTEIO;
>>     i2c_gpio_set_pin(sda_pin, 1);
>>   i2c_gpio_set_pin(scl_pin, 1);
>> @@ -518,8 +519,24 @@ int i2c_deblock_gpio_loop(struct gpio_desc *sda_pin,
>>   udelay(delay);
>>   i2c_gpio_set_pin(scl_pin, 0);
>>   udelay(delay);
>> -    if (i2c_gpio_get_pin(sda_pin))
>> +    if (i2c_gpio_get_pin(sda_pin)) {
>> +    ret = 0;
>>   break;
>> +    }
>> +    }
>> +
>> +    if (!ret && start_count) {
>> +    for (i = 0; i < start_count; i++) {
>> +    /* Send start condition */
>> +    udelay(delay);
>> +    i2c_gpio_set_pin(sda_pin, 1);
>> +    udelay(delay);
>> +    i2c_gpio_set_pin(scl_pin, 1);
>> +    udelay(delay);
>> +    i2c_gpio_set_pin(sda_pin, 0);
>> +    udelay(delay);
>> +    i2c_gpio_set_pin(scl_pin, 0);
>> +    }
>>   }
>>     /* Then, send I2C stop */
>> @@ -562,7 +579,7 @@ static int i2c_deblock_gpio(struct udevice *bus)
>>   goto out_no_pinctrl;
>>   }
>>   -    ret0 = i2c_deblock_gpio_loop([PIN_SDA], [PIN_SCL],
>> 9, 5);
>> +    ret0 = i2c_deblock_gpio_loop([PIN_SDA], [PIN_SCL], 9,
>> 0, 5);
>>     ret = pinctrl_select_state(bus, "default");
>>   if (ret) {
>> diff --git a/include/i2c.h b/include/i2c.h
>> index 7c92042c58..059200115a 100644
>> --- a/include/i2c.h
>> +++ b/include/i2c.h
>> @@ -339,12 +339,14 @@ int i2c_deblock(struct udevice *bus);
>>    * @sda_pin:    SDA GPIO
>>    * @scl_pin:    SCL GPIO
>>    * @scl_count:    Number of SCL clock cycles generated to deblock SDA
>> + * @start_count:Number of I2C start conditions sent after deblocking SDA
> 
> Is there a tab missing? If so I can add it, when applying this patch.

Nope, if you add tab, the formatting starts to look real awful.
You can add a space if you feel very inclined to do so, but it would
still look ugly.

[PATCH] doc: i2c: gpio: Document deblock sequence on probe

[Marek Vasut]

Document the gpio-i2c deblocking sequence binding.

Signed-off-by: Marek Vasut 
---
 doc/device-tree-bindings/i2c/i2c-gpio.txt | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/doc/device-tree-bindings/i2c/i2c-gpio.txt 
b/doc/device-tree-bindings/i2c/i2c-gpio.txt
index ba56ed5dea..e29eeba9e6 100644
--- a/doc/device-tree-bindings/i2c/i2c-gpio.txt
+++ b/doc/device-tree-bindings/i2c/i2c-gpio.txt
@@ -16,6 +16,8 @@ Optional:
The resulting transfer speed can be adjusted by setting the delay[us]
between gpio-toggle operations. Speed [Hz] = 100 / 4 * udelay[us],
It not defined, then default is 5us (~50KHz).
+* i2c-gpio,deblock
+   Run deblocking sequence when the driver gets probed.
 
 Example:
 
-- 
2.24.1

[PATCH V3 1/2] ARM: socfpga: Permit overriding the default timer frequency

[Marek Vasut]

The default timer rate may be different than 25 MHz, permit overriding
the default rate in board configuration file. Ultimatelly, this should
be properly handled by a clock driver, however that is not available
on Gen5 yet.

Signed-off-by: Marek Vasut 
Cc: Ley Foon Tan 
Cc: Simon Goldschmidt 
---
V2: Drop misleading comment
V3: No change
---
 include/configs/socfpga_common.h | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h
index 8d10469e7c..54a43569dc 100644
--- a/include/configs/socfpga_common.h
+++ b/include/configs/socfpga_common.h
@@ -94,12 +94,13 @@
  * L4 OSC1 Timer 0
  */
 #ifndef CONFIG_TIMER
-/* This timer uses eosc1, whose clock frequency is fixed at any condition. */
 #define CONFIG_SYS_TIMERBASE   SOCFPGA_OSC1TIMER0_ADDRESS
 #define CONFIG_SYS_TIMER_COUNTS_DOWN
 #define CONFIG_SYS_TIMER_COUNTER   (CONFIG_SYS_TIMERBASE + 0x4)
+#ifndef CONFIG_SYS_TIMER_RATE
 #define CONFIG_SYS_TIMER_RATE  2500
 #endif
+#endif
 
 /*
  * L4 Watchdog
-- 
2.24.1

[PATCH V3 2/2] ARM: socfpga: Add missing Denali NAND config options

[Marek Vasut]

The Denali SPL shim won't build without these options set,
set them accordingly to fix the build error and let the SPL
shim to work correctly.

Signed-off-by: Marek Vasut 
Cc: Ley Foon Tan 
Cc: Simon Goldschmidt 
---
V2: No changes
V2: Drop CONFIG_SYS_NAND_USE_FLASH_BBT
---
 include/configs/socfpga_common.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h
index 54a43569dc..ec41843695 100644
--- a/include/configs/socfpga_common.h
+++ b/include/configs/socfpga_common.h
@@ -121,6 +121,7 @@
  * NAND Support
  */
 #ifdef CONFIG_NAND_DENALI
+#define CONFIG_SYS_NAND_BAD_BLOCK_POS  0
 #define CONFIG_SYS_MAX_NAND_DEVICE 1
 #define CONFIG_SYS_NAND_ONFI_DETECTION
 #define CONFIG_SYS_NAND_REGS_BASE  SOCFPGA_NANDREGS_ADDRESS
-- 
2.24.1

[PATCH] mpc83xx, abb: remove suvd3 board

[Heiko Schocher]

the mpc83xxx suvd3 variant is not longer used, so
remove it.

Signed-off-by: Holger Brunck 
Signed-off-by: Heiko Schocher 
---
Travis build:

https://travis-ci.org/hsdenx/u-boot-test/builds/651885101

 arch/powerpc/cpu/mpc83xx/Kconfig |   4 -
 board/keymile/km83xx/Kconfig |  19 
 board/keymile/km83xx/MAINTAINERS |   2 -
 board/keymile/km83xx/km83xx.c|  32 --
 configs/suvd3_defconfig  | 184 ---
 include/configs/suvd3.h  |  34 --
 scripts/config_whitelist.txt |   1 -
 7 files changed, 276 deletions(-)
 delete mode 100644 configs/suvd3_defconfig
 delete mode 100644 include/configs/suvd3.h

diff --git a/arch/powerpc/cpu/mpc83xx/Kconfig b/arch/powerpc/cpu/mpc83xx/Kconfig
index 5d7650294d..18808da37d 100644
--- a/arch/powerpc/cpu/mpc83xx/Kconfig
+++ b/arch/powerpc/cpu/mpc83xx/Kconfig
@@ -106,10 +106,6 @@ config TARGET_KMCOGE5NE
bool "Support kmcoge5ne"
select VENDOR_KM
 
-config TARGET_SUVD3
-   bool "Support suvd3"
-   select VENDOR_KM
-
 config TARGET_KMTEGR1
bool "Support kmtegr1"
select VENDOR_KM
diff --git a/board/keymile/km83xx/Kconfig b/board/keymile/km83xx/Kconfig
index 1011cc8b2c..94075ce70f 100644
--- a/board/keymile/km83xx/Kconfig
+++ b/board/keymile/km83xx/Kconfig
@@ -57,25 +57,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 
 endif
 
-if TARGET_SUVD3
-
-config SYS_BOARD
-   default "km83xx"
-
-config SYS_VENDOR
-   default "keymile"
-
-config SYS_CONFIG_NAME
-   default "suvd3"
-
-config BOARD_SPECIFIC_OPTIONS # dummy
-   def_bool y
-   select ARCH_MPC832X
-   imply CMD_CRAMFS
-   imply FS_CRAMFS
-
-endif
-
 if TARGET_TUXX1
 
 config SYS_BOARD
diff --git a/board/keymile/km83xx/MAINTAINERS b/board/keymile/km83xx/MAINTAINERS
index d2af983073..177c2c4970 100644
--- a/board/keymile/km83xx/MAINTAINERS
+++ b/board/keymile/km83xx/MAINTAINERS
@@ -8,9 +8,7 @@ F:  configs/kmeter1_defconfig
 F: include/configs/tuxx1.h
 F: configs/kmopti2_defconfig
 F: configs/kmtepr2_defconfig
-F: include/configs/suvd3.h
 F: configs/kmtegr1_defconfig
-F: configs/suvd3_defconfig
 F: configs/tuge1_defconfig
 F: configs/tuxx1_defconfig
 
diff --git a/board/keymile/km83xx/km83xx.c b/board/keymile/km83xx/km83xx.c
index 23bbdcccac..e885486e3b 100644
--- a/board/keymile/km83xx/km83xx.c
+++ b/board/keymile/km83xx/km83xx.c
@@ -98,27 +98,6 @@ const qe_iop_conf_t qe_iop_conf_tab[] = {
{0,  0, 0, 0, QE_IOP_TAB_END},
 };
 
-#if defined(CONFIG_SUVD3)
-const uint upma_table[] = {
-   0x1ffedc00, 0x0ffcdc80, 0x0ffcdc80, 0x0ffcdc04, /* Words 0 to 3 */
-   0x0ffcdc00, 0xcc00, 0xcc01, 0xfc01, /* Words 4 to 7 */
-   0xfc01, 0xfc01, 0xfc01, 0xfc01, /* Words 8 to 11 */
-   0xfc01, 0xfc01, 0xfc01, 0xfc01, /* Words 12 to 15 */
-   0xfc01, 0xfc01, 0xfc01, 0xfc01, /* Words 16 to 19 */
-   0xfc01, 0xfc01, 0xfc01, 0xfc01, /* Words 20 to 23 */
-   0x9cfffc00, 0x00fffc80, 0x00fffc80, 0x00fffc00, /* Words 24 to 27 */
-   0xec04, 0xec01, 0xfc01, 0xfc01, /* Words 28 to 31 */
-   0xfc01, 0xfc01, 0xfc01, 0xfc01, /* Words 32 to 35 */
-   0xfc01, 0xfc01, 0xfc01, 0xfc01, /* Words 36 to 39 */
-   0xfc01, 0xfc01, 0xfc01, 0xfc01, /* Words 40 to 43 */
-   0xfc01, 0xfc01, 0xfc01, 0xfc01, /* Words 44 to 47 */
-   0xfc01, 0xfc01, 0xfc01, 0xfc01, /* Words 48 to 51 */
-   0xfc01, 0xfc01, 0xfc01, 0xfc01, /* Words 52 to 55 */
-   0xfc01, 0xfc01, 0xfc01, 0xfc01, /* Words 56 to 59 */
-   0xfc01, 0xfc01, 0xfc01, 0xfc01  /* Words 60 to 63 */
-};
-#endif
-
 static int piggy_present(void)
 {
struct km_bec_fpga __iomem *base =
@@ -136,11 +115,6 @@ int board_early_init_r(void)
 {
struct km_bec_fpga *base =
(struct km_bec_fpga *)CONFIG_SYS_KMBEC_FPGA_BASE;
-#if defined(CONFIG_SUVD3)
-   immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
-   fsl_lbc_t *lbc = >im_lbc;
-   u32 *mxmr = >mamr;
-#endif
 
 #if defined(CONFIG_ARCH_MPC8360)
unsigned short  svid;
@@ -176,12 +150,6 @@ int board_early_init_r(void)
/* enable Application Buffer */
setbits_8(>oprtl, OPRTL_XBUFENA);
 
-#if defined(CONFIG_SUVD3)
-   /* configure UPMA for APP1 */
-   upmconfig(UPMA, (uint *) upma_table,
-   sizeof(upma_table) / sizeof(uint));
-   out_be32(mxmr, CONFIG_SYS_MAMR);
-#endif
return 0;
 }
 
diff --git a/configs/suvd3_defconfig b/configs/suvd3_defconfig
deleted file mode 100644
index 9908ca04a6..00
--- a/configs/suvd3_defconfig
+++ /dev/null
@@ -1,184 +0,0 @@
-CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0xF000
-CONFIG_ENV_SIZE=0x4000
-CONFIG_ENV_SECT_SIZE=0x2
-CONFIG_BOOTCOUNT_BOOTLIMIT=3
-CONFIG_SYS_BOOTCOUNT_ADDR=0xE0113FF8
-CONFIG_SYS_CLK_FREQ=6600

Re: [PATCH 1/1] efi_loader: EFI_RNG_PROTOCOL

[Sughosh Ganu]

On Tue, 18 Feb 2020 at 19:44, Heinrich Schuchardt 
wrote:

>
>
> On 2/18/20 11:26 AM, Sughosh Ganu wrote:
> >
> > On Sat, 15 Feb 2020 at 04:04, Heinrich Schuchardt  > > wrote:
> >
> > Do not use quotation marks for Kconfig help text.
> > Replace rng abbreviation by full words.
> >
> > Signed-off-by: Heinrich Schuchardt  > >
> > ---
> >   lib/efi_loader/Kconfig | 4 ++--
> >   1 file changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/lib/efi_loader/Kconfig b/lib/efi_loader/Kconfig
> > index a7afa3f29e..84a4a35d80 100644
> > --- a/lib/efi_loader/Kconfig
> > +++ b/lib/efi_loader/Kconfig
> > @@ -127,7 +127,7 @@ config EFI_RNG_PROTOCOL
> >  bool "EFI_RNG_PROTOCOL support"
> >  depends on DM_RNG
> >  help
> > - "Support for EFI_RNG_PROTOCOL implementation. Uses the rng
> > -  device on the platform"
> > + Provide a EFI_RNG_PROTOCOL implementation using the
> > hardware random
> > + number generator of the platform.
> >
> >
> > Should we mention the word hardware in the sentence. Can it simply be
> > stated as "random number generator". I know that the existing sentence
> > too uses "rng device" which has hardware connotations. But the protocol
> > can also be used with a pseudo random number generator as well.
> >
> > -sughosh
>
> Chapter 37.5 Random Number Generator Protocol of the UEFI mentions that
> if this protocol uses a deterministic RNG it must be based on a source
> of raw entropy.
>
> So I think "using the hardware random number generator of the platform"
> is accurate.
>

Yes. Makes sense.

Acked-by: Sughosh Ganu 

-sughosh

Re: [PATCH v4 07/17] spi: dw: Add mem_ops

[Sean Anderson]

On 2/18/20 3:34 AM, Rick Chen wrote:
> Hi Sean
> 
>> The dw spi devices on the Kendryte K210 must be operated in a specific
>> fasion which cannot be achived through multiple writes to via dw_spi_xfer
>> (as it is currently written). This patch adds an implementation of exec_op,
>> which gives correct behaviour when reading/writing spi flash.
>>
>> I would like to be able to modify the existing dw_spi_xfer function such
>> that it works properly (e.g. with the mmc_spi driver). However, the only
>> example code I have to work off is Kendryte's sdk (which is written in the
>> exec_op style), and I do not have access to the datasheet (if anyone does,
>> I would love to have a look!).
>>
>> Signed-off-by: Sean Anderson 
>> ---
>>
>> Changes in v4:
>> - New
>>
>>  drivers/spi/designware_spi.c | 123 +--
>>  1 file changed, 119 insertions(+), 4 deletions(-)
>>
> 
> Patch 6 and 7 shall be applied via spi tree.
> You mix them together, the patchwork will become complicated.
> It will be better for me to wait for a period of time to get the
> approval(Reviewed-by or Acked-by) of SPI MAINTAINER.
> 
> Thanks
> Rick

So is this just waiting for approval, or is there a change I should make
on my end?

--Sean

[PATCH] tools: image-host.c: remove uboot_aes.h

[Philippe Reynes]

The include uboot_aes.h is not usefull and
it breaks the compilation on android, so
we remove it.

Signed-off-by: Philippe Reynes 
---
 tools/image-host.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/tools/image-host.c b/tools/image-host.c
index 9483561..76a361b 100644
--- a/tools/image-host.c
+++ b/tools/image-host.c
@@ -12,7 +12,6 @@
 #include 
 #include 
 #include 
-#include 
 
 /**
  * fit_set_hash_value - set hash value in requested has node
-- 
2.7.4

[PATCH v1 2/2] cpu: clk: riscv: populate proper CPU core clk frequency

[Sagar Shrikant Kadam]

Fetch core clock frequency from prci if clock-frequency for CPU nodes
is missing in device tree, so that the cmd "#cpu detail" will show the
correct CPU frequency.

U-Boot command "#cpu detail" is showing wrong frequency values.
This patch fixes this issue by getting the core clock set in prci driver
if clock-frequency is not added to CPU nodes in device tree.
It is tested on HiFive Unleashed A00 board.

Signed-off-by: Sagar Shrikant Kadam 
Tested-by: Vincent Chen 
---
 drivers/cpu/riscv_cpu.c | 39 ++-
 1 file changed, 38 insertions(+), 1 deletion(-)

diff --git a/drivers/cpu/riscv_cpu.c b/drivers/cpu/riscv_cpu.c
index 28ad0aa..eb5491f 100644
--- a/drivers/cpu/riscv_cpu.c
+++ b/drivers/cpu/riscv_cpu.c
@@ -9,6 +9,8 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -25,11 +27,46 @@ static int riscv_cpu_get_desc(struct udevice *dev, char 
*buf, int size)
return 0;
 }
 
+static ulong riscv_get_clkrate(int clk_index)
+{
+   int ret;
+   struct udevice *dev;
+   struct clk clk;
+   ulong rate;
+
+   ret = uclass_get_device_by_driver(UCLASS_CLK,
+ DM_GET_DRIVER(sifive_fu540_prci),
+ );
+   if (ret < 0) {
+   pr_err("%s: Could not get device driver\n", __func__);
+   return ret;
+   }
+
+   clk.id = clk_index;
+   ret = clk_request(dev, );
+   if (ret < 0) {
+   pr_err("%s: request to clock device failed...\n", __func__);
+   return ret;
+   }
+
+   rate = clk_get_rate();
+
+   clk_free();
+
+   return rate;
+}
+
 static int riscv_cpu_get_info(struct udevice *dev, struct cpu_info *info)
 {
const char *mmu;
+   int ret;
 
-   dev_read_u32(dev, "clock-frequency", (u32 *)>cpu_freq);
+   ret = dev_read_u32(dev, "clock-frequency", (u32 *)>cpu_freq);
+   if (ret) {
+   /* if clock-frequency is missing in DT, read it from prci */
+   debug("Fetch core clk configured by prci\n");
+   info->cpu_freq = riscv_get_clkrate(PRCI_CLK_COREPLL);
+   }
 
mmu = dev_read_string(dev, "mmu-type");
if (!mmu)
-- 
2.7.4

[PATCH v1 1/2] fu540: prci: add request and free clock handlers

[Sagar Shrikant Kadam]

Add handlers to check if a valid clock id is used to request clock
by any driver using clk_request/clk_free API calls.

Signed-off-by: Sagar Shrikant Kadam 
Tested-by: Vincent Chen 
---
 drivers/clk/sifive/fu540-prci.c | 24 
 1 file changed, 24 insertions(+)

diff --git a/drivers/clk/sifive/fu540-prci.c b/drivers/clk/sifive/fu540-prci.c
index 8847178..ecf29a0 100644
--- a/drivers/clk/sifive/fu540-prci.c
+++ b/drivers/clk/sifive/fu540-prci.c
@@ -580,6 +580,28 @@ static ulong sifive_fu540_prci_set_rate(struct clk *clk, 
ulong rate)
return rate;
 }
 
+static int sifive_fu540_prci_clk_request(struct clk *clk)
+{
+   debug("%s(clk=%p) (dev=%p, id=%lu)\n", __func__, clk, clk->dev,
+ clk->id);
+
+   if (clk->id >= ARRAY_SIZE(__prci_init_clocks))
+   return -EINVAL;
+
+   return 0;
+}
+
+static int sifive_fu540_prci_clk_free(struct clk *clk)
+{
+   debug("%s(clk=%p) (dev=%p, id=%lu)\n", __func__, clk, clk->dev,
+ clk->id);
+
+   if (clk->id >= ARRAY_SIZE(__prci_init_clocks))
+   return -EINVAL;
+
+   return 0;
+}
+
 static int sifive_fu540_prci_probe(struct udevice *dev)
 {
int i, err;
@@ -611,6 +633,8 @@ static int sifive_fu540_prci_probe(struct udevice *dev)
 static struct clk_ops sifive_fu540_prci_ops = {
.set_rate = sifive_fu540_prci_set_rate,
.get_rate = sifive_fu540_prci_get_rate,
+   .request  = sifive_fu540_prci_clk_request,
+   .rfree= sifive_fu540_prci_clk_free,
 };
 
 static const struct udevice_id sifive_fu540_prci_ids[] = {
-- 
2.7.4

[PATCH v1 0/2] display proper CPU frequency on hifive-unleashed

[Sagar Shrikant Kadam]

U-Boot cmd "cpu detail" shows wrong values, as the current cpu driver is
fetching cpu_freq by reading the dt node property "clock-frequency". There
should be a fallback mechanism to handle a case where this property if not
present in DT it should be read from the prci driver.

This patch series uses the clk_get_rate method to fetch proper core clock
frequency. The series is based on U-Boot commit f2a73d6867ef ("Merge tag
'u-boot-stm32-20200214' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm;)

Thanks to Vincent Chen  for testing this patch.

=>---Log for reference
=> cpu detail
  0: cpu@1  rv64imafdc
ID = 1, freq = 4.30 GHz <= Before patch
  1: cpu@2  rv64imafdc
ID = 2, freq = 4.30 GHz
  2: cpu@3  rv64imafdc
ID = 3, freq = 4.30 GHz
  3: cpu@4  rv64imafdc
ID = 4, freq = 4.30 GHz
.

=> cpu detail
  0: cpu@1  rv64imafdc
ID = 1, freq = 999.100 MHz  <= After patch
  1: cpu@2  rv64imafdc
ID = 2, freq = 999.100 MHz
  2: cpu@3  rv64imafdc
ID = 3, freq = 999.100 MHz
  3: cpu@4  rv64imafdc
ID = 4, freq = 999.100 MHz


Sagar Shrikant Kadam (2):
  fu540: prci: add request and free clock handlers
  cpu: clk: riscv: populate proper CPU core clk frequency

 drivers/clk/sifive/fu540-prci.c | 24 
 drivers/cpu/riscv_cpu.c | 39 ++-
 2 files changed, 62 insertions(+), 1 deletion(-)

-- 
2.7.4

[PATCH v2] ARM: zynq: Rename defconfig to be align with ZynqMP and Versal

[Michal Simek]

Just cosmetic change before real switch.

Signed-off-by: Michal Simek 
---

Changes in v2:
- Cover this new file by MAINTAINERS fragment

 board/xilinx/zynq/MAINTAINERS   | 1 +
 configs/{zynq_virt_defconfig => xilinx_zynq_virt_defconfig} | 0
 2 files changed, 1 insertion(+)
 rename configs/{zynq_virt_defconfig => xilinx_zynq_virt_defconfig} (100%)

diff --git a/board/xilinx/zynq/MAINTAINERS b/board/xilinx/zynq/MAINTAINERS
index fc6463a8c617..78bcd84d30e5 100644
--- a/board/xilinx/zynq/MAINTAINERS
+++ b/board/xilinx/zynq/MAINTAINERS
@@ -5,3 +5,4 @@ F:  arch/arm/dts/zynq-*
 F: board/xilinx/zynq/
 F: include/configs/zynq*.h
 F: configs/zynq_*_defconfig
+F: configs/xilinx_zynq_*
diff --git a/configs/zynq_virt_defconfig b/configs/xilinx_zynq_virt_defconfig
similarity index 100%
rename from configs/zynq_virt_defconfig
rename to configs/xilinx_zynq_virt_defconfig
-- 
2.25.0

[PATCH 2/2] ARM: zynq: Switch to single zynq configurations

[Michal Simek]

There are a lot of zynq configurations which can be merged together and use
only one for all. The similar change has been done for ZynqMP by commit
be1b6c32d940 ("arm64: zynqmp: Use zynqmp_virt platform")

Build SPL with u-boot.img for zc706 like this.
export DEVICE_TREE=zynq-zc706 && make xilinx_zynq_virt_defconfig && make -j8
u-boot.img is generic for all boards.

Tested on Zybo, zc702, zc706, zc770-xm011-x16, cc108 and microzed.

Signed-off-by: Michal Simek 
---

 configs/xilinx_zynq_virt_defconfig | 19 +-
 configs/zynq_cc108_defconfig   | 61 --
 configs/zynq_dlc20_rev1_0_defconfig| 76 --
 configs/zynq_microzed_defconfig| 66 ---
 configs/zynq_minized_defconfig | 67 
 configs/zynq_picozed_defconfig | 54 
 configs/zynq_z_turn_defconfig  | 67 
 configs/zynq_zc702_defconfig   | 83 
 configs/zynq_zc706_defconfig   | 87 --
 configs/zynq_zc770_xm010_defconfig | 61 --
 configs/zynq_zc770_xm011_defconfig | 48 --
 configs/zynq_zc770_xm011_x16_defconfig | 48 --
 configs/zynq_zc770_xm012_defconfig | 50 ---
 configs/zynq_zc770_xm013_defconfig | 53 
 configs/zynq_zed_defconfig | 70 -
 configs/zynq_zybo_defconfig| 69 
 configs/zynq_zybo_z7_defconfig | 66 ---
 17 files changed, 18 insertions(+), 1027 deletions(-)
 delete mode 100644 configs/zynq_cc108_defconfig
 delete mode 100644 configs/zynq_dlc20_rev1_0_defconfig
 delete mode 100644 configs/zynq_microzed_defconfig
 delete mode 100644 configs/zynq_minized_defconfig
 delete mode 100644 configs/zynq_picozed_defconfig
 delete mode 100644 configs/zynq_z_turn_defconfig
 delete mode 100644 configs/zynq_zc702_defconfig
 delete mode 100644 configs/zynq_zc706_defconfig
 delete mode 100644 configs/zynq_zc770_xm010_defconfig
 delete mode 100644 configs/zynq_zc770_xm011_defconfig
 delete mode 100644 configs/zynq_zc770_xm011_x16_defconfig
 delete mode 100644 configs/zynq_zc770_xm012_defconfig
 delete mode 100644 configs/zynq_zc770_xm013_defconfig
 delete mode 100644 configs/zynq_zed_defconfig
 delete mode 100644 configs/zynq_zybo_defconfig
 delete mode 100644 configs/zynq_zybo_z7_defconfig

diff --git a/configs/xilinx_zynq_virt_defconfig 
b/configs/xilinx_zynq_virt_defconfig
index ece619f239b2..2e9f3a0f7508 100644
--- a/configs/xilinx_zynq_virt_defconfig
+++ b/configs/xilinx_zynq_virt_defconfig
@@ -11,13 +11,17 @@ CONFIG_SYS_LDSCRIPT="arch/arm/mach-zynq/u-boot.lds"
 CONFIG_FIT=y
 CONFIG_FIT_SIGNATURE=y
 CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_FIT_PRINT=y
+CONFIG_SPL_LOAD_FIT=y
 CONFIG_LEGACY_IMAGE_FORMAT=y
 CONFIG_USE_PREBOOT=y
 CONFIG_SPL_STACK_R=y
+CONFIG_SPL_FPGA_SUPPORT=y
 CONFIG_SPL_OS_BOOT=y
 CONFIG_SPL_SPI_LOAD=y
 CONFIG_SYS_SPI_U_BOOT_OFFS=0x10
 # CONFIG_BOOTM_NETBSD is not set
+CONFIG_CMD_IMLS=y
 CONFIG_CMD_THOR_DOWNLOAD=y
 CONFIG_CMD_MEMTEST=y
 CONFIG_CMD_DFU=y
@@ -28,12 +32,14 @@ CONFIG_CMD_FPGA_LOADP=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
+CONFIG_CMD_NAND_LOCK_UNLOCK=y
 CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_TFTPPUT=y
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_EXT4_WRITE=y
-CONFIG_OF_BOARD=y
+CONFIG_DEFAULT_DEVICE_TREE="zynq-zc706"
+CONFIG_OF_LIST="zynq-zc702 zynq-zc706 zynq-zc770-xm010 zynq-zc770-xm011 
zynq-zc770-xm011-x16 zynq-zc770-xm012 zynq-zc770-xm013 zynq-cc108 zynq-microzed 
zynq-minized zynq-picozed zynq-zed zynq-zturn zynq-zybo zynq-zybo-z7 
zynq-dlc20-rev1.0"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_NET_RANDOM_ETHADDR=y
@@ -52,11 +58,19 @@ CONFIG_SYS_I2C_EEPROM_ADDR=0x0
 CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW=0x0
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
+CONFIG_MTD=y
+CONFIG_MTD_NOR_FLASH=y
+CONFIG_FLASH_CFI_DRIVER=y
+CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
+CONFIG_SYS_FLASH_CFI=y
+CONFIG_MTD_RAW_NAND=y
+CONFIG_NAND_ZYNQ=y
 CONFIG_SF_DEFAULT_SPEED=3000
 CONFIG_SPI_FLASH_ISSI=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_SST=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_REALTEK=y
@@ -64,6 +78,7 @@ CONFIG_PHY_XILINX=y
 CONFIG_MII=y
 CONFIG_ZYNQ_GEM=y
 CONFIG_ZYNQ_SERIAL=y
+CONFIG_ZYNQ_SPI=y
 CONFIG_ZYNQ_QSPI=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
@@ -76,3 +91,5 @@ CONFIG_USB_GADGET_PRODUCT_NUM=0x0300
 CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_USB_FUNCTION_THOR=y
+CONFIG_DISPLAY=y
+CONFIG_SPL_GZIP=y
diff --git a/configs/zynq_cc108_defconfig b/configs/zynq_cc108_defconfig
deleted file mode 100644
index 417711719962..
--- a/configs/zynq_cc108_defconfig
+++ /dev/null
@@ -1,61 +0,0 @@
-CONFIG_ARM=y
-CONFIG_SPL_SYS_DCACHE_OFF=y
-CONFIG_ARCH_ZYNQ=y
-CONFIG_SYS_TEXT_BASE=0x400
-CONFIG_DM_GPIO=y

[PATCH 0/2] ARM: zynq: Start to use unified configurations

[Michal Simek]

Hi,

over the time there are a lot of zynq configurations which are almost the
same. It just increasing amount of time for building/testing/maintaining
that's why this patch starts to use xilinx_zynq_virt_defconfig which is all
in one configurations which can be used on all zynq board.
The series contains two patches.
The first which setup device tree name for SPL FIT image selection.
The second which removes all xilinx/avnet/myirtech configurations with
extending defconfig and OF_LIST which ensures that u-boot.img contains DTS
files for all these boards.

Thanks,
Michal


Michal Simek (2):
  Makefile: Add environment variable DEVICE_TREE to header
  ARM: zynq: Switch to single zynq configurations

 Makefile   | 14 -
 arch/arm/mach-zynq/spl.c   |  8 ++-
 configs/xilinx_zynq_virt_defconfig | 19 +-
 configs/zynq_cc108_defconfig   | 61 --
 configs/zynq_dlc20_rev1_0_defconfig| 76 --
 configs/zynq_microzed_defconfig| 66 ---
 configs/zynq_minized_defconfig | 67 
 configs/zynq_picozed_defconfig | 54 
 configs/zynq_z_turn_defconfig  | 67 
 configs/zynq_zc702_defconfig   | 83 
 configs/zynq_zc706_defconfig   | 87 --
 configs/zynq_zc770_xm010_defconfig | 61 --
 configs/zynq_zc770_xm011_defconfig | 48 --
 configs/zynq_zc770_xm011_x16_defconfig | 48 --
 configs/zynq_zc770_xm012_defconfig | 50 ---
 configs/zynq_zc770_xm013_defconfig | 53 
 configs/zynq_zed_defconfig | 70 -
 configs/zynq_zybo_defconfig| 69 
 configs/zynq_zybo_z7_defconfig | 66 ---
 19 files changed, 37 insertions(+), 1030 deletions(-)
 delete mode 100644 configs/zynq_cc108_defconfig
 delete mode 100644 configs/zynq_dlc20_rev1_0_defconfig
 delete mode 100644 configs/zynq_microzed_defconfig
 delete mode 100644 configs/zynq_minized_defconfig
 delete mode 100644 configs/zynq_picozed_defconfig
 delete mode 100644 configs/zynq_z_turn_defconfig
 delete mode 100644 configs/zynq_zc702_defconfig
 delete mode 100644 configs/zynq_zc706_defconfig
 delete mode 100644 configs/zynq_zc770_xm010_defconfig
 delete mode 100644 configs/zynq_zc770_xm011_defconfig
 delete mode 100644 configs/zynq_zc770_xm011_x16_defconfig
 delete mode 100644 configs/zynq_zc770_xm012_defconfig
 delete mode 100644 configs/zynq_zc770_xm013_defconfig
 delete mode 100644 configs/zynq_zed_defconfig
 delete mode 100644 configs/zynq_zybo_defconfig
 delete mode 100644 configs/zynq_zybo_z7_defconfig

-- 
2.25.0

[PATCH 1/2] Makefile: Add environment variable DEVICE_TREE to header

[Michal Simek]

Users have option to overwrite default device tree
(CONFIG_DEFAULT_DEVICE_TREE) via environment variable DEVICE_TREE.

Feature has been added long time ago by commit 74de8c9a1672
("dts/Makefile: Build the user specified dts") for a little bit different
reason.

But this variable can be also used for different purpose like choosing
proper configuration from FIT image in SPL.
And this is the functionality I would like to use on Xilinx Zynq devices
that current u-boot.img can be composed in the same way based on OF_LIST
and different configuration is taken based on platform specific SPL.
SPL requires low level ps7_init_gpl configuration that's why different
boards require different SPL with fixed board_fit_config_name_match().

Signed-off-by: Michal Simek 
---

I have done it in this way but maybe there is any smarter way how this can
be done. Also macro name can change if you want.
---
 Makefile | 14 +-
 arch/arm/mach-zynq/spl.c |  8 ++--
 2 files changed, 19 insertions(+), 3 deletions(-)

diff --git a/Makefile b/Makefile
index 0af89e0a7881..15f7cce445f6 100644
--- a/Makefile
+++ b/Makefile
@@ -483,6 +483,7 @@ endif
 version_h := include/generated/version_autogenerated.h
 timestamp_h := include/generated/timestamp_autogenerated.h
 defaultenv_h := include/generated/defaultenv_autogenerated.h
+dt_h := include/generated/dt.h
 
 no-dot-config-targets := clean clobber mrproper distclean \
 help %docs check% coccicheck \
@@ -1768,7 +1769,7 @@ endif
 # prepare2 creates a makefile if using a separate output directory
 prepare2: prepare3 outputmakefile cfg
 
-prepare1: prepare2 $(version_h) $(timestamp_h) \
+prepare1: prepare2 $(version_h) $(timestamp_h) $(dt_h) \
include/config/auto.conf
 ifeq ($(wildcard $(LDSCRIPT)),)
@echo >&2 "  Could not find linker script."
@@ -1834,12 +1835,23 @@ define filechk_defaultenv.h
 xxd -i ; echo ", 0x00" ; )
 endef
 
+define filechk_dt.h
+   (if test -n "$${DEVICE_TREE}"; then \
+   echo \#define DEVICE_TREE \"$(DEVICE_TREE)\"; \
+   else \
+   echo \#define DEVICE_TREE CONFIG_DEFAULT_DEVICE_TREE; \
+   fi)
+endef
+
 $(version_h): include/config/uboot.release FORCE
$(call filechk,version.h)
 
 $(timestamp_h): $(srctree)/Makefile FORCE
$(call filechk,timestamp.h)
 
+$(dt_h): $(srctree)/Makefile FORCE
+   $(call filechk,dt.h)
+
 $(defaultenv_h): $(CONFIG_DEFAULT_ENV_FILE:"%"=%) FORCE
$(call filechk,defaultenv.h)
 
diff --git a/arch/arm/mach-zynq/spl.c b/arch/arm/mach-zynq/spl.c
index 96ba90fb7a76..e89e46c1038d 100644
--- a/arch/arm/mach-zynq/spl.c
+++ b/arch/arm/mach-zynq/spl.c
@@ -6,6 +6,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include 
 #include 
@@ -89,8 +90,11 @@ void spl_board_prepare_for_boot(void)
 int board_fit_config_name_match(const char *name)
 {
/* Just empty function now - can't decide what to choose */
-   debug("%s: %s\n", __func__, name);
+   debug("%s: Check %s, default %s\n", __func__, name, DEVICE_TREE);
 
-   return 0;
+   if (!strcmp(name, DEVICE_TREE))
+   return 0;
+
+   return -1;
 }
 #endif
-- 
2.25.0

Re: use invd instead of wbinvd in real mode start code

[Andy Shevchenko]

On Tue, Feb 18, 2020 at 4:43 PM Tom Rini  wrote:
> On Tue, Feb 18, 2020 at 01:29:04PM +0200, Andy Shevchenko wrote:
> > On Tue, Feb 18, 2020 at 1:06 PM Heiko Schocher  wrote:
> > > Am 18.02.2020 um 11:45 schrieb Andy Shevchenko:
> > > > On Tue, Feb 18, 2020 at 7:48 AM Heiko Schocher  wrote:
> >
> > ...
> >
> > > > How the feed back line is organized? I mean how host system will know 
> > > > that
> > > >   a) we done flash correctly?
> > > >   b) the booted image is bad or good?
> > >
> > > For both questions the answer is, that you need to write a testcase
> > > which answer this question.
> > >
> > > For a) you flash the image in some way through U-Boot commands. You
> > > start this commands from a tbot testcase written in python and parse
> > > the output and/or return code of the command and than decide ...
> > >
> > > Same for b) reboot the board, check if new version is installed
> > > by parsing the U-Boot bootlog, than start U-Boot commands to find
> > > out, if current installed version is good or bad.
> >
> > Thank you for elaboration.
> > I hoped and still hope that x86 won't be broken so drastically that I
> > need real bisection.
> > Above mentioned test cases is somewhat time consuming (yes, I agree
> > that is ~one time big effort), and for now it seems much bigger effort
> > than just guess by reading the code. Maybe in the future I'll consider
> > to do something like this, but I think that U-Boot may gain some
> > patches and config option to have BAT cases enabled (like predefined
> > output on the serial when we consider commit is good and some C
> > interface during the test).
>
> Please note that you don't need to go and write a test case for "does it
> boot" as we already have one as part of our test/py/ code.

Ah, thanks, that's nice!


-- 
With Best Regards,
Andy Shevchenko

[PATCH] ARM: zynq: Change zc770 xm011 Nand x16 configurations

[Michal Simek]

Instead of symlink include origin file and just change model description.
Difference is not in DT but in ps7_init configurations which is taken based
on device tree name that's why the same DT can't be used.

Also update model and update comments to match configurations.

Signed-off-by: Michal Simek 
---

 arch/arm/dts/zynq-zc770-xm011-x16.dts | 12 +++-
 arch/arm/dts/zynq-zc770-xm011.dts |  2 +-
 2 files changed, 12 insertions(+), 2 deletions(-)
 mode change 12 => 100644 arch/arm/dts/zynq-zc770-xm011-x16.dts

diff --git a/arch/arm/dts/zynq-zc770-xm011-x16.dts 
b/arch/arm/dts/zynq-zc770-xm011-x16.dts
deleted file mode 12
index 5bd6af39a437..
--- a/arch/arm/dts/zynq-zc770-xm011-x16.dts
+++ /dev/null
@@ -1 +0,0 @@
-zynq-zc770-xm011.dts
\ No newline at end of file
diff --git a/arch/arm/dts/zynq-zc770-xm011-x16.dts 
b/arch/arm/dts/zynq-zc770-xm011-x16.dts
new file mode 100644
index ..6ff8393d7ebe
--- /dev/null
+++ b/arch/arm/dts/zynq-zc770-xm011-x16.dts
@@ -0,0 +1,11 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Xilinx ZC770 XM011 board DTS with NAND x16
+ *
+ * Copyright (C) 2013-2018 Xilinx, Inc.
+ */
+#include "zynq-zc770-xm011.dts"
+
+/ {
+   model = "Xilinx ZC770 XM011 board (NAND x16)";
+};
diff --git a/arch/arm/dts/zynq-zc770-xm011.dts 
b/arch/arm/dts/zynq-zc770-xm011.dts
index 61482017d65c..b6e3e255d731 100644
--- a/arch/arm/dts/zynq-zc770-xm011.dts
+++ b/arch/arm/dts/zynq-zc770-xm011.dts
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
- * Xilinx ZC770 XM013 board DTS
+ * Xilinx ZC770 XM011 board DTS
  *
  * Copyright (C) 2013-2018 Xilinx, Inc.
  */
-- 
2.25.0

[PATCH v3] dm: core: Move "/chosen" and "/firmware" node scan

[Patrick Delaunay]

Use the new function dm_scan_fdt_ofnode_path() to scan all the nodes
which aren't devices themselves but may contain some:
- "/chosen"
- "/clocks"
- "/firmware"

The patch removes the strcmp call in recursive function dm_scan_fdt_live()
and also corrects a conflict with the 2 applied patches in
the commit 1712ca21924b ("dm: core: Scan /firmware node by default")
and in the commit 747558d01457 ("dm: fdt: scan for devices under
/firmware too"): the subnodes of "/firmware" (optee for example)
are bound 2 times.

For example the dm tree command result on STM32MP1 is:

STM32MP> dm tree
 Class Index  Probed  DriverName
 ---
 root  0  [ + ]   root_driver   root_driver
 firmware  0  [   ]   psci  |-- psci
 sysreset  0  [   ]   psci-sysreset |   `-- psci-sysreset
 simple_bus0  [ + ]   generic_simple_bus|-- soc
...
 tee   0  [ + ]   optee |-- optee
...
 tee   1  [   ]   optee `-- optee

Signed-off-by: Patrick Delaunay 
Tested-by: Michal Simek 
---

Also reported here:
https://lists.denx.de/pipermail/u-boot/2020-January/395427.html


Changes in v3:
- update test-fdt: use dm_extended_scan_fdt instead of dm_scan_fdt

Changes in v2:
- update commit message (Serie-cc => Series-cc)

 drivers/core/root.c | 52 +++--
 test/dm/test-fdt.c  |  2 +-
 2 files changed, 18 insertions(+), 36 deletions(-)

diff --git a/drivers/core/root.c b/drivers/core/root.c
index e85643819e..14df16c280 100644
--- a/drivers/core/root.c
+++ b/drivers/core/root.c
@@ -203,15 +203,6 @@ static int dm_scan_fdt_live(struct udevice *parent,
int ret = 0, err;
 
for (np = node_parent->child; np; np = np->sibling) {
-   /* "chosen" node isn't a device itself but may contain some: */
-   if (!strcmp(np->name, "chosen")) {
-   pr_debug("parsing subnodes of \"chosen\"\n");
-
-   err = dm_scan_fdt_live(parent, np, pre_reloc_only);
-   if (err && !ret)
-   ret = err;
-   continue;
-   }
 
if (!of_device_is_available(np)) {
pr_debug("   - ignoring disabled device\n");
@@ -256,21 +247,6 @@ static int dm_scan_fdt_node(struct udevice *parent, const 
void *blob,
 offset = fdt_next_subnode(blob, offset)) {
const char *node_name = fdt_get_name(blob, offset, NULL);
 
-   /*
-* The "chosen" and "firmware" nodes aren't devices
-* themselves but may contain some:
-*/
-   if (!strcmp(node_name, "chosen") ||
-   !strcmp(node_name, "firmware")) {
-   pr_debug("parsing subnodes of \"%s\"\n", node_name);
-
-   err = dm_scan_fdt_node(parent, blob, offset,
-  pre_reloc_only);
-   if (err && !ret)
-   ret = err;
-   continue;
-   }
-
if (!fdtdec_get_is_enabled(blob, offset)) {
pr_debug("   - ignoring disabled device\n");
continue;
@@ -315,7 +291,8 @@ int dm_scan_fdt(const void *blob, bool pre_reloc_only)
return dm_scan_fdt_node(gd->dm_root, blob, 0, pre_reloc_only);
 }
 
-static int dm_scan_fdt_ofnode_path(const char *path, bool pre_reloc_only)
+static int dm_scan_fdt_ofnode_path(const void *blob, const char *path,
+  bool pre_reloc_only)
 {
ofnode node;
 
@@ -327,13 +304,18 @@ static int dm_scan_fdt_ofnode_path(const char *path, bool 
pre_reloc_only)
if (of_live_active())
return dm_scan_fdt_live(gd->dm_root, node.np, pre_reloc_only);
 #endif
-   return dm_scan_fdt_node(gd->dm_root, gd->fdt_blob, node.of_offset,
+   return dm_scan_fdt_node(gd->dm_root, blob, node.of_offset,
pre_reloc_only);
 }
 
 int dm_extended_scan_fdt(const void *blob, bool pre_reloc_only)
 {
-   int ret;
+   int ret, i;
+   const char * const nodes[] = {
+   "/chosen",
+   "/clocks",
+   "/firmware"
+   };
 
ret = dm_scan_fdt(blob, pre_reloc_only);
if (ret) {
@@ -341,16 +323,16 @@ int dm_extended_scan_fdt(const void *blob, bool 
pre_reloc_only)
return ret;
}
 
-   ret = dm_scan_fdt_ofnode_path("/clocks", pre_reloc_only);
-   if (ret) {
-   debug("scan for /clocks failed: %d\n", ret);
-   return ret;
+   /* Some nodes aren't devices themselves but may contain some */
+   for (i = 0; i < ARRAY_SIZE(nodes); i++) {
+   ret = dm_scan_fdt_ofnode_path(blob, nodes[i], pre_reloc_only);
+   if (ret) {
+   

Re: use invd instead of wbinvd in real mode start code

[Tom Rini]

On Tue, Feb 18, 2020 at 01:29:04PM +0200, Andy Shevchenko wrote:
> On Tue, Feb 18, 2020 at 1:06 PM Heiko Schocher  wrote:
> > Am 18.02.2020 um 11:45 schrieb Andy Shevchenko:
> > > On Tue, Feb 18, 2020 at 7:48 AM Heiko Schocher  wrote:
> 
> ...
> 
> > > How the feed back line is organized? I mean how host system will know that
> > >   a) we done flash correctly?
> > >   b) the booted image is bad or good?
> >
> > For both questions the answer is, that you need to write a testcase
> > which answer this question.
> >
> > For a) you flash the image in some way through U-Boot commands. You
> > start this commands from a tbot testcase written in python and parse
> > the output and/or return code of the command and than decide ...
> >
> > Same for b) reboot the board, check if new version is installed
> > by parsing the U-Boot bootlog, than start U-Boot commands to find
> > out, if current installed version is good or bad.
> 
> Thank you for elaboration.
> I hoped and still hope that x86 won't be broken so drastically that I
> need real bisection.
> Above mentioned test cases is somewhat time consuming (yes, I agree
> that is ~one time big effort), and for now it seems much bigger effort
> than just guess by reading the code. Maybe in the future I'll consider
> to do something like this, but I think that U-Boot may gain some
> patches and config option to have BAT cases enabled (like predefined
> output on the serial when we consider commit is good and some C
> interface during the test).

Please note that you don't need to go and write a test case for "does it
boot" as we already have one as part of our test/py/ code.

-- 
Tom


signature.asc
Description: PGP signature

Re: [PATCH] include/eeprom.h: fix build errors

[Tom Rini]

On Tue, Feb 18, 2020 at 08:39:42AM +, Rasmus Villemoes wrote:

> CMD_EEPROM and ENV_IS_IN_EEPROM can be selected independently, and
> cmd/eeprom.o gets built in either case, so whether to declare the real
> prototypes needs to follow the same logic as whether cmd/eeprom.c is
> built. Otherwise a ENV_IS_IN_EEPROM=y, CMD_EEPROM=n build fails
> 
> cmd/eeprom.c:73:1: error: expected identifier or ‘(’ before ‘{’ token
>  {
> 
> While at it, fix the dummy replacements (at least assuming they are
> meant to allow the code to compile) - they need to have the same type
> as the expression they replace, or one gets errors such as
> 
> env/eeprom.c: In function ‘eeprom_bus_read’:
> env/eeprom.c:37:8: error: void value not ignored as it ought to be
>   rcode = eeprom_read(dev_addr, offset, buffer, cnt);
> 
> Signed-off-by: Rasmus Villemoes 
> ---
>  include/eeprom.h | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/include/eeprom.h b/include/eeprom.h
> index 79118eb83d..6820844cea 100644
> --- a/include/eeprom.h
> +++ b/include/eeprom.h
> @@ -7,7 +7,7 @@
>  #ifndef __EEPROM_LEGACY_H
>  #define __EEPROM_LEGACY_H
>  
> -#ifdef CONFIG_CMD_EEPROM
> +#if defined(CONFIG_CMD_EEPROM) || defined(CONFIG_ENV_IS_IN_EEPROM)
>  void eeprom_init(int bus);
>  int eeprom_read(uint dev_addr, uint offset, uchar *buffer, uint cnt);
>  int eeprom_write(uint dev_addr, uint offset, uchar *buffer, uint cnt);
> @@ -17,8 +17,8 @@ int eeprom_write(uint dev_addr, uint offset, uchar *buffer, 
> uint cnt);
>   * some macros here so we don't have to touch every one of those uses
>   */
>  #define eeprom_init(bus)
> -#define eeprom_read(dev_addr, offset, buffer, cnt) ((void)-ENOSYS)
> -#define eeprom_write(dev_addr, offset, buffer, cnt) ((void)-ENOSYS)
> +#define eeprom_read(dev_addr, offset, buffer, cnt) (-ENOSYS)
> +#define eeprom_write(dev_addr, offset, buffer, cnt) (-ENOSYS)
>  #endif
>  
>  #if !defined(CONFIG_ENV_EEPROM_IS_ON_I2C) && 
> defined(CONFIG_SYS_I2C_EEPROM_ADDR)

Reviewed-by: Tom Rini 

But while you're in here, can you make a follow-up patch that splits the
common parts of cmd/eeprom.c out and in to common/eeprom/eeprom.c or
something better named?  Thanks!

-- 
Tom


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Description: PGP signature

[PATCH] x86: p2sb: Drop 'apl' prefix

[Wolfgang Wallner]

Drop the Apollo Lake prefix 'apl' from the functions, types and
variables in the P2SB driver.

The P2SB is not Apollo Lake specific, and as such it was moved in
commit 2999846c1127 ("x86: Move P2SB from Apollo Lake to a more generic
location") from the Apollo Lake folder to the intel_common folder.

Signed-off-by: Wolfgang Wallner 

---
This patch follows a similar rational for P2SB as commit 03fe85a27b23
("x86: itss: Remove apl-prefix") for the ITSS.

 arch/x86/cpu/intel_common/p2sb.c  | 30 +--
 arch/x86/dts/chromebook_coral.dts |  2 +-
 .../gpio/intel,apl-gpio.txt   |  2 +-
 .../pinctrl/intel,apl-pinctrl.txt |  2 +-
 4 files changed, 18 insertions(+), 18 deletions(-)

diff --git a/arch/x86/cpu/intel_common/p2sb.c b/arch/x86/cpu/intel_common/p2sb.c
index b72f50a627..d5b4846e0a 100644
--- a/arch/x86/cpu/intel_common/p2sb.c
+++ b/arch/x86/cpu/intel_common/p2sb.c
@@ -16,7 +16,7 @@
 
 struct p2sb_platdata {
 #if CONFIG_IS_ENABLED(OF_PLATDATA)
-   struct dtd_intel_apl_p2sb dtplat;
+   struct dtd_intel_p2sb dtplat;
 #endif
ulong mmio_base;
pci_dev_t bdf;
@@ -43,14 +43,14 @@ struct p2sb_platdata {
 #define P2SB_HPTC_ADDRESS_SELECT_3 (3 << 0)
 
 /*
- * apl_p2sb_early_init() - Enable decoding for HPET range
+ * p2sb_early_init() - Enable decoding for HPET range
  *
  * This is needed by FSP-M which uses the High Precision Event Timer.
  *
  * @dev: P2SB device
  * @return 0 if OK, -ve on error
  */
-static int apl_p2sb_early_init(struct udevice *dev)
+static int p2sb_early_init(struct udevice *dev)
 {
struct p2sb_platdata *plat = dev_get_platdata(dev);
pci_dev_t pdev = plat->bdf;
@@ -76,7 +76,7 @@ static int apl_p2sb_early_init(struct udevice *dev)
return 0;
 }
 
-static int apl_p2sb_spl_init(struct udevice *dev)
+static int p2sb_spl_init(struct udevice *dev)
 {
/* Enable decoding for HPET. Needed for FSP global pointer storage */
dm_pci_write_config(dev, P2SB_HPTC, P2SB_HPTC_ADDRESS_SELECT_0 |
@@ -85,7 +85,7 @@ static int apl_p2sb_spl_init(struct udevice *dev)
return 0;
 }
 
-int apl_p2sb_ofdata_to_platdata(struct udevice *dev)
+int p2sb_ofdata_to_platdata(struct udevice *dev)
 {
struct p2sb_uc_priv *upriv = dev_get_uclass_priv(dev);
struct p2sb_platdata *plat = dev_get_platdata(dev);
@@ -117,10 +117,10 @@ int apl_p2sb_ofdata_to_platdata(struct udevice *dev)
return 0;
 }
 
-static int apl_p2sb_probe(struct udevice *dev)
+static int p2sb_probe(struct udevice *dev)
 {
if (spl_phase() == PHASE_TPL) {
-   return apl_p2sb_early_init(dev);
+   return p2sb_early_init(dev);
} else {
struct p2sb_platdata *plat = dev_get_platdata(dev);
 
@@ -130,7 +130,7 @@ static int apl_p2sb_probe(struct udevice *dev)
return -EINVAL;
 
if (spl_phase() == PHASE_SPL)
-   return apl_p2sb_spl_init(dev);
+   return p2sb_spl_init(dev);
}
 
return 0;
@@ -152,17 +152,17 @@ static int p2sb_child_post_bind(struct udevice *dev)
return 0;
 }
 
-static const struct udevice_id apl_p2sb_ids[] = {
-   { .compatible = "intel,apl-p2sb" },
+static const struct udevice_id p2sb_ids[] = {
+   { .compatible = "intel,p2sb" },
{ }
 };
 
-U_BOOT_DRIVER(apl_p2sb_drv) = {
-   .name   = "intel_apl_p2sb",
+U_BOOT_DRIVER(p2sb_drv) = {
+   .name   = "intel_p2sb",
.id = UCLASS_P2SB,
-   .of_match   = apl_p2sb_ids,
-   .probe  = apl_p2sb_probe,
-   .ofdata_to_platdata = apl_p2sb_ofdata_to_platdata,
+   .of_match   = p2sb_ids,
+   .probe  = p2sb_probe,
+   .ofdata_to_platdata = p2sb_ofdata_to_platdata,
.platdata_auto_alloc_size = sizeof(struct p2sb_platdata),
.per_child_platdata_auto_alloc_size =
sizeof(struct p2sb_child_platdata),
diff --git a/arch/x86/dts/chromebook_coral.dts 
b/arch/x86/dts/chromebook_coral.dts
index 44a4619a66..af52e11c89 100644
--- a/arch/x86/dts/chromebook_coral.dts
+++ b/arch/x86/dts/chromebook_coral.dts
@@ -136,7 +136,7 @@
p2sb: p2sb@d,0 {
u-boot,dm-pre-reloc;
reg = <0x02006810 0 0 0 0>;
-   compatible = "intel,apl-p2sb";
+   compatible = "intel,p2sb";
early-regs = ;
 
n {
diff --git a/doc/device-tree-bindings/gpio/intel,apl-gpio.txt 
b/doc/device-tree-bindings/gpio/intel,apl-gpio.txt
index e27a40b437..cf0659b70e 100644
--- a/doc/device-tree-bindings/gpio/intel,apl-gpio.txt
+++ b/doc/device-tree-bindings/gpio/intel,apl-gpio.txt
@@ -23,7 +23,7 @@ Example:
 {
p2sb: p2sb@d,0 {
reg = <0x02006810 0 0 0 0>;
-   compatible = "intel,apl-p2sb";
+   compatible = "intel,p2sb";

Re: [PATCH 1/1] efi_loader: EFI_RNG_PROTOCOL

[Heinrich Schuchardt]

On 2/18/20 11:26 AM, Sughosh Ganu wrote:


On Sat, 15 Feb 2020 at 04:04, Heinrich Schuchardt mailto:xypron.g...@gmx.de>> wrote:

Do not use quotation marks for Kconfig help text.
Replace rng abbreviation by full words.

Signed-off-by: Heinrich Schuchardt mailto:xypron.g...@gmx.de>>
---
  lib/efi_loader/Kconfig | 4 ++--
  1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/efi_loader/Kconfig b/lib/efi_loader/Kconfig
index a7afa3f29e..84a4a35d80 100644
--- a/lib/efi_loader/Kconfig
+++ b/lib/efi_loader/Kconfig
@@ -127,7 +127,7 @@ config EFI_RNG_PROTOCOL
         bool "EFI_RNG_PROTOCOL support"
         depends on DM_RNG
         help
-         "Support for EFI_RNG_PROTOCOL implementation. Uses the rng
-          device on the platform"
+         Provide a EFI_RNG_PROTOCOL implementation using the
hardware random
+         number generator of the platform.


Should we mention the word hardware in the sentence. Can it simply be
stated as "random number generator". I know that the existing sentence
too uses "rng device" which has hardware connotations. But the protocol
can also be used with a pseudo random number generator as well.

-sughosh


Chapter 37.5 Random Number Generator Protocol of the UEFI mentions that
if this protocol uses a deterministic RNG it must be based on a source
of raw entropy.

So I think "using the hardware random number generator of the platform"
is accurate.

Currently the sandbox RNG does not use a hardware random number
generator. We should consider using the host's getrandom() function
which is available both on Linux, FreeBSD, and OpenBSD.

Best regards

Heinrich

Re: [PATCH v4 03/17] clk: Unconditionally recursively en-/dis-able clocks

[Sean Anderson]

On 2/18/20 2:20 AM, Rick Chen wrote:
> Hi Sean
> 
>> For clocks not in the CCF, their parents will not have UCLASS_CLK, so we
>> just enable them as normal. The enable count is local to the struct clk,
>> but this will never result in the actual en-/dis-able op being called
>> (unless the same struct clk is enabled twice).
>>
>> For clocks in the CCF, we always traverse up the tree when enabling.
>> Previously, CCF clocks without id set would be skipped, stopping the
>> traversal too early.
>>
>> Signed-off-by: Sean Anderson 
>> Acked-by: Lukasz Majewski 
>> ---
>>
>> Changes in v4:
>> - Lint
>>
>> Changes in v3:
>> - New
>>
>>  drivers/clk/clk-uclass.c | 59 ++--
>>  1 file changed, 26 insertions(+), 33 deletions(-)
>>
> 
> When I tried to apply this patch-set, there occur a conflict as below:
> 
> Applying: clk: Always use the supplied struct clk
> Applying: clk: Check that ops of composite clock components exist before 
> calling
> Applying: clk: Unconditionally recursively en-/dis-able clocks
> error: patch failed: drivers/clk/clk-uclass.c:491
> error: drivers/clk/clk-uclass.c: patch does not apply
> Patch failed at 0003 clk: Unconditionally recursively en-/dis-able clocks
> 
> Thanks
> Rick

Hm, perhaps you are applying it on a different commit. My series is
based off of

c00bd81ae0 Merge branch 'next' of 
https://gitlab.denx.de/u-boot/custodians/u-boot-mpc83xx

What are you applying to?

--Sean

RE: [PATCH v2] dm: core: Move "/chosen" and "/firmware" node scan

[Patrick DELAUNAY]

Hi,

> From: Simon Glass 
> Sent: lundi 17 février 2020 04:56
> 
> Hi Patrick,
> 
> On Thu, 13 Feb 2020 at 11:48, Patrick Delaunay 
> wrote:
> >
> > Use the new function dm_scan_fdt_ofnode_path() to scan all the nodes
> > which aren't devices themselves but may contain some:
> > - "/chosen"
> > - "/clocks"
> > - "/firmware"
> >
> > The patch removes the strcmp call in recursive function
> > dm_scan_fdt_live() and also corrects a conflict with the 2 applied
> > patches in the commit 1712ca21924b ("dm: core: Scan /firmware node by
> > default") and in the commit 747558d01457 ("dm: fdt: scan for devices
> > under /firmware too"): the subnodes of "/firmware" (optee for example)
> > are bound 2 times.
> >
> > For example the dm tree command result on STM32MP1 is:
> >
> > STM32MP> dm tree
> >  Class Index  Probed  DriverName
> >  ---
> >  root  0  [ + ]   root_driver   root_driver
> >  firmware  0  [   ]   psci  |-- psci
> >  sysreset  0  [   ]   psci-sysreset |   `-- psci-sysreset
> >  simple_bus0  [ + ]   generic_simple_bus|-- soc
> > ...
> >  tee   0  [ + ]   optee |-- optee
> > ...
> >  tee   1  [   ]   optee `-- optee
> >
> > Signed-off-by: Patrick Delaunay 
> > ---
> >
> > Changes in v2:
> > - update commit message (Serie-cc => Series-cc)
> >
> >  drivers/core/root.c | 52
> > +++--
> >  1 file changed, 17 insertions(+), 35 deletions(-)
> 
> 
> This looks good to me, but please can you address the test failure (make
> qcheck)?

I forget to execute it, sorry.

Work in progress

 
> Regards,
> Simon

Patrick

Re: [PATCH] common: fix regression on block cache init

[Angelo Dureghello]

Hi Simon,

sorry for the late reply,

startup assembly code that is actually accessing (re-adjusting) "got" after
relocation is in :

microblaze
m68k

I cannot test microblaze stuff btw.

Regards,
Angelo


On Mon, Jan 27, 2020 at 9:21 AM Simon Goldschmidt
 wrote:
>
> On Sun, Jan 26, 2020 at 7:30 PM Angelo Dureghello
>  wrote:
> >
> > From: Angelo Durgehello 
> >
> > m68k needs block cache list initialized after relocation.
> > Other architectures must not be involved.
> >
> > Fixing regression related to:
> >
> > commit 1526bcce0f7285087621e16e6720636d01839da8
> > ("common: add blkcache init")
> >
> > Signed-off-by: Angelo Durgehello 
> > ---
> >  common/board_r.c | 2 +-
> >  drivers/block/blkcache.c | 6 ++
> >  2 files changed, 7 insertions(+), 1 deletion(-)
> >
> > diff --git a/common/board_r.c b/common/board_r.c
> > index 4f56c19fcc..0bbeaa7594 100644
> > --- a/common/board_r.c
> > +++ b/common/board_r.c
> > @@ -865,7 +865,7 @@ static init_fnc_t init_sequence_r[] = {
> >  #if defined(CONFIG_PRAM)
> > initr_mem,
> >  #endif
> > -#ifdef CONFIG_BLOCK_CACHE
> > +#if defined(CONFIG_M68K) && defined(CONFIG_BLOCK_CACHE)
>
> Sorry for not reacting earlier here, but is this really M68K specific?
> Or would COFIG_NEES_MANUAL_RELOC be a better fit?
>
> Regards,
> Simon
>
> > blkcache_init,
> >  #endif
> > run_main_loop,
> > diff --git a/drivers/block/blkcache.c b/drivers/block/blkcache.c
> > index f603aa129d..ea40929e3e 100644
> > --- a/drivers/block/blkcache.c
> > +++ b/drivers/block/blkcache.c
> > @@ -21,19 +21,25 @@ struct block_cache_node {
> > char *cache;
> >  };
> >
> > +#ifndef CONFIG_M68K
> > +static LIST_HEAD(block_cache);
> > +#else
> >  static struct list_head block_cache;
> > +#endif
> >
> >  static struct block_cache_stats _stats = {
> > .max_blocks_per_entry = 8,
> > .max_entries = 32
> >  };
> >
> > +#ifdef CONFIG_M68K
> >  int blkcache_init(void)
> >  {
> > INIT_LIST_HEAD(_cache);
> >
> > return 0;
> >  }
> > +#endif
> >
> >  static struct block_cache_node *cache_find(int iftype, int devnum,
> >lbaint_t start, lbaint_t blkcnt,
> > --
> > 2.24.1
> >



-- 
Angelo Dureghello
Timesys
e. angelo.dureghe...@timesys.com

[PATCH] net: phy: dp83867: Add SGMII mode type switching

[Michal Simek]

This patch adds ability to switch beetween two PHY SGMII modes.
Some hardware, for example, FPGA IP designs may use 6-wire mode
which enables differential SGMII clock to MAC.

Patch description, dt flags have been done in mainline Linux by
commit a2111c460c0c ("net: phy: dp83867: Add documentation for SGMII mode type")
and by commit 507ddd5c0d47 ("net: phy: dp83867: Add SGMII mode type switching")

Signed-off-by: Michal Simek 
---

 drivers/net/phy/dp83867.c | 12 
 1 file changed, 12 insertions(+)

diff --git a/drivers/net/phy/dp83867.c b/drivers/net/phy/dp83867.c
index e2ccbfd26887..b557f2496751 100644
--- a/drivers/net/phy/dp83867.c
+++ b/drivers/net/phy/dp83867.c
@@ -29,6 +29,7 @@
 #define DP83867_STRAP_STS2 0x006f
 #define DP83867_RGMIIDCTL  0x0086
 #define DP83867_IO_MUX_CFG 0x0170
+#define DP83867_SGMIICTL   0x00D3
 
 #define DP83867_SW_RESET   BIT(15)
 #define DP83867_SW_RESTART BIT(14)
@@ -101,6 +102,9 @@
 /* CFG4 bits */
 #define DP83867_CFG4_PORT_MIRROR_ENBIT(0)
 
+/* SGMIICTL bits */
+#define DP83867_SGMII_TYPE BIT(14)
+
 enum {
DP83867_PORT_MIRRORING_KEEP,
DP83867_PORT_MIRRORING_EN,
@@ -116,6 +120,7 @@ struct dp83867_private {
int port_mirroring;
bool set_clk_output;
unsigned int clk_output_sel;
+   bool sgmii_ref_clk_en;
 };
 
 static int dp83867_config_port_mirroring(struct phy_device *phydev)
@@ -236,6 +241,9 @@ static int dp83867_of_init(struct phy_device *phydev)
if (ofnode_read_bool(node, "enet-phy-lane-no-swap"))
dp83867->port_mirroring = DP83867_PORT_MIRRORING_DIS;
 
+   if (ofnode_read_bool(node, "ti,sgmii-ref-clock-output-enable"))
+   dp83867->sgmii_ref_clk_en = true;
+
return 0;
 }
 #else
@@ -329,6 +337,10 @@ static int dp83867_config(struct phy_device *phydev)
phy_write_mmd(phydev, DP83867_DEVADDR,
  DP83867_RGMIIDCTL, delay);
} else if (phy_interface_is_sgmii(phydev)) {
+   if (dp83867->sgmii_ref_clk_en)
+   phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_SGMIICTL,
+ DP83867_SGMII_TYPE);
+
phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR,
  (BMCR_ANENABLE | BMCR_FULLDPLX | BMCR_SPEED1000));
 
-- 
2.25.0

[PATCH] env: Kconfig: Adding default values for Microblaze

[Michal Simek]

From: Varalaxmi Bingi 

This patch will add default values for ENV_OFFSET
and ENV_SECT_SIZE for Microblaze.

Signed-off-by: Varalaxmi Bingi 
Signed-off-by: Michal Simek 
---

 env/Kconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/env/Kconfig b/env/Kconfig
index 0d6f559b39d3..2d972a5d4f34 100644
--- a/env/Kconfig
+++ b/env/Kconfig
@@ -500,6 +500,7 @@ config ENV_OFFSET
default 0 if ARC
default 0x14 if ARCH_AT91
default 0x26 if ARCH_OMAP2PLUS
+   default 0x108 if MICROBLAZE && ENV_IS_IN_SPI_FLASH
help
  Offset from the start of the device (or partition)
 
@@ -529,6 +530,7 @@ config ENV_SECT_SIZE
default 0x2000 if ARCH_ROCKCHIP
default 0x4 if ARCH_ZYNQMP || ARCH_VERSAL
default 0x2 if ARCH_ZYNQ || ARCH_OMAP2PLUS || ARCH_AT91
+   default 0x2 if MICROBLAZE && ENV_IS_IN_SPI_FLASH
help
  Size of the sector containing the environment.
 
-- 
2.25.0

[RFC PATCH] serial: ns16550: Move PCI access from ofdata_to_platdata() to probe()

[Wolfgang Wallner]

Currently the ofdata_to_platdata() method calls dev_read_addr_pci(),
which potentially accesses the parent PCI bus. If this happens before
the parent PCI bus is probed the resulting address will be wrong.

This behavior was triggered by commit 82de42fa1468 ("dm: core:
Allocate parent data separate from probing parent").

According to a comment in drivers/pci/pci-uclass.c [1] accessing
the PCI parent bus in ofdata_to_platdata() is not allowed, and the
access should be moved to the probe() function.

Move the call to dev_read_addr_pci() and the related handling of the
'addr' value from the ofdata_to_platdata() to the probe() method.

While moving the code, the comment /* try Processor Local Bus device
first */ was dropped. It was initially added with commit 3db886a5bf38
("serial: ns16550: Support ns16550 compatible pci uart devices") and
later made obsolete with commit 33c215af4b9d ("dm: pci: Add a function
to read a PCI BAR").

[1] Comment in drivers/pci/pci-uclass.c:
"A common cause of this problem is that this function is called in the
ofdata_to_platdata() method of @dev. Accessing the PCI bus in that
method is not allowed, since it has not yet been probed. To fix this,
move that access to the probe() method of @dev instead."

Signed-off-by: Wolfgang Wallner 

Fixes: 82de42fa1468 ("dm: core: Allocate parent data separate from
probing parent")

---
The discussion leading to this patch is located at
https://lists.denx.de/pipermail/u-boot/2020-February/399811.html

 drivers/serial/ns16550.c | 26 +-
 1 file changed, 13 insertions(+), 13 deletions(-)

diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
index 1fcbc35015..07b32abd38 100644
--- a/drivers/serial/ns16550.c
+++ b/drivers/serial/ns16550.c
@@ -484,12 +484,24 @@ int ns16550_serial_probe(struct udevice *dev)
struct NS16550 *const com_port = dev_get_priv(dev);
struct reset_ctl_bulk reset_bulk;
int ret;
+   fdt_addr_t addr;
+
+   com_port->plat = dev_get_platdata(dev);
+
+   addr = dev_read_addr_pci(dev);
+   if (addr == FDT_ADDR_T_NONE)
+   return -EINVAL;
+
+#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
+   com_port->plat->base = addr;
+#else
+   com_port->plat->base = (unsigned long)map_physmem(addr, 0, MAP_NOCACHE);
+#endif
 
ret = reset_get_bulk(dev, _bulk);
if (!ret)
reset_deassert_bulk(_bulk);
 
-   com_port->plat = dev_get_platdata(dev);
NS16550_init(com_port, -1);
 
return 0;
@@ -507,21 +519,9 @@ int ns16550_serial_ofdata_to_platdata(struct udevice *dev)
 {
struct ns16550_platdata *plat = dev->platdata;
const u32 port_type = dev_get_driver_data(dev);
-   fdt_addr_t addr;
struct clk clk;
int err;
 
-   /* try Processor Local Bus device first */
-   addr = dev_read_addr_pci(dev);
-   if (addr == FDT_ADDR_T_NONE)
-   return -EINVAL;
-
-#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
-   plat->base = addr;
-#else
-   plat->base = (unsigned long)map_physmem(addr, 0, MAP_NOCACHE);
-#endif
-
plat->reg_offset = dev_read_u32_default(dev, "reg-offset", 0);
plat->reg_shift = dev_read_u32_default(dev, "reg-shift", 0);
plat->reg_width = dev_read_u32_default(dev, "reg-io-width", 1);
-- 
2.25.0

[PATCH 16/16] arm64: zynqmp: Move pinctrl node under firmware node

[Michal Simek]

Pinctrl is handled via firmare interface that's why move it there without
reg property and new compatible string.

Signed-off-by: Michal Simek 
---

 arch/arm/dts/zynqmp.dtsi | 11 +--
 1 file changed, 5 insertions(+), 6 deletions(-)

diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
index d5bee2f448d1..93fdf6bfb8a8 100644
--- a/arch/arm/dts/zynqmp.dtsi
+++ b/arch/arm/dts/zynqmp.dtsi
@@ -167,6 +167,11 @@
compatible = "xlnx,zynqmp-reset";
#reset-cells = <1>;
};
+
+   pinctrl0: pinctrl {
+   compatible = "xlnx,zynqmp-pinctrl";
+   status = "disabled";
+   };
};
};
 
@@ -765,12 +770,6 @@
clock-output-names = "clk_out_sd1", "clk_in_sd1";
};
 
-   pinctrl0: pinctrl@ff18 {
-   compatible = "xlnx,pinctrl-zynqmp";
-   status = "disabled";
-   reg = <0x0 0xff18 0x0 0x1000>;
-   };
-
smmu: smmu@fd80 {
compatible = "arm,mmu-500";
reg = <0x0 0xfd80 0x0 0x2>;
-- 
2.25.0

Re: [PATCH] kbuild: fixdep: Resync this with v4.17

[Tom Rini]

On Tue, Feb 18, 2020 at 08:37:44PM +0900, Masahiro Yamada wrote:
> On Tue, Feb 18, 2020 at 8:32 PM Masahiro Yamada  wrote:
> >
> > Hi Tom,
> >
> > On Tue, Feb 18, 2020 at 11:29 AM Tom Rini  wrote:
> > >
> > > The previous kbuild resync
> >
> >
> > Precisely, it was "kconfig resync", not "kbuild resync".

True, I'll re-word.

> >
> >
> > > of e91610da7c8a ("kconfig: re-sync with Linux
> > > 4.17-rc4") accidentally did not sync the fixdep program.
> >
> >
> > I do not think it was accidental.
> >
> > Kconfig and fixdep are separate programs.
> > You do not necessarily need to sync them together.

Yes, but there's not a reason to keep them out of sync either.

> > > This commit
> > > brings fixdep in line with the rest of that previous resync.
> > >
> > > This includes all of the following Linux kernel commits:
> > > fbfa9be9904e kbuild: move include/config/ksym/* to include/ksym/*
> > > 5b8ad96d1a44 fixdep: remove some false CONFIG_ matches
> > > 14a596a7e6fd fixdep: remove stale references to uml-config.h
> > > ab9ce9feed36 fixdep: use existing helper to check modular CONFIG options
> > > 87b95a81357d fixdep: refactor parse_dep_file()
> > > 5d1ef76f5a22 fixdep: move global variables to local variables of main()
> > > ccfe78873c22 fixdep: remove unneeded memcpy() in parse_dep_file()
> > > 4003fd80cba9 fixdep: factor out common code for reading files
> > > 01b5cbe7012f fixdep: use malloc() and read() to load dep_file to buffer
> > > 41f92cffba19 fixdep: remove unnecessary  inclusion
> > > 7c2ec43a2154 fixdep: exit with error code in error branches of 
> > > do_config_file()
> > > 4e433fc4d1a9 fixdep: trivial: typo fix and correction
> > > dee81e988674 fixdep: faster CONFIG_ search
> > > c1a95fda2a40 kbuild: add fine grained build dependencies for exported 
> > > symbols
> > > d8329e35cc08 fixdep: accept extra dependencies on stdin
> > > 4c835b57b8de fixdep: constify strrcmp arguments
> > >
> > > Of note is that when applying dee81e988674 above our logic in that area
> > > required some careful consideration to continue to apply.
> >
> > I checked it. The resync looks correct.

Great, thanks!

> > > We specifically do not include:
> > > 638e69cf2230 fixdep: do not ignore kconfig.h
> > > as this leads to build problems for us resulting in problems like:
> > > dts/.dt.dtb.o.cmd:5: *** unterminated call to function 'wildcard': 
> > > missing ')'.  Stop.
> >
> >
> > This is due to config_enabled(CONFIG_VAL(option##_MODULE))
> > in include/linux/kconfig.h
> >
> > This line was unneeded in the first place
> > since U-Boot does not support module,
> > but I just wanted to make it aligned with Linux somehow.
> >
> >
> > I sent two patches.
> > Please choose either depending your workflow.
> >
> > [A] http://patchwork.ozlabs.org/patch/1239950/
> > (If you want to fix the issue before re-sync)
> >
> > [B] http://patchwork.ozlabs.org/patch/1239952/
> > (If you want to fix the issue after re-sync)
> >
> >
> > Then, you can import
> > 638e69cf2230 fixdep: do not ignore kconfig.h

Thanks for looking in to it.

> BTW, I noticed another problem in fixdep.
> 
> I will hold back a fix-up
> until your resync work is done.

OK.  I'm going to try and get at least closer to latest release for the
next branch in U-Boot this week.

-- 
Tom


signature.asc
Description: PGP signature

[PATCH 11/16] arm64: zynqmp: Do not duplicate flash partition label property

[Michal Simek]

From: Amit Kumar Mahapatra 

In kernel 5.4, support has been added for reading MTD devices via
the nvmem API.
For this the mtd devices are registered as read-only NVMEM providers
under sysfs with the same name as the flash partition label property.

So if flash partition label property of multiple flash devices are identical
then the second mtd device fails to get registered as a NVMEM provider.

This patch fixes the issue by having different label property for different
flashes.

Signed-off-by: Amit Kumar Mahapatra 
Signed-off-by: Michal Simek 
---

 arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts 
b/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts
index 2ff7952e70e5..92d938d665d2 100644
--- a/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts
+++ b/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts
@@ -197,7 +197,7 @@
reg = <0>;
 
partition@0 {
-   label = "data";
+   label = "spi0-data";
reg = <0x0 0x10>;
};
};
@@ -214,7 +214,7 @@
reg = <0>;
 
partition@0 {
-   label = "data";
+   label = "spi1-data";
reg = <0x0 0x84000>;
};
};
-- 
2.25.0

[PATCH 14/16] arm64: zynqmp: Fix GIC compatible property

[Michal Simek]

dtbs_check is showing warning around GIC compatible property as
interrupt-controller@f901: compatible: ['arm,gic-400', 'arm,cortex-a15-gic']
is not valid under any of the given schemas

Similar change has been done also by Linux kernel commit 5400cdc1410b
("ARM: dts: sunxi: Fix GIC compatible")

Signed-off-by: Michal Simek 
---

 arch/arm/dts/zynqmp.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
index 7d84a64b8055..aa2815822237 100644
--- a/arch/arm/dts/zynqmp.dtsi
+++ b/arch/arm/dts/zynqmp.dtsi
@@ -208,7 +208,7 @@
ranges = <0 0 0 0 0x>;
 
gic: interrupt-controller@f901 {
-   compatible = "arm,gic-400", "arm,cortex-a15-gic";
+   compatible = "arm,gic-400";
#interrupt-cells = <3>;
reg = <0x0 0xf901 0x1>,
  <0x0 0xf902 0x2>,
-- 
2.25.0

[PATCH 13/16] arm64: zynqmp: Fix addresses in partition definitions

[Michal Simek]

Node name should be @ which is not how partitions are
described.

Issue was found by running dtbs_check as:
flash@0: 'partition@qspi-device-tree', 'partition@qspi-fsbl-uboot',
'partition@qspi-linux', 'partition@qspi-rootfs'
do not match any of the regexes: ...

Signed-off-by: Michal Simek 
---

 arch/arm/dts/zynqmp-zc1232-revA.dts  | 8 
 arch/arm/dts/zynqmp-zc1254-revA.dts  | 8 
 arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts | 8 
 arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts | 8 
 arch/arm/dts/zynqmp-zcu102-revA.dts  | 8 
 arch/arm/dts/zynqmp-zcu104-revA.dts  | 8 
 arch/arm/dts/zynqmp-zcu104-revC.dts  | 8 
 arch/arm/dts/zynqmp-zcu106-revA.dts  | 8 
 arch/arm/dts/zynqmp-zcu111-revA.dts  | 8 
 arch/arm/dts/zynqmp-zcu1275-revA.dts | 8 
 arch/arm/dts/zynqmp-zcu1275-revB.dts | 8 
 11 files changed, 44 insertions(+), 44 deletions(-)

diff --git a/arch/arm/dts/zynqmp-zc1232-revA.dts 
b/arch/arm/dts/zynqmp-zc1232-revA.dts
index 87152afc32f5..cdd1c688abc8 100644
--- a/arch/arm/dts/zynqmp-zc1232-revA.dts
+++ b/arch/arm/dts/zynqmp-zc1232-revA.dts
@@ -48,19 +48,19 @@
spi-tx-bus-width = <1>;
spi-rx-bus-width = <4>;
spi-max-frequency = <10800>; /* Based on DC1 spec */
-   partition@qspi-fsbl-uboot { /* for testing purpose */
+   partition@0 { /* for testing purpose */
label = "qspi-fsbl-uboot";
reg = <0x0 0x10>;
};
-   partition@qspi-linux { /* for testing purpose */
+   partition@1 { /* for testing purpose */
label = "qspi-linux";
reg = <0x10 0x50>;
};
-   partition@qspi-device-tree { /* for testing purpose */
+   partition@60 { /* for testing purpose */
label = "qspi-device-tree";
reg = <0x60 0x2>;
};
-   partition@qspi-rootfs { /* for testing purpose */
+   partition@62 { /* for testing purpose */
label = "qspi-rootfs";
reg = <0x62 0x5E>;
};
diff --git a/arch/arm/dts/zynqmp-zc1254-revA.dts 
b/arch/arm/dts/zynqmp-zc1254-revA.dts
index d6b2834f3aa6..f13788042314 100644
--- a/arch/arm/dts/zynqmp-zc1254-revA.dts
+++ b/arch/arm/dts/zynqmp-zc1254-revA.dts
@@ -48,19 +48,19 @@
spi-tx-bus-width = <1>;
spi-rx-bus-width = <4>; /* FIXME also DUAL configuration 
possible */
spi-max-frequency = <10800>; /* Based on DC1 spec */
-   partition@qspi-fsbl-uboot { /* for testing purpose */
+   partition@0 { /* for testing purpose */
label = "qspi-fsbl-uboot";
reg = <0x0 0x10>;
};
-   partition@qspi-linux { /* for testing purpose */
+   partition@1 { /* for testing purpose */
label = "qspi-linux";
reg = <0x10 0x50>;
};
-   partition@qspi-device-tree { /* for testing purpose */
+   partition@60 { /* for testing purpose */
label = "qspi-device-tree";
reg = <0x60 0x2>;
};
-   partition@qspi-rootfs { /* for testing purpose */
+   partition@62 { /* for testing purpose */
label = "qspi-rootfs";
reg = <0x62 0x5E>;
};
diff --git a/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts 
b/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts
index fa3824d2a126..05be495841e0 100644
--- a/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts
+++ b/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts
@@ -108,19 +108,19 @@
spi-tx-bus-width = <1>;
spi-rx-bus-width = <4>;
spi-max-frequency = <10800>; /* Based on DC1 spec */
-   partition@qspi-fsbl-uboot { /* for testing purpose */
+   partition@0 { /* for testing purpose */
label = "qspi-fsbl-uboot";
reg = <0x0 0x10>;
};
-   partition@qspi-linux { /* for testing purpose */
+   partition@1 { /* for testing purpose */
label = "qspi-linux";
reg = <0x10 0x50>;
};
-   partition@qspi-device-tree { /* for testing purpose */
+   partition@60 { /* for testing purpose */
label = "qspi-device-tree";
reg = <0x60 0x2>;
};
-   partition@qspi-rootfs { /* for testing purpose */
+   partition@62 { /* for testing purpose 

[PATCH 12/16] arm64: zynqmp: Sync DP subsystem

[Michal Simek]

Sync DP subsystem with the latest state in Xilinx U-Boot repository.
This binding hasn't been approved in mainline Linux but it is much better
than ancient version which this patch removes.

Signed-off-by: Michal Simek 
---

 arch/arm/dts/zynqmp-clk-ccf.dtsi |   6 +-
 arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts |  19 +---
 arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts |   2 +-
 arch/arm/dts/zynqmp-zcu102-revA.dts  |  20 +---
 arch/arm/dts/zynqmp.dtsi | 136 ++-
 5 files changed, 73 insertions(+), 110 deletions(-)

diff --git a/arch/arm/dts/zynqmp-clk-ccf.dtsi b/arch/arm/dts/zynqmp-clk-ccf.dtsi
index 0b0fb6e98788..b02ef22abd20 100644
--- a/arch/arm/dts/zynqmp-clk-ccf.dtsi
+++ b/arch/arm/dts/zynqmp-clk-ccf.dtsi
@@ -284,11 +284,15 @@
clocks = <_clk AMS_REF>;
 };
 
+_dpsub {
+   clocks = <_aclk>, <_clk DP_AUDIO_REF>, <_clk 
DP_VIDEO_REF>;
+};
+
 _dpdma {
clocks = <_clk DPDMA_REF>;
 };
 
-_dp_snd_codec0 {
+_dp_snd_codec0 {
clocks = <_clk DP_AUDIO_REF>;
 };
 
diff --git a/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts 
b/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts
index d8ea5578e779..fa3824d2a126 100644
--- a/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts
+++ b/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts
@@ -175,32 +175,23 @@
dr_mode = "host";
 };
 
-_drm {
+_dpsub {
status = "okay";
 };
 
-_dp {
+_dp_snd_pcm0 {
status = "okay";
 };
 
-_dp_sub {
+_dp_snd_pcm1 {
status = "okay";
-   xlnx,vid-clk-pl;
 };
 
-_dp_snd_pcm0 {
+_dp_snd_card0 {
status = "okay";
 };
 
-_dp_snd_pcm1 {
-   status = "okay";
-};
-
-_dp_snd_card {
-   status = "okay";
-};
-
-_dp_snd_codec0 {
+_dp_snd_codec0 {
status = "okay";
 };
 
diff --git a/arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts 
b/arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts
index 13508c45191f..6655b86a8029 100644
--- a/arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts
+++ b/arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts
@@ -115,7 +115,7 @@
status = "okay";
 };
 
-_dp {
+_dpsub {
status = "okay";
 };
 
diff --git a/arch/arm/dts/zynqmp-zcu102-revA.dts 
b/arch/arm/dts/zynqmp-zcu102-revA.dts
index e63f4b9cd8b0..fd6dfdd3c225 100644
--- a/arch/arm/dts/zynqmp-zcu102-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu102-revA.dts
@@ -705,33 +705,23 @@
status = "okay";
 };
 
-_drm {
+_dpsub {
status = "okay";
-   clocks = <_1>;
 };
 
-_dp {
+_dp_snd_codec0 {
status = "okay";
 };
 
-_dp_sub {
+_dp_snd_pcm0 {
status = "okay";
-   xlnx,vid-clk-pl;
 };
 
-_dp_snd_pcm0 {
+_dp_snd_pcm1 {
status = "okay";
 };
 
-_dp_snd_pcm1 {
-   status = "okay";
-};
-
-_dp_snd_card {
-   status = "okay";
-};
-
-_dp_snd_codec0 {
+_dp_snd_card0 {
status = "okay";
 };
 
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
index b117fc43c6d2..7d84a64b8055 100644
--- a/arch/arm/dts/zynqmp.dtsi
+++ b/arch/arm/dts/zynqmp.dtsi
@@ -201,54 +201,6 @@
};
};
 
-   xlnx_dp_snd_card: dp_snd_card {
-   compatible = "xlnx,dp-snd-card";
-   status = "disabled";
-   xlnx,dp-snd-pcm = <_dp_snd_pcm0>, <_dp_snd_pcm1>;
-   xlnx,dp-snd-codec = <_dp_snd_codec0>;
-   };
-
-   xlnx_dp_snd_codec0: dp_snd_codec0 {
-   compatible = "xlnx,dp-snd-codec";
-   status = "disabled";
-   clock-names = "aud_clk";
-   };
-
-   xlnx_dp_snd_pcm0: dp_snd_pcm0 {
-   compatible = "xlnx,dp-snd-pcm";
-   status = "disabled";
-   dmas = <_dpdma 4>;
-   dma-names = "tx";
-   };
-
-   xlnx_dp_snd_pcm1: dp_snd_pcm1 {
-   compatible = "xlnx,dp-snd-pcm";
-   status = "disabled";
-   dmas = <_dpdma 5>;
-   dma-names = "tx";
-   };
-
-   xilinx_drm: xilinx_drm {
-   compatible = "xlnx,drm";
-   status = "disabled";
-   xlnx,encoder-slave = <_dp>;
-   xlnx,connector-type = "DisplayPort";
-   xlnx,dp-sub = <_dp_sub>;
-   planes {
-   xlnx,pixel-format = "rgb565";
-   plane0 {
-   dmas = <_dpdma 3>;
-   dma-names = "dma0";
-   };
-   plane1 {
-   dmas = <_dpdma 0>,
-   <_dpdma 1>,
-   <_dpdma 2>;
-   dma-names = "dma0", "dma1", "dma2";
-   };
-   };
-   };
-
amba_apu: amba-apu@0 {
compatible = "simple-bus";
#address-cells = <2>;
@@ -1016,37 +968,6 @@
};
};
 
-   xlnx_dp: dp@fd4a {
-   compatible = "xlnx,v-dp";
-   status = "disabled";
-   reg = <0x0 

[PATCH 15/16] arm64: zynqmp: Change bus naming to axi

[Michal Simek]

Linux dtbs_check reports issue with bus name reported as
amba-apu@0: $nodename:0: 'amba-apu@0' does not match 
'^(bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
amba: $nodename:0: 'amba' does not match '^(bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'

That's why change bus names to axi.

Signed-off-by: Michal Simek 
---

 arch/arm/dts/zynqmp.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
index aa2815822237..d5bee2f448d1 100644
--- a/arch/arm/dts/zynqmp.dtsi
+++ b/arch/arm/dts/zynqmp.dtsi
@@ -201,7 +201,7 @@
};
};
 
-   amba_apu: amba-apu@0 {
+   amba_apu: axi@0 {
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <1>;
@@ -220,7 +220,7 @@
};
};
 
-   amba: amba {
+   amba: axi {
compatible = "simple-bus";
u-boot,dm-pre-reloc;
#address-cells = <2>;
-- 
2.25.0

[PATCH 07/16] arm64: zynqmp: Sync zynqmp fpga manager with mainline

[Michal Simek]

From: Nava kishore Manne 

Sync zynqmp fpga manager with mainline.

Signed-off-by: Nava kishore Manne 
Signed-off-by: Michal Simek 
---

 arch/arm/dts/zynqmp-clk-ccf.dtsi |  4 
 arch/arm/dts/zynqmp.dtsi | 12 +++-
 2 files changed, 11 insertions(+), 5 deletions(-)

diff --git a/arch/arm/dts/zynqmp-clk-ccf.dtsi b/arch/arm/dts/zynqmp-clk-ccf.dtsi
index 1098e890192c..0b0fb6e98788 100644
--- a/arch/arm/dts/zynqmp-clk-ccf.dtsi
+++ b/arch/arm/dts/zynqmp-clk-ccf.dtsi
@@ -291,3 +291,7 @@
 _dp_snd_codec0 {
clocks = <_clk DP_AUDIO_REF>;
 };
+
+_pcap {
+   clocks = <_clk PCAP>;
+};
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
index ec0dd73e1504..58ac62c4f851 100644
--- a/arch/arm/dts/zynqmp.dtsi
+++ b/arch/arm/dts/zynqmp.dtsi
@@ -149,6 +149,11 @@
#power-domain-cells = <0x1>;
u-boot,dm-pre-reloc;
 
+   zynqmp_pcap: pcap {
+   compatible = "xlnx,zynqmp-pcap-fpga";
+   clock-names = "ref_clk";
+   };
+
zynqmp_power: zynqmp-power {
u-boot,dm-pre-reloc;
compatible = "xlnx,zynqmp-power";
@@ -180,9 +185,10 @@
 
fpga_full: fpga-full {
compatible = "fpga-region";
-   fpga-mgr = <>;
+   fpga-mgr = <_pcap>;
#address-cells = <2>;
#size-cells = <2>;
+   ranges;
};
 
nvmem_firmware {
@@ -195,10 +201,6 @@
};
};
 
-   pcap: pcap {
-   compatible = "xlnx,zynqmp-pcap-fpga";
-   };
-
rst: reset-controller {
compatible = "xlnx,zynqmp-reset";
#reset-cells = <1>;
-- 
2.25.0

[PATCH 09/16] arm64: zynqmp: Remove second copy of reset-controller

[Michal Simek]

Reset controller is handled via firmware that's why it should be the part
of firmware node. Origin solution hasn't been removed when above change was
applied by commit b07e97b4ba27 ("arm64: zynqmp: Use reset header in
zynqmp.dtsi").

Signed-off-by: Michal Simek 
---

 arch/arm/dts/zynqmp.dtsi | 5 -
 1 file changed, 5 deletions(-)

diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
index 58ac62c4f851..ed28f1f695bb 100644
--- a/arch/arm/dts/zynqmp.dtsi
+++ b/arch/arm/dts/zynqmp.dtsi
@@ -201,11 +201,6 @@
};
};
 
-   rst: reset-controller {
-   compatible = "xlnx,zynqmp-reset";
-   #reset-cells = <1>;
-   };
-
xlnx_dp_snd_card: dp_snd_card {
compatible = "xlnx,dp-snd-card";
status = "disabled";
-- 
2.25.0

[PATCH 05/16] ARM: zynq: Fix spi name node

[Michal Simek]

None name address should be aligned with address. DTC 1.5.1 is reporting
issues related to that.

arch/arm/boot/dts/zynq-zc770-xm010.dts:106.10-119.4: Warning
 (spi_bus_reg): /amba/spi@e0007000/flash@0: SPI bus unit address format
 error, expected "1"
arch/arm/boot/dts/zynq-zc770-xm013.dts:101.19-109.4: Warning
(spi_bus_reg): /amba/spi@e0006000/eeprom@0: SPI bus unit address format
 error, expected "2"

Signed-off-by: Michal Simek 
---

 arch/arm/dts/zynq-zc770-xm010.dts | 2 +-
 arch/arm/dts/zynq-zc770-xm013.dts | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/dts/zynq-zc770-xm010.dts 
b/arch/arm/dts/zynq-zc770-xm010.dts
index e1f34653ec3c..c547d7921d9c 100644
--- a/arch/arm/dts/zynq-zc770-xm010.dts
+++ b/arch/arm/dts/zynq-zc770-xm010.dts
@@ -72,7 +72,7 @@
status = "okay";
num-cs = <4>;
is-decoded-cs = <0>;
-   flash@0 {
+   flash@1 {
compatible = "sst25wf080", "jedec,spi-nor";
reg = <1>;
spi-max-frequency = <100>;
diff --git a/arch/arm/dts/zynq-zc770-xm013.dts 
b/arch/arm/dts/zynq-zc770-xm013.dts
index 05a49982cc4b..bdf0c2f956d1 100644
--- a/arch/arm/dts/zynq-zc770-xm013.dts
+++ b/arch/arm/dts/zynq-zc770-xm013.dts
@@ -67,7 +67,7 @@
status = "okay";
num-cs = <4>;
is-decoded-cs = <0>;
-   eeprom: eeprom@0 {
+   eeprom: eeprom@2 {
at25,byte-len = <8192>;
at25,addr-mode = <2>;
at25,page-size = <32>;
-- 
2.25.0

[PATCH 10/16] arm64: dts: zynqmp: Add clk cells for sdhci

[Michal Simek]

From: Ashok Reddy Soma 

Add clock-cells and clock-output-names for sdhci0 and sdhci1.
These are needed for linux sdhci driver from 5.4 version onwards.

Signed-off-by: Ashok Reddy Soma 
Signed-off-by: Michal Simek 
---

 arch/arm/dts/zynqmp.dtsi | 4 
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
index ed28f1f695bb..b117fc43c6d2 100644
--- a/arch/arm/dts/zynqmp.dtsi
+++ b/arch/arm/dts/zynqmp.dtsi
@@ -791,6 +791,8 @@
power-domains = <_firmware PD_SD_0>;
nvmem-cells = <_revision>;
nvmem-cell-names = "soc_revision";
+   #clock-cells = <1>;
+   clock-output-names = "clk_out_sd0", "clk_in_sd0";
};
 
sdhci1: mmc@ff17 {
@@ -807,6 +809,8 @@
power-domains = <_firmware PD_SD_1>;
nvmem-cells = <_revision>;
nvmem-cell-names = "soc_revision";
+   #clock-cells = <1>;
+   clock-output-names = "clk_out_sd1", "clk_in_sd1";
};
 
pinctrl0: pinctrl@ff18 {
-- 
2.25.0

[PATCH 08/16] arm64: zynqmp: Add 'no-1-8-v' property for ZynqMP Boards

[Michal Simek]

From: Manish Narani 

Modify dts files to add 'no-1-8-v' property for all the ZynqMP boards.
User can remove this property to enable the UHS mode. This is to keep
the same speed (HS) modes across all the stages of the Linux Boot. Due
to power cycling limitation of some of the ZynqMP boards, some SD cards
don't get power cycled and are failing in Linux.

Signed-off-by: Manish Narani 
Signed-off-by: Michal Simek 
---

 arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts | 5 -
 arch/arm/dts/zynqmp-zcu102-rev1.0.dts| 4 
 arch/arm/dts/zynqmp-zcu102-revA.dts  | 6 +-
 arch/arm/dts/zynqmp-zcu106-revA.dts  | 4 
 arch/arm/dts/zynqmp-zcu111-revA.dts  | 4 
 arch/arm/dts/zynqmp-zcu1285-revA.dts | 4 
 arch/arm/dts/zynqmp-zcu208-revA.dts  | 4 
 arch/arm/dts/zynqmp-zcu216-revA.dts  | 4 
 8 files changed, 29 insertions(+), 6 deletions(-)

diff --git a/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts 
b/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts
index d604cf134252..d8ea5578e779 100644
--- a/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts
+++ b/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts
@@ -154,7 +154,10 @@
 /* SD1 with level shifter */
  {
status = "okay";
-   no-1-8-v;   /* for 1.0 silicon */
+   /*
+* This property should be removed for supporting UHS mode
+*/
+   no-1-8-v;
xlnx,mio_bank = <1>;
 };
 
diff --git a/arch/arm/dts/zynqmp-zcu102-rev1.0.dts 
b/arch/arm/dts/zynqmp-zcu102-rev1.0.dts
index f39013794fa2..d508f3359943 100644
--- a/arch/arm/dts/zynqmp-zcu102-rev1.0.dts
+++ b/arch/arm/dts/zynqmp-zcu102-rev1.0.dts
@@ -34,7 +34,3 @@
reg = <0xe0 0x3>;
};
 };
-
- {
-   /delete-property/ no-1-8-v;
-};
diff --git a/arch/arm/dts/zynqmp-zcu102-revA.dts 
b/arch/arm/dts/zynqmp-zcu102-revA.dts
index 222b67c7ce2f..e63f4b9cd8b0 100644
--- a/arch/arm/dts/zynqmp-zcu102-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu102-revA.dts
@@ -655,7 +655,11 @@
 /* SD1 with level shifter */
  {
status = "okay";
-   no-1-8-v;   /* for 1.0 silicon */
+   /*
+* 1.0 revision has level shifter and this property should be
+* removed for supporting UHS mode
+*/
+   no-1-8-v;
xlnx,mio_bank = <1>;
 };
 
diff --git a/arch/arm/dts/zynqmp-zcu106-revA.dts 
b/arch/arm/dts/zynqmp-zcu106-revA.dts
index dc533f5f6dd7..a5c4309f2f39 100644
--- a/arch/arm/dts/zynqmp-zcu106-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu106-revA.dts
@@ -653,6 +653,10 @@
 /* SD1 with level shifter */
  {
status = "okay";
+   /*
+* This property should be removed for supporting UHS mode
+*/
+   no-1-8-v;
xlnx,mio_bank = <1>;
 };
 
diff --git a/arch/arm/dts/zynqmp-zcu111-revA.dts 
b/arch/arm/dts/zynqmp-zcu111-revA.dts
index 1304c509ac2a..755c30e9ff67 100644
--- a/arch/arm/dts/zynqmp-zcu111-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu111-revA.dts
@@ -567,6 +567,10 @@
  {
status = "okay";
disable-wp;
+   /*
+* This property should be removed for supporting UHS mode
+*/
+   no-1-8-v;
xlnx,mio_bank = <1>;
 };
 
diff --git a/arch/arm/dts/zynqmp-zcu1285-revA.dts 
b/arch/arm/dts/zynqmp-zcu1285-revA.dts
index 8a4d5b9fed19..d8b9cb1a9e13 100644
--- a/arch/arm/dts/zynqmp-zcu1285-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu1285-revA.dts
@@ -241,5 +241,9 @@
 
  {
status = "okay";
+   /*
+* This property should be removed for supporting UHS mode
+*/
+   no-1-8-v;
xlnx,mio_bank = <1>;
 };
diff --git a/arch/arm/dts/zynqmp-zcu208-revA.dts 
b/arch/arm/dts/zynqmp-zcu208-revA.dts
index 7395f23b6757..75ecd7a5c203 100644
--- a/arch/arm/dts/zynqmp-zcu208-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu208-revA.dts
@@ -563,6 +563,10 @@
  {
status = "okay";
disable-wp;
+   /*
+* This property should be removed for supporting UHS mode
+*/
+   no-1-8-v;
xlnx,mio_bank = <1>;
 };
 
diff --git a/arch/arm/dts/zynqmp-zcu216-revA.dts 
b/arch/arm/dts/zynqmp-zcu216-revA.dts
index f08bbe36c2a5..f3b5edfeb423 100644
--- a/arch/arm/dts/zynqmp-zcu216-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu216-revA.dts
@@ -567,6 +567,10 @@
  {
status = "okay";
disable-wp;
+   /*
+* This property should be removed for supporting UHS mode
+*/
+   no-1-8-v;
xlnx,mio_bank = <1>;
 };
 
-- 
2.25.0

[PATCH 06/16] arm64: zynqmp: Remove unused zynqmp-clk.dtsi

[Michal Simek]

All boards have been converted to firmware based driver that's why we can
remove this file now.

Signed-off-by: Michal Simek 
---

 arch/arm/dts/zynqmp-clk.dtsi | 244 ---
 1 file changed, 244 deletions(-)
 delete mode 100644 arch/arm/dts/zynqmp-clk.dtsi

diff --git a/arch/arm/dts/zynqmp-clk.dtsi b/arch/arm/dts/zynqmp-clk.dtsi
deleted file mode 100644
index 82eac56c9d93..
--- a/arch/arm/dts/zynqmp-clk.dtsi
+++ /dev/null
@@ -1,244 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Clock specification for Xilinx ZynqMP
- *
- * (C) Copyright 2015 - 2020, Xilinx, Inc.
- *
- * Michal Simek 
- */
-
-/ {
-   clk100: clk100 {
-   compatible = "fixed-clock";
-   #clock-cells = <0>;
-   clock-frequency = <1>;
-   u-boot,dm-pre-reloc;
-   };
-
-   clk125: clk125 {
-   compatible = "fixed-clock";
-   #clock-cells = <0>;
-   clock-frequency = <12500>;
-   };
-
-   clk200: clk200 {
-   compatible = "fixed-clock";
-   #clock-cells = <0>;
-   clock-frequency = <2>;
-   u-boot,dm-pre-reloc;
-   };
-
-   clk250: clk250 {
-   compatible = "fixed-clock";
-   #clock-cells = <0>;
-   clock-frequency = <25000>;
-   };
-
-   clk300: clk300 {
-   compatible = "fixed-clock";
-   #clock-cells = <0>;
-   clock-frequency = <3>;
-   u-boot,dm-pre-reloc;
-   };
-
-   clk600: clk600 {
-   compatible = "fixed-clock";
-   #clock-cells = <0>;
-   clock-frequency = <6>;
-   };
-
-   dp_aclk: clock0 {
-   compatible = "fixed-clock";
-   #clock-cells = <0>;
-   clock-frequency = <1>;
-   clock-accuracy = <100>;
-   };
-
-   dp_aud_clk: clock1 {
-   compatible = "fixed-clock";
-   #clock-cells = <0>;
-   clock-frequency = <24576000>;
-   clock-accuracy = <100>;
-   };
-
-   dpdma_clk: dpdma-clk {
-   compatible = "fixed-clock";
-   #clock-cells = <0x0>;
-   clock-frequency = <53300>;
-   };
-
-   drm_clock: drm-clock {
-   compatible = "fixed-clock";
-   #clock-cells = <0x0>;
-   clock-frequency = <26275>;
-   clock-accuracy = <0x64>;
-   };
-};
-
- {
-   clocks = < >;
-};
-
- {
-   clocks = < >;
-};
-
-_dma_chan1 {
-   clocks = <>, <>;
-};
-
-_dma_chan2 {
-   clocks = <>, <>;
-};
-
-_dma_chan3 {
-   clocks = <>, <>;
-};
-
-_dma_chan4 {
-   clocks = <>, <>;
-};
-
-_dma_chan5 {
-   clocks = <>, <>;
-};
-
-_dma_chan6 {
-   clocks = <>, <>;
-};
-
-_dma_chan7 {
-   clocks = <>, <>;
-};
-
-_dma_chan8 {
-   clocks = <>, <>;
-};
-
-_dma_chan1 {
-   clocks = <>, <>;
-};
-
-_dma_chan2 {
-   clocks = <>, <>;
-};
-
-_dma_chan3 {
-   clocks = <>, <>;
-};
-
-_dma_chan4 {
-   clocks = <>, <>;
-};
-
-_dma_chan5 {
-   clocks = <>, <>;
-};
-
-_dma_chan6 {
-   clocks = <>, <>;
-};
-
-_dma_chan7 {
-   clocks = <>, <>;
-};
-
-_dma_chan8 {
-   clocks = <>, <>;
-};
-
- {
-   clocks = < >;
-};
-
- {
-   clocks = <>, <>, <>;
-};
-
- {
-   clocks = <>, <>, <>;
-};
-
- {
-   clocks = <>, <>, <>;
-};
-
- {
-   clocks = <>, <>, <>;
-};
-
- {
-   clocks = <>;
-};
-
- {
-   clocks = <>;
-};
-
- {
-   clocks = <>;
-};
-
- {
-   clocks = < >;
-};
-
- {
-   clocks = <>;
-};
-
- {
-   clocks = < >;
-};
-
- {
-   clocks = < >;
-};
-
- {
-   clocks = < >;
-};
-
- {
-   clocks = < >;
-};
-
- {
-   clocks = < >;
-};
-
- {
-   clocks = < >;
-};
-
- {
-   clocks = <>, <>;
-};
-
- {
-   clocks = <>, <>;
-};
-
- {
-   clocks = <>;
-};
-
-_watchdog {
-   clocks = <>;
-};
-
-_drm {
-   clocks = <_clock>;
-};
-
-_dp {
-   clocks = <_aclk>, <_aud_clk>;
-};
-
-_dpdma {
-   clocks = <_clk>;
-};
-
-_dp_snd_codec0 {
-   clocks = <_aud_clk>;
-};
-- 
2.25.0

[PATCH 02/16] ARM: dts: zynq: replace gpio-key, wakeup with wakeup-source property

[Michal Simek]

From: Sudeep Holla 

Most of the legacy "gpio-key,wakeup" boolean property is already
replaced with "wakeup-source". However few occurrences of old property
has popped up again, probably from the remnants in downstream trees.

Replace the legacy properties with the unified "wakeup-source"
property introduced in the Linux kernel commit 700a38b27eef
("Input: gpio_keys - switch to using generic device properties")

Cc: Michal Simek 
Signed-off-by: Sudeep Holla 
Signed-off-by: Michal Simek 
---

 arch/arm/dts/zynq-zturn.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/dts/zynq-zturn.dts b/arch/arm/dts/zynq-zturn.dts
index cc41efcb4631..600e8ee0255c 100644
--- a/arch/arm/dts/zynq-zturn.dts
+++ b/arch/arm/dts/zynq-zturn.dts
@@ -54,7 +54,7 @@
label = "K1";
gpios = < 0x32 0x1>;
linux,code = <0x66>;
-   gpio-key,wakeup;
+   wakeup-source;
autorepeat;
};
};
-- 
2.25.0