Re: [PATCH v2 0/4] usb: xhci: Prepare xHCI driver for MIPS Octeon big-endian support
Hi Marek, On 30.07.20 08:59, Bin Meng wrote: Hi Marek, On Thu, Jul 30, 2020 at 2:32 PM Stefan Roese wrote: Hi Bin, On 21.07.20 10:46, Stefan Roese wrote: These patches fix a few issues, found while porting the xHCI to the MIPS Octeon platforms. The basic issues here are: - Endianess issues: missing cpu_to_leXX() & leXX_to_cpu() conversions - Use physical (DMA) address for the xHCI DMA controller These patches are the groundwork for the upcoming xHCI Octeon support that will follow soon. Thanks, Stefan Changes in v2: - Add missing (uintptr_t) cast to remove compile time warning Stefan Roese (4): usb: xhci: Add missing endian conversions (cpu_to_leXX / leXX_to_cpu) usb: xhci: xhci_mem_init: Use cpu_to_le64() and not xhci_writeq() usb: usb-uclass.c: Drop le16_to_cpu() as values are already swapped usb: xhci: Add virt_to_phys() to support mapped platforms drivers/usb/host/usb-uclass.c | 8 drivers/usb/host/xhci-mem.c | 30 +++--- drivers/usb/host/xhci-ring.c | 8 drivers/usb/host/xhci.c | 3 +-- 4 files changed, 24 insertions(+), 25 deletions(-) Is everything okay with this series? If yes, I think it would be good to have it included soon into mainline, so that all platforms have time to test these changes to the common xHCI driver. Would you pick up this series? Or do you want me to pick this up via u-boot-x86 tree? Gently ping on this. Thanks, Stefan
[PATCH] ddr: socfpga: Fix integer overflow that caused DDR size mismatched
From: Tien Fong Chee
Convert the constant integer to 'phys_size_t' to avoid overflow
when calculating the SDRAM size.
Signed-off-by: Tien Fong Chee
---
drivers/ddr/altera/sdram_soc64.c | 15 ---
1 file changed, 8 insertions(+), 7 deletions(-)
diff --git a/drivers/ddr/altera/sdram_soc64.c b/drivers/ddr/altera/sdram_soc64.c
index 8cb75fe02a..a862ac8092 100644
--- a/drivers/ddr/altera/sdram_soc64.c
+++ b/drivers/ddr/altera/sdram_soc64.c
@@ -218,13 +218,14 @@ phys_size_t sdram_calculate_size(struct
altera_sdram_platdata *plat)
{
u32 dramaddrw = hmc_readl(plat, DRAMADDRW);
- phys_size_t size = 1 << (DRAMADDRW_CFG_CS_ADDR_WIDTH(dramaddrw) +
-DRAMADDRW_CFG_BANK_GRP_ADDR_WIDTH(dramaddrw) +
-DRAMADDRW_CFG_BANK_ADDR_WIDTH(dramaddrw) +
-DRAMADDRW_CFG_ROW_ADDR_WIDTH(dramaddrw) +
-DRAMADDRW_CFG_COL_ADDR_WIDTH(dramaddrw));
-
- size *= (2 << (hmc_ecc_readl(plat, DDRIOCTRL) &
+ phys_size_t size = (phys_size_t)1 <<
+ (DRAMADDRW_CFG_CS_ADDR_WIDTH(dramaddrw) +
+ DRAMADDRW_CFG_BANK_GRP_ADDR_WIDTH(dramaddrw) +
+ DRAMADDRW_CFG_BANK_ADDR_WIDTH(dramaddrw) +
+ DRAMADDRW_CFG_ROW_ADDR_WIDTH(dramaddrw) +
+ DRAMADDRW_CFG_COL_ADDR_WIDTH(dramaddrw));
+
+ size *= ((phys_size_t)2 << (hmc_ecc_readl(plat, DDRIOCTRL) &
DDR_HMC_DDRIOCTRL_IOSIZE_MSK));
return size;
--
2.13.0
Re: [PATCH 1/1] riscv: fix building with CONFIG_SPL_SMP=n
+Andy Shevchenko
On Tue, Aug 4, 2020 at 10:58 PM Heinrich Schuchardt wrote:
>
> On 04.08.20 15:15, Bin Meng wrote:
> > On Tue, Aug 4, 2020 at 7:02 PM Heinrich Schuchardt
> > wrote:
> >>
> >> On 04.08.20 03:46, Bin Meng wrote:
> >>> On Tue, Aug 4, 2020 at 5:26 AM Heinrich Schuchardt
> >>> wrote:
>
> Building with CONFIG_SPL_SMP=n results in:
>
> arch/riscv/lib/spl.c: In function ‘jump_to_image_no_args’:
> arch/riscv/lib/spl.c:33:6:
> error: unused variable ‘ret’ [-Werror=unused-variable]
> 33 | int ret;
> | ^~~
>
> Define the variable ret as __maybe_unused.
>
> Fixes: 191636e44898 ("riscv: Introduce SPL_SMP Kconfig option for U-Boot
> SPL")
> >>>
> >>> This should be on the same line
> >>
> >> Commit messages should not exceed 75 characters. See scripts/checkpatch.pl:
> >
> > True, for normal commit messages.
> >
> >>
> >> WARN("COMMIT_LOG_LONG_LINE",
> >> "Possible unwrapped commit description (prefer a maximum 75 chars per
> >> line)\n" . $herecurr);
> >>
> >
> > But this Fixes tag is special. I suspect 2 lines will break some
> > scripts that is handling this "Fixes" tag.
>
> checkpatch.pl and patchstream.py are the only U-Boot scripts containing
> the string "Fixes".
>
> * checkpatch.pl does not complain.
> * I don't use patman. So I don't care if it has a bug.
>
> We already have patches like this by other developers and nobody complained:
IIRC, last time Andy raised the same concern.
Andy, would you share some examples or best practices?
>
> dcdea292d9f3
> 4fb2264b2848
> 00160cf32e6e
>
> So why should I worry?
>
Regards,
Bin
Re: [PULL] u-boot-mips
On Mon, Aug 03, 2020 at 10:36:04PM +0200, Daniel Schwierzeck wrote: > Hi Tom, > > please pull some Octeon MIPS64 updates for 2020.10. This contains just > new GPIO, CLK ad SPI drivers for Octeon as well as the according DT and > defconfig updates. > > Gitlab CI: > https://gitlab.denx.de/u-boot/custodians/u-boot-mips/pipelines/4316 > > > The following changes since commit 68941e3b2c217907a49aa66af8bb65729b913397: > > Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86 (2020-08-03 > 10:25:47 -0400) > > are available in the Git repository at: > > g...@gitlab.denx.de:u-boot/custodians/u-boot-mips.git > tags/mips-pull-2020-08-03 > > for you to fetch changes up to d071ff012e0b3f9e77b54340c96f624d6f115782: > > mips: octeon: Update EBB7304 defconfig (2020-08-03 21:14:49 +0200) > Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: Please pull u-boot-video
On Tue, Aug 04, 2020 at 09:42:23AM +0200, Anatolij Gustschin wrote: > Hi Tom, > > please pull a few video related fixes. Gitlab CI: > https://gitlab.denx.de/u-boot/custodians/u-boot-video/pipelines/4318 > > Thanks! > > The following changes since commit 68941e3b2c217907a49aa66af8bb65729b913397: > > Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86 (2020-08-03 > 10:25:47 -0400) > > are available in the Git repository at: > > https://gitlab.denx.de/u-boot/custodians/u-boot-video.git > tags/fixes-for-2020.10-rc1 > > for you to fetch changes up to 3ce83ee0125fdf2908c39970335121909e98b750: > > video: ipuv3: fix framebuffer base address init with multiple IPUs > (2020-08-03 23:37:31 +0200) > Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [GIT PULL] Pull request: u-boot-imx u-boot-imx-20200804
On Tue, Aug 04, 2020 at 11:02:59AM +0200, Stefano Babic wrote: > Hi Tom, > > please pull from u-boot-imx, thanks ! > > > The following changes since commit ada61f1ee2a4eaa1b29d699b5ba940483171df8a: > > Merge https://gitlab.denx.de/u-boot/custodians/u-boot-riscv > (2020-07-24 08:43:08 -0400) > > are available in the Git repository at: > > https://gitlab.denx.de/u-boot/custodians/u-boot-imx.git > tags/u-boot-imx-20200804 > > for you to fetch changes up to 3e980a2d8bd13d0d1c2d5cec9e57a47b6cff8b92: > > configs: pico-imx6: convert ethernet function to DM_ETH (2020-08-03 > 17:03:57 +0200) > Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [U-Boot] Pull request: u-boot-riscv/master 20200804
On Tue, Aug 04, 2020 at 09:53:04AM +0800, ub...@andestech.com wrote: > Hi Tom, > > Please pull some riscv updates: > > - add DM based reset driver for SiFive SoC's. > > Thanks > Rick > > https://travis-ci.org/github/rickchen36/u-boot-riscv/builds/714339244 > > The following changes since commit 68941e3b2c217907a49aa66af8bb65729b913397: > > Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86 (2020-08-03 > 10:25:47 -0400) > > are available in the Git repository at: > > g...@gitlab.denx.de:u-boot/custodians/u-boot-riscv.git > > for you to fetch changes up to ed50d3fae49b9dad58674b6609913beeac824e42: > > configs: reset: fu540: enable dm reset framework for SiFive (2020-08-04 > 09:19:41 +0800) > Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 01/22] clk: check hw and hw->dev before dereference it
On 04.08.2020 18:29, Simon Glass wrote: > EXTERNAL EMAIL: Do not click links or open attachments unless you know the > content is safe > > Hi Claudiu, > > On Tue, 4 Aug 2020 at 09:25, wrote: >> >> Hi Simon, >> >> On 04.08.2020 18:08, Simon Glass wrote: >>> EXTERNAL EMAIL: Do not click links or open attachments unless you know the >>> content is safe >>> >>> Hi Claudiu, >>> >>> On Tue, 4 Aug 2020 at 01:19, wrote: On 04.08.2020 05:00, Simon Glass wrote: > EXTERNAL EMAIL: Do not click links or open attachments unless you know > the content is safe > > Hi Claudiu, > > On Wed, 29 Jul 2020 at 08:51, Claudiu Beznea > wrote: >> >> Check hw and hw->dev before dereference it. >> >> Signed-off-by: Claudiu Beznea >> --- >> drivers/clk/clk.c | 3 +++ >> 1 file changed, 3 insertions(+) >> > > Why is this needed? It adds to code size and these situations should > not occur. Perhaps use assert()? In my debugging, investigating the issues that patches 03/22, 04/22, 06/22 try to address, I reached also this function and checked these pointers. In the end the issue was not related to them but I though it might be useful to keep these in a patch. I will remove it in the next version. >>> >>> IMO we should use assert() to check invariants and catch basic >>> programming errors. But production testing should make sure that the >>> software basically works. >>> >>> Of course it is nice to have these checks, but they add to code size >>> which is always a concern. So I think we should rely on assert() to >>> catch the errors during development, so we are not wasting code >>> checking for things that we know cannot happen. >> >> OK, I'll switch to assert(). > > One more point I should have made is that my comments apply mostly to > common code that everyone has to use - e.g. the core clock code. So if > you want to put dev_err() and other things in your driver and you know > about the code-size implications that is less of a concern. But with > common code, we should be careful. Sure! Thank you, Claudiu Beznea > > Regards, > Simon >
Re: U-Boot POST Memory Test
Thank you for your helpful response Heinrich. I have a question to further
clarify the purpose of post_bootmode_get().
You wrote,
> post_bootmode_get() tells you which type of tests should be executed.
> For tests after a watchdog reset it also returns the last executed test."
This makes sense. So, looking at the following code in post_run (post/post.c):
if (post_bootmode_get() & POST_POWERTEST) {
.
if (last < post_list_size &&
(flags & test_flags[last] & POST_ALWAYS) &&
(flags & test_flags[last] & POST_MEM)) {
last is initialized to 62 in the first line shown above; thus, the second
if-branch shown is not entered because 62 is not less than post_list_size
(which is 1). last returns the last executed test; however, I am confused
because this is the first call of post_run(), so I don't know what the "last
executed test" would be referring to.
Thus, my question is, what "last executed test" is last (and its value of 62)
representing in this case, and why is it preventing the code from entering the
shown if-branch?
Thank you again,
-Lewis
Re: [PATCH 01/22] clk: check hw and hw->dev before dereference it
Hi Simon, On 04.08.2020 18:08, Simon Glass wrote: > EXTERNAL EMAIL: Do not click links or open attachments unless you know the > content is safe > > Hi Claudiu, > > On Tue, 4 Aug 2020 at 01:19, wrote: >> >> >> >> On 04.08.2020 05:00, Simon Glass wrote: >>> EXTERNAL EMAIL: Do not click links or open attachments unless you know the >>> content is safe >>> >>> Hi Claudiu, >>> >>> On Wed, 29 Jul 2020 at 08:51, Claudiu Beznea >>> wrote: Check hw and hw->dev before dereference it. Signed-off-by: Claudiu Beznea --- drivers/clk/clk.c | 3 +++ 1 file changed, 3 insertions(+) >>> >>> Why is this needed? It adds to code size and these situations should >>> not occur. Perhaps use assert()? >> >> In my debugging, investigating the issues that patches 03/22, 04/22, 06/22 >> try to address, I reached also this function and checked these pointers. In >> the end the issue was not related to them but I though it might be useful >> to keep these in a patch. I will remove it in the next version. > > IMO we should use assert() to check invariants and catch basic > programming errors. But production testing should make sure that the > software basically works. > > Of course it is nice to have these checks, but they add to code size > which is always a concern. So I think we should rely on assert() to > catch the errors during development, so we are not wasting code > checking for things that we know cannot happen. OK, I'll switch to assert(). Thank you, Claudiu Beznea > > Regards, > Simon >
[PATCH] tests: support mkfs.ext4 without metadata_csum
From: Stephen Warren
Modify various test/py filesystem creation routines to support systems
that don't implement the metadata_csum ext4 feature.
Signed-off-by: Stephen Warren
---
test/py/tests/test_env.py | 5 -
test/py/tests/test_fs/conftest.py | 6 --
2 files changed, 8 insertions(+), 3 deletions(-)
diff --git a/test/py/tests/test_env.py b/test/py/tests/test_env.py
index 86ec1b36d36e..2ae8f25381ea 100644
--- a/test/py/tests/test_env.py
+++ b/test/py/tests/test_env.py
@@ -416,7 +416,10 @@ def mk_env_ext4(state_test_env):
else:
try:
u_boot_utils.run_and_log(c, 'dd if=/dev/zero of=%s bs=1M count=16'
% persistent)
-u_boot_utils.run_and_log(c, 'mkfs.ext4 -O ^metadata_csum %s' %
persistent)
+u_boot_utils.run_and_log(c, 'mkfs.ext4 %s' % persistent)
+sb_content = u_boot_utils.run_and_log(c, 'tune2fs -l %s' %
persistent)
+if 'metadata_csum' in sb_content:
+u_boot_utils.run_and_log(c, 'tune2fs -O ^metadata_csum %s' %
persistent)
except CalledProcessError:
call('rm -f %s' % persistent, shell=True)
raise
diff --git a/test/py/tests/test_fs/conftest.py
b/test/py/tests/test_fs/conftest.py
index ee82169c2a37..58e8cd46ee2c 100644
--- a/test/py/tests/test_fs/conftest.py
+++ b/test/py/tests/test_fs/conftest.py
@@ -149,8 +149,6 @@ def mk_fs(config, fs_type, size, id):
mkfs_opt = '-F 16'
elif fs_type == 'fat32':
mkfs_opt = '-F 32'
-elif fs_type == 'ext4':
-mkfs_opt = '-O ^metadata_csum'
else:
mkfs_opt = ''
@@ -167,6 +165,10 @@ def mk_fs(config, fs_type, size, id):
% (fs_img, count), shell=True)
check_call('mkfs.%s %s %s'
% (fs_lnxtype, mkfs_opt, fs_img), shell=True)
+if fs_type == 'ext4':
+sb_content = check_output('tune2fs -l %s' % fs_img,
shell=True).decode()
+if 'metadata_csum' in sb_content:
+check_call('tune2fs -O ^metadata_csum %s' % fs_img, shell=True)
return fs_img
except CalledProcessError:
call('rm -f %s' % fs_img, shell=True)
--
2.27.0
RE: [PATCH v1] test/py: Add test support for three stage boot
Hi,
Any comments on this patch? Can this patch be merged in?
Thanks and Regards,
Yan
-Original Message-
From: Liu, Yan
Sent: Tuesday, July 21, 2020 11:12 AM
To: u-boot@lists.denx.de
Cc: tr...@konsulko.com; Liu, Yan
Subject: [PATCH v1] test/py: Add test support for three stage boot
From: Yan Liu
Current pytest only support upto 2 stage boot;
Some boards like TI K3 am6/J7 boards use 3 stage
boot. This patch adds u_boot_spl2 to be able to
handle the 3-stage boot case. User needs to set
"env__spl2_skipped" in u_boot_boardenv config
file to use this support. By default it is set
to TRUE.
Signed-off-by: Yan Liu
---
test/py/u_boot_console_base.py | 10 ++
1 file changed, 10 insertions(+)
diff --git a/test/py/u_boot_console_base.py b/test/py/u_boot_console_base.py
index 326b2ac..1db5da4 100644
--- a/test/py/u_boot_console_base.py
+++ b/test/py/u_boot_console_base.py
@@ -17,6 +17,7 @@ import u_boot_spawn
# Regexes for text we expect U-Boot to send to the console.
pattern_u_boot_spl_signon = re.compile('(U-Boot SPL
\\d{4}\\.\\d{2}[^\r\n]*\\))')
+pattern_u_boot_spl2_signon = re.compile('(U-Boot SPL
\\d{4}\\.\\d{2}[^\r\n]*\\))')
pattern_u_boot_main_signon = re.compile('(U-Boot \\d{4}\\.\\d{2}[^\r\n]*\\))')
pattern_stop_autoboot_prompt = re.compile('Hit any key to stop autoboot: ')
pattern_unknown_command = re.compile('Unknown command \'.*\' - try \'help\'')
@@ -28,6 +29,7 @@ PAT_RE = 1
bad_pattern_defs = (
('spl_signon', pattern_u_boot_spl_signon),
+('spl2_signon', pattern_u_boot_spl2_signon),
('main_signon', pattern_u_boot_main_signon),
('stop_autoboot_prompt', pattern_stop_autoboot_prompt),
('unknown_command', pattern_unknown_command),
@@ -353,12 +355,20 @@ class ConsoleBase(object):
'n') == 'y'
env_spl_skipped = self.config.env.get('env__spl_skipped',
False)
+env_spl2_skipped = self.config.env.get('env__spl2_skipped',
+ True)
if config_spl and config_spl_serial_support and not
env_spl_skipped:
m = self.p.expect([pattern_u_boot_spl_signon] +
self.bad_patterns)
if m != 0:
raise Exception('Bad pattern found on SPL console: ' +
self.bad_pattern_ids[m - 1])
+if not env_spl2_skipped:
+m = self.p.expect([pattern_u_boot_spl2_signon] +
+ self.bad_patterns)
+if m != 0:
+raise Exception('Bad pattern found on SPL2 console: ' +
+self.bad_pattern_ids[m - 1])
m = self.p.expect([pattern_u_boot_main_signon] + self.bad_patterns)
if m != 0:
raise Exception('Bad pattern found on console: ' +
--
2.7.4
Re: [PATCH 01/22] clk: check hw and hw->dev before dereference it
Hi Claudiu, On Tue, 4 Aug 2020 at 09:25, wrote: > > Hi Simon, > > On 04.08.2020 18:08, Simon Glass wrote: > > EXTERNAL EMAIL: Do not click links or open attachments unless you know the > > content is safe > > > > Hi Claudiu, > > > > On Tue, 4 Aug 2020 at 01:19, wrote: > >> > >> > >> > >> On 04.08.2020 05:00, Simon Glass wrote: > >>> EXTERNAL EMAIL: Do not click links or open attachments unless you know > >>> the content is safe > >>> > >>> Hi Claudiu, > >>> > >>> On Wed, 29 Jul 2020 at 08:51, Claudiu Beznea > >>> wrote: > > Check hw and hw->dev before dereference it. > > Signed-off-by: Claudiu Beznea > --- > drivers/clk/clk.c | 3 +++ > 1 file changed, 3 insertions(+) > > >>> > >>> Why is this needed? It adds to code size and these situations should > >>> not occur. Perhaps use assert()? > >> > >> In my debugging, investigating the issues that patches 03/22, 04/22, 06/22 > >> try to address, I reached also this function and checked these pointers. In > >> the end the issue was not related to them but I though it might be useful > >> to keep these in a patch. I will remove it in the next version. > > > > IMO we should use assert() to check invariants and catch basic > > programming errors. But production testing should make sure that the > > software basically works. > > > > Of course it is nice to have these checks, but they add to code size > > which is always a concern. So I think we should rely on assert() to > > catch the errors during development, so we are not wasting code > > checking for things that we know cannot happen. > > OK, I'll switch to assert(). One more point I should have made is that my comments apply mostly to common code that everyone has to use - e.g. the core clock code. So if you want to put dev_err() and other things in your driver and you know about the code-size implications that is less of a concern. But with common code, we should be careful. Regards, Simon
Re: PowerPC progress
Hi Priyanka, On Tue, 4 Aug 2020 at 05:20, Priyanka Jain wrote: > > >-Original Message- > >From: Dan Malek > >Sent: Tuesday, August 4, 2020 4:32 AM > >To: Simon Glass > >Cc: Tom Rini ; U-Boot Mailing List >b...@lists.denx.de>; Wolfgang Denk ; > >christophe.le...@csgroup.eu; Mario Six ; Priyanka Jain > > > >Subject: Re: PowerPC progress > > > > > >Hi Simon. > > > >> On Aug 3, 2020, at 11:01 AM, Simon Glass wrote: > >> > >> > >> Hi Tom, > >> > >> On Fri, 31 Jul 2020 at 12:54, Tom Rini wrote: > >>> > >>> On Fri, Jul 31, 2020 at 12:43:59PM -0600, Simon Glass wrote: > >>> > Hi Tom, > > I do see some progress with PowerPC migration but it seems to be > very behind. I notice that it is often PowerPC code that gets in the > way or refactoring and cleaning up. > > Could we get a progress update on this please? I cc'd the > maintainers that are mentioned in the code. I do worry at the effort > it is taking to keep all this old code in the tree. > >>> > >>> Which particular area are you worried about currently? I believe > >>> we've had another good sized removal of PowerPC platforms and > >>> everything that's left is what's wanted and being further migrated and > >updated. > >> > >> It's hard to be specific, but these come to mind: > >> > >> - Loads of CONFIG options still not in Kconfig > >> - asm/u-boot seems to include a huge array of headers > >> - code style not up-to-date - e.g. printf (xxx) instead of printf(xxx) > >> - lots of migration warnings > > > >I still have a few old boards, I’ll see what is still functional and jump in > >to > >assist. > >If we want to revive 82xx, as Wolfgang mentioned, I can probably do that as > >well. > > > >The list above is helpful to get started. > > > >Thanks. > > > > — Dan > > I am working on NXP powerpc platforms > We are working on a list (P1010, P1020, P2020, P2041, P3041, P4080, P5040, > T1024, T1042, T2080, T4240, MPC8548CDS) for which we are ensuring DM > migration and will remove the support of other platform which NXP no longer > intend to maintain. > Please expect the series of those patches by this month end. OK thank you, that is encouraging. Regards, Simon
Re: [PATCH v2 18/18] configs: j7200_evm_a72: Add Initial support
On 27/07/20 3:15 pm, Lokesh Vutla wrote: Add initial A72 defconfig support. Signed-off-by: Lokesh Vutla --- configs/j7200_evm_a72_defconfig | 172 1 file changed, 172 insertions(+) create mode 100644 configs/j7200_evm_a72_defconfig diff --git a/configs/j7200_evm_a72_defconfig b/configs/j7200_evm_a72_defconfig new file mode 100644 index 00..14c30a8f28 --- /dev/null +++ b/configs/j7200_evm_a72_defconfig [...] +CONFIG_USB_CDNS3=y +CONFIG_USB_CDNS3_GADGET=y +CONFIG_USB_CDNS3_HOST=y +CONFIG_SPL_USB_CDNS3_GADGET=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments" +CONFIG_USB_GADGET_VENDOR_NUM=0x0451 +CONFIG_USB_GADGET_PRODUCT_NUM=0x6163 This is for J721e. Could you change this to: CONFIG_USB_GADGET_PRODUCT_NUM=0x6164 for J7200? Applies to r5 defconfig too.. Regards Vignesh
Re: [PATCH 01/22] clk: check hw and hw->dev before dereference it
Hi Claudiu, On Tue, 4 Aug 2020 at 01:19, wrote: > > > > On 04.08.2020 05:00, Simon Glass wrote: > > EXTERNAL EMAIL: Do not click links or open attachments unless you know the > > content is safe > > > > Hi Claudiu, > > > > On Wed, 29 Jul 2020 at 08:51, Claudiu Beznea > > wrote: > >> > >> Check hw and hw->dev before dereference it. > >> > >> Signed-off-by: Claudiu Beznea > >> --- > >> drivers/clk/clk.c | 3 +++ > >> 1 file changed, 3 insertions(+) > >> > > > > Why is this needed? It adds to code size and these situations should > > not occur. Perhaps use assert()? > > In my debugging, investigating the issues that patches 03/22, 04/22, 06/22 > try to address, I reached also this function and checked these pointers. In > the end the issue was not related to them but I though it might be useful > to keep these in a patch. I will remove it in the next version. IMO we should use assert() to check invariants and catch basic programming errors. But production testing should make sure that the software basically works. Of course it is nice to have these checks, but they add to code size which is always a concern. So I think we should rely on assert() to catch the errors during development, so we are not wasting code checking for things that we know cannot happen. Regards, Simon
Re: [PATCH 31/31] checkpatch: Don't allow common.h and dm.h in headers
On Sun, Jul 19, 2020 at 10:16:01AM -0600, Simon Glass wrote: > These headers should not be included in other header files. Add a > checkpatch rule and test for this. > > Signed-off-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 30/31] patman: Fix up the test comments
On Sun, Jul 19, 2020 at 10:16:00AM -0600, Simon Glass wrote: > Many of the tests have the same comment and two have the same name. Fix > this. > > Signed-off-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 26/31] clk: Drop dm.h header file in clk-provider.h
On Sun, Jul 19, 2020 at 10:15:56AM -0600, Simon Glass wrote: > This header file should not be included in other header files. Remove it > and use a forward declaration and un-inlining of dev_get_clk_ptr() > instead. > > Fix up the kendryte header files to avoid build errors. > > Signed-off-by: Simon Glass > Reviewed-by: Sean Anderson Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 28/31] net: Drop duplicate include of dm.h in pcnet.c
On Sun, Jul 19, 2020 at 10:15:58AM -0600, Simon Glass wrote: > This file includes the header twice. Drop the second one. > > Signed-off-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 27/31] net: Drop dm.h header file in eth_phy.h
On Sun, Jul 19, 2020 at 10:15:57AM -0600, Simon Glass wrote: > This header file should not be included in other header files. Remove it > and use a forward declaration instead. > > Signed-off-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 29/31] dm: core: Guard against including dm.h in header files
On Sun, Jul 19, 2020 at 10:15:59AM -0600, Simon Glass wrote: > Header files generally should not include header files just for a struct, > since forward declarations work just as well and reduce overhead. > > Add a warning for dm.h being included, since this has crept into U-Boot. > > Signed-off-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 24/31] ufs: Drop dm.h header file
On Sun, Jul 19, 2020 at 10:15:54AM -0600, Simon Glass wrote: > This header file should not be included in other header files. Remove it > and use a forward declaration instead. > > Also drop asm/io.h > > Signed-off-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 23/31] nand: Drop dm.h header file
On Sun, Jul 19, 2020 at 10:15:53AM -0600, Simon Glass wrote: > This header file should not be included in other header files. Remove it > and use a forward declaration instead. > > Signed-off-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 25/31] usb: Drop dm.h header file
On Sun, Jul 19, 2020 at 10:15:55AM -0600, Simon Glass wrote: > This header file should not be included in other header files. Remove it > and use a forward declaration instead. > > Also move the inline function out into a C file. We should not include C > code in headers. > > Signed-off-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH v1 06/24] pci: pci-uclass: Add multi entry support for memory regions
Hi Stefan, On Tue, 4 Aug 2020 at 08:03, Stefan Roese wrote: > > Hi Simon, > > On 31.07.20 20:44, Simon Glass wrote: > > Hi Stefan, > > > > On Thu, 30 Jul 2020 at 09:35, Stefan Roese wrote: > >> > >> Hi Simon, > >> > >> On 28.07.20 21:01, Simon Glass wrote: > >>> Hi Stefan, > >>> > >>> On Fri, 24 Jul 2020 at 04:09, Stefan Roese wrote: > > From: Suneel Garapati > > Enable PCI memory regions in ranges property to be of multiple entry. > This helps to add support for SoC's like OcteonTX/TX2 where every > peripheral is on PCI bus. > > Signed-off-by: Suneel Garapati > Cc: Simon Glass > Cc: Bin Meng > > Signed-off-by: Stefan Roese > --- > > Changes in v1: > - Change patch subject > - Enhance Kconfig help descrition > - Use if() instead of #if > > drivers/pci/Kconfig | 10 ++ > drivers/pci/pci-uclass.c | 9 ++--- > 2 files changed, 16 insertions(+), 3 deletions(-) > >>> > >>> This needs an update to a sandbox test to handle this behaviour. > >> > >> Okay. But how should I handle all these defconfig changes with regard > >> to the other patches in this series, introducing multiple new PCI > >> related Kconfig options. With 3 new Kconfig options, all permutations > >> would lead to 8 (2 ^ 3) different defconfig files. This does not > >> scale. > >> > >> I might be missing something here though - perhaps this is easier to > >> achieve. > > > > For sandbox, turn on all options and then add a new PCI bus that uses > > this functionality. If there are lots of combinations you could add 8 > > new buses, but I'm hoping that isn't necessary? > > If I turn on all new options, sandbox will run with these new options > enabled. I don't know with with implications, as it usually runs with > the "normal" PCI related Kconfig options. Also the "normal" PCI > defconfig (e.g. CONFIG_PCI_REGION_MULTI_ENTRY etc disabled) will not > be tested any more via the sandbox tests. So you get either a test for > the new Kconfig option enabled or disabled this way. > > Do you really want me to do this? So the Kconfig completely changes the implementation of PCI? That doesn't make it very testable, as you say. Instead, I think the Kconfig should enable the option, then use one of three ways to select the option: - a device tree property (on sandbox particularly) - compatible string (where the property is not appropriate - setting a flag in PCI bus (where a driver requires the option be selected) That way you can write a test for the new feature in sandbox, without deleting all the other tests. Regards, SImon
Re: [PATCH 21/31] mscc: Drop dm.h header file
On Sun, Jul 19, 2020 at 10:15:51AM -0600, Simon Glass wrote: > This header file should not be included in other header files. Remove it > from each one and use a forward declaration instead. > > Signed-off-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 22/31] adc: Drop dm.h header file
On Sun, Jul 19, 2020 at 10:15:52AM -0600, Simon Glass wrote: > This header file should not be included in other header files. Remove it > and use a forward declaration instead. > > Drop the common.h inclusion also. > > Signed-off-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 20/31] mediatek: Drop dm.h header file
On Sun, Jul 19, 2020 at 10:15:50AM -0600, Simon Glass wrote: > This header file should not be included in other header files. Remove it > and use a forward declaration instead. > > Signed-off-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 16/31] spi: Drop duplicate dm.h inclusion
On Sun, Jul 19, 2020 at 10:15:46AM -0600, Simon Glass wrote: > We only need to include this header once. Drop the duplicate. > > Signed-off-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 19/31] pci: Drop dm.h inclusion from header file
On Sun, Jul 19, 2020 at 10:15:49AM -0600, Simon Glass wrote: > The layerscape header should not include dm.h so remove it. > > Signed-off-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 17/31] ti: am654: Drop duplicate dm.h inclusion
On Sun, Jul 19, 2020 at 10:15:47AM -0600, Simon Glass wrote: > We only need to include this header once. Drop the duplicate. > > Signed-off-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 18/31] liebherr: Drop duplicate dm.h inclusion
On Sun, Jul 19, 2020 at 10:15:48AM -0600, Simon Glass wrote: > We only need to include this header once. Drop the duplicate. > > Signed-off-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 15/31] mmc: Drop duplicate dm.h inclusion
On Sun, Jul 19, 2020 at 10:15:45AM -0600, Simon Glass wrote: > We only need to include this header once. Drop the duplicate. > > Signed-off-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 14/31] power: Tidy up inclusion of regulator_common.h
On Sun, Jul 19, 2020 at 10:15:44AM -0600, Simon Glass wrote: > This file should not include common.h and dm.h so remove them. Also move > the inclusion of this file to after the normal includes. > > Signed-off-by: Simon Glass > Reviewed-by: Jaehoon Chung Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 13/31] efi: Tidy up header includes
On Sun, Jul 19, 2020 at 10:15:43AM -0600, Simon Glass wrote: > Two files relies on efi_driver.h to include common.h and dm.h which is > incorrect. The former should always be included in a non-host C file and > the latter should be included if driver model is used. > > Signed-off-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 12/31] w1: Drop dm.h header file
On Sun, Jul 19, 2020 at 10:15:42AM -0600, Simon Glass wrote: > This header file should not be included in other header files. Remove it > and use a forward declaration instead. > > Signed-off-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 11/31] thermal: Drop dm.h header file
On Sun, Jul 19, 2020 at 10:15:41AM -0600, Simon Glass wrote: > This header file should not be included in other header files. Remove it > and use a forward declaration instead. > > Signed-off-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 09/31] net: Drop dm.h header file from phy.h
On Sun, Jul 19, 2020 at 10:15:39AM -0600, Simon Glass wrote: > This header file should not be included in other header files. Remove it > and use other headers and C inclusions instead. > > Signed-off-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 10/31] sf: Drop dm.h header file from spi_flash.h
On Sun, Jul 19, 2020 at 10:15:40AM -0600, Simon Glass wrote: > This header file should not be included in other header files. Remove it > and use a forward declaration instead. > > Signed-off-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 08/31] fs: fs-loader: Drop dm.h header file
On Sun, Jul 19, 2020 at 10:15:38AM -0600, Simon Glass wrote: > This header file should not be included in other header files. Remove it > and use a forward declaration instead. > > Signed-off-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 07/31] dm: core: Drop header files from dm/test.h
On Sun, Jul 19, 2020 at 10:15:37AM -0600, Simon Glass wrote: > These header file should not be included in other header files. Remove > them and add to each individual file. Add test/test.h to test/ui.h since > that is a reasonable place. > > Signed-off-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 05/31] mtd: spi: Drop SPI_XFER_MMAP*
On Sun, Jul 19, 2020 at 10:15:35AM -0600, Simon Glass wrote: > These two defines are no-longer supported. Drop them. > > Signed-off-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 06/31] dm: core: Drop dm.h header file from dm-demo.h
On Sun, Jul 19, 2020 at 10:15:36AM -0600, Simon Glass wrote: > This header file should not be included in other header files. Remove it > and add it to the cmd file instead. > > Signed-off-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 04/31] mtd: spi-mem: Drop dm.h header file
On Sun, Jul 19, 2020 at 10:15:34AM -0600, Simon Glass wrote: > This header file should not be included in other header files. Remove it > and use a forward declaration instead. > > Signed-off-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 03/31] wdt: Drop dm.h header file
On Sun, Jul 19, 2020 at 10:15:33AM -0600, Simon Glass wrote:
> This header file should not be included in other header files. Remove it
> and use a forward declaration instead.
>
> Also remove the other headers that are not needed, since the inline code
> was removed in a recent commit:
>
>b4d9452c4 ("watchdog: move initr_watchdog() to wdt-uclass.c")
>
> Signed-off-by: Simon Glass
Applied to u-boot/master, thanks!
--
Tom
signature.asc
Description: PGP signature
Re: [PATCH 02/31] mtd: spi-nor: Tidy up error handling / debug code
On Sun, Jul 19, 2020 at 10:15:32AM -0600, Simon Glass wrote: > The -ENODEV error value in spi_nor_read_id() is incorrect since there > clearly is a device - it just cannot be supported. Use -ENOMEDIUM instead > which has the virtue of being less common. > > Fix the return value in spi_nor_scan(). > > Also there are a few printf() statements which should be debug() since > they bloat the code with unused strings at present. Fix those while here. > > Signed-off-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 01/31] spi: Allow separate control of SPI_FLASH_TINY for SPL/TPL
On Sun, Jul 19, 2020 at 10:15:31AM -0600, Simon Glass wrote: > In some cases SPL needs to be able to erase but TPL just needs to read. > Allow these to have separate settings for SPI_FLASH_TINY. > > Signed-off-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 1/1] riscv: fix building with CONFIG_SPL_SMP=n
On 04.08.20 15:15, Bin Meng wrote:
> On Tue, Aug 4, 2020 at 7:02 PM Heinrich Schuchardt wrote:
>>
>> On 04.08.20 03:46, Bin Meng wrote:
>>> On Tue, Aug 4, 2020 at 5:26 AM Heinrich Schuchardt
>>> wrote:
Building with CONFIG_SPL_SMP=n results in:
arch/riscv/lib/spl.c: In function ‘jump_to_image_no_args’:
arch/riscv/lib/spl.c:33:6:
error: unused variable ‘ret’ [-Werror=unused-variable]
33 | int ret;
| ^~~
Define the variable ret as __maybe_unused.
Fixes: 191636e44898 ("riscv: Introduce SPL_SMP Kconfig option for U-Boot
SPL")
>>>
>>> This should be on the same line
>>
>> Commit messages should not exceed 75 characters. See scripts/checkpatch.pl:
>
> True, for normal commit messages.
>
>>
>> WARN("COMMIT_LOG_LONG_LINE",
>> "Possible unwrapped commit description (prefer a maximum 75 chars per
>> line)\n" . $herecurr);
>>
>
> But this Fixes tag is special. I suspect 2 lines will break some
> scripts that is handling this "Fixes" tag.
checkpatch.pl and patchstream.py are the only U-Boot scripts containing
the string "Fixes".
* checkpatch.pl does not complain.
* I don't use patman. So I don't care if it has a bug.
We already have patches like this by other developers and nobody complained:
dcdea292d9f3
4fb2264b2848
00160cf32e6e
So why should I worry?
Best regards
Heinrich
>
> Regards,
> Bin
>
crash with CONFIG_OF_LIVE
Hi, i need of_find_property function so i added CONFIG_OF_LIVE. with this my uboot crash on bpi-r64 (own 32bit-config) before calling anything in my driver (is an ahci-driver which is triggered by "scsi scan"). so only the inclusion of CONFIG_OF_LIVE. do i miss anything or have anyone else this issue? Just for reference my current tree https://github.com/frank-w/u-boot/commits/2020-07-bpi-r64-pciev2 regards Frank
RE: master u-boot broken for HiFive Unleashed
Hi Atish,
>-Original Message-
>From: U-Boot On Behalf Of Pragnesh Patel
>Sent: 04 August 2020 19:55
>To: Atish Patra ; Bin Meng ;
>Rick Chen
>Cc: Anup Patel ; Lukas Auer
>; U-Boot Mailing List
>Subject: RE: master u-boot broken for HiFive Unleashed
>
>Hi Atish,
>
>I tried to debug this and find something interesting.
>
>With FSBL,
>I am able to reproduce the same and found that if I will disable
>CONFIG_OF_BOARD_FIXUP and then print the bdinfo shows expected result.
>
>=> bdinfo
>boot_params = 0x
>DRAM bank = 0x
>-> start= 0x8000
>-> size = 0x0002
>memstart= 0x
>memsize = 0x
>flashstart = 0x
>flashsize = 0x
>flashoffset = 0x
>baudrate= 115200 bps
>relocaddr = 0xfff83000
>reloc off = 0x7fd83000
>Build = 64-bit
>current eth = ethernet@1009
>ethaddr = (not set)
>IP addr =
>fdt_blob= 0xff75e680
>new_fdt = 0xff75e680
>fdt_size= 0x47a0
>=>
>
>With CONFIG_OF_BOARD_FIXUP, following functions gets called
>fix_fdt() ("common/board_f.c") -> board_fix_fdt()
>("arch/riscv/lib/fdt_fixup.c")
>and in this we will increase the fdt_blob size for PMP regions
>
>/*
> * Extend the FDT by the following estimated size:
> *
> * Each PMP memory region entry occupies 64 bytes.
> * With 16 PMP memory regions we need 64 * 16 = 1024 bytes.
> */
>err = fdt_open_into(dst, dst, fdt_totalsize(dst) + 1024);
>
>I suspect this will overwrite the global data (gd) and that creates the
>problem.
>
>
>Surprisingly With U-Boot SPL,
>Latest U-Boot master branch works fine and shows expected results.
With U-Boot SPL it works because in riscv_board_reserved_mem_fixup()
("arch/riscv/lib/fdt_fixup.c")
riscv_board_reserved_mem_fixup() {
/* avoid the copy if we are using the same device tree */
if (src_fdt_addr == fdt)
return 0;
riscv_fdt_copy_resv_mem_node();
}
OpenSBI and U-Boot both are using the same device tree (U-Boot SPL sends U-Boot
device tree address in a1 register to OpenSBI), so
riscv_fdt_copy_resv_mem_node() never gets called.
With FSBL, OpenSBI and U-Boot uses different device tree so
riscv_board_reserved_mem_fixup() ("arch/riscv/lib/fdt_fixup.c"), so
riscv_fdt_copy_resv_mem_node() getting called and tried to increase the
fdt_blob size which will overwrite the global data (gd).
>
>>-Original Message-
>>From: Atish Patra
>>Sent: 30 July 2020 03:13
>>To: U-Boot Mailing List ; Bin Meng
>>; Rick Chen
>>Cc: Anup Patel ; Lukas Auer
>>; Pragnesh Patel
>>
>>Subject: master u-boot broken for HiFive Unleashed
>>
>>[External Email] Do not click links or attachments unless you recognize
>>the sender and know the content is safe
>>
>>Hi,
>>The latest master (423e08cb7701 (origin/master, origin/HEAD) Merge
>>branch
>>'2020-07-28-misc-soc-improvements') seems to be broken for HiFive
>Unleashed.
>>
>>It already has Bin's fix for unleashed.
>>
>>a0018fc8209c riscv: Make SiFive HiFive Unleashed board boot again
>>
>>dram start and size is corrupted for some reason. I have verified that
>>it was initialized properly during DT parsing. However, it shows random
>>values in the U- Boot console.
>>
>>=> bdinfo
>>boot_params = 0x
>>memstart= 0x
>>memsize = 0x
>>flashstart = 0x
>>flashsize = 0x
>>flashoffset = 0x
>>baudrate= 115200 bps
>>relocaddr = 0xfff84000
>>reloc off = 0x7fd84000
>>Build = 64-bit
>>
>>=> bdinfo
>>boot_params = 0x9a26a361c16aa601
>>DRAM bank = 0x
>>-> start= 0x974515c3bda965ef
>>-> size = 0x79b6f0fb37923036
>>memstart= 0x574587c7f00570f9
>>memsize = 0xCFD8C0F4D42668AB
>>flashstart = 0x67f9fbb06586658b
>>flashsize = 0xf91aed913c99b9e1
>>flashoffset = 0x9ddbf00d69e870fa
>>baudrate= 115200 bps
>>
>>v2020.07 seems to work fine. I couldn't bisect between those two as the
>>number of commits didn't compile.
>>
>>--
>>Regards,
>>Atish
RE: master u-boot broken for HiFive Unleashed
Hi Atish,
I tried to debug this and find something interesting.
With FSBL,
I am able to reproduce the same and found that if I will disable
CONFIG_OF_BOARD_FIXUP and then print the bdinfo shows expected result.
=> bdinfo
boot_params = 0x
DRAM bank = 0x
-> start= 0x8000
-> size = 0x0002
memstart= 0x
memsize = 0x
flashstart = 0x
flashsize = 0x
flashoffset = 0x
baudrate= 115200 bps
relocaddr = 0xfff83000
reloc off = 0x7fd83000
Build = 64-bit
current eth = ethernet@1009
ethaddr = (not set)
IP addr =
fdt_blob= 0xff75e680
new_fdt = 0xff75e680
fdt_size= 0x47a0
=>
With CONFIG_OF_BOARD_FIXUP, following functions gets called
fix_fdt() ("common/board_f.c") -> board_fix_fdt()
("arch/riscv/lib/fdt_fixup.c") and in this we will increase the fdt_blob size
for PMP regions
/*
* Extend the FDT by the following estimated size:
*
* Each PMP memory region entry occupies 64 bytes.
* With 16 PMP memory regions we need 64 * 16 = 1024 bytes.
*/
err = fdt_open_into(dst, dst, fdt_totalsize(dst) + 1024);
I suspect this will overwrite the global data (gd) and that creates the problem.
Surprisingly With U-Boot SPL,
Latest U-Boot master branch works fine and shows expected results.
>-Original Message-
>From: Atish Patra
>Sent: 30 July 2020 03:13
>To: U-Boot Mailing List ; Bin Meng
>; Rick Chen
>Cc: Anup Patel ; Lukas Auer
>; Pragnesh Patel
>Subject: master u-boot broken for HiFive Unleashed
>
>[External Email] Do not click links or attachments unless you recognize the
>sender and know the content is safe
>
>Hi,
>The latest master (423e08cb7701 (origin/master, origin/HEAD) Merge branch
>'2020-07-28-misc-soc-improvements') seems to be broken for HiFive Unleashed.
>
>It already has Bin's fix for unleashed.
>
>a0018fc8209c riscv: Make SiFive HiFive Unleashed board boot again
>
>dram start and size is corrupted for some reason. I have verified that it was
>initialized properly during DT parsing. However, it shows random values in the
>U-
>Boot console.
>
>=> bdinfo
>boot_params = 0x
>memstart= 0x
>memsize = 0x
>flashstart = 0x
>flashsize = 0x
>flashoffset = 0x
>baudrate= 115200 bps
>relocaddr = 0xfff84000
>reloc off = 0x7fd84000
>Build = 64-bit
>
>=> bdinfo
>boot_params = 0x9a26a361c16aa601
>DRAM bank = 0x
>-> start= 0x974515c3bda965ef
>-> size = 0x79b6f0fb37923036
>memstart= 0x574587c7f00570f9
>memsize = 0xCFD8C0F4D42668AB
>flashstart = 0x67f9fbb06586658b
>flashsize = 0xf91aed913c99b9e1
>flashoffset = 0x9ddbf00d69e870fa
>baudrate= 115200 bps
>
>v2020.07 seems to work fine. I couldn't bisect between those two as the number
>of commits didn't compile.
>
>--
>Regards,
>Atish
Re: [PATCH v2 15/18] arm: dts: k3-j7200: Add dts support
Hi Lokesh,
On 27/07/20 3:15 pm, Lokesh Vutla wrote:
> Add the basic a72 dts for j7200. Following nodes were supported:
> - UART
> - MMC SD
> - I2C
> - TISCI communication
>
> Signed-off-by: Lokesh Vutla
> Signed-off-by: Vignesh Raghavendra
> Signed-off-by: Vishal Mahaveer
> Signed-off-by: Faiz Abbas
> ---
> arch/arm/dts/Makefile | 3 +-
> .../k3-j7200-common-proc-board-u-boot.dtsi| 92 +
> arch/arm/dts/k3-j7200-common-proc-board.dts | 94 ++
> arch/arm/dts/k3-j7200-main.dtsi | 313 ++
> arch/arm/dts/k3-j7200-mcu-wakeup.dtsi | 117 +++
> arch/arm/dts/k3-j7200-som-p0.dtsi | 29 ++
> arch/arm/dts/k3-j7200.dtsi| 175 ++
> 7 files changed, 822 insertions(+), 1 deletion(-)
> create mode 100644 arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi
> create mode 100644 arch/arm/dts/k3-j7200-common-proc-board.dts
> create mode 100644 arch/arm/dts/k3-j7200-main.dtsi
> create mode 100644 arch/arm/dts/k3-j7200-mcu-wakeup.dtsi
> create mode 100644 arch/arm/dts/k3-j7200-som-p0.dtsi
> create mode 100644 arch/arm/dts/k3-j7200.dtsi
>
This patch is missing IO expander nodes that are used by MMC/SD (same is
present in 16/18)
Could you squash the below diff into this patch while merging/reposting?
--><8--
diff --git a/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi
b/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi
index 593417565e..10bb069492 100644
--- a/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi
@@ -90,3 +90,15 @@
_i2c0 {
u-boot,dm-spl;
};
+
+_i2c0 {
+ u-boot,dm-spl;
+};
+
+_i2c0_pins_default {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
diff --git a/arch/arm/dts/k3-j7200-common-proc-board.dts
b/arch/arm/dts/k3-j7200-common-proc-board.dts
index 3f33fb5650..537ef2a79d 100644
--- a/arch/arm/dts/k3-j7200-common-proc-board.dts
+++ b/arch/arm/dts/k3-j7200-common-proc-board.dts
@@ -23,6 +23,15 @@
};
};
+_pmx0 {
+ main_i2c0_pins_default: main-i2c0-pins-default {
+ pinctrl-single,pins = <
+ J721E_IOPAD(0xd4, PIN_INPUT_PULLUP, 0) /* (V3) I2C0_SCL
*/
+ J721E_IOPAD(0xd8, PIN_INPUT_PULLUP, 0) /* (W2) I2C0_SDA
*/
+ >;
+ };
+};
+
_uart0 {
/* Wakeup UART is used by System firmware */
status = "disabled";
@@ -92,3 +101,23 @@
no-1-8-v;
sdhci-caps-mask = <0x800F 0x0>;
};
+
+_i2c0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <_i2c0_pins_default>;
+ clock-frequency = <40>;
+
+ exp1: gpio@20 {
+ compatible = "ti,tca6416";
+ reg = <0x20>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ exp2: gpio@22 {
+ compatible = "ti,tca6424";
+ reg = <0x22>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+};
[...]
Re: [PATCH 4/6] stdio: Update to use compiler for Kconfig checks
Hi Tom,
I can't see anything other than my patches at that link. But it looks
like I didn't send it, sadly. I'll resend that patch.
Regards,
SImon
On Tue, 4 Aug 2020 at 07:46, Tom Rini wrote:
>
> On Tue, Aug 04, 2020 at 07:37:02AM -0600, Simon Glass wrote:
> > Hi Tom,
> >
> > On Mon, 3 Aug 2020 at 20:18, Tom Rini wrote:
> > >
> > > On Mon, Aug 03, 2020 at 06:57:05PM -0400, Tom Rini wrote:
> > > > On Fri, Jul 17, 2020 at 09:03:17PM -0600, Simon Glass wrote:
> > > >
> > > > > Drop use of the preprocessor where possible.
> > > > >
> > > > > Signed-off-by: Simon Glass
> > > > [snip]
> > > > > + if (IS_ENABLED(CONFIG_DM_VIDEO)) {
> > > > > + /*
> > > > > +* If the console setting is not in environment variables
> > > > > then
> > > > > +* console_init_r() will not be calling iomux_doenv()
> > > > > (which
> > > > > +* calls search_device()). So we will not dynamically add
> > > > > +* devices by calling stdio_probe_device().
> > > > > +*
> > > > > +* So just probe all video devices now so that whichever
> > > > > one is
> > > > > +* required will be available.
> > > > > +*/
> > > > > + struct udevice *vdev;
> > > > > + int ret;
> > > > > +
> > > > > + if (!IS_ENABLED(CONFIG_SYS_CONSOLE_IS_IN_ENV)) {
> > > > > + for (ret = uclass_first_device(UCLASS_VIDEO,
> > > > > );
> > > > > +vdev;
> > > > > +ret = uclass_next_device())
> > > > > + ;
> > > > > + if (ret)
> > > > > + printf("%s: Video device failed
> > > > > (ret=%d)\n",
> > > > > + __func__, ret);
> > > > > + }
> > > > > + if (IS_ENABLED(CONFIG_SPLASH_SCREEN) &&
> > > > > + IS_ENABLED(CONFIG_CMD_BMP))
> > > > > + splash_display();
> > > >
> > > > We can't do this yet because CONFIG_SPLASH_SCREEN isn't migrated so the
> > > > test fails and we drop the bmp logo. I got this run-time tested and
> > > > confirmed on colibri imx6 by my colleague Matt Porter. So I'm holding
> > > > off on _this_ patch (and then the style clean up patch) until I can push
> > > > SPLASH_SCREEN migration through.
> > >
> > > This is also an issue for "stdio: Tidy up use of
> > > CONFIG_SYS_DEVICE_NULLDEV" as well, so I'm going to put aside the whole
> > > series until I can convert SPLASH_SCREEN.
> >
> > OK, let me know if you'd like me to do something here. My patch 2 was
> > supposed to migrate CONFIG_SPLASH_SCREEN, etc. Did that not work?
>
> I don't see that patch:
> http://patchwork.ozlabs.org/user/todo/uboot/?series=190587
>
> --
> Tom
[RESEND PATCH 1/7] Convert CONFIG_SPLASH_SCREEN et al to Kconfig
This converts the following to Kconfig: CONFIG_SPLASH_SCREEN CONFIG_SPLASH_SCREEN_ALIGN CONFIG_SPLASHIMAGE_GUARD CONFIG_SPLASH_SOURCE Signed-off-by: Simon Glass --- README | 11 configs/apalis_imx6_defconfig | 5 +- configs/aristainetos2_defconfig | 2 + configs/aristainetos2b_defconfig| 2 + configs/aristainetos2bcsl_defconfig | 2 + configs/aristainetos2c_defconfig| 2 + configs/cgtqmx6eval_defconfig | 6 +- configs/cm_fx6_defconfig| 4 +- configs/colibri-imx6ull_defconfig | 4 +- configs/colibri_imx6_defconfig | 5 +- configs/colibri_imx7_defconfig | 4 +- configs/colibri_imx7_emmc_defconfig | 5 +- configs/colibri_vf_defconfig| 3 +- configs/dms-ba16-1g_defconfig | 11 +--- configs/dms-ba16_defconfig | 11 +--- configs/eb_cpu5282_defconfig| 3 +- configs/eb_cpu5282_internal_defconfig | 3 +- configs/gwventana_emmc_defconfig| 5 +- configs/gwventana_gw5904_defconfig | 5 +- configs/gwventana_nand_defconfig| 5 +- configs/imx6dl_icore_nand_defconfig | 4 +- configs/imx6q_icore_nand_defconfig | 4 +- configs/imx6qdl_icore_mmc_defconfig | 4 +- configs/imx6qdl_icore_nand_defconfig| 4 +- configs/imxrt1050-evk_defconfig | 4 +- configs/khadas-vim3_defconfig | 4 +- configs/khadas-vim3l_defconfig | 4 +- configs/libretech-ac_defconfig | 4 +- configs/libretech-cc_defconfig | 4 +- configs/libretech-s905d-pc_defconfig| 4 +- configs/libretech-s912-pc_defconfig | 4 +- configs/m53menlo_defconfig | 7 +- configs/marsboard_defconfig | 4 +- configs/mx23evk_defconfig | 1 + configs/mx28evk_auart_console_defconfig | 1 + configs/mx28evk_defconfig | 1 + configs/mx28evk_nand_defconfig | 1 + configs/mx28evk_spi_defconfig | 1 + configs/mx51evk_defconfig | 10 +-- configs/mx53loco_defconfig | 10 +-- configs/mx6cuboxi_defconfig | 8 ++- configs/mx6qsabrelite_defconfig | 4 +- configs/mx6sabreauto_defconfig | 4 +- configs/mx6sabresd_defconfig| 4 +- configs/mx6sxsabresd_defconfig | 4 +- configs/mx6ul_14x14_evk_defconfig | 4 +- configs/mx6ul_9x9_evk_defconfig | 4 +- configs/mx7dsabresd_defconfig | 4 +- configs/mx7dsabresd_qspi_defconfig | 4 +- configs/nitrogen6dl2g_defconfig | 4 +- configs/nitrogen6dl_defconfig | 4 +- configs/nitrogen6q2g_defconfig | 4 +- configs/nitrogen6q_defconfig| 4 +- configs/nitrogen6s1g_defconfig | 4 +- configs/nitrogen6s_defconfig| 4 +- configs/nokia_rx51_defconfig| 2 +- configs/novena_defconfig| 4 +- configs/odroid-c4_defconfig | 5 +- configs/opos6uldev_defconfig| 5 +- configs/pico-dwarf-imx6ul_defconfig | 4 +- configs/pico-dwarf-imx7d_defconfig | 4 +- configs/pico-hobbit-imx6ul_defconfig| 4 +- configs/pico-hobbit-imx7d_defconfig | 4 +- configs/pico-imx6_defconfig | 8 ++- configs/pico-imx6ul_defconfig | 4 +- configs/pico-imx7d_bl33_defconfig | 4 +- configs/pico-imx7d_defconfig| 4 +- configs/pico-nymph-imx7d_defconfig | 4 +- configs/pico-pi-imx6ul_defconfig| 4 +- configs/pico-pi-imx7d_defconfig | 4 +- configs/pxm2_defconfig | 4 +- configs/riotboard_defconfig | 4 +- configs/riotboard_spl_defconfig | 4 +- configs/rut_defconfig | 4 +- configs/sandbox64_defconfig | 4 +- configs/sandbox_defconfig | 7 +- configs/sandbox_flattree_defconfig | 4 +- configs/sandbox_spl_defconfig | 3 +- configs/sei510_defconfig| 4 +- configs/sei610_defconfig| 4 +- configs/stm32f746-disco_defconfig | 4 +- configs/stm32f769-disco_defconfig | 4 +- configs/tools-only_defconfig| 3 +- configs/wandboard_defconfig | 4 +- drivers/video/Kconfig | 85 + include/configs/M52277EVB.h | 1 - include/configs/advantech_dms-ba16.h| 2 - include/configs/apalis_imx6.h | 2 - include/configs/aristainetos2.h | 2 - include/configs/cgtqmx6eval.h | 2 - include/configs/cm_fx6.h| 2 - include/configs/colibri-imx6ull.h | 2 - include/configs/colibri_imx6.h | 2 - include/configs/colibri_imx7.h | 2 - include/configs/colibri_vf.h| 1 - include/configs/eb_cpu5282.h| 1 - include/configs/embestmx6boards.h | 2 - include/configs/gw_ventana.h| 1 -
Re: [PATCH v1 06/24] pci: pci-uclass: Add multi entry support for memory regions
Hi Simon, On 31.07.20 20:44, Simon Glass wrote: Hi Stefan, On Thu, 30 Jul 2020 at 09:35, Stefan Roese wrote: Hi Simon, On 28.07.20 21:01, Simon Glass wrote: Hi Stefan, On Fri, 24 Jul 2020 at 04:09, Stefan Roese wrote: From: Suneel Garapati Enable PCI memory regions in ranges property to be of multiple entry. This helps to add support for SoC's like OcteonTX/TX2 where every peripheral is on PCI bus. Signed-off-by: Suneel Garapati Cc: Simon Glass Cc: Bin Meng Signed-off-by: Stefan Roese --- Changes in v1: - Change patch subject - Enhance Kconfig help descrition - Use if() instead of #if drivers/pci/Kconfig | 10 ++ drivers/pci/pci-uclass.c | 9 ++--- 2 files changed, 16 insertions(+), 3 deletions(-) This needs an update to a sandbox test to handle this behaviour. Okay. But how should I handle all these defconfig changes with regard to the other patches in this series, introducing multiple new PCI related Kconfig options. With 3 new Kconfig options, all permutations would lead to 8 (2 ^ 3) different defconfig files. This does not scale. I might be missing something here though - perhaps this is easier to achieve. For sandbox, turn on all options and then add a new PCI bus that uses this functionality. If there are lots of combinations you could add 8 new buses, but I'm hoping that isn't necessary? If I turn on all new options, sandbox will run with these new options enabled. I don't know with with implications, as it usually runs with the "normal" PCI related Kconfig options. Also the "normal" PCI defconfig (e.g. CONFIG_PCI_REGION_MULTI_ENTRY etc disabled) will not be tested any more via the sandbox tests. So you get either a test for the new Kconfig option enabled or disabled this way. Do you really want me to do this? Thanks, Stefan
Re: [PATCH 4/6] stdio: Update to use compiler for Kconfig checks
On Tue, Aug 04, 2020 at 07:37:02AM -0600, Simon Glass wrote:
> Hi Tom,
>
> On Mon, 3 Aug 2020 at 20:18, Tom Rini wrote:
> >
> > On Mon, Aug 03, 2020 at 06:57:05PM -0400, Tom Rini wrote:
> > > On Fri, Jul 17, 2020 at 09:03:17PM -0600, Simon Glass wrote:
> > >
> > > > Drop use of the preprocessor where possible.
> > > >
> > > > Signed-off-by: Simon Glass
> > > [snip]
> > > > + if (IS_ENABLED(CONFIG_DM_VIDEO)) {
> > > > + /*
> > > > +* If the console setting is not in environment variables
> > > > then
> > > > +* console_init_r() will not be calling iomux_doenv() (which
> > > > +* calls search_device()). So we will not dynamically add
> > > > +* devices by calling stdio_probe_device().
> > > > +*
> > > > +* So just probe all video devices now so that whichever
> > > > one is
> > > > +* required will be available.
> > > > +*/
> > > > + struct udevice *vdev;
> > > > + int ret;
> > > > +
> > > > + if (!IS_ENABLED(CONFIG_SYS_CONSOLE_IS_IN_ENV)) {
> > > > + for (ret = uclass_first_device(UCLASS_VIDEO, );
> > > > +vdev;
> > > > +ret = uclass_next_device())
> > > > + ;
> > > > + if (ret)
> > > > + printf("%s: Video device failed (ret=%d)\n",
> > > > + __func__, ret);
> > > > + }
> > > > + if (IS_ENABLED(CONFIG_SPLASH_SCREEN) &&
> > > > + IS_ENABLED(CONFIG_CMD_BMP))
> > > > + splash_display();
> > >
> > > We can't do this yet because CONFIG_SPLASH_SCREEN isn't migrated so the
> > > test fails and we drop the bmp logo. I got this run-time tested and
> > > confirmed on colibri imx6 by my colleague Matt Porter. So I'm holding
> > > off on _this_ patch (and then the style clean up patch) until I can push
> > > SPLASH_SCREEN migration through.
> >
> > This is also an issue for "stdio: Tidy up use of
> > CONFIG_SYS_DEVICE_NULLDEV" as well, so I'm going to put aside the whole
> > series until I can convert SPLASH_SCREEN.
>
> OK, let me know if you'd like me to do something here. My patch 2 was
> supposed to migrate CONFIG_SPLASH_SCREEN, etc. Did that not work?
I don't see that patch:
http://patchwork.ozlabs.org/user/todo/uboot/?series=190587
--
Tom
signature.asc
Description: PGP signature
Re: [PATCH 1/2] IPQ40xx: Add DRAM detection & FDT fixup
On Tue, Aug 04, 2020 at 01:20:56PM +0200, Robert Marko wrote: > On Mon, Aug 3, 2020 at 4:39 PM Tom Rini wrote: > > > > On Mon, Aug 03, 2020 at 01:52:19PM +0200, Robert Marko wrote: > > > > > Fixup the Linux FDT with the detection of onboard DRAM as > > > provided by SBL (Secondary boot loader) by reading > > > the shared-memory region. > > > > > > Imported from Snapdragon target. > > > > > > Signed-off-by: Robert Marko > > > Cc: Luka Perkov > > > --- > > > arch/arm/mach-ipq40xx/Makefile| 1 + > > > arch/arm/mach-ipq40xx/dram.c | 99 +++ > > > arch/arm/mach-ipq40xx/include/mach/dram.h | 12 +++ > > > 3 files changed, 112 insertions(+) > > > create mode 100644 arch/arm/mach-ipq40xx/dram.c > > > create mode 100644 arch/arm/mach-ipq40xx/include/mach/dram.h > > > > Is this as-is? If so, we need to figure out something or another to > > make sharing the code, rather than copying, possible. How are these > > both grouped in the kernel? Thanks! > > Yes, the Snapdragon target uses the identical code. > The kernel does not have code for this but rather relies on the > bootloader to do it. Right, but I mean what does the kernel do to avoid copying identical code between these two platforms? I guess the answer is that for arch/arm64 everything has been pushed out of arch/arm64/. So in this case, the dram code should get moved to our drivers/ddr/ or drivers/ram/ depending on which place "dram.c" really belongs best. -- Tom signature.asc Description: PGP signature
Re: [PATCH 4/6] stdio: Update to use compiler for Kconfig checks
Hi Tom,
On Mon, 3 Aug 2020 at 20:18, Tom Rini wrote:
>
> On Mon, Aug 03, 2020 at 06:57:05PM -0400, Tom Rini wrote:
> > On Fri, Jul 17, 2020 at 09:03:17PM -0600, Simon Glass wrote:
> >
> > > Drop use of the preprocessor where possible.
> > >
> > > Signed-off-by: Simon Glass
> > [snip]
> > > + if (IS_ENABLED(CONFIG_DM_VIDEO)) {
> > > + /*
> > > +* If the console setting is not in environment variables then
> > > +* console_init_r() will not be calling iomux_doenv() (which
> > > +* calls search_device()). So we will not dynamically add
> > > +* devices by calling stdio_probe_device().
> > > +*
> > > +* So just probe all video devices now so that whichever one
> > > is
> > > +* required will be available.
> > > +*/
> > > + struct udevice *vdev;
> > > + int ret;
> > > +
> > > + if (!IS_ENABLED(CONFIG_SYS_CONSOLE_IS_IN_ENV)) {
> > > + for (ret = uclass_first_device(UCLASS_VIDEO, );
> > > +vdev;
> > > +ret = uclass_next_device())
> > > + ;
> > > + if (ret)
> > > + printf("%s: Video device failed (ret=%d)\n",
> > > + __func__, ret);
> > > + }
> > > + if (IS_ENABLED(CONFIG_SPLASH_SCREEN) &&
> > > + IS_ENABLED(CONFIG_CMD_BMP))
> > > + splash_display();
> >
> > We can't do this yet because CONFIG_SPLASH_SCREEN isn't migrated so the
> > test fails and we drop the bmp logo. I got this run-time tested and
> > confirmed on colibri imx6 by my colleague Matt Porter. So I'm holding
> > off on _this_ patch (and then the style clean up patch) until I can push
> > SPLASH_SCREEN migration through.
>
> This is also an issue for "stdio: Tidy up use of
> CONFIG_SYS_DEVICE_NULLDEV" as well, so I'm going to put aside the whole
> series until I can convert SPLASH_SCREEN.
OK, let me know if you'd like me to do something here. My patch 2 was
supposed to migrate CONFIG_SPLASH_SCREEN, etc. Did that not work?
Regards,
SImon
Re: [PATCH v1 15/24] ata: ahci: Add BAR index quirk for Cavium PCI SATA device
Hi Simon,
On 31.07.20 20:35, Simon Glass wrote:
Hi Stefan,
On Thu, 30 Jul 2020 at 09:41, Stefan Roese wrote:
Hi Simon,
On 28.07.20 21:01, Simon Glass wrote:
Hi Stefan,
On Fri, 24 Jul 2020 at 04:09, Stefan Roese wrote:
From: Suneel Garapati
For SATA controller found on OcteonTX SoC's, use non-standard PCI BAR0
instead of BAR5.
Signed-off-by: Suneel Garapati
Cc: Simon Glass
Signed-off-by: Stefan Roese
---
Changes in v1:
- Change patch subject
- Use constants from pci_ids.h instead of hardcoded values
drivers/ata/ahci.c | 8
1 file changed, 8 insertions(+)
Reviewed-by: Simon Glass
diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
index 47cdea1f58..28161b5e62 100644
--- a/drivers/ata/ahci.c
+++ b/drivers/ata/ahci.c
@@ -1198,10 +1198,18 @@ int ahci_probe_scsi(struct udevice *ahci_dev, ulong
base)
int ahci_probe_scsi_pci(struct udevice *ahci_dev)
{
ulong base;
+ u16 vendor, device;
base = (ulong)dm_pci_map_bar(ahci_dev, PCI_BASE_ADDRESS_5,
PCI_REGION_MEM);
+ dm_pci_read_config16(ahci_dev, PCI_VENDOR_ID, );
+ dm_pci_read_config16(ahci_dev, PCI_DEVICE_ID, );
+
+ if (vendor == PCI_VENDOR_ID_CAVIUM &&
+ device == PCI_DEVICE_ID_CAVIUM_SATA)
+ base = (uintptr_t)dm_pci_map_bar(ahci_dev, PCI_BASE_ADDRESS_0,
+PCI_REGION_MEM);
How should we handle this in general? Should we have a Kconfig to
enable quirks in ahci?
Perhaps we should wait a bit until, other "quirks" for AHCI get posted.
Only then we can see, where and how these can be grouped and can
"extract" them into Kconfig option(s). One quirk is the overhead of
the additional Kconfig option / handling not worth, IMHO.
What do you think?
Sounds OK to me. You could add a note about it perhaps.
Okay, will do.
Thanks,
Stefan
Re: [PATCH 1/1] riscv: fix building with CONFIG_SPL_SMP=n
On Tue, Aug 4, 2020 at 7:02 PM Heinrich Schuchardt wrote:
>
> On 04.08.20 03:46, Bin Meng wrote:
> > On Tue, Aug 4, 2020 at 5:26 AM Heinrich Schuchardt
> > wrote:
> >>
> >> Building with CONFIG_SPL_SMP=n results in:
> >>
> >> arch/riscv/lib/spl.c: In function ‘jump_to_image_no_args’:
> >> arch/riscv/lib/spl.c:33:6:
> >> error: unused variable ‘ret’ [-Werror=unused-variable]
> >>33 | int ret;
> >> | ^~~
> >>
> >> Define the variable ret as __maybe_unused.
> >>
> >> Fixes: 191636e44898 ("riscv: Introduce SPL_SMP Kconfig option for U-Boot
> >> SPL")
> >
> > This should be on the same line
>
> Commit messages should not exceed 75 characters. See scripts/checkpatch.pl:
True, for normal commit messages.
>
> WARN("COMMIT_LOG_LONG_LINE",
> "Possible unwrapped commit description (prefer a maximum 75 chars per
> line)\n" . $herecurr);
>
But this Fixes tag is special. I suspect 2 lines will break some
scripts that is handling this "Fixes" tag.
Regards,
Bin
Re: [PATCH v2 06/10] drivers: spi: Add SPI controller driver for Octeon
Hi Suneel, On 04.08.20 01:20, Suneel Garapati wrote: Hi Stefan, On Thu, Jul 30, 2020 at 4:58 AM Stefan Roese wrote: From: Suneel Garapati Adds support for SPI controllers found on Octeon II/III and Octeon TX TX2 SoC platforms. Signed-off-by: Aaron Williams Signed-off-by: Suneel Garapati Signed-off-by: Stefan Roese Cc: Daniel Schwierzeck Cc: Aaron Williams Cc: Chandrakala Chavva Cc: Jagan Teki --- Changes in v3: - Removed 2nd ops struct for Octeon TX2 and removed "const" from the octeon_spi_ops declaration. This makes a more elegant switch to the Octeon TX2 functions possible, as suggested by Daniel - Remove driver_data struct, as its not needed. The distinction between PCI based on non-PCI based probing can be made via a common Octeon TX & TX2 DT property can be made. Changes in v2: - Newly added to this series - Removed inclusion of "common.h" - Added "depends on DM_PCI" to Kconfig - Tested on MIPS Octeon and ARM Octeon TX2 - Fixed issues with Octeon TX2 registration. Now only one driver is registered and the "ops" is overwritten in the Octeon TX2 case. - Use dev_get_driver_data() to get the driver data struct - Removed "struct pci_device_id" definition and U_BOOT_PCI_DEVICE() as its not needed for the PCI based probing on Octeon TX2 drivers/spi/Kconfig | 8 + drivers/spi/Makefile | 1 + drivers/spi/octeon_spi.c | 615 +++ 3 files changed, 624 insertions(+) create mode 100644 drivers/spi/octeon_spi.c diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 30d808d7bb..3fc2d0674a 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -240,6 +240,14 @@ config NXP_FSPI Enable the NXP FlexSPI (FSPI) driver. This driver can be used to access the SPI NOR flash on platforms embedding this NXP IP core. +config OCTEON_SPI + bool "Octeon SPI driver" + depends on DM_PCI && (ARCH_OCTEON || ARCH_OCTEONTX || ARCH_OCTEONTX2) + help + Enable the Octeon SPI driver. This driver can be used to + access the SPI NOR flash on Octeon II/III and OcteonTX/TX2 + SoC platforms. + config OMAP3_SPI bool "McSPI driver for OMAP" help diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index 4e7461771f..b5c9ff1af8 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -43,6 +43,7 @@ obj-$(CONFIG_MXC_SPI) += mxc_spi.o obj-$(CONFIG_MXS_SPI) += mxs_spi.o obj-$(CONFIG_NXP_FSPI) += nxp_fspi.o obj-$(CONFIG_ATCSPI200_SPI) += atcspi200_spi.o +obj-$(CONFIG_OCTEON_SPI) += octeon_spi.o obj-$(CONFIG_OMAP3_SPI) += omap3_spi.o obj-$(CONFIG_PIC32_SPI) += pic32_spi.o obj-$(CONFIG_PL022_SPI) += pl022_spi.o diff --git a/drivers/spi/octeon_spi.c b/drivers/spi/octeon_spi.c new file mode 100644 index 00..868eb1bef5 --- /dev/null +++ b/drivers/spi/octeon_spi.c @@ -0,0 +1,615 @@ +// SPDX-License-Identifier:GPL-2.0 +/* + * Copyright (C) 2018 Marvell International Ltd. + * + * https://spdx.org/licenses + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define OCTEON_SPI_MAX_BYTES 9 +#define OCTEON_SPI_MAX_CLOCK_HZ5000 + +#define OCTEON_SPI_NUM_CS 4 + +#define OCTEON_SPI_CS_VALID(cs)((cs) < OCTEON_SPI_NUM_CS) + +#define MPI_CFG0x +#define MPI_STS0x0008 +#define MPI_TX 0x0010 +#define MPI_XMIT 0x0018 +#define MPI_WIDE_DAT 0x0040 +#define MPI_IO_CTL 0x0048 +#define MPI_DAT(X) (0x0080 + ((X) << 3)) +#define MPI_WIDE_BUF(X)(0x0800 + ((X) << 3)) +#define MPI_CYA_CFG0x1000 +#define MPI_CLKEN 0x1080 + +#define MPI_CFG_ENABLE BIT_ULL(0) +#define MPI_CFG_IDLELO BIT_ULL(1) +#define MPI_CFG_CLK_CONT BIT_ULL(2) +#define MPI_CFG_WIREOR BIT_ULL(3) +#define MPI_CFG_LSBFIRST BIT_ULL(4) +#define MPI_CFG_CS_STICKY BIT_ULL(5) +#define MPI_CFG_CSHI BIT_ULL(7) +#define MPI_CFG_IDLECLKS GENMASK_ULL(9, 8) +#define MPI_CFG_TRITX BIT_ULL(10) +#define MPI_CFG_CSLATE BIT_ULL(11) +#define MPI_CFG_CSENA0 BIT_ULL(12) +#define MPI_CFG_CSENA1 BIT_ULL(13) +#define MPI_CFG_CSENA2 BIT_ULL(14) +#define MPI_CFG_CSENA3 BIT_ULL(15) +#define MPI_CFG_CLKDIV GENMASK_ULL(28, 16) +#define MPI_CFG_LEGACY_DIS BIT_ULL(31) +#define MPI_CFG_IOMODE GENMASK_ULL(35, 34) +#define MPI_CFG_TB100_EN BIT_ULL(49) + +#define MPI_DAT_DATA GENMASK_ULL(7, 0) + +#define MPI_STS_BUSY BIT_ULL(0) +#define MPI_STS_MPI_INTR BIT_ULL(1) +#define MPI_STS_RXNUM GENMASK_ULL(12, 8) + +#define MPI_TX_TOTNUM GENMASK_ULL(4, 0) +#define MPI_TX_TXNUM GENMASK_ULL(12, 8) +#define MPI_TX_LEAVECS BIT_ULL(16) +#define MPI_TX_CSIDGENMASK_ULL(21, 20) +
[PATCH] armv8: ls1012a: correction in delay implementation
correction in delay implementation before we exit out of timeout.
Signed-off-by: Chaitanya Sakinam
---
drivers/net/pfe_eth/pfe_eth.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/net/pfe_eth/pfe_eth.c b/drivers/net/pfe_eth/pfe_eth.c
index 6e22041..5bfcaa4 100644
--- a/drivers/net/pfe_eth/pfe_eth.c
+++ b/drivers/net/pfe_eth/pfe_eth.c
@@ -174,9 +174,10 @@ static int pfe_eth_send(struct udevice *dev, void *packet,
int length)
udelay(100);
i++;
- if (i == 3)
+ if (i == 3) {
printf("Tx timeout, send failed\n");
- break;
+ break;
+ }
}
return 0;
--
2.7.4
[PATCH] armv8: ls1012a: Avoid resource leak
PFE DDR addresses are now stored on to a stack varaiable rather
dynamic allocation.
Signed-off-by: Chaitanya Sakinam
---
drivers/net/pfe_eth/pfe_eth.c | 17 ++---
1 file changed, 6 insertions(+), 11 deletions(-)
diff --git a/drivers/net/pfe_eth/pfe_eth.c b/drivers/net/pfe_eth/pfe_eth.c
index 6e22041..08d76bb 100644
--- a/drivers/net/pfe_eth/pfe_eth.c
+++ b/drivers/net/pfe_eth/pfe_eth.c
@@ -211,27 +211,22 @@ static int pfe_eth_recv(struct udevice *dev, int flags,
uchar **packetp)
static int pfe_eth_probe(struct udevice *dev)
{
struct pfe_eth_dev *priv = dev_get_priv(dev);
- struct pfe_ddr_address *pfe_addr;
+ struct pfe_ddr_address pfe_addr;
struct pfe_eth_pdata *pdata = dev_get_platdata(dev);
int ret = 0;
static int init_done;
if (!init_done) {
- pfe_addr = (struct pfe_ddr_address *)malloc(sizeof
- (struct pfe_ddr_address));
- if (!pfe_addr)
- return -ENOMEM;
-
- pfe_addr->ddr_pfe_baseaddr =
+ pfe_addr.ddr_pfe_baseaddr =
(void *)pdata->pfe_ddr_addr.ddr_pfe_baseaddr;
- pfe_addr->ddr_pfe_phys_baseaddr =
+ pfe_addr.ddr_pfe_phys_baseaddr =
(unsigned long)pdata->pfe_ddr_addr.ddr_pfe_phys_baseaddr;
debug("ddr_pfe_baseaddr: %p, ddr_pfe_phys_baseaddr: %08x\n",
- pfe_addr->ddr_pfe_baseaddr,
- (u32)pfe_addr->ddr_pfe_phys_baseaddr);
+ pfe_addr.ddr_pfe_baseaddr,
+ (u32)pfe_addr.ddr_pfe_phys_baseaddr);
- ret = pfe_drv_init(pfe_addr);
+ ret = pfe_drv_init(_addr);
if (ret)
return ret;
--
2.7.4
Re: [PATCH 06/22] clk: get clock pointer before proceeding
On 04.08.2020 05:00, Simon Glass wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the
> content is safe
>
> Hi Claudiu,
>
> On Wed, 29 Jul 2020 at 08:52, Claudiu Beznea
> wrote:
>>
>> clk_get_by_indexed_prop() retrieves a clock with dev member being set
>> with the pointer to the udevice for the clock controller driver. But
>> in case of CCF each struct clk object has set in dev member the reference
>> to its parent (the root of the clock tree is a fixed clock, every
>> node in clock tree is a clock registered with clk_register()). In this
>> case the subsequent operations like dev_get_clk_ptr() on clocks
>> retrieved by clk_get_by_indexed_prop() will fail. For this, get the
>> pointer to the proper clock registered (with clk_register()) using
>> clk_get_by_id() before proceeding.
>>
>> Fixes: 1d7993d1d0ef ("clk: Port Linux common clock framework [CCF] for imx6q
>> to U-boot (tag: v5.1.12)")
>> Signed-off-by: Claudiu Beznea
>> ---
>> drivers/clk/clk-uclass.c | 41 +
>> 1 file changed, 37 insertions(+), 4 deletions(-)
>>
>> diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c
>> index 958a9490bee2..8f926aad12cf 100644
>> --- a/drivers/clk/clk-uclass.c
>> +++ b/drivers/clk/clk-uclass.c
>> @@ -186,7 +186,7 @@ bulk_get_err:
>>
>> static int clk_set_default_parents(struct udevice *dev, int stage)
>> {
>> - struct clk clk, parent_clk;
>> + struct clk clk, parent_clk, *c, *p;
>> int index;
>> int num_parents;
>> int ret;
>> @@ -212,6 +212,17 @@ static int clk_set_default_parents(struct udevice *dev,
>> int stage)
>> return ret;
>> }
>>
>> + if (CONFIG_IS_ENABLED(CLK_CCF)) {
>> + ret = clk_get_by_id(parent_clk.id, );
>> + if (ret) {
>> + debug("%s(): could not get parent clock
>> pointer, id %lu, for %s\n",
>> + __func__, parent_clk.id,
>> dev_read_name(dev));
>> + return ret;
>> + }
>> + } else {
>> + p = _clk;
>> + }
>> +
>> ret = clk_get_by_indexed_prop(dev, "assigned-clocks",
>> index, );
>> if (ret) {
>> @@ -231,7 +242,18 @@ static int clk_set_default_parents(struct udevice *dev,
>> int stage)
>> /* do not setup twice the parent clocks */
>> continue;
>>
>> - ret = clk_set_parent(, _clk);
>> + if (CONFIG_IS_ENABLED(CLK_CCF)) {
>> + ret = clk_get_by_id(clk.id, );
>> + if (ret) {
>> + debug("%s(): could not get clock pointer, id
>> %lu, for %s\n",
>> + __func__, clk.id, dev_read_name(dev));
>> + return ret;
>> + }
>> + } else {
>> + c =
>> + }
>
> Could this code go in a function? It seems to be repeated three times.
Sure, it will!
Thank you reviewing this,
Claudiu Beznea
>
>> +
>> + ret = clk_set_parent(c, p);
>> /*
>> * Not all drivers may support clock-reparenting (as of now).
>> * Ignore errors due to this.
>> @@ -251,7 +273,7 @@ static int clk_set_default_parents(struct udevice *dev,
>> int stage)
>>
>> static int clk_set_default_rates(struct udevice *dev, int stage)
>> {
>> - struct clk clk;
>> + struct clk clk, *c;
>> int index;
>> int num_rates;
>> int size;
>> @@ -295,7 +317,18 @@ static int clk_set_default_rates(struct udevice *dev,
>> int stage)
>> /* do not setup twice the parent clocks */
>> continue;
>>
>> - ret = clk_set_rate(, rates[index]);
>> + if (CONFIG_IS_ENABLED(CLK_CCF)) {
>> + ret = clk_get_by_id(clk.id, );
>> + if (ret) {
>> + debug("%s(): could not get clock pointer, id
>> %lu, for %s\n",
>> + __func__, clk.id, dev_read_name(dev));
>> + return ret;
>> + }
>> + } else {
>> + c =
>> + }
>> +
>> + ret = clk_set_rate(c, rates[index]);
>>
>> if (ret < 0) {
>> debug("%s: failed to set rate on clock index %d
>> (%ld) for %s\n",
>> --
>> 2.7.4
>>
>
> Regards,
> Simon
>
Re: [PATCH 03/22] dm: core: add support for device re-parenting
On 04.08.2020 05:00, Simon Glass wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the
> content is safe
>
> Hi Claudiu,
>
> On Wed, 29 Jul 2020 at 08:51, Claudiu Beznea
> wrote:
>>
>> In common clock framework the relation b/w parent and child clocks is
>> determined based on the udevice parent/child information. A clock
>> parent could be changed based on devices needs. In case this is happen
>> the functionalities for clock who's parent is changed are broken. Add
>> a function that reparent a device. This will be used in clk-uclass.c
>> to reparent a clock device.
>>
>> Signed-off-by: Claudiu Beznea
>> ---
>> drivers/core/device.c| 26 ++
>> include/dm/device-internal.h | 9 +
>> 2 files changed, 35 insertions(+)
>
> Please add a sandbox test for this function.
OK.
>
>>
>> diff --git a/drivers/core/device.c b/drivers/core/device.c
>> index a7408d9c76c6..f149d55ac1e1 100644
>> --- a/drivers/core/device.c
>> +++ b/drivers/core/device.c
>> @@ -267,6 +267,32 @@ int device_bind_by_name(struct udevice *parent, bool
>> pre_reloc_only,
>> devp);
>> }
>>
>> +int device_reparent(struct udevice *dev, struct udevice *new_parent)
>> +{
>> + struct udevice *cparent;
>> + struct udevice *pos, *n;
>> +
>> + if (!dev || !new_parent)
>> + return -EINVAL;
>> +
>
> This is an error by the caller and would not be present in production
> code. Perhaps use assert()?
OK, I'll use assert().
>
>> + if (!dev->parent)
>> + return -ENODEV;
>
> This can't happen. Every device except for the root one has a parent.
Sure, I'll remove it.
>
>> +
>> + list_for_each_entry_safe(pos, n, >parent->child_head,
>> +sibling_node) {
>> + if (pos->driver != dev->driver)
>> + continue;
>> +
>> + list_del(>sibling_node);
>> + list_add_tail(>sibling_node, _parent->child_head);
>> + dev->parent = new_parent;
>> +
>> + return 0;
>> + }
>> +
>> + return -ENODEV;
>
> What does this error mean?
That the device who needs re-parenting has no parent. But you already
pointed that this should not happen. This means that the above loop will
always have a match and here we should return success code.
>
>> +}
>> +
>> static void *alloc_priv(int size, uint flags)
>> {
>> void *priv;
>> diff --git a/include/dm/device-internal.h b/include/dm/device-internal.h
>> index 294d6c18105a..c5d7ec0650f9 100644
>> --- a/include/dm/device-internal.h
>> +++ b/include/dm/device-internal.h
>> @@ -84,6 +84,15 @@ int device_bind_by_name(struct udevice *parent, bool
>> pre_reloc_only,
>> const struct driver_info *info, struct udevice
>> **devp);
>>
>> /**
>> + * device_reparent: reparent the device to a new parent
>> + *
>> + * @dev: pointer to device to be reparented
>> + * @new_parent: pointer to new parent device
>> + * @return 0 if OK, -ve on error
>> + */
>> +int device_reparent(struct udevice *dev, struct udevice *new_parent);
>> +
>> +/**
>> * device_ofdata_to_platdata() - Read platform data for a device
>> *
>> * Read platform data for a device (typically from the device tree) so that
>> --
>> 2.7.4
>>
>
> Regards,
> Simon
>
Re: [PATCH 04/22] clk: bind clk to new parent device
On 04.08.2020 05:00, Simon Glass wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the
> content is safe
>
> On Wed, 29 Jul 2020 at 08:51, Claudiu Beznea
> wrote:
>>
>> Clock re-parenting is not binding the clock's device to its new
>> parent device, it only calls the clock's ops->set_parent() API. The
>> changes in this commit re-parent the clock device to its new parent
>> so that subsequent operations like clk_get_parent() to point to the
>> proper parent.
>>
>> Signed-off-by: Claudiu Beznea
>> ---
>> drivers/clk/clk-uclass.c | 11 ++-
>> 1 file changed, 10 insertions(+), 1 deletion(-)
>
> Reviewed-by: Simon Glass
>
> But please add a sandbox test.
Sure!
>
>
>>
>> diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c
>> index aa1f11a27c41..b390a6b01c06 100644
>> --- a/drivers/clk/clk-uclass.c
>> +++ b/drivers/clk/clk-uclass.c
>> @@ -14,6 +14,7 @@
>> #include
>> #include
>> #include
>> +#include
>> #include
>> #include
>> #include
>> @@ -511,6 +512,7 @@ ulong clk_set_rate(struct clk *clk, ulong rate)
>> int clk_set_parent(struct clk *clk, struct clk *parent)
>> {
>> const struct clk_ops *ops;
>> + int ret;
>>
>> debug("%s(clk=%p, parent=%p)\n", __func__, clk, parent);
>> if (!clk_valid(clk))
>> @@ -520,7 +522,14 @@ int clk_set_parent(struct clk *clk, struct clk *parent)
>> if (!ops->set_parent)
>> return -ENOSYS;
>>
>> - return ops->set_parent(clk, parent);
>> + ret = ops->set_parent(clk, parent);
>> + if (ret)
>> + return ret;
>> +
>> + if (CONFIG_IS_ENABLED(CLK_CCF))
>> + ret = device_reparent(clk->dev, parent->dev);
>> +
>> + return ret;
>> }
>>
>> int clk_enable(struct clk *clk)
>> --
>> 2.7.4
>>
RE: PowerPC progress
>-Original Message- >From: Dan Malek >Sent: Tuesday, August 4, 2020 4:32 AM >To: Simon Glass >Cc: Tom Rini ; U-Boot Mailing List b...@lists.denx.de>; Wolfgang Denk ; >christophe.le...@csgroup.eu; Mario Six ; Priyanka Jain > >Subject: Re: PowerPC progress > > >Hi Simon. > >> On Aug 3, 2020, at 11:01 AM, Simon Glass wrote: >> >> >> Hi Tom, >> >> On Fri, 31 Jul 2020 at 12:54, Tom Rini wrote: >>> >>> On Fri, Jul 31, 2020 at 12:43:59PM -0600, Simon Glass wrote: >>> Hi Tom, I do see some progress with PowerPC migration but it seems to be very behind. I notice that it is often PowerPC code that gets in the way or refactoring and cleaning up. Could we get a progress update on this please? I cc'd the maintainers that are mentioned in the code. I do worry at the effort it is taking to keep all this old code in the tree. >>> >>> Which particular area are you worried about currently? I believe >>> we've had another good sized removal of PowerPC platforms and >>> everything that's left is what's wanted and being further migrated and >updated. >> >> It's hard to be specific, but these come to mind: >> >> - Loads of CONFIG options still not in Kconfig >> - asm/u-boot seems to include a huge array of headers >> - code style not up-to-date - e.g. printf (xxx) instead of printf(xxx) >> - lots of migration warnings > >I still have a few old boards, I’ll see what is still functional and jump in to >assist. >If we want to revive 82xx, as Wolfgang mentioned, I can probably do that as >well. > >The list above is helpful to get started. > >Thanks. > > — Dan I am working on NXP powerpc platforms We are working on a list (P1010, P1020, P2020, P2041, P3041, P4080, P5040, T1024, T1042, T2080, T4240, MPC8548CDS) for which we are ensuring DM migration and will remove the support of other platform which NXP no longer intend to maintain. Please expect the series of those patches by this month end. Regards Priyanka
Re: [PATCH 1/2] IPQ40xx: Add DRAM detection & FDT fixup
On Mon, Aug 3, 2020 at 4:39 PM Tom Rini wrote: > > On Mon, Aug 03, 2020 at 01:52:19PM +0200, Robert Marko wrote: > > > Fixup the Linux FDT with the detection of onboard DRAM as > > provided by SBL (Secondary boot loader) by reading > > the shared-memory region. > > > > Imported from Snapdragon target. > > > > Signed-off-by: Robert Marko > > Cc: Luka Perkov > > --- > > arch/arm/mach-ipq40xx/Makefile| 1 + > > arch/arm/mach-ipq40xx/dram.c | 99 +++ > > arch/arm/mach-ipq40xx/include/mach/dram.h | 12 +++ > > 3 files changed, 112 insertions(+) > > create mode 100644 arch/arm/mach-ipq40xx/dram.c > > create mode 100644 arch/arm/mach-ipq40xx/include/mach/dram.h > > Is this as-is? If so, we need to figure out something or another to > make sharing the code, rather than copying, possible. How are these > both grouped in the kernel? Thanks! Yes, the Snapdragon target uses the identical code. The kernel does not have code for this but rather relies on the bootloader to do it. > > -- > Tom
[PATCH v2 12/12] pci: ls_pcie_g4: Add size check for config resource
resource "config" is required to have minimum 4KB space
to access all config space of PCI Express EP.
Signed-off-by: Wasim Khan
---
Changes in V2:
- Updated commit description
- Fix CheckPatch issue
- Change size check to 4KB to access PCIe config space
drivers/pci/pcie_layerscape_gen4.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/pci/pcie_layerscape_gen4.c
b/drivers/pci/pcie_layerscape_gen4.c
index 0226bde..6e71173 100644
--- a/drivers/pci/pcie_layerscape_gen4.c
+++ b/drivers/pci/pcie_layerscape_gen4.c
@@ -455,6 +455,7 @@ static int ls_pcie_g4_probe(struct udevice *dev)
u32 link_ctrl_sta;
u32 val;
int ret;
+ fdt_size_t cfg_size;
pcie->bus = dev;
@@ -488,6 +489,13 @@ static int ls_pcie_g4_probe(struct udevice *dev)
return ret;
}
+ cfg_size = fdt_resource_size(>cfg_res);
+ if (cfg_size < SZ_4K) {
+ printf("PCIe%d: %s Invalid size(0x%llx) for resource
\"config\",expected minimum 0x%x\n",
+ PCIE_SRDS_PRTCL(pcie->idx), dev->name, cfg_size, SZ_4K);
+ return 0;
+ }
+
pcie->cfg = map_physmem(pcie->cfg_res.start,
fdt_resource_size(>cfg_res),
MAP_NOCACHE);
--
2.7.4
[PATCH v2 11/12] pci: layerscape: Add size check for config resource
resource "config" is required to have minimum 8KB space
as per hardware documentation.
Signed-off-by: Wasim Khan
---
Changes in V2:
- Updated commit description
- Fix CheckPatch issue
drivers/pci/pcie_layerscape_rc.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/pci/pcie_layerscape_rc.c b/drivers/pci/pcie_layerscape_rc.c
index f9e3089..7e232be 100644
--- a/drivers/pci/pcie_layerscape_rc.c
+++ b/drivers/pci/pcie_layerscape_rc.c
@@ -314,6 +314,13 @@ static int ls_pcie_probe(struct udevice *dev)
return ret;
}
+ cfg_size = fdt_resource_size(_rc->cfg_res);
+ if (cfg_size < SZ_8K) {
+ printf("PCIe%d: %s Invalid size(0x%llx) for resource
\"config\",expected minimum 0x%x\n",
+ PCIE_SRDS_PRTCL(pcie->idx), dev->name, cfg_size, SZ_8K);
+ return 0;
+ }
+
/*
* Fix the pcie memory map address and PF control registers address
* for LS2088A series SoCs
@@ -323,7 +330,6 @@ static int ls_pcie_probe(struct udevice *dev)
if (svr == SVR_LS2088A || svr == SVR_LS2084A ||
svr == SVR_LS2048A || svr == SVR_LS2044A ||
svr == SVR_LS2081A || svr == SVR_LS2041A) {
- cfg_size = fdt_resource_size(_rc->cfg_res);
pcie_rc->cfg_res.start = LS2088A_PCIE1_PHYS_ADDR +
LS2088A_PCIE_PHYS_SIZE * pcie->idx;
pcie_rc->cfg_res.end = pcie_rc->cfg_res.start + cfg_size;
--
2.7.4
[PATCH v2 08/12] arm: dts: ls1012a: add label to pcie nodes in dts
Add label to pcie nodes in dts so that these nodes
are easy to refer.
Signed-off-by: Wasim Khan
---
Changes in V2:
- Updated commit description
arch/arm/dts/fsl-ls1012a.dtsi | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/dts/fsl-ls1012a.dtsi b/arch/arm/dts/fsl-ls1012a.dtsi
index 2d70c82..c401ba3 100644
--- a/arch/arm/dts/fsl-ls1012a.dtsi
+++ b/arch/arm/dts/fsl-ls1012a.dtsi
@@ -1,5 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+ OR X11
/*
+ * Copyright 2020 NXP
* Copyright 2016 Freescale Semiconductor
*/
@@ -116,7 +117,7 @@
status = "disabled";
};
- pcie@340 {
+ pcie1: pcie@340 {
compatible = "fsl,ls-pcie", "snps,dw-pcie";
reg = <0x00 0x0340 0x0 0x8 /* dbi registers */
0x00 0x0348 0x0 0x4 /* lut registers */
--
2.7.4
[PATCH v2 07/12] arm: dts: ls1088a: add label to pcie nodes in dts
Add label to pcie nodes in dts so that these nodes
are easy to refer.
Signed-off-by: Wasim Khan
---
Changes in V2:
- Updated commit description
arch/arm/dts/fsl-ls1088a.dtsi | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/dts/fsl-ls1088a.dtsi b/arch/arm/dts/fsl-ls1088a.dtsi
index bf303c6..8de7998 100644
--- a/arch/arm/dts/fsl-ls1088a.dtsi
+++ b/arch/arm/dts/fsl-ls1088a.dtsi
@@ -2,7 +2,7 @@
/*
* NXP ls1088a SOC common device tree source
*
- * Copyright 2017 NXP
+ * Copyright 2017, 2020 NXP
*/
/ {
@@ -129,7 +129,7 @@
dr_mode = "host";
};
- pcie@340 {
+ pcie1: pcie@340 {
compatible = "fsl,ls-pcie", "snps,dw-pcie";
reg = <0x00 0x0340 0x0 0x8 /* dbi registers */
0x00 0x0348 0x0 0x8 /* lut registers */
@@ -145,7 +145,7 @@
0x8200 0x0 0x4000 0x20 0x4000 0x0
0x4000>; /* non-prefetchable memory */
};
- pcie@350 {
+ pcie2: pcie@350 {
compatible = "fsl,ls-pcie", "snps,dw-pcie";
reg = <0x00 0x0350 0x0 0x8 /* dbi registers */
0x00 0x0358 0x0 0x8 /* lut registers */
@@ -161,7 +161,7 @@
0x8200 0x0 0x4000 0x28 0x4000 0x0
0x4000>; /* non-prefetchable memory */
};
- pcie@360 {
+ pcie3: pcie@360 {
compatible = "fsl,ls-pcie", "snps,dw-pcie";
reg = <0x00 0x0360 0x0 0x8 /* dbi registers */
0x00 0x0368 0x0 0x8 /* lut registers */
--
2.7.4
[PATCH v2 05/12] arm: dts: ls1046a: add label to pcie nodes in dts
Add label to pcie nodes in dts so that these nodes
are easy to refer.
Signed-off-by: Wasim Khan
---
Changes in V2:
- Updated commit description
arch/arm/dts/fsl-ls1046a.dtsi | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm/dts/fsl-ls1046a.dtsi b/arch/arm/dts/fsl-ls1046a.dtsi
index 3f11d6c..155455d 100644
--- a/arch/arm/dts/fsl-ls1046a.dtsi
+++ b/arch/arm/dts/fsl-ls1046a.dtsi
@@ -241,7 +241,7 @@
dr_mode = "host";
};
- pcie@340 {
+ pcie1: pcie@340 {
compatible = "fsl,ls-pcie", "snps,dw-pcie";
reg = <0x00 0x0340 0x0 0x8 /* dbi registers */
0x00 0x0348 0x0 0x4 /* lut registers */
@@ -257,7 +257,7 @@
0x8200 0x0 0x4000 0x40 0x4000 0x0
0x4000>; /* non-prefetchable memory */
};
- pcie_ep@340 {
+ pcie_ep1: pcie_ep@340 {
compatible = "fsl,ls-pcie-ep";
reg = <0x00 0x0340 0x0 0x8
0x00 0x034c 0x0 0x4
@@ -268,7 +268,7 @@
big-endian;
};
- pcie@350 {
+ pcie2: pcie@350 {
compatible = "fsl,ls-pcie", "snps,dw-pcie";
reg = <0x00 0x0350 0x0 0x8 /* dbi registers */
0x00 0x0358 0x0 0x4 /* lut registers */
@@ -285,7 +285,7 @@
0x8200 0x0 0x4000 0x48 0x4000 0x0
0x4000>; /* non-prefetchable memory */
};
- pcie_ep@350 {
+ pcie_ep2: pcie_ep@350 {
compatible = "fsl,ls-pcie-ep";
reg = <0x00 0x0350 0x0 0x8
0x00 0x035c 0x0 0x4
@@ -296,7 +296,7 @@
big-endian;
};
- pcie@360 {
+ pcie3: pcie@360 {
compatible = "fsl,ls-pcie", "snps,dw-pcie";
reg = <0x00 0x0360 0x0 0x8 /* dbi registers */
0x00 0x0368 0x0 0x4 /* lut registers */
@@ -312,7 +312,7 @@
0x8200 0x0 0x4000 0x50 0x4000 0x0
0x4000>; /* non-prefetchable memory */
};
- pcie_ep@360 {
+ pcie_ep3: pcie_ep@360 {
compatible = "fsl,ls-pcie-ep";
reg = <0x00 0x0360 0x0 0x8
0x00 0x036c 0x0 0x4
--
2.7.4
[PATCH v2 10/12] arm: dts: ls1028a: add label to pcie nodes in dts
Add label to pcie nodes in dts so that these nodes
are easy to refer.
Signed-off-by: Wasim Khan
---
Changes in V2:
- Updated commit description
arch/arm/dts/fsl-ls1028a.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/dts/fsl-ls1028a.dtsi b/arch/arm/dts/fsl-ls1028a.dtsi
index 9911690..ccf1a8d 100644
--- a/arch/arm/dts/fsl-ls1028a.dtsi
+++ b/arch/arm/dts/fsl-ls1028a.dtsi
@@ -2,7 +2,7 @@
/*
* NXP ls1028a SOC common device tree source
*
- * Copyright 2019 NXP
+ * Copyright 2019-2020 NXP
*
*/
@@ -85,7 +85,7 @@
status = "disabled";
};
- pcie@340 {
+ pcie1: pcie@340 {
compatible = "fsl,ls-pcie", "fsl,ls1028-pcie", "snps,dw-pcie";
reg = <0x00 0x0340 0x0 0x8
0x00 0x0348 0x0 0x4 /* lut registers */
@@ -101,7 +101,7 @@
0x8200 0x0 0x4000 0x80 0x4000 0x0
0x4000>; /* non-prefetchable memory */
};
- pcie@350 {
+ pcie2: pcie@350 {
compatible = "fsl,ls-pcie", "fsl,ls1028-pcie", "snps,dw-pcie";
reg = <0x00 0x0350 0x0 0x8
0x00 0x0358 0x0 0x4 /* lut registers */
--
2.7.4
[PATCH v2 09/12] arm: dts: ls1043a: add label to pcie nodes in dts
Add label to pcie nodes in dts so that these nodes
are easy to refer.
Signed-off-by: Wasim Khan
---
Changes in V2:
- Updated commit description
arch/arm/dts/fsl-ls1043a.dtsi | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/arch/arm/dts/fsl-ls1043a.dtsi b/arch/arm/dts/fsl-ls1043a.dtsi
index f7db44c..8ca57ea 100644
--- a/arch/arm/dts/fsl-ls1043a.dtsi
+++ b/arch/arm/dts/fsl-ls1043a.dtsi
@@ -1,7 +1,8 @@
// SPDX-License-Identifier: GPL-2.0+ OR X11
/*
- * Device Tree Include file for Freescale Layerscape-1043A family SoC.
+ * Device Tree Include file for NXP Layerscape-1043A family SoC.
*
+ * Copyright 2020 NXP
* Copyright (C) 2014-2015, Freescale Semiconductor
*
* Mingkai Hu
@@ -240,7 +241,7 @@
dr_mode = "host";
};
- pcie@340 {
+ pcie1: pcie@340 {
compatible = "fsl,ls-pcie", "snps,dw-pcie";
reg = <0x00 0x0340 0x0 0x1 /* dbi registers */
0x00 0x0341 0x0 0x1 /* lut registers */
@@ -255,7 +256,7 @@
0x8200 0x0 0x4000 0x40 0x4000 0x0
0x4000>; /* non-prefetchable memory */
};
- pcie@350 {
+ pcie2: pcie@350 {
compatible = "fsl,ls-pcie", "snps,dw-pcie";
reg = <0x00 0x0350 0x0 0x1 /* dbi registers */
0x00 0x0351 0x0 0x1 /* lut registers */
@@ -271,7 +272,7 @@
0x8200 0x0 0x4000 0x48 0x4000 0x0
0x4000>; /* non-prefetchable memory */
};
- pcie@360 {
+ pcie3: pcie@360 {
compatible = "fsl,ls-pcie", "snps,dw-pcie";
reg = <0x00 0x0360 0x0 0x1 /* dbi registers */
0x00 0x0361 0x0 0x1 /* lut registers */
--
2.7.4
[PATCH v2 04/12] arm: dts: lx2160a: add label to pcie nodes in dts
Add label to pcie nodes in dts so that these nodes
are easy to refer.
Signed-off-by: Wasim Khan
---
Changes in V2:
- Updated commit description
arch/arm/dts/fsl-lx2160a.dtsi | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm/dts/fsl-lx2160a.dtsi b/arch/arm/dts/fsl-lx2160a.dtsi
index dee1e2f..69fcc0c 100644
--- a/arch/arm/dts/fsl-lx2160a.dtsi
+++ b/arch/arm/dts/fsl-lx2160a.dtsi
@@ -286,7 +286,7 @@
};
- pcie@340 {
+ pcie1: pcie@340 {
compatible = "fsl,lx2160a-pcie";
reg = <0x00 0x0340 0x0 0x8 /* PAB registers */
0x00 0x0348 0x0 0x4 /* LUT registers */
@@ -300,7 +300,7 @@
ranges = <0x8200 0x0 0x4000 0x80 0x4000 0x0
0x4000>;
};
- pcie@350 {
+ pcie2: pcie@350 {
compatible = "fsl,lx2160a-pcie";
reg = <0x00 0x0350 0x0 0x8 /* PAB registers */
0x00 0x0358 0x0 0x4 /* LUT registers */
@@ -315,7 +315,7 @@
ranges = <0x8200 0x0 0x4000 0x88 0x4000 0x0
0x4000>;
};
- pcie@360 {
+ pcie3: pcie@360 {
compatible = "fsl,lx2160a-pcie";
reg = <0x00 0x0360 0x0 0x8 /* PAB registers */
0x00 0x0368 0x0 0x4 /* LUT registers */
@@ -329,7 +329,7 @@
ranges = <0x8200 0x0 0x4000 0x90 0x4000 0x0
0x4000>;
};
- pcie@370 {
+ pcie4: pcie@370 {
compatible = "fsl,lx2160a-pcie";
reg = <0x00 0x0370 0x0 0x8 /* PAB registers */
0x00 0x0378 0x0 0x4 /* LUT registers */
@@ -343,7 +343,7 @@
ranges = <0x8200 0x0 0x4000 0x98 0x4000 0x0
0x4000>;
};
- pcie@380 {
+ pcie5: pcie@380 {
compatible = "fsl,lx2160a-pcie";
reg = <0x00 0x0380 0x0 0x8 /* PAB registers */
0x00 0x0388 0x0 0x4 /* LUT registers */
@@ -357,7 +357,7 @@
ranges = <0x8200 0x0 0x4000 0xa0 0x4000 0x0
0x4000>;
};
- pcie@390 {
+ pcie6: pcie@390 {
compatible = "fsl,lx2160a-pcie";
reg = <0x00 0x0390 0x0 0x8 /* PAB registers */
0x00 0x0398 0x0 0x4 /* LUT registers */
--
2.7.4
[PATCH v2 06/12] arm: dts: ls2080a: add label to pcie nodes in dts
Add label to pcie nodes in dts so that these nodes
are easy to refer.
Signed-off-by: Wasim Khan
---
Changes in V2:
- Updated commit description
arch/arm/dts/fsl-ls2080a.dtsi | 11 ++-
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/arch/arm/dts/fsl-ls2080a.dtsi b/arch/arm/dts/fsl-ls2080a.dtsi
index 90a0a3f..fae46c4 100644
--- a/arch/arm/dts/fsl-ls2080a.dtsi
+++ b/arch/arm/dts/fsl-ls2080a.dtsi
@@ -1,7 +1,8 @@
// SPDX-License-Identifier: GPL-2.0+ OR X11
/*
- * Freescale ls2080a SOC common device tree source
+ * NXP ls2080a SOC common device tree source
*
+ * Copyright 2020 NXP
* Copyright 2013-2015 Freescale Semiconductor, Inc.
*/
@@ -127,7 +128,7 @@
dr_mode = "host";
};
- pcie@340 {
+ pcie1: pcie@340 {
compatible = "fsl,ls-pcie", "snps,dw-pcie";
reg = <0x00 0x0340 0x0 0x8 /* dbi registers */
0x00 0x0348 0x0 0x8 /* lut registers */
@@ -142,7 +143,7 @@
0x8200 0x0 0x4000 0x10 0x4000 0x0
0x4000>; /* non-prefetchable memory */
};
- pcie@350 {
+ pcie2: pcie@350 {
compatible = "fsl,ls-pcie", "snps,dw-pcie";
reg = <0x00 0x0350 0x0 0x8 /* dbi registers */
0x00 0x0358 0x0 0x8 /* lut registers */
@@ -157,7 +158,7 @@
0x8200 0x0 0x4000 0x12 0x4000 0x0
0x4000>; /* non-prefetchable memory */
};
- pcie@360 {
+ pcie3: pcie@360 {
compatible = "fsl,ls-pcie", "snps,dw-pcie";
reg = <0x00 0x0360 0x0 0x8 /* dbi registers */
0x00 0x0368 0x0 0x8 /* lut registers */
@@ -172,7 +173,7 @@
0x8200 0x0 0x4000 0x14 0x4000 0x0
0x4000>; /* non-prefetchable memory */
};
- pcie@370 {
+ pcie4: pcie@370 {
compatible = "fsl,ls-pcie", "snps,dw-pcie";
reg = <0x00 0x0370 0x0 0x8 /* dbi registers */
0x00 0x0378 0x0 0x8 /* lut registers */
--
2.7.4
Re: [PATCH 02/22] clk: check pointer returned by dev_get_parent()
On 04.08.2020 05:00, Simon Glass wrote: > EXTERNAL EMAIL: Do not click links or open attachments unless you know the > content is safe > > Hi Claudiu, > > On Wed, 29 Jul 2020 at 08:51, Claudiu Beznea > wrote: >> >> Check pointer returned by dev_get_parent(). >> >> Signed-off-by: Claudiu Beznea >> --- >> drivers/clk/clk-uclass.c | 3 +++ >> 1 file changed, 3 insertions(+) >> >> diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c >> index 70df9d410f4c..aa1f11a27c41 100644 >> --- a/drivers/clk/clk-uclass.c >> +++ b/drivers/clk/clk-uclass.c >> @@ -459,6 +459,9 @@ struct clk *clk_get_parent(struct clk *clk) >> return NULL; >> >> pdev = dev_get_parent(clk->dev); >> + if (!pdev) >> + return ERR_PTR(-ENOMEM); > > A clock device must always have a parent (e.g. the root device). So > this check is not useful and adds to code size. Sure, I'll remove it. > >> + >> pclk = dev_get_clk_ptr(pdev); >> if (!pclk) >> return ERR_PTR(-ENODEV); >> -- >> 2.7.4 >> > > Regards, > Simon >
[PATCH v2 03/12] pci: ls_pcie_g4: Print pcie controller number starting from 1
Print pcie controller number starting from 1
Signed-off-by: Wasim Khan
---
Changes in V2:
- No Change
drivers/pci/pcie_layerscape_gen4.c | 11 +++
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/drivers/pci/pcie_layerscape_gen4.c
b/drivers/pci/pcie_layerscape_gen4.c
index 428bfca..0226bde 100644
--- a/drivers/pci/pcie_layerscape_gen4.c
+++ b/drivers/pci/pcie_layerscape_gen4.c
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+ OR X11
/*
- * Copyright 2018-2019 NXP
+ * Copyright 2018-2020 NXP
*
* PCIe Gen4 driver for NXP Layerscape SoCs
* Author: Hou Zhiqiang
@@ -472,7 +472,8 @@ static int ls_pcie_g4_probe(struct udevice *dev)
pcie->enabled = is_serdes_configured(PCIE_SRDS_PRTCL(pcie->idx));
if (!pcie->enabled) {
- printf("PCIe%d: %s disabled\n", pcie->idx, dev->name);
+ printf("PCIe%d: %s disabled\n", PCIE_SRDS_PRTCL(pcie->idx),
+ dev->name);
return 0;
}
@@ -522,10 +523,12 @@ static int ls_pcie_g4_probe(struct udevice *dev)
pcie->mode = readb(pcie->ccsr + PCI_HEADER_TYPE) & 0x7f;
if (pcie->mode == PCI_HEADER_TYPE_NORMAL) {
- printf("PCIe%u: %s %s", pcie->idx, dev->name, "Endpoint");
+ printf("PCIe%u: %s %s", PCIE_SRDS_PRTCL(pcie->idx), dev->name,
+ "Endpoint");
ls_pcie_g4_setup_ep(pcie);
} else {
- printf("PCIe%u: %s %s", pcie->idx, dev->name, "Root Complex");
+ printf("PCIe%u: %s %s", PCIE_SRDS_PRTCL(pcie->idx), dev->name,
+ "Root Complex");
ls_pcie_g4_setup_ctrl(pcie);
}
--
2.7.4
Re: [PATCH 01/22] clk: check hw and hw->dev before dereference it
On 04.08.2020 05:00, Simon Glass wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the
> content is safe
>
> Hi Claudiu,
>
> On Wed, 29 Jul 2020 at 08:51, Claudiu Beznea
> wrote:
>>
>> Check hw and hw->dev before dereference it.
>>
>> Signed-off-by: Claudiu Beznea
>> ---
>> drivers/clk/clk.c | 3 +++
>> 1 file changed, 3 insertions(+)
>>
>
> Why is this needed? It adds to code size and these situations should
> not occur. Perhaps use assert()?
In my debugging, investigating the issues that patches 03/22, 04/22, 06/22
try to address, I reached also this function and checked these pointers. In
the end the issue was not related to them but I though it might be useful
to keep these in a patch. I will remove it in the next version.
>
>> diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
>> index 0f55ba751c0f..9fa18e342eaf 100644
>> --- a/drivers/clk/clk.c
>> +++ b/drivers/clk/clk.c
>> @@ -57,6 +57,9 @@ ulong clk_generic_get_rate(struct clk *clk)
>>
>> const char *clk_hw_get_name(const struct clk *hw)
>> {
>> + if (!hw || !hw->dev)
>> + return NULL;
>> +
>> return hw->dev->name;
>> }
>>
>> --
>> 2.7.4
>>
>
> Regards,
> SImon
>
[PATCH v2 01/12] configs: lx2160a: Enable CONFIG_PCIE_LAYERSCAPE_GEN4
LX2160A-Rev1 uses PCIe layerscape Gen4 controller. Enable CONFIG_PCIE_LAYERSCAPE_GEN4 for lx2160a. Signed-off-by: Wasim Khan --- Changes in V2: - Added as new commit in V2 configs/lx2160aqds_tfa_SECURE_BOOT_defconfig | 1 + configs/lx2160aqds_tfa_defconfig | 1 + configs/lx2160ardb_tfa_SECURE_BOOT_defconfig | 1 + configs/lx2160ardb_tfa_defconfig | 1 + configs/lx2160ardb_tfa_stmm_defconfig| 1 + 5 files changed, 5 insertions(+) diff --git a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig index f2faf7b..3aa5793 100644 --- a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig @@ -68,6 +68,7 @@ CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_LAYERSCAPE_RC=y +CONFIG_PCIE_LAYERSCAPE_GEN4=y CONFIG_DM_RTC=y CONFIG_RTC_PCF2127=y CONFIG_DM_SCSI=y diff --git a/configs/lx2160aqds_tfa_defconfig b/configs/lx2160aqds_tfa_defconfig index b6a099b..27951b7 100644 --- a/configs/lx2160aqds_tfa_defconfig +++ b/configs/lx2160aqds_tfa_defconfig @@ -75,6 +75,7 @@ CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_LAYERSCAPE_RC=y +CONFIG_PCIE_LAYERSCAPE_GEN4=y CONFIG_DM_RTC=y CONFIG_RTC_PCF2127=y CONFIG_DM_SCSI=y diff --git a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig index a225f21..8e8bef0 100644 --- a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig @@ -59,6 +59,7 @@ CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_LAYERSCAPE_RC=y +CONFIG_PCIE_LAYERSCAPE_GEN4=y CONFIG_DM_RTC=y CONFIG_RTC_PCF2127=y CONFIG_DM_SCSI=y diff --git a/configs/lx2160ardb_tfa_defconfig b/configs/lx2160ardb_tfa_defconfig index d147453..ac6b5bf 100644 --- a/configs/lx2160ardb_tfa_defconfig +++ b/configs/lx2160ardb_tfa_defconfig @@ -66,6 +66,7 @@ CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_LAYERSCAPE_RC=y +CONFIG_PCIE_LAYERSCAPE_GEN4=y CONFIG_DM_RTC=y CONFIG_RTC_PCF2127=y CONFIG_DM_SCSI=y diff --git a/configs/lx2160ardb_tfa_stmm_defconfig b/configs/lx2160ardb_tfa_stmm_defconfig index 799fc12..c6b7230 100644 --- a/configs/lx2160ardb_tfa_stmm_defconfig +++ b/configs/lx2160ardb_tfa_stmm_defconfig @@ -68,6 +68,7 @@ CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_LAYERSCAPE_RC=y +CONFIG_PCIE_LAYERSCAPE_GEN4=y CONFIG_DM_RTC=y CONFIG_RTC_PCF2127=y CONFIG_DM_SCSI=y -- 2.7.4
[PATCH v2 02/12] pci: layerscape: Print pcie controller number starting from 1
Print pcie controller number starting from 1
Signed-off-by: Wasim Khan
---
drivers/pci/pcie_layerscape_ep.c | 4 +++-
drivers/pci/pcie_layerscape_rc.c | 6 --
2 files changed, 7 insertions(+), 3 deletions(-)
diff --git a/drivers/pci/pcie_layerscape_ep.c b/drivers/pci/pcie_layerscape_ep.c
index eba230e..35bb726 100644
--- a/drivers/pci/pcie_layerscape_ep.c
+++ b/drivers/pci/pcie_layerscape_ep.c
@@ -5,6 +5,7 @@
*/
#include
+#include
#include
#include
#include
@@ -294,7 +295,8 @@ static int ls_pcie_ep_probe(struct udevice *dev)
pcie_ep->num_ob_wins = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
"num-ob-windows", 8);
- printf("PCIe%u: %s %s", pcie->idx, dev->name, "Endpoint");
+ printf("PCIe%u: %s %s", PCIE_SRDS_PRTCL(pcie->idx), dev->name,
+ "Endpoint");
ls_pcie_setup_ep(pcie_ep);
if (!ls_pcie_link_up(pcie)) {
diff --git a/drivers/pci/pcie_layerscape_rc.c b/drivers/pci/pcie_layerscape_rc.c
index 25c6dde..f9e3089 100644
--- a/drivers/pci/pcie_layerscape_rc.c
+++ b/drivers/pci/pcie_layerscape_rc.c
@@ -273,7 +273,8 @@ static int ls_pcie_probe(struct udevice *dev)
pcie_rc->enabled = is_serdes_configured(PCIE_SRDS_PRTCL(pcie->idx));
if (!pcie_rc->enabled) {
- printf("PCIe%d: %s disabled\n", pcie->idx, dev->name);
+ printf("PCIe%d: %s disabled\n", PCIE_SRDS_PRTCL(pcie->idx),
+ dev->name);
return 0;
}
@@ -342,7 +343,8 @@ static int ls_pcie_probe(struct udevice *dev)
(unsigned long)pcie->ctrl, (unsigned long)pcie_rc->cfg0,
pcie->big_endian);
- printf("PCIe%u: %s %s", pcie->idx, dev->name, "Root Complex");
+ printf("PCIe%u: %s %s", PCIE_SRDS_PRTCL(pcie->idx), dev->name,
+ "Root Complex");
ls_pcie_setup_ctrl(pcie_rc);
if (!ls_pcie_link_up(pcie)) {
--
2.7.4
[PATCH v2 02/12] pci: layerscape: Print pcie controller number starting from 1
Print pcie controller number starting from 1
Signed-off-by: Wasim Khan
---
Changes in V2:
- No Change
drivers/pci/pcie_layerscape_ep.c | 4 +++-
drivers/pci/pcie_layerscape_rc.c | 6 --
2 files changed, 7 insertions(+), 3 deletions(-)
diff --git a/drivers/pci/pcie_layerscape_ep.c b/drivers/pci/pcie_layerscape_ep.c
index eba230e..26c04a9 100644
--- a/drivers/pci/pcie_layerscape_ep.c
+++ b/drivers/pci/pcie_layerscape_ep.c
@@ -5,6 +5,7 @@
*/
#include
+#include
#include
#include
#include
@@ -294,7 +295,8 @@ static int ls_pcie_ep_probe(struct udevice *dev)
pcie_ep->num_ob_wins = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
"num-ob-windows", 8);
- printf("PCIe%u: %s %s", pcie->idx, dev->name, "Endpoint");
+ printf("PCIe%u: %s %s", PCIE_SRDS_PRTCL(pcie->idx), dev->name,
+ "Endpoint");
ls_pcie_setup_ep(pcie_ep);
if (!ls_pcie_link_up(pcie)) {
diff --git a/drivers/pci/pcie_layerscape_rc.c b/drivers/pci/pcie_layerscape_rc.c
index 25c6dde..f9e3089 100644
--- a/drivers/pci/pcie_layerscape_rc.c
+++ b/drivers/pci/pcie_layerscape_rc.c
@@ -273,7 +273,8 @@ static int ls_pcie_probe(struct udevice *dev)
pcie_rc->enabled = is_serdes_configured(PCIE_SRDS_PRTCL(pcie->idx));
if (!pcie_rc->enabled) {
- printf("PCIe%d: %s disabled\n", pcie->idx, dev->name);
+ printf("PCIe%d: %s disabled\n", PCIE_SRDS_PRTCL(pcie->idx),
+ dev->name);
return 0;
}
@@ -342,7 +343,8 @@ static int ls_pcie_probe(struct udevice *dev)
(unsigned long)pcie->ctrl, (unsigned long)pcie_rc->cfg0,
pcie->big_endian);
- printf("PCIe%u: %s %s", pcie->idx, dev->name, "Root Complex");
+ printf("PCIe%u: %s %s", PCIE_SRDS_PRTCL(pcie->idx), dev->name,
+ "Root Complex");
ls_pcie_setup_ctrl(pcie_rc);
if (!ls_pcie_link_up(pcie)) {
--
2.7.4
[PATCH v2 00/12] Add label to pcie nodes
This patch series - Adds label to pcie nodes in dts file for NXP's layerscape SoCs - Print the pcie controller number starting from 1 to match RMs - Add checks for config resource size and fix indendation. Changes in V2: - Enable CONFIG_PCIE_LAYERSCAPE_GEN4 to make LX2160A-Rev1 work - Fix CheckPatch issues - Change 1KB size check to 4KB size check for ls_pcie_g4. - Commit description updates Wasim Khan (12): configs: lx2160a: Enable CONFIG_PCIE_LAYERSCAPE_GEN4 pci: layerscape: Print pcie controller number starting from 1 pci: ls_pcie_g4: Print pcie controller number starting from 1 arm: dts: lx2160a: add label to pcie nodes in dts arm: dts: ls1046a: add label to pcie nodes in dts arm: dts: ls2080a: add label to pcie nodes in dts arm: dts: ls1088a: add label to pcie nodes in dts arm: dts: ls1012a: add label to pcie nodes in dts arm: dts: ls1043a: add label to pcie nodes in dts arm: dts: ls1028a: add label to pcie nodes in dts pci: layerscape: Add size check for config resource pci: ls_pcie_g4: Add size check for config resource arch/arm/dts/fsl-ls1012a.dtsi| 3 ++- arch/arm/dts/fsl-ls1028a.dtsi| 6 +++--- arch/arm/dts/fsl-ls1043a.dtsi| 9 + arch/arm/dts/fsl-ls1046a.dtsi| 12 ++-- arch/arm/dts/fsl-ls1088a.dtsi| 8 arch/arm/dts/fsl-ls2080a.dtsi| 11 ++- arch/arm/dts/fsl-lx2160a.dtsi| 12 ++-- configs/lx2160aqds_tfa_SECURE_BOOT_defconfig | 1 + configs/lx2160aqds_tfa_defconfig | 1 + configs/lx2160ardb_tfa_SECURE_BOOT_defconfig | 1 + configs/lx2160ardb_tfa_defconfig | 1 + configs/lx2160ardb_tfa_stmm_defconfig| 1 + drivers/pci/pcie_layerscape_ep.c | 4 +++- drivers/pci/pcie_layerscape_gen4.c | 19 +++ drivers/pci/pcie_layerscape_rc.c | 14 +++--- 15 files changed, 66 insertions(+), 37 deletions(-) -- 2.7.4
[PATCH 1/1] cmd: exception: unaligned data access on RISC-V
The command 'exception' can be used to test the handling of exceptions.
Currently the exception command only allows to create an illegal
instruction exception on RISC-V.
Provide a sub-command 'exception unaligned' to cause a misaligned load
address exception.
Adjust the online help for 'exception undefined'.
Signed-off-by: Heinrich Schuchardt
---
cmd/riscv/exception.c | 16 +++-
1 file changed, 15 insertions(+), 1 deletion(-)
diff --git a/cmd/riscv/exception.c b/cmd/riscv/exception.c
index 3c8dbbec0e..53159531d9 100644
--- a/cmd/riscv/exception.c
+++ b/cmd/riscv/exception.c
@@ -8,6 +8,17 @@
#include
#include
+static int do_unaligned(struct cmd_tbl *cmdtp, int flag, int argc,
+ char *const argv[])
+{
+ asm volatile (
+ "auipc a1, 0\n"
+ "ori a1, a1, 3\n"
+ "lwa2, (0)(a1)\n"
+ );
+ return CMD_RET_FAILURE;
+}
+
static int do_undefined(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[])
{
@@ -16,6 +27,8 @@ static int do_undefined(struct cmd_tbl *cmdtp, int flag, int
argc,
}
static struct cmd_tbl cmd_sub[] = {
+ U_BOOT_CMD_MKENT(unaligned, CONFIG_SYS_MAXARGS, 1, do_unaligned,
+"", ""),
U_BOOT_CMD_MKENT(undefined, CONFIG_SYS_MAXARGS, 1, do_undefined,
"", ""),
};
@@ -23,7 +36,8 @@ static struct cmd_tbl cmd_sub[] = {
static char exception_help_text[] =
"\n"
" The following exceptions are available:\n"
- " undefined - undefined instruction\n"
+ " undefined - illegal instruction\n"
+ " unaligned - load address misaligned\n"
;
#include
--
2.27.0
Re: [PATCH 1/1] riscv: fix building with CONFIG_SPL_SMP=n
On 04.08.20 03:46, Bin Meng wrote:
> On Tue, Aug 4, 2020 at 5:26 AM Heinrich Schuchardt wrote:
>>
>> Building with CONFIG_SPL_SMP=n results in:
>>
>> arch/riscv/lib/spl.c: In function ‘jump_to_image_no_args’:
>> arch/riscv/lib/spl.c:33:6:
>> error: unused variable ‘ret’ [-Werror=unused-variable]
>>33 | int ret;
>> | ^~~
>>
>> Define the variable ret as __maybe_unused.
>>
>> Fixes: 191636e44898 ("riscv: Introduce SPL_SMP Kconfig option for U-Boot
>> SPL")
>
> This should be on the same line
Commit messages should not exceed 75 characters. See scripts/checkpatch.pl:
WARN("COMMIT_LOG_LONG_LINE",
"Possible unwrapped commit description (prefer a maximum 75 chars per
line)\n" . $herecurr);
Best regards
Heinrich
>
>> Fixes: 8c59f2023cc8 ("riscv: add SPL support")
>> Signed-off-by: Heinrich Schuchardt
>> ---
>> arch/riscv/lib/spl.c | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/arch/riscv/lib/spl.c b/arch/riscv/lib/spl.c
>> index c47dcd46ce..ef00ec2bcc 100644
>> --- a/arch/riscv/lib/spl.c
>> +++ b/arch/riscv/lib/spl.c
>> @@ -30,7 +30,7 @@ void __noreturn jump_to_image_no_args(struct
>> spl_image_info *spl_image)
>> {
>> typedef void __noreturn (*image_entry_riscv_t)(ulong hart, void
>> *dtb);
>> void *fdt_blob;
>> - int ret;
>> + __maybe_unused int ret;
>>
>> #if CONFIG_IS_ENABLED(LOAD_FIT) || CONFIG_IS_ENABLED(LOAD_FIT_FULL)
>> fdt_blob = spl_image->fdt_addr;
>
> Reviewed-by: Bin Meng
>
[PATCH] ddr: socfpga: stratix10: Use phys_size_t for memory size
From: Tien Fong Chee Replace with phys_size_t for better scalable. phys_size_t is defined in arch/arm/include/asm/types.h . Signed-off-by: Tien Fong Chee --- drivers/ddr/altera/sdram_s10.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/ddr/altera/sdram_s10.c b/drivers/ddr/altera/sdram_s10.c index 2945f1e1df..5d24a5800a 100644 --- a/drivers/ddr/altera/sdram_s10.c +++ b/drivers/ddr/altera/sdram_s10.c @@ -276,7 +276,7 @@ int sdram_mmr_init_full(struct udevice *dev) DDR_SCH_DEVTODEV); /* assigning the SDRAM size */ - unsigned long long size = sdram_calculate_size(plat); + phys_size_t size = sdram_calculate_size(plat); /* If the size is invalid, use default Config size */ if (size <= 0) hw_size = PHYS_SDRAM_1_SIZE; -- 2.13.0
Re: [PATCH 1/4] firmware: add new driver for SCMI firmwares
Hello Simon,
Thanks for the feedback, I'll fix the changes in my v2.
and sorry for these delayed answers.
On Sun, 26 Jul 2020 at 16:55, Simon Glass wrote:
>
> Hi Etienne,
>
> On Fri, 17 Jul 2020 at 09:38, Etienne Carriere
> wrote:
> >
> > This change introduces SCMI agent driver in U-Boot in the firmware
> > U-class.
> >
> > SCMI agent driver is designed for platforms that embed a SCMI server in
> > a firmware hosted for example by a companion co-processor or the secure
> > world of the executing processor.
> >
> > SCMI protocols allow an SCMI agent to discover and access external
> > resources as clock, reset controllers and many more. SCMI agent and
> > server communicate following the SCMI specification [1]. SCMI agent
> > complies with the DT bindings defined in the Linux kernel source tree
> > regarding SCMI agent description since v5.8-rc1.
> >
> > These bindings describe 2 supported message transport layer: using
> > mailbox uclass devices or using Arm SMC invocation instruction. Both
> > use a piece or shared memory for message data exchange.
> >
> > In the current state, the SCMI agent driver does not bind to any SCMI
> > protocol to a U-Boot device driver. Former changes will implement
> > dedicated driver (i.e. an SCMI clock driver or an SCMI reset controller
> > driver) and add bind supported SCMI protocols in scmi_agent_bind().
> >
> > Links: [1]
> > https://developer.arm.com/architectures/system-architectures/software-standards/scmi
> > Signed-off-by: Etienne Carriere
> > ---
> >
> > drivers/firmware/Kconfig | 15 ++
> > drivers/firmware/Makefile | 1 +
> > drivers/firmware/scmi.c | 439 ++
> > include/scmi.h| 82 +++
> > 4 files changed, 537 insertions(+)
> > create mode 100644 drivers/firmware/scmi.c
> > create mode 100644 include/scmi.h
> >
> > diff --git a/drivers/firmware/Kconfig b/drivers/firmware/Kconfig
> > index b70a2063551..f7c7ee7a5aa 100644
> > --- a/drivers/firmware/Kconfig
> > +++ b/drivers/firmware/Kconfig
> > @@ -1,6 +1,21 @@
> > config FIRMWARE
> > bool "Enable Firmware driver support"
> >
> > +config SCMI_FIRMWARE
> > + bool "Enable SCMI support"
> > + select FIRMWARE
> > + select OF_TRANSLATE
> > + depends on DM_MAILBOX || ARM_SMCCC
> > + help
> > + An SCMI agent communicates with a related SCMI server firmware
>
> Please write out SCMI in full somewhere and add a link to the spec.
>
> > + located in another sub-system, as a companion micro controller
> > + or a companion host in the CPU system.
> > +
> > + Communications between agent (client) and the SCMI server are
> > + based on message exchange. Messages can be exchange over tranport
> > + channels as a mailbox device or an Arm SMCCC service with some
> > + piece of identified shared memory.
> > +
> > config SPL_FIRMWARE
> > bool "Enable Firmware driver support in SPL"
> > depends on FIRMWARE
> > diff --git a/drivers/firmware/Makefile b/drivers/firmware/Makefile
> > index a0c250a473e..3965838179f 100644
> > --- a/drivers/firmware/Makefile
> > +++ b/drivers/firmware/Makefile
> > @@ -2,4 +2,5 @@ obj-$(CONFIG_FIRMWARE) += firmware-uclass.o
> > obj-$(CONFIG_$(SPL_)ARM_PSCI_FW) += psci.o
> > obj-$(CONFIG_TI_SCI_PROTOCOL) += ti_sci.o
> > obj-$(CONFIG_SANDBOX) += firmware-sandbox.o
> > +obj-$(CONFIG_SCMI_FIRMWARE)+= scmi.o
> > obj-$(CONFIG_ZYNQMP_FIRMWARE) += firmware-zynqmp.o
> > diff --git a/drivers/firmware/scmi.c b/drivers/firmware/scmi.c
> > new file mode 100644
> > index 000..fa8a91c3f3d
> > --- /dev/null
> > +++ b/drivers/firmware/scmi.c
> > @@ -0,0 +1,439 @@
> > +// SPDX-License-Identifier: GPL-2.0+
> > +/*
> > + * Copyright (c) 2015-2019, Arm Limited and Contributors. All rights
> > reserved.
> > + * Copyright (C) 2019-2020 Linaro Limited.
> > + */
> > +
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +
> > +#define TIMEOUT_US_10MS1
> > +
> > +struct error_code {
>
> Function comment
>
> > + int scmi;
> > + int errno;
> > +};
> > +
> > +static const struct error_code scmi_linux_errmap[] = {
> > + { .scmi = SCMI_NOT_SUPPORTED, .errno = -EOPNOTSUPP, },
> > + { .scmi = SCMI_INVALID_PARAMETERS, .errno = -EINVAL, },
> > + { .scmi = SCMI_DENIED, .errno = -EACCES, },
> > + { .scmi = SCMI_NOT_FOUND, .errno = -ENOENT, },
> > + { .scmi = SCMI_OUT_OF_RANGE, .errno = -ERANGE, },
> > + { .scmi = SCMI_BUSY, .errno = -EBUSY, },
> > + { .scmi = SCMI_COMMS_ERROR, .errno = -ECOMM, },
> > + { .scmi = SCMI_GENERIC_ERROR, .errno = -EIO, },
> > + { .scmi = SCMI_HARDWARE_ERROR, .errno = -EREMOTEIO, },
> >
[PATCH 2/2] env/ext4.c: allow loading from an EXT4 partition on the MMC boot device
This parallels what I added for FAT in commit 6731bef6966, allowing the
environment to be found in a specific partition on the device that the
board's mmc_get_env_dev() returns. On the Banana Pi R2 that means the
device that U-Boot was loaded from; either the internal eMMC or an SD
card.
Signed-off-by: David Woodhouse
---
env/Kconfig | 4
env/ext4.c | 14 ++
2 files changed, 18 insertions(+)
diff --git a/env/Kconfig b/env/Kconfig
index 5d0a8ecea0..ae449ea92c 100644
--- a/env/Kconfig
+++ b/env/Kconfig
@@ -476,6 +476,10 @@ config ENV_EXT4_DEVICE_AND_PART
If none, first valid partition in device D. If no
partition table then means device D.
+ If ENV_EXT4_INTERFACE is set to "mmc" then device 'D' can be omitted,
+ leaving the string starting with a colon, and the boot device will
+ be used.
+
config ENV_EXT4_FILE
string "Name of the EXT4 file to use for the environment"
depends on ENV_IS_IN_EXT4
diff --git a/env/ext4.c b/env/ext4.c
index f823b69409..e666f7b945 100644
--- a/env/ext4.c
+++ b/env/ext4.c
@@ -41,7 +41,21 @@ __weak const char *env_ext4_get_intf(void)
__weak const char *env_ext4_get_dev_part(void)
{
+#ifdef CONFIG_MMC
+ static char *part_str;
+
+ if (!part_str) {
+ part_str = CONFIG_ENV_EXT4_DEVICE_AND_PART;
+ if (!strcmp(CONFIG_ENV_EXT4_INTERFACE, "mmc") && part_str[0] ==
':') {
+ part_str = "0" CONFIG_ENV_EXT4_DEVICE_AND_PART;
+ part_str[0] += mmc_get_env_dev();
+ }
+ }
+
+ return part_str;
+#else
return (const char *)CONFIG_ENV_EXT4_DEVICE_AND_PART;
+#endif
}
static int env_ext4_save_buffer(env_t *env_new)
--
2.26.2
[PATCH 1/2] mmc: remove duplicate mmc_get_env_dev() implementations
Since it's so trivial I could just about tolerate this when there were only
two copies of it. But now there are about to be three.
Signed-off-by: David Woodhouse
---
drivers/mmc/mmc.c | 9 +
env/fat.c | 9 -
env/mmc.c | 9 -
3 files changed, 9 insertions(+), 18 deletions(-)
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index d79cdef62e..11ce110df3 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -3111,3 +3111,12 @@ int mmc_set_bkops_enable(struct mmc *mmc)
return 0;
}
#endif
+
+__weak int mmc_get_env_dev(void)
+{
+#ifdef CONFIG_SYS_MMC_ENV_DEV
+ return CONFIG_SYS_MMC_ENV_DEV;
+#else
+ return 0;
+#endif
+}
diff --git a/env/fat.c b/env/fat.c
index 71bf8bfa18..653a38fd93 100644
--- a/env/fat.c
+++ b/env/fat.c
@@ -29,15 +29,6 @@
# define LOADENV
#endif
-__weak int mmc_get_env_dev(void)
-{
-#ifdef CONFIG_SYS_MMC_ENV_DEV
- return CONFIG_SYS_MMC_ENV_DEV;
-#else
- return 0;
-#endif
-}
-
static char *env_fat_device_and_part(void)
{
#ifdef CONFIG_MMC
diff --git a/env/mmc.c b/env/mmc.c
index af7e5fbac3..4e67180b23 100644
--- a/env/mmc.c
+++ b/env/mmc.c
@@ -24,15 +24,6 @@
DECLARE_GLOBAL_DATA_PTR;
-#if !defined(CONFIG_SYS_MMC_ENV_DEV)
-#define CONFIG_SYS_MMC_ENV_DEV 0
-#endif
-
-__weak int mmc_get_env_dev(void)
-{
- return CONFIG_SYS_MMC_ENV_DEV;
-}
-
#if CONFIG_IS_ENABLED(OF_CONTROL)
static inline int mmc_offset_try_partition(const char *str, int copy, s64 *val)
{
--
2.26.2
[GIT PULL] Pull request: u-boot-imx u-boot-imx-20200804
Hi Tom, please pull from u-boot-imx, thanks ! The following changes since commit ada61f1ee2a4eaa1b29d699b5ba940483171df8a: Merge https://gitlab.denx.de/u-boot/custodians/u-boot-riscv (2020-07-24 08:43:08 -0400) are available in the Git repository at: https://gitlab.denx.de/u-boot/custodians/u-boot-imx.git tags/u-boot-imx-20200804 for you to fetch changes up to 3e980a2d8bd13d0d1c2d5cec9e57a47b6cff8b92: configs: pico-imx6: convert ethernet function to DM_ETH (2020-08-03 17:03:57 +0200) For 2020.10 --- - fixes for Toradex board - fix warnings from previous PR - HAB: reset instead of panic after failure - new board: MYiR Tech MYS-6ULX - mx6cuboxi: use OF_PLATDATA - further changes for DM Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/714513163 Dan Murphy (1): dm: Fix build error when OF_CONTROL is not set Fabio Estevam (2): imx8m: ddrphy_utils: Improve coding style imx8m: soc: Remove unneeded space Igor Opaniuk (14): imx: mx7: fix DDRC size in A7-M4 mapping table toradex: tdx-cfg-block: add EEPROM read/store wrappers toradex: tdx-cfg-block: add carrier boards and display adapters toradex: tdx-cfg-block: add support for EEPROM toradex: tdx-cfg-clock: add migration routine from PID8 toradex: tdx-cfg-block: add carrier board info printing ARM: dts: imx8mm-verdin: eeprom nodes adjustments verdin-imx8mm: add EEPROM support for carrier board ARM: dts: imx6ull-colibri: move u-boot specific node toradex: common: show boot logo ARM: dts: imx7-colibri: multiple node updates colibri-imx6ull: show boot logo colibri-imx6ull: fix splash screen logo drawing colibri-imx7: fix splash logo drawing Marek Vasut (1): ARM: imx: hab: panic on authentication failure Niel Fourie (1): arm: imx6q: pcm058: Rework SPI NOR configuration Parthiban Nallathambi (1): imx: Add MYiR Tech MYS-6ULX support Peng Fan (1): imx8m: enlarge CONFIG_SYS_BOOTM_LEN Walter Lozano (6): mmc: fsl_esdhc_imx: rename driver name to match ll_entry mmc: fsl_esdhc_imx: add OF_PLATDATA support gpio: mxc_gpio: add OF_PLATDATA support mmc: fsl_esdhc_imx: add CD support when OF_PLATDATA is enabled drivers: rename more drivers to match compatible string mx6cuboxi: enable OF_PLATDATA Wig Cheng (1): configs: pico-imx6: convert ethernet function to DM_ETH arch/arm/Kconfig| 1 + arch/arm/dts/Makefile | 1 + arch/arm/dts/imx6ull-colibri-u-boot.dtsi| 45 + arch/arm/dts/imx6ull-colibri.dtsi | 43 --- arch/arm/dts/imx6ull-myir-mys-6ulx-eval.dts | 19 arch/arm/dts/imx6ull-myir-mys-6ulx.dtsi | 238 arch/arm/dts/imx6ull-mys-6ulx-u-boot.dtsi | 24 arch/arm/dts/imx7-colibri-emmc.dts | 2 +- arch/arm/dts/imx7-colibri-rawnand.dts | 10 + arch/arm/dts/imx7-colibri-u-boot.dtsi | 39 arch/arm/dts/imx7-colibri.dtsi | 65 ++--- arch/arm/dts/imx8mm-verdin.dts | 22 +++--- arch/arm/mach-imx/imx8m/soc.c | 2 +- arch/arm/mach-imx/mx6/Kconfig | 12 ++ arch/arm/mach-imx/mx7/soc.c | 2 +- arch/arm/mach-imx/spl.c | 6 ++--- board/myir/mys_6ulx/Kconfig | 12 ++ board/myir/mys_6ulx/MAINTAINERS | 9 board/myir/mys_6ulx/Makefile| 4 board/myir/mys_6ulx/README | 52 ++ board/myir/mys_6ulx/mys_6ulx.c | 117 +++ board/myir/mys_6ulx/spl.c | 206 ++ board/phytec/pcm058/README | 20 ++--- board/toradex/colibri-imx6ull/colibri-imx6ull.c | 40 ++--- board/toradex/colibri_imx7/MAINTAINERS | 1 + board/toradex/colibri_imx7/colibri_imx7.c | 44 ++-- board/toradex/common/Kconfig| 18 +++ board/toradex/common/Makefile
[PATCH v3 6/6] mx6cuboxi: enable OF_PLATDATA
> As both MMC and GPIO driver now supports OF_PLATDATA, enable it in > defconfig in order to reduce the SPL footprint. After applying this > setting the SPL reduction is 5 KB, which partially compensates the > increment due to DM. > Signed-off-by: Walter Lozano > Reviewed-by: Simon Glass Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
Re: [PATCH 1/1] riscv: remove redundant logical constraint.
> From: Heinrich Schuchardt [mailto:xypron.g...@gmx.de] > Sent: Tuesday, August 04, 2020 5:34 AM > To: Rick Jian-Zhi Chen(陳建志) > Cc: Anatolij Gustschin; Bin Meng; Sean Anderson; Simon Glass; Lukas Auer; > u-boot@lists.denx.de; Heinrich Schuchardt > Subject: [PATCH 1/1] riscv: remove redundant logical constraint. > > After > > if (ret) return ret; > > we know that ret is zero. Don't check it again. > > Signed-off-by: Heinrich Schuchardt > --- > arch/riscv/lib/andes_plic.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Reviewed-by: Rick Chen
[PATCH] imx8m: enlarge CONFIG_SYS_BOOTM_LEN
> From: Peng Fan > Enlarge CONFIG_SYS_BOOTM_LEN when booting FIT image with AArch32 mode > Linux kernel. > Signed-off-by: Peng Fan Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH v3 5/6] drivers: rename more drivers to match compatible string
> Continuing with the approach in commit rename > additional drivers to allow the OF_PLATDATA support. > Signed-off-by: Walter Lozano > Reviewed-by: Simon Glass Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH v3 2/6] mmc: fsl_esdhc_imx: add OF_PLATDATA support
> In order to reduce the footprint of SPL by removing dtb and library > overhead, add OF_PLATDATA support to fsl_esdhc_imx. This initial > approach does not support card detection, which will be enabled after > adding OF_PLATDATA support to GPIO. > Signed-off-by: Walter Lozano > Reviewed-by: Simon Glass Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH v2] imx: Add MYiR Tech MYS-6ULX support
> MYS-6ULX is single board computer (SBC) comes with eMMC or NAND based > on imx6ULL SoC from NXP and provision for expansion board. This > commit adds support only for SBC with NAND. > CPU: Freescale i.MX6ULL rev1.1 528 MHz (running at 396 MHz) > CPU: Commercial temperature grade (0C to 95C) at 45C > Reset cause: WDOG > Model: MYiR i.MX6ULL MYS-6ULX Single Board Computer with NAND > Board: MYiR MYS-6ULX 6ULL Single Board Computer > DRAM: 256 MiB > NAND: 256 MiB > MMC: FSL_SDHC: 0 > In:serial@202 > Out: serial@202 > Err: serial@202 > Net: FEC0 > Working: > - Eth0 > - MMC/SD > - NAND > - UART 1 > - USB host > Signed-off-by: Parthiban Nallathambi Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH v1] configs: pico-imx6: convert ethernet function to DM_ETH
> From: Wig Cheng > Before enable _DM_ETH: > Net: FEC [PRIME] > After enable DM_ETH: > Net: eth0: ethernet@2188000 > Here is the test commands: > => dhcp > BOOTP broadcast 1 > DHCP client bound to address 10.88.88.152 (146 ms) > *** ERROR: `serverip' not set > Cannot autoload with TFTPGET > => ping 8.8.8.8 > Using ethernet@2188000 device > host 8.8.8.8 is alive > Signed-off-by: Wig Cheng Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH v3 4/6] mmc: fsl_esdhc_imx: add CD support when OF_PLATDATA is enabled
> After enabling OF_PLATDATA support to both MMC and GPIO drivers add the > support for card detection. > Signed-off-by: Walter Lozano > Reviewed-by: Simon Glass Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
