On 08/01/2021 08:39, Stefan Roese wrote:
> On 07.01.21 16:36, matthias@kernel.org wrote:
>> From: Matthias Brugger
>>
>> Watchdog timeout comes in before we are able to load the
>> kernel and reset the watchdog. Disable the watchdog late in the boot
>> process to be able to boot the board.
Unused variables should be called '_'.
Signed-off-by: Heinrich Schuchardt
---
tools/efivar.py | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tools/efivar.py b/tools/efivar.py
index 29eb90a235..67729fa850 100755
--- a/tools/efivar.py
+++ b/tools/efivar.py
@@ -292,7 +292,7 @@
When deleting a variable we must check that the GUID provided by the
user matches the GUID of the variable.
Signed-off-by: Heinrich Schuchardt
---
tools/efivar.py | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tools/efivar.py b/tools/efivar.py
index a02b09d46a..29eb90a235
According to https://pep8.org/#indentation we should use 4 spaces per
indentation level.
Signed-off-by: Heinrich Schuchardt
---
tools/efivar.py | 30 +++---
1 file changed, 15 insertions(+), 15 deletions(-)
diff --git a/tools/efivar.py b/tools/efivar.py
index
When tools: efivar.py is called without arguments an error occurs:
Traceback (most recent call last):
File "tools/efivar.py", line 380, in
main()
File "tools/efivar.py", line 360, in main
args.func(args)
AttributeError: 'Namespace' object has no attribute 'func'
Show the online help
On Thu, 7 Jan 2021 at 19:53, David Wu wrote:
>
> dev_read_alias_seq() used uc_drv->name compared to alias
> stem string, Ethernet's alias stem uses "ethernet", which
> does not match the eth-uclass driver name "eth", can not
> get the correct index of ethernet alias namer. So it seems
> change
On 08/12/2020 15:45, Andy Shevchenko wrote:
Hi,
> For the sake of consistency (*) and order of initialization, i.e.
> after we have got the ethernet address, interrupt and timer initialized,
> try to initialize USB ethernet gadget.
>
> *) for example, zynqmp uses same order.
>
> Signed-off-by:
Add a test to make sure that the ECDSA signatures generated by
mkimage can be verified successfully. pyCryptodomex was chosen as the
crypto library because it integrates much better with python code.
Using openssl would have been unnecessarily painful.
Signed-off-by: Alexandru Gagniuc
---
mkimage supports rsa2048, and rsa4096 signatures. With newer silicon
now supporting hardware-accelerated ECDSA, it makes sense to expand
signing support to elliptic curves.
Implement host-side ECDSA signing and verification with libcrypto.
Device-side implementation of signature verification is
Signed-off-by: Alexandru Gagniuc
---
doc/uImage.FIT/signature.txt | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/doc/uImage.FIT/signature.txt b/doc/uImage.FIT/signature.txt
index a3455889ed..0139295d33 100644
--- a/doc/uImage.FIT/signature.txt
+++
We wish to use pycryptodomex to verify code paths involving ECDSA
signatures. Add it to requirements.txt so that they get picked up
automatically .gitlab and .azure tasks
Signed-off-by: Alexandru Gagniuc
---
test/py/requirements.txt | 1 +
1 file changed, 1 insertion(+)
diff --git
fdt_add_bignum() is useful for algorithms other than just RSA. To
allow its use for ECDSA, move it to a common file under lib/.
The new file is suffixed with '-libcrypto' because it has a direct
dependency on openssl. This is due to the use of the "BIGNUM *" type.
Signed-off-by: Alexandru
rsa-checksum.c sontains the hash_calculate() implementations. Despite
the "rsa-" file prefix, this function is useful for other algorithms.
To prevent confusion, move this file to lib/crypto, and rename it to
hash-checksum.c, to give it a more "generic" feel.
Signed-off-by: Alexandru Gagniuc
## Purpose and intent
The purpose of this series is to enable ECDSA as an alternative to RSA
for FIT signing. As new chips have built-in support for ECDSA verified
boot, it makes sense to stick to one signing algorithm, instead of
resorting to RSA for u-boot images.
The focus of this series is
fit_print_contents prints similar fit information as printed in bootm stages.
Removing this API reduces redundancy & provides improvement in boottime.
Signed-off-by: Ravik Hasija
---
cmd/disk.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/cmd/disk.c b/cmd/disk.c
index
Hi Siew Chin,
On Thu, 7 Jan 2021 at 22:19, Lim, Elly Siew Chin
wrote:
>
> Hi Simon,
>
> > -Original Message-
> > From: Simon Glass
> > Sent: Friday, January 8, 2021 11:24 AM
> > To: Lim, Elly Siew Chin
> > Cc: U-Boot Mailing List ; Marek Vasut
> > ; Tan, Ley Foon ; See, Chin Liang
> >
Offsets are described in the datasheet at section:
"11.4.4.2 NAND Flash Boot: PMECC Error Detection and Correction".
For testing I "injected" bit flips into u-boot NAND memory area,
and then read back. PMECC could not correct the errors. With the
offsets updated everything is fine.
Fixes:
From: "Kai Stuhlemmer (ebee Engineering)"
Because ATMEL_BASE_ROM is defined to 0x10, it already points
to the begin of the index table for 512 byte sectors correction.
Thus its offset must be zero and the index of the table for 1024
byte sectors must start at offset 0x8000.
Signed-off-by:
When CONFIG_ATMEL_NAND_HW_PMECC is set, CONFIG_PMECC_CAP defaults
to the value of 2. At the conversion to Kconfig for the PMECC config
values, some boards/defconfigs were wrongly configured.
Update CONFIG_PMECC_CAP to the PMECC_CAP value before the conversion.
Fixes: 49ad40298c ("ARM: at91:
SPL_GENERATE_ATMEL_PMECC_HEADER selects:
ATMEL_NAND_HWECC [=y] && ATMEL_NAND_HW_PMECC [=y].
With the removal of SPL_GENERATE_ATMEL_PMECC_HEADER,
ATMEL_NAND_HW_PMECC and ATMEL_NAND_HWECC were no longer
selected. Also, when the SPL_GENERATE_ATMEL_PMECC_HEADER was removed,
the configs were not
Fix the Galois Field Table offsets for sama5d3 and sam9x60 SoCs.
PMECC could not correct errors.
Fix the involuntarily disablement of NAND PMECC on some boards,
and fix some wrong definitions for CONFIG_PMECC_CAP.
Tested on sam9x60ek and sama5d3_xplained. I/we "injected" bit flips
into u-boot
Copy changes done to rockpro64 in commit
c180e2939d3ccb43f89565d6660a0d6f912712b6 ("rockchip: rockpro64: fix boot
from SPI flash on spi1")
Remove the spi0 alias, set the default bus for SPI flash to 1, and
enable support for numbered aliases in SPL so that it uses the same bus
numbering as U-Boot
On Sat, Dec 26, 2020 at 01:09:02AM +0100, Lukasz Majewski wrote:
> On the XEA board (imx28) one needs in the SPL support for GPIO, MMC and
> SPI. Two last ones are necessary for booting the device. The GPIO support
> allows deciding which medium will be used. For example the GPIO DTS node
>
On Sat, Dec 26, 2020 at 01:09:01AM +0100, Lukasz Majewski wrote:
> The usage of the preboot feature is now controlled via a separate Kconfig
> option - namely CONFIG_USE_PREBOOT.
> It must be enabled for preboot code executing commands now defined in
> CONFIG_PREBOOT (also moved to the Kconfig).
On Sat, Dec 26, 2020 at 01:09:01AM +0100, Lukasz Majewski wrote:
> The usage of the preboot feature is now controlled via a separate Kconfig
> option - namely CONFIG_USE_PREBOOT.
> It must be enabled for preboot code executing commands now defined in
> CONFIG_PREBOOT (also moved to the Kconfig).
On Sat, Dec 26, 2020 at 01:09:00AM +0100, Lukasz Majewski wrote:
> On the imx287 pin GPMI_WRN (GPIO0_25) no PullUP is available that can be
> enabled.
>
> To get the same behavior for both boot select pins (i.e. GPIO0_2{35})
> disable pull UPs on both.
>
> Signed-off-by: Lukasz Majewski
On Sun, Nov 22, 2020 at 01:03:44PM +, Hugh Cole-Baker wrote:
> SPI flash on this machine is located on bus 1, default to using bus 1
> for SPI flash and stop aliasing it to bus 0.
>
> Signed-off-by: Hugh Cole-Baker
> Suggested-by: Simon Glass
> Fixes: c4cea2bb ("rockchip: Enable building a
> > > +}
> > > +
> > > +#if CONFIG_SPL_LOAD_FIT
> > > +int board_fit_config_name_match(const char *name)
> > > +{
> > > + /* Just empty function now - can't decide what to choose */
> > > + debug("%s: %s\n", __func__, name);
> > > +
> > > + return 0;
> > > +}
> >
> > This is also a dummy copied
On Tue, Jan 05, 2021 at 09:14:24AM +0100, Neil Armstrong wrote:
> On 04/01/2021 17:21, Jernej Škrabec wrote:
> > Dne ponedeljek, 04. januar 2021 ob 15:41:17 CET je Tom Rini napisal(a):
> >> On Mon, Jan 04, 2021 at 03:33:43PM +0100, Neil Armstrong wrote:
> >>> This adds support for specifying FDT
On Fri, Jan 08, 2021 at 10:38:39AM +, Peter Robinson wrote:
> > Copy changes done to rockpro64 in commit
> > c180e2939d3ccb43f89565d6660a0d6f912712b6 ("rockchip: rockpro64: fix boot
> > from SPI flash on spi1")
> >
> > Remove the spi0 alias, set the default bus for SPI flash to 1, and
> >
Hello Stefano,
Am Donnerstag, den 07.01.2021, 16:13 +0100 schrieb Stefano Babic:
> Hi Theresa,
>
> On 16.12.20 10:51, Teresa Remmet wrote:
> > Add initial support PHYTEC phyCORE-i.MX8MP SOM.
> >
> > Supported features:
> > - 2GB LPDDR4 RAM
> > - eMMC
> > - external SD
> >
Multiple product varients exists based on CAN-FD and security
bit in SVR.
Currenly SVR_SOC_VER mask only security bit. Update SVR_SOC_VER
to mask CAN_FD and security bit for LX2 products.
Signed-off-by: Wasim Khan
---
arch/arm/include/asm/arch-fsl-layerscape/soc.h | 7 +--
1 file changed, 5
Fixed randomly generated ethernet mac address!
Used meson_generate_serial_ethaddr for generate mac address from
board serial number, if ethaddr variable not defined.
Signed-off-by: Artem Lapkin
---
board/amlogic/vim3/vim3.c | 9 +
1 file changed, 9 insertions(+)
diff --git
All,
On the Devicetree evolution call Wednesday I promised to finish my
comparison of u-boot DT vs kernel DT.
The script is not perfect but the results are still interesting.
For each dts and dtsi file in the tip of the u-boot tree, it tries to
correlate it to the kernel tip.
It compares
Dear All,
I'm working on getting the board mentioned in the email subject into
upstream u-boot. I currently have u-boot proper working but I use the
at91bootstrap as the secondary program loader and not the u-boot SPL. I'm
currently working on getting the u-boot SPL working on this board and
Am Do., 7. Jan. 2021 um 05:22 Uhr schrieb Simon Glass :
>
> At present a few of the structs use u8 instead of char. This is a string,
> so char is better. Update them.
>
> Signed-off-by: Simon Glass
Reviewed-by: Christian Gmeiner
--
greets
--
Christian Gmeiner, MSc
Am Do., 7. Jan. 2021 um 05:22 Uhr schrieb Simon Glass :
>
> This type is not used outside the smbios.c file so there is no need for it
> to be in the header file. Move it.
>
> Signed-off-by: Simon Glass
Reviewed-by: Christian Gmeiner
--
greets
--
Christian Gmeiner, MSc
Add basic support for the Hitachi Power Grids kmcent2 board, based
on the NXP QorIQ T1040 SoC.
Signed-off-by: Valentin Longchamp
Signed-off-by: Rainer Boschung
Signed-off-by: Niel Fourie
Cc: Holger Brunck
Cc: Heiko Schocher
Cc: Priyanka Jain
---
arch/powerpc/cpu/mpc85xx/Kconfig | 4 +
Pulled in the kmcent2.dts and all its dependents from Linux 5.10,
commit 2c85ebc57b3e upstream. Replaced the license text with
SPDX License Identifiers.
Signed-off-by: Niel Fourie
Cc: Holger Brunck
Cc: Heiko Schocher
Cc: Priyanka Jain
---
arch/powerpc/dts/elo3-dma-0.dtsi | 55 ++
In set_km_env() the pram variable was set to an hexadecimal value,
while initr_mem() expects an unsigned decimal. Set the pram variable
to an unsigned decimal instead.
Signed-off-by: Niel Fourie
Cc: Holger Brunck
Cc: Heiko Schocher
Cc: Priyanka Jain
---
board/keymile/common/common.c | 2 +-
This patch series adds basic support for the Hitachi Power Grids
(previously Keymile and ABB) kmcent2 board, based on the NXP QorIQ
T1040 SoC.
Patch 1/3 pulls in the device trees from Linux 5.10
Patch 2/3 fixes a minor bug common to all the Keymile boards.
Patch 3/3 finally adds the U-boot
> Copy changes done to rockpro64 in commit
> c180e2939d3ccb43f89565d6660a0d6f912712b6 ("rockchip: rockpro64: fix boot
> from SPI flash on spi1")
>
> Remove the spi0 alias, set the default bus for SPI flash to 1, and
> enable support for numbered aliases in SPL so that it uses the same bus
>
Hi Marek
On 1/7/21 7:16 PM, Marek Vasut wrote:
> On 1/7/21 5:33 PM, Stephen Warren wrote:
>> On 1/7/21 3:12 AM, Marek Vasut wrote:
>>> The DWMAC4 IP has the possibility to skip up to 7 AXI bus width size words
>>> after the descriptor. Use this to pad the descriptors to cacheline size and
>>>
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