[PATCH v2 2/2] usb: host: ehci-generic: Remove DM_REGULATOR flag

2022-05-05 Thread Patrice Chotard
Since commit 16cc5ad0b439 ("power: regulator: add dummy helper")
regulator dummy helper are always available even if DM_REGULATOR
is not set.
DM_REGULATOR flag is no more needed to protect no DM core,
remove it.

Signed-off-by: Patrice Chotard 
---

Changes in v2:
  - update commit message

 drivers/usb/host/ehci-generic.c | 14 --
 1 file changed, 14 deletions(-)

diff --git a/drivers/usb/host/ehci-generic.c b/drivers/usb/host/ehci-generic.c
index 8760169035..4734af0396 100644
--- a/drivers/usb/host/ehci-generic.c
+++ b/drivers/usb/host/ehci-generic.c
@@ -26,12 +26,9 @@ struct generic_ehci {
struct clk_bulk clocks;
struct reset_ctl_bulk resets;
struct phy phy;
-#ifdef CONFIG_DM_REGULATOR
struct udevice *vbus_supply;
-#endif
 };
 
-#ifdef CONFIG_DM_REGULATOR
 static int ehci_enable_vbus_supply(struct udevice *dev)
 {
struct generic_ehci *priv = dev_get_priv(dev);
@@ -62,17 +59,6 @@ static int ehci_disable_vbus_supply(struct generic_ehci 
*priv)
else
return 0;
 }
-#else
-static int ehci_enable_vbus_supply(struct udevice *dev)
-{
-   return 0;
-}
-
-static int ehci_disable_vbus_supply(struct generic_ehci *priv)
-{
-   return 0;
-}
-#endif
 
 static int ehci_usb_probe(struct udevice *dev)
 {
-- 
2.25.1



[PATCH v2 1/2] usb: host: ehci-generic: Make usage of clock/reset bulk() API

2022-05-05 Thread Patrice Chotard
Make usage of clock and reset bulk API in order to simplify the code

Signed-off-by: Patrice Chotard 
---

Changes in v2:
  - add the error code in all dev_err() output.

 drivers/usb/host/ehci-generic.c | 103 ++--
 1 file changed, 32 insertions(+), 71 deletions(-)

diff --git a/drivers/usb/host/ehci-generic.c b/drivers/usb/host/ehci-generic.c
index 4c28a69b98..8760169035 100644
--- a/drivers/usb/host/ehci-generic.c
+++ b/drivers/usb/host/ehci-generic.c
@@ -23,14 +23,12 @@
  */
 struct generic_ehci {
struct ehci_ctrl ctrl;
-   struct clk *clocks;
-   struct reset_ctl *resets;
+   struct clk_bulk clocks;
+   struct reset_ctl_bulk resets;
struct phy phy;
 #ifdef CONFIG_DM_REGULATOR
struct udevice *vbus_supply;
 #endif
-   int clock_count;
-   int reset_count;
 };
 
 #ifdef CONFIG_DM_REGULATOR
@@ -47,7 +45,7 @@ static int ehci_enable_vbus_supply(struct udevice *dev)
if (priv->vbus_supply) {
ret = regulator_set_enable(priv->vbus_supply, true);
if (ret) {
-   dev_err(dev, "Error enabling VBUS supply\n");
+   dev_err(dev, "Error enabling VBUS supply (ret=%d)\n", 
ret);
return ret;
}
} else {
@@ -81,68 +79,31 @@ static int ehci_usb_probe(struct udevice *dev)
struct generic_ehci *priv = dev_get_priv(dev);
struct ehci_hccr *hccr;
struct ehci_hcor *hcor;
-   int i, err, ret, clock_nb, reset_nb;
+   int err, ret;
 
err = 0;
-   priv->clock_count = 0;
-   clock_nb = ofnode_count_phandle_with_args(dev_ofnode(dev), "clocks",
- "#clock-cells", 0);
-   if (clock_nb > 0) {
-   priv->clocks = devm_kcalloc(dev, clock_nb, sizeof(struct clk),
-   GFP_KERNEL);
-   if (!priv->clocks)
-   return -ENOMEM;
-
-   for (i = 0; i < clock_nb; i++) {
-   err = clk_get_by_index(dev, i, &priv->clocks[i]);
-
-   if (err < 0)
-   break;
-   err = clk_enable(&priv->clocks[i]);
-   if (err && err != -ENOSYS) {
-   dev_err(dev, "failed to enable clock %d\n", i);
-   clk_free(&priv->clocks[i]);
-   goto clk_err;
-   }
-   priv->clock_count++;
-   }
-   } else {
-   if (clock_nb != -ENOENT) {
-   dev_err(dev, "failed to get clock phandle(%d)\n",
-   clock_nb);
-   return clock_nb;
-   }
+   ret = clk_get_bulk(dev, &priv->clocks);
+   if (ret) {
+   dev_err(dev, "Failed to get clocks (ret=%d)\n", ret);
+   return ret;
}
 
-   priv->reset_count = 0;
-   reset_nb = ofnode_count_phandle_with_args(dev_ofnode(dev), "resets",
- "#reset-cells", 0);
-   if (reset_nb > 0) {
-   priv->resets = devm_kcalloc(dev, reset_nb,
-   sizeof(struct reset_ctl),
-   GFP_KERNEL);
-   if (!priv->resets)
-   return -ENOMEM;
-
-   for (i = 0; i < reset_nb; i++) {
-   err = reset_get_by_index(dev, i, &priv->resets[i]);
-   if (err < 0)
-   break;
-
-   if (reset_deassert(&priv->resets[i])) {
-   dev_err(dev, "failed to deassert reset %d\n",
-   i);
-   reset_free(&priv->resets[i]);
-   goto reset_err;
-   }
-   priv->reset_count++;
-   }
-   } else {
-   if (reset_nb != -ENOENT) {
-   dev_err(dev, "failed to get reset phandle(%d)\n",
-   reset_nb);
-   goto clk_err;
-   }
+   err = clk_enable_bulk(&priv->clocks);
+   if (err) {
+   dev_err(dev, "Failed to enable clocks (err=%d)\n", err);
+   goto clk_err;
+   }
+
+   err = reset_get_bulk(dev, &priv->resets);
+   if (err) {
+   dev_err(dev, "Failed to get resets (err=%d)\n", err);
+   goto clk_err;
+   }
+
+   err = reset_deassert_bulk(&priv->resets);
+   if (err) {
+   dev_err(dev, "Failed to get deassert resets (err=%d)\n", err);
+   goto reset_err;
}
 
err = ehci_enable_vbus_supply(dev);
@@ -166,21 +127,21 @@ static int ehci_usb_probe(struct udevice *dev)
 phy_err:
ret = ehci_shutdown_phy(d

[PATCH] arm64: versal: Add support to load an app at EL1

2022-05-05 Thread Ashok Reddy Soma
Add support to switch to EL1 and load an EL1 app from U-Boot which is
executing at EL2 or EL3 in aarch64 mode.

Signed-off-by: Ashok Reddy Soma 
---

 board/xilinx/versal/board.c | 17 +
 1 file changed, 17 insertions(+)

diff --git a/board/xilinx/versal/board.c b/board/xilinx/versal/board.c
index 2e2807eee4..a0f937eb45 100644
--- a/board/xilinx/versal/board.c
+++ b/board/xilinx/versal/board.c
@@ -91,6 +91,23 @@ int board_early_init_r(void)
return 0;
 }
 
+unsigned long do_go_exec(ulong (*entry)(int, char * const []), int argc,
+char *const argv[])
+{
+   int ret = 0;
+
+   if (current_el() > 1) {
+   smp_kick_all_cpus();
+   dcache_disable();
+   armv8_switch_to_el1(0x0, 0, 0, 0, (unsigned long)entry,
+   ES_TO_AARCH64);
+   } else {
+   printf("FAIL: current EL is not above EL1\n");
+   ret = EINVAL;
+   }
+   return ret;
+}
+
 static u8 versal_get_bootmode(void)
 {
u8 bootmode;
-- 
2.17.1



Re: [PATCH] watchdog: Add MAX6370 watchdog timer driver

2022-05-05 Thread Stefan Roese

On 05.05.22 19:15, Pali Rohár wrote:

On Thursday 05 May 2022 11:36:09 Pali Rohár wrote:

On Tuesday 03 May 2022 07:16:34 Stefan Roese wrote:

On 02.05.22 18:41, Pali Rohár wrote:

MAX6370 watchdog is available e.g. on Freescale P1/P2 RDB-PC boards.

Signed-off-by: Pali Rohár 
---
   drivers/watchdog/Kconfig   |   7 ++
   drivers/watchdog/Makefile  |   1 +
   drivers/watchdog/max6370_wdt.c | 119 +
   3 files changed, 127 insertions(+)
   create mode 100644 drivers/watchdog/max6370_wdt.c

diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index f90f0ca02bce..1801698ac512 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -167,6 +167,13 @@ config WDT_GPIO
  doc/device-tree-bindings/watchdog/gpio-wdt.txt for
  information on how to describe the watchdog in device tree.
+config WDT_MAX6370
+   bool "MAX6370 watchdog timer support"
+   depends on WDT
+   select DM_GPIO
+   help
+ Select this to enable max6370 watchdog timer.
+
   config WDT_MPC8xx
bool "MPC8xx watchdog timer support"
depends on WDT && MPC8xx
diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile
index a35bd559f51b..f999e4126b4f 100644
--- a/drivers/watchdog/Makefile
+++ b/drivers/watchdog/Makefile
@@ -27,6 +27,7 @@ obj-$(CONFIG_WDT_CORTINA) += cortina_wdt.o
   obj-$(CONFIG_WDT_ORION) += orion_wdt.o
   obj-$(CONFIG_WDT_CDNS) += cdns_wdt.o
   obj-$(CONFIG_WDT_GPIO) += gpio_wdt.o
+obj-$(CONFIG_WDT_MAX6370) += max6370_wdt.o
   obj-$(CONFIG_WDT_MPC8xx) += mpc8xx_wdt.o
   obj-$(CONFIG_WDT_MT7620) += mt7620_wdt.o
   obj-$(CONFIG_WDT_MT7621) += mt7621_wdt.o
diff --git a/drivers/watchdog/max6370_wdt.c b/drivers/watchdog/max6370_wdt.c
new file mode 100644
index ..556c6a4b6d6b
--- /dev/null
+++ b/drivers/watchdog/max6370_wdt.c
@@ -0,0 +1,119 @@
+// SPDX-License-Identifier: GPL-2.0+
+// (C) 2022 Pali Rohár 
+
+#include 


AFAIK, it's not recommended any more to include "common.h" in general.


Hello! I checked that driver compiles without any errors/warnings also
when common.h is removed. So it can be dropped.


I have tested this driver on P2020 board. Together with P2020 board code
workaround which I sent in separate patch, watchdog is working correctly
https://patchwork.ozlabs.org/project/uboot/patch/20220501122314.32626-2-p...@kernel.org/


Good. I'll send a pull request for the MAX6370 watchdog driver later
today. I've removed including "common.h" here.

Thanks,
Stefan


Looks good, other than this:

Reviewed-by: Stefan Roese 

Thanks,
Stefan


+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define MAX6370_SET_MASK   0x7
+#define MAX6370_SET_1MS0x0
+#define MAX6370_SET_10MS   0x1
+#define MAX6370_SET_30MS   0x2
+#define MAX6370_SET_DISABLE0x3
+#define MAX6370_SET_100MS  0x4
+#define MAX6370_SET_1S 0x5
+#define MAX6370_SET_10S0x6
+#define MAX6370_SET_60S0x7
+
+#define MAX6370_WDI0x8
+
+struct max6370_wdt {
+   void __iomem *reg;
+   struct gpio_desc gpio_wdi;
+};
+
+static int max6370_wdt_start(struct udevice *dev, u64 ms, ulong flags)
+{
+   struct max6370_wdt *wdt = dev_get_priv(dev);
+   u8 val;
+
+   val = readb(wdt->reg);
+   val &= ~MAX6370_SET_MASK;
+
+   if (ms <= 1)
+   val |= MAX6370_SET_1MS;
+   else if (ms <= 10)
+   val |= MAX6370_SET_10MS;
+   else if (ms <= 30)
+   val |= MAX6370_SET_30MS;
+   else if (ms <= 100)
+   val |= MAX6370_SET_100MS;
+   else if (ms <= 1000)
+   val |= MAX6370_SET_1S;
+   else if (ms <= 1)
+   val |= MAX6370_SET_10S;
+   else
+   val |= MAX6370_SET_60S;
+
+   writeb(val, wdt->reg);
+
+   return 0;
+}
+
+static int max6370_wdt_stop(struct udevice *dev)
+{
+   struct max6370_wdt *wdt = dev_get_priv(dev);
+   u8 val;
+
+   val = readb(wdt->reg);
+   val &= ~MAX6370_SET_MASK;
+   val |= MAX6370_SET_DISABLE;
+   writeb(val, wdt->reg);
+
+   return 0;
+}
+
+static int max6370_wdt_reset(struct udevice *dev)
+{
+   struct max6370_wdt *wdt = dev_get_priv(dev);
+   u8 val;
+
+   if (dm_gpio_is_valid(&wdt->gpio_wdi)) {
+   dm_gpio_set_value(&wdt->gpio_wdi, 1);
+   udelay(1);
+   dm_gpio_set_value(&wdt->gpio_wdi, 0);
+   } else {
+   val = readb(wdt->reg);
+   writeb(val | MAX6370_WDI, wdt->reg);
+   writeb(val & ~MAX6370_WDI, wdt->reg);
+   }
+
+   return 0;
+}
+
+static int max6370_wdt_probe(struct udevice *dev)
+{
+   struct max6370_wdt *wdt = dev_get_priv(dev);
+
+   wdt->reg = dev_read_addr_ptr(dev);
+   if (!wdt->reg)
+   return -EINVAL;
+
+   /* WDI gpio is optional */
+   gpio_request_by_name(dev, "gpios", 0, &wdt->gpio_wdi, GPIOD_IS_OUT);
+
+   return 0;
+}
+
+st

[PATCH RFC v2 11/11] ti: dtsi: j721e: Use binman to package tispl.bin

2022-05-05 Thread Neha Malcom Francis
Explicit make commands were earlier used to generate tispl.bin image,
now it is replaced using binman.

Binman picks up and packages entries according to the description of
entries given in the binman node in the device tree. The make commands
that were earlier responsible for generating tispl.bin has been removed.

k3-j721e-a72-binman.dtsi has been introduced for A72 specific binman node.
It can be included in files that require it like
k3-j721e-common-proc-board-u-boot.dtsi.

Note that make commands for secure devices has also been removed as
focus is on general purpose devices at present time.

Signed-off-by: Tarun Sahu 
[n-fran...@ti.com: prepared patch for upstreaming]
Signed-off-by: Neha Malcom Francis 
---
 arch/arm/dts/k3-j721e-a72-binman.dtsi | 86 +++
 .../k3-j721e-common-proc-board-u-boot.dtsi|  1 +
 arch/arm/mach-k3/config.mk| 33 ---
 board/ti/j721e/Kconfig|  1 +
 scripts/Makefile.spl  |  4 -
 5 files changed, 88 insertions(+), 37 deletions(-)
 create mode 100644 arch/arm/dts/k3-j721e-a72-binman.dtsi

diff --git a/arch/arm/dts/k3-j721e-a72-binman.dtsi 
b/arch/arm/dts/k3-j721e-a72-binman.dtsi
new file mode 100644
index 00..beb3424bb9
--- /dev/null
+++ b/arch/arm/dts/k3-j721e-a72-binman.dtsi
@@ -0,0 +1,86 @@
+// SPDX-License-Identifier: GPL-2.0+
+// Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+
+#include 
+
+#ifdef CONFIG_ARM64
+/ {
+   binman: binman {
+   multiple-images;
+   };
+};
+
+&binman {
+   tispl {
+   filename = "tispl.bin";
+   fit {
+   description = "FIT IMAGE";
+   #address-cells = <1>;
+   images {
+   atf {
+   description = "ARM Trusted Firmware";
+   type = "firmware";
+   arch = "arm64";
+   compression = "none";
+   os = "arm-trusted-firmware";
+   load = ;
+   entry = ;
+   atf-bl31 {
+   };
+   };
+   tee {
+   description = "OPTEE";
+   type = "tee";
+   arch = "arm64";
+   compression = "none";
+   os = "tee";
+   load = <0x9e80>;
+   entry = <0x9e80>;
+   tee-os {
+   };
+   };
+   dm {
+   description = "DM binary";
+   type = "firmware";
+   arch = "arm32";
+   compression = "none";
+   os = "DM";
+   load = <0x8900>;
+   entry = <0x8900>;
+   ti-dm {
+   };
+   };
+   spl {
+   description = "SPL (64-bit)";
+   type = "standalone";
+   os = "U-Boot";
+   arch = "arm64";
+   compression = "none";
+   load = ;
+   entry = ;
+   u-boot-spl-nodtb {
+   };
+   };
+   k3-j721e-common-proc-board.dtb {
+   description = 
"k3-j721e-common-proc-board";
+   type = "flat_dt";
+   arch = "arm";
+   compression = "none";
+   blob-ext {
+   filename = 
"spl/dts/k3-j721e-common-proc-board.dtb";
+   };
+   };
+   };
+   configurations {
+   default = "conf";
+   conf {
+   description = 
"k3-j721e-common-proc-board";
+   firmware = "atf";
+ 

[PATCH RFC v2 10/11] ti: dtsi: j721e: Use binman to package sysfw.itb and tiboot3.bin

2022-05-05 Thread Neha Malcom Francis
By providing entries in the binman node of the device tree, binman will
be able to find and package board config binary artifacts generated by
TIBoardConfig with sysfw.bin and generate the final image sysfw.itb.

k3-j721e-r5-binman.dtsi has been introduced for R5 specific binman node.
It can be then be include by files that require it like
k3-j721e-r5-common-proc-board-u-boot.dtsi.

Signed-off-by: Tarun Sahu 
[n-fran...@ti.com: prepared patch for upstreaming]
Signed-off-by: Neha Malcom Francis 
---
 arch/arm/dts/k3-j721e-r5-binman.dtsi  | 88 +++
 .../k3-j721e-r5-common-proc-board-u-boot.dtsi |  1 +
 board/ti/j721e/Kconfig|  1 +
 3 files changed, 90 insertions(+)
 create mode 100644 arch/arm/dts/k3-j721e-r5-binman.dtsi

diff --git a/arch/arm/dts/k3-j721e-r5-binman.dtsi 
b/arch/arm/dts/k3-j721e-r5-binman.dtsi
new file mode 100644
index 00..cf5b5bfdf6
--- /dev/null
+++ b/arch/arm/dts/k3-j721e-r5-binman.dtsi
@@ -0,0 +1,88 @@
+// SPDX-License-Identifier: GPL-2.0+
+// Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+
+#include 
+
+/ {
+   binman: binman {
+   multiple-images;
+   };
+};
+
+&binman {
+   tiboot3 {
+   filename = "tiboot3.bin";
+   x509-cert {
+   content = <&image1>;
+   core = <16>;
+   load = ;
+   };
+   image1: u-boot-spl {
+   no-expanded;
+   };
+   };
+   binary {
+   filename = "sysfw.bin";
+   x509-cert {
+   content = <&image2>;
+   core = <0>;
+   load = <0x004>;
+   };
+   image2: ti-sysfw {
+   };
+   };
+   itb {
+   filename = "sysfw.itb";
+   fit {
+   description = "SYSFW and Config Fragments";
+   #address-cells = <1>;
+   images {
+   sysfw.bin {
+   description = "sysfw";
+   type = "firmware";
+   arch = "arm";
+   compression = "none";
+   blob {
+   filename = "sysfw.bin";
+   };
+   };
+   board-cfg.bin {
+   description = "board-cfg";
+   type = "firmware";
+   arch = "arm";
+   compression = "none";
+   blob-ext {
+   filename = "board-cfg.bin";
+   };
+   };
+   pm-cfg.bin {
+   description = "pm-cfg";
+   type = "firmware";
+   arch = "arm";
+   compression = "none";
+   blob-ext {
+   filename = "pm-cfg.bin";
+   };
+   };
+   rm-cfg.bin {
+   description = "rm-cfg";
+   type = "firmware";
+   arch = "arm";
+   compression = "none";
+   blob-ext {
+   filename = "rm-cfg.bin";
+   };
+   };
+   sec-cfg.bin {
+   description = "sec-cfg";
+   type = "firmware";
+   arch = "arm";
+   compression = "none";
+   blob-ext {
+   filename = "sec-cfg.bin";
+   };
+   };
+   };
+   };
+   };
+};
diff --git a/arch/arm/dts/k3-j721e-r5-common-proc-board-u-boot.dtsi 
b/arch/arm/dts/k3-j721e-r5-common-proc-board-u-boot.dtsi
index 48c6ddf672..75ec722e89 100644
--- a/arch/arm/dts/k3-j721e-r5-common-proc-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-j721e-r5-common-proc-board-u-boot.dtsi
@@ -4,6 +4,7 @@
  */
 
 #include "k3-j721e-common-proc-board-u-boot.dtsi"
+#include "k3-j721e-r5-binman.dtsi"
 
 / {
chosen {
diff --git a/board/ti/j721e/Kco

[PATCH RFC v2 09/11] ti: x509: Remove shell script used for signing

2022-05-05 Thread Neha Malcom Francis
Earlier the k3_gen_x509_cert.sh was used for signing binaries with the
x509 certificate for Texas Instruments K3 architecture devices. Since
the signing process is handled by x509 etype now, there is no more
requirement for this script, hence removing it.

Signed-off-by: Neha Malcom Francis 
---
 tools/k3_gen_x509_cert.sh | 252 --
 1 file changed, 252 deletions(-)
 delete mode 100755 tools/k3_gen_x509_cert.sh

diff --git a/tools/k3_gen_x509_cert.sh b/tools/k3_gen_x509_cert.sh
deleted file mode 100755
index b6ef5a2de3..00
--- a/tools/k3_gen_x509_cert.sh
+++ /dev/null
@@ -1,252 +0,0 @@
-#!/bin/bash
-# SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
-#
-# Script to add K3 specific x509 cetificate to a binary.
-#
-
-# Variables
-OUTPUT=tiboot3.bin
-TEMP_X509=x509-temp.cert
-CERT=certificate.bin
-RAND_KEY=eckey.pem
-LOADADDR=0x41c0
-BOOTCORE_OPTS=0
-BOOTCORE=16
-DEBUG_TYPE=0
-
-gen_degen_template() {
-cat << 'EOF' > degen-template.txt
-
-asn1=SEQUENCE:rsa_key
-
-[rsa_key]
-version=INTEGER:0
-modulus=INTEGER:0xDEGEN_MODULUS
-pubExp=INTEGER:1
-privExp=INTEGER:1
-p=INTEGER:0xDEGEN_P
-q=INTEGER:0xDEGEN_Q
-e1=INTEGER:1
-e2=INTEGER:1
-coeff=INTEGER:0xDEGEN_COEFF
-EOF
-}
-
-# Generate x509 Template
-gen_template() {
-cat << 'EOF' > x509-template.txt
- [ req ]
- distinguished_name = req_distinguished_name
- x509_extensions= v3_ca
- prompt = no
- dirstring_type = nobmp
-
- [ req_distinguished_name ]
- C  = US
- ST = TX
- L  = Dallas
- O  = Texas Instruments Incorporated
- OU = Processors
- CN = TI support
- emailAddress   = supp...@ti.com
-
- [ v3_ca ]
- basicConstraints = CA:true
- 1.3.6.1.4.1.294.1.1 = ASN1:SEQUENCE:boot_seq
- 1.3.6.1.4.1.294.1.2 = ASN1:SEQUENCE:image_integrity
- 1.3.6.1.4.1.294.1.3 = ASN1:SEQUENCE:swrv
-# 1.3.6.1.4.1.294.1.4 = ASN1:SEQUENCE:encryption
- 1.3.6.1.4.1.294.1.8 = ASN1:SEQUENCE:debug
-
- [ boot_seq ]
- certType = INTEGER:TEST_CERT_TYPE
- bootCore = INTEGER:TEST_BOOT_CORE
- bootCoreOpts = INTEGER:TEST_BOOT_CORE_OPTS
- destAddr = FORMAT:HEX,OCT:TEST_BOOT_ADDR
- imageSize = INTEGER:TEST_IMAGE_LENGTH
-
- [ image_integrity ]
- shaType = OID:2.16.840.1.101.3.4.2.3
- shaValue = FORMAT:HEX,OCT:TEST_IMAGE_SHA_VAL
-
- [ swrv ]
- swrv = INTEGER:0
-
-# [ encryption ]
-# initalVector = FORMAT:HEX,OCT:TEST_IMAGE_ENC_IV
-# randomString = FORMAT:HEX,OCT:TEST_IMAGE_ENC_RS
-# iterationCnt = INTEGER:TEST_IMAGE_KEY_DERIVE_INDEX
-# salt = FORMAT:HEX,OCT:TEST_IMAGE_KEY_DERIVE_SALT
-
- [ debug ]
- debugUID = 
FORMAT:HEX,OCT:
- debugType = INTEGER:TEST_DEBUG_TYPE
- coreDbgEn = INTEGER:0
- coreDbgSecEn = INTEGER:0
-EOF
-}
-
-parse_key() {
-   sed '/\ \ \ \ /s/://g' key.txt | awk  '!/\ \ \ \ / {printf("\n%s\n", 
$0)}; /\ \ \ \ / {printf("%s", $0)}' | sed 's/\ \ \ \ //g' | awk 
"/$1:/{getline; print}"
-}
-
-gen_degen_key() {
-# Generate a 4096 bit RSA Key
-   openssl genrsa -out key.pem 1024 >>/dev/null 2>&1
-   openssl rsa -in key.pem -text -out key.txt >>/dev/null 2>&1
-   DEGEN_MODULUS=$( parse_key 'modulus' )
-   DEGEN_P=$( parse_key 'prime1' )
-   DEGEN_Q=$( parse_key 'prime2' )
-   DEGEN_COEFF=$( parse_key 'coefficient' )
-   gen_degen_template
-
-   sed -e "s/DEGEN_MODULUS/$DEGEN_MODULUS/"\
-   -e "s/DEGEN_P/$DEGEN_P/" \
-   -e "s/DEGEN_Q/$DEGEN_Q/" \
-   -e "s/DEGEN_COEFF/$DEGEN_COEFF/" \
-degen-template.txt > degenerateKey.txt
-
-   openssl asn1parse -genconf degenerateKey.txt -out degenerateKey.der 
>>/dev/null 2>&1
-   openssl rsa -in degenerateKey.der -inform DER -outform PEM -out 
$RAND_KEY >>/dev/null 2>&1
-   KEY=$RAND_KEY
-   #rm key.pem key.txt degen-template.txt degenerateKey.txt 
degenerateKey.der
-}
-
-declare -A options_help
-usage() {
-   if [ -n "$*" ]; then
-   echo "ERROR: $*"
-   fi
-   echo -n "Usage: $0 "
-   for option in "${!options_help[@]}"
-   do
-   arg=`echo ${options_help[$option]}|cut -d ':' -f1`
-   if [ -n "$arg" ]; then
-   arg=" $arg"
-   fi
-   echo -n "[-$option$arg] "
-   done
-   echo
-   echo -e "\nWhere:"
-   for option in "${!options_help[@]}"
-   do
-   arg=`echo ${options_help[$option]}|cut -d ':' -f1`
-   txt=`echo ${options_help[$option]}|cut -d ':' -f2`
-   tb="\t\t\t"
-   if [ -n "$arg" ]; then
-   arg=" $arg"
-   tb="\t"
-   fi
-   echo -e "   -$option$arg:$tb$txt"
-   done
-   echo
-   echo "Examples of usage:-"
-   echo "# Example of signing the SYSFW binary with rsa degenerate key"
-   echo "$0 -c 0 -b ti-sci-firmware-am6x.bin -o sys

[PATCH RFC v2 08/11] ti: tispl.bin: Removed script that packages tispl.bin

2022-05-05 Thread Neha Malcom Francis
As tispl.bin is to be packaged (with ATF, OPTEE, DM and A72 SPL) using
binman, the shell script k3_fit_atf.sh is no longer needed. Removing
this file.

Signed-off-by: Neha Malcom Francis 
---
 tools/k3_fit_atf.sh | 123 
 1 file changed, 123 deletions(-)
 delete mode 100755 tools/k3_fit_atf.sh

diff --git a/tools/k3_fit_atf.sh b/tools/k3_fit_atf.sh
deleted file mode 100755
index 7bc07ad074..00
--- a/tools/k3_fit_atf.sh
+++ /dev/null
@@ -1,123 +0,0 @@
-#!/bin/sh
-# SPDX-License-Identifier: GPL-2.0+
-#
-# script to generate FIT image source for K3 Family boards with
-# ATF, OPTEE, SPL and multiple device trees (given on the command line).
-# Inspired from board/sunxi/mksunxi_fit_atf.sh
-#
-# usage: $0   [ [&2
-   ATF=/dev/null
-fi
-
-[ -z "$TEE" ] && TEE="bl32.bin"
-
-if [ ! -f $TEE ]; then
-   echo "WARNING OPTEE file $TEE NOT found, resulting might be 
non-functional" >&2
-   TEE=/dev/null
-fi
-
-[ -z "$DM" ] && DM="dm.bin"
-
-if [ ! -e $DM ]; then
-   echo "WARNING DM file $DM NOT found, resulting might be non-functional" 
>&2
-   DM=/dev/null
-fi
-
-if [ ! -z "$IS_HS" ]; then
-   HS_APPEND=_HS
-fi
-
-cat << __HEADER_EOF
-/dts-v1/;
-
-/ {
-   description = "Configuration to load ATF and SPL";
-   #address-cells = <1>;
-
-   images {
-   atf {
-   description = "ARM Trusted Firmware";
-   data = /incbin/("$ATF");
-   type = "firmware";
-   arch = "arm64";
-   compression = "none";
-   os = "arm-trusted-firmware";
-   load = <$1>;
-   entry = <$1>;
-   };
-   tee {
-   description = "OPTEE";
-   data = /incbin/("$TEE");
-   type = "tee";
-   arch = "arm64";
-   compression = "none";
-   os = "tee";
-   load = <0x9e80>;
-   entry = <0x9e80>;
-   };
-   dm {
-   description = "DM binary";
-   data = /incbin/("$DM");
-   type = "firmware";
-   arch = "arm32";
-   compression = "none";
-   os = "DM";
-   load = <0x8900>;
-   entry = <0x8900>;
-   };
-   spl {
-   description = "SPL (64-bit)";
-   data = /incbin/("spl/u-boot-spl-nodtb.bin$HS_APPEND");
-   type = "standalone";
-   os = "U-Boot";
-   arch = "arm64";
-   compression = "none";
-   load = <0x8008>;
-   entry = <0x8008>;
-   };
-__HEADER_EOF
-
-# shift through ATF load address in the command line arguments
-shift
-
-for dtname in $*
-do
-   cat << __FDT_IMAGE_EOF
-   $(basename $dtname) {
-   description = "$(basename $dtname .dtb)";
-   data = /incbin/("$dtname$HS_APPEND");
-   type = "flat_dt";
-   arch = "arm";
-   compression = "none";
-   };
-__FDT_IMAGE_EOF
-done
-
-cat << __CONF_HEADER_EOF
-   };
-   configurations {
-   default = "$(basename $1)";
-
-__CONF_HEADER_EOF
-
-for dtname in $*
-do
-   cat << __CONF_SECTION_EOF
-   $(basename $dtname) {
-   description = "$(basename $dtname .dtb)";
-   firmware = "atf";
-   loadables = "tee", "dm", "spl";
-   fdt = "$(basename $dtname)";
-   };
-__CONF_SECTION_EOF
-done
-
-cat << __ITS_EOF
-   };
-};
-__ITS_EOF
-- 
2.17.1



[PATCH RFC v2 07/11] ti: tiboot3.bin: Remove tiboot3.bin target from makefile

2022-05-05 Thread Neha Malcom Francis
Intention of patch is to move the signing and packaging of tiboot3.bin
image to binman, thus removing target from makefile.

Also deleting k3_gen_x509_cert.sh which was earlier used to sign a
binary associated with K3 devices with x509 certificate. This
functionality has been replicated in binman with the etype x509_cert.

Signed-off-by: Neha Malcom Francis 
---
 arch/arm/mach-k3/config.mk | 19 ---
 1 file changed, 19 deletions(-)

diff --git a/arch/arm/mach-k3/config.mk b/arch/arm/mach-k3/config.mk
index e6c13c1800..49f80ae79b 100644
--- a/arch/arm/mach-k3/config.mk
+++ b/arch/arm/mach-k3/config.mk
@@ -46,25 +46,6 @@ INPUTS-y += sec-cfg.bin
 endif
 endif
 
-# tiboot3.bin is mandated by ROM and ROM only supports R5 boot.
-# So restrict tiboot3.bin creation for CPU_V7R.
-ifdef CONFIG_CPU_V7R
-image_check: $(obj)/u-boot-spl.bin FORCE
-   @if [ $(IMAGE_SIZE) -gt $(MAX_SIZE) ]; then \
-   echo "===" >&2; \
-   echo "ERROR: Final Image too big. " >&2;\
-   echo "$< size = $(IMAGE_SIZE), max size = $(MAX_SIZE)" >&2; \
-   echo "===" >&2; \
-   exit 1; \
-   fi
-
-tiboot3.bin: image_check FORCE
-   $(srctree)/tools/k3_gen_x509_cert.sh -c 16 -b $(obj)/u-boot-spl.bin \
-   -o $@ -l $(CONFIG_SPL_TEXT_BASE) -k $(KEY)
-
-INPUTS-y   += tiboot3.bin
-endif
-
 ifdef CONFIG_ARM64
 
 ifeq ($(CONFIG_SOC_K3_J721E),)
-- 
2.17.1



[PATCH RFC v2 04/11] ti: etype: dm: Add entry type for TI DM

2022-05-05 Thread Neha Malcom Francis
K3 devices introduces the concept of centralized power, resource and
security management to System Firmware. This is to overcome challenges
by the traditional approach that implements system control functions on
each of the processing units.

The software interface for System Firmware is split into TIFS and DM. DM
(Device Manager) is responsible for resource and power management from
secure and non-secure hosts. This additional binary is necessary for
specific platforms' ROM boot images and is to be packaged into tispl.bin

Add an entry for DM. The entry can be used for the packaging of
tispl.bin by binman along with ATF and TEE.

Signed-off-by: Neha Malcom Francis 
---
 Makefile|  1 +
 tools/binman/entries.rst| 10 ++
 tools/binman/etype/ti_dm.py | 23 +++
 tools/binman/ftest.py   |  7 +++
 tools/binman/test/225_ti_dm.dts | 13 +
 5 files changed, 54 insertions(+)
 create mode 100644 tools/binman/etype/ti_dm.py
 create mode 100644 tools/binman/test/225_ti_dm.dts

diff --git a/Makefile b/Makefile
index 581fbba4c3..7e9c8272c3 100644
--- a/Makefile
+++ b/Makefile
@@ -1335,6 +1335,7 @@ cmd_binman = $(srctree)/tools/binman/binman $(if 
$(BINMAN_DEBUG),-D) \
$(foreach f,$(BINMAN_INDIRS),-I $(f)) \
-a atf-bl31-path=${BL31} \
-a tee-os-path=${TEE} \
+   -a ti-dm-path=${DM} \
-a opensbi-path=${OPENSBI} \
-a default-dt=$(default_dt) \
-a scp-path=$(SCP) \
diff --git a/tools/binman/entries.rst b/tools/binman/entries.rst
index 6c0f03b34f..0c6d82fce8 100644
--- a/tools/binman/entries.rst
+++ b/tools/binman/entries.rst
@@ -1214,6 +1214,16 @@ devices.
 
 
 
+Entry: ti-dm: Texas Instruments Device Manager (DM) blob
+-
+
+Properties / Entry arguments:
+- ti-dm-path: Filename of file to read into the entry, typically dm.bin
+
+This entry holds the device manager responsible for resource and power 
management in K3 devices.
+
+
+
 Entry: section: Entry that contains other entries
 -
 
diff --git a/tools/binman/etype/ti_dm.py b/tools/binman/etype/ti_dm.py
new file mode 100644
index 00..4203fff36e
--- /dev/null
+++ b/tools/binman/etype/ti_dm.py
@@ -0,0 +1,23 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Entry type for TI Device Manager
+
+import os
+
+from binman.etype.blob_named_by_arg import Entry_blob_named_by_arg
+
+
+class Entry_ti_dm(Entry_blob_named_by_arg):
+"""Entry containing a Texas Instruments Device Manager (DM)
+
+Properties / Entry arguments:
+- ti-dm-path: Filename of file to read into the entry, typically dm.bin
+
+This entry holds the device manager responsible for resource and power 
management
+in K3 devices.
+"""
+
+def __init__(self, section, etype, node):
+super().__init__(section, etype, node, 'ti-dm')
+self.external = True
diff --git a/tools/binman/ftest.py b/tools/binman/ftest.py
index ec408de334..5ff294a386 100644
--- a/tools/binman/ftest.py
+++ b/tools/binman/ftest.py
@@ -85,6 +85,7 @@ FSP_S_DATA= b'fsp_s'
 FSP_T_DATA= b'fsp_t'
 ATF_BL31_DATA = b'bl31'
 TEE_OS_DATA   = b'this is some tee OS data'
+TI_DM_DATA= b'tidmtidm'
 ATF_BL2U_DATA = b'bl2u'
 OPENSBI_DATA  = b'opensbi'
 TI_SYSFW_DATA = b'sysfw'
@@ -194,6 +195,7 @@ class TestFunctional(unittest.TestCase):
 TestFunctional._MakeInputFile('compress_big', COMPRESS_DATA_BIG)
 TestFunctional._MakeInputFile('bl31.bin', ATF_BL31_DATA)
 TestFunctional._MakeInputFile('tee-pager.bin', TEE_OS_DATA)
+TestFunctional._MakeInputFile('dm.bin', TI_DM_DATA)
 TestFunctional._MakeInputFile('bl2u.bin', ATF_BL2U_DATA)
 TestFunctional._MakeInputFile('fw_dynamic.bin', OPENSBI_DATA)
 TestFunctional._MakeInputFile('sysfw.bin', TI_SYSFW_DATA)
@@ -5300,6 +5302,11 @@ fdt fdtmapExtract the devicetree 
blob from the fdtmap
 data = self._DoReadFile('222_tee_os.dts')
 self.assertEqual(TEE_OS_DATA, data[:len(TEE_OS_DATA)])
 
+def testPackTiDm(self):
+"""Test that an image with a TI DM binary can be created"""
+data = self._DoReadFile('225_ti_dm.dts')
+self.assertEqual(TI_DM_DATA, data[:len(TI_DM_DATA)])
+
 def testFitFdtOper(self):
 """Check handling of a specified FIT operation"""
 entry_args = {
diff --git a/tools/binman/test/225_ti_dm.dts b/tools/binman/test/225_ti_dm.dts
new file mode 100644
index 00..3ab754131e
--- /dev/null
+++ b/tools/binman/test/225_ti_dm.dts
@@ -0,0 +1,13 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+/dts-v1/;
+
+/ {
+   #address-cells = <1>;
+   #size-cells = <1>;
+   binman {
+  

[PATCH RFC v2 05/11] ti: etype: x509: Add etype for x509 certificate for K3 devices

2022-05-05 Thread Neha Malcom Francis
K3 devices x509 certificate added to certain binaries that allows ROM to
validate the integrity of the image. Etype that generates an x509
certificate depending on boot flow added.

Signed-off-by: Neha Malcom Francis 
---
 tools/binman/entries.rst|  15 ++
 tools/binman/etype/x509_cert.py | 248 
 tools/binman/ftest.py   |   7 +
 tools/binman/test/232_x509_cert.dts |  18 ++
 tools/k3_gen_x509_cert.sh   |  10 +-
 5 files changed, 293 insertions(+), 5 deletions(-)
 create mode 100644 tools/binman/etype/x509_cert.py
 create mode 100644 tools/binman/test/232_x509_cert.dts

diff --git a/tools/binman/entries.rst b/tools/binman/entries.rst
index 0c6d82fce8..dfa281e49f 100644
--- a/tools/binman/entries.rst
+++ b/tools/binman/entries.rst
@@ -1890,6 +1890,21 @@ and kernel are genuine.
 
 
 
+Entry: x509cert: x509 certificate for K3 devices
+
+
+Properties / Entry arguments:
+- content: Phandle of binary to sign
+- output: Name of the final output file
+- key_file: File with key inside it. If not provided, script generates 
RSA degenerate key
+- core: Target core ID on which image would be running
+- load: Target load address of the binary in hex
+
+Output files:
+- certificate.bin: Signed certificate binary
+
+
+
 Entry: x86-reset16: x86 16-bit reset code for U-Boot
 
 
diff --git a/tools/binman/etype/x509_cert.py b/tools/binman/etype/x509_cert.py
new file mode 100644
index 00..0009973155
--- /dev/null
+++ b/tools/binman/etype/x509_cert.py
@@ -0,0 +1,248 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (c) 2018 Google, Inc
+# Written by Simon Glass 
+#
+
+# Support for a x509 certificate for signing K3 devices
+
+import os
+from collections import OrderedDict
+from subprocess import Popen, PIPE
+from sys import stderr, stdout
+
+import asn1
+from Crypto.PublicKey import RSA
+from cryptography.hazmat.backends import default_backend
+from cryptography.hazmat.primitives import serialization
+
+from binman.etype.collection import Entry_collection
+from dtoc import fdt_util
+from patman import tools
+
+temp_x509 = "x509-temp.cert"
+cert = "certificate.bin"
+rand_key = "eckey.pem"
+bootcore_opts = 0
+bootcore = 0
+debug_type = 0
+
+
+class Entry_x509_cert(Entry_collection):
+""" An entry which contains a x509 certificate
+
+Properties / Entry arguments:
+- content: Phandle of binary to sign
+- key_file: File with key inside it. If not provided, script generates 
RSA degenerate key
+- core: Target core ID on which image would be running
+- load: Target load address of the binary in hex
+
+Output files:
+- certificate.bin: Signed certificate binary"""
+
+def __init__(self, section, etype, node):
+super().__init__(section, etype, node)
+self.key_file = fdt_util.GetString(self._node, 'key-file', "")
+self.core = fdt_util.GetInt(self._node, 'core', 0)
+self.load_addr = fdt_util.GetInt(self._node, 'load', 0x41c0)
+
+def ReadNode(self):
+super().ReadNode()
+if self.key_file == "":
+self.degen_key = True
+else:
+self.degen_key = False
+
+def _CreateCertificate(self):
+"""Create certificate for legacy boot flow"""
+if self.degen_key == True:
+gen_degen_key()
+self.key_file = rand_key
+
+sha_val = get_sha_val("intermediate-sysfw.bin")
+bin_size = get_file_size("intermediate-sysfw.bin")
+addr = "%08x" % self.load_addr
+if self.core == 0:
+cert_type = 2
+elif self.core == 16:
+cert_type = 1
+else:
+cert_type = 2
+debug_type = 0
+
+gen_template()
+gen_cert(bin_size, sha_val, cert_type, bootcore_opts,
+ self.core, addr, debug_type, self.key_file)
+
+return tools.read_file("certificate.bin")
+
+def ObtainContents(self):
+self.image = self.GetContents(False)
+if self.image is None:
+return False
+f = open("intermediate-sysfw.bin", "wb")
+f.write(self.image)
+f.close()
+self.SetContents(self._CreateCertificate())
+return True
+
+def ProcessContents(self):
+data = self._CreateCertificate()
+return self.ProcessContentsUpdate(data)
+
+
+def get_sha_val(binary_file):
+process = Popen(['openssl', 'dgst', '-sha512', '-hex',
+binary_file], stdout=PIPE, stderr=PIPE)
+stdout, stderr = process.communicate()
+sha_val = stdout.split()[1]
+return sha_val
+
+
+def get_file_size(binary_file):
+return os.path.getsize(binary_file)
+
+
+def gen_degen_template():
+with open("degen-template.txt", 'w+', encoding='utf-8') as f:
+degen_temp = """
+asn1=SEQUENCE:rsa_key
+
+[rsa_key]
+v

[PATCH RFC v2 06/11] ti: sysfw: Add support for packaging sysfw.itb

2022-05-05 Thread Neha Malcom Francis
For devices that require sysfw.itb, board config binary artifacts must
be populated in the R5 output directory. These can be used by binman to
package sysfw.itb.

config.mk for mach-k3 updated to generate the required binaries using
tibcfg_gen.py.

Signed-off-by: Neha Malcom Francis 
---
 arch/arm/mach-k3/config.mk | 18 ++
 1 file changed, 18 insertions(+)

diff --git a/arch/arm/mach-k3/config.mk b/arch/arm/mach-k3/config.mk
index da458bcfb2..e6c13c1800 100644
--- a/arch/arm/mach-k3/config.mk
+++ b/arch/arm/mach-k3/config.mk
@@ -28,6 +28,24 @@ else
 KEY=$(patsubst "%",$(srctree)/%,$(CONFIG_SYS_K3_KEY))
 endif
 
+# Board config binary artifacts necessary for packaging of tiboot3.bin
+# and sysfw.itb by binman, currently for general purpose devices and
+# devices that require sysfw.itb in ROM boot image. Currently set up
+# for J721E
+ifneq ($(CONFIG_SOC_K3_J721E), )
+ifneq ($(CONFIG_TI_SECURE_DEVICE), y)
+
+CONFIG_YAML = $(srctree)/board/ti/$(BOARD)/config.yaml
+SCHEMA_YAML = $(srctree)/board/ti/common/schema.yaml
+board-cfg.bin pm-cfg.bin rm-cfg.bin sec-cfg.bin:
+   $(PYTHON3) $(srctree)/tools/tibcfg_gen.py -c $(CONFIG_YAML) -s 
$(SCHEMA_YAML) -o $(O)
+INPUTS-y   += board-cfg.bin
+INPUTS-y   += pm-cfg.bin
+INPUTS-y   += rm-cfg.bin
+INPUTS-y   += sec-cfg.bin
+endif
+endif
+
 # tiboot3.bin is mandated by ROM and ROM only supports R5 boot.
 # So restrict tiboot3.bin creation for CPU_V7R.
 ifdef CONFIG_CPU_V7R
-- 
2.17.1



[PATCH RFC v2 03/11] ti: etype: sysfw: Add entry type for sysfw

2022-05-05 Thread Neha Malcom Francis
For K3 devices that require a sysfw image, add entry for SYSFW. It can
contain system firmware image that can be packaged into sysfw.itb by
binman.

Signed-off-by: Tarun Sahu 
[n-fran...@ti.com: added tests for addition of etype]
Signed-off-by: Neha Malcom Francis 
---
 Makefile   |  1 +
 tools/binman/entries.rst   | 11 +++
 tools/binman/etype/ti_sysfw.py | 28 
 tools/binman/ftest.py  |  7 +++
 tools/binman/test/232_ti_sysfw.dts | 13 +
 5 files changed, 60 insertions(+)
 create mode 100644 tools/binman/etype/ti_sysfw.py
 create mode 100644 tools/binman/test/232_ti_sysfw.dts

diff --git a/Makefile b/Makefile
index 4b347d3603..581fbba4c3 100644
--- a/Makefile
+++ b/Makefile
@@ -1338,6 +1338,7 @@ cmd_binman = $(srctree)/tools/binman/binman $(if 
$(BINMAN_DEBUG),-D) \
-a opensbi-path=${OPENSBI} \
-a default-dt=$(default_dt) \
-a scp-path=$(SCP) \
+   -a ti-sysfw-path=$(SYSFW) \
-a spl-bss-pad=$(if $(CONFIG_SPL_SEPARATE_BSS),,1) \
-a tpl-bss-pad=$(if $(CONFIG_TPL_SEPARATE_BSS),,1) \
-a spl-dtb=$(CONFIG_SPL_OF_REAL) \
diff --git a/tools/binman/entries.rst b/tools/binman/entries.rst
index ae4305c99e..6c0f03b34f 100644
--- a/tools/binman/entries.rst
+++ b/tools/binman/entries.rst
@@ -1203,6 +1203,17 @@ This entry holds firmware for an external 
platform-specific coprocessor.
 
 
 
+Entry: sysfw: Texas Instruments System Firmware (SYSFW) blob
+
+
+Properties / Entry arguments:
+- ti-sysfw-path: Filename of file to read into the entry, typically 
sysfw.bin
+
+This entry contains system firmware necessary for booting of K3 architecture
+devices.
+
+
+
 Entry: section: Entry that contains other entries
 -
 
diff --git a/tools/binman/etype/ti_sysfw.py b/tools/binman/etype/ti_sysfw.py
new file mode 100644
index 00..5b5b307030
--- /dev/null
+++ b/tools/binman/etype/ti_sysfw.py
@@ -0,0 +1,28 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Entry type module for TI SYSFW binary blob
+#
+
+import os
+import struct
+import sys
+import zlib
+
+from binman.etype.blob_named_by_arg import Entry_blob_named_by_arg
+from dtoc import fdt_util
+from patman import tools
+
+
+class Entry_ti_sysfw(Entry_blob_named_by_arg):
+"""Entry containing Texas Instruments System Firmware (SYSFW) blob
+
+Properties / Entry arguments:
+- ti-sysfw-path: Filename of file to read into the entry, typically 
sysfw.bin
+
+This entry contains system firmware necessary for booting of K3 
architecture devices.
+"""
+
+def __init__(self, section, etype, node):
+super().__init__(section, etype, node, 'ti-sysfw')
+self.external = True
diff --git a/tools/binman/ftest.py b/tools/binman/ftest.py
index 4ce181a066..ec408de334 100644
--- a/tools/binman/ftest.py
+++ b/tools/binman/ftest.py
@@ -87,6 +87,7 @@ ATF_BL31_DATA = b'bl31'
 TEE_OS_DATA   = b'this is some tee OS data'
 ATF_BL2U_DATA = b'bl2u'
 OPENSBI_DATA  = b'opensbi'
+TI_SYSFW_DATA = b'sysfw'
 SCP_DATA  = b'scp'
 TEST_FDT1_DATA= b'fdt1'
 TEST_FDT2_DATA= b'test-fdt2'
@@ -195,6 +196,7 @@ class TestFunctional(unittest.TestCase):
 TestFunctional._MakeInputFile('tee-pager.bin', TEE_OS_DATA)
 TestFunctional._MakeInputFile('bl2u.bin', ATF_BL2U_DATA)
 TestFunctional._MakeInputFile('fw_dynamic.bin', OPENSBI_DATA)
+TestFunctional._MakeInputFile('sysfw.bin', TI_SYSFW_DATA)
 TestFunctional._MakeInputFile('scp.bin', SCP_DATA)
 
 # Add a few .dtb files for testing
@@ -5522,6 +5524,11 @@ fdt fdtmapExtract the devicetree 
blob from the fdtmap
 """Test an image with a pre-load header with an invalid key"""
 with self.assertRaises(ValueError) as e:
 data = self._DoReadFile('231_pre_load_invalid_key.dts')
+
+def testPackTiSysfw(self):
+"""Test that an image with a SYSFW binary can be created"""
+data = self._DoReadFile('232_ti_sysfw.dts')
+self.assertEqual(TI_SYSFW_DATA, data[:len(TI_SYSFW_DATA)])
 
 if __name__ == "__main__":
 unittest.main()
diff --git a/tools/binman/test/232_ti_sysfw.dts 
b/tools/binman/test/232_ti_sysfw.dts
new file mode 100644
index 00..9e66cbe77b
--- /dev/null
+++ b/tools/binman/test/232_ti_sysfw.dts
@@ -0,0 +1,13 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+/dts-v1/;
+
+/ {
+   #address-cells = <1>;
+   #size-cells = <1>;
+   binman {
+   ti-sysfw {
+   filename = "sysfw.bin";
+   };
+   };
+};
-- 
2.17.1



[PATCH RFC v2 02/11] ti: tools: config: Add board config class to generate config binaries

2022-05-05 Thread Neha Malcom Francis
For validating config files and generating binary config artifacts, here
board specific config class is added.

Add function cfgBinaryGen() in tibcfg_gen.py. It uses TIBoardConfig
class to load given schema and config files in YAML, validate them and
generate binaries.

Signed-off-by: Tarun Sahu 
[n-fran...@ti.com: prepared patch for upstreaming]
Signed-off-by: Neha Malcom Francis 
---
 test/py/requirements.txt |   1 +
 tools/tibcfg_gen.py  | 114 +++
 2 files changed, 115 insertions(+)
 create mode 100644 tools/tibcfg_gen.py

diff --git a/test/py/requirements.txt b/test/py/requirements.txt
index 33c5c0bbc4..a91ba64563 100644
--- a/test/py/requirements.txt
+++ b/test/py/requirements.txt
@@ -4,6 +4,7 @@ coverage==4.5.4
 extras==1.0.0
 fixtures==3.0.0
 importlib-metadata==0.23
+jsonschema==4.0.0
 linecache2==1.0.0
 more-itertools==7.2.0
 packaging==19.2
diff --git a/tools/tibcfg_gen.py b/tools/tibcfg_gen.py
new file mode 100644
index 00..e5fa2690c8
--- /dev/null
+++ b/tools/tibcfg_gen.py
@@ -0,0 +1,114 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+#
+# TI Board Configuration Class for Schema Validation and Binary Generation
+#
+
+import os
+import getopt
+import sys
+
+import yaml
+
+from jsonschema import validate
+
+
+class TIBoardConfig:
+
+""" Texas Instruments Board Configuration File"""
+
+def __init__(self, file, schema, data_rules=""):
+"""Load a YAML configuration file and YAML schema
+
+Validation of the config file against the schema is also done."""
+with open(file, 'r') as f:
+self.file_yaml = yaml.safe_load(f)
+with open(schema, 'r') as sch:
+self.schema_yaml = yaml.safe_load(sch)
+self.data_rules = data_rules
+try:
+validate(self.file_yaml, self.schema_yaml)
+except Exception as e:
+print(e)
+
+def _convert_to_byte_chunk(self, val, data_type):
+"""Convert value into byte array"""
+size = 0
+if(data_type == "#/definitions/u8"):
+size = 1
+elif(data_type == "#/definitions/u16"):
+size = 2
+elif(data_type == "#/definitions/u32"):
+size = 4
+else:
+raise Exception("Data type not present in definitions")
+if type(val) == int:
+br = val.to_bytes(size, byteorder="little")
+return br
+
+def _compile_yaml(self, schema_yaml, file_yaml):
+"""Convert YAML file into byte array based on YAML schema"""
+br = bytearray()
+for key in file_yaml.keys():
+node = file_yaml[key]
+node_schema = schema_yaml['properties'][key]
+node_type = node_schema.get('type')
+if not 'type' in node_schema:
+br += self._convert_to_byte_chunk(node,
+  node_schema.get('$ref'))
+elif node_type == 'object':
+br += self._compile_yaml(node_schema, node)
+elif node_type == 'array':
+for item in node:
+if not isinstance(item, dict):
+br += self._convert_to_byte_chunk(
+item, 
schema_yaml['properties'][key]['items']["$ref"])
+else:
+br += self._compile_yaml(node_schema.get('items'), 
item)
+return br
+
+def generate_binaries(self, out_path=""):
+"""Generate config binary artifacts from the loaded YAML configuration 
file"""
+if not os.path.isdir(out_path):
+os.mkdir(out_path)
+for key in self.file_yaml.keys():
+node = self.file_yaml[key]
+node_schema = self.schema_yaml['properties'][key]
+br = self._compile_yaml(node_schema, node)
+path = os.path.join(out_path, key + ".bin")
+with open(path, 'wb') as cfg:
+cfg.write(br)
+
+def delete_binaries(self, out_path=""):
+"""Delete generated binaries"""
+if os.path.isdir(out_path):
+for key in self.file_yaml.keys():
+path = os.path.join(out_path, key + ".bin")
+if os.path.isfile(path):
+os.remove(path)
+
+
+def cfgBinaryGen():
+"""Generate config binaries from YAML config file and YAML schema
+Arguments:
+- config_yaml: board config file in YAML
+- schema_yaml: schema file in YAML to validate config_yaml against
+- output_dir: output directory where generated binaries can be 
populated
+Pass the arguments along with the filename in the Makefile.
+"""
+opts, args = getopt.getopt(sys.argv[1:], "c:s:o")
+for opt, val in opts:
+if opt == "-c":
+config_yaml = val
+elif opt == "-s":
+schema_yaml = val
+elif opt == "-o":
+ou

[PATCH RFC v2 00/11] Integration of sysfw, tispl and tiboot3

2022-05-05 Thread Neha Malcom Francis
Devices that belong to the K3 architecture require SYSFW which is a FIT
image consisting of a signed system firmware image and board config
binaries.

Board config binaries are needed to bring up SYSFW during U-Boot SPL
startup. The board config data is given in YAML as input. These board
configs contain board-specific information such as resource management,
power management and security.

The following series intends to plumb the system firmware generation
into U-Boot using binman for packaging. Thus it will eliminate the need
for additional custom repositories for SYSFW generation and also moves t
owards the community standard build flow. We use binman to package
tiboot3.bin and sysfw.itb images.

These images also require x509 certificates which are created using the
etype x509-cert.

The series also plumbs the generation of tispl.bin into the build flow.
This image is required for loading u-boot in K3 devices. The image is
packaged using ATF, OPTEE and DM (Device Manager).

Please note that the following series has implemented the above for
J721E general purpose board. The board configs and device trees added
are specific to J721E GP devices.

Also note the introduction of three new etypes: ti-sysfw, ti-dm and
x509-cert.

On running CI tests on Github, errors were produced during world builds
of keystone2_keystone3 and siemens (I0T2050 which is based on AM65x).
This patch series is intended for only J721E and future work is to expand
to the remaining K3 devices as well. The errors that come are mainly due
to the boards other than J721E trying to generate tispl.bin.

v2:
- Added etype x509-cert for creating x509 Texas Instruments certificate
  binary
- Added packaging of tiboot3.bin
- Packaging of tiboot3.bin and sysfw.itb using new etype x509
- sysfw --> ti-sysfw
- Reformatted and re-arranged patches
- Removed k3_fit_atf.sh and k3_gen_x509_cert.sh as their functionality
  is provided by binman now

Neha Malcom Francis (11):
  j721e_evm: schema: yaml: Add general schema and J721E board config
files
  ti: tools: config: Add board config class to generate config binaries
  ti: etype: sysfw: Add entry type for sysfw
  ti: etype: dm: Add entry type for TI DM
  ti: etype: x509: Add etype for x509 certificate for K3 devices
  ti: sysfw: Add support for packaging sysfw.itb
  ti: tiboot3.bin: Remove tiboot3.bin target from makefile
  ti: tispl.bin: Removed script that packages tispl.bin
  ti: x509: Remove shell script used for signing
  ti: dtsi: j721e: Use binman to package sysfw.itb and tiboot3.bin
  ti: dtsi: j721e: Use binman to package tispl.bin

 Makefile  |2 +
 arch/arm/dts/k3-j721e-a72-binman.dtsi |   86 +
 .../k3-j721e-common-proc-board-u-boot.dtsi|1 +
 arch/arm/dts/k3-j721e-r5-binman.dtsi  |   88 +
 .../k3-j721e-r5-common-proc-board-u-boot.dtsi |1 +
 arch/arm/mach-k3/config.mk|   64 +-
 board/ti/common/schema.yaml   |  355 ++
 board/ti/j721e/Kconfig|2 +
 board/ti/j721e/config.yaml| 3162 +
 scripts/Makefile.spl  |4 -
 test/py/requirements.txt  |1 +
 tools/binman/entries.rst  |   36 +
 tools/binman/etype/ti_dm.py   |   23 +
 tools/binman/etype/ti_sysfw.py|   28 +
 tools/binman/etype/x509_cert.py   |  248 ++
 tools/binman/ftest.py |   21 +
 tools/binman/test/225_ti_dm.dts   |   13 +
 tools/binman/test/232_ti_sysfw.dts|   13 +
 tools/binman/test/232_x509_cert.dts   |   18 +
 tools/k3_fit_atf.sh   |  123 -
 tools/k3_gen_x509_cert.sh |  252 --
 tools/tibcfg_gen.py   |  114 +
 22 files changed, 4227 insertions(+), 428 deletions(-)
 create mode 100644 arch/arm/dts/k3-j721e-a72-binman.dtsi
 create mode 100644 arch/arm/dts/k3-j721e-r5-binman.dtsi
 create mode 100644 board/ti/common/schema.yaml
 create mode 100644 board/ti/j721e/config.yaml
 create mode 100644 tools/binman/etype/ti_dm.py
 create mode 100644 tools/binman/etype/ti_sysfw.py
 create mode 100644 tools/binman/etype/x509_cert.py
 create mode 100644 tools/binman/test/225_ti_dm.dts
 create mode 100644 tools/binman/test/232_ti_sysfw.dts
 create mode 100644 tools/binman/test/232_x509_cert.dts
 delete mode 100755 tools/k3_fit_atf.sh
 delete mode 100755 tools/k3_gen_x509_cert.sh
 create mode 100644 tools/tibcfg_gen.py

-- 
2.17.1



Re: [PATCH 04/12] ARM: dts: sun7i: Sync from Linux v5.18-rc1

2022-05-05 Thread Andre Przywara
On Wed, 27 Apr 2022 15:31:23 -0500
Samuel Holland  wrote:

> Copy the devicetree source for the A20 SoC and all existing boards
> verbatim from the Linux v5.18-rc1 tag.
> 
> This commit also adds the following new board devicetrees:
>  - sun7i-a20-haoyu-marsboard.dts
>  - sun7i-a20-linutronix-testbox-v2.dts
>  - sun7i-a20-olinuxino-lime-emmc.dts
> 
> This update includes changes to the USB PHY detection GPIO properties
> which are needed to convert that driver to use the DM GPIO framework.

This looks alright: compared the files to the Linux tree, also skimmed
over the changes, they look harmless. Boot tested on BananaPi M1:
Ethernet and USB work.

There is one thing, though:
the move of the PHY child node into an MDIO subnode also affects the
U-Boot-only sun7i-a20-m5.dts. As this DT gets build with every A20
build, there is now a dtc warning with every A20 board:

===
arch/arm/dts/sun7i-a20-m5.dtb: Warning (reg_format):
/soc/ethernet@1c5/ethernet-phy@1:reg: property has invalid length
(4 bytes) (#address-cells == 2, #size-cells == 1)
arch/arm/dts/sun7i-a20-m5.dtb: Warning (avoid_default_addr_size):
/soc/ethernet@1c5/ethernet-phy@1: Relying on default #address-cells
value arch/arm/dts/sun7i-a20-m5.dtb: Warning (avoid_default_addr_size):
/soc/ethernet@1c5/ethernet-phy@1: Relying on default #size-cells
value ===

Below simple patch fixes that and lets buildman pass (on the whole
series):

===
diff --git a/arch/arm/dts/sun7i-a20-m5.dts
b/arch/arm/dts/sun7i-a20-m5.dts index 6de52c7c314..cfbc50d9e55 100644
--- a/arch/arm/dts/sun7i-a20-m5.dts
+++ b/arch/arm/dts/sun7i-a20-m5.dts
@@ -39,7 +39,9 @@
phy = <&phy1>;
phy-mode = "mii";
status = "okay";
+};
 
+&gmac_mdio {
phy1: ethernet-phy@1 {
reg = <1>;
};
===

In case there is nothing else, I will just apply this when merging.

With that fixed:

> Signed-off-by: Samuel Holland 

Reviewed-by: Andre Przywara 

Cheers,
Andre

> ---
> 
>  arch/arm/dts/Makefile |   3 +
>  arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts   |  16 +-
>  arch/arm/dts/sun7i-a20-bananapi.dts   |  41 ++-
>  arch/arm/dts/sun7i-a20-bananapro.dts  |  16 +-
>  arch/arm/dts/sun7i-a20-cubieboard2.dts|  28 +-
>  arch/arm/dts/sun7i-a20-cubietruck.dts |  20 +-
>  arch/arm/dts/sun7i-a20-haoyu-marsboard.dts| 182 +
>  arch/arm/dts/sun7i-a20-hummingbird.dts|  21 +-
>  arch/arm/dts/sun7i-a20-i12-tvbox.dts  |  16 +-
>  arch/arm/dts/sun7i-a20-icnova-swac.dts|  15 +-
>  arch/arm/dts/sun7i-a20-itead-ibox.dts |   8 +-
>  arch/arm/dts/sun7i-a20-lamobo-r1.dts  |  16 +-
>  .../dts/sun7i-a20-linutronix-testbox-v2.dts   |  47 
>  arch/arm/dts/sun7i-a20-m3.dts |  14 +-
>  arch/arm/dts/sun7i-a20-olimex-som-evb.dts |  14 +-
>  arch/arm/dts/sun7i-a20-olimex-som204-evb.dts  |  30 ++-
>  .../arm/dts/sun7i-a20-olinuxino-lime-emmc.dts |  32 +++
>  arch/arm/dts/sun7i-a20-olinuxino-lime.dts |  32 +--
>  arch/arm/dts/sun7i-a20-olinuxino-lime2.dts|  46 ++--
>  arch/arm/dts/sun7i-a20-olinuxino-micro.dts|  32 +--
>  arch/arm/dts/sun7i-a20-orangepi-mini.dts  |  28 +-
>  arch/arm/dts/sun7i-a20-orangepi.dts   |  26 +-
>  arch/arm/dts/sun7i-a20-pcduino3-nano.dts  |  32 +--
>  arch/arm/dts/sun7i-a20-pcduino3.dts   |  28 +-
>  arch/arm/dts/sun7i-a20-wexler-tab7200.dts |  13 +-
>  arch/arm/dts/sun7i-a20-wits-pro-a20-dkt.dts   |  24 +-
>  arch/arm/dts/sun7i-a20.dtsi   | 254 --
>  27 files changed, 707 insertions(+), 327 deletions(-)
>  create mode 100644 arch/arm/dts/sun7i-a20-haoyu-marsboard.dts
>  create mode 100644 arch/arm/dts/sun7i-a20-linutronix-testbox-v2.dts
>  create mode 100644 arch/arm/dts/sun7i-a20-olinuxino-lime-emmc.dts
> 
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> index 48edee..7120d6a3aa 100644
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -583,11 +583,13 @@ dtb-$(CONFIG_MACH_SUN7I) += \
>   sun7i-a20-bananapro.dtb \
>   sun7i-a20-cubieboard2.dtb \
>   sun7i-a20-cubietruck.dtb \
> + sun7i-a20-haoyu-marsboard.dtb \
>   sun7i-a20-hummingbird.dtb \
>   sun7i-a20-i12-tvbox.dtb \
>   sun7i-a20-icnova-swac.dtb \
>   sun7i-a20-itead-ibox.dtb \
>   sun7i-a20-lamobo-r1.dtb \
> + sun7i-a20-linutronix-testbox-v2.dtb \
>   sun7i-a20-m3.dtb \
>   sun7i-a20-m5.dtb \
>   sun7i-a20-mk808c.dtb \
> @@ -595,6 +597,7 @@ dtb-$(CONFIG_MACH_SUN7I) += \
>   sun7i-a20-olimex-som204-evb.dtb \
>   sun7i-a20-olimex-som204-evb-emmc.dtb \
>   sun7i-a20-olinuxino-lime.dtb \
> + sun7i-a20-olinuxino-lime-emmc.dtb \
>   sun7i-a20-olinuxino-lime2.dtb \
>   sun7i-a20-olinuxino-lime2-emmc.dtb \
>   sun7i-a20-olinuxino-micro.dtb \
> diff --git a/arch/arm/dts/sun7i-a20-bananapi-m1-plus.dts 
> b/arch/arm/dts/sun7i-a20-bananapi-m1-

Re: [PATCH 03/12] ARM: dts: sun4i: Sync from Linux v5.18-rc1

2022-05-05 Thread Andre Przywara
On Wed, 27 Apr 2022 15:31:22 -0500
Samuel Holland  wrote:

> Copy the devicetree source for the A10 SoC and all existing boards
> verbatim from the Linux v5.18-rc1 tag.
> 
> This commit also adds the following new board devicetree:
>  - sun4i-a10-topwise-a721.dts
> 
> While this update should not impact any existing U-Boot functionality,
> the changes to the USB PHY detection GPIO properties are needed to
> convert that driver to use the DM GPIO framework.

Interestingly Patchwork missed this patch, and saving it from my client
messed up the ISO8859/1 -> UTF8 conversion at the very top of
sun4i-a10-inet97fv2.dts. But I managed to fix that up manually. Other
than that there is indeed no diff compared to the kernel.

> Signed-off-by: Samuel Holland 

Reviewed-by: Andre Przywara 

Cheers,
Andre

> ---
> 
>  arch/arm/dts/Makefile |   3 +-
>  arch/arm/dts/axp209.dtsi  |   6 +-
>  arch/arm/dts/sun4i-a10-a1000.dts  |  31 ++-
>  arch/arm/dts/sun4i-a10-ba10-tvbox.dts |   2 +-
>  arch/arm/dts/sun4i-a10-chuwi-v7-cw0825.dts|  20 +-
>  arch/arm/dts/sun4i-a10-cubieboard.dts |  16 +-
>  arch/arm/dts/sun4i-a10-dserve-dsrv9703c.dts   |  21 +-
>  arch/arm/dts/sun4i-a10-hackberry.dts  |   2 +-
>  arch/arm/dts/sun4i-a10-hyundai-a7hd.dts   |  20 +-
>  arch/arm/dts/sun4i-a10-inet1.dts  |  21 +-
>  arch/arm/dts/sun4i-a10-inet97fv2.dts  |  22 +-
>  arch/arm/dts/sun4i-a10-inet9f-rev03.dts   |  74 ++
>  .../dts/sun4i-a10-itead-iteaduino-plus.dts|   2 +-
>  arch/arm/dts/sun4i-a10-jesurun-q5.dts |   4 +-
>  arch/arm/dts/sun4i-a10-marsboard.dts  |  22 +-
>  arch/arm/dts/sun4i-a10-olinuxino-lime.dts |  33 +--
>  arch/arm/dts/sun4i-a10-pcduino.dts|  20 +-
>  arch/arm/dts/sun4i-a10-pov-protab2-ips9.dts   |  21 +-
>  arch/arm/dts/sun4i-a10-topwise-a721.dts   | 242 ++
>  arch/arm/dts/sun4i-a10.dtsi   | 135 +-
>  20 files changed, 462 insertions(+), 255 deletions(-)
>  create mode 100644 arch/arm/dts/sun4i-a10-topwise-a721.dts
> 
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> index ab2d0da192..48edee 100644
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -539,7 +539,8 @@ dtb-$(CONFIG_MACH_SUN4I) += \
>   sun4i-a10-olinuxino-lime.dtb \
>   sun4i-a10-pcduino.dtb \
>   sun4i-a10-pcduino2.dtb \
> - sun4i-a10-pov-protab2-ips9.dtb
> + sun4i-a10-pov-protab2-ips9.dtb \
> + sun4i-a10-topwise-a721.dtb
>  dtb-$(CONFIG_MACH_SUN5I) += \
>   sun5i-a10s-auxtek-t003.dtb \
>   sun5i-a10s-auxtek-t004.dtb \
> diff --git a/arch/arm/dts/axp209.dtsi b/arch/arm/dts/axp209.dtsi
> index 0d9ff12bdf..ca240cd6f6 100644
> --- a/arch/arm/dts/axp209.dtsi
> +++ b/arch/arm/dts/axp209.dtsi
> @@ -53,7 +53,7 @@
>   interrupt-controller;
>   #interrupt-cells = <1>;
>  
> - ac_power_supply: ac-power-supply {
> + ac_power_supply: ac-power {
>   compatible = "x-powers,axp202-ac-power-supply";
>   status = "disabled";
>   };
> @@ -69,7 +69,7 @@
>   #gpio-cells = <2>;
>   };
>  
> - battery_power_supply: battery-power-supply {
> + battery_power_supply: battery-power {
>   compatible = "x-powers,axp209-battery-power-supply";
>   status = "disabled";
>   };
> @@ -112,7 +112,7 @@
>   };
>   };
>  
> - usb_power_supply: usb-power-supply {
> + usb_power_supply: usb-power {
>   compatible = "x-powers,axp202-usb-power-supply";
>   status = "disabled";
>   };
> diff --git a/arch/arm/dts/sun4i-a10-a1000.dts 
> b/arch/arm/dts/sun4i-a10-a1000.dts
> index 6c254ec4c8..20f9ed2448 100644
> --- a/arch/arm/dts/sun4i-a10-a1000.dts
> +++ b/arch/arm/dts/sun4i-a10-a1000.dts
> @@ -60,15 +60,26 @@
>   stdout-path = "serial0:115200n8";
>   };
>  
> + hdmi-connector {
> + compatible = "hdmi-connector";
> + type = "a";
> +
> + port {
> + hdmi_con_in: endpoint {
> + remote-endpoint = <&hdmi_out_con>;
> + };
> + };
> + };
> +
>   leds {
>   compatible = "gpio-leds";
>  
> - red {
> + led-0 {
>   label = "a1000:red:usr";
>   gpios = <&pio 7 10 GPIO_ACTIVE_HIGH>;
>   };
>  
> - blue {
> + led-1 {
>   label = "a1000:blue:pwr";
>   gpios = <&pio 7 20 GPIO_ACTIVE_HIGH>;
>   default-state = "on";
> @@ -125,7 +136,7 @@
>  };
>  
>  &emac {
> - phy = <&phy1>;
> + phy-handle = <&phy1>;
>   status = "okay";
>  };
>  
> @@ -133,6 +144,20 @@
>   status = "okay";
>  };
>  
> +&de {
> + status = "okay";
> +};
> +
> +&hdmi {
> + status = "okay";
> +};
> +
> +&hdmi_out {
> + hdmi_ou

Re: [PATCH 02/12] ARM: dts: sunxi: Remove unused devicetree headers

2022-05-05 Thread Andre Przywara
On Wed, 27 Apr 2022 15:31:21 -0500
Samuel Holland  wrote:

> These files are not included anywhere and do not exist in the Linux
> devicetree source.

Indeed, in contrast to sun8i-q8-common.dtsi, those files here are not
referenced anywhere in the U-Boot tree.
> 
> Signed-off-by: Samuel Holland 

Reviewed-by: Andre Przywara 

Cheers,
Andre

> ---
> 
>  arch/arm/dts/sun5i-q8-common.dtsi | 180 --
>  arch/arm/dts/sunxi-q8-common.dtsi |  83 --
>  2 files changed, 263 deletions(-)
>  delete mode 100644 arch/arm/dts/sun5i-q8-common.dtsi
>  delete mode 100644 arch/arm/dts/sunxi-q8-common.dtsi
> 
> diff --git a/arch/arm/dts/sun5i-q8-common.dtsi 
> b/arch/arm/dts/sun5i-q8-common.dtsi
> deleted file mode 100644
> index a78e189f66..00
> --- a/arch/arm/dts/sun5i-q8-common.dtsi
> +++ /dev/null
> @@ -1,180 +0,0 @@
> -/*
> - * Copyright 2015 Hans de Goede 
> - *
> - * This file is dual-licensed: you can use it either under the terms
> - * of the GPL or the X11 license, at your option. Note that this dual
> - * licensing only applies to this file, and not this project as a
> - * whole.
> - *
> - *  a) This file is free software; you can redistribute it and/or
> - * modify it under the terms of the GNU General Public License as
> - * published by the Free Software Foundation; either version 2 of the
> - * License, or (at your option) any later version.
> - *
> - * This file is distributed in the hope that it will be useful,
> - * but WITHOUT ANY WARRANTY; without even the implied warranty of
> - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> - * GNU General Public License for more details.
> - *
> - * Or, alternatively,
> - *
> - *  b) Permission is hereby granted, free of charge, to any person
> - * obtaining a copy of this software and associated documentation
> - * files (the "Software"), to deal in the Software without
> - * restriction, including without limitation the rights to use,
> - * copy, modify, merge, publish, distribute, sublicense, and/or
> - * sell copies of the Software, and to permit persons to whom the
> - * Software is furnished to do so, subject to the following
> - * conditions:
> - *
> - * The above copyright notice and this permission notice shall be
> - * included in all copies or substantial portions of the Software.
> - *
> - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
> - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> - * OTHER DEALINGS IN THE SOFTWARE.
> - */
> -#include "sunxi-q8-common.dtsi"
> -
> -#include 
> -
> -/ {
> - aliases {
> - serial0 = &uart1;
> - };
> -
> - backlight: backlight {
> - compatible = "pwm-backlight";
> - pwms = <&pwm 0 5 PWM_POLARITY_INVERTED>;
> - brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>;
> - default-brightness-level = <8>;
> - /* TODO: backlight uses axp gpio1 as enable pin */
> - };
> -
> - chosen {
> - stdout-path = "serial0:115200n8";
> - };
> -};
> -
> -&cpu0 {
> - cpu-supply = <®_dcdc2>;
> -};
> -
> -&ehci0 {
> - status = "okay";
> -};
> -
> -&i2c0 {
> - axp209: pmic@34 {
> - reg = <0x34>;
> - interrupts = <0>;
> - };
> -};
> -
> -&i2c1 {
> - pcf8563: rtc@51 {
> - compatible = "nxp,pcf8563";
> - reg = <0x51>;
> - };
> -};
> -
> -#include "axp209.dtsi"
> -
> -&mmc0 {
> - pinctrl-names = "default";
> - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_q8>;
> - vmmc-supply = <®_vcc3v0>;
> - bus-width = <4>;
> - cd-gpios = <&pio 6 0 GPIO_ACTIVE_HIGH>; /* PG0 */
> - cd-inverted;
> - status = "okay";
> -};
> -
> -&otg_sram {
> - status = "okay";
> -};
> -
> -&pio {
> - mmc0_cd_pin_q8: mmc0_cd_pin@0 {
> - allwinner,pins = "PG0";
> - allwinner,function = "gpio_in";
> - allwinner,drive = ;
> - allwinner,pull = ;
> - };
> -
> - usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 {
> - allwinner,pins = "PG1";
> - allwinner,function = "gpio_in";
> - allwinner,drive = ;
> - allwinner,pull = ;
> - };
> -
> - usb0_id_detect_pin: usb0_id_detect_pin@0 {
> - allwinner,pins = "PG2";
> - allwinner,function = "gpio_in";
> - allwinner,drive = ;
> - allwinner,pull = ;
> - };
> -
> - usb0_vbus_pin_a: usb0_vbus_pin@0 {
> - allwinner,pins = "PG12";
> - all

Re: [PATCH 01/12] dt-bindings: sunxi: Update clock/reset binding headers

2022-05-05 Thread Andre Przywara
On Wed, 27 Apr 2022 15:31:20 -0500
Samuel Holland  wrote:

> Some devicetree updates make use of newly-exposed clocks and resets.
> To support that, copy the binding headers from the Linux v5.18-rc1 tag.
> 
> Signed-off-by: Samuel Holland 

Confirmed to be identical to the files in the Linux tree.
Also it only adds definitions, so is harmless to U-Boot.

Reviewed-by: Andre Przywara 

> ---
> 
>  include/dt-bindings/clock/sun50i-a64-ccu.h|  2 +-
>  include/dt-bindings/clock/sun5i-ccu.h | 13 ++---
>  include/dt-bindings/clock/sun6i-a31-ccu.h |  2 ++
>  include/dt-bindings/clock/sun8i-a23-a33-ccu.h |  2 ++
>  include/dt-bindings/clock/sun8i-h3-ccu.h  |  2 +-
>  include/dt-bindings/clock/sun8i-v3s-ccu.h |  4 
>  include/dt-bindings/reset/sun5i-ccu.h | 11 +--
>  include/dt-bindings/reset/sun8i-v3s-ccu.h |  3 +++
>  8 files changed, 16 insertions(+), 23 deletions(-)
> 
> diff --git a/include/dt-bindings/clock/sun50i-a64-ccu.h 
> b/include/dt-bindings/clock/sun50i-a64-ccu.h
> index 318eb15c41..175892189e 100644
> --- a/include/dt-bindings/clock/sun50i-a64-ccu.h
> +++ b/include/dt-bindings/clock/sun50i-a64-ccu.h
> @@ -113,7 +113,7 @@
>  #define CLK_USB_OHCI091
>  
>  #define CLK_USB_OHCI193
> -
> +#define CLK_DRAM 94
>  #define CLK_DRAM_VE  95
>  #define CLK_DRAM_CSI 96
>  #define CLK_DRAM_DEINTERLACE 97
> diff --git a/include/dt-bindings/clock/sun5i-ccu.h 
> b/include/dt-bindings/clock/sun5i-ccu.h
> index 81f34d477a..75fe5619c3 100644
> --- a/include/dt-bindings/clock/sun5i-ccu.h
> +++ b/include/dt-bindings/clock/sun5i-ccu.h
> @@ -1,17 +1,8 @@
> +/* SPDX-License-Identifier: GPL-2.0-or-later */
>  /*
>   * Copyright 2016 Maxime Ripard
>   *
>   * Maxime Ripard 
> - *
> - * This program is free software; you can redistribute it and/or modify
> - * it under the terms of the GNU General Public License as published by
> - * the Free Software Foundation; either version 2 of the License, or
> - * (at your option) any later version.
> - *
> - * This program is distributed in the hope that it will be useful,
> - * but WITHOUT ANY WARRANTY; without even the implied warranty of
> - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> - * GNU General Public License for more details.
>   */
>  
>  #ifndef _DT_BINDINGS_CLK_SUN5I_H_
> @@ -100,7 +91,7 @@
>  #define CLK_AVS  96
>  #define CLK_HDMI 97
>  #define CLK_GPU  98
> -
> +#define CLK_MBUS 99
>  #define CLK_IEP  100
>  
>  #endif /* _DT_BINDINGS_CLK_SUN5I_H_ */
> diff --git a/include/dt-bindings/clock/sun6i-a31-ccu.h 
> b/include/dt-bindings/clock/sun6i-a31-ccu.h
> index c5d1334018..39878d9dce 100644
> --- a/include/dt-bindings/clock/sun6i-a31-ccu.h
> +++ b/include/dt-bindings/clock/sun6i-a31-ccu.h
> @@ -49,6 +49,8 @@
>  
>  #define CLK_PLL_VIDEO1_2X13
>  
> +#define CLK_PLL_MIPI 15
> +
>  #define CLK_CPU  18
>  
>  #define CLK_AHB1_MIPIDSI 23
> diff --git a/include/dt-bindings/clock/sun8i-a23-a33-ccu.h 
> b/include/dt-bindings/clock/sun8i-a23-a33-ccu.h
> index f8222b6b2c..eb524d0bbd 100644
> --- a/include/dt-bindings/clock/sun8i-a23-a33-ccu.h
> +++ b/include/dt-bindings/clock/sun8i-a23-a33-ccu.h
> @@ -43,6 +43,8 @@
>  #ifndef _DT_BINDINGS_CLK_SUN8I_A23_A33_H_
>  #define _DT_BINDINGS_CLK_SUN8I_A23_A33_H_
>  
> +#define CLK_PLL_MIPI 13
> +
>  #define CLK_CPUX 18
>  
>  #define CLK_BUS_MIPI_DSI 23
> diff --git a/include/dt-bindings/clock/sun8i-h3-ccu.h 
> b/include/dt-bindings/clock/sun8i-h3-ccu.h
> index 30d2d15373..5d4ada2c22 100644
> --- a/include/dt-bindings/clock/sun8i-h3-ccu.h
> +++ b/include/dt-bindings/clock/sun8i-h3-ccu.h
> @@ -126,7 +126,7 @@
>  #define CLK_USB_OHCI193
>  #define CLK_USB_OHCI294
>  #define CLK_USB_OHCI395
> -
> +#define CLK_DRAM 96
>  #define CLK_DRAM_VE  97
>  #define CLK_DRAM_CSI 98
>  #define CLK_DRAM_DEINTERLACE 99
> diff --git a/include/dt-bindings/clock/sun8i-v3s-ccu.h 
> b/include/dt-bindings/clock/sun8i-v3s-ccu.h
> index c0d5d5599c..014ac6123d 100644
> --- a/include/dt-bindings/clock/sun8i-v3s-ccu.h
> +++ b/include/dt-bindings/clock/sun8i-v3s-ccu.h
> @@ -104,4 +104,8 @@
>  
>  #define CLK_MIPI_CSI 73
>  
> +/* Clocks not available on V3s */
> +#define CLK_BUS_I2S0 75
> +#define CLK_I2S0 76
> +
>  #endif /* _DT_BINDINGS_CLK_SUN8I_V3S_H_ */
> diff --git a/include/dt-bindings/reset/sun5i-ccu.h 
> b/include/dt-bindings/reset/sun5i-ccu.h
> index c2b9726b50..40cc22ae76 100644
> --- a/include/dt-bindings/reset/sun5i-ccu.h
> +++ b/include/dt-bindings/reset/sun5i-ccu.h
> @@ -1,17 +1,8 @@
> +/* SPDX-License-Identifier: GPL-2.0-or-later */
>  /*
>   * Copyright 2016 Maxime Ripard
>   *
>   * Maxime Ripard 
> - *
> - * This program is free software; you can redistribute it and/or mo

[PATCH] sunxi: board: Fix UART PortF pinmux setup

2022-05-05 Thread Andre Przywara
When CONFIG_UART0_PORT_F is defined, we try to configure two PortF pins
(usually used for the SD card) as UART0. Some SoCs use the mux value of
3 for this, while others use 4.

The combination of Kconfig symbols we currently use was not quite right:
we mis-configure the A31, A64, H6 and H616.

Going through the list in the pinctrl driver, there are only a few older
SoCs that use a value of 4, so revert the #ifdef clause, and name those
explicitly, instead of the other way around.

Signed-off-by: Andre Przywara 
---
 arch/arm/mach-sunxi/board.c | 13 +++--
 1 file changed, 7 insertions(+), 6 deletions(-)

diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c
index 173e946465d..8f7c894286d 100644
--- a/arch/arm/mach-sunxi/board.c
+++ b/arch/arm/mach-sunxi/board.c
@@ -87,15 +87,16 @@ static int gpio_init(void)
sunxi_gpio_set_cfgpin(SUNXI_GPB(22), SUNXI_GPIO_INPUT);
sunxi_gpio_set_cfgpin(SUNXI_GPB(23), SUNXI_GPIO_INPUT);
 #endif
-#if (defined(CONFIG_MACH_SUN8I) && !defined(CONFIG_MACH_SUN8I_R40)) || \
-defined(CONFIG_MACH_SUNIV)
-   sunxi_gpio_set_cfgpin(SUNXI_GPF(2), SUN8I_GPF_UART0);
-   sunxi_gpio_set_cfgpin(SUNXI_GPF(4), SUN8I_GPF_UART0);
-#else
+#if defined(CONFIG_MACH_SUN4I) || defined(CONFIG_MACH_SUN5I) || \
+defined(CONFIG_MACH_SUN7I) || defined(CONFIG_MACH_SUN8I_R40) || \
+defined(CONFIG_MACH_SUN9I)
sunxi_gpio_set_cfgpin(SUNXI_GPF(2), SUNXI_GPF_UART0);
sunxi_gpio_set_cfgpin(SUNXI_GPF(4), SUNXI_GPF_UART0);
+#else
+   sunxi_gpio_set_cfgpin(SUNXI_GPF(2), SUN8I_GPF_UART0);
+   sunxi_gpio_set_cfgpin(SUNXI_GPF(4), SUN8I_GPF_UART0);
 #endif
-   sunxi_gpio_set_pull(SUNXI_GPF(4), 1);
+   sunxi_gpio_set_pull(SUNXI_GPF(4), SUNXI_GPIO_PULL_UP);
 #elif CONFIG_CONS_INDEX == 1 && defined(CONFIG_MACH_SUNIV)
sunxi_gpio_set_cfgpin(SUNXI_GPE(0), SUNIV_GPE_UART0);
sunxi_gpio_set_cfgpin(SUNXI_GPE(1), SUNIV_GPE_UART0);
-- 
2.35.3



[PATCH 2/2] clk: sunxi: add and use dummy gate clocks

2022-05-05 Thread Andre Przywara
Some devices enumerate various clocks in their DT, and many drivers
just blanketly try to enable all of them. This creates problems
since we only model a few gate clocks, and the clock driver outputs
a warning when a clock is not described:
=
sunxi_set_gate: (CLK#3) unhandled
=

Some clocks don't have an enable bit, or are already enabled in a
different way, so we might want to just ignore them.

Add a CCU_CLK_F_DUMMY_GATE flag that indicates that case, and define
a GATE_DUMMY macro that can be used in the clock description array.
Define a few clocks, used by some pinctrl devices, that way to suppress
the runtime warnings.

Signed-off-by: Andre Przywara 
---
 drivers/clk/sunxi/clk_h6.c| 2 ++
 drivers/clk/sunxi/clk_h616.c  | 2 ++
 drivers/clk/sunxi/clk_h6_r.c  | 2 ++
 drivers/clk/sunxi/clk_sunxi.c | 3 +++
 include/clk/sunxi.h   | 5 +
 5 files changed, 14 insertions(+)

diff --git a/drivers/clk/sunxi/clk_h6.c b/drivers/clk/sunxi/clk_h6.c
index f4e26cbcd45..b3202342932 100644
--- a/drivers/clk/sunxi/clk_h6.c
+++ b/drivers/clk/sunxi/clk_h6.c
@@ -16,6 +16,8 @@
 static struct ccu_clk_gate h6_gates[] = {
[CLK_PLL_PERIPH0]   = GATE(0x020, BIT(31)),
 
+   [CLK_APB1]  = GATE_DUMMY,
+
[CLK_BUS_MMC0]  = GATE(0x84c, BIT(0)),
[CLK_BUS_MMC1]  = GATE(0x84c, BIT(1)),
[CLK_BUS_MMC2]  = GATE(0x84c, BIT(2)),
diff --git a/drivers/clk/sunxi/clk_h616.c b/drivers/clk/sunxi/clk_h616.c
index 65ab44643da..80099727def 100644
--- a/drivers/clk/sunxi/clk_h616.c
+++ b/drivers/clk/sunxi/clk_h616.c
@@ -15,6 +15,8 @@
 static struct ccu_clk_gate h616_gates[] = {
[CLK_PLL_PERIPH0]   = GATE(0x020, BIT(31) | BIT(27)),
 
+   [CLK_APB1]  = GATE_DUMMY,
+
[CLK_BUS_MMC0]  = GATE(0x84c, BIT(0)),
[CLK_BUS_MMC1]  = GATE(0x84c, BIT(1)),
[CLK_BUS_MMC2]  = GATE(0x84c, BIT(2)),
diff --git a/drivers/clk/sunxi/clk_h6_r.c b/drivers/clk/sunxi/clk_h6_r.c
index 2e0bbaa903b..c592886a258 100644
--- a/drivers/clk/sunxi/clk_h6_r.c
+++ b/drivers/clk/sunxi/clk_h6_r.c
@@ -11,6 +11,8 @@
 #include 
 
 static struct ccu_clk_gate h6_r_gates[] = {
+   [CLK_R_APB1]= GATE_DUMMY,
+
[CLK_R_APB1_TIMER]  = GATE(0x11c, BIT(0)),
[CLK_R_APB1_TWD]= GATE(0x12c, BIT(0)),
[CLK_R_APB1_PWM]= GATE(0x13c, BIT(0)),
diff --git a/drivers/clk/sunxi/clk_sunxi.c b/drivers/clk/sunxi/clk_sunxi.c
index 9673b58a492..9a21367a5d0 100644
--- a/drivers/clk/sunxi/clk_sunxi.c
+++ b/drivers/clk/sunxi/clk_sunxi.c
@@ -27,6 +27,9 @@ static int sunxi_set_gate(struct clk *clk, bool on)
const struct ccu_clk_gate *gate = priv_to_gate(priv, clk->id);
u32 reg;
 
+   if ((gate->flags & CCU_CLK_F_DUMMY_GATE))
+   return 0;
+
if (!(gate->flags & CCU_CLK_F_IS_VALID)) {
printf("%s: (CLK#%ld) unhandled\n", __func__, clk->id);
return 0;
diff --git a/include/clk/sunxi.h b/include/clk/sunxi.h
index a2239b990b8..c4a9dee5ebf 100644
--- a/include/clk/sunxi.h
+++ b/include/clk/sunxi.h
@@ -18,6 +18,7 @@
 enum ccu_flags {
CCU_CLK_F_IS_VALID  = BIT(0),
CCU_RST_F_IS_VALID  = BIT(1),
+   CCU_CLK_F_DUMMY_GATE= BIT(2),
 };
 
 /**
@@ -38,6 +39,10 @@ struct ccu_clk_gate {
.flags = CCU_CLK_F_IS_VALID,\
 }
 
+#define GATE_DUMMY {   \
+   .flags = CCU_CLK_F_DUMMY_GATE,  \
+}
+
 /**
  * struct ccu_reset - ccu reset
  * @off:   reset offset
-- 
2.35.3



[PATCH 1/2] clk: sunxi: add PIO bus gate clocks

2022-05-05 Thread Andre Przywara
The introduction of the DM pinctrl driver made its probe function enable
all clocks enumerated in the DT. This includes the "CLK_BUS_PIO" (and
variations) gate clock, but also CLK_PLL_PERIPH0. So far we didn't
describe those clocks in our clock driver.
As we enable them already in the SPL, the devices happen to work, but
the clock driver still complains about not finding those clocks:
=
sunxi_set_gate: (CLK#58) unhandled
=

Add the one-liners that are needed to announce the gate bit for those
clocks, to silence that message on the console.

Signed-off-by: Andre Przywara 
---
 drivers/clk/sunxi/clk_a10.c  | 2 ++
 drivers/clk/sunxi/clk_a10s.c | 2 ++
 drivers/clk/sunxi/clk_a23.c  | 2 ++
 drivers/clk/sunxi/clk_a31.c  | 2 ++
 drivers/clk/sunxi/clk_a64.c  | 4 
 drivers/clk/sunxi/clk_a80.c  | 2 ++
 drivers/clk/sunxi/clk_a83t.c | 2 ++
 drivers/clk/sunxi/clk_h3.c   | 4 
 drivers/clk/sunxi/clk_h6.c   | 2 ++
 drivers/clk/sunxi/clk_h616.c | 2 ++
 drivers/clk/sunxi/clk_r40.c  | 2 ++
 drivers/clk/sunxi/clk_v3s.c  | 2 ++
 12 files changed, 28 insertions(+)

diff --git a/drivers/clk/sunxi/clk_a10.c b/drivers/clk/sunxi/clk_a10.c
index 90b929d3d32..db92848aafd 100644
--- a/drivers/clk/sunxi/clk_a10.c
+++ b/drivers/clk/sunxi/clk_a10.c
@@ -31,6 +31,8 @@ static struct ccu_clk_gate a10_gates[] = {
 
[CLK_AHB_GMAC]  = GATE(0x064, BIT(17)),
 
+   [CLK_APB0_PIO]  = GATE(0x068, BIT(5)),
+
[CLK_APB1_I2C0] = GATE(0x06c, BIT(0)),
[CLK_APB1_I2C1] = GATE(0x06c, BIT(1)),
[CLK_APB1_I2C2] = GATE(0x06c, BIT(2)),
diff --git a/drivers/clk/sunxi/clk_a10s.c b/drivers/clk/sunxi/clk_a10s.c
index addf4f4d5cd..0c6564ef3b6 100644
--- a/drivers/clk/sunxi/clk_a10s.c
+++ b/drivers/clk/sunxi/clk_a10s.c
@@ -25,6 +25,8 @@ static struct ccu_clk_gate a10s_gates[] = {
[CLK_AHB_SPI1]  = GATE(0x060, BIT(21)),
[CLK_AHB_SPI2]  = GATE(0x060, BIT(22)),
 
+   [CLK_APB0_PIO]  = GATE(0x068, BIT(5)),
+
[CLK_APB1_I2C0] = GATE(0x06c, BIT(0)),
[CLK_APB1_I2C1] = GATE(0x06c, BIT(1)),
[CLK_APB1_I2C2] = GATE(0x06c, BIT(2)),
diff --git a/drivers/clk/sunxi/clk_a23.c b/drivers/clk/sunxi/clk_a23.c
index c45d2c35298..0280fb51e2d 100644
--- a/drivers/clk/sunxi/clk_a23.c
+++ b/drivers/clk/sunxi/clk_a23.c
@@ -23,6 +23,8 @@ static struct ccu_clk_gate a23_gates[] = {
[CLK_BUS_EHCI]  = GATE(0x060, BIT(26)),
[CLK_BUS_OHCI]  = GATE(0x060, BIT(29)),
 
+   [CLK_BUS_PIO]   = GATE(0x068, BIT(5)),
+
[CLK_BUS_I2C0]  = GATE(0x06c, BIT(0)),
[CLK_BUS_I2C1]  = GATE(0x06c, BIT(1)),
[CLK_BUS_I2C2]  = GATE(0x06c, BIT(2)),
diff --git a/drivers/clk/sunxi/clk_a31.c b/drivers/clk/sunxi/clk_a31.c
index 251fc3b705e..26d25f32408 100644
--- a/drivers/clk/sunxi/clk_a31.c
+++ b/drivers/clk/sunxi/clk_a31.c
@@ -30,6 +30,8 @@ static struct ccu_clk_gate a31_gates[] = {
[CLK_AHB1_OHCI1]= GATE(0x060, BIT(30)),
[CLK_AHB1_OHCI2]= GATE(0x060, BIT(31)),
 
+   [CLK_APB1_PIO]  = GATE(0x068, BIT(5)),
+
[CLK_APB2_I2C0] = GATE(0x06c, BIT(0)),
[CLK_APB2_I2C1] = GATE(0x06c, BIT(1)),
[CLK_APB2_I2C2] = GATE(0x06c, BIT(2)),
diff --git a/drivers/clk/sunxi/clk_a64.c b/drivers/clk/sunxi/clk_a64.c
index 1004a795033..cbb9168edb9 100644
--- a/drivers/clk/sunxi/clk_a64.c
+++ b/drivers/clk/sunxi/clk_a64.c
@@ -14,6 +14,8 @@
 #include 
 
 static const struct ccu_clk_gate a64_gates[] = {
+   [CLK_PLL_PERIPH0]   = GATE(0x028, BIT(31)),
+
[CLK_BUS_MMC0]  = GATE(0x060, BIT(8)),
[CLK_BUS_MMC1]  = GATE(0x060, BIT(9)),
[CLK_BUS_MMC2]  = GATE(0x060, BIT(10)),
@@ -26,6 +28,8 @@ static const struct ccu_clk_gate a64_gates[] = {
[CLK_BUS_OHCI0] = GATE(0x060, BIT(28)),
[CLK_BUS_OHCI1] = GATE(0x060, BIT(29)),
 
+   [CLK_BUS_PIO]   = GATE(0x068, BIT(5)),
+
[CLK_BUS_I2C0]  = GATE(0x06c, BIT(0)),
[CLK_BUS_I2C1]  = GATE(0x06c, BIT(1)),
[CLK_BUS_I2C2]  = GATE(0x06c, BIT(2)),
diff --git a/drivers/clk/sunxi/clk_a80.c b/drivers/clk/sunxi/clk_a80.c
index 8a0834d83a3..1ee1f99a8f4 100644
--- a/drivers/clk/sunxi/clk_a80.c
+++ b/drivers/clk/sunxi/clk_a80.c
@@ -25,6 +25,8 @@ static const struct ccu_clk_gate a80_gates[] = {
[CLK_BUS_SPI2]  = GATE(0x580, BIT(22)),
[CLK_BUS_SPI3]  = GATE(0x580, BIT(23)),
 
+   [CLK_BUS_PIO]   = GATE(0x590, BIT(5)),
+
[CLK_BUS_I2C0]  = GATE(0x594, BIT(0)),
[CLK_BUS_I2C1]  = GATE(0x594, BIT(1)),
[CLK_BUS_I2C2]  = GATE(0x594, BIT(2)),
diff --git a/drivers/clk/sunxi/clk_a83t.c b/drivers/clk/sunxi/clk_a83t.c
index 8c6043f51e2..4b57434cfaa 100644
--- a/drivers/clk/sunxi/clk_a83t.c
+++ b/drivers/clk/sunxi/clk_a83t.c
@@ -25,6 +25,8 @@ stati

[PATCH 0/2] sunxi: clk: fix unhandled clocks warnings

2022-05-05 Thread Andre Przywara
The introduction of the DM pinctrl driver saw many clocks, referenced in
the respective pinctrl DT nodes, being enabled by the DM clock driver.

We didn't model all them correctly, so there are now some warnings on
the console when booting:
=
sunxi_set_gate: (CLK#58) unhandled
=

This series fixes them. The first patch just describes some missing gate
clocks, mostly for the pin controller directly.
The second patch introduces a GATE_DUMMY macro, that allows to just
ignore some other clocks, and to suppress the warnings.

Please have a look and test!

Cheers,
Andre

Andre Przywara (2):
  clk: sunxi: add PIO bus gate clocks
  clk: sunxi: add and use dummy gate clocks

 drivers/clk/sunxi/clk_a10.c   | 2 ++
 drivers/clk/sunxi/clk_a10s.c  | 2 ++
 drivers/clk/sunxi/clk_a23.c   | 2 ++
 drivers/clk/sunxi/clk_a31.c   | 2 ++
 drivers/clk/sunxi/clk_a64.c   | 4 
 drivers/clk/sunxi/clk_a80.c   | 2 ++
 drivers/clk/sunxi/clk_a83t.c  | 2 ++
 drivers/clk/sunxi/clk_h3.c| 4 
 drivers/clk/sunxi/clk_h6.c| 4 
 drivers/clk/sunxi/clk_h616.c  | 4 
 drivers/clk/sunxi/clk_h6_r.c  | 2 ++
 drivers/clk/sunxi/clk_r40.c   | 2 ++
 drivers/clk/sunxi/clk_sunxi.c | 3 +++
 drivers/clk/sunxi/clk_v3s.c   | 2 ++
 include/clk/sunxi.h   | 5 +
 15 files changed, 42 insertions(+)

-- 
2.35.3



Re: [PATCH] misc: fs_loader: Fix compile warnings when CONFIG_CMD_UBIFS is enabled

2022-05-05 Thread Tom Rini
On Fri, Apr 29, 2022 at 04:36:23PM +0200, Pali Rohár wrote:

> drivers/misc/fs_loader.c: In function ‘mount_ubifs’:
> drivers/misc/fs_loader.c:46:12: warning: implicit declaration of function 
> ‘ubi_part’ [-Wimplicit-function-declaration]
>   int ret = ubi_part(mtdpart, NULL);
> ^~~~
> drivers/misc/fs_loader.c:53:9: warning: implicit declaration of function 
> ‘cmd_ubifs_mount’ [-Wimplicit-function-declaration]
>   return cmd_ubifs_mount(ubivol);
>  ^~~
> drivers/misc/fs_loader.c: In function ‘umount_ubifs’:
> drivers/misc/fs_loader.c:58:9: warning: implicit declaration of function 
> ‘cmd_ubifs_umount’ [-Wimplicit-function-declaration]
>   return cmd_ubifs_umount();
>  ^~~~
> 
> Signed-off-by: Pali Rohár 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [PATCH] reset: Return 0 if ops unimplemented and remove empty functions

2022-05-05 Thread Tom Rini
On Tue, Apr 26, 2022 at 11:43:30PM +0200, Marek Vasut wrote:

> In case the ops is not implemented, return 0 in the core right away.
> This is better than having multiple copies of functions which just
> return 0 in each reset driver. Drop all those empty functions.
> 
> Signed-off-by: Marek Vasut 
> Cc: Simon Glass 
> Cc: Tom Rini 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [PATCH 1/1] clk: scmi: fix scmi_clk_get_attibute()

2022-05-05 Thread Tom Rini
On Tue, Apr 26, 2022 at 11:26:31PM +0200, Heinrich Schuchardt wrote:

> Local variable out.name lives on the stack and therefore cannot
> be returned directly. Move the strdup() call into the function.
> (Coverity 352460)
> 
> Fixes: 7c33f78983c3 ("clk: scmi: register scmi clocks with CCF")
> Signed-off-by: Heinrich Schuchardt 
> Reviewed-by: Sean Anderson 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [PATCH] tools: mkimage: Avoid ENODATA in host tools

2022-05-05 Thread Tom Rini
On Tue, Apr 26, 2022 at 07:24:38PM +0200, Mark Kettenis wrote:

> ENODATA isn't part of POSIX.  Use EINVAL instead.
> 
> Signed-off-by: Mark Kettenis 
> Reviewed-by: Tom Rini 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [PATCH v1] rtc: rv8803: fix off-by-one in month counting

2022-05-05 Thread Tom Rini
On Tue, Apr 26, 2022 at 09:26:12AM +0200, Oliver Graute wrote:

> tm_mon has a range from 0..11, but the RTC expects 1..12. So we adapt
> the month accordingly. This was determined when comparing the driver
> with the corresponding linux kernel driver.
> 
> Signed-off-by: Oliver Graute 
> Reviewed-by: Michael Walle 
> Reviewed-by: Heiko Schocher 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [PATCH 1/1] cmd: mmc: don't assign unused values

2022-05-05 Thread Tom Rini
On Mon, Apr 25, 2022 at 11:11:06PM +0200, Heinrich Schuchardt wrote:

> Don't assign a value to variable speedmode which is never used.
> 
> Signed-off-by: Heinrich Schuchardt 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [PATCH 1/1] cmd: onenand: fix printf codes

2022-05-05 Thread Tom Rini
On Mon, Apr 25, 2022 at 11:01:44PM +0200, Heinrich Schuchardt wrote:

> For printing size_t use %zu or %zx.
> 
> Signed-off-by: Heinrich Schuchardt 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [PATCH 1/1] cmd: simplify do_adc_single()

2022-05-05 Thread Tom Rini
On Mon, Apr 25, 2022 at 10:26:45PM +0200, Heinrich Schuchardt wrote:

> If argc is not < 3, it must be >= 3.
> 
> If argc >= 3, argv[2] cannot be NULL.
> 
> Fixes: 9de612ae4ded ("cmd: adc: Add support for storing ADC result in env 
> variable")
> Signed-off-by: Heinrich Schuchardt 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [PATCH 1/1] cmd: fix long text for fdt command

2022-05-05 Thread Tom Rini
On Mon, Apr 25, 2022 at 06:35:05PM +0200, Heinrich Schuchardt wrote:

> We don't have an option -cq but two distinct options -c and -q.
> 
> Fixes: e9496ec37440 ("fdt: Add -q option to fdt addr for distro_bootcmd")
> Signed-off-by: Heinrich Schuchardt 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [PATCH] lib/date: Make rtc_mktime and mktime64 Y2038-ready

2022-05-05 Thread Tom Rini
On Sun, Apr 24, 2022 at 11:34:56AM +0200, Jan Kiszka wrote:

> From: Jan Kiszka 
> 
> We currently overflow due to wrong types used internally in rtc_mktime,
> on all platforms, and we return a too small type on 32-bit.
> 
> One consumer that directly benefits from this is mktime64. Many others
> may still store the result in a wrong type.
> 
> While at it, drop the redundant cast of mon in rtc_mktime (obsoleted by
> 714209832db1).
> 
> Signed-off-by: Jan Kiszka 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [PATCH] lib/date: Make rtc_mktime and mktime64 Y2038-ready

2022-05-05 Thread Tom Rini
On Sun, Apr 24, 2022 at 11:34:56AM +0200, Jan Kiszka wrote:

> From: Jan Kiszka 
> 
> We currently overflow due to wrong types used internally in rtc_mktime,
> on all platforms, and we return a too small type on 32-bit.
> 
> One consumer that directly benefits from this is mktime64. Many others
> may still store the result in a wrong type.
> 
> While at it, drop the redundant cast of mon in rtc_mktime (obsoleted by
> 714209832db1).
> 
> Signed-off-by: Jan Kiszka 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [PATCH] serial: smh: Check return value of strndup

2022-05-05 Thread Tom Rini
On Fri, Apr 22, 2022 at 02:50:23PM -0400, Sean Anderson wrote:

> strndup can fail. Check for it.
> 
> Fixes: 4855b39be ("serial: smh: Implement puts for DM")
> Signed-off-by: Sean Anderson 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [PATCH] tools/imagetool: Fix segfault when tparams->verify_header is NULL

2022-05-05 Thread Tom Rini
On Wed, Apr 20, 2022 at 11:58:39PM +0200, Nicolas Heemeryck wrote:

> On some image types like i.MX8 and i.MX8M, the verify_header function
> is not implemented.
> 
> Before this commit, no check on tparams->verify_header was done causing
> a segfault if NULL. Now, a proper error message is printed.
> 
> Signed-off-by: Nicolas Heemeryck 

Applied to u-boot/master, thanks!

-- 
Tom


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[PATCH] RFC: net: fec: get rid of CONFIG_FEC_MXC_MDIO_BASE

2022-05-05 Thread Tim Harvey
A number of IMX8Q boards using FEC configure the address of the ethernet
controller via defconfig as there are two FEC controllers in the SoC.

Now that the FEC driver uses DM the register address should be coming from
device-tree.

Remove the hard coded config and while at it remove the unused
CONFIG_FEC_MXC_SHARE_MDIO.

This is an RFC as I do not have the affected boards to test with and
would want to see a Tested-By from someone with each board. I am attempting
to clean up some ugliness in the FEC driver. There appears to be
multiple constructs to deal with shared MDIO busses when DM_MDIO should
be the right solution for that.

Signed-off-by: Tim Harvey 
Cc: Marcel Ziswiler  (maintainer:Apalis iMX8)
Cc: Oliver Graute  (maintainer:i.MX8QM CGTQMX8 
BOARD)
Cc: Anatolij Gustschin  (maintainer:CAPRICORN BOARD)
Cc: Peng Fan  (maintainer:i.MX8QM MEK BOARD)
Cc: Fabio Estevam  (maintainer:i.MX8QXP MEK BOARD)
Cc: Oleh Kravchenko  (maintainer:OUT4-IMX6ULL-NANO BOARD)
Cc: Joe Hershberger  (maintainer:NETWORK)
Cc: Ramon Fried  (maintainer:NETWORK)
---
 configs/apalis-imx8_defconfig  |  2 --
 configs/cgtqmx8_defconfig  |  2 --
 configs/colibri-imx8x_defconfig|  2 --
 configs/deneb_defconfig|  2 --
 configs/giedi_defconfig|  2 --
 configs/imx8qm_mek_defconfig   |  2 --
 configs/imx8qm_rom7720_a1_4G_defconfig |  2 --
 configs/imx8qxp_mek_defconfig  |  2 --
 configs/o4-imx6ull-nano_defconfig  |  2 --
 drivers/net/Kconfig| 11 ---
 drivers/net/fec_mxc.c  |  5 -
 11 files changed, 34 deletions(-)

diff --git a/configs/apalis-imx8_defconfig b/configs/apalis-imx8_defconfig
index beb20f6e1c01..bd8e7f01e493 100644
--- a/configs/apalis-imx8_defconfig
+++ b/configs/apalis-imx8_defconfig
@@ -56,8 +56,6 @@ CONFIG_PHY_ADDR_ENABLE=y
 CONFIG_PHY_MICREL=y
 CONFIG_PHY_MICREL_KSZ90X1=y
 CONFIG_DM_ETH=y
-CONFIG_FEC_MXC_SHARE_MDIO=y
-CONFIG_FEC_MXC_MDIO_BASE=0x5B04
 CONFIG_FEC_MXC=y
 CONFIG_MII=y
 CONFIG_PINCTRL=y
diff --git a/configs/cgtqmx8_defconfig b/configs/cgtqmx8_defconfig
index 2cf882f826ab..fe62b639bd88 100644
--- a/configs/cgtqmx8_defconfig
+++ b/configs/cgtqmx8_defconfig
@@ -72,8 +72,6 @@ CONFIG_PHY_ADDR_ENABLE=y
 CONFIG_PHY_ATHEROS=y
 CONFIG_DM_ETH=y
 CONFIG_PHY_GIGE=y
-CONFIG_FEC_MXC_SHARE_MDIO=y
-CONFIG_FEC_MXC_MDIO_BASE=0x5B04
 CONFIG_FEC_MXC=y
 CONFIG_MII=y
 CONFIG_PINCTRL=y
diff --git a/configs/colibri-imx8x_defconfig b/configs/colibri-imx8x_defconfig
index 0c9d6b64c1b6..03e899f51fed 100644
--- a/configs/colibri-imx8x_defconfig
+++ b/configs/colibri-imx8x_defconfig
@@ -54,8 +54,6 @@ CONFIG_PHYLIB=y
 CONFIG_PHY_ADDR_ENABLE=y
 CONFIG_PHY_MICREL=y
 CONFIG_DM_ETH=y
-CONFIG_FEC_MXC_SHARE_MDIO=y
-CONFIG_FEC_MXC_MDIO_BASE=0x5B04
 CONFIG_FEC_MXC=y
 CONFIG_MII=y
 CONFIG_PINCTRL=y
diff --git a/configs/deneb_defconfig b/configs/deneb_defconfig
index 425fff6c70a6..d0fc11a774f8 100644
--- a/configs/deneb_defconfig
+++ b/configs/deneb_defconfig
@@ -94,8 +94,6 @@ CONFIG_MV88E61XX_CPU_PORT=5
 CONFIG_MV88E61XX_PHY_PORTS=0x7
 CONFIG_MV88E61XX_FIXED_PORTS=0x0
 CONFIG_DM_ETH=y
-CONFIG_FEC_MXC_SHARE_MDIO=y
-CONFIG_FEC_MXC_MDIO_BASE=0x5B05
 CONFIG_FEC_MXC=y
 CONFIG_MII=y
 CONFIG_PINCTRL=y
diff --git a/configs/giedi_defconfig b/configs/giedi_defconfig
index 4fbf7ebdcd95..24bc621cf184 100644
--- a/configs/giedi_defconfig
+++ b/configs/giedi_defconfig
@@ -94,8 +94,6 @@ CONFIG_MV88E61XX_CPU_PORT=5
 CONFIG_MV88E61XX_PHY_PORTS=0x7
 CONFIG_MV88E61XX_FIXED_PORTS=0x0
 CONFIG_DM_ETH=y
-CONFIG_FEC_MXC_SHARE_MDIO=y
-CONFIG_FEC_MXC_MDIO_BASE=0x5B05
 CONFIG_FEC_MXC=y
 CONFIG_MII=y
 CONFIG_PINCTRL=y
diff --git a/configs/imx8qm_mek_defconfig b/configs/imx8qm_mek_defconfig
index 2e42872f843d..448a20c7afd1 100644
--- a/configs/imx8qm_mek_defconfig
+++ b/configs/imx8qm_mek_defconfig
@@ -73,8 +73,6 @@ CONFIG_PHY_ADDR_ENABLE=y
 CONFIG_PHY_ATHEROS=y
 CONFIG_DM_ETH=y
 CONFIG_PHY_GIGE=y
-CONFIG_FEC_MXC_SHARE_MDIO=y
-CONFIG_FEC_MXC_MDIO_BASE=0x5B04
 CONFIG_FEC_MXC=y
 CONFIG_MII=y
 CONFIG_PINCTRL=y
diff --git a/configs/imx8qm_rom7720_a1_4G_defconfig 
b/configs/imx8qm_rom7720_a1_4G_defconfig
index d9997cfa8280..0a8de612ea32 100644
--- a/configs/imx8qm_rom7720_a1_4G_defconfig
+++ b/configs/imx8qm_rom7720_a1_4G_defconfig
@@ -68,8 +68,6 @@ CONFIG_PHY_ADDR_ENABLE=y
 CONFIG_PHY_ATHEROS=y
 CONFIG_DM_ETH=y
 CONFIG_PHY_GIGE=y
-CONFIG_FEC_MXC_SHARE_MDIO=y
-CONFIG_FEC_MXC_MDIO_BASE=0x5B04
 CONFIG_FEC_MXC=y
 CONFIG_MII=y
 CONFIG_PINCTRL=y
diff --git a/configs/imx8qxp_mek_defconfig b/configs/imx8qxp_mek_defconfig
index 43f42f7a58af..e4a3c4b103e6 100644
--- a/configs/imx8qxp_mek_defconfig
+++ b/configs/imx8qxp_mek_defconfig
@@ -74,8 +74,6 @@ CONFIG_PHY_ADDR_ENABLE=y
 CONFIG_PHY_ATHEROS=y
 CONFIG_DM_ETH=y
 CONFIG_PHY_GIGE=y
-CONFIG_FEC_MXC_SHARE_MDIO=y
-CONFIG_FEC_MXC_MDIO_BASE=0x5B04
 CONFIG_FEC_MXC=y
 CONFIG_MII=y
 CONFIG_PINCTRL=y
diff --git a/configs/o4-imx6ull-nano_defconfig 
b/configs/o4-imx6ull-nano_defconfig
index 27a8

[PATCH v3 9/9] spl: spi: Consolidate spi_load_image_os into spl_spi_load_image

2022-05-05 Thread Sean Anderson
spi_load_image_os performs almost the same steps as the non-falcon-boot
path of spl_spi_load_image. The load address is different, and it also
loads a device tree, but that's it. Refactor the boot process so that
they can both use the same load function.

Signed-off-by: Sean Anderson 
---

(no changes since v2)

Changes in v2:
- New

 common/spl/spl_spi.c | 87 +---
 1 file changed, 33 insertions(+), 54 deletions(-)

diff --git a/common/spl/spl_spi.c b/common/spl/spl_spi.c
index 037db1a19f..e724a74783 100644
--- a/common/spl/spl_spi.c
+++ b/common/spl/spl_spi.c
@@ -18,41 +18,6 @@
 #include 
 #include 
 
-#if CONFIG_IS_ENABLED(OS_BOOT)
-/*
- * Load the kernel, check for a valid header we can parse, and if found load
- * the kernel and then device tree.
- */
-static int spi_load_image_os(struct spl_image_info *spl_image,
-struct spl_boot_device *bootdev,
-struct spi_flash *flash,
-struct image_header *header)
-{
-   int err;
-
-   /* Read for a header, parse or error out. */
-   spi_flash_read(flash, CONFIG_SYS_SPI_KERNEL_OFFS, sizeof(*header),
-  (void *)header);
-
-   if (image_get_magic(header) != IH_MAGIC)
-   return -1;
-
-   err = spl_parse_image_header(spl_image, bootdev, header);
-   if (err)
-   return err;
-
-   spi_flash_read(flash, CONFIG_SYS_SPI_KERNEL_OFFS,
-  spl_image->size, (void *)spl_image->load_addr);
-
-   /* Read device tree. */
-   spi_flash_read(flash, CONFIG_SYS_SPI_ARGS_OFFS,
-  CONFIG_SYS_SPI_ARGS_SIZE,
-  (void *)CONFIG_SYS_SPL_ARGS_ADDR);
-
-   return 0;
-}
-#endif
-
 static ulong spl_spi_fit_read(struct spl_load_info *load, ulong sector,
  ulong count, void *buf)
 {
@@ -71,6 +36,29 @@ unsigned int __weak spl_spi_get_uboot_offs(struct spi_flash 
*flash)
return CONFIG_SYS_SPI_U_BOOT_OFFS;
 }
 
+static int spi_do_load_image(struct spl_image_info *spl_image,
+struct spl_boot_device *bootdev,
+struct spl_load_info *load,
+unsigned int payload_offs)
+{
+   int ret;
+   struct spi_flash *flash = load->dev;
+   struct image_header *header =
+   spl_get_load_buffer(-sizeof(*header), sizeof(*header));
+
+   /* mkimage header is 64 bytes. */
+   ret = spi_flash_read(flash, payload_offs, sizeof(*header),
+(void *)header);
+   if (ret) {
+   debug("%s: Failed to read from SPI flash (err=%d)\n",
+ __func__, ret);
+   return ret;
+   }
+
+   return spl_load(spl_image, bootdev, load, header, 0,
+   payload_offs);
+}
+
 /*
  * The main entry for SPI booting. It's necessary that SDRAM is already
  * configured and available since this code loads the main U-Boot image
@@ -79,10 +67,8 @@ unsigned int __weak spl_spi_get_uboot_offs(struct spi_flash 
*flash)
 static int spl_spi_load_image(struct spl_image_info *spl_image,
  struct spl_boot_device *bootdev)
 {
-   int err = 0;
unsigned int payload_offs;
struct spi_flash *flash;
-   struct image_header *header;
struct spl_load_info load = {
.bl_len = 1,
.read = spl_spi_fit_read,
@@ -106,31 +92,24 @@ static int spl_spi_load_image(struct spl_image_info 
*spl_image,
load.dev = flash;
payload_offs = spl_spi_get_uboot_offs(flash);
 
-   header = spl_get_load_buffer(-sizeof(*header), sizeof(*header));
-
if (CONFIG_IS_ENABLED(OF_REAL)) {
payload_offs = ofnode_conf_read_int("u-boot,spl-payload-offset",
payload_offs);
}
 
 #if CONFIG_IS_ENABLED(OS_BOOT)
-   if (spl_start_uboot() || spi_load_image_os(spl_image, bootdev, flash, 
header))
-#endif
-   {
-   /* Load u-boot, mkimage header is 64 bytes. */
-   err = spi_flash_read(flash, payload_offs, sizeof(*header),
-(void *)header);
-   if (err) {
-   debug("%s: Failed to read from SPI flash (err=%d)\n",
- __func__, err);
-   return err;
-   }
-
-   err = spl_load(spl_image, bootdev, &load, header, 0,
-  payload_offs);
+   if (spl_start_uboot()) {
+   int err = spi_do_load_image(spl_image, bootdev, &load,
+   CONFIG_SYS_SPI_KERNEL_OFFS);
+   if (!err)
+   /* Read device tree. */
+   return spi_flash_read(flash, CONFIG_SYS_SPI_ARGS_OFFS,
+ CONFIG_SYS_SPI_ARGS_SIZE,
+

[PATCH v3 8/9] spl: Convert spi to spl_load

2022-05-05 Thread Sean Anderson
This converts the spi load method to use spl_load. As a consequence, it
also adds support for LOAD_FIT_FULL.

Signed-off-by: Sean Anderson 
Reviewed-by: Stefan Roese 
---

(no changes since v1)

 common/spl/spl_spi.c | 48 +++-
 1 file changed, 7 insertions(+), 41 deletions(-)

diff --git a/common/spl/spl_spi.c b/common/spl/spl_spi.c
index cf3f7ef4c0..037db1a19f 100644
--- a/common/spl/spl_spi.c
+++ b/common/spl/spl_spi.c
@@ -83,6 +83,10 @@ static int spl_spi_load_image(struct spl_image_info 
*spl_image,
unsigned int payload_offs;
struct spi_flash *flash;
struct image_header *header;
+   struct spl_load_info load = {
+   .bl_len = 1,
+   .read = spl_spi_fit_read,
+   };
 
/*
 * Load U-Boot image from SPI flash into RAM
@@ -99,6 +103,7 @@ static int spl_spi_load_image(struct spl_image_info 
*spl_image,
return -ENODEV;
}
 
+   load.dev = flash;
payload_offs = spl_spi_get_uboot_offs(flash);
 
header = spl_get_load_buffer(-sizeof(*header), sizeof(*header));
@@ -121,47 +126,8 @@ static int spl_spi_load_image(struct spl_image_info 
*spl_image,
return err;
}
 
-   if (IS_ENABLED(CONFIG_SPL_LOAD_FIT_FULL) &&
-   image_get_magic(header) == FDT_MAGIC) {
-   err = spi_flash_read(flash, payload_offs,
-roundup(fdt_totalsize(header), 4),
-(void *)CONFIG_SYS_LOAD_ADDR);
-   if (err)
-   return err;
-   err = spl_parse_image_header(spl_image, bootdev,
-   (struct image_header 
*)CONFIG_SYS_LOAD_ADDR);
-   } else if (IS_ENABLED(CONFIG_SPL_LOAD_FIT) &&
-  image_get_magic(header) == FDT_MAGIC) {
-   struct spl_load_info load;
-
-   debug("Found FIT\n");
-   load.dev = flash;
-   load.priv = NULL;
-   load.filename = NULL;
-   load.bl_len = 1;
-   load.read = spl_spi_fit_read;
-   err = spl_load_simple_fit(spl_image, &load,
- payload_offs,
- header);
-   } else if (IS_ENABLED(CONFIG_SPL_LOAD_IMX_CONTAINER)) {
-   struct spl_load_info load;
-
-   load.dev = flash;
-   load.priv = NULL;
-   load.filename = NULL;
-   load.bl_len = 1;
-   load.read = spl_spi_fit_read;
-
-   err = spl_load_imx_container(spl_image, &load,
-payload_offs);
-   } else {
-   err = spl_parse_image_header(spl_image, bootdev, 
header);
-   if (err)
-   return err;
-   err = spi_flash_read(flash, payload_offs + 
spl_image->offset,
-spl_image->size,
-(void *)spl_image->load_addr);
-   }
+   err = spl_load(spl_image, bootdev, &load, header, 0,
+  payload_offs);
}
 
return err;
-- 
2.35.1.1320.gc452695387.dirty



[PATCH v3 7/9] spl: Convert semihosting to spl_load

2022-05-05 Thread Sean Anderson
This converts the semihosting load method to use spl_load. As a result, it
also adds support for LOAD_FIT_FULL and IMX images.

Signed-off-by: Sean Anderson 
---

(no changes since v2)

Changes in v2:
- New

 common/spl/spl_semihosting.c | 39 +++-
 1 file changed, 16 insertions(+), 23 deletions(-)

diff --git a/common/spl/spl_semihosting.c b/common/spl/spl_semihosting.c
index df6aeb2951..35fbc2ee5e 100644
--- a/common/spl/spl_semihosting.c
+++ b/common/spl/spl_semihosting.c
@@ -9,16 +9,16 @@
 #include 
 #include 
 
-static int smh_read_full(long fd, void *memp, size_t len)
+static ulong spl_smh_fit_read(struct spl_load_info *load, ulong sector,
+ ulong count, void *buf)
 {
-   long read;
+   int ret, fd = *(int *)load->priv;
 
-   read = smh_read(fd, memp, len);
-   if (read < 0)
-   return read;
-   if (read != len)
-   return -EIO;
-   return 0;
+   if (smh_seek(fd, sector))
+   return 0;
+
+   ret = smh_read(fd, buf, count);
+   return ret < 0 ? 0 : ret;
 }
 
 static int spl_smh_load_image(struct spl_image_info *spl_image,
@@ -29,12 +29,17 @@ static int spl_smh_load_image(struct spl_image_info 
*spl_image,
long fd, len;
struct image_header *header =
spl_get_load_buffer(-sizeof(*header), sizeof(*header));
+   struct spl_load_info load = {
+   .bl_len = 1,
+   .read = spl_smh_fit_read,
+   };
 
fd = smh_open(filename, MODE_READ | MODE_BINARY);
if (fd < 0) {
log_debug("could not open %s: %ld\n", filename, fd);
return fd;
}
+   load.priv = &fd;
 
ret = smh_flen(fd);
if (ret < 0) {
@@ -43,25 +48,13 @@ static int spl_smh_load_image(struct spl_image_info 
*spl_image,
}
len = ret;
 
-   ret = smh_read_full(fd, header, sizeof(struct image_header));
-   if (ret) {
+   ret = smh_read(fd, header, sizeof(struct image_header));
+   if (ret != sizeof(struct image_header)) {
log_debug("could not read image header: %d\n", ret);
goto out;
}
 
-   ret = spl_parse_image_header(spl_image, bootdev, header);
-   if (ret) {
-   log_debug("failed to parse image header: %d\n", ret);
-   goto out;
-   }
-
-   ret = smh_seek(fd, 0);
-   if (ret) {
-   log_debug("could not seek to start of image: %d\n", ret);
-   goto out;
-   }
-
-   ret = smh_read_full(fd, (void *)spl_image->load_addr, len);
+   ret = spl_load(spl_image, bootdev, &load, header, len, 0);
if (ret)
log_debug("could not read %s: %d\n", filename, ret);
 out:
-- 
2.35.1.1320.gc452695387.dirty



[PATCH v3 6/9] spl: Convert nor to spl_load

2022-05-05 Thread Sean Anderson
This converts the nor load method to use spl_load. As a result it also
adds support for LOAD_FIT_FULL.

Signed-off-by: Sean Anderson 
Reviewed-by: Stefan Roese 
---

(no changes since v1)

 common/spl/spl_nor.c | 35 ++-
 1 file changed, 6 insertions(+), 29 deletions(-)

diff --git a/common/spl/spl_nor.c b/common/spl/spl_nor.c
index 0f4fff8493..90ece77af1 100644
--- a/common/spl/spl_nor.c
+++ b/common/spl/spl_nor.c
@@ -26,8 +26,11 @@ unsigned long __weak spl_nor_get_uboot_base(void)
 static int spl_nor_load_image(struct spl_image_info *spl_image,
  struct spl_boot_device *bootdev)
 {
-   __maybe_unused const struct image_header *header;
-   __maybe_unused struct spl_load_info load;
+   struct image_header *header = (void *)spl_nor_get_uboot_base();
+   struct spl_load_info load = {
+   .bl_len = 1,
+   .read = spl_nor_load_read,
+   };
 
/*
 * Loading of the payload to SDRAM is done with skipping of
@@ -91,32 +94,6 @@ static int spl_nor_load_image(struct spl_image_info 
*spl_image,
 * Load real U-Boot from its location in NOR flash to its
 * defined location in SDRAM
 */
-#ifdef CONFIG_SPL_LOAD_FIT
-   header = (const struct image_header *)spl_nor_get_uboot_base();
-   if (image_get_magic(header) == FDT_MAGIC) {
-   debug("Found FIT format U-Boot\n");
-   load.bl_len = 1;
-   load.read = spl_nor_load_read;
-   return spl_load_simple_fit(spl_image, &load,
-  spl_nor_get_uboot_base(),
-  (void *)header);
-   }
-#endif
-   if (IS_ENABLED(CONFIG_SPL_LOAD_IMX_CONTAINER)) {
-   load.bl_len = 1;
-   load.read = spl_nor_load_read;
-   return spl_load_imx_container(spl_image, &load,
- spl_nor_get_uboot_base());
-   }
-
-   /* Legacy image handling */
-   if (IS_ENABLED(CONFIG_SPL_LEGACY_IMAGE_SUPPORT)) {
-   load.bl_len = 1;
-   load.read = spl_nor_load_read;
-   return spl_load_legacy_img(spl_image, bootdev, &load,
-  spl_nor_get_uboot_base());
-   }
-
-   return 0;
+   return spl_load(spl_image, bootdev, &load, header, 0, 0);
 }
 SPL_LOAD_IMAGE_METHOD("NOR", 0, BOOT_DEVICE_NOR, spl_nor_load_image);
-- 
2.35.1.1320.gc452695387.dirty



[PATCH v3 5/9] spl: Convert net to spl_load

2022-05-05 Thread Sean Anderson
This converts the net load method to use spl_load. As a result, it also
adds support for LOAD_FIT_FULL and IMX images.

Signed-off-by: Sean Anderson 
Reviewed-by: Stefan Roese 
---

(no changes since v1)

 common/spl/spl_net.c | 24 +---
 1 file changed, 5 insertions(+), 19 deletions(-)

diff --git a/common/spl/spl_net.c b/common/spl/spl_net.c
index a853e6aead..3b4374add6 100644
--- a/common/spl/spl_net.c
+++ b/common/spl/spl_net.c
@@ -29,6 +29,10 @@ static int spl_net_load_image(struct spl_image_info 
*spl_image,
  struct spl_boot_device *bootdev)
 {
struct image_header *header = (struct image_header *)image_load_addr;
+   struct spl_load_info load = {
+   .bl_len = 1,
+   .read = spl_net_load_read,
+   };
int rv;
 
env_init();
@@ -47,25 +51,7 @@ static int spl_net_load_image(struct spl_image_info 
*spl_image,
return rv;
}
 
-   if (IS_ENABLED(CONFIG_SPL_LOAD_FIT) &&
-   image_get_magic(header) == FDT_MAGIC) {
-   struct spl_load_info load;
-
-   debug("Found FIT\n");
-   load.bl_len = 1;
-   load.read = spl_net_load_read;
-   rv = spl_load_simple_fit(spl_image, &load, 0, header);
-   } else {
-   debug("Legacy image\n");
-
-   rv = spl_parse_image_header(spl_image, bootdev, header);
-   if (rv)
-   return rv;
-
-   memcpy((void *)spl_image->load_addr, header, spl_image->size);
-   }
-
-   return rv;
+   return spl_load(spl_image, bootdev, &load, header, 0, 0);
 }
 #endif
 
-- 
2.35.1.1320.gc452695387.dirty



[PATCH v3 4/9] spl: Convert mmc to spl_load

2022-05-05 Thread Sean Anderson
This converts the mmc loader to spl_load. Legacy images are handled by
spl_load (via spl_parse_image_header), so mmc_load_legacy can be
omitted.

Signed-off-by: Sean Anderson 
Reviewed-by: Stefan Roese 
---

(no changes since v1)

 common/spl/spl_mmc.c | 73 
 1 file changed, 6 insertions(+), 67 deletions(-)

diff --git a/common/spl/spl_mmc.c b/common/spl/spl_mmc.c
index 6116a68371..93a28cdaa9 100644
--- a/common/spl/spl_mmc.c
+++ b/common/spl/spl_mmc.c
@@ -17,48 +17,6 @@
 #include 
 #include 
 
-static int mmc_load_legacy(struct spl_image_info *spl_image,
-  struct spl_boot_device *bootdev,
-  struct mmc *mmc,
-  ulong sector, struct image_header *header)
-{
-   u32 image_offset_sectors;
-   u32 image_size_sectors;
-   unsigned long count;
-   u32 image_offset;
-   int ret;
-
-   ret = spl_parse_image_header(spl_image, bootdev, header);
-   if (ret)
-   return ret;
-
-   /* convert offset to sectors - round down */
-   image_offset_sectors = spl_image->offset / mmc->read_bl_len;
-   /* calculate remaining offset */
-   image_offset = spl_image->offset % mmc->read_bl_len;
-
-   /* convert size to sectors - round up */
-   image_size_sectors = (spl_image->size + mmc->read_bl_len - 1) /
-mmc->read_bl_len;
-
-   /* Read the header too to avoid extra memcpy */
-   count = blk_dread(mmc_get_blk_desc(mmc),
- sector + image_offset_sectors,
- image_size_sectors,
- (void *)(ulong)spl_image->load_addr);
-   debug("read %x sectors to %lx\n", image_size_sectors,
- spl_image->load_addr);
-   if (count != image_size_sectors)
-   return -EIO;
-
-   if (image_offset)
-   memmove((void *)(ulong)spl_image->load_addr,
-   (void *)(ulong)spl_image->load_addr + image_offset,
-   spl_image->size);
-
-   return 0;
-}
-
 static ulong h_spl_load_read(struct spl_load_info *load, ulong sector,
 ulong count, void *buf)
 {
@@ -86,6 +44,11 @@ int mmc_load_image_raw_sector(struct spl_image_info 
*spl_image,
struct image_header *header;
struct blk_desc *bd = mmc_get_blk_desc(mmc);
int ret = 0;
+   struct spl_load_info load = {
+   .dev = mmc,
+   .bl_len = mmc->read_bl_len,
+   .read = h_spl_load_read,
+   };
 
header = spl_get_load_buffer(-sizeof(*header), bd->blksz);
 
@@ -97,31 +60,7 @@ int mmc_load_image_raw_sector(struct spl_image_info 
*spl_image,
goto end;
}
 
-   if (IS_ENABLED(CONFIG_SPL_LOAD_FIT) &&
-   image_get_magic(header) == FDT_MAGIC) {
-   struct spl_load_info load;
-
-   debug("Found FIT\n");
-   load.dev = mmc;
-   load.priv = NULL;
-   load.filename = NULL;
-   load.bl_len = mmc->read_bl_len;
-   load.read = h_spl_load_read;
-   ret = spl_load_simple_fit(spl_image, &load, sector, header);
-   } else if (IS_ENABLED(CONFIG_SPL_LOAD_IMX_CONTAINER)) {
-   struct spl_load_info load;
-
-   load.dev = mmc;
-   load.priv = NULL;
-   load.filename = NULL;
-   load.bl_len = mmc->read_bl_len;
-   load.read = h_spl_load_read;
-
-   ret = spl_load_imx_container(spl_image, &load, sector);
-   } else {
-   ret = mmc_load_legacy(spl_image, bootdev, mmc, sector, header);
-   }
-
+   ret = spl_load(spl_image, bootdev, &load, header, 0, sector);
 end:
if (ret) {
 #ifdef CONFIG_SPL_LIBCOMMON_SUPPORT
-- 
2.35.1.1320.gc452695387.dirty



[PATCH v3 3/9] spl: Convert fat to spl_load

2022-05-05 Thread Sean Anderson
This converts the fat loader to use spl_load.

Signed-off-by: Sean Anderson 
Reviewed-by: Stefan Roese 
---

Changes in v3:
- Fix failing on success

 common/spl/spl_fat.c | 40 
 1 file changed, 8 insertions(+), 32 deletions(-)

diff --git a/common/spl/spl_fat.c b/common/spl/spl_fat.c
index 5b270541fc..f25f1a19ac 100644
--- a/common/spl/spl_fat.c
+++ b/common/spl/spl_fat.c
@@ -61,6 +61,11 @@ int spl_load_image_fat(struct spl_image_info *spl_image,
 {
int err;
struct image_header *header;
+   struct spl_load_info load = {
+   .read = spl_fit_read,
+   .bl_len = 1,
+   .filename = filename,
+   };
 
err = spl_register_fat_device(block_dev, partition);
if (err)
@@ -72,45 +77,16 @@ int spl_load_image_fat(struct spl_image_info *spl_image,
if (err <= 0)
goto end;
 
-   if (IS_ENABLED(CONFIG_SPL_LOAD_FIT_FULL) &&
-   image_get_magic(header) == FDT_MAGIC) {
-   err = file_fat_read(filename, (void *)CONFIG_SYS_LOAD_ADDR, 0);
-   if (err <= 0)
-   goto end;
-   err = spl_parse_image_header(spl_image, bootdev,
-   (struct image_header *)CONFIG_SYS_LOAD_ADDR);
-   if (err == -EAGAIN)
-   return err;
-   if (err == 0)
-   err = 1;
-   } else if (IS_ENABLED(CONFIG_SPL_LOAD_FIT) &&
-   image_get_magic(header) == FDT_MAGIC) {
-   struct spl_load_info load;
-
-   debug("Found FIT\n");
-   load.read = spl_fit_read;
-   load.bl_len = 1;
-   load.filename = (void *)filename;
-   load.priv = NULL;
-
-   return spl_load_simple_fit(spl_image, &load, 0, header);
-   } else {
-   err = spl_parse_image_header(spl_image, bootdev, header);
-   if (err)
-   goto end;
-
-   err = file_fat_read(filename,
-   (u8 *)(uintptr_t)spl_image->load_addr, 0);
-   }
+   err = spl_load(spl_image, bootdev, &load, header, err, 0);
 
 end:
 #ifdef CONFIG_SPL_LIBCOMMON_SUPPORT
-   if (err <= 0)
+   if (err < 0)
printf("%s: error reading image %s, err - %d\n",
   __func__, filename, err);
 #endif
 
-   return (err <= 0);
+   return err;
 }
 
 #if CONFIG_IS_ENABLED(OS_BOOT)
-- 
2.35.1.1320.gc452695387.dirty



[PATCH v3 2/9] spl: Convert ext to use spl_load

2022-05-05 Thread Sean Anderson
This converts the ext load method to use spl_load. As a consequence, it
also adds support for FIT and IMX images.

Signed-off-by: Sean Anderson 
Reviewed-by: Stefan Roese 
---

(no changes since v1)

 common/spl/spl_ext.c | 24 +---
 1 file changed, 17 insertions(+), 7 deletions(-)

diff --git a/common/spl/spl_ext.c b/common/spl/spl_ext.c
index ebd914c492..1384842776 100644
--- a/common/spl/spl_ext.c
+++ b/common/spl/spl_ext.c
@@ -9,6 +9,18 @@
 #include 
 #include 
 
+static ulong spl_fit_read(struct spl_load_info *load, ulong file_offset,
+ ulong size, void *buf)
+{
+   int ret;
+   loff_t actlen;
+
+   ret = ext4fs_read(buf, file_offset, size, &actlen);
+   if (ret)
+   return ret;
+   return actlen;
+}
+
 int spl_load_image_ext(struct spl_image_info *spl_image,
   struct spl_boot_device *bootdev,
   struct blk_desc *block_dev, int partition,
@@ -18,6 +30,10 @@ int spl_load_image_ext(struct spl_image_info *spl_image,
struct image_header *header;
loff_t filelen, actlen;
struct disk_partition part_info = {};
+   struct spl_load_info load = {
+   .read = spl_fit_read,
+   .bl_len = 1,
+   };
 
header = spl_get_load_buffer(-sizeof(*header), sizeof(*header));
 
@@ -47,13 +63,7 @@ int spl_load_image_ext(struct spl_image_info *spl_image,
goto end;
}
 
-   err = spl_parse_image_header(spl_image, bootdev, header);
-   if (err < 0) {
-   puts("spl: ext: failed to parse image header\n");
-   goto end;
-   }
-
-   err = ext4fs_read((char *)spl_image->load_addr, 0, filelen, &actlen);
+   err = spl_load(spl_image, bootdev, &load, header, filelen, 0);
 
 end:
 #ifdef CONFIG_SPL_LIBCOMMON_SUPPORT
-- 
2.35.1.1320.gc452695387.dirty



[PATCH v3 1/9] spl: Add generic spl_load function

2022-05-05 Thread Sean Anderson
Implementers of SPL_LOAD_IMAGE_METHOD have to correctly determine what
type of image is being loaded and then call the appropriate image load
function correctly. This is tricky, because some image load functions
expect the whole image to already be loaded (CONFIG_SPL_LOAD_FIT_FULL),
some will load the image automatically using spl_load_info.read()
(CONFIG_SPL_LOAD_FIT/CONFIG_SPL_LOAD_IMX_CONTAINER), and some just parse
the header and expect the caller to do the actual loading afterwards
(legacy/raw images). Load methods often only support a subset of the
above methods, meaning that not all image types can be used with all
load methods. Further, the code to invoke these functions is
duplicated between different load functions.

To address this problem, this commit introduces a "spl_load" function.
It aims to handle image detection and correct invocation of each of the
parse/load functions. spl_simple_read is a wrapper around
spl_load_info.read with get_aligned_image* functions inlined for size
purposes. Additionally, we assume that bl_len is a power of 2 so we can
do bitshifts instead of divisions (which is smaller and faster).

Signed-off-by: Sean Anderson 
Reviewed-by: Stefan Roese 
---

Changes in v3:
- Fix using ffs instead of fls
- Fix using not initializing bl_len when info->filename was NULL

Changes in v2:
- Use reverse-xmas-tree style for locals in spl_simple_read. This is not
  complete, since overhead depends on bl_mask.

 common/spl/spl.c | 68 
 include/spl.h| 30 -
 2 files changed, 97 insertions(+), 1 deletion(-)

diff --git a/common/spl/spl.c b/common/spl/spl.c
index c9750ee163..f9a1cfc71e 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -399,6 +399,74 @@ int spl_parse_image_header(struct spl_image_info 
*spl_image,
return 0;
 }
 
+static int spl_simple_read(struct spl_load_info *info, void *buf, size_t size,
+  size_t offset)
+{
+   size_t bl_len = info->filename ? ARCH_DMA_MINALIGN : info->bl_len;
+   size_t bl_mask = bl_len - 1;
+   size_t overhead = offset & bl_mask;
+   size_t bl_shift = fls(bl_mask);
+   int ret;
+
+   debug("%s: buf=%p size=%lx offset=%lx\n", __func__, buf, (long)size,
+ (long)offset);
+   debug("%s: bl_len=%lx bl_mask=%lx bl_shift=%lx\n", __func__, bl_len,
+ bl_mask, bl_shift);
+
+   buf -= overhead;
+   size = (size + overhead + bl_mask) >> bl_shift;
+   offset = offset >> bl_shift;
+
+   debug("info->read(info, %lx, %lx, %p)\n", (ulong)offset, (ulong)size,
+ buf);
+   ret = info->read(info, offset, size, buf);
+   return ret == size ? 0 : -EIO;
+}
+
+int spl_load(struct spl_image_info *spl_image,
+const struct spl_boot_device *bootdev, struct spl_load_info *info,
+struct image_header *header, size_t size, size_t sector)
+{
+   int ret;
+   size_t offset = sector * info->bl_len;
+
+   if (image_get_magic(header) == FDT_MAGIC) {
+   if (IS_ENABLED(CONFIG_SPL_LOAD_FIT_FULL)) {
+   void *buf;
+
+   /*
+* In order to support verifying images in the FIT, we
+* need to load the whole FIT into memory. Try and
+* guess how much we need to load by using the total
+* size. This will fail for FITs with external data,
+* but there's not much we can do about that.
+*/
+   if (!size)
+   size = roundup(fdt_totalsize(header), 4);
+   buf = spl_get_load_buffer(0, size);
+   ret = spl_simple_read(info, buf, size, offset);
+   if (ret)
+   return ret;
+
+   return spl_parse_image_header(spl_image, bootdev, buf);
+   }
+
+   if (IS_ENABLED(CONFIG_SPL_LOAD_FIT))
+   return spl_load_simple_fit(spl_image, info, sector,
+  header);
+   }
+
+   if (IS_ENABLED(CONFIG_SPL_LOAD_IMX_CONTAINER))
+   return spl_load_imx_container(spl_image, info, sector);
+
+   ret = spl_parse_image_header(spl_image, bootdev, header);
+   if (ret)
+   return ret;
+
+   return spl_simple_read(info, (void *)spl_image->load_addr,
+  spl_image->size, offset + spl_image->offset);
+}
+
 __weak void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
 {
typedef void __noreturn (*image_entry_noargs_t)(void);
diff --git a/include/spl.h b/include/spl.h
index 6134aba857..025fffb895 100644
--- a/include/spl.h
+++ b/include/spl.h
@@ -237,7 +237,7 @@ struct spl_image_info {
  *
  * @dev: Pointer to the device, e.g. struct mmc *
  * @priv: Private data for the device
- 

[PATCH v3 0/9] spl: Use common function for loading/parsing images

2022-05-05 Thread Sean Anderson
This series adds support for loading all image types (Legacy, FIT (with
and without LOAD_FIT_FULL), and i.MX) to the MMC, SPI, NOR, NET, FAT,
and EXT load methods. It does this by introducing a helper function
which handles the minutiae of invoking the proper parsing function, and
reading the rest of the image.

Hopefully, this will make it easier for load methods to support all
image types that U-Boot supports, without having undocumented
unsupported image types. I applied this to several loaders which were
invoking spl_load_simple_fit and/or spl_parse_image_header, but I did
not use it with others (e.g. DFU/RAM) which had complications in the
mix.

Here's some bloat-o-meter for j7200_evm_a72_defconfig with ext4 support
enabled:

add/remove: 1/0 grow/shrink: 2/4 up/down: 224/-236 (-12)
Function old new   delta
spl_load   - 176+176
spl_fit_read  60 104 +44
spl_load_image_ext   364 368  +4
spl_nor_load_image   120 108 -12
spl_spi_load_image   280 228 -52
spl_load_image_fat   320 264 -56
spl_mmc_load 716 600-116
Total: Before=264556, After=264544, chg -0.00%

ext4 support is +48 bytes, because the original image support was so
bare-bones (just legacy/raw images). For most boards with a few load
methods (where one of them isn't ext4), this series should be no bloat
or a net negative. However, in the worst case this series will add
150-180 bytes.

I have only tested EXT and MMC raw loaders. Please try booting your
favorite board with NOR/SPI flash or SPI falcon mode.

Changes in v3:
- Fix using ffs instead of fls
- Fix using not initializing bl_len when info->filename was NULL
- Fix failing on success

Changes in v2:
- Use reverse-xmas-tree style for locals in spl_simple_read. This is not
  complete, since overhead depends on bl_mask.
- Convert semihosting as well
- Consolidate spi_load_image_os into spl_spi_load_image

Sean Anderson (9):
  spl: Add generic spl_load function
  spl: Convert ext to use spl_load
  spl: Convert fat to spl_load
  spl: Convert mmc to spl_load
  spl: Convert net to spl_load
  spl: Convert nor to spl_load
  spl: Convert semihosting to spl_load
  spl: Convert spi to spl_load
  spl: spi: Consolidate spi_load_image_os into spl_spi_load_image

 common/spl/spl.c |  68 ++
 common/spl/spl_ext.c |  24 +--
 common/spl/spl_fat.c |  40 +++
 common/spl/spl_mmc.c |  73 ++-
 common/spl/spl_net.c |  24 ++-
 common/spl/spl_nor.c |  35 ++
 common/spl/spl_semihosting.c |  39 +--
 common/spl/spl_spi.c | 131 ++-
 include/spl.h|  30 +++-
 9 files changed, 193 insertions(+), 271 deletions(-)

-- 
2.35.1.1320.gc452695387.dirty



Re: [PATCH] ARM: imx: imx8m: Adjust thermal trip points for Industrial parts

2022-05-05 Thread Tim Harvey
On Thu, May 5, 2022 at 11:10 AM Adam Ford  wrote:
>
> If the thermal sensor is enabled in U-Boot, adjust the cpu-thermal
> trip points for industrial rated parts.
>
> Signed-off-by: Adam Ford 
>
> diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c
> index 8e23e6da32..619e04a602 100644
> --- a/arch/arm/mach-imx/imx8m/soc.c
> +++ b/arch/arm/mach-imx/imx8m/soc.c
> @@ -30,6 +30,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>
>  DECLARE_GLOBAL_DATA_PTR;
>
> @@ -1207,10 +1208,10 @@ static int cleanup_nodes_for_efi(void *blob)
>
>  int ft_system_setup(void *blob, struct bd_info *bd)
>  {
> +   __maybe_unused int nodeoff;
>  #ifdef CONFIG_IMX8MQ
> int i = 0;
> int rc;
> -   int nodeoff;
>
> if (get_boot_device() == USB_BOOT) {
> disable_dcss_nodes(blob);
> @@ -1346,6 +1347,24 @@ usb_modify_speed:
> disable_cpu_nodes(blob, 2);
>  #endif
>
> +#if defined(CONFIG_IMX_TMU)
> +   int minc, maxc, prop;
> +
> +   nodeoff = fdt_path_offset(blob, "/thermal-zones/cpu-thermal/trips");
> +
> +   /* Only update Industrial grade parts */
> +   if (get_cpu_temp_grade(&minc, &maxc) == TEMP_INDUSTRIAL) {
> +   fdt_for_each_subnode(prop, blob, nodeoff) {
> +   const char *type = fdt_getprop(blob, prop, "type", 
> NULL);
> +
> +   if (type && (!strcmp("critical", type)))
> +   fdt_setprop_u32(blob, prop, "temperature", 
> maxc * 1000);
> +   else if (type && (!strcmp("passive", type)))
> +   fdt_setprop_u32(blob, prop, "temperature", 
> (maxc - 10) * 1000);
> +   }
> +   }
> +#endif
> +
> cleanup_nodes_for_efi(blob);
> return 0;
>  }
> --
> 2.25.1
>

Adam,

Reviewed-by: Tim Harvey 

Best Regards,

Tim


Re: [PATCH 1/1] tools: mkimage: set OPENSSL_API_COMPAT

2022-05-05 Thread Tom Rini
On Sat, Apr 30, 2022 at 03:45:24PM +0200, Heinrich Schuchardt wrote:

> Building with OpenSSL 3.0 produces warnings like:
> 
> ../tools/sunxi_toc0.c:846:17: warning: ‘RSA_get0_d’ is deprecated:
> Since OpenSSL 3.0 [-Wdeprecated-declarations]
>   846 | if (root_key && RSA_get0_d(root_key)) {
>   | ^~
> 
> As OpenSSL 3.0 is not available in elder Linux distributions
> just silence the warning.
> 
> Fixes: e9e87ec47c75 ("tools: mkimage: Add Allwinner TOC0 support")
> Signed-off-by: Heinrich Schuchardt 

On Ubuntu 20.04 which has OpenSSL 1.1.1f this adds:
tools/sunxi_toc0.c: In function ‘toc0_create_key_item’:
tools/sunxi_toc0.c:209:10: warning: implicit declaration of function 
‘BN_bn2bin’ [-Wimplicit-function-declaration]
  209 |  n_len = BN_bn2bin(RSA_get0_n(root_key), key_item->key0);
  |  ^
tools/sunxi_toc0.c: In function ‘toc0_verify_key_item’:
tools/sunxi_toc0.c:274:6: warning: implicit declaration of function ‘BN_bin2bn’ 
[-Wimplicit-function-declaration]
  274 |  n = BN_bin2bn(key_item->key0, n_len, NULL);
  |  ^
tools/sunxi_toc0.c:274:4: warning: assignment to ‘BIGNUM *’ {aka ‘struct 
bignum_st *’} from ‘int’ makes pointer from integer without a cast 
[-Wint-conversion]
  274 |  n = BN_bin2bn(key_item->key0, n_len, NULL);
  |^
tools/sunxi_toc0.c:275:4: warning: assignment to ‘BIGNUM *’ {aka ‘struct 
bignum_st *’} from ‘int’ makes pointer from integer without a cast 
[-Wint-conversion]
  275 |  e = BN_bin2bn(key_item->key0 + n_len, e_len, NULL);
  |^
tools/sunxi_toc0.c:283:19: warning: implicit declaration of function ‘BN_cmp’; 
did you mean ‘OBJ_cmp’? [-Wimplicit-function-declaration]
  283 |  if (root_key && (BN_cmp(n, RSA_get0_n(root_key)) ||
  |   ^~
  |   OBJ_cmp
tools/sunxi_toc0.c:305:5: warning: assignment to ‘BIGNUM *’ {aka ‘struct 
bignum_st *’} from ‘int’ makes pointer from integer without a cast 
[-Wint-conversion]
  305 |   n = BN_bin2bn(key_item->key1, n_len, NULL);
  | ^
tools/sunxi_toc0.c:306:5: warning: assignment to ‘BIGNUM *’ {aka ‘struct 
bignum_st *’} from ‘int’ makes pointer from integer without a cast 
[-Wint-conversion]
  306 |   e = BN_bin2bn(key_item->key1 + n_len, e_len, NULL);
  | ^
tools/sunxi_toc0.c: In function ‘toc0_create_cert_item’:
tools/sunxi_toc0.c:363:6: warning: implicit declaration of function 
‘BN_bn2binpad’ [-Wimplicit-function-declaration]
  363 |  if (BN_bn2binpad(RSA_get0_n(fw_key), publicKey->n, 
sizeof(publicKey->n)) < 0 ||
  |  ^~~~
tools/sunxi_toc0.c: In function ‘toc0_verify_cert_item’:
tools/sunxi_toc0.c:423:4: warning: assignment to ‘BIGNUM *’ {aka ‘struct 
bignum_st *’} from ‘int’ makes pointer from integer without a cast 
[-Wint-conversion]
  423 |  n = BN_bin2bn(publicKey->n, sizeof(publicKey->n), NULL);
  |^
tools/sunxi_toc0.c:424:4: warning: assignment to ‘BIGNUM *’ {aka ‘struct 
bignum_st *’} from ‘int’ makes pointer from integer without a cast 
[-Wint-conversion]
  424 |  e = BN_bin2bn(publicKey->e, sizeof(publicKey->e), NULL);
  |^

-- 
Tom


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Re: [PATCH] w1: w1-gpio: Loosen timings to improve cold boot reliability

2022-05-05 Thread Chris Morgan
On Tue, Apr 26, 2022 at 06:49:20AM +, eugen.hris...@microchip.com wrote:
> On 12/9/21 10:27 AM, Eugen Hristev - M18282 wrote:
> > On 11/30/21 5:46 PM, Chris Morgan wrote:
> >> On Mon, Nov 22, 2021 at 11:16:22AM +, eugen.hris...@microchip.com 
> >> wrote:
> >>> On 11/8/21 5:07 PM, Chris Morgan wrote:
>  From: Chris Morgan 
> 
>  On my NTC CHIP whenever I do a cold boot any attached DIPs cannot be
>  found. Rebooting on the other hand appears to fix the issue. I found
>  that if I modified the timing slightly (but still within spec) the
>  w1 identification on cold boot became far more reliable.
> 
>  Signed-off-by: Chris Morgan 
>  ---
>  drivers/w1/w1-gpio.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
>  diff --git a/drivers/w1/w1-gpio.c b/drivers/w1/w1-gpio.c
>  index 9346f810ce..5565de2a92 100644
>  --- a/drivers/w1/w1-gpio.c
>  +++ b/drivers/w1/w1-gpio.c
>  @@ -22,8 +22,8 @@
>  #define W1_TIMING_E9
>  #define W1_TIMING_F55
>  #define W1_TIMING_G0
>  -#define W1_TIMING_H480
>  -#define W1_TIMING_I70
>  +#define W1_TIMING_H600
>  +#define W1_TIMING_I100
>  #define W1_TIMING_J410
> 
>  struct w1_gpio_pdata {
>  --
>  2.30.2
> 
> >>>
> >>>
> >>> Hi Chris,
> >>>
> >>> I tested your patch on my board sama5d2_xplained, and it works.
> >>> Thus, you can add my
> >>> Tested-by: Eugen Hristev 
> >>>
> >>> However, I disagree with the changes you did in timings. What I found
> >>> was that timing 'H' could go up to 640 , but timing 'I' to a maximum of
> >>> 75 or so. [1]
> >>>
> >>> I am thinking maybe you could also check your udelays with a scope on
> >>> the 1wire line ? Because your problem might be in fact in some other
> >>> part , like udelays not properly aligned/synchronized/accurate at cold
> >>> boot time, depending on the source of clock you are using.
> >>
> >> I lack a scope, but will extensively test 640 and 75 as the new timings.
> >> Would that be acceptable?
> >>
> >> Thank you.
> > 
> > Hi Chris,
> > 
> > The timings should be in spec, however, if your particular SoC has a
> > problem with delays, this should be investigated.
> > 
> > Does your board with with the maximum timings ? (but still in spec)
> 
> 
> Hi Chris,
> 
> I am moving this patch to 'Changes requested' and waiting on your reply 
> about 640 / 75 timings which you said you will test.

I tested. It works better, but still fails some of the time on cold boot
(warm boots always seem to succeed though). For some reason so far I am
only able to get the original timings I submitted to work consistently.

I have tested this on both an NTC CHIP and a prototype Source Parts
Popcorn, both with similar effect (warm boot fine, cold boot
intermittant). Both boards use the same SOC and are tested with the
same DIP (a PocketCHIP).

If this needs to be made board specific to overcome an issue with the
Allwinner R8 let me know and maybe we can figure out a board specific
override.

Thank you.

> 
> Eugen
> 
> > 
> > Eugen
> >>
> >>>
> >>> Eugen
> >>>
> >>>
> >>> [1]
> >>> https://nam12.safelinks.protection.outlook.com/?url=https%3A%2F%2Fwww.maximintegrated.com%2Fcontent%2Fdam%2Ffiles%2Fdesign%2Ftools%2Ftech-docs%2F126%2FAN126-timing-calculation.zip&data=05%7C01%7C%7Cb5e9eb5aec71479346f408da2750e636%7C84df9e7fe9f640afb435%7C1%7C0%7C637865525660163935%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=T6wdIVwoDUy5MDuTIe19giBACfUD5Xfwx5E7JjA0P6A%3D&reserved=0
> > 
> 


Re: [PATCH v2 3/9] spl: Convert fat to spl_load

2022-05-05 Thread Tom Rini
On Thu, May 05, 2022 at 03:05:06PM -0400, Sean Anderson wrote:
> 
> 
> On 5/5/22 2:58 PM, Tom Rini wrote:
> > On Thu, May 05, 2022 at 02:53:55PM -0400, Sean Anderson wrote:
> >> 
> >> 
> >> On 5/5/22 11:38 AM, Tom Rini wrote:
> >> > On Thu, May 05, 2022 at 10:51:39AM -0400, Sean Anderson wrote:
> >> >> Hi Tom,
> >> >> 
> >> >> On 5/4/22 8:06 PM, Tom Rini wrote:
> >> >> > On Fri, Apr 22, 2022 at 02:27:41PM -0400, Sean Anderson wrote:
> >> >> > 
> >> >> >> This converts the fat loader to use spl_load.
> >> >> >> 
> >> >> >> Signed-off-by: Sean Anderson 
> >> >> >> Reviewed-by: Stefan Roese 
> >> >> > 
> >> >> > On am335x_evm_defconfig, and booting from a FAT SD card I see:
> >> >> > Trying to boot from MMC1
> >> >> > spl_load_image_fat: error reading image u-boot.img, err - 0
> >> >> > SPL: failed to boot from all boot devices
> >> >> > ### ERROR ### Please RESET the board ###
> >> >> 
> >> >> Looks like spl_load_image_fat was expecting bytes read and
> >> >> not an errno (and so turned your success into a failure). Will fix.
> >> > 
> >> > OK.
> >> > 
> >> >> > Note that while not _this_ patch (but likely the one for raw) breaks
> >> >> > booting from my mx6cuboxi via SD card with:
> >> >> > Trying to boot from MMC1
> >> >> > [hang]
> >> >> > 
> >> >> 
> >> >> Hm, if there's a problem you should at least see
> >> >> "mmc_load_image_raw_sector: mmc block read error\n"
> >> >> 
> >> >> Could you enable DEBUG in common/spl/spl.c and common/spl/spl_mmc.c?
> >> > 
> >> > U-Boot SPL 2022.07-rc1-00267-g064334e21dde-dirty (May 05 2022 - 11:33:38 
> >> > -0400)
> >> >>>SPL: board_init_r()
> >> > spl_init
> >> > Trying to boot from MMC1
> >> > spl: mmc boot mode: raw
> >> > hdr read sector 8a, count=1
> >> > 
> >> 
> >> Looks like there's a bug in spl_simple_read
> >> 
> >>size_t bl_len = info->filename ? ARCH_DMA_MINALIGN : bl_len;
> >> 
> >> should be
> >> 
> >>size_t bl_len = info->filename ? ARCH_DMA_MINALIGN : info->bl_len;
> >> 
> >> The funny thing is that this kind of bug results in a -Wuninitialized 
> >> warning
> >> on godbolt [1] but *not* from my installed gcc 9.4... Not sure what's 
> >> going on
> >> there.
> >> 
> >> In other bugs, there was also a problem calculating bl_shift (ffs instead 
> >> of fls).
> >> I probably should have tested this the first two times around, but I now 
> >> have a "raw"
> >> MMC working. I expect that there are probably some similar bugs lurking in 
> >> spi/net/nor.
> >> I will try and test net, but I don't think I have any spi/nor boards I can 
> >> test with.
> > 
> > OK.  When you're reasonably confident SPI should work I'll go fight
> > around with the am335x_evm and check my notes on how to make it SPI
> > boot.  Looking at am335x_evm_spiboot_defconfig it would cover what
> > you're wanting to check, yes?
> > 
> 
> I'll send v3 soon and that should be good to test with. Falcon mode SPI boot 
> also needs
> to be tested, which seems to be rather unpopular:
> 
> git grep -l SPI_LOAD $(git grep -l OS_BOOT configs/)
> configs/am57xx_evm_defconfig
> configs/display5_defconfig
> configs/display5_factory_defconfig
> configs/dra7xx_evm_defconfig
> configs/imx28_xea_defconfig
> configs/xilinx_zynq_virt_defconfig
> configs/xilinx_zynqmp_virt_defconfig
> 
> I'm not sure whether the zynq stuff is virtual as in qemu or something else.
> 

I believe it's QEMU.  But ah, right, dra7xx_evm has SPI too.  I see I
have SPI writing notes for that, so that's probably the best bet for a
board for me to test all of this on.

-- 
Tom


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Re: [PATCH v2 3/9] spl: Convert fat to spl_load

2022-05-05 Thread Sean Anderson



On 5/5/22 2:58 PM, Tom Rini wrote:
> On Thu, May 05, 2022 at 02:53:55PM -0400, Sean Anderson wrote:
>> 
>> 
>> On 5/5/22 11:38 AM, Tom Rini wrote:
>> > On Thu, May 05, 2022 at 10:51:39AM -0400, Sean Anderson wrote:
>> >> Hi Tom,
>> >> 
>> >> On 5/4/22 8:06 PM, Tom Rini wrote:
>> >> > On Fri, Apr 22, 2022 at 02:27:41PM -0400, Sean Anderson wrote:
>> >> > 
>> >> >> This converts the fat loader to use spl_load.
>> >> >> 
>> >> >> Signed-off-by: Sean Anderson 
>> >> >> Reviewed-by: Stefan Roese 
>> >> > 
>> >> > On am335x_evm_defconfig, and booting from a FAT SD card I see:
>> >> > Trying to boot from MMC1
>> >> > spl_load_image_fat: error reading image u-boot.img, err - 0
>> >> > SPL: failed to boot from all boot devices
>> >> > ### ERROR ### Please RESET the board ###
>> >> 
>> >> Looks like spl_load_image_fat was expecting bytes read and
>> >> not an errno (and so turned your success into a failure). Will fix.
>> > 
>> > OK.
>> > 
>> >> > Note that while not _this_ patch (but likely the one for raw) breaks
>> >> > booting from my mx6cuboxi via SD card with:
>> >> > Trying to boot from MMC1
>> >> > [hang]
>> >> > 
>> >> 
>> >> Hm, if there's a problem you should at least see
>> >> "mmc_load_image_raw_sector: mmc block read error\n"
>> >> 
>> >> Could you enable DEBUG in common/spl/spl.c and common/spl/spl_mmc.c?
>> > 
>> > U-Boot SPL 2022.07-rc1-00267-g064334e21dde-dirty (May 05 2022 - 11:33:38 
>> > -0400)
>> >>>SPL: board_init_r()
>> > spl_init
>> > Trying to boot from MMC1
>> > spl: mmc boot mode: raw
>> > hdr read sector 8a, count=1
>> > 
>> 
>> Looks like there's a bug in spl_simple_read
>> 
>>  size_t bl_len = info->filename ? ARCH_DMA_MINALIGN : bl_len;
>> 
>> should be
>> 
>>  size_t bl_len = info->filename ? ARCH_DMA_MINALIGN : info->bl_len;
>> 
>> The funny thing is that this kind of bug results in a -Wuninitialized warning
>> on godbolt [1] but *not* from my installed gcc 9.4... Not sure what's going 
>> on
>> there.
>> 
>> In other bugs, there was also a problem calculating bl_shift (ffs instead of 
>> fls).
>> I probably should have tested this the first two times around, but I now 
>> have a "raw"
>> MMC working. I expect that there are probably some similar bugs lurking in 
>> spi/net/nor.
>> I will try and test net, but I don't think I have any spi/nor boards I can 
>> test with.
> 
> OK.  When you're reasonably confident SPI should work I'll go fight
> around with the am335x_evm and check my notes on how to make it SPI
> boot.  Looking at am335x_evm_spiboot_defconfig it would cover what
> you're wanting to check, yes?
> 

I'll send v3 soon and that should be good to test with. Falcon mode SPI boot 
also needs
to be tested, which seems to be rather unpopular:

git grep -l SPI_LOAD $(git grep -l OS_BOOT configs/)
configs/am57xx_evm_defconfig
configs/display5_defconfig
configs/display5_factory_defconfig
configs/dra7xx_evm_defconfig
configs/imx28_xea_defconfig
configs/xilinx_zynq_virt_defconfig
configs/xilinx_zynqmp_virt_defconfig

I'm not sure whether the zynq stuff is virtual as in qemu or something else.

--Sean


Re: [PATCH v2 3/9] spl: Convert fat to spl_load

2022-05-05 Thread Tom Rini
On Thu, May 05, 2022 at 02:53:55PM -0400, Sean Anderson wrote:
> 
> 
> On 5/5/22 11:38 AM, Tom Rini wrote:
> > On Thu, May 05, 2022 at 10:51:39AM -0400, Sean Anderson wrote:
> >> Hi Tom,
> >> 
> >> On 5/4/22 8:06 PM, Tom Rini wrote:
> >> > On Fri, Apr 22, 2022 at 02:27:41PM -0400, Sean Anderson wrote:
> >> > 
> >> >> This converts the fat loader to use spl_load.
> >> >> 
> >> >> Signed-off-by: Sean Anderson 
> >> >> Reviewed-by: Stefan Roese 
> >> > 
> >> > On am335x_evm_defconfig, and booting from a FAT SD card I see:
> >> > Trying to boot from MMC1
> >> > spl_load_image_fat: error reading image u-boot.img, err - 0
> >> > SPL: failed to boot from all boot devices
> >> > ### ERROR ### Please RESET the board ###
> >> 
> >> Looks like spl_load_image_fat was expecting bytes read and
> >> not an errno (and so turned your success into a failure). Will fix.
> > 
> > OK.
> > 
> >> > Note that while not _this_ patch (but likely the one for raw) breaks
> >> > booting from my mx6cuboxi via SD card with:
> >> > Trying to boot from MMC1
> >> > [hang]
> >> > 
> >> 
> >> Hm, if there's a problem you should at least see
> >> "mmc_load_image_raw_sector: mmc block read error\n"
> >> 
> >> Could you enable DEBUG in common/spl/spl.c and common/spl/spl_mmc.c?
> > 
> > U-Boot SPL 2022.07-rc1-00267-g064334e21dde-dirty (May 05 2022 - 11:33:38 
> > -0400)
> >>>SPL: board_init_r()
> > spl_init
> > Trying to boot from MMC1
> > spl: mmc boot mode: raw
> > hdr read sector 8a, count=1
> > 
> 
> Looks like there's a bug in spl_simple_read
> 
>   size_t bl_len = info->filename ? ARCH_DMA_MINALIGN : bl_len;
> 
> should be
> 
>   size_t bl_len = info->filename ? ARCH_DMA_MINALIGN : info->bl_len;
> 
> The funny thing is that this kind of bug results in a -Wuninitialized warning
> on godbolt [1] but *not* from my installed gcc 9.4... Not sure what's going on
> there.
> 
> In other bugs, there was also a problem calculating bl_shift (ffs instead of 
> fls).
> I probably should have tested this the first two times around, but I now have 
> a "raw"
> MMC working. I expect that there are probably some similar bugs lurking in 
> spi/net/nor.
> I will try and test net, but I don't think I have any spi/nor boards I can 
> test with.

OK.  When you're reasonably confident SPI should work I'll go fight
around with the am335x_evm and check my notes on how to make it SPI
boot.  Looking at am335x_evm_spiboot_defconfig it would cover what
you're wanting to check, yes?

-- 
Tom


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Re: [PATCH v2 3/9] spl: Convert fat to spl_load

2022-05-05 Thread Sean Anderson



On 5/5/22 11:38 AM, Tom Rini wrote:
> On Thu, May 05, 2022 at 10:51:39AM -0400, Sean Anderson wrote:
>> Hi Tom,
>> 
>> On 5/4/22 8:06 PM, Tom Rini wrote:
>> > On Fri, Apr 22, 2022 at 02:27:41PM -0400, Sean Anderson wrote:
>> > 
>> >> This converts the fat loader to use spl_load.
>> >> 
>> >> Signed-off-by: Sean Anderson 
>> >> Reviewed-by: Stefan Roese 
>> > 
>> > On am335x_evm_defconfig, and booting from a FAT SD card I see:
>> > Trying to boot from MMC1
>> > spl_load_image_fat: error reading image u-boot.img, err - 0
>> > SPL: failed to boot from all boot devices
>> > ### ERROR ### Please RESET the board ###
>> 
>> Looks like spl_load_image_fat was expecting bytes read and
>> not an errno (and so turned your success into a failure). Will fix.
> 
> OK.
> 
>> > Note that while not _this_ patch (but likely the one for raw) breaks
>> > booting from my mx6cuboxi via SD card with:
>> > Trying to boot from MMC1
>> > [hang]
>> > 
>> 
>> Hm, if there's a problem you should at least see
>> "mmc_load_image_raw_sector: mmc block read error\n"
>> 
>> Could you enable DEBUG in common/spl/spl.c and common/spl/spl_mmc.c?
> 
> U-Boot SPL 2022.07-rc1-00267-g064334e21dde-dirty (May 05 2022 - 11:33:38 
> -0400)
>>>SPL: board_init_r()
> spl_init
> Trying to boot from MMC1
> spl: mmc boot mode: raw
> hdr read sector 8a, count=1
> 

Looks like there's a bug in spl_simple_read

size_t bl_len = info->filename ? ARCH_DMA_MINALIGN : bl_len;

should be

size_t bl_len = info->filename ? ARCH_DMA_MINALIGN : info->bl_len;

The funny thing is that this kind of bug results in a -Wuninitialized warning
on godbolt [1] but *not* from my installed gcc 9.4... Not sure what's going on
there.

In other bugs, there was also a problem calculating bl_shift (ffs instead of 
fls).
I probably should have tested this the first two times around, but I now have a 
"raw"
MMC working. I expect that there are probably some similar bugs lurking in 
spi/net/nor.
I will try and test net, but I don't think I have any spi/nor boards I can test 
with.

--Sean

[1] https://godbolt.org/z/fnaGKvTMr


Re: [PATCH] include: configs: am**x/j721e/j721s2_evm.h: Move the stack pointer init address in arm64

2022-05-05 Thread Tom Rini
On Tue, Apr 19, 2022 at 08:56:02PM +0530, Aswath Govindraju wrote:

> Currently, in case of arm64 bootloader and U-Boot the stack pointer is
> initialized at an offset of NON_SECURE_MSRAM_SIZE from arm64 SPL's text
> base address. After jumping to arm64, execution is done out of DDR.
> Therefore, having an offset corresponding to the size of MSRAM does not
> have any significance.
> 
> Instead, initialize the stack pointer after an offset of 4MB from the SPL
> text base address. This helps in allocating larger memory for stack.
> 
>   ┌┐0x8008
>   ││
>   │   arm64 SPL│
>   ├┤
>   │▲   │
>   ││   │
>   │  STACK │
>   ├┤0x8048
>   │ Memory for Load│
>   │ Buffer Allocation  │
>   ├┤0x8080
>   ││
>   │U-Boot Image│
>   ││
>   └┘
> 
> Signed-off-by: Aswath Govindraju 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [PATCH v2] ls10xxx: Use a sane SPL_SYS_MALLOC_F_LEN default

2022-05-05 Thread Tom Rini
On Thu, Apr 28, 2022 at 12:39:49PM -0400, Sean Anderson wrote:

> SPL_SYS_MALLOC_F_LEN defaults to SYS_MALLOC_F_LEN. 0x1 is 64 KiB, or
> around half of the total OCRAM size. Revert to the default of 0x2000. This
> fixes SPL boot.
> 
> Fixes: 545eceb520 ("imx8/ls10xx: Use a sane SYS_MALLOC_F_LEN default")
> Signed-off-by: Sean Anderson 
> Reviewed-by: Fabio Estevam 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [PATCH] board: synquacer: developerbox: Remove Masami from MAINTAINERS

2022-05-05 Thread Tom Rini
On Thu, Apr 28, 2022 at 06:13:04PM +0900, Masami Hiramatsu wrote:

> Remove Masami Hiramatsu from MAINTAINERS since he will leave
> Linaro and his email will be not available anymore.
> 
> Signed-off-by: Masami Hiramatsu 

Thanks for all your contributions, applied to u-boot/master, thanks!

-- 
Tom


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Re: [PATCH 2/2] sandbox: Avoid binman error when run without device tree

2022-05-05 Thread Tom Rini
On Wed, Apr 27, 2022 at 01:47:57PM -0600, Simon Glass wrote:

> With sandbox, U-Boot can be run without a device tree (i.e. no -d or -T
> parameter). In this case an empty device tree is created for convenience.
> With a recent change this causes an error due to the missing '/binman'
> node.
> 
> Add this node to avoid the problem, as well as a test that U-Boot can
> be run without a device tree.
> 
> Fixes: 059df5624b ("arch: Kconfig: imply BINMAN for SANDBOX")
> Fixes: https://source.denx.de/u-boot/u-boot/-/issues/11
> Signed-off-by: Simon Glass 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [PATCH 1/2] test/py: Add a way to start sandbox without a device tree

2022-05-05 Thread Tom Rini
On Wed, Apr 27, 2022 at 01:47:56PM -0600, Simon Glass wrote:

> This is useful sometimes when running a specific test. Add support for it
> in the existing restart_uboot_with_flags() function.
> 
> Signed-off-by: Simon Glass 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [PATCH v4 3/3] pinctrl: mediatek: add support for different types of IO pins

2022-05-05 Thread Tom Rini
On Thu, Apr 21, 2022 at 02:23:53PM +0800, Sam Shih wrote:

> There are many pins in an SoC, and register usage may vary by pins.
> This patch introduces a concept of "io type" and "io type group"
> to mediatek pinctrl drivers. This can provide different pinconf
> handlers implementation (eg: "bias-pull-up/down", "driving" and
> "input-enable") for IO pins that belong to different types.
> 
> Signed-off-by: Sam Shih 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [PATCH v4 2/3] pinctrl: mediatek: introduce multiple memory bases support

2022-05-05 Thread Tom Rini
On Thu, Apr 21, 2022 at 02:23:52PM +0800, Sam Shih wrote:

> Pinctrl design of some mediatek SoC need to access registers that
> distribute in multiple memory base address. this patch introduce new
> mechanism in mediatek pinctrl driver to support the chips which have
> the new design.
> 
> This patch add a member 'base_calc' in pinctrl private data, and changed
> original 'base' private data to an array of *iomem.
> 
> When 'base_calc' attribute is set, it will requests multiplue regs base
> from the DT, if 'base_calc' attribute is not set, it only use legacy way
> to request single reg resource from the DT.
> 
> Signed-off-by: Sam Shih 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [PATCH v4 1/3] pinctrl: mediatek: rewrite mtk_pinconf_set and related functions

2022-05-05 Thread Tom Rini
On Thu, Apr 21, 2022 at 02:23:51PM +0800, Sam Shih wrote:

> There are many pins in a SoCs, and different pin may belong
> to different "io_type", For example: some pins of MT7622 belongs
> to "io_type A", the other belongs to "io_type B", and pinctrl "V0"
> means handle pinconf via "io_type A" or "io_type B", so SoCs that
> contain "io_type A" and "io_type B" pins, use "V0" in pinctrl driver.
> 
> This patch separates the implementation of register operations
> (e.g: "bias-pull-up/down", "driving" and "input-enable") into
> different functions, and lets the original V0/V1
> ops to call the new functions.
> 
> Signed-off-by: Sam Shih 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [PATCH v1 1/1] gpio: npcm: Add support for Nuvoton NPCM SoCs

2022-05-05 Thread Tom Rini
On Fri, Feb 25, 2022 at 10:14:50AM +0800, Stanley Chu wrote:

> Add Nuvoton BMC NPCM7xx/NPCM8xx gpio driver
> 
> Signed-off-by: Stanley Chu 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [PATCH v3 4/4] timer: npcm: Add NPCM timer support

2022-05-05 Thread Tom Rini
On Tue, Apr 19, 2022 at 01:32:22PM +0800, Jim Liu wrote:

> Add Nuvoton BMC NPCM7xx/NPCM8xx timer driver.
> 
> Signed-off-by: Jim Liu 
> Signed-off-by: Stanley Chu 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [PATCH v3 3/4] serial: npcm: Add support for Nuvoton NPCM SoCs

2022-05-05 Thread Tom Rini
On Tue, Apr 19, 2022 at 01:32:21PM +0800, Jim Liu wrote:

> Add Nuvoton BMC NPCM7xx/NPCM8xx uart driver
> 
> Signed-off-by: Jim Liu 
> Signed-off-by: Stanley Chu 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [PATCH v3 2/4] clk: nuvoton: Add support for NPCM750

2022-05-05 Thread Tom Rini
On Tue, Apr 19, 2022 at 01:32:20PM +0800, Jim Liu wrote:

> Add clock controller driver for NPCM750
> 
> Signed-off-by: Jim Liu 
> Signed-off-by: Stanley Chu 
> Reviewed-by: Sean Anderson 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [PATCH v3 1/4] arm: nuvoton: Add support for Nuvoton NPCM750 BMC

2022-05-05 Thread Tom Rini
On Tue, Apr 19, 2022 at 01:32:19PM +0800, Jim Liu wrote:

> Add basic support for the Nuvoton NPCM750 EVB (Poleg).
> 
> Signed-off-by: Jim Liu 

Applied to u-boot/master, thanks!

-- 
Tom


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[PATCH] ARM: imx: imx8m: Adjust thermal trip points for Industrial parts

2022-05-05 Thread Adam Ford
If the thermal sensor is enabled in U-Boot, adjust the cpu-thermal
trip points for industrial rated parts.

Signed-off-by: Adam Ford 

diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c
index 8e23e6da32..619e04a602 100644
--- a/arch/arm/mach-imx/imx8m/soc.c
+++ b/arch/arm/mach-imx/imx8m/soc.c
@@ -30,6 +30,7 @@
 #include 
 #include 
 #include 
+#include 
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -1207,10 +1208,10 @@ static int cleanup_nodes_for_efi(void *blob)
 
 int ft_system_setup(void *blob, struct bd_info *bd)
 {
+   __maybe_unused int nodeoff;
 #ifdef CONFIG_IMX8MQ
int i = 0;
int rc;
-   int nodeoff;
 
if (get_boot_device() == USB_BOOT) {
disable_dcss_nodes(blob);
@@ -1346,6 +1347,24 @@ usb_modify_speed:
disable_cpu_nodes(blob, 2);
 #endif
 
+#if defined(CONFIG_IMX_TMU)
+   int minc, maxc, prop;
+
+   nodeoff = fdt_path_offset(blob, "/thermal-zones/cpu-thermal/trips");
+
+   /* Only update Industrial grade parts */
+   if (get_cpu_temp_grade(&minc, &maxc) == TEMP_INDUSTRIAL) {
+   fdt_for_each_subnode(prop, blob, nodeoff) {
+   const char *type = fdt_getprop(blob, prop, "type", 
NULL);
+
+   if (type && (!strcmp("critical", type)))
+   fdt_setprop_u32(blob, prop, "temperature", maxc 
* 1000);
+   else if (type && (!strcmp("passive", type)))
+   fdt_setprop_u32(blob, prop, "temperature", 
(maxc - 10) * 1000);
+   }
+   }
+#endif
+
cleanup_nodes_for_efi(blob);
return 0;
 }
-- 
2.25.1



Re: i.MX8MP usb status

2022-05-05 Thread Tim Harvey
On Wed, May 4, 2022 at 6:54 PM Peng Fan (OSS)  wrote:
>
>
>
> On 2022/5/4 20:53, Marek Vasut wrote:
> > On 5/4/22 14:26, Peng Fan wrote:
> >> Hi Marek,
> >
> > Hi,
> >
> >> Since you did some work on i.MX8MP USB, may I know the status?
> >> Does host/device mode both supported in upstream?
> >
> > I only have HOST option available, so for me this is only HOST.
> >
> > I did not test GADGET or OTG .
> >
> >> Any plan on PTN5110 support?
> >
> > I currently don't have hardware with USB-C , so not right now.
> >
> > Do you plan to work on GADGET/OTG/USB-C ?
>
> Typec interface exists in almost all i.MX8M EVK boards. So
> I am thinking to enable gadget together with PTN5110 for uuu, but
> seems typec requires quite lot work if porting linux code or we
> reuse NXP U-Boot downstream ptn5110 code.
>
> Thanks,
> Peng.
>

Peng,

The imx8mp-venice-gw74xx has a Type-C connector on it with USB3.0 as
well (uses a TPS25821 source controller/power-switch which doesn't
have any I2C interface thus no driver). Please cc me if you come up
with a DWC3 OTG gadget driver and I can test it on this board.

Best Regards,

Tim


Re: i.MX8MP usb status

2022-05-05 Thread Marek Vasut

On 5/5/22 03:54, Peng Fan (OSS) wrote:



On 2022/5/4 20:53, Marek Vasut wrote:

On 5/4/22 14:26, Peng Fan wrote:

Hi Marek,


Hi,


Since you did some work on i.MX8MP USB, may I know the status?
Does host/device mode both supported in upstream?


I only have HOST option available, so for me this is only HOST.

I did not test GADGET or OTG .


Any plan on PTN5110 support?


I currently don't have hardware with USB-C , so not right now.

Do you plan to work on GADGET/OTG/USB-C ?


Typec interface exists in almost all i.MX8M EVK boards. So
I am thinking to enable gadget together with PTN5110 for uuu, but
seems typec requires quite lot work if porting linux code or we
reuse NXP U-Boot downstream ptn5110 code.


What's the problem with porting mainline Linux code ? (that would be the 
preferred approach, because then we could synchronize fixes from Linux)


If all you care about is mode switching between host/gadget, then a 
simpler driver might be preferred though.


Re: [PATCH] watchdog: Add MAX6370 watchdog timer driver

2022-05-05 Thread Pali Rohár
On Thursday 05 May 2022 11:36:09 Pali Rohár wrote:
> On Tuesday 03 May 2022 07:16:34 Stefan Roese wrote:
> > On 02.05.22 18:41, Pali Rohár wrote:
> > > MAX6370 watchdog is available e.g. on Freescale P1/P2 RDB-PC boards.
> > > 
> > > Signed-off-by: Pali Rohár 
> > > ---
> > >   drivers/watchdog/Kconfig   |   7 ++
> > >   drivers/watchdog/Makefile  |   1 +
> > >   drivers/watchdog/max6370_wdt.c | 119 +
> > >   3 files changed, 127 insertions(+)
> > >   create mode 100644 drivers/watchdog/max6370_wdt.c
> > > 
> > > diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
> > > index f90f0ca02bce..1801698ac512 100644
> > > --- a/drivers/watchdog/Kconfig
> > > +++ b/drivers/watchdog/Kconfig
> > > @@ -167,6 +167,13 @@ config WDT_GPIO
> > > doc/device-tree-bindings/watchdog/gpio-wdt.txt for
> > > information on how to describe the watchdog in device tree.
> > > +config WDT_MAX6370
> > > + bool "MAX6370 watchdog timer support"
> > > + depends on WDT
> > > + select DM_GPIO
> > > + help
> > > +   Select this to enable max6370 watchdog timer.
> > > +
> > >   config WDT_MPC8xx
> > >   bool "MPC8xx watchdog timer support"
> > >   depends on WDT && MPC8xx
> > > diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile
> > > index a35bd559f51b..f999e4126b4f 100644
> > > --- a/drivers/watchdog/Makefile
> > > +++ b/drivers/watchdog/Makefile
> > > @@ -27,6 +27,7 @@ obj-$(CONFIG_WDT_CORTINA) += cortina_wdt.o
> > >   obj-$(CONFIG_WDT_ORION) += orion_wdt.o
> > >   obj-$(CONFIG_WDT_CDNS) += cdns_wdt.o
> > >   obj-$(CONFIG_WDT_GPIO) += gpio_wdt.o
> > > +obj-$(CONFIG_WDT_MAX6370) += max6370_wdt.o
> > >   obj-$(CONFIG_WDT_MPC8xx) += mpc8xx_wdt.o
> > >   obj-$(CONFIG_WDT_MT7620) += mt7620_wdt.o
> > >   obj-$(CONFIG_WDT_MT7621) += mt7621_wdt.o
> > > diff --git a/drivers/watchdog/max6370_wdt.c 
> > > b/drivers/watchdog/max6370_wdt.c
> > > new file mode 100644
> > > index ..556c6a4b6d6b
> > > --- /dev/null
> > > +++ b/drivers/watchdog/max6370_wdt.c
> > > @@ -0,0 +1,119 @@
> > > +// SPDX-License-Identifier: GPL-2.0+
> > > +// (C) 2022 Pali Rohár 
> > > +
> > > +#include 
> > 
> > AFAIK, it's not recommended any more to include "common.h" in general.
> 
> Hello! I checked that driver compiles without any errors/warnings also
> when common.h is removed. So it can be dropped.

I have tested this driver on P2020 board. Together with P2020 board code
workaround which I sent in separate patch, watchdog is working correctly
https://patchwork.ozlabs.org/project/uboot/patch/20220501122314.32626-2-p...@kernel.org/

> > Looks good, other than this:
> > 
> > Reviewed-by: Stefan Roese 
> > 
> > Thanks,
> > Stefan
> > 
> > > +#include 
> > > +#include 
> > > +#include 
> > > +#include 
> > > +#include 
> > > +
> > > +#define MAX6370_SET_MASK 0x7
> > > +#define MAX6370_SET_1MS  0x0
> > > +#define MAX6370_SET_10MS 0x1
> > > +#define MAX6370_SET_30MS 0x2
> > > +#define MAX6370_SET_DISABLE  0x3
> > > +#define MAX6370_SET_100MS0x4
> > > +#define MAX6370_SET_1S   0x5
> > > +#define MAX6370_SET_10S  0x6
> > > +#define MAX6370_SET_60S  0x7
> > > +
> > > +#define MAX6370_WDI  0x8
> > > +
> > > +struct max6370_wdt {
> > > + void __iomem *reg;
> > > + struct gpio_desc gpio_wdi;
> > > +};
> > > +
> > > +static int max6370_wdt_start(struct udevice *dev, u64 ms, ulong flags)
> > > +{
> > > + struct max6370_wdt *wdt = dev_get_priv(dev);
> > > + u8 val;
> > > +
> > > + val = readb(wdt->reg);
> > > + val &= ~MAX6370_SET_MASK;
> > > +
> > > + if (ms <= 1)
> > > + val |= MAX6370_SET_1MS;
> > > + else if (ms <= 10)
> > > + val |= MAX6370_SET_10MS;
> > > + else if (ms <= 30)
> > > + val |= MAX6370_SET_30MS;
> > > + else if (ms <= 100)
> > > + val |= MAX6370_SET_100MS;
> > > + else if (ms <= 1000)
> > > + val |= MAX6370_SET_1S;
> > > + else if (ms <= 1)
> > > + val |= MAX6370_SET_10S;
> > > + else
> > > + val |= MAX6370_SET_60S;
> > > +
> > > + writeb(val, wdt->reg);
> > > +
> > > + return 0;
> > > +}
> > > +
> > > +static int max6370_wdt_stop(struct udevice *dev)
> > > +{
> > > + struct max6370_wdt *wdt = dev_get_priv(dev);
> > > + u8 val;
> > > +
> > > + val = readb(wdt->reg);
> > > + val &= ~MAX6370_SET_MASK;
> > > + val |= MAX6370_SET_DISABLE;
> > > + writeb(val, wdt->reg);
> > > +
> > > + return 0;
> > > +}
> > > +
> > > +static int max6370_wdt_reset(struct udevice *dev)
> > > +{
> > > + struct max6370_wdt *wdt = dev_get_priv(dev);
> > > + u8 val;
> > > +
> > > + if (dm_gpio_is_valid(&wdt->gpio_wdi)) {
> > > + dm_gpio_set_value(&wdt->gpio_wdi, 1);
> > > + udelay(1);
> > > + dm_gpio_set_value(&wdt->gpio_wdi, 0);
> > > + } else {
> > > + val = readb(wdt->reg);
> > > + writeb(val | MAX6370_WDI, wdt->reg);
> > > + writeb(val & ~MAX6370_WDI, wdt->reg);
> > > + }
> > > +
> > > + return 0;
> > > +}
> > >

[PATCH v4 16/16] [RFC] misc: nvmem: Convert to using udevices

2022-05-05 Thread Sean Anderson
Instead of calling uclass methods directly, instead create some nvmem
devices solely for the purpose of holding nvmem ops. This is primarily
to illustrate the size difference between these approaches.

This patch should not be applied.

Signed-off-by: Sean Anderson 
Patch-prefix: RFC
---

Changes in v4:
- New

 doc/api/nvmem.rst  |   3 --
 drivers/misc/i2c_eeprom.c  |  37 ++
 drivers/misc/misc-uclass.c |  58 +++--
 drivers/misc/nvmem.c   | 100 -
 drivers/rtc/rtc-uclass.c   |  46 +++--
 include/dm/uclass-id.h |   1 +
 include/nvmem.h|  79 +++--
 7 files changed, 233 insertions(+), 91 deletions(-)

diff --git a/doc/api/nvmem.rst b/doc/api/nvmem.rst
index d923784652..15c9b5b839 100644
--- a/doc/api/nvmem.rst
+++ b/doc/api/nvmem.rst
@@ -3,8 +3,5 @@
 NVMEM API
 =
 
-.. kernel-doc:: include/nvmem.h
-   :doc: Design
-
 .. kernel-doc:: include/nvmem.h
:internal:
diff --git a/drivers/misc/i2c_eeprom.c b/drivers/misc/i2c_eeprom.c
index 4302e180ac..3f6c7ebf4a 100644
--- a/drivers/misc/i2c_eeprom.c
+++ b/drivers/misc/i2c_eeprom.c
@@ -14,6 +14,7 @@
 #include 
 #include 
 #include 
+#include 
 
 struct i2c_eeprom_drv_data {
u32 size; /* size in bytes */
@@ -374,7 +375,43 @@ U_BOOT_DRIVER(i2c_eeprom_partition) = {
.ops= &i2c_eeprom_partition_ops,
 };
 
+static int i2c_eeprom_nvmem_read(struct udevice *dev, unsigned int offset,
+void *buf, size_t size)
+{
+   return i2c_eeprom_read(dev_get_parent(dev), offset, buf, size);
+}
+
+static int i2c_eeprom_nvmem_write(struct udevice *dev, unsigned int offset,
+ const void *buf, size_t size)
+{
+   return i2c_eeprom_write(dev_get_parent(dev), offset, buf, size);
+}
+
+static struct __maybe_unused nvmem_ops i2c_eeprom_nvmem_ops = {
+   .read = i2c_eeprom_nvmem_read,
+   .write = i2c_eeprom_nvmem_write,
+};
+
+#if CONFIG_IS_ENABLED(NVMEM)
+U_BOOT_DRIVER(i2c_eeprom_nvmem) = {
+   .name   = "i2c_eeprom_nvmem",
+   .id = UCLASS_NVMEM,
+   .ops= &i2c_eeprom_nvmem_ops,
+   .flags  = DM_FLAG_NAME_ALLOCED,
+};
+#endif
+
+#if CONFIG_IS_ENABLED(NVMEM)
+static int i2c_eeprom_post_bind(struct udevice *dev)
+{
+   return nvmem_register(dev, DM_DRIVER_GET(misc_nvmem));
+}
+#endif
+
 UCLASS_DRIVER(i2c_eeprom) = {
.id = UCLASS_I2C_EEPROM,
.name   = "i2c_eeprom",
+#if CONFIG_IS_ENABLED(NVMEM)
+   .post_bind  = i2c_eeprom_post_bind,
+#endif
 };
diff --git a/drivers/misc/misc-uclass.c b/drivers/misc/misc-uclass.c
index cfe9d562fa..e9b58d3abe 100644
--- a/drivers/misc/misc-uclass.c
+++ b/drivers/misc/misc-uclass.c
@@ -9,6 +9,7 @@
 #include 
 #include 
 #include 
+#include 
 
 /*
  * Implement a  miscellaneous uclass for those do not fit other more
@@ -67,10 +68,61 @@ int misc_set_enabled(struct udevice *dev, bool val)
return ops->set_enabled(dev, val);
 }
 
+static int misc_nvmem_read(struct udevice *dev, unsigned int offset, void *buf,
+  size_t size)
+{
+   int ret = misc_read(dev_get_parent(dev), offset, buf, size);
+
+   if (ret < 0)
+   return ret;
+   if (ret != size)
+   return -EIO;
+   return 0;
+}
+
+static int misc_nvmem_write(struct udevice *dev, unsigned int offset,
+   const void *buf, size_t size)
+{
+   int ret = misc_write(dev_get_parent(dev), offset, buf, size);
+
+   if (ret < 0)
+   return ret;
+   if (ret != size)
+   return -EIO;
+   return 0;
+}
+
+static struct __maybe_unused nvmem_ops misc_nvmem_ops = {
+   .read = misc_nvmem_read,
+   .write = misc_nvmem_write,
+};
+
+#if CONFIG_IS_ENABLED(NVMEM)
+U_BOOT_DRIVER(misc_nvmem) = {
+   .name   = "misc_nvmem",
+   .id = UCLASS_NVMEM,
+   .ops= &misc_nvmem_ops,
+   .flags  = DM_FLAG_NAME_ALLOCED,
+};
+#endif
+
+static int misc_post_bind(struct udevice *dev)
+{
+#if CONFIG_IS_ENABLED(OF_REAL)
+   int ret = dm_scan_fdt_dev(dev);
+
+   if (ret)
+   return ret;
+#endif
+#if CONFIG_IS_ENABLED(NVMEM)
+   return nvmem_register(dev, DM_DRIVER_GET(misc_nvmem));
+#else
+   return 0;
+#endif
+}
+
 UCLASS_DRIVER(misc) = {
.id = UCLASS_MISC,
.name   = "misc",
-#if CONFIG_IS_ENABLED(OF_REAL)
-   .post_bind  = dm_scan_fdt_dev,
-#endif
+   .post_bind  = misc_post_bind,
 };
diff --git a/drivers/misc/nvmem.c b/drivers/misc/nvmem.c
index 5a2bd1f9f7..afd8c7b5ab 100644
--- a/drivers/misc/nvmem.c
+++ b/drivers/misc/nvmem.c
@@ -10,90 +10,48 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
 
+int nvmem_register(struct udevice *dev, const struct driver* drv)
+{
+   char *name;
+   int name_size;
+   static const char fmt[] = "%s.nvmem";
+
+   as

[PATCH v4 15/16] test: Load mac address using misc device

2022-05-05 Thread Sean Anderson
This loads a mac address using a misc device using the nvmem interface.

Signed-off-by: Sean Anderson 
---

(no changes since v1)

 arch/sandbox/dts/test.dts   | 9 -
 drivers/misc/misc_sandbox.c | 3 +++
 2 files changed, 11 insertions(+), 1 deletion(-)

diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index 3e0b454efb..c77eaf4950 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -532,7 +532,8 @@
eth_5: eth@10003000 {
compatible = "sandbox,eth";
reg = <0x10003000 0x1000>;
-   mac-address = [ 02 00 11 22 33 46 ];
+   nvmem-cells = <ð5_addr>;
+   nvmem-cell-names = "mac-address";
};
 
eth_3: sbe5 {
@@ -913,7 +914,13 @@
};
 
misc-test {
+   #address-cells = <1>;
+   #size-cells = <1>;
compatible = "sandbox,misc_sandbox";
+
+   eth5_addr: mac-address@10 {
+   reg = <0x10 6>;
+   };
};
 
mmc2 {
diff --git a/drivers/misc/misc_sandbox.c b/drivers/misc/misc_sandbox.c
index 0e4292fd0a..31cde2dbac 100644
--- a/drivers/misc/misc_sandbox.c
+++ b/drivers/misc/misc_sandbox.c
@@ -112,8 +112,11 @@ static const struct misc_ops misc_sandbox_ops = {
 int misc_sandbox_probe(struct udevice *dev)
 {
struct misc_sandbox_priv *priv = dev_get_priv(dev);
+   /* For eth5 */
+   const u8 mac[] = { 0x02, 0x00, 0x11, 0x22, 0x33, 0x46 };
 
priv->enabled = true;
+   memcpy(&priv->mem[16], mac, sizeof(mac));
 
return 0;
 }
-- 
2.35.1.1320.gc452695387.dirty



[PATCH v4 14/16] test: Load mac address using RTC

2022-05-05 Thread Sean Anderson
This uses the nvmem API to load a mac address from an RTC.

Signed-off-by: Sean Anderson 
Reviewed-by: Simon Glass 
---

(no changes since v1)

 arch/sandbox/dts/test.dts  |  9 -
 drivers/rtc/i2c_rtc_emul.c | 10 ++
 2 files changed, 18 insertions(+), 1 deletion(-)

diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index 9aed071aa0..3e0b454efb 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -558,7 +558,8 @@
dsa_eth0: dsa-test-eth {
compatible = "sandbox,eth";
reg = <0x10006000 0x1000>;
-   mac-address = [ 02 00 11 22 33 48 ];
+   nvmem-cells = <ð4_addr>;
+   nvmem-cell-names = "mac-address";
};
 
dsa-test {
@@ -722,9 +723,15 @@
};
 
rtc_0: rtc@43 {
+   #address-cells = <1>;
+   #size-cells = <1>;
reg = <0x43>;
compatible = "sandbox-rtc";
sandbox,emul = <&emul0>;
+
+   eth4_addr: mac-address@40 {
+   reg = <0x40 6>;
+   };
};
 
rtc_1: rtc@61 {
diff --git a/drivers/rtc/i2c_rtc_emul.c b/drivers/rtc/i2c_rtc_emul.c
index ba418c25da..c307d6036d 100644
--- a/drivers/rtc/i2c_rtc_emul.c
+++ b/drivers/rtc/i2c_rtc_emul.c
@@ -203,6 +203,15 @@ static int sandbox_i2c_rtc_bind(struct udevice *dev)
return 0;
 }
 
+static int sandbox_i2c_rtc_probe(struct udevice *dev)
+{
+   const u8 mac[] = { 0x02, 0x00, 0x11, 0x22, 0x33, 0x48 };
+   struct sandbox_i2c_rtc_plat_data *plat = dev_get_plat(dev);
+
+   memcpy(&plat->reg[0x40], mac, sizeof(mac));
+   return 0;
+}
+
 static const struct udevice_id sandbox_i2c_rtc_ids[] = {
{ .compatible = "sandbox,i2c-rtc-emul" },
{ }
@@ -213,6 +222,7 @@ U_BOOT_DRIVER(sandbox_i2c_rtc_emul) = {
.id = UCLASS_I2C_EMUL,
.of_match   = sandbox_i2c_rtc_ids,
.bind   = sandbox_i2c_rtc_bind,
+   .probe  = sandbox_i2c_rtc_probe,
.priv_auto  = sizeof(struct sandbox_i2c_rtc),
.plat_auto  = sizeof(struct sandbox_i2c_rtc_plat_data),
.ops= &sandbox_i2c_rtc_emul_ops,
-- 
2.35.1.1320.gc452695387.dirty



[PATCH v4 13/16] test: Load mac address with i2c eeprom

2022-05-05 Thread Sean Anderson
This uses an i2c eeprom to load a mac address using the nvmem interface.
Enable I2C_EEPROM for sandbox SPL since it is the only sandbox config
which doesn't enable it eeprom.

Signed-off-by: Sean Anderson 
Reviewed-by: Simon Glass 
---

Changes in v4:
- Enable CONFIG_I2C_EEPROM for sandbox_spl_defconfig

 arch/sandbox/dts/test.dts  | 9 -
 configs/sandbox_spl_defconfig  | 1 +
 drivers/misc/i2c_eeprom_emul.c | 4 
 3 files changed, 13 insertions(+), 1 deletion(-)

diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index 318dc2dcb1..9aed071aa0 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -538,7 +538,8 @@
eth_3: sbe5 {
compatible = "sandbox,eth";
reg = <0x10005000 0x1000>;
-   mac-address = [ 02 00 11 22 33 45 ];
+   nvmem-cells = <ð3_addr>;
+   nvmem-cell-names = "mac-address";
};
 
eth@10004000 {
@@ -701,6 +702,8 @@
pinctrl-0 = <&pinmux_i2c0_pins>;
 
eeprom@2c {
+   #address-cells = <1>;
+   #size-cells = <1>;
reg = <0x2c>;
compatible = "i2c-eeprom";
sandbox,emul = <&emul_eeprom>;
@@ -712,6 +715,10 @@
reg = <10 2>;
};
};
+
+   eth3_addr: mac-address@24 {
+   reg = <24 6>;
+   };
};
 
rtc_0: rtc@43 {
diff --git a/configs/sandbox_spl_defconfig b/configs/sandbox_spl_defconfig
index 0a32311f77..78d295f1f8 100644
--- a/configs/sandbox_spl_defconfig
+++ b/configs/sandbox_spl_defconfig
@@ -154,6 +154,7 @@ CONFIG_CROS_EC_SPI=y
 CONFIG_P2SB=y
 CONFIG_PWRSEQ=y
 CONFIG_SPL_PWRSEQ=y
+CONFIG_I2C_EEPROM=y
 CONFIG_MMC_SANDBOX=y
 CONFIG_SPI_FLASH_SANDBOX=y
 CONFIG_SPI_FLASH_ATMEL=y
diff --git a/drivers/misc/i2c_eeprom_emul.c b/drivers/misc/i2c_eeprom_emul.c
index 85b127c406..6f32087ede 100644
--- a/drivers/misc/i2c_eeprom_emul.c
+++ b/drivers/misc/i2c_eeprom_emul.c
@@ -171,11 +171,15 @@ static int sandbox_i2c_eeprom_probe(struct udevice *dev)
 {
struct sandbox_i2c_flash_plat_data *plat = dev_get_plat(dev);
struct sandbox_i2c_flash *priv = dev_get_priv(dev);
+   /* For eth3 */
+   const u8 mac[] = { 0x02, 0x00, 0x11, 0x22, 0x33, 0x45 };
 
priv->data = calloc(1, plat->size);
if (!priv->data)
return -ENOMEM;
 
+   memcpy(&priv->data[24], mac, sizeof(mac));
+
return 0;
 }
 
-- 
2.35.1.1320.gc452695387.dirty



[PATCH v4 12/16] net: Add support for reading mac addresses from nvmem cells

2022-05-05 Thread Sean Anderson
This adds support for reading mac addresses from the "mac-address" nvmem
cell. If there is no (local-)mac-address property, then we will try
reading from an nvmem cell.

For some existing examples of this property, refer to imx8mn.dtsi and
imx8mp.dtsi. Unfortunately, fuse drivers have not yet been converted
to DM.

Signed-off-by: Sean Anderson 
Reviewed-by: Simon Glass 
---

(no changes since v1)

 net/eth-uclass.c | 13 +
 1 file changed, 9 insertions(+), 4 deletions(-)

diff --git a/net/eth-uclass.c b/net/eth-uclass.c
index bcefc54ded..0f6b45b002 100644
--- a/net/eth-uclass.c
+++ b/net/eth-uclass.c
@@ -14,6 +14,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -507,17 +508,21 @@ static bool eth_dev_get_mac_address(struct udevice *dev, 
u8 mac[ARP_HLEN])
 {
 #if CONFIG_IS_ENABLED(OF_CONTROL)
const uint8_t *p;
+   struct nvmem_cell mac_cell;
 
p = dev_read_u8_array_ptr(dev, "mac-address", ARP_HLEN);
if (!p)
p = dev_read_u8_array_ptr(dev, "local-mac-address", ARP_HLEN);
 
-   if (!p)
+   if (p) {
+   memcpy(mac, p, ARP_HLEN);
+   return true;
+   }
+
+   if (nvmem_cell_get_by_name(dev, "mac-address", &mac_cell))
return false;
 
-   memcpy(mac, p, ARP_HLEN);
-
-   return true;
+   return !nvmem_cell_read(&mac_cell, mac, ARP_HLEN);
 #else
return false;
 #endif
-- 
2.35.1.1320.gc452695387.dirty



[PATCH v4 11/16] sandbox: Enable NVMEM

2022-05-05 Thread Sean Anderson
This enables NVMEM for all sandbox defconfigs, enabling it to be used in
unit tests in the next few commits.

Signed-off-by: Sean Anderson 
Reviewed-by: Simon Glass 
---

Changes in v4:
- Enable CONFIG_NVMEM for sandbox_spl_defconfig

 configs/sandbox64_defconfig| 1 +
 configs/sandbox_defconfig  | 1 +
 configs/sandbox_flattree_defconfig | 1 +
 configs/sandbox_noinst_defconfig   | 1 +
 configs/sandbox_spl_defconfig  | 2 ++
 5 files changed, 6 insertions(+)

diff --git a/configs/sandbox64_defconfig b/configs/sandbox64_defconfig
index d7f22b39ae..fc7e100eaa 100644
--- a/configs/sandbox64_defconfig
+++ b/configs/sandbox64_defconfig
@@ -144,6 +144,7 @@ CONFIG_LED_GPIO=y
 CONFIG_DM_MAILBOX=y
 CONFIG_SANDBOX_MBOX=y
 CONFIG_MISC=y
+CONFIG_NVMEM=y
 CONFIG_CROS_EC=y
 CONFIG_CROS_EC_I2C=y
 CONFIG_CROS_EC_LPC=y
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index fe8ea4626d..cf02027b12 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -187,6 +187,7 @@ CONFIG_LED_GPIO=y
 CONFIG_DM_MAILBOX=y
 CONFIG_SANDBOX_MBOX=y
 CONFIG_MISC=y
+CONFIG_NVMEM=y
 CONFIG_CROS_EC=y
 CONFIG_CROS_EC_I2C=y
 CONFIG_CROS_EC_LPC=y
diff --git a/configs/sandbox_flattree_defconfig 
b/configs/sandbox_flattree_defconfig
index 80a4be47eb..6eb4e348a2 100644
--- a/configs/sandbox_flattree_defconfig
+++ b/configs/sandbox_flattree_defconfig
@@ -117,6 +117,7 @@ CONFIG_LED_GPIO=y
 CONFIG_DM_MAILBOX=y
 CONFIG_SANDBOX_MBOX=y
 CONFIG_MISC=y
+CONFIG_NVMEM=y
 CONFIG_CROS_EC=y
 CONFIG_CROS_EC_I2C=y
 CONFIG_CROS_EC_LPC=y
diff --git a/configs/sandbox_noinst_defconfig b/configs/sandbox_noinst_defconfig
index c9430da0f0..e9cb299538 100644
--- a/configs/sandbox_noinst_defconfig
+++ b/configs/sandbox_noinst_defconfig
@@ -143,6 +143,7 @@ CONFIG_LED_GPIO=y
 CONFIG_DM_MAILBOX=y
 CONFIG_SANDBOX_MBOX=y
 CONFIG_MISC=y
+CONFIG_NVMEM=y
 CONFIG_CROS_EC=y
 CONFIG_CROS_EC_I2C=y
 CONFIG_CROS_EC_LPC=y
diff --git a/configs/sandbox_spl_defconfig b/configs/sandbox_spl_defconfig
index 13a76e89ea..0a32311f77 100644
--- a/configs/sandbox_spl_defconfig
+++ b/configs/sandbox_spl_defconfig
@@ -144,6 +144,8 @@ CONFIG_LED_GPIO=y
 CONFIG_DM_MAILBOX=y
 CONFIG_SANDBOX_MBOX=y
 CONFIG_MISC=y
+CONFIG_NVMEM=y
+CONFIG_SPL_NVMEM=y
 CONFIG_CROS_EC=y
 CONFIG_CROS_EC_I2C=y
 CONFIG_CROS_EC_LPC=y
-- 
2.35.1.1320.gc452695387.dirty



[PATCH v4 10/16] misc: Add support for nvmem cells

2022-05-05 Thread Sean Anderson
This adds support for "nvmem cells" as seen in Linux. The nvmem device
class in Linux is used for various assorted ROMs and EEPROMs. In this
sense, it is similar to UCLASS_MISC, but also includes
UCLASS_I2C_EEPROM, UCLASS_RTC, and UCLASS_MTD. New drivers corresponding
to a Linux-style nvmem device should be implemented as one of the
previously-mentioned uclasses. The nvmem API acts as a compatibility
layer to adapt the (slightly different) APIs of these uclasses. It also
handles the lookup of nvmem cells.

While nvmem devices can be accessed directly, they are most often used
by reading/writing contiguous values called "cells". Cells typically
hold information like calibration, versions, or configuration (such as
mac addresses).

nvmem devices can specify "cells" in their device tree:

qfprom: eeprom@70 {
#address-cells = <1>;
#size-cells = <1>;
reg = <0x0070 0x10>;

/* ... */

tsens_calibration: calib@404 {
reg = <0x404 0x10>;
};
};

which can then be referenced like:

tsens {
/* ... */
nvmem-cells = <&tsens_calibration>;
nvmem-cell-names = "calibration";
};

The tsens driver could then read the calibration value like:

struct nvmem_cell cal_cell;
u8 cal[16];
nvmem_cell_get_by_name(dev, "calibration", &cal_cell);
nvmem_cell_read(&cal_cell, cal, sizeof(cal));

Because nvmem devices are not all of the same uclass, supported uclasses
must register a nvmem_interface struct. This allows CONFIG_NVMEM to be
enabled without depending on specific uclasses. At the moment,
nvmem_interface is very bare-bones, and assumes that no initialization
is necessary. However, this could be amended in the future.

Although I2C_EEPROM and MISC are quite similar (and could likely be
unified), they present different read/write function signatures. To
abstract over this, NVMEM uses the same read/write signature as Linux.
In particular, short read/writes are not allowed, which is allowed by
MISC.

The functionality implemented by nvmem cells is very similar to that
provided by i2c_eeprom_partition. "fixed-partition"s for eeproms does
not seem to have made its way into Linux or into any device tree other
than sandbox. It is possible that with the introduction of this API it
would be possible to remove it.

Signed-off-by: Sean Anderson 
---

Changes in v4:
- Fix failing to find nvmem devices if some supported uclasses were not
  enabled.
- Remove typedefs from documentation
- Document some of the design background, and why a new uclass was not
  created.

Changes in v2:
- Call the appropriate API functions directly from
  nvmem_cell_(read|write). This means we can drop the nvmem_interface
  machinery.

 MAINTAINERS   |   7 +++
 doc/api/index.rst |   1 +
 doc/api/nvmem.rst |  10 +++
 drivers/misc/Kconfig  |  16 +
 drivers/misc/Makefile |   1 +
 drivers/misc/nvmem.c  | 142 ++
 include/nvmem.h   | 134 +++
 7 files changed, 311 insertions(+)
 create mode 100644 doc/api/nvmem.rst
 create mode 100644 drivers/misc/nvmem.c
 create mode 100644 include/nvmem.h

diff --git a/MAINTAINERS b/MAINTAINERS
index 56be0bfad0..01f4581d6a 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1080,6 +1080,13 @@ F:   cmd/nvme.c
 F: include/nvme.h
 F: doc/develop/driver-model/nvme.rst
 
+NVMEM
+M: Sean Anderson 
+S: Maintained
+F: doc/api/nvmem.rst
+F: drivers/misc/nvmem.c
+F: include/nvmem.h
+
 NXP C45 TJA11XX PHY DRIVER
 M: Radu Pirea 
 S: Maintained
diff --git a/doc/api/index.rst b/doc/api/index.rst
index 72fea981b7..a9338cfef9 100644
--- a/doc/api/index.rst
+++ b/doc/api/index.rst
@@ -14,6 +14,7 @@ U-Boot API documentation
linker_lists
lmb
logging
+   nvmem
pinctrl
rng
sandbox
diff --git a/doc/api/nvmem.rst b/doc/api/nvmem.rst
new file mode 100644
index 00..d923784652
--- /dev/null
+++ b/doc/api/nvmem.rst
@@ -0,0 +1,10 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+NVMEM API
+=
+
+.. kernel-doc:: include/nvmem.h
+   :doc: Design
+
+.. kernel-doc:: include/nvmem.h
+   :internal:
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index dab7a99c68..eaf7bb63ba 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -31,6 +31,22 @@ config TPL_MISC
  set of generic read, write and ioctl methods may be used to
  access the device.
 
+config NVMEM
+   bool "NVMEM support"
+   help
+ This adds support for a common interface to different types of
+ non-volatile memory. Consumers can use nvmem-cells properties to look
+ up hardware configuration data such as MAC addresses and calibration
+ settings.
+
+config SPL_NVMEM
+   bool "NVMEM support in SPL"
+   help
+ This adds sup

[PATCH v4 09/16] misc: i2c_eeprom: Add fallbacks

2022-05-05 Thread Sean Anderson
Add some fallback functions for when i2c_eeprom is disabled. This allows
code to reference i2c_eeprom_* functions without needing to check
whether support has been compiled in.

Signed-off-by: Sean Anderson 
---

Changes in v4:
- New

 include/i2c_eeprom.h | 24 
 1 file changed, 24 insertions(+)

diff --git a/include/i2c_eeprom.h b/include/i2c_eeprom.h
index 90fdb25232..32dcb03497 100644
--- a/include/i2c_eeprom.h
+++ b/include/i2c_eeprom.h
@@ -6,6 +6,8 @@
 #ifndef __I2C_EEPROM
 #define __I2C_EEPROM
 
+struct udevice;
+
 struct i2c_eeprom_ops {
int (*read)(struct udevice *dev, int offset, uint8_t *buf, int size);
int (*write)(struct udevice *dev, int offset, const uint8_t *buf,
@@ -20,6 +22,7 @@ struct i2c_eeprom {
unsigned long size;
 };
 
+#if CONFIG_IS_ENABLED(I2C_EEPROM)
 /*
  * i2c_eeprom_read() - read bytes from an I2C EEPROM chip
  *
@@ -54,4 +57,25 @@ int i2c_eeprom_write(struct udevice *dev, int offset, const 
uint8_t *buf,
  */
 int i2c_eeprom_size(struct udevice *dev);
 
+#else /* !I2C_EEPROM */
+
+static inline int i2c_eeprom_read(struct udevice *dev, int offset, uint8_t 
*buf,
+ int size)
+{
+   return -ENOSYS;
+}
+
+static inline int i2c_eeprom_write(struct udevice *dev, int offset,
+  const uint8_t *buf, int size)
+{
+   return -ENOSYS;
+}
+
+static inline int i2c_eeprom_size(struct udevice *dev)
+{
+   return -ENOSYS;
+}
+
+#endif /* I2C_EEPROM */
+
 #endif
-- 
2.35.1.1320.gc452695387.dirty



[PATCH v4 08/16] misc: i2c_eeprom: Make i2c_eeprom_write use a const buf

2022-05-05 Thread Sean Anderson
i2c_eeprom_ops->write uses a const buf, so use one for the wrapper
function as well.

Signed-off-by: Sean Anderson 
Reviewed-by: Simon Glass 
---

(no changes since v1)

 drivers/misc/i2c_eeprom.c | 3 ++-
 include/i2c_eeprom.h  | 3 ++-
 2 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/misc/i2c_eeprom.c b/drivers/misc/i2c_eeprom.c
index 89a450d0f8..4302e180ac 100644
--- a/drivers/misc/i2c_eeprom.c
+++ b/drivers/misc/i2c_eeprom.c
@@ -33,7 +33,8 @@ int i2c_eeprom_read(struct udevice *dev, int offset, uint8_t 
*buf, int size)
return ops->read(dev, offset, buf, size);
 }
 
-int i2c_eeprom_write(struct udevice *dev, int offset, uint8_t *buf, int size)
+int i2c_eeprom_write(struct udevice *dev, int offset, const uint8_t *buf,
+int size)
 {
const struct i2c_eeprom_ops *ops = device_get_ops(dev);
 
diff --git a/include/i2c_eeprom.h b/include/i2c_eeprom.h
index 3ad565684f..90fdb25232 100644
--- a/include/i2c_eeprom.h
+++ b/include/i2c_eeprom.h
@@ -42,7 +42,8 @@ int i2c_eeprom_read(struct udevice *dev, int offset, uint8_t 
*buf, int size);
  *
  * Return: 0 on success, -ve on failure
  */
-int i2c_eeprom_write(struct udevice *dev, int offset, uint8_t *buf, int size);
+int i2c_eeprom_write(struct udevice *dev, int offset, const uint8_t *buf,
+int size);
 
 /*
  * i2c_eeprom_size() - get size of I2C EEPROM chip
-- 
2.35.1.1320.gc452695387.dirty



[PATCH v4 07/16] net: dsa: Fix segmentation fault if master fails to probe

2022-05-05 Thread Sean Anderson
If the DSA master fails to probe for whatever reason, then DSA devices
will continue on as if nothing is wrong. This can cause incorrect
behavior. In particular, on sandbox, dsa_sandbox_probe attempts to
access the master's private data. This is only safe to do if the master
has been probed first. Fix this by probing the master after we look it
up, and bailing out if we get an error.

Fixes: fc054d563b ("net: Introduce DSA class for Ethernet switches")
Signed-off-by: Sean Anderson 
---

Changes in v4:
- New

 net/dsa-uclass.c | 6 --
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/net/dsa-uclass.c b/net/dsa-uclass.c
index 9ff55a02fb..3bf4351c84 100644
--- a/net/dsa-uclass.c
+++ b/net/dsa-uclass.c
@@ -477,8 +477,10 @@ static int dsa_pre_probe(struct udevice *dev)
return -ENODEV;
}
 
-   uclass_find_device_by_ofnode(UCLASS_ETH, pdata->master_node,
-&priv->master_dev);
+   err = uclass_get_device_by_ofnode(UCLASS_ETH, pdata->master_node,
+ &priv->master_dev);
+   if (err)
+   return err;
 
/* Simulate a probing event for the CPU port */
if (ops->port_probe) {
-- 
2.35.1.1320.gc452695387.dirty



[PATCH v4 06/16] sandbox: Move some mac addresses to device tree

2022-05-05 Thread Sean Anderson
This prevents some conflicts when running sandbox with -D, since the
"rom" mac address will be random and won't match the environment. We
still need to keep addresses for eth1 and eth6 in the environment,
because dm_test_eth_rotate expects to be able to disable them by
removing their envaddr variables. This can likely be fixed in a future
series by adding a function to cause sandbox eth_opts callback for a
particular mac to fail immediately.

Signed-off-by: Sean Anderson 
Reviewed-by: Simon Glass 
---

(no changes since v1)

 arch/sandbox/dts/test.dts | 4 
 board/sandbox/sandbox.env | 4 
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index e486bdb531..318dc2dcb1 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -532,11 +532,13 @@
eth_5: eth@10003000 {
compatible = "sandbox,eth";
reg = <0x10003000 0x1000>;
+   mac-address = [ 02 00 11 22 33 46 ];
};
 
eth_3: sbe5 {
compatible = "sandbox,eth";
reg = <0x10005000 0x1000>;
+   mac-address = [ 02 00 11 22 33 45 ];
};
 
eth@10004000 {
@@ -547,6 +549,7 @@
phy_eth0: phy-test-eth {
compatible = "sandbox,eth";
reg = <0x10007000 0x1000>;
+   mac-address = [ 02 00 11 22 33 49 ];
phy-handle = <ðphy1>;
phy-mode = "2500base-x";
};
@@ -554,6 +557,7 @@
dsa_eth0: dsa-test-eth {
compatible = "sandbox,eth";
reg = <0x10006000 0x1000>;
+   mac-address = [ 02 00 11 22 33 48 ];
};
 
dsa-test {
diff --git a/board/sandbox/sandbox.env b/board/sandbox/sandbox.env
index 88ed7a9606..a2c19702d6 100644
--- a/board/sandbox/sandbox.env
+++ b/board/sandbox/sandbox.env
@@ -6,11 +6,7 @@ stdout=serial,vidconsole
 stderr=serial,vidconsole
 
 ethaddr=02:00:11:22:33:44
-eth3addr=02:00:11:22:33:45
-eth4addr=02:00:11:22:33:48
-eth5addr=02:00:11:22:33:46
 eth6addr=02:00:11:22:33:47
-eth8addr=02:00:11:22:33:49
 ipaddr=192.0.2.1
 
 /*
-- 
2.35.1.1320.gc452695387.dirty



[PATCH v4 05/16] sandbox: Remove eth2addr from environment

2022-05-05 Thread Sean Anderson
DSA interfaces use the same mac address for each interface, unless
instructed otherwise. Just set eth4addr and let eth2addr and eth7addr be
set automatically.

Signed-off-by: Sean Anderson 
Reviewed-by: Simon Glass 
---

(no changes since v1)

 board/sandbox/sandbox.env | 1 -
 1 file changed, 1 deletion(-)

diff --git a/board/sandbox/sandbox.env b/board/sandbox/sandbox.env
index 6dedc755fa..88ed7a9606 100644
--- a/board/sandbox/sandbox.env
+++ b/board/sandbox/sandbox.env
@@ -6,7 +6,6 @@ stdout=serial,vidconsole
 stderr=serial,vidconsole
 
 ethaddr=02:00:11:22:33:44
-eth2addr=02:00:11:22:33:48
 eth3addr=02:00:11:22:33:45
 eth4addr=02:00:11:22:33:48
 eth5addr=02:00:11:22:33:46
-- 
2.35.1.1320.gc452695387.dirty



[PATCH v4 04/16] sandbox: net: Remove fake-host-hwaddr

2022-05-05 Thread Sean Anderson
Instead of reading a pseudo-rom mac address from the device tree, just use
whatever we get from write_hwaddr. This has the effect of using the mac
address from the environment (or from the device tree, if it is
specified).

Signed-off-by: Sean Anderson 
Reviewed-by: Simon Glass 
Acked-by: Ramon Fried 
---

(no changes since v1)

 arch/sandbox/dts/sandbox.dts   |  1 -
 arch/sandbox/dts/sandbox64.dts |  1 -
 arch/sandbox/dts/test.dts  |  6 --
 drivers/net/sandbox.c  | 10 ++
 4 files changed, 2 insertions(+), 16 deletions(-)

diff --git a/arch/sandbox/dts/sandbox.dts b/arch/sandbox/dts/sandbox.dts
index 18fde1c8c6..21f00fcab5 100644
--- a/arch/sandbox/dts/sandbox.dts
+++ b/arch/sandbox/dts/sandbox.dts
@@ -63,7 +63,6 @@
eth@10002000 {
compatible = "sandbox,eth";
reg = <0x10002000 0x1000>;
-   fake-host-hwaddr = [00 00 66 44 22 00];
};
 
host-fs {
diff --git a/arch/sandbox/dts/sandbox64.dts b/arch/sandbox/dts/sandbox64.dts
index ec53106af9..3eb0457089 100644
--- a/arch/sandbox/dts/sandbox64.dts
+++ b/arch/sandbox/dts/sandbox64.dts
@@ -58,7 +58,6 @@
eth@10002000 {
compatible = "sandbox,eth";
reg = <0x0 0x10002000 0x0 0x1000>;
-   fake-host-hwaddr = [00 00 66 44 22 00];
};
 
i2c_0: i2c@0 {
diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index c0b1d76cdb..e486bdb531 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -527,31 +527,26 @@
eth@10002000 {
compatible = "sandbox,eth";
reg = <0x10002000 0x1000>;
-   fake-host-hwaddr = [00 00 66 44 22 00];
};
 
eth_5: eth@10003000 {
compatible = "sandbox,eth";
reg = <0x10003000 0x1000>;
-   fake-host-hwaddr = [00 00 66 44 22 11];
};
 
eth_3: sbe5 {
compatible = "sandbox,eth";
reg = <0x10005000 0x1000>;
-   fake-host-hwaddr = [00 00 66 44 22 33];
};
 
eth@10004000 {
compatible = "sandbox,eth";
reg = <0x10004000 0x1000>;
-   fake-host-hwaddr = [00 00 66 44 22 22];
};
 
phy_eth0: phy-test-eth {
compatible = "sandbox,eth";
reg = <0x10007000 0x1000>;
-   fake-host-hwaddr = [00 00 66 44 22 77];
phy-handle = <ðphy1>;
phy-mode = "2500base-x";
};
@@ -559,7 +554,6 @@
dsa_eth0: dsa-test-eth {
compatible = "sandbox,eth";
reg = <0x10006000 0x1000>;
-   fake-host-hwaddr = [00 00 66 44 22 66];
};
 
dsa-test {
diff --git a/drivers/net/sandbox.c b/drivers/net/sandbox.c
index 37459dfa0a..13022addb6 100644
--- a/drivers/net/sandbox.c
+++ b/drivers/net/sandbox.c
@@ -395,9 +395,11 @@ static void sb_eth_stop(struct udevice *dev)
 static int sb_eth_write_hwaddr(struct udevice *dev)
 {
struct eth_pdata *pdata = dev_get_plat(dev);
+   struct eth_sandbox_priv *priv = dev_get_priv(dev);
 
debug("eth_sandbox %s: Write HW ADDR - %pM\n", dev->name,
  pdata->enetaddr);
+   memcpy(priv->fake_host_hwaddr, pdata->enetaddr, ARP_HLEN);
return 0;
 }
 
@@ -419,16 +421,8 @@ static int sb_eth_of_to_plat(struct udevice *dev)
 {
struct eth_pdata *pdata = dev_get_plat(dev);
struct eth_sandbox_priv *priv = dev_get_priv(dev);
-   const u8 *mac;
 
pdata->iobase = dev_read_addr(dev);
-
-   mac = dev_read_u8_array_ptr(dev, "fake-host-hwaddr", ARP_HLEN);
-   if (!mac) {
-   printf("'fake-host-hwaddr' is missing from the DT\n");
-   return -EINVAL;
-   }
-   memcpy(priv->fake_host_hwaddr, mac, ARP_HLEN);
priv->disabled = false;
priv->tx_handler = sb_default_handler;
 
-- 
2.35.1.1320.gc452695387.dirty



[PATCH v4 03/16] test: eth: Add test for ethernet addresses

2022-05-05 Thread Sean Anderson
This adds a test to make sure that all the ethernet interfaces have
their addresses read properly. At the moment everything is read from the
environment, but the next few commits will add additional sources.

Signed-off-by: Sean Anderson 
Reviewed-by: Simon Glass 
---

(no changes since v3)

Changes in v3:
- Move patch adding test earlier in the series
- Add test for eth8 as well

 test/dm/eth.c | 29 +
 1 file changed, 29 insertions(+)

diff --git a/test/dm/eth.c b/test/dm/eth.c
index e4ee695610..5437f9ea4a 100644
--- a/test/dm/eth.c
+++ b/test/dm/eth.c
@@ -147,6 +147,35 @@ static int dm_test_eth_act(struct unit_test_state *uts)
 }
 DM_TEST(dm_test_eth_act, UT_TESTF_SCAN_FDT);
 
+/* Ensure that all addresses are loaded properly */
+static int dm_test_ethaddr(struct unit_test_state *uts)
+{
+   static const char *const addr[] = {
+   "02:00:11:22:33:44",
+   "02:00:11:22:33:48", /* dsa slave */
+   "02:00:11:22:33:45",
+   "02:00:11:22:33:48", /* dsa master */
+   "02:00:11:22:33:46",
+   "02:00:11:22:33:47",
+   "02:00:11:22:33:48", /* dsa slave */
+   "02:00:11:22:33:49",
+   };
+   int i;
+
+   for (i = 0; i < ARRAY_SIZE(addr); i++) {
+   char addrname[10];
+
+   if (i)
+   snprintf(addrname, sizeof(addrname), "eth%daddr", i + 
1);
+   else
+   strcpy(addrname, "ethaddr");
+   ut_asserteq_str(addr[i], env_get(addrname));
+   }
+
+   return 0;
+}
+DM_TEST(dm_test_ethaddr, UT_TESTF_SCAN_FDT);
+
 /* The asserts include a return on fail; cleanup in the caller */
 static int _dm_test_eth_rotate1(struct unit_test_state *uts)
 {
-- 
2.35.1.1320.gc452695387.dirty



[PATCH v4 02/16] sandbox: net: Add mac address for eth8 to environment

2022-05-05 Thread Sean Anderson
The phy_eth0 interface introduced in commit f3dd213e15 ("net: introduce
helpers to get PHY ofnode from MAC") uses a globally-administered
address. Switch to using a locally-administered address, and add it to
the sandbox environment, like the others.

Signed-off-by: Sean Anderson 
---

Changes in v4:
- Add "commit" in front of the hash

Changes in v3:
- New

 board/sandbox/sandbox.env | 1 +
 1 file changed, 1 insertion(+)

diff --git a/board/sandbox/sandbox.env b/board/sandbox/sandbox.env
index b4c04635a4..6dedc755fa 100644
--- a/board/sandbox/sandbox.env
+++ b/board/sandbox/sandbox.env
@@ -11,6 +11,7 @@ eth3addr=02:00:11:22:33:45
 eth4addr=02:00:11:22:33:48
 eth5addr=02:00:11:22:33:46
 eth6addr=02:00:11:22:33:47
+eth8addr=02:00:11:22:33:49
 ipaddr=192.0.2.1
 
 /*
-- 
2.35.1.1320.gc452695387.dirty



[PATCH v4 01/16] sandbox: net: Add aliases for ethernet devices

2022-05-05 Thread Sean Anderson
Commit f3dd213e15 ("net: introduce helpers to get PHY ofnode from MAC")
changed the ethernet sequence assignment from

uclass 36: ethernet
0   * eth@10002000 @ 05813460, seq 0
1   * eth@10003000 @ 05813550, seq 5
2   * sbe5 @ 05813640, seq 3
3   * eth@10004000 @ 05813730, seq 6
4   * dsa-test-eth @ 05813820, seq 4
5   * lan0 @ 05813a30, seq 2
6   * lan1 @ 05813b50, seq 7

to

uclass 36: ethernet
0   * eth@10002000 @ 03813630, seq 0
1   * eth@10003000 @ 03813720, seq 5
2   * sbe5 @ 03813810, seq 3
3   * eth@10004000 @ 03813900, seq 6
4 phy-test-eth @ 038139f0, seq 7
5   * dsa-test-eth @ 03813ae0, seq 4
6   * lan0 @ 03813cf0, seq 2
7   * lan1 @ 03813e10, seq 8

This caused the mac address assignment to switch around. Avoid this in
the future by assigning aliases for all ethernet devices. This reverts
the sequence to what it was before the aformentioned commit (with
phy-test-eth as seq 8). There is no ethernet1 for whatever reason.

Signed-off-by: Sean Anderson 
---

Changes in v4:
- Fix dm_test_alias_highest_id test failing because we changed the
  number of aliases

Changes in v3:
- New

 arch/sandbox/dts/test.dts | 3 +++
 test/dm/test-fdt.c| 2 +-
 2 files changed, 4 insertions(+), 1 deletion(-)

diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index a8a86bc715..c0b1d76cdb 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -28,6 +28,9 @@
ethernet3 = ð_3;
ethernet4 = &dsa_eth0;
ethernet5 = ð_5;
+   ethernet6 = "/eth@10004000";
+   ethernet7 = &swp_1;
+   ethernet8 = &phy_eth0;
gpio1 = &gpio_a;
gpio2 = &gpio_b;
gpio3 = &gpio_c;
diff --git a/test/dm/test-fdt.c b/test/dm/test-fdt.c
index e1de066226..f9e8174759 100644
--- a/test/dm/test-fdt.c
+++ b/test/dm/test-fdt.c
@@ -184,7 +184,7 @@ static int dm_test_alias_highest_id(struct unit_test_state 
*uts)
int ret;
 
ret = dev_read_alias_highest_id("ethernet");
-   ut_asserteq(5, ret);
+   ut_asserteq(8, ret);
 
ret = dev_read_alias_highest_id("gpio");
ut_asserteq(3, ret);
-- 
2.35.1.1320.gc452695387.dirty



[PATCH v4 00/16] Add support for NVMEM API

2022-05-05 Thread Sean Anderson
This adds support for the nvmem-cells properties cropping up in manyb
device trees. This is an easy way to load configuration, version
information, or calibration data from a non-volatile memory source. For
more information, refer to patch 6 ("misc: Add support for nvmem
cells").

For the moment I have only added some integration tests using the
ethernet addresses. This hits the main code paths (looking up nvmem
cells) but doesn't test writing. I can add a few stand-alone tests if
desired.

CI: https://dev.azure.com/u-boot/u-boot/_build/results?buildId=4167&view=results

The patches are structured in the following manner:
1-9:   These are general cleanups, and may be applied independently of
   the rest of the series.
10-12: Add NVMEM support
13-15: Support reading ethernet addresses using the NVMEM API and add
   some tests.
16:Example demonstrating how this series could be reworked to be a
   uclass. It should not be applied.

Changes in v4:
- Fix dm_test_alias_highest_id test failing because we changed the
  number of aliases
- Fix segmentation fault if DSA master fails to probe
- Add fallbacks for i2c_eeprom_* functions. This fixes build errors if
  CONFIG_I2C_EEPROM was not enabled.
- Fix failing to find nvmem devices if some supported uclasses were not
  enabled.
- Remove typedefs from documentation
- Document some of the design background, and why a new uclass was not
  created.
- Enable CONFIG_NVMEM for sandbox_spl_defconfig
- Enable CONFIG_I2C_EEPROM for sandbox_spl_defconfig
- Add RFC patch illustrating how this series could be reworked to use a
  more conventional, uclass-based approach.

Changes in v3:
- Add aliases for ethernet devices
- Add mac address for eth8 to environment
- Move patch adding test earlier in the series
- Add test for eth8 as well

Changes in v2:
- Call the appropriate API functions directly from
  nvmem_cell_(read|write). This means we can drop the nvmem_interface
  machinery.

Sean Anderson (16):
  sandbox: net: Add aliases for ethernet devices
  sandbox: net: Add mac address for eth8 to environment
  test: eth: Add test for ethernet addresses
  sandbox: net: Remove fake-host-hwaddr
  sandbox: Remove eth2addr from environment
  sandbox: Move some mac addresses to device tree
  net: dsa: Fix segmentation fault if master fails to probe
  misc: i2c_eeprom: Make i2c_eeprom_write use a const buf
  misc: i2c_eeprom: Add fallbacks
  misc: Add support for nvmem cells
  sandbox: Enable NVMEM
  net: Add support for reading mac addresses from nvmem cells
  test: Load mac address with i2c eeprom
  test: Load mac address using RTC
  test: Load mac address using misc device
  [RFC] misc: nvmem: Convert to using udevices

 MAINTAINERS|   7 ++
 arch/sandbox/dts/sandbox.dts   |   1 -
 arch/sandbox/dts/sandbox64.dts |   1 -
 arch/sandbox/dts/test.dts  |  34 +-
 board/sandbox/sandbox.env  |   4 -
 configs/sandbox64_defconfig|   1 +
 configs/sandbox_defconfig  |   1 +
 configs/sandbox_flattree_defconfig |   1 +
 configs/sandbox_noinst_defconfig   |   1 +
 configs/sandbox_spl_defconfig  |   3 +
 doc/api/index.rst  |   1 +
 doc/api/nvmem.rst  |   7 ++
 drivers/misc/Kconfig   |  16 +++
 drivers/misc/Makefile  |   1 +
 drivers/misc/i2c_eeprom.c  |  40 ++-
 drivers/misc/i2c_eeprom_emul.c |   4 +
 drivers/misc/misc-uclass.c |  58 -
 drivers/misc/misc_sandbox.c|   3 +
 drivers/misc/nvmem.c   | 106 +
 drivers/net/sandbox.c  |  10 +-
 drivers/rtc/i2c_rtc_emul.c |  10 ++
 drivers/rtc/rtc-uclass.c   |  46 ++-
 include/dm/uclass-id.h |   1 +
 include/i2c_eeprom.h   |  27 -
 include/nvmem.h| 185 +
 net/dsa-uclass.c   |   6 +-
 net/eth-uclass.c   |  13 +-
 test/dm/eth.c  |  29 +
 test/dm/test-fdt.c |   2 +-
 29 files changed, 584 insertions(+), 35 deletions(-)
 create mode 100644 doc/api/nvmem.rst
 create mode 100644 drivers/misc/nvmem.c
 create mode 100644 include/nvmem.h

-- 
2.35.1.1320.gc452695387.dirty



Re: [PATCH] Makefile: Avoid non-portable GNU sed extension

2022-05-05 Thread Heinrich Schuchardt



Am 5. Mai 2022 18:58:48 MESZ schrieb Mark Kettenis :
>> Date: Thu, 5 May 2022 16:55:24 +0200
>> From: Heinrich Schuchardt 
>> 
>> On 5/5/22 16:42, Mark Kettenis wrote:
>> > Use [:space:] instead of \s and \S in regular expression that
>> > determines the sandbox target architecture.  Fixes the build
>> > failure on OpenBSD introduced with commit 4e65ca00f3a3
>> > ("efi_loader: bootmgr: add booting from removable media").
>> >
>> > Fixes: f7691a6d73 ("sandbox: allow cross-compiling sandbox")
>> nits, use 12 first digits of hash
>> 
>> Fixes: f7691a6d736b ("sandbox: allow cross-compiling sandbox")
>
>Hmm, checkpatch didn't catch that one.  Is this something I should
>do a resubmit for?

No. I will just consider it in my pull request. 

Best regards 

Heinrich 
>
>> > Signed-off-by: Mark Kettenis 
>> 
>> Reviewed-by: Heinrich Schuchardt 
>> 
>> > ---
>> >   Makefile | 2 +-
>> >   1 file changed, 1 insertion(+), 1 deletion(-)
>> >
>> > diff --git a/Makefile b/Makefile
>> > index ea80f00716..6eceeb35b4 100644
>> > --- a/Makefile
>> > +++ b/Makefile
>> > @@ -21,7 +21,7 @@ include include/host_arch.h
>> >   ifeq ("", "$(CROSS_COMPILE)")
>> > MK_ARCH="${shell uname -m}"
>> >   else
>> > -  MK_ARCH="${shell echo $(CROSS_COMPILE) | sed -n 
>> > 's/^\s*\([^\/]*\/\)*\([^-]*\)-\S*/\2/p'}"
>> > +  MK_ARCH="${shell echo $(CROSS_COMPILE) | sed -n 
>> > 's/^[[:space:]]*\([^\/]*\/\)*\([^-]*\)-[^[:space:]]*/\2/p'}"
>> >   endif
>> >   unexport HOST_ARCH
>> >   ifeq ("x86_64", $(MK_ARCH))
>> 
>> 


Re: [PATCH 2/2] usb: host: ehci-generic: Remove DM_REGULATOR flag

2022-05-05 Thread Marek Vasut

On 5/5/22 16:58, Patrice CHOTARD wrote:

HI Marek

On 5/5/22 15:45, Marek Vasut wrote:

On 5/5/22 15:17, Patrice Chotard wrote:

Currently, DM_REGULATOR flag is no more needed to protect no DM core,
remove it.


DM_REGULATOR flag is actually Kconfig symbol.

Why is it no longer needed ? (answer should be in the commit message)


Ok, i will update the commit message as following :

Since commit 16cc5ad0b439 ("power: regulator: add dummy helper")
regulator dummy helper are always available even if DM_REGULATOR
is not set.
DM_REGULATOR flag is no more needed to protect no DM core,
remove it.

Is it OK for you ?


Yes please


Re: [PATCH] Makefile: Avoid non-portable GNU sed extension

2022-05-05 Thread Mark Kettenis
> Date: Thu, 5 May 2022 16:55:24 +0200
> From: Heinrich Schuchardt 
> 
> On 5/5/22 16:42, Mark Kettenis wrote:
> > Use [:space:] instead of \s and \S in regular expression that
> > determines the sandbox target architecture.  Fixes the build
> > failure on OpenBSD introduced with commit 4e65ca00f3a3
> > ("efi_loader: bootmgr: add booting from removable media").
> >
> > Fixes: f7691a6d73 ("sandbox: allow cross-compiling sandbox")
> nits, use 12 first digits of hash
> 
> Fixes: f7691a6d736b ("sandbox: allow cross-compiling sandbox")

Hmm, checkpatch didn't catch that one.  Is this something I should
do a resubmit for?

> > Signed-off-by: Mark Kettenis 
> 
> Reviewed-by: Heinrich Schuchardt 
> 
> > ---
> >   Makefile | 2 +-
> >   1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/Makefile b/Makefile
> > index ea80f00716..6eceeb35b4 100644
> > --- a/Makefile
> > +++ b/Makefile
> > @@ -21,7 +21,7 @@ include include/host_arch.h
> >   ifeq ("", "$(CROSS_COMPILE)")
> > MK_ARCH="${shell uname -m}"
> >   else
> > -  MK_ARCH="${shell echo $(CROSS_COMPILE) | sed -n 
> > 's/^\s*\([^\/]*\/\)*\([^-]*\)-\S*/\2/p'}"
> > +  MK_ARCH="${shell echo $(CROSS_COMPILE) | sed -n 
> > 's/^[[:space:]]*\([^\/]*\/\)*\([^-]*\)-[^[:space:]]*/\2/p'}"
> >   endif
> >   unexport HOST_ARCH
> >   ifeq ("x86_64", $(MK_ARCH))
> 
> 


Re: [PATCH 4/7] sunxi: use boot source for determining environment location

2022-05-05 Thread Chris Morgan
Will do. Sorry, I stepped away from things for a while but I will test
it now that I am back.

On Wed, Apr 20, 2022 at 6:34 PM Andre Przywara  wrote:
>
> On Fri, 15 Apr 2022 12:28:22 -0500
> Chris Morgan  wrote:
>
> Hi Chris,
>
> > On Tue, Jan 11, 2022 at 12:46:04PM +, Andre Przywara wrote:
> > > Currently we only support to load the environment from raw MMC or FAT
> > > locations on Allwinner boards. With the advent of SPI flash we probably
> > > also want to support using the environment there, so we need to become
> > > a bit more flexible.
> > >
> > > Change the environment priority function to take the boot source into
> > > account. When booted from eMMC or SD card, we use FAT or MMC, if
> > > configured, as before.
> > > If we are booted from SPI flash, we try to use the environment from
> > > there, if possible. The same is true for NAND flash booting, although
> > > this is somewhat theoretical right now (as untested).
> > >
> > > This way we can use the same image for SD and SPI flash booting, which
> > > allows us to simply copy a booted image from SD card to the SPI flash,
> > > for instance.
> >
> > Unfortunately after a git-bisect I can confirm this patch breaks
> > booting in FEL mode whenever the environment is set to
> > CONFIG_ENV_IS_NOWHERE. Tested and reproducible on an NTC CHIP or a
> > Source Parts Popcorn (both Allwinner R8 chips).
> >
> > The curious thing though is that I could never see env_get_location
> > called, but whenever I either set the environment to something like
> > FAT or comment out this change (which I believe causes the non-board
> > specific version of env_get_location to be used) it would boot again.
> > So while I can confirm this patch breaks booting FEL when the env is
> > set to nowhere, I was not able to figure out why that is.
>
> Alright, thanks for the report. I see the problem: The default
> fallback for the new env_get_location() is ENVL_FAT, as 157 out of the
> 160 Allwinner boards define CONFIG_ENV_IS_IN_FAT.
> However the C.H.I.P. boards are one of the three exceptions, and
> returning FAT when the FAT environment driver is not compiled in will
> not end well. I don't have any CHIP board, but simulated this by
> configuring a normal board with just defining CONFIG_ENV_IS_NOWHERE.
>
> I made a patch that tries to choose a matching fallback. It's not very
> elegant, but seems to fix the problem for me. Please test this once
> posted.
>
> Cheers,
> Andre
>
> >
> > Thank you.
> >
> > >
> > > Signed-off-by: Andre Przywara 
> > > ---
> > >  board/sunxi/board.c | 51 ++---
> > >  1 file changed, 43 insertions(+), 8 deletions(-)
> > >
> > > diff --git a/board/sunxi/board.c b/board/sunxi/board.c
> > > index 2790a0f9e8..2472343d00 100644
> > > --- a/board/sunxi/board.c
> > > +++ b/board/sunxi/board.c
> > > @@ -170,21 +170,56 @@ void i2c_init_board(void)
> > >  #endif
> > >  }
> > >
> > > -#if defined(CONFIG_ENV_IS_IN_MMC) && defined(CONFIG_ENV_IS_IN_FAT)
> > > +/*
> > > + * Try to use the environment from the boot source first.
> > > + * For MMC, this means a FAT partition on the boot device (SD or eMMC).
> > > + * If the raw MMC environment is also enabled, this is tried next.
> > > + * SPI flash falls back to FAT (on SD card).
> > > + */
> > >  enum env_location env_get_location(enum env_operation op, int prio)
> > >  {
> > > -   switch (prio) {
> > > -   case 0:
> > > -   return ENVL_FAT;
> > > +   enum env_location boot_loc = ENVL_FAT;
> > >
> > > -   case 1:
> > > -   return ENVL_MMC;
> > > +   gd->env_load_prio = prio;
> > >
> > > +   switch (sunxi_get_boot_device()) {
> > > +   case BOOT_DEVICE_MMC1:
> > > +   case BOOT_DEVICE_MMC2:
> > > +   boot_loc = ENVL_FAT;
> > > +   break;
> > > +   case BOOT_DEVICE_NAND:
> > > +   if (IS_ENABLED(CONFIG_ENV_IS_IN_NAND))
> > > +   boot_loc = ENVL_NAND;
> > > +   break;
> > > +   case BOOT_DEVICE_SPI:
> > > +   if (IS_ENABLED(CONFIG_ENV_IS_IN_SPI_FLASH))
> > > +   boot_loc = ENVL_SPI_FLASH;
> > > +   break;
> > > +   case BOOT_DEVICE_BOARD:
> > > +   break;
> > > default:
> > > -   return ENVL_UNKNOWN;
> > > +   break;
> > > +   }
> > > +
> > > +   /* Always try to access the environment on the boot device first. */
> > > +   if (prio == 0)
> > > +   return boot_loc;
> > > +
> > > +   if (prio == 1) {
> > > +   switch (boot_loc) {
> > > +   case ENVL_SPI_FLASH:
> > > +   return ENVL_FAT;
> > > +   case ENVL_FAT:
> > > +   if (IS_ENABLED(CONFIG_ENV_IS_IN_MMC))
> > > +   return ENVL_MMC;
> > > +   break;
> > > +   default:
> > > +   break;
> > > +   }
> > > }
> > > +
> > > +   return ENVL_UNKNOWN;
> > >  }
> > > -#endif
> > >
> > >  #ifdef CONFIG_DM_MMC
> > >  static void mmc_pinmux_setup(int sdc);
>


Re: [PATCH v2 3/9] spl: Convert fat to spl_load

2022-05-05 Thread Tom Rini
On Thu, May 05, 2022 at 10:51:39AM -0400, Sean Anderson wrote:
> Hi Tom,
> 
> On 5/4/22 8:06 PM, Tom Rini wrote:
> > On Fri, Apr 22, 2022 at 02:27:41PM -0400, Sean Anderson wrote:
> > 
> >> This converts the fat loader to use spl_load.
> >> 
> >> Signed-off-by: Sean Anderson 
> >> Reviewed-by: Stefan Roese 
> > 
> > On am335x_evm_defconfig, and booting from a FAT SD card I see:
> > Trying to boot from MMC1
> > spl_load_image_fat: error reading image u-boot.img, err - 0
> > SPL: failed to boot from all boot devices
> > ### ERROR ### Please RESET the board ###
> 
> Looks like spl_load_image_fat was expecting bytes read and
> not an errno (and so turned your success into a failure). Will fix.

OK.

> > Note that while not _this_ patch (but likely the one for raw) breaks
> > booting from my mx6cuboxi via SD card with:
> > Trying to boot from MMC1
> > [hang]
> > 
> 
> Hm, if there's a problem you should at least see
> "mmc_load_image_raw_sector: mmc block read error\n"
> 
> Could you enable DEBUG in common/spl/spl.c and common/spl/spl_mmc.c?

U-Boot SPL 2022.07-rc1-00267-g064334e21dde-dirty (May 05 2022 - 11:33:38 -0400)
>>SPL: board_init_r()
spl_init
Trying to boot from MMC1
spl: mmc boot mode: raw
hdr read sector 8a, count=1

-- 
Tom


signature.asc
Description: PGP signature


[PATCH 3/3] exports: Fix export of SPI access functions

2022-05-05 Thread Paul Barker
* With CONFIG_DM_SPI defined, spi_get_bus_and_cs needs to be used
instead of spi_setup_slave to configure a SPI bus. As spi_setup_slave is
already present in the export list it is reasonable to also export
spi_get_bus_and_cs.

* For the functions listed in the jump table to be callable they must
also be defined in the "exports.h" header. Define the various exported
SPI functions so that they can be used.

Signed-off-by: Paul Barker 
---
 include/_exports.h |  4 
 include/exports.h  | 15 ++-
 2 files changed, 18 insertions(+), 1 deletion(-)

diff --git a/include/_exports.h b/include/_exports.h
index f6df8b610734..3457a92c95ad 100644
--- a/include/_exports.h
+++ b/include/_exports.h
@@ -60,11 +60,15 @@
EXPORT_FUNC(dummy, void, spi_claim_bus, void)
EXPORT_FUNC(dummy, void, spi_release_bus, void)
EXPORT_FUNC(dummy, void, spi_xfer, void)
+   EXPORT_FUNC(dummy, void, spi_get_bus_and_cs, void)
 #else
EXPORT_FUNC(spi_claim_bus, int, spi_claim_bus, struct spi_slave *)
EXPORT_FUNC(spi_release_bus, void, spi_release_bus, struct spi_slave *)
EXPORT_FUNC(spi_xfer, int, spi_xfer, struct spi_slave *,
unsigned int, const void *, void *, unsigned long)
+   EXPORT_FUNC(spi_get_bus_and_cs, int, spi_get_bus_and_cs, int, int, int,
+   int, const char *, const char *, struct udevice **,
+   struct spi_slave **)
 #endif
EXPORT_FUNC(ustrtoul, unsigned long, ustrtoul,
const char *, char **, unsigned int)
diff --git a/include/exports.h b/include/exports.h
index 6f8c9cf4517e..93110d63a235 100644
--- a/include/exports.h
+++ b/include/exports.h
@@ -53,6 +53,19 @@ unsigned long long ustrtoull(const char *cp, char **endp, 
unsigned int base);
 int i2c_write (uchar, uint, int , uchar* , int);
 int i2c_read (uchar, uint, int , uchar* , int);
 #endif
+#ifdef CONFIG_CMD_SPI
+#ifndef CONFIG_DM_SPI
+struct spi_slave * spi_setup_slave(unsigned int, unsigned int,
+unsigned int, unsigned int);
+void spi_free_slave(struct spi_slave *);
+#endif
+int spi_claim_bus(struct spi_slave *);
+void spi_release_bus(struct spi_slave *);
+int spi_xfer(struct spi_slave *, unsigned int, const void *, void *,
+unsigned long);
+int spi_get_bus_and_cs(int, int, int, int, const char *, const char *,
+struct udevice **, struct spi_slave **);
+#endif
 #ifdef CONFIG_PHY_AQUANTIA
 struct mii_dev *mdio_get_current_dev(void);
 struct phy_device *phy_find_by_mask(struct mii_dev *bus, unsigned phy_mask);
@@ -71,7 +84,7 @@ struct jt_funcs {
 };
 
 
-#define XF_VERSION 9
+#define XF_VERSION 10
 
 #if defined(CONFIG_X86)
 extern gd_t *global_data;
-- 
2.25.1



[PATCH 2/3] examples: hello_world: Drop inclusion of common header

2022-05-05 Thread Paul Barker
The "common.h" header is not covered by the licensing exception for
standalone applications. Let's drop inclusion of this header from the
hello_world example to prove that a standalone app can be built without
it.

Signed-off-by: Paul Barker 
---
 examples/standalone/hello_world.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/examples/standalone/hello_world.c 
b/examples/standalone/hello_world.c
index 263cd9ca079d..27ec3793155d 100644
--- a/examples/standalone/hello_world.c
+++ b/examples/standalone/hello_world.c
@@ -4,7 +4,6 @@
  * Wolfgang Denk, DENX Software Engineering, w...@denx.de.
  */
 
-#include 
 #include 
 
 int hello_world(int argc, char *const argv[])
-- 
2.25.1



[PATCH 1/3] Licenses: Clarify exceptions for standalone apps

2022-05-05 Thread Paul Barker
On 2010-01-27, an email [1] was sent to the mailing list by Wolfgang
Denk which clarified the intended licensing exceptions for standalone
applications. As the "export.h" header and the "stubs.c" source files
are required to implement a standalone application, the intention was
that these files be covered by the licensing exception. This is made
clear in the following quotes from that email:

"exports.h" should be added to the "allowed" file list; there should
be no need to include "common.h". Eventually this needs fixing.
Patches are welcome.

"examples/standalone/stubs.c" should be added to the "allowed" file
list (the ppc_*jmp.S files are LGPLed).

There should be no doubts - the intention is clear, the current state
may need improvement. Help (read: patches) welcome.

[1]: https://lists.denx.de/pipermail/u-boot/2010-January/067174.html

Signed-off-by: Paul Barker 
Cc: Wolfgang Denk 
---
 Licenses/Exceptions | 12 
 1 file changed, 8 insertions(+), 4 deletions(-)

diff --git a/Licenses/Exceptions b/Licenses/Exceptions
index c9b3cd981f51..4f241f4aff29 100644
--- a/Licenses/Exceptions
+++ b/Licenses/Exceptions
@@ -7,9 +7,13 @@ use U-Boot services by means of the jump table provided by 
U-Boot
 exactly for this purpose - this is merely considered normal use of
 U-Boot, and does *not* fall under the heading of "derived work".
 
-  The header files "include/image.h" and "arch/*/include/asm/u-boot.h"
-define interfaces to U-Boot.  Including these (unmodified) header
-files in another file is considered normal use of U-Boot, and does
-*not* fall under the heading of "derived work".
+The following files define interfaces to U-Boot:
+  * include/image.h
+  * include/export.h
+  * arch/*/include/asm/u-boot.h
+  * examples/standalone/stubs.c
+
+Including these (unmodified) files in another file is considered normal
+use of U-Boot, and does *not* fall under the heading of "derived work".
 -- Wolfgang Denk
 
-- 
2.25.1



[PATCH 0/3] Clarify standalone application support

2022-05-05 Thread Paul Barker
While looking into the support for u-boot standalone applications I
noticed that there was some mis-alignment between the license exception
and the files which needed to be included to get a functioning
application. I also noticed that the set of SPI access functions
defined in the jump table was missing a key function and did not match
the set of prototypes defined in the exports header. These patches
should rectify the issues I found.

Paul Barker (3):
  Licenses: Clarify exceptions for standalone apps
  examples: hello_world: Drop inclusion of common header
  exports: Fix export of SPI access functions

 Licenses/Exceptions   | 12 
 examples/standalone/hello_world.c |  1 -
 include/_exports.h|  4 
 include/exports.h | 15 ++-
 4 files changed, 26 insertions(+), 6 deletions(-)

-- 
2.25.1



Re: [PATCH 1/5] phy: adin: remove broken support for adi,phy-mode-override

2022-05-05 Thread Josua Mayer

\o/

Am 04.05.22 um 15:46 schrieb Nate Drude:

Hi Josua,

On Wed, 2022-05-04 at 11:51 +0300, Josua Mayer wrote:

Hi Nate,

Am 02.05.22 um 16:25 schrieb Nate Drude:

Hi Josua,

On Sun, 2022-05-01 at 15:41 +0300, Josua Mayer wrote:

The adin_get_phy_mode_override function does not compile, because
it
is
missing both declaration and implementation of
phy_get_interface_by_name.

Remove the whole function for now, since the missing
implementation
is
not included in mainline Linux - and thus can not be copied.

Signed-off-by: Josua Mayer 
---
   drivers/net/phy/adin.c | 34 --
   1 file changed, 34 deletions(-)

diff --git a/drivers/net/phy/adin.c b/drivers/net/phy/adin.c
index cff841ab3d..2433e76fea 100644
--- a/drivers/net/phy/adin.c
+++ b/drivers/net/phy/adin.c
@@ -94,35 +94,6 @@ static u32 adin_get_reg_value(struct
phy_device
*phydev,
  return rc;
   }
   
-/**

- * adin_get_phy_mode_override - Get phy-mode override for adin
PHY
- *
- * The function gets phy-mode string from property 'adi,phy-
mode-
override'
- * and return its index in phy_interface_strings table, or -1 in
error case.
- */
-int adin_get_phy_mode_override(struct phy_device *phydev)
-{
-   ofnode node = phy_get_ofnode(phydev);
-   const char *phy_mode_override;
-   const char *prop_phy_mode_override = "adi,phy-mode-
override";
-   int override_interface;
-
-   phy_mode_override = ofnode_read_string(node,
prop_phy_mode_override);
-   if (!phy_mode_override)
-   return -ENODEV;
-
-   debug("%s: %s = '%s'\n",
- __func__, prop_phy_mode_override,
phy_mode_override);
-
-   override_interface =
phy_get_interface_by_name(phy_mode_override);
-
-   if (override_interface < 0)
-   printf("%s: %s = '%s' is not valid\n",
-  __func__, prop_phy_mode_override,
phy_mode_override);
-
-   return override_interface;
-}
-
   static u16 adin_ext_read(struct phy_device *phydev, const u32
regnum)
   {
  u16 val;
@@ -148,11 +119,6 @@ static int adin_config_rgmii_mode(struct
phy_device *phydev)
   {
  u16 reg_val;
  u32 val;
-   int phy_mode_override =
adin_get_phy_mode_override(phydev);
-
-   if (phy_mode_override >= 0) {
-   phydev->interface = (phy_interface_t)
phy_mode_override;
-   }
   
  reg_val = adin_ext_read(phydev, ADIN1300_GE_RGMII_CFG);
   

The patch that introduced adin_get_phy_mode_override was tested
against
the U-Boot master branch. Unfortunately, phy_get_interface_by_name
was
removed just a few days before by:
https://eur03.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgithub.com%2Fu-boot%2Fu-boot%2Fcommit%2F123ca114e07ecf28aa2538748d733e2b22d8b8b5&data=05%7C01%7CNate.D%40variscite.com%7C467af650626f4902ae2b08da2dab6225%7C399ae6ac38f44ef094a8440b0ad581de%7C1%7C0%7C637872511359995609%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=Ok3YOO8rheEZuRa%2Fn04NZf37TsPQ7hzArUojFZ4QDUg%3D&reserved=0

:(

Can we fix adin_get_phy_mode_override instead of removing it?

I will take a look in the coming days and see if I understand how to
fix
this.
I don't really mind if we fix it, or remove it - removing was the
faster

If you prefer, I can submit a separate patch to fix it. I'll wait to
hear from you to avoid duplicated work.

I won't be able to look at this before Sunday, so feel free to work on it.

way getting my patch-set out of course ...

We can
implement part of ofnode_read_phy_mode. This needs to be tested,
but
for example:

diff --git a/drivers/net/phy/adin.c b/drivers/net/phy/adin.c
index cff841ab3d..6a05b9fd05 100644
--- a/drivers/net/phy/adin.c
+++ b/drivers/net/phy/adin.c
@@ -100,27 +100,28 @@ static u32 adin_get_reg_value(struct
phy_device
*phydev,
    * The function gets phy-mode string from property 'adi,phy-mode-
override'
    * and return its index in phy_interface_strings table, or -1 in
error
case.
    */
-int adin_get_phy_mode_override(struct phy_device *phydev)
+phy_interface_t adin_get_phy_mode_override(struct phy_device
*phydev)
   {
  ofnode node = phy_get_ofnode(phydev);
  const char *phy_mode_override;
  const char *prop_phy_mode_override = "adi,phy-mode-
override";
-   int override_interface;
+   int i;
   
  phy_mode_override = ofnode_read_string(node,

prop_phy_mode_override);
+
  if (!phy_mode_override)
-   return -ENODEV;
+   return PHY_INTERFACE_MODE_NA;
   
  debug("%s: %s = '%s'\n",

    __func__, prop_phy_mode_override,
phy_mode_override);
   
-   override_interface =

phy_get_interface_by_name(phy_mode_override);
+   for (i = 0; i < PHY_INTERFACE_MODE_MAX; i++)
+   if (!strcmp(phy_mode_override,
phy_interface_strings[i]))
+   return i;
   
-   if (override_interface < 0)

-   printf("%s: %s = '%s' is not valid\n",
-

Re: [PATCH v3 08/13] misc: Add support for nvmem cells

2022-05-05 Thread Sean Anderson
Hi Simon,

On 5/3/22 4:50 AM, Simon Glass wrote:
> Hi Sean,
> 
> On Fri, 29 Apr 2022 at 13:40, Sean Anderson  wrote:
>>
>> Hi Simon,
>>
>> On 4/25/22 11:24 AM, Sean Anderson wrote:
>> >
>> >
>> > On 4/25/22 1:48 AM, Simon Glass wrote:
>> >> Hi Sean,
>> >>
>> >> On Mon, 18 Apr 2022 at 13:37, Sean Anderson  
>> >> wrote:
>> >>>
>> >>> This adds support for "nvmem cells" as seen in Linux. The nvmem device
>> >>> class in Linux is used for various assorted ROMs and EEPROMs. In this
>> >>> sense, it is similar to UCLASS_MISC, but also includes
>> >>> UCLASS_I2C_EEPROM, UCLASS_RTC, and UCLASS_MTD. New drivers corresponding
>> >>> to a Linux-style nvmem device should be implemented as one of the
>> >>> previously-mentioned uclasses. The nvmem API acts as a compatibility
>> >>> layer to adapt the (slightly different) APIs of these uclasses. It also
>> >>> handles the lookup of nvmem cells.
>> >>>
>> >>> While nvmem devices can be accessed directly, they are most often used
>> >>> by reading/writing contiguous values called "cells". Cells typically
>> >>> hold information like calibration, versions, or configuration (such as
>> >>> mac addresses).
>> >>>
>> >>> nvmem devices can specify "cells" in their device tree:
>> >>>
>> >>> qfprom: eeprom@70 {
>> >>> #address-cells = <1>;
>> >>> #size-cells = <1>;
>> >>> reg = <0x0070 0x10>;
>> >>>
>> >>> /* ... */
>> >>>
>> >>> tsens_calibration: calib@404 {
>> >>> reg = <0x404 0x10>;
>> >>> };
>> >>> };
>> >>>
>> >>> which can then be referenced like:
>> >>>
>> >>> tsens {
>> >>> /* ... */
>> >>> nvmem-cells = <&tsens_calibration>;
>> >>> nvmem-cell-names = "calibration";
>> >>> };
>> >>>
>> >>> The tsens driver could then read the calibration value like:
>> >>>
>> >>> struct nvmem_cell cal_cell;
>> >>> u8 cal[16];
>> >>> nvmem_cell_get_by_name(dev, "calibration", &cal_cell);
>> >>> nvmem_cell_read(&cal_cell, cal, sizeof(cal));
>> >>>
>> >>> Because nvmem devices are not all of the same uclass, supported uclasses
>> >>> must register a nvmem_interface struct. This allows CONFIG_NVMEM to be
>> >>> enabled without depending on specific uclasses. At the moment,
>> >>> nvmem_interface is very bare-bones, and assumes that no initialization
>> >>> is necessary. However, this could be amended in the future.
>> >>>
>> >>> Although I2C_EEPROM and MISC are quite similar (and could likely be
>> >>> unified), they present different read/write function signatures. To
>> >>> abstract over this, NVMEM uses the same read/write signature as Linux.
>> >>> In particular, short read/writes are not allowed, which is allowed by
>> >>> MISC.
>> >>>
>> >>> The functionality implemented by nvmem cells is very similar to that
>> >>> provided by i2c_eeprom_partition. "fixed-partition"s for eeproms does
>> >>> not seem to have made its way into Linux or into any device tree other
>> >>> than sandbox. It is possible that with the introduction of this API it
>> >>> would be possible to remove it.
>> >>
>> >> I still think this would be better as a separate uclass, with child
>> >> devices created at bind time in each of the respective uclasses, like
>> >> mmc_bind() does. Then you will see the nvmem devices in the DM tree.
>> >> Wouldn't we want to add a command to access the nvmem devices?
>> >
>> > We already do. E.g. the misc/rtc/eeprom commands. The problem is that
>> > for software to access them, they would have to use misc_read/dm_rtc_read/
>> > i2c_eeprom_read.
>> >
>> >> This patch feels like a shortcut to me and I'm not sure of the
>> >> benefit of that shortcut.
>> > Well, I suppose it's because "nvmem" devices are strict subsets of
>> > existing devices. There is no new functionality here (except adapting
>> > between semantics like for misc). We should always be able to use the
>> > existing API to implement support for a new underlying uclass. There
>> > should never be device-specific read/write methods, because we can
>> > use the existing read/write uclass methods.
>> >
>> > What I'm trying to get at is that we sort of already have an nvmem
>> > uclass with nvmem devices, they're just not accessible in a uniform
>> > way. This series is trying to address the uniformity aspect. But I
>> > don't think we need new devices for each nvmem interface, because
>> > all they would do would take up ram/rom.
>> >
>> > --Sean
>> >
>> > PS. In an ideal world we'd have something like
>> >
>> > struct nvmem_ops {
>> >   read();
>> >   write();
>> > };
>> >
>> > struct dm_rtc_ops {
>> >   nvmem_ops nvmem;
>> >   /* the other ops minus read/write */
>> > };
>> >
>> > int nvmem_read (...) {
>> >   struct nvmem_ops *ops = cell->nvmem->ops;
>> >   /* ... */
>> >
>> >   return ops->read(...);
>> > }
>> >
>> > but unfortunately, we already h

Re: [PATCH 2/2] usb: host: ehci-generic: Remove DM_REGULATOR flag

2022-05-05 Thread Patrice CHOTARD
HI Marek

On 5/5/22 15:45, Marek Vasut wrote:
> On 5/5/22 15:17, Patrice Chotard wrote:
>> Currently, DM_REGULATOR flag is no more needed to protect no DM core,
>> remove it.
> 
> DM_REGULATOR flag is actually Kconfig symbol.
> 
> Why is it no longer needed ? (answer should be in the commit message)

Ok, i will update the commit message as following :

Since commit 16cc5ad0b439 ("power: regulator: add dummy helper")
regulator dummy helper are always available even if DM_REGULATOR 
is not set.
DM_REGULATOR flag is no more needed to protect no DM core,
remove it.

Is it OK for you ?

Patrice


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