Re: [PATCH 03/15] rockchip: rk3328-rock64: Update defconfig
ср, 7 февр. 2024 г. в 03:14, Jonas Karlman : > > Update defconfig for rk3328-rock64 with new defaults. > > Remove the SPL_DRIVERS_MISC=y option, no misc driver is used in SPL. What is abould rockchip-efuse? > > Add CONFIG_SPL_FIT_SIGNATURE=y to let SPL verify an auto generated hash > of FIT images. This help indicate if there is an issue loading any of > the images to DRAM or SRAM. Also add LEGACY_IMAGE_FORMAT=y to keep > support for scripts. > > Remove the NET_RANDOM_ETHADDR=y option, ethaddr and eth1addr is set > based on cpuid read from eFUSE. > > Add SPL_DM_SEQ_ALIAS=y option to use alias sequence number in SPL. > > Add DM_ETH_PHY=y and PHY_REALTEK=y to support onboard ethernet PHY. > > Also add missing device tree file to MAINTAINERS and add myself as a > reviewer for this board. > > Signed-off-by: Jonas Karlman > --- > board/rockchip/evb_rk3328/MAINTAINERS | 2 ++ > configs/rock64-rk3328_defconfig | 7 +-- > 2 files changed, 7 insertions(+), 2 deletions(-) > > diff --git a/board/rockchip/evb_rk3328/MAINTAINERS > b/board/rockchip/evb_rk3328/MAINTAINERS > index dc750bd69426..419bc8ded375 100644 > --- a/board/rockchip/evb_rk3328/MAINTAINERS > +++ b/board/rockchip/evb_rk3328/MAINTAINERS > @@ -47,8 +47,10 @@ F: arch/arm/dts/rk3328-roc-cc-u-boot.dtsi > > ROCK64-RK3328 > M: Matwey V. Kornilov > +R: Jonas Karlman > S: Maintained > F: configs/rock64-rk3328_defconfig > +F: arch/arm/dts/rk3328-rock64.dts > F: arch/arm/dts/rk3328-rock64-u-boot.dtsi > > ROCKPIE-RK3328 > diff --git a/configs/rock64-rk3328_defconfig b/configs/rock64-rk3328_defconfig > index 0297d098761e..0157a1efe374 100644 > --- a/configs/rock64-rk3328_defconfig > +++ b/configs/rock64-rk3328_defconfig > @@ -15,7 +15,6 @@ CONFIG_ROCKCHIP_RK3328=y > CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y > CONFIG_TPL_LIBCOMMON_SUPPORT=y > CONFIG_TPL_LIBGENERIC_SUPPORT=y > -CONFIG_SPL_DRIVERS_MISC=y > CONFIG_SPL_STACK_R_ADDR=0x60 > CONFIG_SPL_STACK=0x40 > CONFIG_TPL_SYS_MALLOC_F_LEN=0x800 > @@ -26,7 +25,9 @@ CONFIG_DEBUG_UART=y > # CONFIG_ANDROID_BOOT_IMAGE is not set > CONFIG_FIT=y > CONFIG_FIT_VERBOSE=y > +CONFIG_SPL_FIT_SIGNATURE=y > CONFIG_SPL_LOAD_FIT=y > +CONFIG_LEGACY_IMAGE_FORMAT=y > CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-rock64.dtb" > # CONFIG_DISPLAY_CPUINFO is not set > CONFIG_DISPLAY_BOARDINFO_LATE=y > @@ -57,8 +58,8 @@ CONFIG_TPL_OF_PLATDATA=y > CONFIG_ENV_IS_IN_MMC=y > CONFIG_SYS_RELOC_GD_ENV_ADDR=y > CONFIG_SYS_MMC_ENV_DEV=1 > -CONFIG_NET_RANDOM_ETHADDR=y > CONFIG_TPL_DM=y > +CONFIG_SPL_DM_SEQ_ALIAS=y > CONFIG_REGMAP=y > CONFIG_SPL_REGMAP=y > CONFIG_TPL_REGMAP=y > @@ -76,6 +77,8 @@ CONFIG_ROCKCHIP_EFUSE=y > CONFIG_MMC_DW=y > CONFIG_MMC_DW_ROCKCHIP=y > CONFIG_SPI_FLASH_GIGADEVICE=y > +CONFIG_PHY_REALTEK=y > +CONFIG_DM_ETH_PHY=y > CONFIG_ETH_DESIGNWARE=y > CONFIG_GMAC_ROCKCHIP=y > CONFIG_PHY_ROCKCHIP_INNO_USB2=y > -- > 2.43.0 > -- With best regards, Matwey V. Kornilov
Re: [PATCH 04/15] rockchip: rk3328-roc-cc: Update defconfig
(Resend from subscribed address.) On Wed, Feb 7, 2024 at 8:04 AM Jonas Karlman wrote: > > Update defconfig for rk3328-roc-cc with new defaults. > > Remove the SPL_DRIVERS_MISC=y option, no misc driver is used in SPL. > > Add CONFIG_SPL_FIT_SIGNATURE=y to let SPL verify an auto generated hash > of FIT images. This help indicate if there is an issue loading any of > the images to DRAM or SRAM. Also add LEGACY_IMAGE_FORMAT=y to keep > support for scripts. > > Add ROCKCHIP_EFUSE=y and remove NET_RANDOM_ETHADDR=y, ethaddr and > eth1addr is set based on cpuid read from eFUSE. I wonder if it would make sense to enable ROCKCHIP_EFUSE or ROCKCHIP_OTP for the respective SoCs by default, either with "imply" under the SoC Kconfig options, or "default if XXX" under the driver Kconfig options? Not sure which is preferred. Same goes for CONFIG_MISC_INIT_R for actually generating the serial number and MAC addresses from the efuse/OTP. At least for RK3566 and RK3588 these options are implied. ChenYu > Add SPL_DM_SEQ_ALIAS=y option to use alias sequence number in SPL. > > Add DM_ETH_PHY=y, PHY_MOTORCOMM=y and PHY_REALTEK=y to support common > ethernet PHYs. > > Add RNG_ROCKCHIP=y and DM_RNG=y options to support the onboard random > generator. > > Also add missing device tree file to MAINTAINERS and add myself as a > reviewer for this board. > > Signed-off-by: Jonas Karlman > --- > board/rockchip/evb_rk3328/MAINTAINERS | 2 ++ > configs/roc-cc-rk3328_defconfig | 9 +++-- > doc/board/rockchip/rockchip.rst | 2 +- > 3 files changed, 10 insertions(+), 3 deletions(-) > > diff --git a/board/rockchip/evb_rk3328/MAINTAINERS > b/board/rockchip/evb_rk3328/MAINTAINERS > index 419bc8ded375..09488eaf083f 100644 > --- a/board/rockchip/evb_rk3328/MAINTAINERS > +++ b/board/rockchip/evb_rk3328/MAINTAINERS > @@ -41,8 +41,10 @@ F: > arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi > ROC-RK3328-CC > M: Loic Devulder > M: Chen-Yu Tsai > +R: Jonas Karlman > S: Maintained > F: configs/roc-cc-rk3328_defconfig > +F: arch/arm/dts/rk3328-roc-cc.dts > F: arch/arm/dts/rk3328-roc-cc-u-boot.dtsi > > ROCK64-RK3328 > diff --git a/configs/roc-cc-rk3328_defconfig b/configs/roc-cc-rk3328_defconfig > index 4ac3c9403b02..7d81a715ef25 100644 > --- a/configs/roc-cc-rk3328_defconfig > +++ b/configs/roc-cc-rk3328_defconfig > @@ -15,7 +15,6 @@ CONFIG_ROCKCHIP_RK3328=y > CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y > CONFIG_TPL_LIBCOMMON_SUPPORT=y > CONFIG_TPL_LIBGENERIC_SUPPORT=y > -CONFIG_SPL_DRIVERS_MISC=y > CONFIG_SPL_STACK_R_ADDR=0x60 > CONFIG_SPL_STACK=0x40 > CONFIG_TPL_SYS_MALLOC_F_LEN=0x800 > @@ -26,7 +25,9 @@ CONFIG_DEBUG_UART=y > # CONFIG_ANDROID_BOOT_IMAGE is not set > CONFIG_FIT=y > CONFIG_FIT_VERBOSE=y > +CONFIG_SPL_FIT_SIGNATURE=y > CONFIG_SPL_LOAD_FIT=y > +CONFIG_LEGACY_IMAGE_FORMAT=y > CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-roc-cc.dtb" > # CONFIG_DISPLAY_CPUINFO is not set > CONFIG_DISPLAY_BOARDINFO_LATE=y > @@ -58,8 +59,8 @@ CONFIG_TPL_OF_PLATDATA=y > CONFIG_ENV_IS_IN_MMC=y > CONFIG_SYS_RELOC_GD_ENV_ADDR=y > CONFIG_SYS_MMC_ENV_DEV=1 > -CONFIG_NET_RANDOM_ETHADDR=y > CONFIG_TPL_DM=y > +CONFIG_SPL_DM_SEQ_ALIAS=y > CONFIG_REGMAP=y > CONFIG_SPL_REGMAP=y > CONFIG_TPL_REGMAP=y > @@ -73,9 +74,11 @@ CONFIG_FASTBOOT_CMD_OEM_FORMAT=y > CONFIG_ROCKCHIP_GPIO=y > CONFIG_SYS_I2C_ROCKCHIP=y > CONFIG_MISC=y > +CONFIG_ROCKCHIP_EFUSE=y > CONFIG_MMC_DW=y > CONFIG_MMC_DW_ROCKCHIP=y > CONFIG_PHY_REALTEK=y > +CONFIG_DM_ETH_PHY=y > CONFIG_PHY_GIGE=y > CONFIG_ETH_DESIGNWARE=y > CONFIG_GMAC_ROCKCHIP=y > @@ -95,6 +98,8 @@ CONFIG_PWM_ROCKCHIP=y > CONFIG_RAM=y > CONFIG_SPL_RAM=y > CONFIG_TPL_RAM=y > +CONFIG_DM_RNG=y > +CONFIG_RNG_ROCKCHIP=y > CONFIG_BAUDRATE=150 > CONFIG_DEBUG_UART_SHIFT=2 > CONFIG_SYS_NS16550_MEM32=y > diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst > index de2195deadca..99f48b6d6fa5 100644 > --- a/doc/board/rockchip/rockchip.rst > +++ b/doc/board/rockchip/rockchip.rst > @@ -60,8 +60,8 @@ List of mainline supported Rockchip boards: > - ODROID-GO Advance (odroid-go2) > * rk3328 > - Rockchip Evb-RK3328 (evb-rk3328) > + - Firefly ROC-RK3328-CC (roc-cc-rk3328) > - Pine64 Rock64 (rock64-rk3328) > - - Firefly-RK3328 (roc-cc-rk3328) > - Radxa Rockpi E (rock-pi-e-rk3328) > * rk3368 > - GeekBox (geekbox) > -- > 2.43.0 >
Re: [PATCH 10/15] rng: rockchip: Use same compatible as linux
Hello Heinrich,
On 2024-02-07 08:12, Heinrich Schuchardt wrote:
On 2/7/24 01:02, Jonas Karlman wrote:
Replace the rockchip,cryptov1-rng compatible with compatibles used in
the linux device tree for RK3288, RK3328 and RK3399 to ease sync of
SoC
device tree from linux.
Signed-off-by: Jonas Karlman
It is strange that U-Boot only uses the random number generation while
Linux only seems to use the crypto algorithm acceleration.
U-Boot has some crypto accelerator drivers in drivers/crypto/. But here
we only make use of modular exponentiation (see struct mod_exp_ops). We
could improve on crypto acceleration.
Pleas, let's keep in mind that using crypto accelerators doesn't
always result in improved performance; it all depends on the
workload and on the particular SoC. For example, performing
crypto operations on small chunks of data may be much faster when
performed on a CPU core. Another example is that some crypto IP
cores don't use the available CPU caches at all, which inevitably
slows them down.
Though, crypto IP cores are quite often more power-efficient vs.
performing the same crypto operations on a CPU core, which seems
to be the main reason why they get included in a number of SoCs.
Of course, this power efficiency becomes noticeable only when
offloading crypto operations performed on large chunks of data,
or when offloading for sizable amounts of time.
The current change looks good to me.
Reviewed-by: Heinrich Schuchardt
---
arch/arm/dts/rk3328-u-boot.dtsi | 2 +-
arch/arm/dts/rk3399-u-boot.dtsi | 2 +-
drivers/rng/rockchip_rng.c | 10 +-
3 files changed, 11 insertions(+), 3 deletions(-)
diff --git a/arch/arm/dts/rk3328-u-boot.dtsi
b/arch/arm/dts/rk3328-u-boot.dtsi
index e087b02893c1..d805c2f394f8 100644
--- a/arch/arm/dts/rk3328-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-u-boot.dtsi
@@ -28,7 +28,7 @@
};
rng: rng@ff06 {
- compatible = "rockchip,cryptov1-rng";
+ compatible = "rockchip,rk3328-crypto";
reg = <0x0 0xff06 0x0 0x4000>;
status = "okay";
};
diff --git a/arch/arm/dts/rk3399-u-boot.dtsi
b/arch/arm/dts/rk3399-u-boot.dtsi
index 3423b882c437..87b173e59579 100644
--- a/arch/arm/dts/rk3399-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-u-boot.dtsi
@@ -30,7 +30,7 @@
};
rng: rng@ff8b8000 {
- compatible = "rockchip,cryptov1-rng";
+ compatible = "rockchip,rk3399-crypto";
reg = <0x0 0xff8b8000 0x0 0x1000>;
status = "okay";
};
diff --git a/drivers/rng/rockchip_rng.c b/drivers/rng/rockchip_rng.c
index 705b424cf3dd..e82b5572fec5 100644
--- a/drivers/rng/rockchip_rng.c
+++ b/drivers/rng/rockchip_rng.c
@@ -302,7 +302,15 @@ static const struct dm_rng_ops rockchip_rng_ops =
{
static const struct udevice_id rockchip_rng_match[] = {
{
- .compatible = "rockchip,cryptov1-rng",
+ .compatible = "rockchip,rk3288-crypto",
+ .data = (ulong)_cryptov1_soc_data,
+ },
+ {
+ .compatible = "rockchip,rk3328-crypto",
+ .data = (ulong)_cryptov1_soc_data,
+ },
+ {
+ .compatible = "rockchip,rk3399-crypto",
.data = (ulong)_cryptov1_soc_data,
},
{
Re: [PATCH v4] remoteproc: uclass: Add methods to load firmware to rproc and boot rproc
Hi Roger
On 06/02/24 7:11 pm, Roger Quadros wrote:
>
>
> On 06/02/2024 07:31, MD Danish Anwar wrote:
>>
>>
>> On 05/02/24 6:07 pm, Roger Quadros wrote:
>>>
>>>
>>> On 05/02/2024 12:20, MD Danish Anwar wrote:
On 05/02/24 3:36 pm, Roger Quadros wrote:
>
>
> On 02/02/2024 18:40, Anwar, Md Danish wrote:
>> Hi Roger,
>>
>> On 2/2/2024 4:49 PM, Roger Quadros wrote:
>>>
>>>
>>> On 30/01/2024 08:33, MD Danish Anwar wrote:
Add APIs to set a firmware_name to a rproc and boot the rproc with the
same firmware.
>>
>>
>>
>>
>>> How does caller know what firmware size to set to?
>>> This should already be private to the rproc as it knows
>>> how large is its program memory.
>>>
>>
>> Caller is trying to boot the rproc with a firmware binary. Caller should
>> know the size of binary that it wants to load to rproc core. Caller will
>> specify the binary size to rproc_boot(). Based on the size provided by
>> caller, rproc_boot() will then allocate that much memory and call
>> request_firmware_into_buf() with the size and allocated buffer. If the
>> caller doesn't provide minimum size rproc_load() will fail.
>
> Caller only knows the filename. It need not know more details.
Caller is trying to load a file of it's choice to a rproc. Caller should
know the size of file it is trying to load or atleast the max size that
the firmware file could be of.
> Also see my comment below about rproc_boot() API.
>
>>
>> rproc_load() calls respective driver ops, for example: pru_load().
>> pru_load() [1] API checks the required size of firmware to load by
>> casting the buffer into Elf32_Ehdr and Elf32_Phdr and returns error if
>> size provided by caller is less than this.
>>
>>
>> if (offset + filesz > size) {
>> dev_dbg(dev, "truncated fw: need 0x%x avail 0x%zx\n",
>> offset + filesz, size);
>> ret = -EINVAL;
>> break;
>> }
>>
+ *
+ * Boot a remote processor (i.e. load its firmware, power it on, ...).
+ *
+ * This function first loads the firmware set in the uclass pdata of
Remote
+ * processor to a buffer and then loads firmware to the remote
processor
+ * using rproc_load().
+ *
+ * Return: 0 on success, and an appropriate error value otherwise
+ */
+int rproc_boot(struct udevice *rproc_dev, size_t fw_size);
>>>
>>> Was wondering if you need separate API for rproc_set_firmware or we can
>>> just
>>> pass firmware name as argument to rproc_boot()?
>>>
>>
>> Technically we can. But when we discussed this approach first in v1, you
>> had asked to keep the APIs similar to upstream linux. Upstream linux has
>> these two APIs so I kept it that way. If you want I can drop the first
>> API. Please let me know.
>
> Sure you can keep it as it is in Linux, but there, rproc_boot doesn't
> take fw_size argument. So wondering why you should have it in u-boot.
>
For loading firmware to a rproc core in u-boot, it's first neccassry to
load the firmware into buffer and then load that buffer into rproc core
using rproc_load() API. Now to load the firmware to a buffer ther is an
API request_firmware_into_buf(). This API takes size of firmware as one
of it's argument. So in order to call this API from rproc_boot() we need
to pass fw_size to rproc_boot()
Other u-boot drivers using request_firmware_into_buf() are also passing
size of firmware from their driver.
>>>
>>> But in your driver you didn't use size of firmware but some 64K
>>> https://lore.kernel.org/all/20240124064930.1787929-8-danishan...@ti.com/
>>>
>>
>> Yes, in driver I am hardcoding the size to 64K. That's because I know
>> the size of ICSSG firmwares are less than 64K. Instead of hardcoding I
>
> What if you enable debugging symbols in the firmware file. Won't it exceed
> 64KB?
> It is not a good idea to assume any firmware file size as it will eventually
> break sometime in the future and will be a pain to debug.
>
>> can also define macro or provide a config option where we set the size
>> and the driver will read the size from the config and call rproc_boot()
>> with size.
>>
>> For example, fm.c driver reads the size from config option
>> CONFIG_SYS_QE_FMAN_FW_LENGTH [1] and calls request_firmware_into_buf()
>>
>> [1]
>> https://elixir.bootlin.com/u-boot/latest/source/drivers/net/fm/fm.c#L458
>>
>>> So neither does the caller have a clue of firmware size?
>>>
If rproc_boot() doesn't take fw_size as argument then within
rproc_boot() we need to figure out the fw_size before calling
request_firmware_into_buf().
If we don't know the size / maximum size of the firmware to
Re: [PATCH 10/15] rng: rockchip: Use same compatible as linux
On 2/7/24 01:02, Jonas Karlman wrote:
Replace the rockchip,cryptov1-rng compatible with compatibles used in
the linux device tree for RK3288, RK3328 and RK3399 to ease sync of SoC
device tree from linux.
Signed-off-by: Jonas Karlman
It is strange that U-Boot only uses the random number generation while
Linux only seems to use the crypto algorithm acceleration.
U-Boot has some crypto accelerator drivers in drivers/crypto/. But here
we only make use of modular exponentiation (see struct mod_exp_ops). We
could improve on crypto acceleration.
The current change looks good to me.
Reviewed-by: Heinrich Schuchardt
---
arch/arm/dts/rk3328-u-boot.dtsi | 2 +-
arch/arm/dts/rk3399-u-boot.dtsi | 2 +-
drivers/rng/rockchip_rng.c | 10 +-
3 files changed, 11 insertions(+), 3 deletions(-)
diff --git a/arch/arm/dts/rk3328-u-boot.dtsi b/arch/arm/dts/rk3328-u-boot.dtsi
index e087b02893c1..d805c2f394f8 100644
--- a/arch/arm/dts/rk3328-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-u-boot.dtsi
@@ -28,7 +28,7 @@
};
rng: rng@ff06 {
- compatible = "rockchip,cryptov1-rng";
+ compatible = "rockchip,rk3328-crypto";
reg = <0x0 0xff06 0x0 0x4000>;
status = "okay";
};
diff --git a/arch/arm/dts/rk3399-u-boot.dtsi b/arch/arm/dts/rk3399-u-boot.dtsi
index 3423b882c437..87b173e59579 100644
--- a/arch/arm/dts/rk3399-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-u-boot.dtsi
@@ -30,7 +30,7 @@
};
rng: rng@ff8b8000 {
- compatible = "rockchip,cryptov1-rng";
+ compatible = "rockchip,rk3399-crypto";
reg = <0x0 0xff8b8000 0x0 0x1000>;
status = "okay";
};
diff --git a/drivers/rng/rockchip_rng.c b/drivers/rng/rockchip_rng.c
index 705b424cf3dd..e82b5572fec5 100644
--- a/drivers/rng/rockchip_rng.c
+++ b/drivers/rng/rockchip_rng.c
@@ -302,7 +302,15 @@ static const struct dm_rng_ops rockchip_rng_ops = {
static const struct udevice_id rockchip_rng_match[] = {
{
- .compatible = "rockchip,cryptov1-rng",
+ .compatible = "rockchip,rk3288-crypto",
+ .data = (ulong)_cryptov1_soc_data,
+ },
+ {
+ .compatible = "rockchip,rk3328-crypto",
+ .data = (ulong)_cryptov1_soc_data,
+ },
+ {
+ .compatible = "rockchip,rk3399-crypto",
.data = (ulong)_cryptov1_soc_data,
},
{
Re: [PATCH] arm: mach-k3: Refactor QoS settings
On 06-Feb-24 22:58, Andrew Davis wrote:
> On 2/6/24 2:56 AM, Aradhya Bhatia wrote:
>> Refactor common QoS code into a new common header file, and the soc
>> specific setup_qos functions into a common API.
>>
>> Rename $(soc)_qos_count and $(soc)_qos_data variables to qos_count and
>> qos_data. When QoS settings of more SoCs are added, only one pair will
>> be defined at a time, based on the config SOC_K3_$(soc).
>>
>> This refactoring has been done for 2 major purposes.
>>
>> - The auto-generated $(soc)_qos_data.c and $(soc)_qos.h files cannot
>> have any code that is specific to any bootloader. Those files have to
>> remain agnostic of different bootloader implementations and their
>> header files.
>>
>> - The existing implementation was less than ideal and would have enabled
>> multiple $(soc)_qos_count and $(soc)_qos_data variables for all SoC
>> variants.
>>
>> Signed-off-by: Aradhya Bhatia
>> ---
>> arch/arm/mach-k3/Kconfig | 8 +++
>> arch/arm/mach-k3/am62a7_init.c | 14
>> arch/arm/mach-k3/common.c | 12 ++
>> arch/arm/mach-k3/common.h | 8 +++
>> arch/arm/mach-k3/include/mach/hardware.h | 9
>> arch/arm/mach-k3/include/mach/k3-qos.h | 22 +++
>> arch/arm/mach-k3/r5/am62ax/Makefile | 2 +-
>> .../{include/mach => r5/am62ax}/am62a_qos.h | 0
>> .../{am62a_qos_data.c => am62a_qos_uboot.c} | 9
>> 9 files changed, 56 insertions(+), 28 deletions(-)
>> create mode 100644 arch/arm/mach-k3/include/mach/k3-qos.h
>> rename arch/arm/mach-k3/{include/mach => r5/am62ax}/am62a_qos.h (100%)
>> rename arch/arm/mach-k3/r5/am62ax/{am62a_qos_data.c =>
>> am62a_qos_uboot.c} (85%)
>>
>> diff --git a/arch/arm/mach-k3/Kconfig b/arch/arm/mach-k3/Kconfig
>> index 03898424c954..ffc4a9c29029 100644
>> --- a/arch/arm/mach-k3/Kconfig
>> +++ b/arch/arm/mach-k3/Kconfig
>> @@ -139,6 +139,14 @@ config K3_DM_FW
>> bootloader, it makes RM and PM services not being available
>> during R5 SPL execution time.
>> +config K3_QOS
>> + bool "Enable Quality of Service (QoS) Settings for TI K3 SoCs"
>> + default y if CPU_V7R && SOC_K3_AM62A7
>
> If this is R5 only, then put it in the arch/arm/mach-k3/r5 Kconfig
> and you can drop the CPU_V7R check.
>
> Andrew
That would indeed be better. Thanks!
Regards
Aradhya
>
>> + help
>> + This option enables the R5 SPL to apply QoS settings for various
>> + HW controllers inside the TI K3 SoCs. The files for QoS
>> settings are
>> + generated from Sysconfig and k3-resource-partitioning tools.
>> +
>> config K3_X509_SWRV
>> int "SWRV for X509 certificate used for boot images"
>> default 1
>> diff --git a/arch/arm/mach-k3/am62a7_init.c
>> b/arch/arm/mach-k3/am62a7_init.c
>> index d72e19936b9b..080274e3af58 100644
>> --- a/arch/arm/mach-k3/am62a7_init.c
>> +++ b/arch/arm/mach-k3/am62a7_init.c
>> @@ -69,20 +69,6 @@ static void ctrl_mmr_unlock(void)
>> mmr_unlock(PADCFG_MMR1_BASE, 1);
>> }
>> -#if (IS_ENABLED(CONFIG_CPU_V7R))
>> -static void setup_qos(void)
>> -{
>> - u32 i;
>> -
>> - for (i = 0; i < am62a_qos_count; i++)
>> - writel(am62a_qos_data[i].val, (uintptr_t)am62a_qos_data[i].reg);
>> -}
>> -#else
>> -static void setup_qos(void)
>> -{
>> -}
>> -#endif
>> -
>> void board_init_f(ulong dummy)
>> {
>> struct udevice *dev;
>> diff --git a/arch/arm/mach-k3/common.c b/arch/arm/mach-k3/common.c
>> index f411366778f0..b54f2ddc4729 100644
>> --- a/arch/arm/mach-k3/common.c
>> +++ b/arch/arm/mach-k3/common.c
>> @@ -28,6 +28,8 @@
>> #include
>> #include
>> +#include
>> +
>> #if IS_ENABLED(CONFIG_SYS_K3_SPL_ATF)
>> enum {
>> IMAGE_ID_ATF,
>> @@ -595,3 +597,13 @@ int misc_init_r(void)
>> void __weak do_board_detect(void)
>> {
>> }
>> +
>> +#if (IS_ENABLED(CONFIG_K3_QOS))
>> +void setup_qos(void)
>> +{
>> + u32 i;
>> +
>> + for (i = 0; i < qos_count; i++)
>> + writel(qos_data[i].val, (uintptr_t)qos_data[i].reg);
>> +}
>> +#endif
>> diff --git a/arch/arm/mach-k3/common.h b/arch/arm/mach-k3/common.h
>> index e9db9fbfb63d..53aa186b31a4 100644
>> --- a/arch/arm/mach-k3/common.h
>> +++ b/arch/arm/mach-k3/common.h
>> @@ -45,3 +45,11 @@ void ti_secure_image_post_process(void **p_image,
>> size_t *p_size);
>> struct ti_sci_handle *get_ti_sci_handle(void);
>> void do_board_detect(void);
>> void ti_secure_image_check_binary(void **p_image, size_t *p_size);
>> +
>> +#if (IS_ENABLED(CONFIG_K3_QOS))
>> +void setup_qos(void);
>> +#else
>> +static inline void setup_qos(void)
>> +{
>> +}
>> +#endif
>> diff --git a/arch/arm/mach-k3/include/mach/hardware.h
>> b/arch/arm/mach-k3/include/mach/hardware.h
>> index a1a9dfbde66c..52ef82e70b07 100644
>> --- a/arch/arm/mach-k3/include/mach/hardware.h
>> +++ b/arch/arm/mach-k3/include/mach/hardware.h
>> @@ -30,7 +30,6 @@
>> #ifdef
Re: [PATCH 03/15] rockchip: rk3328-rock64: Update defconfig
On 2024-02-07 01:02, Jonas Karlman wrote: Update defconfig for rk3328-rock64 with new defaults. Remove the SPL_DRIVERS_MISC=y option, no misc driver is used in SPL. Add CONFIG_SPL_FIT_SIGNATURE=y to let SPL verify an auto generated hash of FIT images. This help indicate if there is an issue loading any of the images to DRAM or SRAM. Also add LEGACY_IMAGE_FORMAT=y to keep support for scripts. Remove the NET_RANDOM_ETHADDR=y option, ethaddr and eth1addr is set based on cpuid read from eFUSE. Add SPL_DM_SEQ_ALIAS=y option to use alias sequence number in SPL. Add DM_ETH_PHY=y and PHY_REALTEK=y to support onboard ethernet PHY. Also add missing device tree file to MAINTAINERS and add myself as a reviewer for this board. Signed-off-by: Jonas Karlman Looking good to me. Reviewed-by: Dragan Simic --- board/rockchip/evb_rk3328/MAINTAINERS | 2 ++ configs/rock64-rk3328_defconfig | 7 +-- 2 files changed, 7 insertions(+), 2 deletions(-) diff --git a/board/rockchip/evb_rk3328/MAINTAINERS b/board/rockchip/evb_rk3328/MAINTAINERS index dc750bd69426..419bc8ded375 100644 --- a/board/rockchip/evb_rk3328/MAINTAINERS +++ b/board/rockchip/evb_rk3328/MAINTAINERS @@ -47,8 +47,10 @@ F: arch/arm/dts/rk3328-roc-cc-u-boot.dtsi ROCK64-RK3328 M: Matwey V. Kornilov +R: Jonas Karlman S: Maintained F: configs/rock64-rk3328_defconfig +F: arch/arm/dts/rk3328-rock64.dts F: arch/arm/dts/rk3328-rock64-u-boot.dtsi ROCKPIE-RK3328 diff --git a/configs/rock64-rk3328_defconfig b/configs/rock64-rk3328_defconfig index 0297d098761e..0157a1efe374 100644 --- a/configs/rock64-rk3328_defconfig +++ b/configs/rock64-rk3328_defconfig @@ -15,7 +15,6 @@ CONFIG_ROCKCHIP_RK3328=y CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y -CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK_R_ADDR=0x60 CONFIG_SPL_STACK=0x40 CONFIG_TPL_SYS_MALLOC_F_LEN=0x800 @@ -26,7 +25,9 @@ CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_FIT=y CONFIG_FIT_VERBOSE=y +CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y +CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-rock64.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y @@ -57,8 +58,8 @@ CONFIG_TPL_OF_PLATDATA=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=1 -CONFIG_NET_RANDOM_ETHADDR=y CONFIG_TPL_DM=y +CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_REGMAP=y CONFIG_SPL_REGMAP=y CONFIG_TPL_REGMAP=y @@ -76,6 +77,8 @@ CONFIG_ROCKCHIP_EFUSE=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y CONFIG_SPI_FLASH_GIGADEVICE=y +CONFIG_PHY_REALTEK=y +CONFIG_DM_ETH_PHY=y CONFIG_ETH_DESIGNWARE=y CONFIG_GMAC_ROCKCHIP=y CONFIG_PHY_ROCKCHIP_INNO_USB2=y
Re: [PATCH 01/15] rockchip: rk3328: Update default u-boot, spl-boot-order prop
On 2024-02-07 01:02, Jonas Karlman wrote:
Change to use a common FIT load order, same-as-spl > SD-card > eMMC on
RK3328 boards. Only EVB and Radxa ROCK Pi E is affected by this change.
Signed-off-by: Jonas Karlman
Looking good to me.
Reviewed-by: Dragan Simic
---
arch/arm/dts/rk3328-nanopi-r2c-plus-u-boot.dtsi | 6 --
arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi | 5 -
arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi | 5 -
arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi | 5 -
arch/arm/dts/rk3328-roc-cc-u-boot.dtsi | 5 +
arch/arm/dts/rk3328-rock64-u-boot.dtsi | 5 +
arch/arm/dts/rk3328-u-boot.dtsi | 2 +-
7 files changed, 3 insertions(+), 30 deletions(-)
diff --git a/arch/arm/dts/rk3328-nanopi-r2c-plus-u-boot.dtsi
b/arch/arm/dts/rk3328-nanopi-r2c-plus-u-boot.dtsi
index f8adb9e5e1ff..1dc3c022c504 100644
--- a/arch/arm/dts/rk3328-nanopi-r2c-plus-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-nanopi-r2c-plus-u-boot.dtsi
@@ -1,9 +1,3 @@
// SPDX-License-Identifier: GPL-2.0-or-later
#include "rk3328-nanopi-r2c-u-boot.dtsi"
-
-/ {
- chosen {
- u-boot,spl-boot-order = "same-as-spl", ,
- };
-};
diff --git a/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi
b/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi
index 78d37ab47558..d969b008775e 100644
--- a/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi
@@ -6,11 +6,6 @@
#include "rk3328-u-boot.dtsi"
#include "rk3328-sdram-ddr4-666.dtsi"
-/ {
- chosen {
- u-boot,spl-boot-order = "same-as-spl", ,
- };
-};
{
bootph-pre-ram;
diff --git a/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi
b/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi
index ebe33e48cb9c..5aaa5ccb15c1 100644
--- a/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi
@@ -6,11 +6,6 @@
#include "rk3328-u-boot.dtsi"
#include "rk3328-sdram-lpddr3-666.dtsi"
-/ {
- chosen {
- u-boot,spl-boot-order = "same-as-spl", ,
- };
-};
{
bootph-pre-ram;
diff --git a/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi
b/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi
index 637c70adf194..6d3db86dce6a 100644
--- a/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi
@@ -6,11 +6,6 @@
#include "rk3328-u-boot.dtsi"
#include "rk3328-sdram-ddr4-666.dtsi"
-/ {
- chosen {
- u-boot,spl-boot-order = "same-as-spl", ,
- };
-};
{
bootph-pre-ram;
diff --git a/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi
b/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi
index 2062f34bf825..8bc2f134f8f4 100644
--- a/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi
@@ -5,11 +5,8 @@
#include "rk3328-u-boot.dtsi"
#include "rk3328-sdram-ddr4-666.dtsi"
-/ {
- chosen {
- u-boot,spl-boot-order = "same-as-spl", ,
- };
+/ {
smbios {
compatible = "u-boot,sysinfo-smbios";
diff --git a/arch/arm/dts/rk3328-rock64-u-boot.dtsi
b/arch/arm/dts/rk3328-rock64-u-boot.dtsi
index 6904515b9693..bfe506fd2249 100644
--- a/arch/arm/dts/rk3328-rock64-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-rock64-u-boot.dtsi
@@ -5,11 +5,8 @@
#include "rk3328-u-boot.dtsi"
#include "rk3328-sdram-lpddr3-1600.dtsi"
-/ {
- chosen {
- u-boot,spl-boot-order = "same-as-spl", ,
- };
+/ {
smbios {
compatible = "u-boot,sysinfo-smbios";
diff --git a/arch/arm/dts/rk3328-u-boot.dtsi
b/arch/arm/dts/rk3328-u-boot.dtsi
index a9f2536de2a2..a12be7876db0 100644
--- a/arch/arm/dts/rk3328-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-u-boot.dtsi
@@ -13,7 +13,7 @@
};
chosen {
- u-boot,spl-boot-order = ,
+ u-boot,spl-boot-order = "same-as-spl", ,
};
dmc: dmc {
[PATCH 11/15] rockchip: rk3328: Sync device tree from linux v6.8-rc1
Sync rk3328 device tree from linux v6.8-rc1.
Signed-off-by: Jonas Karlman
---
arch/arm/dts/rk3328-evb.dts | 1 +
arch/arm/dts/rk3328-nanopi-r2s.dts | 3 +-
arch/arm/dts/rk3328-orangepi-r1-plus-lts.dts | 4 +-
arch/arm/dts/rk3328-orangepi-r1-plus.dts | 1 +
arch/arm/dts/rk3328-roc-cc.dts | 3 +-
arch/arm/dts/rk3328-rock-pi-e.dts| 55 +
arch/arm/dts/rk3328-rock64.dts | 1 +
arch/arm/dts/rk3328-u-boot.dtsi | 6 --
arch/arm/dts/rk3328.dtsi | 64 +++-
9 files changed, 112 insertions(+), 26 deletions(-)
diff --git a/arch/arm/dts/rk3328-evb.dts b/arch/arm/dts/rk3328-evb.dts
index ff6b466e0e07..1eef5504445f 100644
--- a/arch/arm/dts/rk3328-evb.dts
+++ b/arch/arm/dts/rk3328-evb.dts
@@ -11,6 +11,7 @@
compatible = "rockchip,rk3328-evb", "rockchip,rk3328";
aliases {
+ ethernet0 =
mmc0 =
mmc1 =
mmc2 =
diff --git a/arch/arm/dts/rk3328-nanopi-r2s.dts
b/arch/arm/dts/rk3328-nanopi-r2s.dts
index 3857d487ab84..a4399da7d8b1 100644
--- a/arch/arm/dts/rk3328-nanopi-r2s.dts
+++ b/arch/arm/dts/rk3328-nanopi-r2s.dts
@@ -14,6 +14,7 @@
compatible = "friendlyarm,nanopi-r2s", "rockchip,rk3328";
aliases {
+ ethernet0 =
ethernet1 =
mmc0 =
};
@@ -34,7 +35,7 @@
pinctrl-0 = <_button_pin>;
pinctrl-names = "default";
- reset {
+ key-reset {
label = "reset";
gpios = < RK_PA0 GPIO_ACTIVE_LOW>;
linux,code = ;
diff --git a/arch/arm/dts/rk3328-orangepi-r1-plus-lts.dts
b/arch/arm/dts/rk3328-orangepi-r1-plus-lts.dts
index 5d7d567283e5..4237f2ee8fee 100644
--- a/arch/arm/dts/rk3328-orangepi-r1-plus-lts.dts
+++ b/arch/arm/dts/rk3328-orangepi-r1-plus-lts.dts
@@ -26,9 +26,11 @@
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0>;
+ motorcomm,auto-sleep-disabled;
motorcomm,clk-out-frequency-hz = <12500>;
motorcomm,keep-pll-enabled;
- motorcomm,auto-sleep-disabled;
+ motorcomm,rx-clk-drv-microamp = <5020>;
+ motorcomm,rx-data-drv-microamp = <5020>;
pinctrl-0 = <_phy_reset_pin>;
pinctrl-names = "default";
diff --git a/arch/arm/dts/rk3328-orangepi-r1-plus.dts
b/arch/arm/dts/rk3328-orangepi-r1-plus.dts
index dc83d74045a3..f20662929c77 100644
--- a/arch/arm/dts/rk3328-orangepi-r1-plus.dts
+++ b/arch/arm/dts/rk3328-orangepi-r1-plus.dts
@@ -15,6 +15,7 @@
compatible = "xunlong,orangepi-r1-plus", "rockchip,rk3328";
aliases {
+ ethernet0 =
ethernet1 =
mmc0 =
};
diff --git a/arch/arm/dts/rk3328-roc-cc.dts b/arch/arm/dts/rk3328-roc-cc.dts
index aa22a0c22265..414897a57e75 100644
--- a/arch/arm/dts/rk3328-roc-cc.dts
+++ b/arch/arm/dts/rk3328-roc-cc.dts
@@ -11,6 +11,7 @@
compatible = "firefly,roc-rk3328-cc", "rockchip,rk3328";
aliases {
+ ethernet0 =
mmc0 =
mmc1 =
};
@@ -96,7 +97,6 @@
linux,default-trigger = "heartbeat";
gpios = < 1 GPIO_ACTIVE_LOW>;
default-state = "on";
- mode = <0x23>;
};
user_led: led-1 {
@@ -104,7 +104,6 @@
linux,default-trigger = "mmc1";
gpios = < 0 GPIO_ACTIVE_LOW>;
default-state = "off";
- mode = <0x05>;
};
};
};
diff --git a/arch/arm/dts/rk3328-rock-pi-e.dts
b/arch/arm/dts/rk3328-rock-pi-e.dts
index 018a3a5075c7..3cda6c627b68 100644
--- a/arch/arm/dts/rk3328-rock-pi-e.dts
+++ b/arch/arm/dts/rk3328-rock-pi-e.dts
@@ -21,6 +21,8 @@
compatible = "radxa,rockpi-e", "rockchip,rk3328";
aliases {
+ ethernet0 =
+ ethernet1 =
mmc0 =
mmc1 =
};
@@ -180,6 +182,59 @@
status = "okay";
};
+ {
+ gpio-line-names =
+ /* GPIO0_A0 - A7 */
+ "", "", "", "", "", "", "", "",
+ /* GPIO0_B0 - B7 */
+ "", "", "", "", "", "", "", "",
+ /* GPIO0_C0 - C7 */
+ "", "", "", "", "", "", "", "",
+ /* GPIO0_D0 - D7 */
+ "", "", "", "pin-15 [GPIO0_D3]", "", "", "", "";
+};
+
+ {
+ gpio-line-names =
+ /* GPIO1_A0 - A7 */
+ "", "", "", "", "", "", "", "",
+ /* GPIO1_B0 - B7 */
+ "", "", "", "", "", "", "", "",
+ /* GPIO1_C0 - C7
[PATCH 08/15] rockchip: rk3328: Fix loading FIT from SD-card when booting from eMMC
When RK3328 boards run SPL from eMMC and fail to load FIT from eMMC due
to it being missing or checksum validation fails there is a fallback to
read FIT from SD-card. However, without proper pinctrl configuration
reading FIT from SD-card will fail:
U-Boot SPL 2024.04-rc1 (Feb 05 2024 - 22:18:22 +)
Trying to boot from MMC1
mmc_load_image_raw_sector: mmc block read error
Trying to boot from MMC2
Card did not respond to voltage select! : -110
spl: mmc init failed with error: -95
Trying to boot from MMC1
mmc_load_image_raw_sector: mmc block read error
SPL: failed to boot from all boot devices
### ERROR ### Please RESET the board ###
Fix this by tagging related emmc and sdmmc pinctrl nodes with bootph
props. Also sort and move common nodes shared by all boards to the SoC
u-boot.dtsi.
Signed-off-by: Jonas Karlman
---
arch/arm/dts/rk3328-evb-u-boot.dtsi | 4 +
arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi| 17
.../rk3328-orangepi-r1-plus-lts-u-boot.dtsi | 25 ++
.../dts/rk3328-orangepi-r1-plus-u-boot.dtsi | 25 ++
arch/arm/dts/rk3328-roc-cc-u-boot.dtsi| 17
arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi | 17
arch/arm/dts/rk3328-rock64-u-boot.dtsi| 25 ++
arch/arm/dts/rk3328-u-boot.dtsi | 82 ---
8 files changed, 92 insertions(+), 120 deletions(-)
diff --git a/arch/arm/dts/rk3328-evb-u-boot.dtsi
b/arch/arm/dts/rk3328-evb-u-boot.dtsi
index 12b68df1ac67..38ad3cc16d09 100644
--- a/arch/arm/dts/rk3328-evb-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-evb-u-boot.dtsi
@@ -44,3 +44,7 @@
/* Integrated PHY unsupported by U-Boot */
status = "broken";
};
+
+_sd {
+ bootph-pre-ram;
+};
diff --git a/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi
b/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi
index 0a1152e8b52d..0ffac0e6f930 100644
--- a/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi
@@ -7,23 +7,6 @@
#include "rk3328-u-boot.dtsi"
#include "rk3328-sdram-ddr4-666.dtsi"
- {
- bootph-pre-ram;
-};
-
- {
- bootph-pre-ram;
-};
-
-_pin {
- bootph-pre-ram;
-};
-
-_pull_up_4ma {
- bootph-pre-ram;
-};
-
-/* Need this and all the pinctrl/gpio stuff above to set pinmux */
_sd {
bootph-pre-ram;
};
diff --git a/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi
b/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi
index 8a4189c6f1cc..7cdf6913795d 100644
--- a/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi
@@ -7,29 +7,16 @@
#include "rk3328-u-boot.dtsi"
#include "rk3328-sdram-lpddr3-666.dtsi"
- {
- bootph-pre-ram;
-};
-
- {
- bootph-pre-ram;
-};
-
-_pin {
+ {
bootph-pre-ram;
-};
+ bootph-some-ram;
-_pull_up_4ma {
- bootph-pre-ram;
+ flash@0 {
+ bootph-pre-ram;
+ bootph-some-ram;
+ };
};
-/* Need this and all the pinctrl/gpio stuff above to set pinmux */
_sd {
bootph-pre-ram;
};
-
- {
- spi_flash: spiflash@0 {
- bootph-all;
- };
-};
diff --git a/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi
b/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi
index 2e3b6a77a268..35baeb2464bc 100644
--- a/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi
@@ -7,29 +7,16 @@
#include "rk3328-u-boot.dtsi"
#include "rk3328-sdram-ddr4-666.dtsi"
- {
- bootph-pre-ram;
-};
-
- {
- bootph-pre-ram;
-};
-
-_pin {
+ {
bootph-pre-ram;
-};
+ bootph-some-ram;
-_pull_up_4ma {
- bootph-pre-ram;
+ flash@0 {
+ bootph-pre-ram;
+ bootph-some-ram;
+ };
};
-/* Need this and all the pinctrl/gpio stuff above to set pinmux */
_sd {
bootph-pre-ram;
};
-
- {
- spi_flash: spiflash@0 {
- bootph-all;
- };
-};
diff --git a/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi
b/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi
index 8bc2f134f8f4..47d74964fd0c 100644
--- a/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi
@@ -29,23 +29,6 @@
};
};
- {
- bootph-pre-ram;
-};
-
- {
- bootph-pre-ram;
-};
-
-_pin {
- bootph-pre-ram;
-};
-
-_pull_up_4ma {
- bootph-pre-ram;
-};
-
-/* Need this and all the pinctrl/gpio stuff above to set pinmux */
_sd {
bootph-pre-ram;
};
diff --git a/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi
b/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi
index 1f220c6dcd0f..9ed0aef1ecc9 100644
--- a/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi
@@ -29,23 +29,6 @@
};
};
- {
- bootph-pre-ram;
-};
-
- {
- bootph-pre-ram;
-};
-
-_pin {
- bootph-pre-ram;
-};
-
-_pull_up_4ma {
- bootph-pre-ram;
-};
-
-/* Need this and all the pinctrl/gpio stuff above to set pinmux */
_sd {
bootph-pre-ram;
};
[PATCH 09/15] gpio: rockchip: Use gpio alias id as gpio bank id
The U-Boot driver try to base the gpio bank id on the gpio-ranges prop
and fall back to base the bank id on the node name. However, the linux
driver try to base the bank id on the gpio alias id and fall back on
node order.
This can cause issues when SoC DT is synced from linux and gpioX@ nodes
has been renamed to gpio@ and gpio-ranges or a SoC specific alias has
not been assigned.
Try to use the gpio alias id as first fallback when a gpio-ranges prop
is missing to ease sync of updated SoC DT. Keep the current fallback on
node name as a third fallback to not affect any existing unsynced DT.
Signed-off-by: Jonas Karlman
---
drivers/gpio/rk_gpio.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/gpio/rk_gpio.c b/drivers/gpio/rk_gpio.c
index 4a6ae554bf78..24fedd456353 100644
--- a/drivers/gpio/rk_gpio.c
+++ b/drivers/gpio/rk_gpio.c
@@ -201,8 +201,11 @@ static int rockchip_gpio_probe(struct udevice *dev)
priv->bank = args.args[1] / ROCKCHIP_GPIOS_PER_BANK;
} else {
uc_priv->gpio_count = ROCKCHIP_GPIOS_PER_BANK;
- end = strrchr(dev->name, '@');
- priv->bank = trailing_strtoln(dev->name, end);
+ ret = dev_read_alias_seq(dev, >bank);
+ if (ret) {
+ end = strrchr(dev->name, '@');
+ priv->bank = trailing_strtoln(dev->name, end);
+ }
}
priv->name[0] = 'A' + priv->bank;
--
2.43.0
[PATCH 10/15] rng: rockchip: Use same compatible as linux
Replace the rockchip,cryptov1-rng compatible with compatibles used in
the linux device tree for RK3288, RK3328 and RK3399 to ease sync of SoC
device tree from linux.
Signed-off-by: Jonas Karlman
---
arch/arm/dts/rk3328-u-boot.dtsi | 2 +-
arch/arm/dts/rk3399-u-boot.dtsi | 2 +-
drivers/rng/rockchip_rng.c | 10 +-
3 files changed, 11 insertions(+), 3 deletions(-)
diff --git a/arch/arm/dts/rk3328-u-boot.dtsi b/arch/arm/dts/rk3328-u-boot.dtsi
index e087b02893c1..d805c2f394f8 100644
--- a/arch/arm/dts/rk3328-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-u-boot.dtsi
@@ -28,7 +28,7 @@
};
rng: rng@ff06 {
- compatible = "rockchip,cryptov1-rng";
+ compatible = "rockchip,rk3328-crypto";
reg = <0x0 0xff06 0x0 0x4000>;
status = "okay";
};
diff --git a/arch/arm/dts/rk3399-u-boot.dtsi b/arch/arm/dts/rk3399-u-boot.dtsi
index 3423b882c437..87b173e59579 100644
--- a/arch/arm/dts/rk3399-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-u-boot.dtsi
@@ -30,7 +30,7 @@
};
rng: rng@ff8b8000 {
- compatible = "rockchip,cryptov1-rng";
+ compatible = "rockchip,rk3399-crypto";
reg = <0x0 0xff8b8000 0x0 0x1000>;
status = "okay";
};
diff --git a/drivers/rng/rockchip_rng.c b/drivers/rng/rockchip_rng.c
index 705b424cf3dd..e82b5572fec5 100644
--- a/drivers/rng/rockchip_rng.c
+++ b/drivers/rng/rockchip_rng.c
@@ -302,7 +302,15 @@ static const struct dm_rng_ops rockchip_rng_ops = {
static const struct udevice_id rockchip_rng_match[] = {
{
- .compatible = "rockchip,cryptov1-rng",
+ .compatible = "rockchip,rk3288-crypto",
+ .data = (ulong)_cryptov1_soc_data,
+ },
+ {
+ .compatible = "rockchip,rk3328-crypto",
+ .data = (ulong)_cryptov1_soc_data,
+ },
+ {
+ .compatible = "rockchip,rk3399-crypto",
.data = (ulong)_cryptov1_soc_data,
},
{
--
2.43.0
[PATCH 06/15] rockchip: rk3328-nanopi-r2: Update defconfig
Update defconfig for rk3328-nanopi-r2* boards with new defaults.
Remove the SPL_DRIVERS_MISC=y option, no misc driver is used in SPL.
Add CONFIG_SPL_FIT_SIGNATURE=y to let SPL verify an auto generated hash
of FIT images. This help indicate if there is an issue loading any of
the images to DRAM or SRAM. Also add LEGACY_IMAGE_FORMAT=y to keep
support for scripts.
Add ROCKCHIP_EFUSE=y and remove NET_RANDOM_ETHADDR=y, ethaddr and
eth1addr is set based on cpuid read from eFUSE.
Add SPL_DM_SEQ_ALIAS=y option to use alias sequence number in SPL.
Add DM_ETH_PHY=y, PHY_MOTORCOMM=y, PHY_REALTEK=y and remove to
support reset of onboard ethernet PHYs.
Add RNG_ROCKCHIP=y and DM_RNG=y options to support the onboard random
generator.
Also add missing device tree files to MAINTAINERS file.
Signed-off-by: Jonas Karlman
---
arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi | 6 --
board/rockchip/evb_rk3328/MAINTAINERS | 2 ++
configs/nanopi-r2c-plus-rk3328_defconfig | 11 +--
configs/nanopi-r2c-rk3328_defconfig| 11 +--
configs/nanopi-r2s-rk3328_defconfig| 11 +--
doc/board/rockchip/rockchip.rst| 3 +++
6 files changed, 32 insertions(+), 12 deletions(-)
diff --git a/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi
b/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi
index d969b008775e..0a1152e8b52d 100644
--- a/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi
@@ -27,9 +27,3 @@
_sd {
bootph-pre-ram;
};
-
- {
- snps,reset-gpio = < RK_PC2 GPIO_ACTIVE_LOW>;
- snps,reset-active-low;
- snps,reset-delays-us = <0 1 5>;
-};
diff --git a/board/rockchip/evb_rk3328/MAINTAINERS
b/board/rockchip/evb_rk3328/MAINTAINERS
index 47fd05d2ea8b..b88727acad26 100644
--- a/board/rockchip/evb_rk3328/MAINTAINERS
+++ b/board/rockchip/evb_rk3328/MAINTAINERS
@@ -11,12 +11,14 @@ NANOPI-R2C-RK3328
M: Tianling Shen
S: Maintained
F: configs/nanopi-r2c-rk3328_defconfig
+F: arch/arm/dts/rk3328-nanopi-r2c.dts
F: arch/arm/dts/rk3328-nanopi-r2c-u-boot.dtsi
NANOPI-R2C-PLUS-RK3328
M: Tianling Shen
S: Maintained
F: configs/nanopi-r2c-plus-rk3328_defconfig
+F: arch/arm/dts/rk3328-nanopi-r2c-plus.dts
F: arch/arm/dts/rk3328-nanopi-r2c-plus-u-boot.dtsi
NANOPI-R2S-RK3328
diff --git a/configs/nanopi-r2c-plus-rk3328_defconfig
b/configs/nanopi-r2c-plus-rk3328_defconfig
index 320ed8b434a8..1cb0ed855398 100644
--- a/configs/nanopi-r2c-plus-rk3328_defconfig
+++ b/configs/nanopi-r2c-plus-rk3328_defconfig
@@ -15,7 +15,6 @@ CONFIG_ROCKCHIP_RK3328=y
CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
CONFIG_TPL_LIBCOMMON_SUPPORT=y
CONFIG_TPL_LIBGENERIC_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x60
CONFIG_SPL_STACK=0x40
CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
@@ -26,7 +25,9 @@ CONFIG_DEBUG_UART=y
# CONFIG_ANDROID_BOOT_IMAGE is not set
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_FIT_SIGNATURE=y
CONFIG_SPL_LOAD_FIT=y
+CONFIG_LEGACY_IMAGE_FORMAT=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-nanopi-r2c-plus.dtb"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
@@ -57,8 +58,8 @@ CONFIG_TPL_OF_PLATDATA=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_DEV=1
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_TPL_DM=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_REGMAP=y
CONFIG_SPL_REGMAP=y
CONFIG_TPL_REGMAP=y
@@ -72,8 +73,12 @@ CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
CONFIG_MISC=y
+CONFIG_ROCKCHIP_EFUSE=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_PHY_MOTORCOMM=y
+CONFIG_PHY_REALTEK=y
+CONFIG_DM_ETH_PHY=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_GMAC_ROCKCHIP=y
CONFIG_PHY_ROCKCHIP_INNO_USB2=y
@@ -91,6 +96,8 @@ CONFIG_PWM_ROCKCHIP=y
CONFIG_RAM=y
CONFIG_SPL_RAM=y
CONFIG_TPL_RAM=y
+CONFIG_DM_RNG=y
+CONFIG_RNG_ROCKCHIP=y
CONFIG_BAUDRATE=150
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550_MEM32=y
diff --git a/configs/nanopi-r2c-rk3328_defconfig
b/configs/nanopi-r2c-rk3328_defconfig
index 583179d7c548..59801328deda 100644
--- a/configs/nanopi-r2c-rk3328_defconfig
+++ b/configs/nanopi-r2c-rk3328_defconfig
@@ -15,7 +15,6 @@ CONFIG_ROCKCHIP_RK3328=y
CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
CONFIG_TPL_LIBCOMMON_SUPPORT=y
CONFIG_TPL_LIBGENERIC_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x60
CONFIG_SPL_STACK=0x40
CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
@@ -26,7 +25,9 @@ CONFIG_DEBUG_UART=y
# CONFIG_ANDROID_BOOT_IMAGE is not set
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_FIT_SIGNATURE=y
CONFIG_SPL_LOAD_FIT=y
+CONFIG_LEGACY_IMAGE_FORMAT=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-nanopi-r2c.dtb"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
@@ -57,8 +58,8 @@ CONFIG_TPL_OF_PLATDATA=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_DEV=1
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_TPL_DM=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_REGMAP=y
[PATCH 03/15] rockchip: rk3328-rock64: Update defconfig
Update defconfig for rk3328-rock64 with new defaults. Remove the SPL_DRIVERS_MISC=y option, no misc driver is used in SPL. Add CONFIG_SPL_FIT_SIGNATURE=y to let SPL verify an auto generated hash of FIT images. This help indicate if there is an issue loading any of the images to DRAM or SRAM. Also add LEGACY_IMAGE_FORMAT=y to keep support for scripts. Remove the NET_RANDOM_ETHADDR=y option, ethaddr and eth1addr is set based on cpuid read from eFUSE. Add SPL_DM_SEQ_ALIAS=y option to use alias sequence number in SPL. Add DM_ETH_PHY=y and PHY_REALTEK=y to support onboard ethernet PHY. Also add missing device tree file to MAINTAINERS and add myself as a reviewer for this board. Signed-off-by: Jonas Karlman --- board/rockchip/evb_rk3328/MAINTAINERS | 2 ++ configs/rock64-rk3328_defconfig | 7 +-- 2 files changed, 7 insertions(+), 2 deletions(-) diff --git a/board/rockchip/evb_rk3328/MAINTAINERS b/board/rockchip/evb_rk3328/MAINTAINERS index dc750bd69426..419bc8ded375 100644 --- a/board/rockchip/evb_rk3328/MAINTAINERS +++ b/board/rockchip/evb_rk3328/MAINTAINERS @@ -47,8 +47,10 @@ F: arch/arm/dts/rk3328-roc-cc-u-boot.dtsi ROCK64-RK3328 M: Matwey V. Kornilov +R: Jonas Karlman S: Maintained F: configs/rock64-rk3328_defconfig +F: arch/arm/dts/rk3328-rock64.dts F: arch/arm/dts/rk3328-rock64-u-boot.dtsi ROCKPIE-RK3328 diff --git a/configs/rock64-rk3328_defconfig b/configs/rock64-rk3328_defconfig index 0297d098761e..0157a1efe374 100644 --- a/configs/rock64-rk3328_defconfig +++ b/configs/rock64-rk3328_defconfig @@ -15,7 +15,6 @@ CONFIG_ROCKCHIP_RK3328=y CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y -CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK_R_ADDR=0x60 CONFIG_SPL_STACK=0x40 CONFIG_TPL_SYS_MALLOC_F_LEN=0x800 @@ -26,7 +25,9 @@ CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_FIT=y CONFIG_FIT_VERBOSE=y +CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y +CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-rock64.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y @@ -57,8 +58,8 @@ CONFIG_TPL_OF_PLATDATA=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=1 -CONFIG_NET_RANDOM_ETHADDR=y CONFIG_TPL_DM=y +CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_REGMAP=y CONFIG_SPL_REGMAP=y CONFIG_TPL_REGMAP=y @@ -76,6 +77,8 @@ CONFIG_ROCKCHIP_EFUSE=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y CONFIG_SPI_FLASH_GIGADEVICE=y +CONFIG_PHY_REALTEK=y +CONFIG_DM_ETH_PHY=y CONFIG_ETH_DESIGNWARE=y CONFIG_GMAC_ROCKCHIP=y CONFIG_PHY_ROCKCHIP_INNO_USB2=y -- 2.43.0
[PATCH 07/15] rockchip: rk3328-orangepi-r1-plus: Update defconfig
Update defconfig for rk3328-orangepi-r1-plus boards with new defaults.
Remove the SPL_DRIVERS_MISC=y option, no misc driver is used in SPL.
Add CONFIG_SPL_FIT_SIGNATURE=y to let SPL verify an auto generated hash
of FIT images. This help indicate if there is an issue loading any of
the images to DRAM or SRAM. Also add LEGACY_IMAGE_FORMAT=y to keep
support for scripts.
Add ROCKCHIP_EFUSE=y and remove NET_RANDOM_ETHADDR=y, ethaddr and
eth1addr is set based on cpuid read from eFUSE.
Add SPL_DM_SEQ_ALIAS=y option to use alias sequence number in SPL.
Add DM_ETH_PHY=y, PHY_MOTORCOMM=y, PHY_REALTEK=y and remove to
support reset of onboard ethernet PHYs.
Add PHY_ROCKCHIP_INNO_USB2=y option to support the onboard USB PHY.
Add RNG_ROCKCHIP=y and DM_RNG=y options to support the onboard random
generator.
Also add missing device tree files to MAINTAINERS file.
Signed-off-by: Jonas Karlman
---
arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi | 6 --
arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi | 6 --
board/rockchip/evb_rk3328/MAINTAINERS| 2 ++
configs/orangepi-r1-plus-lts-rk3328_defconfig| 12 ++--
configs/orangepi-r1-plus-rk3328_defconfig| 12 ++--
doc/board/rockchip/rockchip.rst | 2 ++
6 files changed, 24 insertions(+), 16 deletions(-)
diff --git a/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi
b/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi
index 5aaa5ccb15c1..8a4189c6f1cc 100644
--- a/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi
@@ -28,12 +28,6 @@
bootph-pre-ram;
};
- {
- snps,reset-gpio = < RK_PC2 GPIO_ACTIVE_LOW>;
- snps,reset-active-low;
- snps,reset-delays-us = <0 1 5>;
-};
-
{
spi_flash: spiflash@0 {
bootph-all;
diff --git a/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi
b/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi
index 6d3db86dce6a..2e3b6a77a268 100644
--- a/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi
@@ -28,12 +28,6 @@
bootph-pre-ram;
};
- {
- snps,reset-gpio = < RK_PC2 GPIO_ACTIVE_LOW>;
- snps,reset-active-low;
- snps,reset-delays-us = <0 1 5>;
-};
-
{
spi_flash: spiflash@0 {
bootph-all;
diff --git a/board/rockchip/evb_rk3328/MAINTAINERS
b/board/rockchip/evb_rk3328/MAINTAINERS
index b88727acad26..675b72dd060c 100644
--- a/board/rockchip/evb_rk3328/MAINTAINERS
+++ b/board/rockchip/evb_rk3328/MAINTAINERS
@@ -32,12 +32,14 @@ ORANGEPI-R1-PLUS-RK3328
M: Tianling Shen
S: Maintained
F: configs/orangepi-r1-plus-rk3328_defconfig
+F: arch/arm/dts/rk3328-orangepi-r1-plus.dts
F: arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi
ORANGEPI-R1-PLUS-LTS-RK3328
M: Tianling Shen
S: Maintained
F: configs/orangepi-r1-plus-lts-rk3328_defconfig
+F: arch/arm/dts/rk3328-orangepi-r1-plus-lts.dts
F: arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi
ROC-RK3328-CC
diff --git a/configs/orangepi-r1-plus-lts-rk3328_defconfig
b/configs/orangepi-r1-plus-lts-rk3328_defconfig
index d3d9417509e9..937ef003d85b 100644
--- a/configs/orangepi-r1-plus-lts-rk3328_defconfig
+++ b/configs/orangepi-r1-plus-lts-rk3328_defconfig
@@ -15,7 +15,6 @@ CONFIG_ROCKCHIP_RK3328=y
CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
CONFIG_TPL_LIBCOMMON_SUPPORT=y
CONFIG_TPL_LIBGENERIC_SUPPORT=y
-CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL_STACK_R_ADDR=0x60
CONFIG_SPL_STACK=0x40
CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
@@ -26,7 +25,9 @@ CONFIG_DEBUG_UART=y
# CONFIG_ANDROID_BOOT_IMAGE is not set
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_FIT_SIGNATURE=y
CONFIG_SPL_LOAD_FIT=y
+CONFIG_LEGACY_IMAGE_FORMAT=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-orangepi-r1-plus-lts.dtb"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
@@ -57,8 +58,8 @@ CONFIG_TPL_OF_PLATDATA=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_DEV=1
-CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_TPL_DM=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_REGMAP=y
CONFIG_SPL_REGMAP=y
CONFIG_TPL_REGMAP=y
@@ -72,11 +73,16 @@ CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
CONFIG_MISC=y
+CONFIG_ROCKCHIP_EFUSE=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_PHY_MOTORCOMM=y
+CONFIG_PHY_REALTEK=y
+CONFIG_DM_ETH_PHY=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
CONFIG_PINCTRL=y
CONFIG_SPL_PINCTRL=y
CONFIG_DM_PMIC=y
@@ -91,6 +97,8 @@ CONFIG_PWM_ROCKCHIP=y
CONFIG_RAM=y
CONFIG_SPL_RAM=y
CONFIG_TPL_RAM=y
+CONFIG_DM_RNG=y
+CONFIG_RNG_ROCKCHIP=y
CONFIG_BAUDRATE=150
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550_MEM32=y
diff --git a/configs/orangepi-r1-plus-rk3328_defconfig
b/configs/orangepi-r1-plus-rk3328_defconfig
index
[PATCH 14/15] rockchip: rk3328-rock64: Enable boot from SPI NOR flash
Add Kconfig options to enable support for booting from SPI NOR flash on Pine64 Rock64. The generated bootable u-boot-rockchip-spi.bin that can be written to 0x0 of SPI NOR flash. The FIT image is loaded from 0x6, same as on RK35xx boards. => sf probe SF: Detected gd25q128 with page size 256 Bytes, erase size 4 KiB, total 16 MiB => load mmc 1:1 1000 u-boot-rockchip-spi.bin 1359872 bytes read in 65 ms (20 MiB/s) => sf update $fileaddr 0 $filesize device 0 offset 0x0, size 0x14c000 1118208 bytes written, 241664 bytes skipped in 8.516s, speed 163516 B/s Signed-off-by: Jonas Karlman --- configs/rock64-rk3328_defconfig | 8 1 file changed, 8 insertions(+) diff --git a/configs/rock64-rk3328_defconfig b/configs/rock64-rk3328_defconfig index 0157a1efe374..01e447448513 100644 --- a/configs/rock64-rk3328_defconfig +++ b/configs/rock64-rk3328_defconfig @@ -13,6 +13,7 @@ CONFIG_DEFAULT_DEVICE_TREE="rk3328-rock64" CONFIG_DM_RESET=y CONFIG_ROCKCHIP_RK3328=y CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y +CONFIG_ROCKCHIP_SPI_IMAGE=y CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_STACK_R_ADDR=0x60 @@ -20,6 +21,8 @@ CONFIG_SPL_STACK=0x40 CONFIG_TPL_SYS_MALLOC_F_LEN=0x800 CONFIG_DEBUG_UART_BASE=0xFF13 CONFIG_DEBUG_UART_CLOCK=2400 +CONFIG_SPL_SPI_FLASH_SUPPORT=y +CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set @@ -42,6 +45,8 @@ CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_STACK_R=y CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y +CONFIG_SPL_SPI_LOAD=y +CONFIG_SYS_SPI_U_BOOT_OFFS=0x6 CONFIG_SPL_ATF=y CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y CONFIG_TPL_SYS_MALLOC_SIMPLE=y @@ -76,7 +81,10 @@ CONFIG_MISC=y CONFIG_ROCKCHIP_EFUSE=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_SPI_FLASH_SFDP_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_WINBOND=y CONFIG_PHY_REALTEK=y CONFIG_DM_ETH_PHY=y CONFIG_ETH_DESIGNWARE=y -- 2.43.0
[PATCH 12/15] Revert "rockchip: Allow booting from SPI"
This reverts commit 3523c07867b403d5b3b68812aebac8a5afa5be4c.
Booting from SPI was already allowed before this commit was first
introduced. A few lines further down the exact same code already existed
and still does.
Signed-off-by: Jonas Karlman
---
arch/arm/mach-rockchip/spl-boot-order.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/arch/arm/mach-rockchip/spl-boot-order.c
b/arch/arm/mach-rockchip/spl-boot-order.c
index 2c39a215c107..79c856d2a0ac 100644
--- a/arch/arm/mach-rockchip/spl-boot-order.c
+++ b/arch/arm/mach-rockchip/spl-boot-order.c
@@ -65,9 +65,6 @@ static int spl_node_to_boot_device(int node)
default:
return -ENOSYS;
}
- } else if (!uclass_get_device_by_of_offset(UCLASS_SPI_FLASH, node,
- )) {
- return BOOT_DEVICE_SPI;
}
/*
--
2.43.0
[PATCH 15/15] rockchip: rk3328-orangepi-r1-plus: Enable boot from SPI NOR flash
Add Kconfig options to enable support for booting from SPI NOR flash on Orange Pi R1 Plus boards. The generated bootable u-boot-rockchip-spi.bin that can be written to 0x0 of SPI NOR flash. The FIT image is loaded from 0x6, same as on RK35xx boards. Signed-off-by: Jonas Karlman --- configs/orangepi-r1-plus-lts-rk3328_defconfig | 8 configs/orangepi-r1-plus-rk3328_defconfig | 8 2 files changed, 16 insertions(+) diff --git a/configs/orangepi-r1-plus-lts-rk3328_defconfig b/configs/orangepi-r1-plus-lts-rk3328_defconfig index 937ef003d85b..968110c8cd6f 100644 --- a/configs/orangepi-r1-plus-lts-rk3328_defconfig +++ b/configs/orangepi-r1-plus-lts-rk3328_defconfig @@ -13,6 +13,7 @@ CONFIG_DEFAULT_DEVICE_TREE="rk3328-orangepi-r1-plus-lts" CONFIG_DM_RESET=y CONFIG_ROCKCHIP_RK3328=y CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y +CONFIG_ROCKCHIP_SPI_IMAGE=y CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_STACK_R_ADDR=0x60 @@ -20,6 +21,8 @@ CONFIG_SPL_STACK=0x40 CONFIG_TPL_SYS_MALLOC_F_LEN=0x800 CONFIG_DEBUG_UART_BASE=0xFF13 CONFIG_DEBUG_UART_CLOCK=2400 +CONFIG_SPL_SPI_FLASH_SUPPORT=y +CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set @@ -42,6 +45,8 @@ CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_STACK_R=y CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y +CONFIG_SPL_SPI_LOAD=y +CONFIG_SYS_SPI_U_BOOT_OFFS=0x6 CONFIG_SPL_ATF=y CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y CONFIG_TPL_SYS_MALLOC_SIMPLE=y @@ -76,7 +81,10 @@ CONFIG_MISC=y CONFIG_ROCKCHIP_EFUSE=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_SPI_FLASH_SFDP_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_WINBOND=y CONFIG_PHY_MOTORCOMM=y CONFIG_PHY_REALTEK=y CONFIG_DM_ETH_PHY=y diff --git a/configs/orangepi-r1-plus-rk3328_defconfig b/configs/orangepi-r1-plus-rk3328_defconfig index 563a1ac6ecd4..7038f09f202c 100644 --- a/configs/orangepi-r1-plus-rk3328_defconfig +++ b/configs/orangepi-r1-plus-rk3328_defconfig @@ -13,6 +13,7 @@ CONFIG_DEFAULT_DEVICE_TREE="rk3328-orangepi-r1-plus" CONFIG_DM_RESET=y CONFIG_ROCKCHIP_RK3328=y CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y +CONFIG_ROCKCHIP_SPI_IMAGE=y CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_STACK_R_ADDR=0x60 @@ -20,6 +21,8 @@ CONFIG_SPL_STACK=0x40 CONFIG_TPL_SYS_MALLOC_F_LEN=0x800 CONFIG_DEBUG_UART_BASE=0xFF13 CONFIG_DEBUG_UART_CLOCK=2400 +CONFIG_SPL_SPI_FLASH_SUPPORT=y +CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set @@ -42,6 +45,8 @@ CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_STACK_R=y CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y +CONFIG_SPL_SPI_LOAD=y +CONFIG_SYS_SPI_U_BOOT_OFFS=0x6 CONFIG_SPL_ATF=y CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y CONFIG_TPL_SYS_MALLOC_SIMPLE=y @@ -76,7 +81,10 @@ CONFIG_MISC=y CONFIG_ROCKCHIP_EFUSE=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_SPI_FLASH_SFDP_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_WINBOND=y CONFIG_PHY_MOTORCOMM=y CONFIG_PHY_REALTEK=y CONFIG_DM_ETH_PHY=y -- 2.43.0
[PATCH 13/15] rockchip: rk3328: Add support to build bootable SPI image
Similar to RK35xx the BootRom in RK3328 can read all data and look for
idbloader at 0x8000, same as on SD and eMMC.
Use the rksd format and modify the mkimage offset to generate a bootable
u-boot-rockchip-spi.bin that can be written to 0x0 of SPI NOR flash.
Signed-off-by: Jonas Karlman
---
arch/arm/dts/rk3328-u-boot.dtsi| 11 +++
arch/arm/mach-rockchip/rk3328/rk3328.c | 1 +
2 files changed, 12 insertions(+)
diff --git a/arch/arm/dts/rk3328-u-boot.dtsi b/arch/arm/dts/rk3328-u-boot.dtsi
index b90d78878d77..2a5dca97dd4b 100644
--- a/arch/arm/dts/rk3328-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-u-boot.dtsi
@@ -120,3 +120,14 @@
_otg {
hnp-srp-disable;
};
+
+#ifdef CONFIG_ROCKCHIP_SPI_IMAGE
+ {
+ simple-bin-spi {
+ mkimage {
+ args = "-n", CONFIG_SYS_SOC, "-T", "rksd";
+ offset = <0x8000>;
+ };
+ };
+};
+#endif
diff --git a/arch/arm/mach-rockchip/rk3328/rk3328.c
b/arch/arm/mach-rockchip/rk3328/rk3328.c
index b591d38fe412..b82b209de9e2 100644
--- a/arch/arm/mach-rockchip/rk3328/rk3328.c
+++ b/arch/arm/mach-rockchip/rk3328/rk3328.c
@@ -36,6 +36,7 @@
const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
[BROM_BOOTSOURCE_EMMC] = "/mmc@ff52",
+ [BROM_BOOTSOURCE_SPINOR] = "/spi@ff19/flash@0",
[BROM_BOOTSOURCE_SD] = "/mmc@ff50",
};
--
2.43.0
[PATCH 04/15] rockchip: rk3328-roc-cc: Update defconfig
Update defconfig for rk3328-roc-cc with new defaults. Remove the SPL_DRIVERS_MISC=y option, no misc driver is used in SPL. Add CONFIG_SPL_FIT_SIGNATURE=y to let SPL verify an auto generated hash of FIT images. This help indicate if there is an issue loading any of the images to DRAM or SRAM. Also add LEGACY_IMAGE_FORMAT=y to keep support for scripts. Add ROCKCHIP_EFUSE=y and remove NET_RANDOM_ETHADDR=y, ethaddr and eth1addr is set based on cpuid read from eFUSE. Add SPL_DM_SEQ_ALIAS=y option to use alias sequence number in SPL. Add DM_ETH_PHY=y, PHY_MOTORCOMM=y and PHY_REALTEK=y to support common ethernet PHYs. Add RNG_ROCKCHIP=y and DM_RNG=y options to support the onboard random generator. Also add missing device tree file to MAINTAINERS and add myself as a reviewer for this board. Signed-off-by: Jonas Karlman --- board/rockchip/evb_rk3328/MAINTAINERS | 2 ++ configs/roc-cc-rk3328_defconfig | 9 +++-- doc/board/rockchip/rockchip.rst | 2 +- 3 files changed, 10 insertions(+), 3 deletions(-) diff --git a/board/rockchip/evb_rk3328/MAINTAINERS b/board/rockchip/evb_rk3328/MAINTAINERS index 419bc8ded375..09488eaf083f 100644 --- a/board/rockchip/evb_rk3328/MAINTAINERS +++ b/board/rockchip/evb_rk3328/MAINTAINERS @@ -41,8 +41,10 @@ F: arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi ROC-RK3328-CC M: Loic Devulder M: Chen-Yu Tsai +R: Jonas Karlman S: Maintained F: configs/roc-cc-rk3328_defconfig +F: arch/arm/dts/rk3328-roc-cc.dts F: arch/arm/dts/rk3328-roc-cc-u-boot.dtsi ROCK64-RK3328 diff --git a/configs/roc-cc-rk3328_defconfig b/configs/roc-cc-rk3328_defconfig index 4ac3c9403b02..7d81a715ef25 100644 --- a/configs/roc-cc-rk3328_defconfig +++ b/configs/roc-cc-rk3328_defconfig @@ -15,7 +15,6 @@ CONFIG_ROCKCHIP_RK3328=y CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y -CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK_R_ADDR=0x60 CONFIG_SPL_STACK=0x40 CONFIG_TPL_SYS_MALLOC_F_LEN=0x800 @@ -26,7 +25,9 @@ CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_FIT=y CONFIG_FIT_VERBOSE=y +CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y +CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-roc-cc.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y @@ -58,8 +59,8 @@ CONFIG_TPL_OF_PLATDATA=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=1 -CONFIG_NET_RANDOM_ETHADDR=y CONFIG_TPL_DM=y +CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_REGMAP=y CONFIG_SPL_REGMAP=y CONFIG_TPL_REGMAP=y @@ -73,9 +74,11 @@ CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_MISC=y +CONFIG_ROCKCHIP_EFUSE=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y CONFIG_PHY_REALTEK=y +CONFIG_DM_ETH_PHY=y CONFIG_PHY_GIGE=y CONFIG_ETH_DESIGNWARE=y CONFIG_GMAC_ROCKCHIP=y @@ -95,6 +98,8 @@ CONFIG_PWM_ROCKCHIP=y CONFIG_RAM=y CONFIG_SPL_RAM=y CONFIG_TPL_RAM=y +CONFIG_DM_RNG=y +CONFIG_RNG_ROCKCHIP=y CONFIG_BAUDRATE=150 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550_MEM32=y diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst index de2195deadca..99f48b6d6fa5 100644 --- a/doc/board/rockchip/rockchip.rst +++ b/doc/board/rockchip/rockchip.rst @@ -60,8 +60,8 @@ List of mainline supported Rockchip boards: - ODROID-GO Advance (odroid-go2) * rk3328 - Rockchip Evb-RK3328 (evb-rk3328) + - Firefly ROC-RK3328-CC (roc-cc-rk3328) - Pine64 Rock64 (rock64-rk3328) - - Firefly-RK3328 (roc-cc-rk3328) - Radxa Rockpi E (rock-pi-e-rk3328) * rk3368 - GeekBox (geekbox) -- 2.43.0
[PATCH 05/15] rockchip: rk3328-rock-pi-e: Update defconfig
Update defconfig for rk3328-rock-pi-e with new defaults. Remove the xPL_DRIVERS_MISC=y option, no misc driver is used in xPL. Add CONFIG_SPL_FIT_SIGNATURE=y to let SPL verify an auto generated hash of FIT images. This help indicate if there is an issue loading any of the images to DRAM or SRAM. Also add LEGACY_IMAGE_FORMAT=y to keep support for scripts. Add ROCKCHIP_EFUSE=y and remove NET_RANDOM_ETHADDR=y, ethaddr and eth1addr is set based on cpuid read from eFUSE. Add SPL_DM_SEQ_ALIAS=y option to use alias sequence number in SPL. Add RNG_ROCKCHIP=y and DM_RNG=y options to support the onboard random generator. Also add myself as a reviewer for this board. Signed-off-by: Jonas Karlman --- board/rockchip/evb_rk3328/MAINTAINERS | 1 + configs/rock-pi-e-rk3328_defconfig| 10 ++ doc/board/rockchip/rockchip.rst | 2 +- 3 files changed, 8 insertions(+), 5 deletions(-) diff --git a/board/rockchip/evb_rk3328/MAINTAINERS b/board/rockchip/evb_rk3328/MAINTAINERS index 09488eaf083f..47fd05d2ea8b 100644 --- a/board/rockchip/evb_rk3328/MAINTAINERS +++ b/board/rockchip/evb_rk3328/MAINTAINERS @@ -57,6 +57,7 @@ F: arch/arm/dts/rk3328-rock64-u-boot.dtsi ROCKPIE-RK3328 M: Banglang Huang +R: Jonas Karlman S: Maintained F: configs/rock-pi-e-rk3328_defconfig F: arch/arm/dts/rk3328-rock-pi-e.dts diff --git a/configs/rock-pi-e-rk3328_defconfig b/configs/rock-pi-e-rk3328_defconfig index 6dda900a9b42..ddd482dd0195 100644 --- a/configs/rock-pi-e-rk3328_defconfig +++ b/configs/rock-pi-e-rk3328_defconfig @@ -15,7 +15,6 @@ CONFIG_ROCKCHIP_RK3328=y CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y -CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK_R_ADDR=0x400 CONFIG_SPL_STACK=0x40 CONFIG_TPL_SYS_MALLOC_F_LEN=0x800 @@ -27,7 +26,9 @@ CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_FIT=y CONFIG_FIT_VERBOSE=y +CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y +CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-rock-pi-e.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y @@ -46,7 +47,6 @@ CONFIG_SPL_POWER=y CONFIG_SPL_ATF=y CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y CONFIG_TPL_SYS_MALLOC_SIMPLE=y -CONFIG_TPL_DRIVERS_MISC=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y @@ -59,8 +59,8 @@ CONFIG_TPL_OF_PLATDATA=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=1 -CONFIG_NET_RANDOM_ETHADDR=y CONFIG_TPL_DM=y +CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_REGMAP=y CONFIG_SPL_REGMAP=y CONFIG_TPL_REGMAP=y @@ -74,6 +74,7 @@ CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_MISC=y +CONFIG_ROCKCHIP_EFUSE=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y CONFIG_PHY_REALTEK=y @@ -95,9 +96,10 @@ CONFIG_PWM_ROCKCHIP=y CONFIG_RAM=y CONFIG_SPL_RAM=y CONFIG_TPL_RAM=y +CONFIG_DM_RNG=y +CONFIG_RNG_ROCKCHIP=y CONFIG_BAUDRATE=150 CONFIG_DEBUG_UART_SHIFT=2 -CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_SYS_NS16550_MEM32=y CONFIG_SYSINFO=y CONFIG_SYSINFO_SMBIOS=y diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst index 99f48b6d6fa5..b71fa375b2bf 100644 --- a/doc/board/rockchip/rockchip.rst +++ b/doc/board/rockchip/rockchip.rst @@ -62,7 +62,7 @@ List of mainline supported Rockchip boards: - Rockchip Evb-RK3328 (evb-rk3328) - Firefly ROC-RK3328-CC (roc-cc-rk3328) - Pine64 Rock64 (rock64-rk3328) - - Radxa Rockpi E (rock-pi-e-rk3328) + - Radxa ROCK Pi E (rock-pi-e-rk3328) * rk3368 - GeekBox (geekbox) - PX5 EVB (evb-px5) -- 2.43.0
[PATCH 01/15] rockchip: rk3328: Update default u-boot, spl-boot-order prop
Change to use a common FIT load order, same-as-spl > SD-card > eMMC on
RK3328 boards. Only EVB and Radxa ROCK Pi E is affected by this change.
Signed-off-by: Jonas Karlman
---
arch/arm/dts/rk3328-nanopi-r2c-plus-u-boot.dtsi | 6 --
arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi | 5 -
arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi | 5 -
arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi | 5 -
arch/arm/dts/rk3328-roc-cc-u-boot.dtsi | 5 +
arch/arm/dts/rk3328-rock64-u-boot.dtsi | 5 +
arch/arm/dts/rk3328-u-boot.dtsi | 2 +-
7 files changed, 3 insertions(+), 30 deletions(-)
diff --git a/arch/arm/dts/rk3328-nanopi-r2c-plus-u-boot.dtsi
b/arch/arm/dts/rk3328-nanopi-r2c-plus-u-boot.dtsi
index f8adb9e5e1ff..1dc3c022c504 100644
--- a/arch/arm/dts/rk3328-nanopi-r2c-plus-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-nanopi-r2c-plus-u-boot.dtsi
@@ -1,9 +1,3 @@
// SPDX-License-Identifier: GPL-2.0-or-later
#include "rk3328-nanopi-r2c-u-boot.dtsi"
-
-/ {
- chosen {
- u-boot,spl-boot-order = "same-as-spl", ,
- };
-};
diff --git a/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi
b/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi
index 78d37ab47558..d969b008775e 100644
--- a/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi
@@ -6,11 +6,6 @@
#include "rk3328-u-boot.dtsi"
#include "rk3328-sdram-ddr4-666.dtsi"
-/ {
- chosen {
- u-boot,spl-boot-order = "same-as-spl", ,
- };
-};
{
bootph-pre-ram;
diff --git a/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi
b/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi
index ebe33e48cb9c..5aaa5ccb15c1 100644
--- a/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi
@@ -6,11 +6,6 @@
#include "rk3328-u-boot.dtsi"
#include "rk3328-sdram-lpddr3-666.dtsi"
-/ {
- chosen {
- u-boot,spl-boot-order = "same-as-spl", ,
- };
-};
{
bootph-pre-ram;
diff --git a/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi
b/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi
index 637c70adf194..6d3db86dce6a 100644
--- a/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi
@@ -6,11 +6,6 @@
#include "rk3328-u-boot.dtsi"
#include "rk3328-sdram-ddr4-666.dtsi"
-/ {
- chosen {
- u-boot,spl-boot-order = "same-as-spl", ,
- };
-};
{
bootph-pre-ram;
diff --git a/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi
b/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi
index 2062f34bf825..8bc2f134f8f4 100644
--- a/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi
@@ -5,11 +5,8 @@
#include "rk3328-u-boot.dtsi"
#include "rk3328-sdram-ddr4-666.dtsi"
-/ {
- chosen {
- u-boot,spl-boot-order = "same-as-spl", ,
- };
+/ {
smbios {
compatible = "u-boot,sysinfo-smbios";
diff --git a/arch/arm/dts/rk3328-rock64-u-boot.dtsi
b/arch/arm/dts/rk3328-rock64-u-boot.dtsi
index 6904515b9693..bfe506fd2249 100644
--- a/arch/arm/dts/rk3328-rock64-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-rock64-u-boot.dtsi
@@ -5,11 +5,8 @@
#include "rk3328-u-boot.dtsi"
#include "rk3328-sdram-lpddr3-1600.dtsi"
-/ {
- chosen {
- u-boot,spl-boot-order = "same-as-spl", ,
- };
+/ {
smbios {
compatible = "u-boot,sysinfo-smbios";
diff --git a/arch/arm/dts/rk3328-u-boot.dtsi b/arch/arm/dts/rk3328-u-boot.dtsi
index a9f2536de2a2..a12be7876db0 100644
--- a/arch/arm/dts/rk3328-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-u-boot.dtsi
@@ -13,7 +13,7 @@
};
chosen {
- u-boot,spl-boot-order = ,
+ u-boot,spl-boot-order = "same-as-spl", ,
};
dmc: dmc {
--
2.43.0
[PATCH 02/15] rockchip: rk3328-evb: Update defconfig
Update defconfig for rk3328-evb with new defaults. Remove the xPL_DRIVERS_MISC=y option, no misc driver is used in xPL. Add CONFIG_SPL_FIT_SIGNATURE=y to let SPL verify an auto generated hash of FIT images. This help indicate if there is an issue loading any of the images to DRAM or SRAM. Also add LEGACY_IMAGE_FORMAT=y to keep support for scripts. Add MISC_INIT_R=y, ROCKCHIP_EFUSE=y and remove NET_RANDOM_ETHADDR=y, ethaddr and eth1addr is set based on cpuid read from eFUSE. Remove pinctrl-0 and pinctrl-names from CONFIG_OF_SPL_REMOVE_PROPS, SPL need to configure pinctrl for e.g. SD-card. Add SPL_DM_SEQ_ALIAS=y option to use alias sequence number in SPL. Add DM_ETH_PHY=y, PHY_MOTORCOMM=y and PHY_REALTEK=y to support common ethernet PHYs. Add RNG_ROCKCHIP=y and DM_RNG=y options to support the onboard random generator. Also add missing device tree files to MAINTAINERS and remove the obsolete README file. Signed-off-by: Jonas Karlman --- board/rockchip/evb_rk3328/MAINTAINERS | 2 + board/rockchip/evb_rk3328/README | 70 --- configs/evb-rk3328_defconfig | 16 -- 3 files changed, 13 insertions(+), 75 deletions(-) delete mode 100644 board/rockchip/evb_rk3328/README diff --git a/board/rockchip/evb_rk3328/MAINTAINERS b/board/rockchip/evb_rk3328/MAINTAINERS index 5fc114a63f6c..dc750bd69426 100644 --- a/board/rockchip/evb_rk3328/MAINTAINERS +++ b/board/rockchip/evb_rk3328/MAINTAINERS @@ -4,6 +4,8 @@ S: Maintained F: board/rockchip/evb_rk3328 F: include/configs/evb_rk3328.h F: configs/evb-rk3328_defconfig +F: arch/arm/dts/rk3328-evb.dts +F: arch/arm/dts/rk3328-evb-u-boot.dtsi NANOPI-R2C-RK3328 M: Tianling Shen diff --git a/board/rockchip/evb_rk3328/README b/board/rockchip/evb_rk3328/README deleted file mode 100644 index 6cbb66a4cf87.. --- a/board/rockchip/evb_rk3328/README +++ /dev/null @@ -1,70 +0,0 @@ -Introduction - - -RK3328 key features we might use in U-Boot: -* CPU: ARMv8 64bit quad-core Cortex-A53 -* IRAM: 36KB -* DRAM: 4GB-16MB dual-channel -* eMMC: support eMMC 5.0/5.1, suport HS400, HS200, DDR50 -* SD/MMC: support SD 3.0, MMC 4.51 -* USB: USB2.0 EHCI host port *2 -* Display: RGB/HDMI/DP/MIPI/EDP - -evb key features: -* regulator: pwm regulator for CPU B/L -* PMIC: rk808 -* debug console: UART2 - -In order to support Arm Trust Firmware(ATF), we need to use the -miniloader from rockchip which: -* do DRAM init -* load and verify ATF image -* load and verify U-Boot image - -Here is the step-by-step to boot to U-Boot on rk3328. - -Get the Source and prebuild binary -== - - > mkdir ~/evb_rk3328 - > cd ~/evb_rk3328 - > git clone https://github.com/ARM-software/arm-trusted-firmware.git - > git clone https://github.com/rockchip-linux/rkbin - > git clone https://github.com/rockchip-linux/rkflashtool - -Compile ATF -=== - - > cd arm-trusted-firmware - > make realclean - > make CROSS_COMPILE=aarch64-linux-gnu- PLAT=rk3328 bl31 - -Compile U-Boot -== - - > cd ../u-boot - > make CROSS_COMPILE=aarch64-linux-gnu- evb-rk3328_defconfig all - -Compile rkflashtool -=== - - > cd ../rkflashtool - > make - -Package image for miniloader - - > cd .. - > cp arm-trusted-firmware/build/rk3328/release/bl31.bin rkbin/rk33 - > ./rkbin/tools/trust_merger rkbin/tools/RK3328TRUST.ini - > ./rkbin/tools/loaderimage --pack --uboot u-boot/u-boot-dtb.bin uboot.img - > mkdir image - > mv trust.img ./image/ - > mv uboot.img ./image/rk3328evb-uboot.bin - -Flash image -=== -Power on(or reset with RESET KEY) with MASKROM KEY preesed, and then: - - > ./rkflashtool/rkflashloader rk3328evb - -You should be able to get U-Boot log message in console/UART2 now. diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig index b9c541a92a1f..995bfd0558b1 100644 --- a/configs/evb-rk3328_defconfig +++ b/configs/evb-rk3328_defconfig @@ -13,7 +13,6 @@ CONFIG_ROCKCHIP_RK3328=y CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y -CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK_R_ADDR=0x400 CONFIG_SPL_STACK=0x40 CONFIG_TPL_SYS_MALLOC_F_LEN=0x800 @@ -25,10 +24,13 @@ CONFIG_DEBUG_UART=y # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_FIT=y CONFIG_FIT_VERBOSE=y +CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y +CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-evb.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x4 CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_HAS_BSS_LINKER_SECTION=y @@ -41,7 +43,6 @@ CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x1 CONFIG_SPL_ATF=y CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y CONFIG_TPL_SYS_MALLOC_SIMPLE=y -CONFIG_TPL_DRIVERS_MISC=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y @@ -50,13 +51,13 @@ CONFIG_CMD_USB=y
[PATCH 00/15] rockchip: rk3328: Update defconfigs, DTs and enable boot from SPI
This series contains miscellaneous updates to defconfigs, syncs latest device trees from linux, fixes an issue loading FIT from SD-card when running SPL from eMMC and enables building a bootable SPI image on RK3328 boards. I am also adding myself as a reviewer for the three RK3328 boards I own. Patch 1-7 updates boards to enable similar Kconfig options and use a common order for from where to try and load FIT. Patch 8 fix loading FIT from SD-card when booting from eMMC by using pinctrl for emmc and sdmmc in SPL. Patch 9-10 makes rockchip gpio and rng driver compatible with linux. Patch 11 sync latest rk3328 device tree files from linux v6.8-rc1. Patch 12 reverts an old commit that added duplicated code. Patch 13-15 enables building u-boot-rockchip-spi.bin for boards with SPI flash. This series depends on the "rockchip: Fix ethernet on Radxa ROCK Pi E v1.21" series at [1]. [1] https://patchwork.ozlabs.org/cover/1887729/ Jonas Karlman (15): rockchip: rk3328: Update default u-boot,spl-boot-order prop rockchip: rk3328-evb: Update defconfig rockchip: rk3328-rock64: Update defconfig rockchip: rk3328-roc-cc: Update defconfig rockchip: rk3328-rock-pi-e: Update defconfig rockchip: rk3328-nanopi-r2: Update defconfig rockchip: rk3328-orangepi-r1-plus: Update defconfig rockchip: rk3328: Fix loading FIT from SD-card when booting from eMMC gpio: rockchip: Use gpio alias id as gpio bank id rng: rockchip: Use same compatible as linux rockchip: rk3328: Sync device tree from linux v6.8-rc1 Revert "rockchip: Allow booting from SPI" rockchip: rk3328: Add support to build bootable SPI image rockchip: rk3328-rock64: Enable boot from SPI NOR flash rockchip: rk3328-orangepi-r1-plus: Enable boot from SPI NOR flash arch/arm/dts/rk3328-evb-u-boot.dtsi | 4 + arch/arm/dts/rk3328-evb.dts | 1 + .../dts/rk3328-nanopi-r2c-plus-u-boot.dtsi| 6 -- arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi| 28 -- arch/arm/dts/rk3328-nanopi-r2s.dts| 3 +- .../rk3328-orangepi-r1-plus-lts-u-boot.dtsi | 36 ++- arch/arm/dts/rk3328-orangepi-r1-plus-lts.dts | 4 +- .../dts/rk3328-orangepi-r1-plus-u-boot.dtsi | 36 ++- arch/arm/dts/rk3328-orangepi-r1-plus.dts | 1 + arch/arm/dts/rk3328-roc-cc-u-boot.dtsi| 22 + arch/arm/dts/rk3328-roc-cc.dts| 3 +- arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi | 17 arch/arm/dts/rk3328-rock-pi-e.dts | 55 +++ arch/arm/dts/rk3328-rock64-u-boot.dtsi| 30 ++ arch/arm/dts/rk3328-rock64.dts| 1 + arch/arm/dts/rk3328-u-boot.dtsi | 99 +++ arch/arm/dts/rk3328.dtsi | 64 +--- arch/arm/dts/rk3399-u-boot.dtsi | 2 +- arch/arm/mach-rockchip/rk3328/rk3328.c| 1 + arch/arm/mach-rockchip/spl-boot-order.c | 3 - board/rockchip/evb_rk3328/MAINTAINERS | 11 +++ board/rockchip/evb_rk3328/README | 70 - configs/evb-rk3328_defconfig | 16 ++- configs/nanopi-r2c-plus-rk3328_defconfig | 11 ++- configs/nanopi-r2c-rk3328_defconfig | 11 ++- configs/nanopi-r2s-rk3328_defconfig | 11 ++- configs/orangepi-r1-plus-lts-rk3328_defconfig | 20 +++- configs/orangepi-r1-plus-rk3328_defconfig | 20 +++- configs/roc-cc-rk3328_defconfig | 9 +- configs/rock-pi-e-rk3328_defconfig| 10 +- configs/rock64-rk3328_defconfig | 15 ++- doc/board/rockchip/rockchip.rst | 9 +- drivers/gpio/rk_gpio.c| 7 +- drivers/rng/rockchip_rng.c| 10 +- 34 files changed, 351 insertions(+), 295 deletions(-) delete mode 100644 board/rockchip/evb_rk3328/README -- 2.43.0
[PATCH v1] cmd: hash: fix param count check
From: Igor Opaniuk
Add correct check for parameter count.
This fixes this issue when `hash` cmd is invoked without params:
=> hash
data abort
pc : [] lr : []
reloc pc : [<60019204>]lr : [<5afcffa8>]
sp : ba6dd9c8 ip : bf7391f0 fp : bf74ec14
r10: 0001 r9 : ba6dfea0 r8 : bf7ea030
r7 : r6 : ba6effa8 r5 : r4 :
r3 : bf7c257c r2 : 0001 r1 : r0 : bf7e6e34
Flags: nZCv IRQs off FIQs on Mode SVC_32
Code: e5934004 e1a0e003 e59f3050 e2444001 (e5f4c001)
Resetting CPU ...
resetting ...
Signed-off-by: Igor Opaniuk
---
cmd/hash.c | 19 ++-
1 file changed, 10 insertions(+), 9 deletions(-)
diff --git a/cmd/hash.c b/cmd/hash.c
index e163cd67742..5534a735fa7 100644
--- a/cmd/hash.c
+++ b/cmd/hash.c
@@ -14,15 +14,22 @@
#include
#include
+#if IS_ENABLED(CONFIG_HASH_VERIFY)
+#define HARGS 6
+#else
+#define HARGS 5
+#endif
+
static int do_hash(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[])
{
char *s;
int flags = HASH_FLAG_ENV;
-#ifdef CONFIG_HASH_VERIFY
- if (argc < 4)
+ if (argc < (HARGS - 1))
return CMD_RET_USAGE;
+
+#if IS_ENABLED(CONFIG_HASH_VERIFY)
if (!strcmp(argv[1], "-v")) {
flags |= HASH_FLAG_VERIFY;
argc--;
@@ -37,18 +44,12 @@ static int do_hash(struct cmd_tbl *cmdtp, int flag, int
argc,
return hash_command(*argv, flags, cmdtp, flag, argc - 1, argv + 1);
}
-#ifdef CONFIG_HASH_VERIFY
-#define HARGS 6
-#else
-#define HARGS 5
-#endif
-
U_BOOT_CMD(
hash, HARGS, 1, do_hash,
"compute hash message digest",
"algorithm address count [[*]hash_dest]\n"
"- compute message digest [save to env var / *address]"
-#ifdef CONFIG_HASH_VERIFY
+#if IS_ENABLED(CONFIG_HASH_VERIFY)
"\nhash -v algorithm address count [*]hash\n"
"- verify message digest of memory area to immediate value,
\n"
" env var or *address"
--
2.34.1
[PATCH v1 7/7] doc: android: avb: add slot_suffix param details
From: Igor Opaniuk Add info about slot_suffix param for avb verify. Signed-off-by: Igor Opaniuk --- doc/android/avb2.rst | 8 +--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/doc/android/avb2.rst b/doc/android/avb2.rst index a072119574f..c0b2bedb831 100644 --- a/doc/android/avb2.rst +++ b/doc/android/avb2.rst @@ -39,15 +39,17 @@ Provides CLI interface to invoke AVB 2.0 verification + misc. commands for different testing purposes:: avb init - initialize avb 2.0 for -avb verify - run verification process using hash data from vbmeta structure +avb verify [slot_suffix] - run verification process using hash data +from vbmeta structure. Provide [slot_suffix] if vbmeta partition +is slotted avb read_rb - read rollback index at location avb write_rb - write rollback index to avb is_unlocked - returns unlock status of the device avb get_uuid - read and print uuid of partition avb read_part - read bytes from -partition to buffer +partition to buffer avb write_part - write bytes to - by using data from + by using data from Partitions tampering (example) -- -- 2.34.1
[PATCH v1 6/7] cmd: avb: rework do_avb_verify_part
From: Igor Opaniuk
Use existing str_avb_slot_error() function for obtaining
verification fail reason details.
Take into account device lock state for setting correct
androidboot.verifiedbootstate kernel cmdline parameter.
Signed-off-by: Igor Opaniuk
---
cmd/avb.c | 50 +-
1 file changed, 17 insertions(+), 33 deletions(-)
diff --git a/cmd/avb.c b/cmd/avb.c
index ae0012c0e79..e5fc202121f 100644
--- a/cmd/avb.c
+++ b/cmd/avb.c
@@ -239,6 +239,7 @@ int do_avb_verify_part(struct cmd_tbl *cmdtp, int flag,
const char * const requested_partitions[] = {"boot", NULL};
AvbSlotVerifyResult slot_result;
AvbSlotVerifyData *out_data;
+ enum avb_boot_state boot_state;
char *cmdline;
char *extra_args;
char *slot_suffix = "";
@@ -273,18 +274,23 @@ int do_avb_verify_part(struct cmd_tbl *cmdtp, int flag,
AVB_HASHTREE_ERROR_MODE_RESTART_AND_INVALIDATE,
_data);
- switch (slot_result) {
- case AVB_SLOT_VERIFY_RESULT_OK:
- /* Until we don't have support of changing unlock states, we
-* assume that we are by default in locked state.
-* So in this case we can boot only when verification is
-* successful; we also supply in cmdline GREEN boot state
-*/
+ /*
+* LOCKED devices with custom root of trust setup is not supported
(YELLOW)
+*/
+ if (slot_result == AVB_SLOT_VERIFY_RESULT_OK) {
printf("Verification passed successfully\n");
- /* export additional bootargs to AVB_BOOTARGS env var */
+ /*
+* ORANGE state indicates that device may be freely modified.
+* Device integrity is left to the user to verify out-of-band.
+*/
+ if (unlocked)
+ boot_state = AVB_ORANGE;
+ else
+ boot_state = AVB_GREEN;
- extra_args = avb_set_state(avb_ops, AVB_GREEN);
+ /* export boot state to AVB_BOOTARGS env var */
+ extra_args = avb_set_state(avb_ops, boot_state);
if (extra_args)
cmdline = append_cmd_line(out_data->cmdline,
extra_args);
@@ -294,30 +300,8 @@ int do_avb_verify_part(struct cmd_tbl *cmdtp, int flag,
env_set(AVB_BOOTARGS, cmdline);
res = CMD_RET_SUCCESS;
- break;
- case AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION:
- printf("Verification failed\n");
- break;
- case AVB_SLOT_VERIFY_RESULT_ERROR_IO:
- printf("I/O error occurred during verification\n");
- break;
- case AVB_SLOT_VERIFY_RESULT_ERROR_OOM:
- printf("OOM error occurred during verification\n");
- break;
- case AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA:
- printf("Corrupted dm-verity metadata detected\n");
- break;
- case AVB_SLOT_VERIFY_RESULT_ERROR_UNSUPPORTED_VERSION:
- printf("Unsupported version of avbtool was used\n");
- break;
- case AVB_SLOT_VERIFY_RESULT_ERROR_ROLLBACK_INDEX:
- printf("Rollback index check failed\n");
- break;
- case AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED:
- printf("Public key was rejected\n");
- break;
- default:
- printf("Unknown error occurred\n");
+ } else {
+ printf("Verification failed, reason: %s\n",
str_avb_slot_error(slot_result));
}
if (out_data)
--
2.34.1
[PATCH v1 5/7] common: avb_verify: add str_avb_io_error/str_avb_slot_error
From: Igor Opaniuk
Introduce str_avb_io_error() and str_avb_slot_error() functions,
that provide a pointer to AVB runtime error message.
Signed-off-by: Igor Opaniuk
---
common/avb_verify.c | 49
include/avb_verify.h | 3 ++-
2 files changed, 51 insertions(+), 1 deletion(-)
diff --git a/common/avb_verify.c b/common/avb_verify.c
index ed58239cf8a..cff9117d92f 100644
--- a/common/avb_verify.c
+++ b/common/avb_verify.c
@@ -119,6 +119,55 @@ static const unsigned char avb_root_pub[1032] = {
0xd8, 0x7e,
};
+const char *str_avb_io_error(AvbIOResult res)
+{
+ switch (res) {
+ case AVB_IO_RESULT_OK:
+ return "Requested operation was successful";
+ case AVB_IO_RESULT_ERROR_IO:
+ return "Underlying hardware encountered an I/O error";
+ case AVB_IO_RESULT_ERROR_OOM:
+ return "Unable to allocate memory";
+ case AVB_IO_RESULT_ERROR_NO_SUCH_PARTITION:
+ return "Requested partition does not exist";
+ case AVB_IO_RESULT_ERROR_RANGE_OUTSIDE_PARTITION:
+ return "Bytes requested is outside the range of partition";
+ case AVB_IO_RESULT_ERROR_NO_SUCH_VALUE:
+ return "Named persistent value does not exist";
+ case AVB_IO_RESULT_ERROR_INVALID_VALUE_SIZE:
+ return "Named persistent value size is not supported";
+ case AVB_IO_RESULT_ERROR_INSUFFICIENT_SPACE:
+ return "Buffer is too small for the requested operation";
+ default:
+ return "Unknown AVB error";
+ }
+}
+
+const char *str_avb_slot_error(AvbSlotVerifyResult res)
+{
+ switch (res) {
+ case AVB_SLOT_VERIFY_RESULT_OK:
+ return "Verification passed successfully";
+ case AVB_SLOT_VERIFY_RESULT_ERROR_OOM:
+ return "Allocation of memory failed";
+ case AVB_SLOT_VERIFY_RESULT_ERROR_IO:
+ return "I/O error occurred while trying to load data";
+ case AVB_SLOT_VERIFY_RESULT_ERROR_VERIFICATION:
+ return "Digest didn't match or signature checks failed";
+ case AVB_SLOT_VERIFY_RESULT_ERROR_ROLLBACK_INDEX:
+ return "Rollback index is less than its stored value";
+ case AVB_SLOT_VERIFY_RESULT_ERROR_PUBLIC_KEY_REJECTED:
+ return "Public keys are not accepted";
+ case AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_METADATA:
+ return "Metadata is invalid or inconsistent";
+ case AVB_SLOT_VERIFY_RESULT_ERROR_UNSUPPORTED_VERSION:
+ return "Metadata requires a newer version of libavb";
+ case AVB_SLOT_VERIFY_RESULT_ERROR_INVALID_ARGUMENT:
+ return "Invalid arguments are used";
+ default:
+ return "Unknown AVB slot verification error";
+ }
+}
/**
*
* Boot states support (GREEN, YELLOW, ORANGE, RED) and dm_verity
diff --git a/include/avb_verify.h b/include/avb_verify.h
index 2fb850044d9..5d998b5a302 100644
--- a/include/avb_verify.h
+++ b/include/avb_verify.h
@@ -52,7 +52,8 @@ char *avb_set_enforce_verity(const char *cmdline);
char *avb_set_ignore_corruption(const char *cmdline);
char *append_cmd_line(char *cmdline_orig, char *cmdline_new);
-
+const char *str_avb_io_error(AvbIOResult res);
+const char *str_avb_slot_error(AvbSlotVerifyResult res);
/**
*
* I/O helper inline functions
--
2.34.1
[PATCH v1 4/7] cmd: avb: rework prints
From: Igor Opaniuk
Introduce AVB_OPS_CHECK macro for checking AvbOps before using
it to avoid code duplication.
Simplify and add more context for prints where it's needed.
Signed-off-by: Igor Opaniuk
---
cmd/avb.c | 156 --
1 file changed, 80 insertions(+), 76 deletions(-)
diff --git a/cmd/avb.c b/cmd/avb.c
index ce8b63873f2..ae0012c0e79 100644
--- a/cmd/avb.c
+++ b/cmd/avb.c
@@ -11,6 +11,14 @@
#include
#define AVB_BOOTARGS "avb_bootargs"
+
+#define AVB_OPS_CHECK(avb_ops) do { \
+ if (!(avb_ops)) { \
+ printf("AVB is not initialized, please run 'avb init '\n");
\
+ return CMD_RET_FAILURE; \
+ } \
+} while (false)
+
static struct AvbOps *avb_ops;
int do_avb_init(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
@@ -28,8 +36,10 @@ int do_avb_init(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[])
avb_ops = avb_ops_alloc(mmc_dev);
if (avb_ops)
return CMD_RET_SUCCESS;
+ else
+ printf("Can't allocate AvbOps");
- printf("Failed to initialize avb2\n");
+ printf("Failed to initialize AVB\n");
return CMD_RET_FAILURE;
}
@@ -41,11 +51,9 @@ int do_avb_read_part(struct cmd_tbl *cmdtp, int flag, int
argc,
s64 offset;
size_t bytes, bytes_read = 0;
void *buffer;
+ int ret;
- if (!avb_ops) {
- printf("AVB 2.0 is not initialized, please run 'avb init'\n");
- return CMD_RET_USAGE;
- }
+ AVB_OPS_CHECK(avb_ops);
if (argc != 5)
return CMD_RET_USAGE;
@@ -55,14 +63,15 @@ int do_avb_read_part(struct cmd_tbl *cmdtp, int flag, int
argc,
bytes = hextoul(argv[3], NULL);
buffer = (void *)hextoul(argv[4], NULL);
- if (avb_ops->read_from_partition(avb_ops, part, offset, bytes,
-buffer, _read) ==
-AVB_IO_RESULT_OK) {
+ ret = avb_ops->read_from_partition(avb_ops, part, offset,
+ bytes, buffer, _read);
+ if (ret == AVB_IO_RESULT_OK) {
printf("Read %zu bytes\n", bytes_read);
return CMD_RET_SUCCESS;
}
- printf("Failed to read from partition\n");
+ printf("Failed to read from partition '%s', err = %d\n",
+ part, ret);
return CMD_RET_FAILURE;
}
@@ -74,11 +83,9 @@ int do_avb_read_part_hex(struct cmd_tbl *cmdtp, int flag,
int argc,
s64 offset;
size_t bytes, bytes_read = 0;
char *buffer;
+ int ret;
- if (!avb_ops) {
- printf("AVB 2.0 is not initialized, please run 'avb init'\n");
- return CMD_RET_USAGE;
- }
+ AVB_OPS_CHECK(avb_ops);
if (argc != 4)
return CMD_RET_USAGE;
@@ -94,8 +101,9 @@ int do_avb_read_part_hex(struct cmd_tbl *cmdtp, int flag,
int argc,
}
memset(buffer, 0, bytes);
- if (avb_ops->read_from_partition(avb_ops, part, offset, bytes, buffer,
-_read) == AVB_IO_RESULT_OK) {
+ ret = avb_ops->read_from_partition(avb_ops, part, offset,
+ bytes, buffer, _read);
+ if (ret == AVB_IO_RESULT_OK) {
printf("Requested %zu, read %zu bytes\n", bytes, bytes_read);
printf("Data: ");
for (int i = 0; i < bytes_read; i++)
@@ -107,7 +115,8 @@ int do_avb_read_part_hex(struct cmd_tbl *cmdtp, int flag,
int argc,
return CMD_RET_SUCCESS;
}
- printf("Failed to read from partition\n");
+ printf("Failed to read from partition '%s', err = %d\n",
+ part, ret);
free(buffer);
return CMD_RET_FAILURE;
@@ -120,11 +129,9 @@ int do_avb_write_part(struct cmd_tbl *cmdtp, int flag, int
argc,
s64 offset;
size_t bytes;
void *buffer;
+ int ret;
- if (!avb_ops) {
- printf("AVB 2.0 is not initialized, run 'avb init' first\n");
- return CMD_RET_FAILURE;
- }
+ AVB_OPS_CHECK(avb_ops);
if (argc != 5)
return CMD_RET_USAGE;
@@ -134,13 +141,15 @@ int do_avb_write_part(struct cmd_tbl *cmdtp, int flag,
int argc,
bytes = hextoul(argv[3], NULL);
buffer = (void *)hextoul(argv[4], NULL);
- if (avb_ops->write_to_partition(avb_ops, part, offset, bytes, buffer) ==
- AVB_IO_RESULT_OK) {
+ ret = avb_ops->write_to_partition(avb_ops, part, offset,
+ bytes, buffer);
+ if (ret == AVB_IO_RESULT_OK) {
printf("Wrote %zu bytes\n", bytes);
return CMD_RET_SUCCESS;
}
- printf("Failed to write in partition\n");
+ printf("Failed to write in partition '%s', err = %d\n",
+ part,
[PATCH v1 3/7] common: avb_verify: rework error/debug prints
From: Igor Opaniuk
Make error prints more verbose with additional context.
Also s/print/debug/g for prints, which might be relevant only
for debugging purposes.
Signed-off-by: Igor Opaniuk
---
common/avb_verify.c | 31 ++-
1 file changed, 18 insertions(+), 13 deletions(-)
diff --git a/common/avb_verify.c b/common/avb_verify.c
index 938a5383b5d..ed58239cf8a 100644
--- a/common/avb_verify.c
+++ b/common/avb_verify.c
@@ -279,9 +279,9 @@ static unsigned long mmc_read_and_flush(struct mmc_part
*part,
* Reading fails on unaligned buffers, so we have to
* use aligned temporary buffer and then copy to destination
*/
-
if (unaligned) {
- printf("Handling unaligned read buffer..\n");
+ debug("%s: handling unaligned read buffer, addr = 0x%p\n",
+ __func__, buffer);
tmp_buf = get_sector_buf();
buf_size = get_sector_buf_size();
if (sectors > buf_size / part->info.blksz)
@@ -320,7 +320,8 @@ static unsigned long mmc_write(struct mmc_part *part,
lbaint_t start,
if (unaligned) {
tmp_buf = get_sector_buf();
buf_size = get_sector_buf_size();
- printf("Handling unaligned wrire buffer..\n");
+ debug("%s: handling unaligned read buffer, addr = 0x%p\n",
+ __func__, buffer);
if (sectors > buf_size / part->info.blksz)
sectors = buf_size / part->info.blksz;
@@ -348,30 +349,35 @@ static struct mmc_part *get_partition(AvbOps *ops, const
char *partition)
dev_num = get_boot_device(ops);
part->mmc = find_mmc_device(dev_num);
if (!part->mmc) {
- printf("No MMC device at slot %x\n", dev_num);
+ printf("%s: no MMC device at slot %x\n", __func__, dev_num);
goto err;
}
- if (mmc_init(part->mmc)) {
- printf("MMC initialization failed\n");
+ ret = mmc_init(part->mmc);
+ if (ret) {
+ printf("%s: MMC initialization failed, err = %d\n",
+ __func__, ret);
goto err;
}
if (IS_MMC(part->mmc)) {
ret = mmc_switch_part(part->mmc, part_num);
- if (ret)
+ if (ret) {
+ printf("%s: MMC part switch failed, err = %d\n",
+ __func__, ret);
goto err;
+ }
}
mmc_blk = mmc_get_blk_desc(part->mmc);
if (!mmc_blk) {
- printf("Error - failed to obtain block descriptor\n");
+ printf("%s: failed to obtain block descriptor\n", __func__);
goto err;
}
ret = part_get_info_by_name(mmc_blk, partition, >info);
if (ret < 0) {
- printf("Can't find partition '%s'\n", partition);
+ printf("%s: can't find partition '%s'\n", __func__, partition);
goto err;
}
@@ -684,7 +690,7 @@ static AvbIOResult read_rollback_index(AvbOps *ops,
{
#ifndef CONFIG_OPTEE_TA_AVB
/* For now we always return 0 as the stored rollback index. */
- printf("%s not supported yet\n", __func__);
+ debug("%s: rollback protection is not implemented\n", __func__);
if (out_rollback_index)
*out_rollback_index = 0;
@@ -730,7 +736,7 @@ static AvbIOResult write_rollback_index(AvbOps *ops,
{
#ifndef CONFIG_OPTEE_TA_AVB
/* For now this is a no-op. */
- printf("%s not supported yet\n", __func__);
+ debug("%s: rollback protection is not implemented\n", __func__);
return AVB_IO_RESULT_OK;
#else
@@ -766,8 +772,7 @@ static AvbIOResult read_is_device_unlocked(AvbOps *ops,
bool *out_is_unlocked)
{
#ifndef CONFIG_OPTEE_TA_AVB
/* For now we always return that the device is unlocked. */
-
- printf("%s not supported yet\n", __func__);
+ debug("%s: device locking is not implemented\n", __func__);
*out_is_unlocked = true;
--
2.34.1
[PATCH v1 2/7] avb: move SPDX license itdentifiers to the first line
From: Igor Opaniuk Move SPDX license identifiers to the first line, so it conforms to license placement rule [1]: Placement: The SPDX license identifier in kernel files shall be added at the first possible line in a file which can contain a comment. For the majority of files this is the first line, except for scripts which require the '#!PATH_TO_INTERPRETER' in the first line. For those scripts the SPDX identifier goes into the second line. [1] https://www.kernel.org/doc/Documentation/process/license-rules.rst Signed-off-by: Igor Opaniuk --- cmd/avb.c | 4 +--- common/avb_verify.c| 3 +-- include/avb_verify.h | 4 +--- test/py/tests/test_android/test_avb.py | 3 +-- 4 files changed, 4 insertions(+), 10 deletions(-) diff --git a/cmd/avb.c b/cmd/avb.c index 783f51b8169..ce8b63873f2 100644 --- a/cmd/avb.c +++ b/cmd/avb.c @@ -1,8 +1,6 @@ - +// SPDX-License-Identifier: GPL-2.0+ /* * (C) Copyright 2018, Linaro Limited - * - * SPDX-License-Identifier:GPL-2.0+ */ #include diff --git a/common/avb_verify.c b/common/avb_verify.c index 59f2c25e0de..938a5383b5d 100644 --- a/common/avb_verify.c +++ b/common/avb_verify.c @@ -1,7 +1,6 @@ +// SPDX-License-Identifier: GPL-2.0+ /* * (C) Copyright 2018, Linaro Limited - * - * SPDX-License-Identifier:GPL-2.0+ */ #include diff --git a/include/avb_verify.h b/include/avb_verify.h index 1e787ba6668..2fb850044d9 100644 --- a/include/avb_verify.h +++ b/include/avb_verify.h @@ -1,8 +1,6 @@ - +/* SPDX-License-Identifier: GPL-2.0+ */ /* * (C) Copyright 2018, Linaro Limited - * - * SPDX-License-Identifier:GPL-2.0+ */ #ifndef_AVB_VERIFY_H diff --git a/test/py/tests/test_android/test_avb.py b/test/py/tests/test_android/test_avb.py index 238b48c90fa..865efbca4de 100644 --- a/test/py/tests/test_android/test_avb.py +++ b/test/py/tests/test_android/test_avb.py @@ -1,6 +1,5 @@ -# Copyright (c) 2018, Linaro Limited -# # SPDX-License-Identifier: GPL-2.0+ +# Copyright (c) 2018, Linaro Limited # # Android Verified Boot 2.0 Test -- 2.34.1
[PATCH v1 1/7] common: avb_verify: don't call mmc_switch_part for SD
From: Igor Opaniuk
mmc_switch_part() is used for switching between hw partitions
on eMMC (boot0, boot1, user, rpmb).
There is no need to do that for SD card.
Signed-off-by: Igor Opaniuk
---
common/avb_verify.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/common/avb_verify.c b/common/avb_verify.c
index 48ba8db51e5..59f2c25e0de 100644
--- a/common/avb_verify.c
+++ b/common/avb_verify.c
@@ -358,9 +358,11 @@ static struct mmc_part *get_partition(AvbOps *ops, const
char *partition)
goto err;
}
- ret = mmc_switch_part(part->mmc, part_num);
- if (ret)
- goto err;
+ if (IS_MMC(part->mmc)) {
+ ret = mmc_switch_part(part->mmc, part_num);
+ if (ret)
+ goto err;
+ }
mmc_blk = mmc_get_blk_desc(part->mmc);
if (!mmc_blk) {
--
2.34.1
[PATCH v1 0/7] AVB: cosmetic adjustments/improvements
This patch series include: - Simplify and add more context for debug/error prints where it's needed. - Move SPDX license identifiers to the first line, so it conforms to license placement rule. - Use mmc_switch_part() only for eMMC. - Rework do_avb_verify_part, take into account device lock state for setting correct androidboot.verifiedbootstate. - Adjust AVB documentation, add info about slot_suffix param. Igor Opaniuk (7): common: avb_verify: don't call mmc_switch_part for SD avb: move SPDX license itdentifiers to the first line common: avb_verify: rework error/debug prints cmd: avb: rework prints common: avb_verify: add str_avb_io_error/str_avb_slot_error cmd: avb: rework do_avb_verify_part doc: android: avb: add slot_suffix param details cmd/avb.c | 206 - common/avb_verify.c| 89 +-- doc/android/avb2.rst | 8 +- include/avb_verify.h | 7 +- test/py/tests/test_android/test_avb.py | 3 +- 5 files changed, 177 insertions(+), 136 deletions(-) -- 2.34.1
Re: [PATCH 1/5] usb: dwc3-generic: implement Qualcomm wrapper
On 1/31/24 15:57, Caleb Connolly wrote:
The Qualcomm specific dwc3 wrapper isn't hugely complicated, implemented
the missing initialisation for host and gadget mode.
Signed-off-by: Caleb Connolly
---
drivers/usb/dwc3/dwc3-generic.c | 99 -
1 file changed, 98 insertions(+), 1 deletion(-)
diff --git a/drivers/usb/dwc3/dwc3-generic.c b/drivers/usb/dwc3/dwc3-generic.c
index 48da621ba966..1119cdecd26d 100644
--- a/drivers/usb/dwc3/dwc3-generic.c
+++ b/drivers/usb/dwc3/dwc3-generic.c
@@ -419,6 +419,99 @@ struct dwc3_glue_ops ti_ops = {
.glue_configure = dwc3_ti_glue_configure,
};
+/* USB QSCRATCH Hardware registers */
+#define QSCRATCH_HS_PHY_CTRL 0x10
+#define UTMI_OTG_VBUS_VALID BIT(20)
+#define SW_SESSVLD_SEL BIT(28)
+
+#define QSCRATCH_SS_PHY_CTRL 0x30
+#define LANE0_PWR_PRESENT BIT(24)
+
+#define QSCRATCH_GENERAL_CFG 0x08
+#define PIPE_UTMI_CLK_SEL BIT(0)
+#define PIPE3_PHYSTATUS_SW BIT(3)
+#define PIPE_UTMI_CLK_DIS BIT(8)
+
+#define PWR_EVNT_IRQ_STAT_REG 0x58
+#define PWR_EVNT_LPM_IN_L2_MASK BIT(4)
+#define PWR_EVNT_LPM_OUT_L2_MASK BIT(5)
+
+#define SDM845_QSCRATCH_BASE_OFFSET 0xf8800
+#define SDM845_QSCRATCH_SIZE 0x400
+#define SDM845_DWC3_CORE_SIZE 0xcd00
Newline here please
+static inline void dwc3_qcom_setbits(void __iomem *base, u32 offset, u32 val)
+{
+ u32 reg;
+
+ reg = readl(base + offset);
+ reg |= val;
+ writel(reg, base + offset);
Use setbits_le32() .
+ /* ensure that above write is through */
+ readl(base + offset);
Is this needed ?
+}
+
+static inline void dwc3_qcom_clrbits(void __iomem *base, u32 offset, u32 val)
+{
+ u32 reg;
+
+ reg = readl(base + offset);
+ reg &= ~val;
+ writel(reg, base + offset);
clrbits_le32()
+ /* ensure that above write is through */
+ readl(base + offset);
+}
+
+static void dwc3_qcom_vbus_override_enable(void __iomem *qscratch_base, bool
enable)
+{
+ if (enable) {
+ dwc3_qcom_setbits(qscratch_base, QSCRATCH_SS_PHY_CTRL,
+ LANE0_PWR_PRESENT);
+ dwc3_qcom_setbits(qscratch_base, QSCRATCH_HS_PHY_CTRL,
+ UTMI_OTG_VBUS_VALID | SW_SESSVLD_SEL);
+ } else {
+ dwc3_qcom_clrbits(qscratch_base, QSCRATCH_SS_PHY_CTRL,
+ LANE0_PWR_PRESENT);
+ dwc3_qcom_clrbits(qscratch_base, QSCRATCH_HS_PHY_CTRL,
+ UTMI_OTG_VBUS_VALID | SW_SESSVLD_SEL);
+ }
+}
+
+/* For controllers running without superspeed PHYs */
+static void dwc3_qcom_select_utmi_clk(void __iomem *qscratch_base)
+{
+ /* Configure dwc3 to use UTMI clock as PIPE clock not present */
+ dwc3_qcom_setbits(qscratch_base, QSCRATCH_GENERAL_CFG,
+ PIPE_UTMI_CLK_DIS);
+
+ udelay(500);
Isn't there some possibility to poll for completion instead of fixed
delay ? If so, use wait_for_bit or some such .
+ dwc3_qcom_setbits(qscratch_base, QSCRATCH_GENERAL_CFG,
+ PIPE_UTMI_CLK_SEL | PIPE3_PHYSTATUS_SW);
+
+ udelay(500);
+
+ dwc3_qcom_clrbits(qscratch_base, QSCRATCH_GENERAL_CFG,
+ PIPE_UTMI_CLK_DIS);
+}
+
+static void dwc3_qcom_glue_configure(struct udevice *dev, int index,
+enum usb_dr_mode mode)
+{
+ void __iomem *qscratch_base = (void __iomem *)dev_read_addr(dev);
Can this be NULL ? If yes, add check for != NULL .
+ if (dev_read_bool(dev, "qcom,select-utmi-as-pipe-clk"))
+ dwc3_qcom_select_utmi_clk(qscratch_base);
+
+ if (mode != USB_DR_MODE_HOST)
+ dwc3_qcom_vbus_override_enable(qscratch_base, true);
+}
+
+struct dwc3_glue_ops qcom_ops = {
+ .glue_configure = dwc3_qcom_glue_configure,
+};
+
static int dwc3_rk_glue_get_ctrl_dev(struct udevice *dev, ofnode *node)
{
*node = dev_ofnode(dev);
@@ -506,6 +599,10 @@ static int dwc3_glue_reset_init(struct udevice *dev,
else if (ret)
return ret;
+ if (device_is_compatible(dev, "qcom,dwc3")) {
+ reset_assert_bulk(>resets);
+ udelay(500);
Why this delay here ?
[...]
[PATCH] net: macb: Add support for fixed link
From: BELOUARGA Mohamed
The actual driver does not work when there is no linked PHY. These
changes add support for fixed-link feature in the device tree.
Signed-off-by: BELOUARGA Mohamed
---
drivers/net/macb.c | 189 -
1 file changed, 117 insertions(+), 72 deletions(-)
diff --git a/drivers/net/macb.c b/drivers/net/macb.c
index bfc48dac07..05d638cd77 100644
--- a/drivers/net/macb.c
+++ b/drivers/net/macb.c
@@ -128,6 +128,8 @@ struct macb_device {
unsigned long dummy_desc_dma;
const struct device *dev;
+ unsigned intduplex;
+ unsigned intspeed;
unsigned short phy_addr;
struct mii_dev *bus;
#ifdef CONFIG_PHYLIB
@@ -178,6 +180,12 @@ static int gem_is_gigabit_capable(struct macb_device *macb)
return macb_is_gem(macb) && !cpu_is_sama5d2() && !cpu_is_sama5d4();
}
+/* Is the port a fixed link */
+static int macb_port_is_fixed_link(struct macb_device *macb)
+{
+ return macb->phy_addr > PHY_MAX_ADDR;
+}
+
static void macb_mdio_write(struct macb_device *macb, u8 phy_adr, u8 reg,
u16 value)
{
@@ -666,97 +674,110 @@ static int macb_phy_init(struct udevice *dev, const char
*name)
int i;
arch_get_mdio_control(name);
- /* Auto-detect phy_addr */
- ret = macb_phy_find(macb, name);
- if (ret)
- return ret;
+ /* If port is not fixed -> setup PHY */
+ if (!macb_port_is_fixed_link(macb)) {
+ /* Auto-detect phy_addr */
+ ret = macb_phy_find(macb, name);
+ if (ret)
+ return ret;
- /* Check if the PHY is up to snuff... */
- phy_id = macb_mdio_read(macb, macb->phy_addr, MII_PHYSID1);
- if (phy_id == 0x) {
- printf("%s: No PHY present\n", name);
- return -ENODEV;
- }
+ /* Check if the PHY is up to snuff... */
+ phy_id = macb_mdio_read(macb, macb->phy_addr, MII_PHYSID1);
+ if (phy_id == 0x) {
+ printf("%s: No PHY present\n", name);
+ return -ENODEV;
+ }
#ifdef CONFIG_PHYLIB
- macb->phydev = phy_connect(macb->bus, macb->phy_addr, dev,
-macb->phy_interface);
- if (!macb->phydev) {
- printf("phy_connect failed\n");
- return -ENODEV;
- }
+ macb->phydev = phy_connect(macb->bus, macb->phy_addr, dev,
+macb->phy_interface);
+ if (!macb->phydev) {
+ printf("phy_connect failed\n");
+ return -ENODEV;
+ }
- phy_config(macb->phydev);
+ phy_config(macb->phydev);
#endif
- status = macb_mdio_read(macb, macb->phy_addr, MII_BMSR);
- if (!(status & BMSR_LSTATUS)) {
- /* Try to re-negotiate if we don't have link already. */
- macb_phy_reset(macb, name);
-
- for (i = 0; i < MACB_AUTONEG_TIMEOUT / 100; i++) {
- status = macb_mdio_read(macb, macb->phy_addr, MII_BMSR);
- if (status & BMSR_LSTATUS) {
- /*
-* Delay a bit after the link is established,
-* so that the next xfer does not fail
-*/
- mdelay(10);
- break;
+ status = macb_mdio_read(macb, macb->phy_addr, MII_BMSR);
+ if (!(status & BMSR_LSTATUS)) {
+ /* Try to re-negotiate if we don't have link already. */
+ macb_phy_reset(macb, name);
+
+ for (i = 0; i < MACB_AUTONEG_TIMEOUT / 100; i++) {
+ status = macb_mdio_read(macb, macb->phy_addr,
MII_BMSR);
+ if (status & BMSR_LSTATUS) {
+ /*
+* Delay a bit after the link is
established,
+* so that the next xfer does not fail
+*/
+ mdelay(10);
+ break;
+ }
+ udelay(100);
}
- udelay(100);
}
- }
- if (!(status & BMSR_LSTATUS)) {
- printf("%s: link down (status: 0x%04x)\n",
- name, status);
- return -ENETDOWN;
- }
+ if (!(status & BMSR_LSTATUS)) {
+ printf("%s: link down (status: 0x%04x)\n",
+ name, status);
+ return -ENETDOWN;
Re: [PATCH 02/10] arm: dts: k3-am68*: Sync with 6.8-rc1
On 2/6/24 6:21 AM, Manorit Chawdhry wrote:
Syncs the DT from Linux v6.8-rc1.
Remove udmap overrides and handle location change of chipid node.
Message doesn't match the patch. This patch should just be squashed
into the previous one anyway.
Andrew
Signed-off-by: Manorit Chawdhry
---
arch/arm/dts/k3-am68-sk-base-board.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/dts/k3-am68-sk-base-board.dts
b/arch/arm/dts/k3-am68-sk-base-board.dts
index 1e1a82f9d2b8..d0cfdeac21fb 100644
--- a/arch/arm/dts/k3-am68-sk-base-board.dts
+++ b/arch/arm/dts/k3-am68-sk-base-board.dts
@@ -31,6 +31,7 @@
can1 = _mcan1;
can2 = _mcan6;
can3 = _mcan7;
+ ethernet0 = _port1;
};
vusb_main: regulator-vusb-main5v0 {
Re: [PATCH] arm: mach-k3: Refactor QoS settings
On 2/6/24 2:56 AM, Aradhya Bhatia wrote:
Refactor common QoS code into a new common header file, and the soc
specific setup_qos functions into a common API.
Rename $(soc)_qos_count and $(soc)_qos_data variables to qos_count and
qos_data. When QoS settings of more SoCs are added, only one pair will
be defined at a time, based on the config SOC_K3_$(soc).
This refactoring has been done for 2 major purposes.
- The auto-generated $(soc)_qos_data.c and $(soc)_qos.h files cannot
have any code that is specific to any bootloader. Those files have to
remain agnostic of different bootloader implementations and their
header files.
- The existing implementation was less than ideal and would have enabled
multiple $(soc)_qos_count and $(soc)_qos_data variables for all SoC
variants.
Signed-off-by: Aradhya Bhatia
---
arch/arm/mach-k3/Kconfig | 8 +++
arch/arm/mach-k3/am62a7_init.c| 14
arch/arm/mach-k3/common.c | 12 ++
arch/arm/mach-k3/common.h | 8 +++
arch/arm/mach-k3/include/mach/hardware.h | 9
arch/arm/mach-k3/include/mach/k3-qos.h| 22 +++
arch/arm/mach-k3/r5/am62ax/Makefile | 2 +-
.../{include/mach => r5/am62ax}/am62a_qos.h | 0
.../{am62a_qos_data.c => am62a_qos_uboot.c} | 9
9 files changed, 56 insertions(+), 28 deletions(-)
create mode 100644 arch/arm/mach-k3/include/mach/k3-qos.h
rename arch/arm/mach-k3/{include/mach => r5/am62ax}/am62a_qos.h (100%)
rename arch/arm/mach-k3/r5/am62ax/{am62a_qos_data.c => am62a_qos_uboot.c}
(85%)
diff --git a/arch/arm/mach-k3/Kconfig b/arch/arm/mach-k3/Kconfig
index 03898424c954..ffc4a9c29029 100644
--- a/arch/arm/mach-k3/Kconfig
+++ b/arch/arm/mach-k3/Kconfig
@@ -139,6 +139,14 @@ config K3_DM_FW
bootloader, it makes RM and PM services not being available
during R5 SPL execution time.
+config K3_QOS
+ bool "Enable Quality of Service (QoS) Settings for TI K3 SoCs"
+ default y if CPU_V7R && SOC_K3_AM62A7
If this is R5 only, then put it in the arch/arm/mach-k3/r5 Kconfig
and you can drop the CPU_V7R check.
Andrew
+ help
+ This option enables the R5 SPL to apply QoS settings for various
+ HW controllers inside the TI K3 SoCs. The files for QoS settings are
+ generated from Sysconfig and k3-resource-partitioning tools.
+
config K3_X509_SWRV
int "SWRV for X509 certificate used for boot images"
default 1
diff --git a/arch/arm/mach-k3/am62a7_init.c b/arch/arm/mach-k3/am62a7_init.c
index d72e19936b9b..080274e3af58 100644
--- a/arch/arm/mach-k3/am62a7_init.c
+++ b/arch/arm/mach-k3/am62a7_init.c
@@ -69,20 +69,6 @@ static void ctrl_mmr_unlock(void)
mmr_unlock(PADCFG_MMR1_BASE, 1);
}
-#if (IS_ENABLED(CONFIG_CPU_V7R))
-static void setup_qos(void)
-{
- u32 i;
-
- for (i = 0; i < am62a_qos_count; i++)
- writel(am62a_qos_data[i].val, (uintptr_t)am62a_qos_data[i].reg);
-}
-#else
-static void setup_qos(void)
-{
-}
-#endif
-
void board_init_f(ulong dummy)
{
struct udevice *dev;
diff --git a/arch/arm/mach-k3/common.c b/arch/arm/mach-k3/common.c
index f411366778f0..b54f2ddc4729 100644
--- a/arch/arm/mach-k3/common.c
+++ b/arch/arm/mach-k3/common.c
@@ -28,6 +28,8 @@
#include
#include
+#include
+
#if IS_ENABLED(CONFIG_SYS_K3_SPL_ATF)
enum {
IMAGE_ID_ATF,
@@ -595,3 +597,13 @@ int misc_init_r(void)
void __weak do_board_detect(void)
{
}
+
+#if (IS_ENABLED(CONFIG_K3_QOS))
+void setup_qos(void)
+{
+ u32 i;
+
+ for (i = 0; i < qos_count; i++)
+ writel(qos_data[i].val, (uintptr_t)qos_data[i].reg);
+}
+#endif
diff --git a/arch/arm/mach-k3/common.h b/arch/arm/mach-k3/common.h
index e9db9fbfb63d..53aa186b31a4 100644
--- a/arch/arm/mach-k3/common.h
+++ b/arch/arm/mach-k3/common.h
@@ -45,3 +45,11 @@ void ti_secure_image_post_process(void **p_image, size_t
*p_size);
struct ti_sci_handle *get_ti_sci_handle(void);
void do_board_detect(void);
void ti_secure_image_check_binary(void **p_image, size_t *p_size);
+
+#if (IS_ENABLED(CONFIG_K3_QOS))
+void setup_qos(void);
+#else
+static inline void setup_qos(void)
+{
+}
+#endif
diff --git a/arch/arm/mach-k3/include/mach/hardware.h
b/arch/arm/mach-k3/include/mach/hardware.h
index a1a9dfbde66c..52ef82e70b07 100644
--- a/arch/arm/mach-k3/include/mach/hardware.h
+++ b/arch/arm/mach-k3/include/mach/hardware.h
@@ -30,7 +30,6 @@
#ifdef CONFIG_SOC_K3_AM62A7
#include "am62a_hardware.h"
-#include "am62a_qos.h"
#endif
/* Assuming these addresses and definitions stay common across K3 devices */
@@ -97,12 +96,4 @@ struct rom_extended_boot_data {
u32 num_components;
};
-struct k3_qos_data {
- u32 reg;
- u32 val;
-};
-
-extern struct k3_qos_data am62a_qos_data[];
-extern u32 am62a_qos_count;
-
#endif /* _ASM_ARCH_HARDWARE_H_ */
diff
Re: [PATCH v7] fdt: Allow the devicetree to come from a bloblist
On Tue, Jan 23, 2024 at 01:03:00PM -0500, Tom Rini wrote: > On Tue, Jan 23, 2024 at 11:27:57AM +, Conor Dooley wrote: > > On Mon, Jan 22, 2024 at 06:55:01PM +, Conor Dooley wrote: > > > On Mon, Jan 22, 2024 at 01:47:17PM -0500, Tom Rini wrote: > > > > On Mon, Jan 22, 2024 at 06:36:31PM +, Conor Dooley wrote: > > > > > Hey, > > > > > > > > > > On Tue, Jan 16, 2024 at 01:48:06PM +, Conor Dooley wrote: > > > > > > Yo, > > > > > > > > > > > > On Wed, Jan 03, 2024 at 06:49:19PM -0700, Simon Glass wrote: > > > > > > > Standard passage provides for a bloblist to be passed from one > > > > > > > firmware > > > > > > > phase to the next. That can be used to pass the devicetree along > > > > > > > as well. > > > > > > > Add an option to support this. > > > > > > > > > > > > > > Tests for this will be added as part of the Universal Payload > > > > > > > work. > > > > > > > > > > > > > > Signed-off-by: Simon Glass > > > > > > > > > > > > Since this was merged into master, U-Boot is no longer booting on my > > > > > > icicle kit (At least that's what my bisection tells me). This is a > > > > > > RISC-V board and U-Boot for it is built from > > > > > > microchip_mpfs_icicle_defconfig. > > > > > > > > > > > > There's zero output on the console from U-Boot at all, the last > > > > > > thing > > > > > > that I see is OpenSBI before things grind to a halt. > > > > > > > > > > Just wondering if there's anything I can do to help this one along? > > > > > Got a red CI complaining at me every morning about it :| > > > > > > > > Well, can you please look in to what part of this is causing the > > > > failure? I don't really see what would have changed on > > > > microchip_mpfs_icicle_defconfig from this as BLOBLIST isn't set before > > > > nor after this change. > > > > > > Sure. I'll try to look into it more tomorrow. > > > > I gave it a try, it seems to be the FDTSRC_BLOBLIST additions that kill > > it, not the actual code in fdtdec_setup(). > > Well that's very unexpected. Can you see what boundary we're crossing or > whatever has overflowed now or something on your platform? And you know what else was not expected? The issue randomly disappearing a few days after I sent this email. Or maybe that should be expected given how the issue actually cropped up in the first place. I didn't have a chance yet to see how this particular patch may have interacted with the sections etc, but looking into it is still on my todo list, just much lower down now that things actually boot again for me... Thanks, Conor. signature.asc Description: PGP signature
Re: [PATCH v3 3/3] board: Add support for Conclusive WHLE-LS1088A
On 11/28/23 05:34, Artur Rojek wrote: > Introduce support for Conclusive WHLE-LS1088A Single Board Computer. > > Co-developed-by: Jakub Klama > Signed-off-by: Jakub Klama > Signed-off-by: Artur Rojek > --- > > v3: new patch > > arch/arm/Kconfig | 19 ++ > arch/arm/dts/Makefile | 1 + > arch/arm/dts/fsl-ls1088a-whle-u-boot.dtsi | 8 + > arch/arm/dts/fsl-ls1088a-whle.dts | 235 ++ > board/conclusive/whle-ls1088a/Kconfig | 29 ++ > board/conclusive/whle-ls1088a/MAINTAINERS | 11 + > board/conclusive/whle-ls1088a/Makefile| 7 + > board/conclusive/whle-ls1088a/ddr.c | 134 > board/conclusive/whle-ls1088a/ddr.h | 47 +++ > board/conclusive/whle-ls1088a/eth.c | 13 + > board/conclusive/whle-ls1088a/whle-ls1088a.c | 301 ++ > .../conclusive/whle-ls1088a/whle-ls1088a.env | 13 + > configs/whle_ls1088a_emmc_defconfig | 84 + > configs/whle_ls1088a_qspi_defconfig | 84 + > include/configs/whle_ls1088a.h| 92 ++ > 15 files changed, 1078 insertions(+) > create mode 100644 arch/arm/dts/fsl-ls1088a-whle-u-boot.dtsi > create mode 100644 arch/arm/dts/fsl-ls1088a-whle.dts > create mode 100644 board/conclusive/whle-ls1088a/Kconfig > create mode 100644 board/conclusive/whle-ls1088a/MAINTAINERS > create mode 100644 board/conclusive/whle-ls1088a/Makefile > create mode 100644 board/conclusive/whle-ls1088a/ddr.c > create mode 100644 board/conclusive/whle-ls1088a/ddr.h > create mode 100644 board/conclusive/whle-ls1088a/eth.c > create mode 100644 board/conclusive/whle-ls1088a/whle-ls1088a.c > create mode 100644 board/conclusive/whle-ls1088a/whle-ls1088a.env > create mode 100644 configs/whle_ls1088a_emmc_defconfig > create mode 100644 configs/whle_ls1088a_qspi_defconfig > create mode 100644 include/configs/whle_ls1088a.h > > diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig > index 609571e6e421..cd53fcaac883 100644 > --- a/arch/arm/Kconfig > +++ b/arch/arm/Kconfig > @@ -1869,6 +1869,24 @@ config TARGET_WHLE_LS1046A > Layerscape Architecture processor: > > https://cas5-0-urlprotect.trendmicro.com:443/wis/clicktime/v1/query?url=https%3a%2f%2fconclusive.tech%2fproducts%2fwhle%2dls1%2dsbc%2f=54a8c79f-0cf2-4f48-aefc-d35c76864d4f=d807158c60b7d2502abde8a2fc01f40662980862-cf53e7a0650a67cfac22b122ae0b3fcf9018c729 > > +config TARGET_WHLE_LS1088A > + bool "Support Conclusive WHLE-LS1088A" > + select ARCH_LS1088A > + select ARM64 > + select ARMV8_MULTIENTRY > + select ARCH_SUPPORT_TFABOOT > + select BOARD_EARLY_INIT_F > + select BOARD_LATE_INIT > + select GPIO_EXTRA_HEADER > + select DM_SPI_FLASH if DM_SPI > + imply SCSI > + help > + Support for Conclusive WHLE-LS1088A platform. > + The WHLE-LS1088A is a high-performance Single Board Computer with > + extensive connectivity features that supports the QorIQ LS1088A > + Layerscape Architecture processor: > + > https://cas5-0-urlprotect.trendmicro.com:443/wis/clicktime/v1/query?url=https%3a%2f%2fconclusive.tech%2fproducts%2fwhle%2dls1%2dsbc%2f=54a8c79f-0cf2-4f48-aefc-d35c76864d4f=d807158c60b7d2502abde8a2fc01f40662980862-cf53e7a0650a67cfac22b122ae0b3fcf9018c729 > + > config TARGET_TEN64 > bool "Support ten64" > select ARCH_LS1088A > @@ -2318,6 +2336,7 @@ source "board/broadcom/bcmns/Kconfig" > source "board/broadcom/bcmns3/Kconfig" > source "board/cavium/thunderx/Kconfig" > source "board/conclusive/whle-ls1046a/Kconfig" > +source "board/conclusive/whle-ls1088a/Kconfig" > source "board/eets/pdu001/Kconfig" > source "board/emulation/qemu-arm/Kconfig" > source "board/freescale/ls2080aqds/Kconfig" > diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile > index 8dcbf29df363..b0782b4f29bc 100644 > --- a/arch/arm/dts/Makefile > +++ b/arch/arm/dts/Makefile > @@ -591,6 +591,7 @@ dtb-$(CONFIG_FSL_LSCH3) += fsl-ls2080a-qds.dtb \ > fsl-ls1088a-qds.dtb \ > fsl-ls1088a-qds-21-x.dtb \ > fsl-ls1088a-qds-29-x.dtb \ > + fsl-ls1088a-whle.dtb \ > fsl-ls1028a-rdb.dtb \ > fsl-ls1028a-qds-duart.dtb \ > fsl-ls1028a-qds-lpuart.dtb \ > diff --git a/arch/arm/dts/fsl-ls1088a-whle-u-boot.dtsi > b/arch/arm/dts/fsl-ls1088a-whle-u-boot.dtsi > new file mode 100644 > index ..bbe93a1d6e4f > --- /dev/null > +++ b/arch/arm/dts/fsl-ls1088a-whle-u-boot.dtsi > @@ -0,0 +1,8 @@ > +// SPDX-License-Identifier: GPL-2.0+ OR X11 > +/* > + * Copyright 2020-2023 Conclusive Engineering Sp. z o. o. > + */ > + > +#include > + > +#include "fsl-ls1088a-u-boot.dtsi" > diff --git a/arch/arm/dts/fsl-ls1088a-whle.dts > b/arch/arm/dts/fsl-ls1088a-whle.dts > new file mode 100644 > index ..76ef1c748059 > --- /dev/null > +++ b/arch/arm/dts/fsl-ls1088a-whle.dts > @@ -0,0 +1,235 @@ > +// SPDX-License-Identifier: GPL-2.0+ OR X11 > +/* > + *
[PATCH v2 1/2] imx: imxrt1050-evk: Add support for SPI flash booting
Add support for booting the imxrt1050-evk from spi.
Add imximage config and the ability for SPL to boot from NOR.
Signed-off-by: Jesse Taube
---
V1 -> V2:
- Add defconfig to MAINTAINERS
- Change Copyright of imximage-nor.cfg to myself
- Fix spelling and grammar
- Use imperative mood
---
arch/arm/dts/imxrt1050-evk-u-boot.dtsi| 31 ++
arch/arm/mach-imx/imxrt/Kconfig | 1 +
board/freescale/imxrt1050-evk/MAINTAINERS | 1 +
.../freescale/imxrt1050-evk/imximage-nor.cfg | 42
board/freescale/imxrt1050-evk/imximage.cfg| 10 +-
board/freescale/imxrt1050-evk/imxrt1050-evk.c | 7 +-
configs/imxrt1050-evk_defconfig | 8 +-
configs/imxrt1050-evk_fspi_defconfig | 100 ++
include/configs/imxrt1050-evk.h | 6 ++
9 files changed, 200 insertions(+), 6 deletions(-)
create mode 100644 board/freescale/imxrt1050-evk/imximage-nor.cfg
create mode 100644 configs/imxrt1050-evk_fspi_defconfig
diff --git a/arch/arm/dts/imxrt1050-evk-u-boot.dtsi
b/arch/arm/dts/imxrt1050-evk-u-boot.dtsi
index a9095e736b..3f54411b7b 100644
--- a/arch/arm/dts/imxrt1050-evk-u-boot.dtsi
+++ b/arch/arm/dts/imxrt1050-evk-u-boot.dtsi
@@ -8,6 +8,10 @@
#include "imxrt1050-pinfunc.h"
/ {
+ binman: binman {
+ multiple-images;
+ };
+
aliases {
display0 =
usbphy0 =
@@ -113,6 +117,33 @@
};
};
+ {
+#ifdef CONFIG_FSPI_CONF_HEADER
+ imx-boot {
+ filename = "flash.bin";
+ pad-byte = <0x00>;
+
+ fspi_conf_block {
+ filename = CONFIG_FSPI_CONF_FILE;
+ type = "blob-ext";
+ offset = <0x0>;
+ };
+
+ spl {
+ filename = "SPL";
+ offset = <0x1000>;
+ type = "blob-ext";
+ };
+
+ binman_uboot: uboot {
+ filename = "u-boot.img";
+ offset = <0x1>;
+ type = "blob-ext";
+ };
+ };
+#endif
+};
+
{
bootph-pre-ram;
};
diff --git a/arch/arm/mach-imx/imxrt/Kconfig b/arch/arm/mach-imx/imxrt/Kconfig
index c1d6b09e77..f702f6 100644
--- a/arch/arm/mach-imx/imxrt/Kconfig
+++ b/arch/arm/mach-imx/imxrt/Kconfig
@@ -2,6 +2,7 @@ if ARCH_IMXRT
config IMXRT
bool
+ select BINMAN
select SYS_FSL_ERRATUM_ESDHC135
config IMXRT1020
diff --git a/board/freescale/imxrt1050-evk/MAINTAINERS
b/board/freescale/imxrt1050-evk/MAINTAINERS
index a872855452..890825b39a 100644
--- a/board/freescale/imxrt1050-evk/MAINTAINERS
+++ b/board/freescale/imxrt1050-evk/MAINTAINERS
@@ -4,3 +4,4 @@ S: Maintained
F: board/freescale/imxrt1050-evk
F: include/configs/imxrt1050-evk.h
F: configs/imxrt1050-evk_defconfig
+F: configs/imxrt1050-evk_fspi_defconfig
diff --git a/board/freescale/imxrt1050-evk/imximage-nor.cfg
b/board/freescale/imxrt1050-evk/imximage-nor.cfg
new file mode 100644
index 00..3b80e1f178
--- /dev/null
+++ b/board/freescale/imxrt1050-evk/imximage-nor.cfg
@@ -0,0 +1,42 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2024
+ * Author(s): Jesse Taube
+ */
+
+#include
+
+/* image version */
+
+IMAGE_VERSION 2
+
+/*
+ * Boot Device : one of
+ * spi/sd/nand/onenand, qspi/nor
+ */
+
+BOOT_FROM nor
+
+/*
+ * Device Configuration Data (DCD)
+ *
+ * Each entry must have the format:
+ * Addr-type AddressValue
+ *
+ * where:
+ * Addr-type register length (1,2 or 4 bytes)
+ * Address absolute address of the register
+ * value value to be stored in the register
+ */
+
+/*
+ * 0x400AC044 is used to configure the flexram.
+ * Unfortunately setting all to OCRAM only works for MMC
+ * and setting all to DTCM only works for FLEXSPI NOR.
+ * This configuration fortunately works for both SPI and MMC.
+*/
+/* Set first two banks FlexRAM as OCRAM(01b) and the rest to DTCM(10b) */
+DATA 4 0x400AC044 0x55aa
+/* Use FLEXRAM_BANK_CFG to config FlexRAM */
+SET_BIT 4 0x400AC040 0x4
+
diff --git a/board/freescale/imxrt1050-evk/imximage.cfg
b/board/freescale/imxrt1050-evk/imximage.cfg
index f1f09fd7eb..b30d852194 100644
--- a/board/freescale/imxrt1050-evk/imximage.cfg
+++ b/board/freescale/imxrt1050-evk/imximage.cfg
@@ -29,7 +29,13 @@ BOOT_FROMsd
* value value to be stored in the register
*/
-/* Set all FlexRAM as OCRAM(01b) */
-DATA 4 0x400AC044 0x
+/*
+ * 0x400AC044 is used to configure the flexram.
+ * Unfortunately setting all to OCRAM only works for MMC
+ * and setting all to DTCM only works for FLEXSPI NOR.
+ * This configuration fortunately works for both SPI and MMC.
+*/
+/* Set first two banks FlexRAM as OCRAM(01b) and the rest to DTCM(10b) */
+DATA 4 0x400AC044 0x55aa
/* Use FLEXRAM_BANK_CFG to config FlexRAM */
SET_BIT 4 0x400AC040 0x4
diff --git
[PATCH v2 2/2] imx: imxrt1050-evk: Add documentation for SPI boot
Add documentation for SPI boot. Signed-off-by: Jesse Taube --- V1 -> V2: - Change s/Adds/Add - Change imxrt1050-evk_spi to fspi - Fix spelling and grammar - Mention the SPI NOR flash part number --- doc/board/nxp/imxrt1050-evk.rst | 30 ++ 1 file changed, 30 insertions(+) diff --git a/doc/board/nxp/imxrt1050-evk.rst b/doc/board/nxp/imxrt1050-evk.rst index c1fb48f0cd..e0cafe1035 100644 --- a/doc/board/nxp/imxrt1050-evk.rst +++ b/doc/board/nxp/imxrt1050-evk.rst @@ -39,3 +39,33 @@ switch label numbers reference). The USB console connector is the one close the ethernet connector - Insert the micro SD card in the board, power it up and U-Boot messages should come up. + + +How to use U-Boot with SPI flash on NXP i.MXRT1050 EVK +-- + +- Build U-Boot for i.MXRT1050 EVK: + +.. code-block:: bash + + $ make mrproper + $ make imxrt1050-evk_fspi_defconfig + $ make + +This will generate SPL, uboot.img, fspi_header.bin, and the final image (flash.bin). + +To boot from SPI flash on other boards, you may need to change the flash header config, +which is specific to your flash chip, in Kconfig. +The flash config is 4K in size and is documented on page 217 of the imxrt1050 RM. +The default flash chip on the i.MXRT1050 EVK is the S26KS512SDPBHI02 HYPERFLASH. + +- Jumper settings:: + + SW7: 0 1 1 0 + +where 0 means bottom position and 1 means top position (from the +switch label numbers reference). + +- Connect the USB cable between the EVK and the PC for the console. + +- Use either JTAG or SWD to write `flash.bin` to the NOR. I used Mcuexpresso IDE's GUI flash tool. -- 2.43.0
Re: [PATCH v3 2/3] board: Add support for Conclusive WHLE-LS1046A
On 11/28/23 05:34, Artur Rojek wrote:
> Introduce support for Conclusive WHLE-LS1046A Single Board Computer.
>
> Co-developed-by: Jakub Klama
> Signed-off-by: Jakub Klama
> Signed-off-by: Artur Rojek
> ---
>
> v3: no change
>
> v2: - drop non-DM_ETH case
> - clean-up defines in configs/whle_ls1046a.h: remove unneeded ones,
> move others to appropriate files in board directory
> - move environment variables to whle-ls1046a.env
> - move away from distro_bootcmd and use BOOTSTD
> - fix i2c-mux node parent and ext_i2c address in Device Tree
> - style changes to eth.c
> - fix CONFIG_MTDPARTS_DEFAULT value in defconfigs
>
> arch/arm/Kconfig | 19 ++
> arch/arm/dts/Makefile | 1 +
> arch/arm/dts/fsl-ls1046a-whle.dts | 208 +
> board/conclusive/whle-ls1046a/Kconfig | 15 ++
> board/conclusive/whle-ls1046a/MAINTAINERS | 9 +
> board/conclusive/whle-ls1046a/Makefile| 7 +
> board/conclusive/whle-ls1046a/ddr.c | 21 ++
> board/conclusive/whle-ls1046a/eth.c | 65 ++
> board/conclusive/whle-ls1046a/whle-ls1046a.c | 215 ++
> .../conclusive/whle-ls1046a/whle-ls1046a.env | 13 ++
> configs/whle_ls1046a_emmc_defconfig | 83 +++
> configs/whle_ls1046a_qspi_defconfig | 84 +++
> include/configs/whle_ls1046a.h| 47
> 13 files changed, 787 insertions(+)
> create mode 100644 arch/arm/dts/fsl-ls1046a-whle.dts
> create mode 100644 board/conclusive/whle-ls1046a/Kconfig
> create mode 100644 board/conclusive/whle-ls1046a/MAINTAINERS
> create mode 100644 board/conclusive/whle-ls1046a/Makefile
> create mode 100644 board/conclusive/whle-ls1046a/ddr.c
> create mode 100644 board/conclusive/whle-ls1046a/eth.c
> create mode 100644 board/conclusive/whle-ls1046a/whle-ls1046a.c
> create mode 100644 board/conclusive/whle-ls1046a/whle-ls1046a.env
> create mode 100644 configs/whle_ls1046a_emmc_defconfig
> create mode 100644 configs/whle_ls1046a_qspi_defconfig
> create mode 100644 include/configs/whle_ls1046a.h
>
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index d812685c9842..609571e6e421 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -1851,6 +1851,24 @@ config TARGET_SL28
> help
> Support for Kontron SMARC-sAL28 board.
>
> +config TARGET_WHLE_LS1046A
> + bool "Support Conclusive WHLE-LS1046A"
> + select ARCH_LS1046A
> + select ARM64
> + select ARMV8_MULTIENTRY
> + select ARCH_SUPPORT_TFABOOT
> + select BOARD_EARLY_INIT_F
> + select BOARD_LATE_INIT
> + select GPIO_EXTRA_HEADER
> + select DM_SPI_FLASH if DM_SPI
> + imply SCSI
> + help
> + Support for Conclusive WHLE-LS1046A platform.
> + The WHLE-LS1046A is a high-performance Single Board Computer with
> + extensive connectivity features that supports the QorIQ LS1046A
> + Layerscape Architecture processor:
> +
> https://cas5-0-urlprotect.trendmicro.com:443/wis/clicktime/v1/query?url=https%3a%2f%2fconclusive.tech%2fproducts%2fwhle%2dls1%2dsbc%2f=bfe70e04-e3cb-4832-a510-cd7686941d3c=d807158c60b7d2502abde8a2fc01f40662980862-65691d364ff53ae48e02cdbc52323838b4503b62
> +
> config TARGET_TEN64
> bool "Support ten64"
> select ARCH_LS1088A
> @@ -2299,6 +2317,7 @@ source "board/cortina/presidio-asic/Kconfig"
> source "board/broadcom/bcmns/Kconfig"
> source "board/broadcom/bcmns3/Kconfig"
> source "board/cavium/thunderx/Kconfig"
> +source "board/conclusive/whle-ls1046a/Kconfig"
> source "board/eets/pdu001/Kconfig"
> source "board/emulation/qemu-arm/Kconfig"
> source "board/freescale/ls2080aqds/Kconfig"
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> index 1be08c5fdc2e..8dcbf29df363 100644
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -615,6 +615,7 @@ dtb-$(CONFIG_FSL_LSCH2) += fsl-ls1043a-qds-duart.dtb \
> fsl-ls1046a-qds-lpuart.dtb \
> fsl-ls1046a-rdb.dtb \
> fsl-ls1046a-frwy.dtb \
> + fsl-ls1046a-whle.dtb \
> fsl-ls1012a-qds.dtb \
> fsl-ls1012a-rdb.dtb \
> fsl-ls1012a-2g5rdb.dtb \
> diff --git a/arch/arm/dts/fsl-ls1046a-whle.dts
> b/arch/arm/dts/fsl-ls1046a-whle.dts
> new file mode 100644
> index ..1aed3e8c4701
> --- /dev/null
> +++ b/arch/arm/dts/fsl-ls1046a-whle.dts
> @@ -0,0 +1,208 @@
> +// SPDX-License-Identifier: GPL-2.0+ OR X11
> +/*
> + * Copyright 2020-2023 Conclusive Engineering Sp. z o. o.
> + */
> +
> +#include
> +
> +/dts-v1/;
> +#include "fsl-ls1046a.dtsi"
> +
> +/ {
> + model = "Conclusive WHLE-LS1046A";
> + compatible = "conclusive,whle-ls1046a", "fsl,ls1046a";
> +
> + chosen {
> + stdout-path =
> + };
> +
> + aliases {
> + spi0 =
> + };
> +};
> +
> + {
> + pcie@340 {
> + status = "okay";
> + };
> +};
> +
> + {
> + status = "okay";
> +
> +
Re: [PATCH v2] arm: Add OVERLAY command to BSS section on ARM64
On Tue, 6 Feb 2024 at 16:44, Ilias Apalodimas
wrote:
>
> Hi Marek,
>
> On Sun, Dec 17, 2023 at 01:33:39AM +0100, Marek Vasut wrote:
> > Avoid allocating and loading the BSS section.
> >
>
> Can we elaborate a bit more on why we need this? AFAICT there's no code
> loading those segments in memory and swapping them, so why do we need the
> OVERLAY? On top of that the ALLOC flag seems to be missing? The .bss
> section doesn't need to be loaded indeed, since we can memset it to 0, but
> it does need proper backing memory.
>
> another thing I noticed is the bss_start and end are defined as sections of
> their own and a bit of git history led me to 3ebd1cbc49f00050. But the
> linker script will emit absolute addresses only if the symbol is defined
> outside a section. IOW applying this makes the value expressed as a fixed
> offset from the base of the section and the bss_start/end sections go away
>
> --- a/arch/arm/cpu/armv8/u-boot.lds
> +++ b/arch/arm/cpu/armv8/u-boot.lds
> @@ -151,17 +151,11 @@ SECTIONS
>
> . = ALIGN(8);
>
> - .bss_start : {
> - KEEP(*(.__bss_start));
> - }
> -
> .bss : {
> + .bss_start = .;
> *(.bss*)
> . = ALIGN(8);
> - }
> -
> - .bss_end : {
> - KEEP(*(.__bss_end));
> + .bss_end = .;
> }
>
> /DISCARD/ : { *(.dynsym) }
Apologies the patch above was wrong. The . in bss_start/end isn't
needed and I was missing a __ before the symbol definition.
The diff below though should produce the same binary without the
bss_start/end sections and the .bss section marked as ALLOC only
diff --git a/arch/arm/cpu/armv8/u-boot.lds b/arch/arm/cpu/armv8/u-boot.lds
index fb6a30c922f7..8105cfd122af 100644
--- a/arch/arm/cpu/armv8/u-boot.lds
+++ b/arch/arm/cpu/armv8/u-boot.lds
@@ -151,17 +151,11 @@ SECTIONS
. = ALIGN(8);
- .bss_start : {
- KEEP(*(.__bss_start));
- }
-
.bss : {
+ __bss_start = .;
*(.bss*)
. = ALIGN(8);
- }
-
- .bss_end : {
- KEEP(*(.__bss_end));
+ __bss_end = .;
}
/DISCARD/ : { *(.dynsym) }
diff --git a/arch/arm/lib/sections.c b/arch/arm/lib/sections.c
index 857879711c6a..59dfc53851a8 100644
--- a/arch/arm/lib/sections.c
+++ b/arch/arm/lib/sections.c
@@ -19,8 +19,8 @@
* aliasing warnings.
*/
-char __bss_start[0] __section(".__bss_start");
-char __bss_end[0] __section(".__bss_end");
+//char __bss_start[0] __section(".__bss_start");
+//char __bss_end[0] __section(".__bss_end");
char __image_copy_start[0] __section(".__image_copy_start");
char __image_copy_end[0] __section(".__image_copy_end");
char __rel_dyn_start[0] __section(".__rel_dyn_start");
>
>
> leads to this:
>
> 11 .bss 90b0 00102b00 00102b00 00112aa0 2**7
> ALLOC
>
> P.S: I am playing around with rewriting the linker script and mapping
> u-boot with proper permissions at least for armv8. If this patch is neeeded
> *now* can someone explain why? Otherwise I'll clean it up once I test my
> patches enough
>
> Thanks
> /Ilias
>
> > $ aarch64-linux-gnu-objdump -Sh u-boot
> >
> > Before:
> > 10 .bss_start 000f21d8 000f21d8 001021d8
> > 2**0
> >CONTENTS, ALLOC, LOAD, DATA
> > 11 .bss 68f8 000f2200 000f2200 001021d8
> > 2**6
> >ALLOC
> > 12 .bss_end 000f8af8 000f8af8 00108af8
> > 2**0
> >CONTENTS, ALLOC, LOAD, DATA
> >
> > After:
> > 10 .bss_start 000bf990 000bf990 001021e0
> > 2**0
> >CONTENTS
> > 11 .bss 68e8 000bf990 000bf990 001021e0
> > 2**4
> >CONTENTS
> > 12 .bss_end 000c6278 000c6278 00108ac8
> > 2**0
> >CONTENTS
> >
> > Signed-off-by: Marek Vasut
> > ---
> > Cc: Simon Glass
> > Cc: Tom Rini
> > ---
> > V2: Replicate arch/arm/cpu/u-boot.lds BSS part verbatim
> > ---
> > arch/arm/cpu/armv8/u-boot.lds | 8 +---
> > 1 file changed, 5 insertions(+), 3 deletions(-)
> >
> > diff --git a/arch/arm/cpu/armv8/u-boot.lds b/arch/arm/cpu/armv8/u-boot.lds
> > index fb6a30c922f..ebdc079552d 100644
> > --- a/arch/arm/cpu/armv8/u-boot.lds
> > +++ b/arch/arm/cpu/armv8/u-boot.lds
> > @@ -151,16 +151,18 @@ SECTIONS
> >
> > . = ALIGN(8);
> >
> > - .bss_start : {
> > + .bss_start __rel_dyn_start (OVERLAY) : {
> > KEEP(*(.__bss_start));
> > + __bss_base = .;
> > }
> >
> > - .bss : {
> > + .bss __bss_base (OVERLAY) : {
> > *(.bss*)
> >. = ALIGN(8);
> > + __bss_limit = .;
> > }
> >
> > - .bss_end : {
> > + .bss_end __bss_limit (OVERLAY) : {
> >
Re: [PATCH v2] rng: Add Turris Mox rWTM RNG driver
Hi there Marek,
Am 05/02/2024 um 12.40 schrieb Marek Behún:
Hello Max,
Out of curiousity, what is your use case for having these random
numbers on this platform in U-Boot?
I use 2 EspressoBin (Armada 3720) as routers, both of them use the
TurrisMox firmware. RNG enables the EFI RNG protocol which inturn allows
systemd-boot to populate the Linux RNG EFI seed config table which
enables ealy initialization of the kernel prng.
The kernel also then allows the use of KASLR. When the kernel is booted
up a module is available to interface with the Firmware to use the RNG
directly.
Also, I'm not sure if this should be part of the patch, this could be
enabled on some default configurations for the Armada 3700.
-- Max
Below are a few more things to change and then you I'll give my
Reviewed-by tag.
On Sun, 21 Jan 2024 21:17:16 +0100
Max Resch wrote:
A RNG driver for Armada 3720 boards running the Turris Mox rWTM firmware
from CZ.NIC in the secure processor.
Signed-off-by: Max Resch
---
Changes in v2:
- Removed ring buffer implementation
drivers/rng/Kconfig | 8 +++
drivers/rng/Makefile | 1 +
drivers/rng/turris_rwtm_rng.c | 122 ++
3 files changed, 131 insertions(+)
create mode 100644 drivers/rng/turris_rwtm_rng.c
diff --git a/drivers/rng/Kconfig b/drivers/rng/Kconfig
index a89c899568..cd72852a47 100644
--- a/drivers/rng/Kconfig
+++ b/drivers/rng/Kconfig
@@ -105,4 +105,12 @@ config RNG_JH7110
help
Enable True Random Number Generator in StarFive JH7110 SoCs.
+config RNG_TURRIS_RWTM
+ bool "Turris Mox TRNG in Secure Processor"
+ depends on DM_RNG && ARMADA_3700
+ help
+ Use TRNG in Turris Mox Secure Processor Firmware. Can be used
+ on other Armada-3700 devices (like EspressoBin) if Secure
+ Firmware from CZ.NIC is used.
+
endif
diff --git a/drivers/rng/Makefile b/drivers/rng/Makefile
index 7e64c4cdfc..ecae1a3da3 100644
--- a/drivers/rng/Makefile
+++ b/drivers/rng/Makefile
@@ -17,3 +17,4 @@ obj-$(CONFIG_RNG_SMCCC_TRNG) += smccc_trng.o
obj-$(CONFIG_RNG_ARM_RNDR) += arm_rndr.o
obj-$(CONFIG_TPM_RNG) += tpm_rng.o
obj-$(CONFIG_RNG_JH7110) += jh7110_rng.o
+obj-$(CONFIG_RNG_TURRIS_RWTM) += turris_rwtm_rng.o
diff --git a/drivers/rng/turris_rwtm_rng.c b/drivers/rng/turris_rwtm_rng.c
new file mode 100644
index 00..143fe0b47f
--- /dev/null
+++ b/drivers/rng/turris_rwtm_rng.c
@@ -0,0 +1,122 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-3-Clause
+/*
+ * Copyright (c) 2024, Max Resch
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+/* size of entropy buffer */
+#define RNG_BUFFER_SIZE128U
+
+struct turris_rwtm_rng_priv {
+ phys_addr_t buffer;
+};
+
+static int turris_rwtm_rng_fill_entropy(phys_addr_t entropy, size_t size)
+{
+ u32 args[3] = { 1, (u32)entropy, size };
+ int ret;
+
+ /* flush data cache */
+ flush_dcache_range(entropy, entropy + size);
+
+ /*
+* get entropy
+* args[0] = 1 copies BYTES array in args[1] of length args[2]
+*/
+ ret = mbox_do_cmd(MBOX_CMD_GET_RANDOM, args, 3, NULL, 0);
+ if (ret < 0)
+ return ret;
+
+ /* invalidate data cache */
+ invalidate_dcache_range(entropy, entropy + size);
+
+ return 0;
+}
+
+static int turris_rwtm_rng_random_read(struct udevice *dev, void *data, size_t
count)
+{
+ phys_addr_t p;
+ size_t size;
+ int ret;
+
+ p = ((struct turris_rwtm_rng_priv *)dev_get_priv(dev))->buffer;
Please declare
struct turris_rwtm_rng_priv *priv = dev_get_priv(dev);
phys_addr_t phys;
size_t size;
int ret;
and then do
phys = priv->buffer;
+ while (count) {
+ size = min_t(size_t, RNG_BUFFER_SIZE, count);
+
+ ret = turris_rwtm_rng_fill_entropy(p, size);
+
+ memcpy(data, (void *)p, size);
+ count -= size;
+ data = (u8 *)data + size;
+ }
+
+ return 0;
+}
+
+static int turris_rwtm_rng_probe(struct udevice *dev)
+{
+ struct turris_rwtm_rng_priv *priv;
= dev_get_priv(dev);
+ u32 args[] = { 0 };
+ int ret;
+
+ /*
+* check if the random command is supported
+* args[0] = 0 would copy 16 DWORDS entropy to out but we ignore them
+*/
+ ret = mbox_do_cmd(MBOX_CMD_GET_RANDOM, args, ARRAY_SIZE(args), NULL, 0);
+
+ if (ret < 0)
+ return ret;
+
+ /* entropy buffer */
+ priv = (struct turris_rwtm_rng_priv *)dev_get_priv(dev);
no need here, do it at the beginning
+ priv->buffer = 0;
+
+ /* buffer address need to be aligned */
+ dma_alloc_coherent(RNG_BUFFER_SIZE, (unsigned long *)>buffer);
+ if (!priv->buffer)
+ return -ENOMEM;
+
+ return 0;
+}
+
+static int turris_rwtm_rng_remove(struct udevice *dev)
+{
+ phys_addr_t p;
rename this to
imx93-var-som: ahab: U-boot is hanging
Hello,
I am using the imx93-var-som_defconfig configuration on commit
v2024.04-rc1. When producing signed or unsigned images on an unclosed
board everything works fine.
However, once the board is closed (ahab_close command is issued), u-boot
hangs this way:
--8<---cut here---start->8---
U-Boot SPL 2024.04-rc1-4-g8494a62b246-dirty (Feb 06 2024 - 15:24:49 +0100)
SOC: 0xa0009300
LC: 0x40040
M33 prepare ok
Normal Boot
Trying to boot from BOOTROM
Boot Stage: USB boot
NOTICE: BL31: v2.6(release):d8bc791fb
NOTICE: BL31: Built : 18:11:44, Mar 15 2023
U-Boot 2024.04-rc1-4-g8494a62b246-dirty (Feb 06 2024 - 15:24:49 +0100)
U-Boot code: 8020 -> 802B4328 BSS: -> 802BA420
CPU: i.MX93 rev1.0
Model: Variscite VAR-SOM-MX93 on Symphony evaluation board
DRAM: Monitor len: 000BA420
Ram size: 8000
Ram top: 1
Reserving 745k for U-Boot at: fff25000
Reserving 32784k for malloc() at: fdf21000
Reserving 152 Bytes for Board Info at: fdf20f60
Reserving 480 Bytes for Global Data at: fdf20d80
Reserving 24832 Bytes for FDT at: fdf1ac80
RAM Configuration:
Bank #0: 8000 2 GiB
Bank #1: 0 0 Bytes
DRAM: 2 GiB
New Stack Pointer is: fdf1ac70
Relocation Offset is: 7fd25000
Relocating to fff25000, new gd at fdf20d80, sp at fdf1ac70
Added memory mapping (5): 8000 8000
Pre-reloc malloc() used 0x17478 bytes (93 KB)
before mem_malloc_init
--8<---cut here---end--->8---
It seems that signature checking is OK because both the SPL and regular
u-boot are started. However, something seems to cause u-boot to hang.
Here I am hanging in initr_malloc function, right in the
mem_malloc_init call:
--8<---cut here---start->8---
static int initr_malloc(void)
{
ulong start;
#if CONFIG_IS_ENABLED(SYS_MALLOC_F)
debug("Pre-reloc malloc() used %#lx bytes (%ld KB)\n", gd->malloc_ptr,
gd->malloc_ptr / 1024);
#endif
/* The malloc area is immediately below the monitor copy in DRAM */
/*
* This value MUST match the value of gd->start_addr_sp in board_f.c:
* reserve_noncached().
*/
start = gd->relocaddr - TOTAL_MALLOC_LEN;
gd_set_malloc_start(start);
debug("before mem_malloc_init\n");
mem_malloc_init((ulong)map_sysmem(start, TOTAL_MALLOC_LEN),
TOTAL_MALLOC_LEN);
debug("after mem_malloc_init\n");
return 0;
}
--8<---cut here---end--->8---
If I add initcall traces, then I'm not going that far:
--8<---cut here---start->8---
U-Boot SPL 2024.04-rc1-4-g8494a62b246-dirty (Feb 06 2024 - 15:06:54 +0100)
SOC: 0xa0009300
LC: 0x40040
M33 prepare ok
Normal Boot
Trying to boot from BOOTROM
Boot Stage: USB boot
NOTICE: BL31: v2.6(release):d8bc791fb
NOTICE: BL31: Built : 18:11:44, Mar 15 2023
initcall: 8027189c
U-Boot 2024.04-rc1-4-g8494a62b246-dirty (Feb 06 2024 - 15:06:54 +0100)
initcall: 8022481c
U-Boot code: 8020 -> 802B43C0 BSS: -> 802BA4A0
initcall: 80224654
initcall: 80203844
CPU: i.MX93 rev1.0
initcall: 80224fdc
Model: Variscite VAR-SOM-MX93 on Symphony evaluation board
initcall: event 8/(unknown)
initcall: 80224850
DRAM: initcall: 802035a8
initcall: 80224bb8
Monitor len: 000BA4A0
Ram size: 8000
Ram top: 1
initcall: 80224640
initcall: 802248b8
initcall: 80202e24
initcall: 802248c0
initcall: 802248c8
initcall: 802247b4
Reserving 745k for U-Boot at: fff25000
initcall: 80224968
Reserving 32784k for malloc() at: fdf21000
initcall: 80224908
Reserving 152 Bytes for Board Info at: fdf20f60
initcall: 802249a8
Reserving 480 Bytes for Global Data at: fdf20d80
initcall: 80224744
Reserving 24832 Bytes for FDT at: fdf1ac80
initcall: 802248d0
initcall: 802248d8
initcall: 802248f8
initcall: 80224c30
initcall: 802035e0
initcall: 802249ec
RAM Configuration:
Bank #0: 8000 2 GiB
Bank #1: 0 0 Bytes
DRAM: 2 GiB
initcall: 80224c44
initcall: 80224720
New Stack Pointer is: fdf1ac70
initcall: 8022465c
initcall: 802248e0
initcall: 802248e8
initcall: 802246a0
Relocation Offset is: 7fd25000
Relocating to fff25000, new gd at fdf20d80, sp at fdf1ac70
initcall: 80224900
initcall: 80227704
initcall: fff49c8c
initcall: fff49c94
initcall: fff4c8c0
initcall: fff49f54
Added memory mapping (5): 8000 8000
initcall: fff49f04
initcall: fff49f74
initcall: fff49ea4
Pre-r
--8<---cut here---end--->8---
and I am stopping in the process of writing the "Pre-reloc ..." trace.
All-in-all, fusing the board seems to change something causing the
previously working
Re: [PATCH v2] arm: Add OVERLAY command to BSS section on ARM64
Hi Marek,
On Sun, Dec 17, 2023 at 01:33:39AM +0100, Marek Vasut wrote:
> Avoid allocating and loading the BSS section.
>
Can we elaborate a bit more on why we need this? AFAICT there's no code
loading those segments in memory and swapping them, so why do we need the
OVERLAY? On top of that the ALLOC flag seems to be missing? The .bss
section doesn't need to be loaded indeed, since we can memset it to 0, but
it does need proper backing memory.
another thing I noticed is the bss_start and end are defined as sections of
their own and a bit of git history led me to 3ebd1cbc49f00050. But the
linker script will emit absolute addresses only if the symbol is defined
outside a section. IOW applying this makes the value expressed as a fixed
offset from the base of the section and the bss_start/end sections go away
--- a/arch/arm/cpu/armv8/u-boot.lds
+++ b/arch/arm/cpu/armv8/u-boot.lds
@@ -151,17 +151,11 @@ SECTIONS
. = ALIGN(8);
- .bss_start : {
- KEEP(*(.__bss_start));
- }
-
.bss : {
+ .bss_start = .;
*(.bss*)
. = ALIGN(8);
- }
-
- .bss_end : {
- KEEP(*(.__bss_end));
+ .bss_end = .;
}
/DISCARD/ : { *(.dynsym) }
leads to this:
11 .bss 90b0 00102b00 00102b00 00112aa0 2**7
ALLOC
P.S: I am playing around with rewriting the linker script and mapping
u-boot with proper permissions at least for armv8. If this patch is neeeded
*now* can someone explain why? Otherwise I'll clean it up once I test my
patches enough
Thanks
/Ilias
> $ aarch64-linux-gnu-objdump -Sh u-boot
>
> Before:
> 10 .bss_start 000f21d8 000f21d8 001021d8
> 2**0
>CONTENTS, ALLOC, LOAD, DATA
> 11 .bss 68f8 000f2200 000f2200 001021d8
> 2**6
>ALLOC
> 12 .bss_end 000f8af8 000f8af8 00108af8
> 2**0
>CONTENTS, ALLOC, LOAD, DATA
>
> After:
> 10 .bss_start 000bf990 000bf990 001021e0
> 2**0
>CONTENTS
> 11 .bss 68e8 000bf990 000bf990 001021e0
> 2**4
>CONTENTS
> 12 .bss_end 000c6278 000c6278 00108ac8
> 2**0
>CONTENTS
>
> Signed-off-by: Marek Vasut
> ---
> Cc: Simon Glass
> Cc: Tom Rini
> ---
> V2: Replicate arch/arm/cpu/u-boot.lds BSS part verbatim
> ---
> arch/arm/cpu/armv8/u-boot.lds | 8 +---
> 1 file changed, 5 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm/cpu/armv8/u-boot.lds b/arch/arm/cpu/armv8/u-boot.lds
> index fb6a30c922f..ebdc079552d 100644
> --- a/arch/arm/cpu/armv8/u-boot.lds
> +++ b/arch/arm/cpu/armv8/u-boot.lds
> @@ -151,16 +151,18 @@ SECTIONS
>
> . = ALIGN(8);
>
> - .bss_start : {
> + .bss_start __rel_dyn_start (OVERLAY) : {
> KEEP(*(.__bss_start));
> + __bss_base = .;
> }
>
> - .bss : {
> + .bss __bss_base (OVERLAY) : {
> *(.bss*)
>. = ALIGN(8);
> + __bss_limit = .;
> }
>
> - .bss_end : {
> + .bss_end __bss_limit (OVERLAY) : {
> KEEP(*(.__bss_end));
> }
>
> --
> 2.43.0
>
Re: [PATCH] xyzModem: Correct xmodem blk verification conditions
On Tue, Feb 06, 2024 at 09:05:33PM +0800, jihongbin wrote: > It may be that there are relatively few people using this function, or the > length of the transmitted data is less than 128byte * 255 byte, so the > triggering conditions for the above problems are not encountered; > > I actually discovered this problem during testing. Continuous transmission > always fails at block 255. > > The following is the protocol's definition of blk cblk, cblk = 255 - blk > The original content of the agreement > (https://www.menie.org/georges/embedded/xmodem_specification.html) is as > follows: > 3. MESSAGE BLOCK LEVEL PROTOCOL > Each block of the transfer looks like: > <255-blk #><--128 data bytes--> > in which: > = 01 hex > = binary number, starts at 01 increments by 1, and > wraps 0FFH to 00H (not to 01) > <255-blk #> = blk # after going thru 8080 "CMA" instr, i.e. > each bit complemented in the 8-bit block number. > Formally, this is the "ones complement". > > = the sum of the data bytes only. Toss any carry. Please repost the patch with these kind of details in the commit message, thanks. -- Tom signature.asc Description: PGP signature
Re: [PATCH 09/10] DONOTMERGE: arm: dts: j721s2: Fix Power domain for VTM node.
On 2/6/2024 5:51 PM, Manorit Chawdhry wrote: Patch is sent to upstream linux [0]. [0]: https://lore.kernel.org/all/20240201-b4-upstream-j721s2-fix-vtm-devid-v2-0-85fd568b7...@ti.com/ Signed-off-by: Manorit Chawdhry --- arch/arm/dts/k3-j721s2-mcu-wakeup.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/dts/k3-j721s2-mcu-wakeup.dtsi b/arch/arm/dts/k3-j721s2-mcu-wakeup.dtsi index 80aa33c58a45..a47cb557dd95 100644 --- a/arch/arm/dts/k3-j721s2-mcu-wakeup.dtsi +++ b/arch/arm/dts/k3-j721s2-mcu-wakeup.dtsi @@ -663,7 +663,7 @@ compatible = "ti,j7200-vtm"; reg = <0x00 0x4204 0x0 0x350>, <0x00 0x4205 0x0 0x350>; - power-domains = <_pds 154 TI_SCI_PD_SHARED>; + power-domains = <_pds 180 TI_SCI_PD_SHARED>; I kind of disagree with this patch as Do not Merge, I understand you want to do this change as part of next sync. But we got already node in u-boot for VTM with incorrect power-domain. I am not sure, with incorrect power-domain, how AVS will be behave. Here are my 2 cents Either mark this patch part of series or Hold AVS till next sync #thermal-sensor-cells = <1>; };
Re: [PATCH] xyzModem: Correct xmodem blk verification conditions
On Tue, Feb 06, 2024 at 09:05:33PM +0800, jihongbin wrote:
> It may be that there are relatively few people using this function, or the
> length of the transmitted data is less than 128byte * 255 byte, so the
> triggering conditions for the above problems are not encountered;
>
> I actually discovered this problem during testing. Continuous transmission
> always fails at block 255.
>
> The following is the protocol's definition of blk cblk, cblk = 255 - blk
> The original content of the agreement
> (https://www.menie.org/georges/embedded/xmodem_specification.html) is as
> follows:
> 3. MESSAGE BLOCK LEVEL PROTOCOL
> Each block of the transfer looks like:
> <255-blk #><--128 data bytes-->
> in which:
> = 01 hex
> = binary number, starts at 01 increments by 1, and
> wraps 0FFH to 00H (not to 01)
> <255-blk #> = blk # after going thru 8080 "CMA" instr, i.e.
> each bit complemented in the 8-bit block number.
> Formally, this is the "ones complement".
>
> = the sum of the data bytes only. Toss any carry.
>
Thanks, this is good information. Unfortunately, your patch is not
correct.
Originally you wrote "When the blk sequence number is 255 and cblk is
0, the original XOR condition produces a result of 0, and the judgment
condition will be unsuccessful."
If blk is 255 the cblk should be zero as you say.
common/xyzModem.c
375/* Validate the message */
376if ((xyz.blk ^ xyz.cblk) != (unsigned char) 0xFF)
377 {
378ZM_DEBUG (zm_dprintf
379 ("Framing error - blk: %x/%x/%x\n", xyz.blk, xyz.cblk,
380 (xyz.blk ^ xyz.cblk)));
0xff ^ 0 is equal to 0xFF so it won't print an error. Good!
With your patch, there is an issue with type promotion so the condition
is always true and it will mark everything as a "Framming error".
- if ((xyz.blk ^ xyz.cblk) != (unsigned char) 0xFF)
+ if (~xyz.blk != xyz.cblk)
Both xyz.blk and xyz.cblk are type unsigned char. If you take the
~ of an unsigned char it's going to be 0xffXX where XX are the
a variable bits. That's never going to be equal to xyz.cblk.
You could truncate it to char like this:
+ if ((unsigned char)~xyz.blk != xyz.cblk)
But then it works exactly the same as the original condition.
regards,
dan carpenter
[PATCH] memory: ti-gpmc: Fix lock up at A53 SPL during NAND boot on AM64-EVM
AM64 ES2.0 bootrom seems to enable WAIT0EDGEDETECTION interrupt. This causes a lockup at A53 SPL when accessing NAND controller or ELM registers. A good option would be to softrest GPMC block at probe but this cannot be done for AM64 as SOFTRESET bit is marked as reserved in SYSCONFIG register. Fix the issue by disabling all IRQs at probe. Signed-off-by: Roger Quadros --- drivers/memory/ti-gpmc.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/drivers/memory/ti-gpmc.c b/drivers/memory/ti-gpmc.c index 0b8674339e..8877b8f438 100644 --- a/drivers/memory/ti-gpmc.c +++ b/drivers/memory/ti-gpmc.c @@ -1196,6 +1196,12 @@ static int gpmc_probe(struct udevice *dev) gpmc_cfg = (struct gpmc *)priv->base; gpmc_base = priv->base; + /* +* Disable all IRQs as some bootroms might leave them enabled +* and that will cause a lock-up later +*/ + gpmc_write_reg(GPMC_IRQENABLE, 0); + priv->l3_clk = devm_clk_get(dev, "fck"); if (IS_ERR(priv->l3_clk)) return PTR_ERR(priv->l3_clk); base-commit: 28760ce8640ff6266bd1c1c568a4a231576f3919 -- 2.34.1
Re: [PATCH] xyzModem: Correct xmodem blk verification conditions
It may be that there are relatively few people using this function, or
the length of the transmitted data is less than 128byte * 255 byte, so
the triggering conditions for the above problems are not encountered;
I actually discovered this problem during testing. Continuous
transmission always fails at block 255.
The following is the protocol's definition of blk cblk, cblk = 255 - blk
The original content of the agreement
(https://www.menie.org/georges/embedded/xmodem_specification.html) is as
follows:
3. MESSAGE BLOCK LEVEL PROTOCOL
Each block of the transfer looks like:
<255-blk #><--128 data bytes-->
in which:
= 01 hex
= binary number, starts at 01 increments by 1, and
wraps 0FFH to 00H (not to 01)
<255-blk #> = blk # after going thru 8080 "CMA" instr, i.e.
each bit complemented in the 8-bit block number.
Formally, this is the "ones complement".
= the sum of the data bytes only. Toss any carry.
在 2024/2/5 22:25, Dan Carpenter 写道:
On Mon, Feb 05, 2024 at 02:58:50PM +0800, Hongbin Ji wrote:
When the blk sequence number is 255 and cblk is 0, the original XOR condition
produces a result of 0,and the judgment condition will be unsuccessful.
This code is 18 years old so it's surprising that it's causing an issue
now. This was added in commit f2841d377060 ("Add support for ymodem
protocol (loady command). Patch by Stefano Babic, 29 Mar 2006").
Not just 255 and zero but any time "blk == 255 - cblk" then your new
condition will be true where the original condition was false. Is that
really intentional? Is this from reviewing documentation or something?
What documents? Or is it from testing?
regards,
dan carpenter
Re: [PATCH] xyzModem: Correct xmodem blk verification conditions
This is a duplicate, please ignore
在 2024/2/6 10:49, Hongbin Ji 写道:
When the blk sequence number is 255 and cblk is 0, the original XOR condition
produces a result of 0,and the judgment condition will be unsuccessful.
Signed-off-by: Hongbin Ji
---
common/xyzModem.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/common/xyzModem.c b/common/xyzModem.c
index fb319f7119..0bc1a87067 100644
--- a/common/xyzModem.c
+++ b/common/xyzModem.c
@@ -373,7 +373,7 @@ xyzModem_get_hdr (void)
}
ZM_DEBUG (zm_dump (__LINE__));
/* Validate the message */
- if ((xyz.blk ^ xyz.cblk) != (unsigned char) 0xFF)
+ if (~xyz.blk != xyz.cblk)
{
ZM_DEBUG (zm_dprintf
("Framing error - blk: %x/%x/%x\n", xyz.blk, xyz.cblk,
Re: [PATCH] xyzModem: Correct xmodem blk verification conditions
On Tue, Feb 06, 2024 at 10:49:25AM +0800, Hongbin Ji wrote:
> When the blk sequence number is 255 and cblk is 0, the original XOR condition
> produces a result of 0,and the judgment condition will be unsuccessful.
>
> Signed-off-by: Hongbin Ji
> ---
> common/xyzModem.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/common/xyzModem.c b/common/xyzModem.c
> index fb319f7119..0bc1a87067 100644
> --- a/common/xyzModem.c
> +++ b/common/xyzModem.c
> @@ -373,7 +373,7 @@ xyzModem_get_hdr (void)
> }
>ZM_DEBUG (zm_dump (__LINE__));
>/* Validate the message */
> - if ((xyz.blk ^ xyz.cblk) != (unsigned char) 0xFF)
> + if (~xyz.blk != xyz.cblk)
> {
>ZM_DEBUG (zm_dprintf
> ("Framing error - blk: %x/%x/%x\n", xyz.blk, xyz.cblk,
As Dan noted before, this is very old code. Is there a problem you're
encountering in the real world? What has brought you to see a problem
and make a change here? Thanks.
--
Tom
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Description: PGP signature
Re: [PATCH 00/10] Add AVS support for J721S2
On Tue, Feb 06, 2024 at 05:51:07PM +0530, Manorit Chawdhry wrote: > This series does the DT sync with Linux 6.8-rc1 as that has the pmic > nodes required for AVS support and then adds AVS Support for J721S2. > > AVS Test for J721S2: > https://gist.github.com/manorit2001/d7690ded6ef685aa8ffa5b16746cc529 > Boot Test results: > https://gist.github.com/manorit2001/6775d721b3df5a690497d94d012b93c4 > > Signed-off-by: Manorit Chawdhry > --- > Manorit Chawdhry (10): > arm: dts: k3-j721s2*: Sync with 6.8-rc1 > arm: dts: k3-am68*: Sync with 6.8-rc1 The starting point for this series should be to build on top of Sumit's OF_UPSTREAM series. > DONOTMERGE: arm: dts: j721s2: Fix Power domain for VTM node. And please make sure to mark the series as RFC if there's DONOTMERGE parts in it, thanks. -- Tom signature.asc Description: PGP signature
Re: [PATCH v4] remoteproc: uclass: Add methods to load firmware to rproc and boot rproc
On 06/02/2024 07:31, MD Danish Anwar wrote:
>
>
> On 05/02/24 6:07 pm, Roger Quadros wrote:
>>
>>
>> On 05/02/2024 12:20, MD Danish Anwar wrote:
>>>
>>>
>>> On 05/02/24 3:36 pm, Roger Quadros wrote:
On 02/02/2024 18:40, Anwar, Md Danish wrote:
> Hi Roger,
>
> On 2/2/2024 4:49 PM, Roger Quadros wrote:
>>
>>
>> On 30/01/2024 08:33, MD Danish Anwar wrote:
>>> Add APIs to set a firmware_name to a rproc and boot the rproc with the
>>> same firmware.
>>>
>
>
>
>
>> How does caller know what firmware size to set to?
>> This should already be private to the rproc as it knows
>> how large is its program memory.
>>
>
> Caller is trying to boot the rproc with a firmware binary. Caller should
> know the size of binary that it wants to load to rproc core. Caller will
> specify the binary size to rproc_boot(). Based on the size provided by
> caller, rproc_boot() will then allocate that much memory and call
> request_firmware_into_buf() with the size and allocated buffer. If the
> caller doesn't provide minimum size rproc_load() will fail.
Caller only knows the filename. It need not know more details.
>>>
>>> Caller is trying to load a file of it's choice to a rproc. Caller should
>>> know the size of file it is trying to load or atleast the max size that
>>> the firmware file could be of.
>>>
>>>
Also see my comment below about rproc_boot() API.
>
> rproc_load() calls respective driver ops, for example: pru_load().
> pru_load() [1] API checks the required size of firmware to load by
> casting the buffer into Elf32_Ehdr and Elf32_Phdr and returns error if
> size provided by caller is less than this.
>
>
> if (offset + filesz > size) {
> dev_dbg(dev, "truncated fw: need 0x%x avail 0x%zx\n",
> offset + filesz, size);
> ret = -EINVAL;
> break;
> }
>
>>> + *
>>> + * Boot a remote processor (i.e. load its firmware, power it on, ...).
>>> + *
>>> + * This function first loads the firmware set in the uclass pdata of
>>> Remote
>>> + * processor to a buffer and then loads firmware to the remote
>>> processor
>>> + * using rproc_load().
>>> + *
>>> + * Return: 0 on success, and an appropriate error value otherwise
>>> + */
>>> +int rproc_boot(struct udevice *rproc_dev, size_t fw_size);
>>
>> Was wondering if you need separate API for rproc_set_firmware or we can
>> just
>> pass firmware name as argument to rproc_boot()?
>>
>
> Technically we can. But when we discussed this approach first in v1, you
> had asked to keep the APIs similar to upstream linux. Upstream linux has
> these two APIs so I kept it that way. If you want I can drop the first
> API. Please let me know.
Sure you can keep it as it is in Linux, but there, rproc_boot doesn't
take fw_size argument. So wondering why you should have it in u-boot.
>>>
>>> For loading firmware to a rproc core in u-boot, it's first neccassry to
>>> load the firmware into buffer and then load that buffer into rproc core
>>> using rproc_load() API. Now to load the firmware to a buffer ther is an
>>> API request_firmware_into_buf(). This API takes size of firmware as one
>>> of it's argument. So in order to call this API from rproc_boot() we need
>>> to pass fw_size to rproc_boot()
>>>
>>> Other u-boot drivers using request_firmware_into_buf() are also passing
>>> size of firmware from their driver.
>>
>> But in your driver you didn't use size of firmware but some 64K
>> https://lore.kernel.org/all/20240124064930.1787929-8-danishan...@ti.com/
>>
>
> Yes, in driver I am hardcoding the size to 64K. That's because I know
> the size of ICSSG firmwares are less than 64K. Instead of hardcoding I
What if you enable debugging symbols in the firmware file. Won't it exceed 64KB?
It is not a good idea to assume any firmware file size as it will eventually
break sometime in the future and will be a pain to debug.
> can also define macro or provide a config option where we set the size
> and the driver will read the size from the config and call rproc_boot()
> with size.
>
> For example, fm.c driver reads the size from config option
> CONFIG_SYS_QE_FMAN_FW_LENGTH [1] and calls request_firmware_into_buf()
>
> [1]
> https://elixir.bootlin.com/u-boot/latest/source/drivers/net/fm/fm.c#L458
>
>> So neither does the caller have a clue of firmware size?
>>
>>>
>>> If rproc_boot() doesn't take fw_size as argument then within
>>> rproc_boot() we need to figure out the fw_size before calling
>>> request_firmware_into_buf().
>>>
>>> If we don't know the size / maximum size of the firmware to load, how
>>> will we call request_firmware_into_buf(). Someone has to tell
>>> request_firmware_into_buf() the size of firmware. I am expecting that to
>>> be the caller. Do you
Re: [PATCH v5 00/11] An effort to bring DT bindings compliance within U-Boot
On Tue, Feb 06, 2024 at 10:57:12AM +0530, Sumit Garg wrote: > Hi Tom, > > On Fri, 2 Feb 2024 at 23:32, Tom Rini wrote: > > > > On Fri, Feb 02, 2024 at 06:35:23PM +0530, Sumit Garg wrote: > > > > > Changes in v5: > > > -- > > > - Rebased on tip of master (050a9b981d6a835133521b599be3ae189ce70f41) > > > - Created v5_dt branch for testing purposes: > > > https://github.com/b49020/u-boot/tree/v5_dt > > > - Patch #6: Added support to cherry-pick fixes in subtree update script. > > > Also, used https:// instead of git://. > > > - Patch #7: Fixed inappropriate documentation update. > > > - Patch #8: Document how to cherry-pick fixes from devicetree-rebasing > > > tree. > > > > OK, for v6 please push this through CI. I've started a run now to check > > other things, but just sandbox currently fails to build right now. > > Yeah it looks like patch#3 rework in v4 has broken EFI capsule .dtsi > file generation logic which should be fixed by add-on fix [1] for > patch#3. The github CI passes [2] with that included. I suppose the > gitlab CI should be fine too. If its fine for your testing as well > then I will incorporate it in v6. > > [1] > https://github.com/u-boot/u-boot/pull/484/commits/d796c34307cd363674e0d0d2e31618643ac8e76c > [2] https://github.com/u-boot/u-boot/pull/484 Yup, if Azure passes GitLab should pass too. I think you should wait to repost v6 until you and Marek agree about how we are (and perhaps aren't) handling fixes to dts files. -- Tom signature.asc Description: PGP signature
Re: [PATCH] lib: sparse: Fix error checking for write_sparse_chunk_raw
Hi, On Thu, 01 Feb 2024 13:18:51 -0500, Sean Anderson wrote: > The return value of write_sparse_chunk_raw is unsigned, so the existing > check has no effect. Use IS_ERR_VALUE to detect error instead, which is > what write_sparse_chunk_raw does itself. > > Thanks, Applied to https://source.denx.de/u-boot/custodians/u-boot-dfu (u-boot-dfu) [1/1] lib: sparse: Fix error checking for write_sparse_chunk_raw https://source.denx.de/u-boot/custodians/u-boot-dfu/-/commit/09709a57d8b11fa021f54b9346c1dee1dbe282fb -- Mattijs
Re: [PATCH 08/18] rockchip: pine64: rockpro64: migrate to rockchip_early_misc_init_r
On 2024-02-06 13:37, Quentin Schulz wrote:
On 2/6/24 13:33, Dragan Simic wrote:
On 2024-02-06 13:26, Quentin Schulz wrote:
On 2/4/24 11:39, Dragan Simic wrote:
On 2024-02-04 10:46, Jonas Karlman wrote:
On 2024-02-04 05:21, Dragan Simic wrote:
On 2024-02-03 16:18, Dragan Simic wrote:
On 2024-02-03 15:18, Jonas Karlman wrote:
On 2024-02-03 14:19, Dragan Simic wrote:
We should add more ifdef guards to rockchip_setup_macaddr(),
to prevent the execution of its body for devices such as the
ones listed above, which eliminates the unneeded code from the
resulting U-Boot images, making them a bit smaller, and saves
some CPU cycles and a bit of time on boot. It also prevents
the unneeded "ethaddr" and "eth1addr" variables from being
added to the environment.
Adding the ethernet addresses only adds a few ms to boot, if you
care
about boot speed, please look into if we can disable
CONFIG_USE_PREBOOT
for these boards, running "usb start" as preboot adds several
seconds
to the boot.
I see, but I personally don't care that much about how long the
U-Boot takes to execute; a couple of seconds more don't bother
me
much. I care more about excluding the unneded code.
The patch below should do the trick, which also performs a few
small code cleanups for additional file-level consistency:
diff --git a/arch/arm/mach-rockchip/misc.c
b/arch/arm/mach-rockchip/misc.c
index 7d03f0c2b679..ed5bdab5a648 100644
--- a/arch/arm/mach-rockchip/misc.c
+++ b/arch/arm/mach-rockchip/misc.c
@@ -23,7 +23,8 @@
int rockchip_setup_macaddr(void)
{
-#if CONFIG_IS_ENABLED(HASH) && CONFIG_IS_ENABLED(SHA256)
+#if CONFIG_IS_ENABLED(HASH) && CONFIG_IS_ENABLED(SHA256) && \
+ CONFIG_IS_ENABLED(GMAC_ROCKCHIP)
This would exclude any board not enabling GMAC_ROCKCHIP in
U-Boot
but
want a mac-address being set in DT fixup. And for newer RK35xx
SoCs
the
GMAC_ROCKCHIP driver is not used.
Thanks for pointing that out. Not good.
A new Kconfig option should be introduced if there is a need for
some
boards to disable this.
Is there any simpler way to achieve that? If there isn't,
perhaps
we could leave rockchip_setup_macaddr() generate the MAC address
and rely on fdt_fixup_ethernet() ending up doing nothing when no
ethernetX aliases exist.
As Chen-Yu Tsai pointed out in one of my prior patches [2]:
The user might be loading a custom FDT for the kernel, or have DT
overlays stacked on, either could have the "ethernet1" alias while
the U-boot DT doesn't.
So the common rockchip_setup_macaddr() cannot rely on checking for
ethernetX alias, because the fixup may not run against the bundled
DT.
[2]
https://lore.kernel.org/u-boot/CAGb2v66hR5e3nBPZ0C3=h29fs4um7whfbu7xtai1srbzxra...@mail.gmail.com/
I see, we unfortunately cannot know the final outcome in advance, to
be able to avoid polluting the environment by adding the "eth1addr"
variable if it actually isn't needed, for example.
Though, why can't the user supply an FDT that contains ethernetX
aliases 0 through 2, for example, in which case we wouldn't provide
a stable MAC address for ethernet2? Am I missing something, i.e. is
there something preventing an ethernet2 alias from being present?
After going through the source code once again, I think that
adding
new configuration option would be warranted, because it would
exclude
two sizable chunks of code from the resulting U-Boot images, and
because it would avoid polluting the environment with a couple of
unneeded variables.
Yes a new Kconfig option would be preferred.
I'll go ahead and implement this, and I hope that the patch will
be
received well.
Great :-)
Thanks. :) Got it implemented already and tested a bit. I need to
write the patch and series summaries, and I'll send them over.
Regarding the above-described uncertainty about what ethernetX
aliases
the final FDT containts, I'd say that ignoring the ethernetX aliases
completely for the Pinebook Pro and the Pinephone Pro is safe and
valid,
because those are actual devices, instead of being development
boards
for which the final hardware configuration is determined by the
user.
I can hardly see anyone adding an Ethernet interface to them, except
by plugging in a USB Ethernet dongle.
I hope you agree.
What should be done with the patches for Pinephone/Pinebook Pro then?
Since I was asked to wait on your answer/patches before respinning
the
patch series, I would like to know what to do with them :) Drop the
patches for now or keep them as is?
Your patches are fine, just please update their subjects as I already
suggested. The patches I'll send a bit later will resolve the issues
I raised previously for your patches, together with doing a bit more,
so there's no need to change your patches further.
I would rather not break devices if I have a choice. Is merging those
patches without yours going to break those devices?
Don't worry, I don't see how they could end up broken that way. There
should only be some redundant code built into the
Re: [PATCH 08/18] rockchip: pine64: rockpro64: migrate to rockchip_early_misc_init_r
Hi Dragan,
On 2/6/24 13:33, Dragan Simic wrote:
[Some people who received this message don't often get email from
dsi...@manjaro.org. Learn why this is important at
https://aka.ms/LearnAboutSenderIdentification ]
Hello Quentin,
On 2024-02-06 13:26, Quentin Schulz wrote:
On 2/4/24 11:39, Dragan Simic wrote:
On 2024-02-04 10:46, Jonas Karlman wrote:
On 2024-02-04 05:21, Dragan Simic wrote:
On 2024-02-03 16:18, Dragan Simic wrote:
On 2024-02-03 15:18, Jonas Karlman wrote:
On 2024-02-03 14:19, Dragan Simic wrote:
We should add more ifdef guards to rockchip_setup_macaddr(),
to prevent the execution of its body for devices such as the
ones listed above, which eliminates the unneeded code from the
resulting U-Boot images, making them a bit smaller, and saves
some CPU cycles and a bit of time on boot. It also prevents
the unneeded "ethaddr" and "eth1addr" variables from being
added to the environment.
Adding the ethernet addresses only adds a few ms to boot, if you
care
about boot speed, please look into if we can disable
CONFIG_USE_PREBOOT
for these boards, running "usb start" as preboot adds several
seconds
to the boot.
I see, but I personally don't care that much about how long the
U-Boot takes to execute; a couple of seconds more don't bother me
much. I care more about excluding the unneded code.
The patch below should do the trick, which also performs a few
small code cleanups for additional file-level consistency:
diff --git a/arch/arm/mach-rockchip/misc.c
b/arch/arm/mach-rockchip/misc.c
index 7d03f0c2b679..ed5bdab5a648 100644
--- a/arch/arm/mach-rockchip/misc.c
+++ b/arch/arm/mach-rockchip/misc.c
@@ -23,7 +23,8 @@
int rockchip_setup_macaddr(void)
{
-#if CONFIG_IS_ENABLED(HASH) && CONFIG_IS_ENABLED(SHA256)
+#if CONFIG_IS_ENABLED(HASH) && CONFIG_IS_ENABLED(SHA256) && \
+ CONFIG_IS_ENABLED(GMAC_ROCKCHIP)
This would exclude any board not enabling GMAC_ROCKCHIP in U-Boot
but
want a mac-address being set in DT fixup. And for newer RK35xx
SoCs
the
GMAC_ROCKCHIP driver is not used.
Thanks for pointing that out. Not good.
A new Kconfig option should be introduced if there is a need for
some
boards to disable this.
Is there any simpler way to achieve that? If there isn't, perhaps
we could leave rockchip_setup_macaddr() generate the MAC address
and rely on fdt_fixup_ethernet() ending up doing nothing when no
ethernetX aliases exist.
As Chen-Yu Tsai pointed out in one of my prior patches [2]:
The user might be loading a custom FDT for the kernel, or have DT
overlays stacked on, either could have the "ethernet1" alias while
the U-boot DT doesn't.
So the common rockchip_setup_macaddr() cannot rely on checking for
ethernetX alias, because the fixup may not run against the bundled
DT.
[2]
https://lore.kernel.org/u-boot/CAGb2v66hR5e3nBPZ0C3=h29fs4um7whfbu7xtai1srbzxra...@mail.gmail.com/
I see, we unfortunately cannot know the final outcome in advance, to
be able to avoid polluting the environment by adding the "eth1addr"
variable if it actually isn't needed, for example.
Though, why can't the user supply an FDT that contains ethernetX
aliases 0 through 2, for example, in which case we wouldn't provide
a stable MAC address for ethernet2? Am I missing something, i.e. is
there something preventing an ethernet2 alias from being present?
After going through the source code once again, I think that adding
new configuration option would be warranted, because it would
exclude
two sizable chunks of code from the resulting U-Boot images, and
because it would avoid polluting the environment with a couple of
unneeded variables.
Yes a new Kconfig option would be preferred.
I'll go ahead and implement this, and I hope that the patch will be
received well.
Great :-)
Thanks. :) Got it implemented already and tested a bit. I need to
write the patch and series summaries, and I'll send them over.
Regarding the above-described uncertainty about what ethernetX aliases
the final FDT containts, I'd say that ignoring the ethernetX aliases
completely for the Pinebook Pro and the Pinephone Pro is safe and
valid,
because those are actual devices, instead of being development boards
for which the final hardware configuration is determined by the user.
I can hardly see anyone adding an Ethernet interface to them, except
by plugging in a USB Ethernet dongle.
I hope you agree.
What should be done with the patches for Pinephone/Pinebook Pro then?
Since I was asked to wait on your answer/patches before respinning the
patch series, I would like to know what to do with them :) Drop the
patches for now or keep them as is?
Your patches are fine, just please update their subjects as I already
suggested. The patches I'll send a bit later will resolve the issues
I raised previously for your patches, together with doing a bit more,
so there's no need to change your patches further.
I would rather not break devices if I have a choice. Is merging those
patches without yours going to break
Re: [PATCH 08/18] rockchip: pine64: rockpro64: migrate to rockchip_early_misc_init_r
Hello Quentin,
On 2024-02-06 13:26, Quentin Schulz wrote:
On 2/4/24 11:39, Dragan Simic wrote:
On 2024-02-04 10:46, Jonas Karlman wrote:
On 2024-02-04 05:21, Dragan Simic wrote:
On 2024-02-03 16:18, Dragan Simic wrote:
On 2024-02-03 15:18, Jonas Karlman wrote:
On 2024-02-03 14:19, Dragan Simic wrote:
We should add more ifdef guards to rockchip_setup_macaddr(),
to prevent the execution of its body for devices such as the
ones listed above, which eliminates the unneeded code from the
resulting U-Boot images, making them a bit smaller, and saves
some CPU cycles and a bit of time on boot. It also prevents
the unneeded "ethaddr" and "eth1addr" variables from being
added to the environment.
Adding the ethernet addresses only adds a few ms to boot, if you
care
about boot speed, please look into if we can disable
CONFIG_USE_PREBOOT
for these boards, running "usb start" as preboot adds several
seconds
to the boot.
I see, but I personally don't care that much about how long the
U-Boot takes to execute; a couple of seconds more don't bother me
much. I care more about excluding the unneded code.
The patch below should do the trick, which also performs a few
small code cleanups for additional file-level consistency:
diff --git a/arch/arm/mach-rockchip/misc.c
b/arch/arm/mach-rockchip/misc.c
index 7d03f0c2b679..ed5bdab5a648 100644
--- a/arch/arm/mach-rockchip/misc.c
+++ b/arch/arm/mach-rockchip/misc.c
@@ -23,7 +23,8 @@
int rockchip_setup_macaddr(void)
{
-#if CONFIG_IS_ENABLED(HASH) && CONFIG_IS_ENABLED(SHA256)
+#if CONFIG_IS_ENABLED(HASH) && CONFIG_IS_ENABLED(SHA256) && \
+ CONFIG_IS_ENABLED(GMAC_ROCKCHIP)
This would exclude any board not enabling GMAC_ROCKCHIP in U-Boot
but
want a mac-address being set in DT fixup. And for newer RK35xx
SoCs
the
GMAC_ROCKCHIP driver is not used.
Thanks for pointing that out. Not good.
A new Kconfig option should be introduced if there is a need for
some
boards to disable this.
Is there any simpler way to achieve that? If there isn't, perhaps
we could leave rockchip_setup_macaddr() generate the MAC address
and rely on fdt_fixup_ethernet() ending up doing nothing when no
ethernetX aliases exist.
As Chen-Yu Tsai pointed out in one of my prior patches [2]:
The user might be loading a custom FDT for the kernel, or have DT
overlays stacked on, either could have the "ethernet1" alias while
the U-boot DT doesn't.
So the common rockchip_setup_macaddr() cannot rely on checking for
ethernetX alias, because the fixup may not run against the bundled
DT.
[2]
https://lore.kernel.org/u-boot/CAGb2v66hR5e3nBPZ0C3=h29fs4um7whfbu7xtai1srbzxra...@mail.gmail.com/
I see, we unfortunately cannot know the final outcome in advance, to
be able to avoid polluting the environment by adding the "eth1addr"
variable if it actually isn't needed, for example.
Though, why can't the user supply an FDT that contains ethernetX
aliases 0 through 2, for example, in which case we wouldn't provide
a stable MAC address for ethernet2? Am I missing something, i.e. is
there something preventing an ethernet2 alias from being present?
After going through the source code once again, I think that adding
new configuration option would be warranted, because it would
exclude
two sizable chunks of code from the resulting U-Boot images, and
because it would avoid polluting the environment with a couple of
unneeded variables.
Yes a new Kconfig option would be preferred.
I'll go ahead and implement this, and I hope that the patch will be
received well.
Great :-)
Thanks. :) Got it implemented already and tested a bit. I need to
write the patch and series summaries, and I'll send them over.
Regarding the above-described uncertainty about what ethernetX aliases
the final FDT containts, I'd say that ignoring the ethernetX aliases
completely for the Pinebook Pro and the Pinephone Pro is safe and
valid,
because those are actual devices, instead of being development boards
for which the final hardware configuration is determined by the user.
I can hardly see anyone adding an Ethernet interface to them, except
by plugging in a USB Ethernet dongle.
I hope you agree.
What should be done with the patches for Pinephone/Pinebook Pro then?
Since I was asked to wait on your answer/patches before respinning the
patch series, I would like to know what to do with them :) Drop the
patches for now or keep them as is?
Your patches are fine, just please update their subjects as I already
suggested. The patches I'll send a bit later will resolve the issues
I raised previously for your patches, together with doing a bit more,
so there's no need to change your patches further.
Re: [PATCH 08/18] rockchip: pine64: rockpro64: migrate to rockchip_early_misc_init_r
Hi Dragan, Jonas,
On 2/4/24 11:39, Dragan Simic wrote:
[Some people who received this message don't often get email from
dsi...@manjaro.org. Learn why this is important at
https://aka.ms/LearnAboutSenderIdentification ]
Hello Jonas,
On 2024-02-04 10:46, Jonas Karlman wrote:
On 2024-02-04 05:21, Dragan Simic wrote:
On 2024-02-03 16:18, Dragan Simic wrote:
On 2024-02-03 15:18, Jonas Karlman wrote:
On 2024-02-03 14:19, Dragan Simic wrote:
We should add more ifdef guards to rockchip_setup_macaddr(),
to prevent the execution of its body for devices such as the
ones listed above, which eliminates the unneeded code from the
resulting U-Boot images, making them a bit smaller, and saves
some CPU cycles and a bit of time on boot. It also prevents
the unneeded "ethaddr" and "eth1addr" variables from being
added to the environment.
Adding the ethernet addresses only adds a few ms to boot, if you
care
about boot speed, please look into if we can disable
CONFIG_USE_PREBOOT
for these boards, running "usb start" as preboot adds several
seconds
to the boot.
I see, but I personally don't care that much about how long the
U-Boot takes to execute; a couple of seconds more don't bother me
much. I care more about excluding the unneded code.
The patch below should do the trick, which also performs a few
small code cleanups for additional file-level consistency:
diff --git a/arch/arm/mach-rockchip/misc.c
b/arch/arm/mach-rockchip/misc.c
index 7d03f0c2b679..ed5bdab5a648 100644
--- a/arch/arm/mach-rockchip/misc.c
+++ b/arch/arm/mach-rockchip/misc.c
@@ -23,7 +23,8 @@
int rockchip_setup_macaddr(void)
{
-#if CONFIG_IS_ENABLED(HASH) && CONFIG_IS_ENABLED(SHA256)
+#if CONFIG_IS_ENABLED(HASH) && CONFIG_IS_ENABLED(SHA256) && \
+ CONFIG_IS_ENABLED(GMAC_ROCKCHIP)
This would exclude any board not enabling GMAC_ROCKCHIP in U-Boot
but
want a mac-address being set in DT fixup. And for newer RK35xx SoCs
the
GMAC_ROCKCHIP driver is not used.
Thanks for pointing that out. Not good.
A new Kconfig option should be introduced if there is a need for
some
boards to disable this.
Is there any simpler way to achieve that? If there isn't, perhaps
we could leave rockchip_setup_macaddr() generate the MAC address
and rely on fdt_fixup_ethernet() ending up doing nothing when no
ethernetX aliases exist.
As Chen-Yu Tsai pointed out in one of my prior patches [2]:
The user might be loading a custom FDT for the kernel, or have DT
overlays stacked on, either could have the "ethernet1" alias while
the U-boot DT doesn't.
So the common rockchip_setup_macaddr() cannot rely on checking for
ethernetX alias, because the fixup may not run against the bundled DT.
[2]
https://lore.kernel.org/u-boot/CAGb2v66hR5e3nBPZ0C3=h29fs4um7whfbu7xtai1srbzxra...@mail.gmail.com/
I see, we unfortunately cannot know the final outcome in advance, to
be able to avoid polluting the environment by adding the "eth1addr"
variable if it actually isn't needed, for example.
Though, why can't the user supply an FDT that contains ethernetX
aliases 0 through 2, for example, in which case we wouldn't provide
a stable MAC address for ethernet2? Am I missing something, i.e. is
there something preventing an ethernet2 alias from being present?
After going through the source code once again, I think that adding
new configuration option would be warranted, because it would exclude
two sizable chunks of code from the resulting U-Boot images, and
because it would avoid polluting the environment with a couple of
unneeded variables.
Yes a new Kconfig option would be preferred.
I'll go ahead and implement this, and I hope that the patch will be
received well.
Great :-)
Thanks. :) Got it implemented already and tested a bit. I need to
write the patch and series summaries, and I'll send them over.
Regarding the above-described uncertainty about what ethernetX aliases
the final FDT containts, I'd say that ignoring the ethernetX aliases
completely for the Pinebook Pro and the Pinephone Pro is safe and valid,
because those are actual devices, instead of being development boards
for which the final hardware configuration is determined by the user.
I can hardly see anyone adding an Ethernet interface to them, except
by plugging in a USB Ethernet dongle.
I hope you agree.
What should be done with the patches for Pinephone/Pinebook Pro then?
Since I was asked to wait on your answer/patches before respinning the
patch series, I would like to know what to do with them :) Drop the
patches for now or keep them as is?
Cheers,
Quentin
[PATCH 10/10] configs: j721s2_evm_r5_defconfig: Add AVS Configs
Add AVS and PMIC regulator configs Signed-off-by: Manorit Chawdhry --- configs/j721s2_evm_r5_defconfig | 6 ++ 1 file changed, 6 insertions(+) diff --git a/configs/j721s2_evm_r5_defconfig b/configs/j721s2_evm_r5_defconfig index b180f6c48c0e..847758bb5334 100644 --- a/configs/j721s2_evm_r5_defconfig +++ b/configs/j721s2_evm_r5_defconfig @@ -112,6 +112,7 @@ CONFIG_DM_MAILBOX=y CONFIG_K3_SEC_PROXY=y CONFIG_FS_LOADER=y CONFIG_SPL_FS_LOADER=y +CONFIG_K3_AVS0=y CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_SPL_MMC_HS400_SUPPORT=y CONFIG_MMC_SDHCI=y @@ -141,6 +142,11 @@ CONFIG_SPL_PINCTRL=y CONFIG_PINCTRL_SINGLE=y CONFIG_POWER_DOMAIN=y CONFIG_TI_POWER_DOMAIN=y +CONFIG_DM_PMIC=y +CONFIG_PMIC_TPS65941=y +CONFIG_DM_REGULATOR=y +CONFIG_SPL_DM_REGULATOR=y +CONFIG_DM_REGULATOR_TPS65941=y CONFIG_K3_SYSTEM_CONTROLLER=y CONFIG_REMOTEPROC_TI_K3_ARM64=y CONFIG_RESET_TI_SCI=y -- 2.43.0
[PATCH 09/10] DONOTMERGE: arm: dts: j721s2: Fix Power domain for VTM node.
Patch is sent to upstream linux [0]. [0]: https://lore.kernel.org/all/20240201-b4-upstream-j721s2-fix-vtm-devid-v2-0-85fd568b7...@ti.com/ Signed-off-by: Manorit Chawdhry --- arch/arm/dts/k3-j721s2-mcu-wakeup.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/dts/k3-j721s2-mcu-wakeup.dtsi b/arch/arm/dts/k3-j721s2-mcu-wakeup.dtsi index 80aa33c58a45..a47cb557dd95 100644 --- a/arch/arm/dts/k3-j721s2-mcu-wakeup.dtsi +++ b/arch/arm/dts/k3-j721s2-mcu-wakeup.dtsi @@ -663,7 +663,7 @@ compatible = "ti,j7200-vtm"; reg = <0x00 0x4204 0x0 0x350>, <0x00 0x4205 0x0 0x350>; - power-domains = <_pds 154 TI_SCI_PD_SHARED>; + power-domains = <_pds 180 TI_SCI_PD_SHARED>; #thermal-sensor-cells = <1>; }; -- 2.43.0
[PATCH 08/10] arm: dts: j721s2: Add VTM node in R5
Add bootph-pre-ram property to VTM node and the pmic node.
Signed-off-by: Manorit Chawdhry
---
arch/arm/dts/k3-j721s2-r5-common-proc-board.dts | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm/dts/k3-j721s2-r5-common-proc-board.dts
b/arch/arm/dts/k3-j721s2-r5-common-proc-board.dts
index 03bd680f4421..391baff2b608 100644
--- a/arch/arm/dts/k3-j721s2-r5-common-proc-board.dts
+++ b/arch/arm/dts/k3-j721s2-r5-common-proc-board.dts
@@ -86,3 +86,12 @@
_udmap {
ti,sci = <_tifs>;
};
+
+ {
+ bootph-pre-ram;
+};
+
+_vtm0 {
+ vdd-supply-2 = <>;
+ bootph-pre-ram;
+};
--
2.43.0
[PATCH 07/10] arm: mach-k3: j721s2_init: Initialize AVS Class 0
Initialize AVS Class 0.
Signed-off-by: Manorit Chawdhry
---
arch/arm/mach-k3/j721s2_init.c | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/mach-k3/j721s2_init.c b/arch/arm/mach-k3/j721s2_init.c
index fb0708bae162..7080c519cf4c 100644
--- a/arch/arm/mach-k3/j721s2_init.c
+++ b/arch/arm/mach-k3/j721s2_init.c
@@ -206,6 +206,14 @@ void k3_spl_init(void)
/* Output System Firmware version info */
k3_sysfw_print_ver();
+
+ if (IS_ENABLED(CONFIG_CPU_V7R) && IS_ENABLED(CONFIG_K3_AVS0)) {
+ ret = uclass_get_device_by_driver(UCLASS_MISC,
DM_DRIVER_GET(k3_avs),
+ );
+ if (ret)
+ printf("AVS init failed: %d\n", ret);
+ }
+
}
bool check_rom_loaded_sysfw(void)
--
2.43.0
[PATCH 06/10] drivers: power: pmic: Fix compatible for J721S2
The other compatible is not in use by any other DT node.
Sync the compatible with the compatible present in Linux DT to help with
DT Sync from Linux as well.
Signed-off-by: Manorit Chawdhry
---
drivers/power/pmic/tps65941.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/power/pmic/tps65941.c b/drivers/power/pmic/tps65941.c
index 727b42747ab6..53db91fce69f 100644
--- a/drivers/power/pmic/tps65941.c
+++ b/drivers/power/pmic/tps65941.c
@@ -71,7 +71,7 @@ static struct dm_pmic_ops tps65941_ops = {
};
static const struct udevice_id tps65941_ids[] = {
- { .compatible = "ti,tps659411", .data = TPS659411 },
+ { .compatible = "ti,tps6594-q1", .data = TPS659411 },
{ .compatible = "ti,tps659412", .data = TPS659411 },
{ .compatible = "ti,tps659413", .data = TPS659413 },
{ .compatible = "ti,lp876441", .data = LP876441 },
--
2.43.0
[PATCH 05/10] drivers: misc: k3_avs: Add AVS Support for J721S2.
Add AVS Support for J721S2.
Signed-off-by: Manorit Chawdhry
---
drivers/misc/k3_avs.c | 22 ++
1 file changed, 22 insertions(+)
diff --git a/drivers/misc/k3_avs.c b/drivers/misc/k3_avs.c
index e20dc6755c29..28e59fcf41d4 100644
--- a/drivers/misc/k3_avs.c
+++ b/drivers/misc/k3_avs.c
@@ -185,6 +185,22 @@ static struct vd_data j721e_vd_data[] = {
{ .id = -1 },
};
+static struct vd_data j721s2_vd_data[] = {
+ {
+ .id = J721E_VDD_MPU,
+ .opp = AM6_OPP_NOM,
+ .dev_id = 202, /* J721S2_DEV_A72SS0_CORE0 */
+ .clk_id = 0, /* ARM clock */
+ .opps = {
+ [AM6_OPP_NOM] = {
+ .volt = 88, /* TBD in DM */
+ .freq = 20,
+ },
+ },
+ },
+ { .id = -1 },
+};
+
static struct vd_config j721e_vd_config = {
.efuse_xlate = am6_efuse_xlate,
.vds = j721e_vd_data,
@@ -195,10 +211,16 @@ static struct vd_config am654_vd_config = {
.vds = am654_vd_data,
};
+static struct vd_config j721s2_vd_config = {
+ .efuse_xlate = am6_efuse_xlate,
+ .vds = j721s2_vd_data,
+};
+
const struct soc_attr vtm_soc_list[] = {
{ .family = "AM65X", .data = (void *)_vd_config },
{ .family = "J721E", .data = (void *)_vd_config },
{ .family = "J7200", .data = (void *)_vd_config },
+ { .family = "J721S2", .data = (void *)_vd_config },
{}
};
--
2.43.0
[PATCH 04/10] drivers: misc: k3_avs: Check return code while programming AVS
Check if AVS could not be programmed and print a warning. Signed-off-by: Manorit Chawdhry --- drivers/misc/k3_avs.c | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/misc/k3_avs.c b/drivers/misc/k3_avs.c index 02cd90f9d12c..e20dc6755c29 100644 --- a/drivers/misc/k3_avs.c +++ b/drivers/misc/k3_avs.c @@ -490,7 +490,10 @@ static int k3_avs_probe(struct udevice *dev) if (vd->flags & VD_FLAG_INIT_DONE) continue; - k3_avs_program_voltage(priv, vd, vd->opp); + ret = k3_avs_program_voltage(priv, vd, vd->opp); + if (ret) + dev_warn(dev, "Could not program AVS voltage for VD%d\n", +vd->id); } if (!device_is_compatible(priv->dev, "ti,am654-avs")) -- 2.43.0
[PATCH 03/10] drivers: misc: k3_avs: Use soc_match_device instead of compatible.
vd_data remains the same for most of the SoCs but there are some
differences in power domains and clocks that don't need a change to
compatible and can be handled at SoC level.
Change the data population logic from compatible to soc_match_device to
add support for newer devices.
Signed-off-by: Manorit Chawdhry
---
drivers/misc/k3_avs.c | 189 +++---
1 file changed, 103 insertions(+), 86 deletions(-)
diff --git a/drivers/misc/k3_avs.c b/drivers/misc/k3_avs.c
index 0d29eff1ac08..02cd90f9d12c 100644
--- a/drivers/misc/k3_avs.c
+++ b/drivers/misc/k3_avs.c
@@ -13,6 +13,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -112,6 +113,95 @@ static u32 am6_efuse_xlate(struct k3_avs_privdata *priv,
int idx, int opp)
return 30 + 2 * val;
}
+static struct vd_data am654_vd_data[] = {
+ {
+ .id = AM6_VDD_CORE,
+ .dev_id = 82, /* AM6_DEV_CBASS0 */
+ .clk_id = 0, /* main sysclk0 */
+ .opp = AM6_OPP_NOM,
+ .opps = {
+ [AM6_OPP_NOM] = {
+ .volt = 100,
+ .freq = 25000, /* CBASS0 */
+ },
+ },
+ },
+ {
+ .id = AM6_VDD_MPU0,
+ .dev_id = 202, /* AM6_DEV_COMPUTE_CLUSTER_A53_0 */
+ .clk_id = 0, /* ARM clock */
+ .opp = AM6_OPP_NOM,
+ .opps = {
+ [AM6_OPP_NOM] = {
+ .volt = 110,
+ .freq = 8,
+ },
+ [AM6_OPP_OD] = {
+ .volt = 120,
+ .freq = 10,
+ },
+ [AM6_OPP_TURBO] = {
+ .volt = 124,
+ .freq = 11,
+ },
+ },
+ },
+ {
+ .id = AM6_VDD_MPU1,
+ .opp = AM6_OPP_NOM,
+ .dev_id = 204, /* AM6_DEV_COMPUTE_CLUSTER_A53_2 */
+ .clk_id = 0, /* ARM clock */
+ .opps = {
+ [AM6_OPP_NOM] = {
+ .volt = 110,
+ .freq = 8,
+ },
+ [AM6_OPP_OD] = {
+ .volt = 120,
+ .freq = 10,
+ },
+ [AM6_OPP_TURBO] = {
+ .volt = 124,
+ .freq = 11,
+ },
+ },
+ },
+ { .id = -1 },
+};
+
+static struct vd_data j721e_vd_data[] = {
+ {
+ .id = J721E_VDD_MPU,
+ .opp = AM6_OPP_NOM,
+ .dev_id = 202, /* J721E_DEV_A72SS0_CORE0 */
+ .clk_id = 2, /* ARM clock */
+ .opps = {
+ [AM6_OPP_NOM] = {
+ .volt = 88, /* TBD in DM */
+ .freq = 20,
+ },
+ },
+ },
+ { .id = -1 },
+};
+
+static struct vd_config j721e_vd_config = {
+ .efuse_xlate = am6_efuse_xlate,
+ .vds = j721e_vd_data,
+};
+
+static struct vd_config am654_vd_config = {
+ .efuse_xlate = am6_efuse_xlate,
+ .vds = am654_vd_data,
+};
+
+const struct soc_attr vtm_soc_list[] = {
+ { .family = "AM65X", .data = (void *)_vd_config },
+ { .family = "J721E", .data = (void *)_vd_config },
+ { .family = "J7200", .data = (void *)_vd_config },
+ {}
+};
+
static int k3_avs_program_voltage(struct k3_avs_privdata *priv,
struct vd_data *vd,
int opp_id)
@@ -235,8 +325,16 @@ static int k3_avs_configure(struct udevice *dev, struct
k3_avs_privdata *priv)
int ret;
char pname[20];
struct vd_data *vd;
+ const struct soc_attr *soc;
+
+ soc = soc_device_match(vtm_soc_list);
+ if (soc && soc->data)
+ conf = (void *)soc->data;
- conf = (void *)dev_get_driver_data(dev);
+ if (!conf) {
+ printf("No SoC support for AVS\n");
+ return -ENOSYS;
+ }
priv->vd_config = conf;
@@ -401,93 +499,12 @@ static int k3_avs_probe(struct udevice *dev)
return 0;
}
-static struct vd_data am654_vd_data[] = {
- {
- .id = AM6_VDD_CORE,
- .dev_id = 82, /* AM6_DEV_CBASS0 */
- .clk_id = 0, /* main sysclk0 */
- .opp = AM6_OPP_NOM,
- .opps = {
- [AM6_OPP_NOM] = {
- .volt = 100,
- .freq =
[PATCH 02/10] arm: dts: k3-am68*: Sync with 6.8-rc1
Syncs the DT from Linux v6.8-rc1.
Remove udmap overrides and handle location change of chipid node.
Signed-off-by: Manorit Chawdhry
---
arch/arm/dts/k3-am68-sk-base-board.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/dts/k3-am68-sk-base-board.dts
b/arch/arm/dts/k3-am68-sk-base-board.dts
index 1e1a82f9d2b8..d0cfdeac21fb 100644
--- a/arch/arm/dts/k3-am68-sk-base-board.dts
+++ b/arch/arm/dts/k3-am68-sk-base-board.dts
@@ -31,6 +31,7 @@
can1 = _mcan1;
can2 = _mcan6;
can3 = _mcan7;
+ ethernet0 = _port1;
};
vusb_main: regulator-vusb-main5v0 {
--
2.43.0
[PATCH 01/10] arm: dts: k3-j721s2*: Sync with 6.8-rc1
Syncs the DT from Linux v6.8-rc1.
Remove udmap overrides and handle location change of chipid node.
Signed-off-by: Manorit Chawdhry
---
arch/arm/dts/k3-am68-sk-base-board-u-boot.dtsi | 18 +-
.../dts/k3-j721s2-common-proc-board-u-boot.dtsi| 18 +-
arch/arm/dts/k3-j721s2-main.dtsi | 9 +-
arch/arm/dts/k3-j721s2-mcu-wakeup.dtsi | 21 ++-
arch/arm/dts/k3-j721s2-som-p0.dtsi | 193 +
5 files changed, 230 insertions(+), 29 deletions(-)
diff --git a/arch/arm/dts/k3-am68-sk-base-board-u-boot.dtsi
b/arch/arm/dts/k3-am68-sk-base-board-u-boot.dtsi
index 4f34347586e0..43055b5c161e 100644
--- a/arch/arm/dts/k3-am68-sk-base-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-am68-sk-base-board-u-boot.dtsi
@@ -19,10 +19,14 @@
_mcu_wakeup {
bootph-all;
+};
- chipid@4314 {
- bootph-all;
- };
+_conf {
+ bootph-all;
+};
+
+ {
+ bootph-all;
};
_navss {
@@ -34,14 +38,6 @@
};
_udmap {
- reg = <0x0 0x285c 0x0 0x100>,
- <0x0 0x284c 0x0 0x4000>,
- <0x0 0x2a80 0x0 0x4>,
- <0x0 0x284a 0x0 0x4000>,
- <0x0 0x2aa0 0x0 0x4>,
- <0x0 0x2840 0x0 0x2000>;
- reg-names = "gcfg", "rchan", "rchanrt", "tchan",
- "tchanrt", "rflow";
bootph-all;
};
diff --git a/arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi
b/arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi
index a3ebf5996eac..df5a2f3b7d5b 100644
--- a/arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi
@@ -19,10 +19,14 @@
_mcu_wakeup {
bootph-all;
+};
- chipid@4314 {
- bootph-all;
- };
+_conf {
+ bootph-all;
+};
+
+ {
+ bootph-all;
};
_navss {
@@ -34,14 +38,6 @@
};
_udmap {
- reg = <0x0 0x285c 0x0 0x100>,
- <0x0 0x284c 0x0 0x4000>,
- <0x0 0x2a80 0x0 0x4>,
- <0x0 0x284a 0x0 0x4000>,
- <0x0 0x2aa0 0x0 0x4>,
- <0x0 0x2840 0x0 0x2000>;
- reg-names = "gcfg", "rchan", "rchanrt", "tchan",
- "tchanrt", "rflow";
bootph-all;
};
diff --git a/arch/arm/dts/k3-j721s2-main.dtsi b/arch/arm/dts/k3-j721s2-main.dtsi
index b03731b53a26..ea7f2b2ab165 100644
--- a/arch/arm/dts/k3-j721s2-main.dtsi
+++ b/arch/arm/dts/k3-j721s2-main.dtsi
@@ -766,6 +766,7 @@
ti,itap-del-sel-sd-hs = <0x0>;
ti,itap-del-sel-sdr12 = <0x0>;
ti,itap-del-sel-sdr25 = <0x0>;
+ ti,itap-del-sel-ddr50 = <0x2>;
ti,clkbuf-sel = <0x7>;
ti,trm-icp = <0x8>;
dma-coherent;
@@ -1086,8 +1087,12 @@
compatible = "ti,j721e-navss-main-udmap";
reg = <0x0 0x3115 0x0 0x100>,
<0x0 0x3400 0x0 0x8>,
- <0x0 0x3500 0x0 0x20>;
- reg-names = "gcfg", "rchanrt", "tchanrt";
+ <0x0 0x3500 0x0 0x20>,
+ <0x0 0x30b0 0x0 0x2>,
+ <0x0 0x30c0 0x0 0x8000>,
+ <0x0 0x30d0 0x0 0x4000>;
+ reg-names = "gcfg", "rchanrt", "tchanrt",
+ "tchan", "rchan", "rflow";
msi-parent = <_udmass_inta>;
#dma-cells = <1>;
diff --git a/arch/arm/dts/k3-j721s2-mcu-wakeup.dtsi
b/arch/arm/dts/k3-j721s2-mcu-wakeup.dtsi
index 7254f3bd3634..80aa33c58a45 100644
--- a/arch/arm/dts/k3-j721s2-mcu-wakeup.dtsi
+++ b/arch/arm/dts/k3-j721s2-mcu-wakeup.dtsi
@@ -34,9 +34,16 @@
};
};
- chipid@4314 {
- compatible = "ti,am654-chipid";
- reg = <0x00 0x4314 0x00 0x4>;
+ wkup_conf: bus@4300 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x00 0x4300 0x2>;
+
+ chipid: chipid@14 {
+ compatible = "ti,am654-chipid";
+ reg = <0x14 0x4>;
+ };
};
secure_proxy_sa3: mailbox@4360 {
@@ -471,8 +478,12 @@
compatible = "ti,j721e-navss-mcu-udmap";
reg = <0x0 0x285c 0x0 0x100>,
<0x0 0x2a80 0x0 0x4>,
- <0x0 0x2aa0 0x0 0x4>;
- reg-names = "gcfg", "rchanrt", "tchanrt";
+ <0x0 0x2aa0 0x0 0x4>,
+ <0x0 0x284a 0x0 0x4000>,
+ <0x0 0x284c 0x0 0x4000>,
+ <0x0
[PATCH 00/10] Add AVS support for J721S2
This series does the DT sync with Linux 6.8-rc1 as that has the pmic nodes required for AVS support and then adds AVS Support for J721S2. AVS Test for J721S2: https://gist.github.com/manorit2001/d7690ded6ef685aa8ffa5b16746cc529 Boot Test results: https://gist.github.com/manorit2001/6775d721b3df5a690497d94d012b93c4 Signed-off-by: Manorit Chawdhry --- Manorit Chawdhry (10): arm: dts: k3-j721s2*: Sync with 6.8-rc1 arm: dts: k3-am68*: Sync with 6.8-rc1 drivers: misc: k3_avs: Use soc_match_device instead of compatible. drivers: misc: k3_avs: Check return code while programming AVS drivers: misc: k3_avs: Add AVS Support for J721S2. drivers: power: pmic: Fix compatible for J721S2 arm: mach-k3: j721s2_init: Initialize AVS Class 0 arm: dts: j721s2: Add VTM node in R5 DONOTMERGE: arm: dts: j721s2: Fix Power domain for VTM node. configs: j721s2_evm_r5_defconfig: Add AVS Configs arch/arm/dts/k3-am68-sk-base-board-u-boot.dtsi | 18 +- arch/arm/dts/k3-am68-sk-base-board.dts | 1 + .../dts/k3-j721s2-common-proc-board-u-boot.dtsi| 18 +- arch/arm/dts/k3-j721s2-main.dtsi | 9 +- arch/arm/dts/k3-j721s2-mcu-wakeup.dtsi | 23 ++- arch/arm/dts/k3-j721s2-r5-common-proc-board.dts| 9 + arch/arm/dts/k3-j721s2-som-p0.dtsi | 193 ++ arch/arm/mach-k3/j721s2_init.c | 8 + configs/j721s2_evm_r5_defconfig| 6 + drivers/misc/k3_avs.c | 216 - drivers/power/pmic/tps65941.c | 2 +- 11 files changed, 385 insertions(+), 118 deletions(-) --- base-commit: 6faba41927bdc8973b59678649ef83c564cc421e change-id: 20240130-b4-upstream-j721s2-avs-8c187d3fe26a Best regards, -- Manorit Chawdhry
[PATCH] arm64: versal-net: Setup correct addresses of GICR/GICD
Previous addresses where used in past in emulation environment but never gets to silicon that's why use correct addresses. Signed-off-by: Michal Simek --- include/configs/xilinx_versal_net.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/configs/xilinx_versal_net.h b/include/configs/xilinx_versal_net.h index 2b441da91a10..9cb6b2bfea3e 100644 --- a/include/configs/xilinx_versal_net.h +++ b/include/configs/xilinx_versal_net.h @@ -16,8 +16,8 @@ /* #define CONFIG_ARMV8_SWITCH_TO_EL1 */ /* Generic Interrupt Controller Definitions */ -#define GICD_BASE 0xF900 -#define GICR_BASE 0xF906 +#define GICD_BASE 0xe200 +#define GICR_BASE 0xe206 /* Serial setup */ #define CFG_SYS_BAUDRATE_TABLE \ -- 2.36.1
Re: [PATCH 1/5] xilinx: Fix fpga region DT nodes name
On 2/1/24 13:38, Michal Simek wrote:
fpga-full is not aligned with the latest dt-schema. Generic name
fpga-region should be used.
Signed-off-by: Michal Simek
---
Aligned with fpga-region dt schema
https://lore.kernel.org/all/37b107d86b39ef4bc9c482b57b27de8b92c3fa43.1706530726.git.michal.si...@amd.com/
---
arch/arm/dts/zynq-7000.dtsi | 2 +-
arch/arm/dts/zynqmp.dtsi| 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/dts/zynq-7000.dtsi b/arch/arm/dts/zynq-7000.dtsi
index f8c786ab0b7b..75dfd2f069da 100644
--- a/arch/arm/dts/zynq-7000.dtsi
+++ b/arch/arm/dts/zynq-7000.dtsi
@@ -44,7 +44,7 @@
};
};
- fpga_full: fpga-full {
+ fpga_full: fpga-region {
compatible = "fpga-region";
fpga-mgr = <>;
#address-cells = <1>;
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
index 63238c08780d..ee2fbcaedc52 100644
--- a/arch/arm/dts/zynqmp.dtsi
+++ b/arch/arm/dts/zynqmp.dtsi
@@ -307,7 +307,7 @@
compatible = "arm,cortex-a53-edac";
};
- fpga_full: fpga-full {
+ fpga_full: fpga-region {
compatible = "fpga-region";
fpga-mgr = <_pcap>;
#address-cells = <2>;
Applied all.
M
Re: [PATCH] arm64: zynqmp: Fix kr260 clock wiring
On 1/30/24 15:51, Michal Simek wrote:
kr260 revA/revA01 is using discrete oscilator for DP (27MHz) and si5332 for
other clocks but clocks are different compare to kv260 that's why fix it to
aligned with the latest schematics.
On the other handle kr260 revB/revA03 also contains 74.25 MHz discrete
clock chip for SLVC-EC output which is not defined.
Signed-off-by: Michal Simek
---
arch/arm/dts/zynqmp-sck-kr-g-revA.dtso | 14 ++
arch/arm/dts/zynqmp-sck-kr-g-revB.dtso | 6 ++
2 files changed, 16 insertions(+), 4 deletions(-)
diff --git a/arch/arm/dts/zynqmp-sck-kr-g-revA.dtso
b/arch/arm/dts/zynqmp-sck-kr-g-revA.dtso
index 39ca98a9d47f..afcf8a8ee6ba 100644
--- a/arch/arm/dts/zynqmp-sck-kr-g-revA.dtso
+++ b/arch/arm/dts/zynqmp-sck-kr-g-revA.dtso
@@ -25,16 +25,22 @@
io-channels = < 0>, < 1>, < 2>;
};
+ clk_27: clock0 { /* u86 - DP */
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <2700>;
+ };
+
clk_125: si5332-0 { /* u17 - GEM0/1 */
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <12500>;
};
- clk_27: si5332-1 { /* u17 - DP */
+ clk_74: si5332-5 { /* u17 - SLVC-EC */
compatible = "fixed-clock";
#clock-cells = <0>;
- clock-frequency = <2700>;
+ clock-frequency = <7425>;
};
clk_26: si5332-2 { /* u17 - USB */
@@ -49,13 +55,13 @@
clock-frequency = <15625>;
};
- clk_25_0: si5332-4 { /* u17 - GEM2 */
+ clk_25_0: si5332-1 { /* u17 - GEM2 */
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <2500>;
};
- clk_25_1: si5332-5 { /* u17 - GEM3 */
+ clk_25_1: si5332-4 { /* u17 - GEM3 */
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <2500>;
diff --git a/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso
b/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso
index 21187396326b..24be5dd84e19 100644
--- a/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso
+++ b/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso
@@ -60,6 +60,12 @@
#clock-cells = <0>;
clock-frequency = <2500>;
};
+
+ clk_74: clock6 { /* u88 - SLVC-EC */
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <7425>;
+ };
};
{ /* I2C_SCK C26/C27 - MIO from SOM */
Applied.
M
Re: [PATCH] arm64: zynqmp: Describe 25MHz fixed clock for PL GEMs
On 1/29/24 08:46, Michal Simek wrote:
Describe 25Mhz fixed oscilator which is providing clock for PL based
ethernet IPs. Physicially it is one chip but it is described as 2 fixed
clock to be aligned with other SOM versions which were using integrated
clock generators where clocks could be adjusted via i2c (si5332 chips).
Signed-off-by: Michal Simek
---
arch/arm/dts/zynqmp-sck-kd-g-revA.dtso | 12
1 file changed, 12 insertions(+)
diff --git a/arch/arm/dts/zynqmp-sck-kd-g-revA.dtso
b/arch/arm/dts/zynqmp-sck-kd-g-revA.dtso
index 766f78303eee..b3fc17cbd577 100644
--- a/arch/arm/dts/zynqmp-sck-kd-g-revA.dtso
+++ b/arch/arm/dts/zynqmp-sck-kd-g-revA.dtso
@@ -32,6 +32,18 @@
#clock-cells = <0>;
clock-frequency = <2600>;
};
+
+ clk_25_0: clock4 { /* u92/u91 - GEM2 */
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <2500>;
+ };
+
+ clk_25_1: clock5 { /* u92/u91 - GEM3 */
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <2500>;
+ };
};
{
Applied.
M
Re: [PATCH] configs: versal: Enable CONFIG_LTO for mini qspi/ospi
On 1/26/24 09:09, Venkatesh Yadav Abbarapu wrote: Adding a tiny bit more code for mini u-boot leads to a OCM image overflow. Fix this by enabling LTO for this board, so that such changes still can be made to the common U-Boot code. Enable building mini u-boot image with LTO, which results in about 8KB reduction in size. Signed-off-by: Michal Simek Signed-off-by: Venkatesh Yadav Abbarapu --- configs/xilinx_versal_mini_ospi_defconfig | 1 + configs/xilinx_versal_mini_qspi_defconfig | 1 + 2 files changed, 2 insertions(+) diff --git a/configs/xilinx_versal_mini_ospi_defconfig b/configs/xilinx_versal_mini_ospi_defconfig index 72a123d965..7a110350c2 100644 --- a/configs/xilinx_versal_mini_ospi_defconfig +++ b/configs/xilinx_versal_mini_ospi_defconfig @@ -16,6 +16,7 @@ CONFIG_SYS_MEM_RSVD_FOR_MMU=y CONFIG_VERSAL_NO_DDR=y # CONFIG_PSCI_RESET is not set CONFIG_SYS_LOAD_ADDR=0x800 +CONFIG_LTO=y # CONFIG_EXPERT is not set CONFIG_REMAKE_ELF=y # CONFIG_AUTOBOOT is not set diff --git a/configs/xilinx_versal_mini_qspi_defconfig b/configs/xilinx_versal_mini_qspi_defconfig index d9fbac986c..58945a1cac 100644 --- a/configs/xilinx_versal_mini_qspi_defconfig +++ b/configs/xilinx_versal_mini_qspi_defconfig @@ -14,6 +14,7 @@ CONFIG_SYS_MEM_RSVD_FOR_MMU=y CONFIG_VERSAL_NO_DDR=y # CONFIG_PSCI_RESET is not set CONFIG_SYS_LOAD_ADDR=0x800 +CONFIG_LTO=y # CONFIG_EXPERT is not set CONFIG_REMAKE_ELF=y # CONFIG_AUTOBOOT is not set Applied. M
Re: [PATCH] configs: versal_net: Enable CONFIG_LTO for mini qspi/ospi
On 1/26/24 09:11, Venkatesh Yadav Abbarapu wrote: Adding a tiny bit more code for mini u-boot leads to a OCM image overflow. Fix this by enabling LTO for this board, so that such changes still can be made to the common U-Boot code. Enable building mini u-boot image with LTO, which results in about 8KB reduction in size. Signed-off-by: Michal Simek Signed-off-by: Venkatesh Yadav Abbarapu --- configs/xilinx_versal_net_mini_ospi_defconfig | 1 + configs/xilinx_versal_net_mini_qspi_defconfig | 1 + 2 files changed, 2 insertions(+) diff --git a/configs/xilinx_versal_net_mini_ospi_defconfig b/configs/xilinx_versal_net_mini_ospi_defconfig index 5f42243d22..d78c9f8059 100644 --- a/configs/xilinx_versal_net_mini_ospi_defconfig +++ b/configs/xilinx_versal_net_mini_ospi_defconfig @@ -15,6 +15,7 @@ CONFIG_DEFAULT_DEVICE_TREE="versal-net-mini-ospi-single" CONFIG_SYS_MEM_RSVD_FOR_MMU=y # CONFIG_PSCI_RESET is not set CONFIG_SYS_LOAD_ADDR=0xBBF8 +CONFIG_LTO=y # CONFIG_EXPERT is not set CONFIG_REMAKE_ELF=y # CONFIG_AUTOBOOT is not set diff --git a/configs/xilinx_versal_net_mini_qspi_defconfig b/configs/xilinx_versal_net_mini_qspi_defconfig index 4fa83faa40..b0567f857a 100644 --- a/configs/xilinx_versal_net_mini_qspi_defconfig +++ b/configs/xilinx_versal_net_mini_qspi_defconfig @@ -13,6 +13,7 @@ CONFIG_DEFAULT_DEVICE_TREE="versal-net-mini-qspi-single" CONFIG_SYS_MEM_RSVD_FOR_MMU=y # CONFIG_PSCI_RESET is not set CONFIG_SYS_LOAD_ADDR=0xBBF8 +CONFIG_LTO=y # CONFIG_EXPERT is not set CONFIG_REMAKE_ELF=y # CONFIG_AUTOBOOT is not set Applied. M
Re: [PATCH] arm64: zynqmp: Sync clock labels with kr260 revB
On 1/26/24 08:24, Michal Simek wrote:
Board description describes the hard part of chip (PS) but programmable
logic (PL) part is not described in this file. But clocks on the board are
not only connected to PS but also wired to PL. And because two revisions
are available where revA is using one si5332 and revB multiple clock chips
using the same clock labels helping with keeping only one device tree
overlay which targets PL. That's why synchronize clock labels and use
labels from revB which are more generic.
Unfortunately if there is driver for si5332 chip split could happen again
but it is still worth to do it now and solve this issue when occurs.
Reported-by: Sagar Karmarkar
Signed-off-by: Michal Simek
---
arch/arm/dts/zynqmp-sck-kr-g-revA.dtso | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/arm/dts/zynqmp-sck-kr-g-revA.dtso
b/arch/arm/dts/zynqmp-sck-kr-g-revA.dtso
index 7717abf7bd8a..39ca98a9d47f 100644
--- a/arch/arm/dts/zynqmp-sck-kr-g-revA.dtso
+++ b/arch/arm/dts/zynqmp-sck-kr-g-revA.dtso
@@ -25,37 +25,37 @@
io-channels = < 0>, < 1>, < 2>;
};
- si5332_0: si5332-0 { /* u17 - GEM0/1 */
+ clk_125: si5332-0 { /* u17 - GEM0/1 */
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <12500>;
};
- si5332_1: si5332-1 { /* u17 - DP */
+ clk_27: si5332-1 { /* u17 - DP */
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <2700>;
};
- si5332_2: si5332-2 { /* u17 - USB */
+ clk_26: si5332-2 { /* u17 - USB */
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <2600>;
};
- si5332_3: si5332-3 { /* u17 - SFP+ */
+ clk_156: si5332-3 { /* u17 - SFP+ */
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <15625>;
};
- si5332_4: si5332-4 { /* u17 - GEM2 */
+ clk_25_0: si5332-4 { /* u17 - GEM2 */
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <2500>;
};
- si5332_5: si5332-5 { /* u17 - GEM3 */
+ clk_25_1: si5332-5 { /* u17 - GEM3 */
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <2500>;
@@ -115,7 +115,7 @@
{
status = "okay";
/* gem0/1, dp, usb */
- clocks = <_0>, <_1>, <_2>;
+ clocks = <_125>, <_27>, <_26>;
clock-names = "ref0", "ref1", "ref2";
};
Applied.
M
Re: [PATCH] arm64: zynqmp: Add 'silabs, skip-recall' to all si570 clk nodes
On 1/25/24 09:07, Michal Simek wrote:
From: Saeed Nowshadi
Without 'silabs,skip-recall' property, the driver on System Controller
re-calibrates the output clock frequency at probe() time based on the NVRAM
setting. This re-calibration causes a glitch on the output clock. At
power-on, Versal is also booting and expecting a glitch-free clock for
its correct operation. System Controller should skip the re-calibration
step to prevent any clock instability for Versal.
Signed-off-by: Saeed Nowshadi
Signed-off-by: Michal Simek
---
arch/arm/dts/zynqmp-e-a2197-00-revA.dts | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/dts/zynqmp-e-a2197-00-revA.dts
b/arch/arm/dts/zynqmp-e-a2197-00-revA.dts
index f1b0a4aa65dd..0b97fa3f28ac 100644
--- a/arch/arm/dts/zynqmp-e-a2197-00-revA.dts
+++ b/arch/arm/dts/zynqmp-e-a2197-00-revA.dts
@@ -449,6 +449,7 @@
factory-fout = <15625>;
clock-frequency = <15625>;
clock-output-names = "si570_zsfp_clk";
+ silabs,skip-recall;
};
};
i2c@6 { /* USER_SI570_1 */
@@ -463,6 +464,7 @@
factory-fout = <1>;
clock-frequency = <1>;
clock-output-names = "si570_user1";
+ silabs,skip-recall;
};
};
@@ -560,6 +562,7 @@
factory-fout = <2>;
clock-frequency = <2>;
clock-output-names = "si570_lpddr4_clk2";
+ silabs,skip-recall;
};
};
i2c@5 { /* LPDDR4_SI570_CLK1 */
@@ -574,6 +577,7 @@
factory-fout = <2>;
clock-frequency = <2>;
clock-output-names = "si570_lpddr4_clk1";
+ silabs,skip-recall;
};
};
i2c@6 { /* HSDP_SI570 */
@@ -588,6 +592,7 @@
factory-fout = <15625>;
clock-frequency = <15625>;
clock-output-names = "si570_hsdp_clk";
+ silabs,skip-recall;
};
};
i2c@7 { /* 8A34001 - U219B and J310 connector */
Applied.
M
Re: [PATCH] arm64: xilinx: Enable EFI_HTTP_BOOT by default
On 1/24/24 11:58, Michal Simek wrote:
Enable EFI_HTTP_BOOT to be able to booting OS via http.
In case of that dhcp server is not providing dns server IP set it up via
setenv dnsip .
Signed-off-by: Michal Simek
---
I am ignoring defconfig sync because it needs to done because of
cda3f81b06f5 ("cmd/flash: Make this default y for CFI and NOR only")
anyway that's why I will just enable feature and Tom will run resync at
some point to remove automatically selected options.
---
configs/xilinx_versal_net_virt_defconfig | 1 +
configs/xilinx_versal_virt_defconfig | 1 +
configs/xilinx_zynqmp_kria_defconfig | 1 +
configs/xilinx_zynqmp_virt_defconfig | 1 +
4 files changed, 4 insertions(+)
diff --git a/configs/xilinx_versal_net_virt_defconfig
b/configs/xilinx_versal_net_virt_defconfig
index 371d14eb89b7..0f1d990936f3 100644
--- a/configs/xilinx_versal_net_virt_defconfig
+++ b/configs/xilinx_versal_net_virt_defconfig
@@ -146,3 +146,4 @@ CONFIG_VIRTIO_MMIO=y
CONFIG_VIRTIO_NET=y
CONFIG_VIRTIO_BLK=y
CONFIG_TPM=y
+CONFIG_EFI_HTTP_BOOT=y
diff --git a/configs/xilinx_versal_virt_defconfig
b/configs/xilinx_versal_virt_defconfig
index 5f76a305ab32..3c55dd8dcde9 100644
--- a/configs/xilinx_versal_virt_defconfig
+++ b/configs/xilinx_versal_virt_defconfig
@@ -153,3 +153,4 @@ CONFIG_VIRTIO_MMIO=y
CONFIG_VIRTIO_NET=y
CONFIG_VIRTIO_BLK=y
CONFIG_TPM=y
+CONFIG_EFI_HTTP_BOOT=y
diff --git a/configs/xilinx_zynqmp_kria_defconfig
b/configs/xilinx_zynqmp_kria_defconfig
index 0dc6c5b6877f..28b28f68411f 100644
--- a/configs/xilinx_zynqmp_kria_defconfig
+++ b/configs/xilinx_zynqmp_kria_defconfig
@@ -224,3 +224,4 @@ CONFIG_EFI_SET_TIME=y
CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y
CONFIG_EFI_CAPSULE_ON_DISK=y
CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y
+CONFIG_EFI_HTTP_BOOT=y
diff --git a/configs/xilinx_zynqmp_virt_defconfig
b/configs/xilinx_zynqmp_virt_defconfig
index 2742e38b599e..1fcae45e95db 100644
--- a/configs/xilinx_zynqmp_virt_defconfig
+++ b/configs/xilinx_zynqmp_virt_defconfig
@@ -242,3 +242,4 @@ CONFIG_EFI_SET_TIME=y
CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y
CONFIG_EFI_CAPSULE_ON_DISK=y
CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y
+CONFIG_EFI_HTTP_BOOT=y
Applied.
M
Re: [PATCH] soc: zynqmp: Add the IDcode for dr_SE and eg_SE variants
On 1/23/24 05:57, Venkatesh Yadav Abbarapu wrote:
ID code is added for zu67dr_SE, zu11eg_SE, zu19eg_SE and zu47dr_SE
variants. SE is the select edition of restricted devices with the
capabilities.
Signed-off-by: Venkatesh Yadav Abbarapu
---
drivers/soc/soc_xilinx_zynqmp.c | 28 +++-
1 file changed, 27 insertions(+), 1 deletion(-)
diff --git a/drivers/soc/soc_xilinx_zynqmp.c b/drivers/soc/soc_xilinx_zynqmp.c
index d9a5944965..786825d920 100644
--- a/drivers/soc/soc_xilinx_zynqmp.c
+++ b/drivers/soc/soc_xilinx_zynqmp.c
@@ -35,13 +35,15 @@ static const char zynqmp_family[] = "ZynqMP";
#define IDCODE2_PL_INIT_SHIFT 9
#define IDCODE2_PL_INIT_MASK BIT(IDCODE2_PL_INIT_SHIFT)
-#define ZYNQMP_VERSION_SIZE 7
+#define ZYNQMP_VERSION_SIZE10
enum {
ZYNQMP_VARIANT_EG = BIT(0),
ZYNQMP_VARIANT_EV = BIT(1),
ZYNQMP_VARIANT_CG = BIT(2),
ZYNQMP_VARIANT_DR = BIT(3),
+ ZYNQMP_VARIANT_DR_SE = BIT(4),
+ ZYNQMP_VARIANT_EG_SE = BIT(5),
};
struct zynqmp_device {
@@ -105,6 +107,11 @@ static const struct zynqmp_device zynqmp_devices[] = {
.device = 11,
.variants = ZYNQMP_VARIANT_EG,
},
+ {
+ .id = 0x04741093,
+ .device = 11,
+ .variants = ZYNQMP_VARIANT_EG_SE,
+ },
{
.id = 0x04750093,
.device = 15,
@@ -120,6 +127,11 @@ static const struct zynqmp_device zynqmp_devices[] = {
.device = 19,
.variants = ZYNQMP_VARIANT_EG,
},
+ {
+ .id = 0x0475C093,
+ .device = 19,
+ .variants = ZYNQMP_VARIANT_EG_SE,
+ },
{
.id = 0x047E1093,
.device = 21,
@@ -170,6 +182,11 @@ static const struct zynqmp_device zynqmp_devices[] = {
.device = 47,
.variants = ZYNQMP_VARIANT_DR,
},
+ {
+ .id = 0x047FA093,
+ .device = 47,
+ .variants = ZYNQMP_VARIANT_DR_SE,
+ },
{
.id = 0x047FB093,
.device = 48,
@@ -185,6 +202,11 @@ static const struct zynqmp_device zynqmp_devices[] = {
.device = 67,
.variants = ZYNQMP_VARIANT_DR,
},
+ {
+ .id = 0x046d7093,
+ .device = 67,
+ .variants = ZYNQMP_VARIANT_DR_SE,
+ },
{
.id = 0x04712093,
.device = 24,
@@ -271,8 +293,12 @@ static int soc_xilinx_zynqmp_detect_machine(struct udevice
*dev, u32 idcode,
"cg" : "eg", sizeof(priv->machine));
} else if (device->variants & ZYNQMP_VARIANT_EG) {
strlcat(priv->machine, "eg", sizeof(priv->machine));
+ } else if (device->variants & ZYNQMP_VARIANT_EG_SE) {
+ strlcat(priv->machine, "eg_SE", sizeof(priv->machine));
} else if (device->variants & ZYNQMP_VARIANT_DR) {
strlcat(priv->machine, "dr", sizeof(priv->machine));
+ } else if (device->variants & ZYNQMP_VARIANT_DR_SE) {
+ strlcat(priv->machine, "dr_SE", sizeof(priv->machine));
}
return 0;
Applied.
M
[PATCH v2] scripts: dtc-version: Don't show error messages
Prevent the error messages produced by which(1), such as the one quoted
below, from being visible in the build outputs.
which: no dtc in (./scripts/dtc)
This makes the build outputs look a tiny bit cleaner.
Signed-off-by: Dragan Simic
Reviewed-by: Quentin Schulz
---
Notes:
Version 2 incorporates the suggestion from Quentin to use a more compact
version of the redirection, which is already used in multiple places.
The original motivation to use the more verbose version was to prevent
possible issues with some shells, or with some older shell versions, which
may not recognize the compact version.
scripts/dtc-version.sh | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/scripts/dtc-version.sh b/scripts/dtc-version.sh
index 53ff868bcdce..18c59ac1e255 100755
--- a/scripts/dtc-version.sh
+++ b/scripts/dtc-version.sh
@@ -15,7 +15,7 @@ if [ ${#dtc} -eq 0 ]; then
exit 1
fi
-if ! which $dtc >/dev/null ; then
+if ! which $dtc > /dev/null 2>&1 ; then
echo "Error: Cannot find dtc: $dtc"
exit 1
fi
Re: [PATCH v2 1/4] imx8mp-phyboard-pollux-rdk: sync with kernel devicetree from v6.8-rc2
On Tue, Feb 06, 2024 at 10:36:33AM +, Teresa Remmet wrote: > Hello Benjamin, > > > Am Mittwoch, dem 31.01.2024 um 09:45 +0100 schrieb Benjamin Hahn: > > Signed-off-by: Benjamin Hahn > > please add a proper patch description. Adding only a subject line > ist not enough. > One idea that I had is when people are synching with mainline they could put the oneline summary of the stuff that's getting merged. In this case it's the 6 most recent commits. $ git log --oneline arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts 4a58fcdb1818 arm64: dts: imx8mp-phyboard-pollux: Add support for RS232/RS485 3bd7fdcc359e arm64: dts: imx8mp-phyboard-pollux: Add gpio-line-names f5faa633daf8 arm64: dts: imx8mp-phyboard-pollux: Enable USB support 27c0dc128d04 arm64: dts: imx8mp-phyboard-pollux: Add flexcan support fa2a1ec50456 arm64: dts: imx8mp-phyboard-pollux: Add missing usdhc clocks assignment 055e38c76388 arm64: dts: imx8mp-phyboard-pollux-rdk: Fix led sub-node names regards, dan carpenter
Re: [PATCH] scripts: dtc-version: Don't show error messages
On 2024-02-06 11:41, Quentin Schulz wrote:
On 2/6/24 11:37, Dragan Simic wrote:
On 2024-02-06 11:25, Quentin Schulz wrote:
On 2/6/24 04:56, Dragan Simic wrote:
Prevent the error messages produced by which(1), such as the one
quoted
below, from being visible in the build outputs.
which: no dtc in (./scripts/dtc)
This makes the build outputs look a tiny bit cleaner.
Signed-off-by: Dragan Simic
---
scripts/dtc-version.sh | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/scripts/dtc-version.sh b/scripts/dtc-version.sh
index 53ff868bcdce..6d3d7b68fdfa 100755
--- a/scripts/dtc-version.sh
+++ b/scripts/dtc-version.sh
@@ -15,7 +15,7 @@ if [ ${#dtc} -eq 0 ]; then
exit 1
fi
-if ! which $dtc >/dev/null ; then
+if ! which $dtc >/dev/null 2>/dev/null ; then
What about
which $dtc > /dev/null 2>&1
instead?
That's exactly what I intended to use, but IIRC some shells
or some older versions of some shells may not recognize that,
so I went with a more verbose, but slightly safer option.
$ git -c core.pager='' grep "2>&1" scripts
scripts/Kbuild.include: if (which $(strip $(c))$(CC)) > /dev/null 2>&1
; then \
scripts/Kbuild.include: if ($(1)) >/dev/null 2>&1;\
scripts/Kbuild.include:cc-name = $(shell $(CC) -v 2>&1 | grep -q
"clang version" && echo clang || echo gcc)
scripts/Kconfig.include:if-success = $(shell,{ $(1); } >/dev/null 2>&1
&& echo "$(2)" || echo "$(3)")
scripts/checkpatch.pl: $maintained_status{$filename} = `perl
$root/scripts/get_maintainer.pl --status --nom --nol --nogit
--nogit-fallback -f $filename 2>&1`;
scripts/checkpatch.pl: my $output = `${git_command} log --no-color
--format='%H %s' -1 $commit 2>&1`;
scripts/coccicheck:echo $SPFLAGS | grep -Ee "--profile|--show-trying"
2>&1 > /dev/null
scripts/decodecode: ${CROSS_COMPILE}as $AFLAGS -o $1.o $1.s > /dev/null
2>&1
scripts/decodecode: grep -v "/tmp\|Disassembly\|\.text\|^$" > $1.dis
2>&1
scripts/gcc-stack-usage.sh:cat &1 \
scripts/get_maintainer.pl: my $output = `git ls-remote --exit-code
-h
"$url" $branch > /dev/null 2>&1`;
scripts/get_maintainer.pl:$cmd .= " 2>&1";
scripts/kernel-doc: open IN, "$cmd --version 2>&1 |";
So we're probably fine?
Obviously. :) I'll send the v2.
Re: [PATCH] scripts: dtc-version: Don't show error messages
Hi Dragan,
On 2/6/24 11:37, Dragan Simic wrote:
[You don't often get email from dsi...@manjaro.org. Learn why this is
important at https://aka.ms/LearnAboutSenderIdentification ]
Hello Quentin,
On 2024-02-06 11:25, Quentin Schulz wrote:
On 2/6/24 04:56, Dragan Simic wrote:
Prevent the error messages produced by which(1), such as the one
quoted
below, from being visible in the build outputs.
which: no dtc in (./scripts/dtc)
This makes the build outputs look a tiny bit cleaner.
Signed-off-by: Dragan Simic
---
scripts/dtc-version.sh | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/scripts/dtc-version.sh b/scripts/dtc-version.sh
index 53ff868bcdce..6d3d7b68fdfa 100755
--- a/scripts/dtc-version.sh
+++ b/scripts/dtc-version.sh
@@ -15,7 +15,7 @@ if [ ${#dtc} -eq 0 ]; then
exit 1
fi
-if ! which $dtc >/dev/null ; then
+if ! which $dtc >/dev/null 2>/dev/null ; then
What about
which $dtc > /dev/null 2>&1
instead?
That's exactly what I intended to use, but IIRC some shells
or some older versions of some shells may not recognize that,
so I went with a more verbose, but slightly safer option.
$ git -c core.pager='' grep "2>&1" scripts
scripts/Kbuild.include: if (which $(strip $(c))$(CC)) > /dev/null 2>&1
; then \
scripts/Kbuild.include: if ($(1)) >/dev/null 2>&1;\
scripts/Kbuild.include:cc-name = $(shell $(CC) -v 2>&1 | grep -q "clang
version" && echo clang || echo gcc)
scripts/Kconfig.include:if-success = $(shell,{ $(1); } >/dev/null 2>&1
&& echo "$(2)" || echo "$(3)")
scripts/checkpatch.pl: $maintained_status{$filename} = `perl
$root/scripts/get_maintainer.pl --status --nom --nol --nogit
--nogit-fallback -f $filename 2>&1`;
scripts/checkpatch.pl: my $output = `${git_command} log --no-color
--format='%H %s' -1 $commit 2>&1`;
scripts/coccicheck:echo $SPFLAGS | grep -Ee "--profile|--show-trying"
2>&1 > /dev/null
scripts/decodecode: ${CROSS_COMPILE}as $AFLAGS -o $1.o $1.s > /dev/null 2>&1
scripts/decodecode: grep -v "/tmp\|Disassembly\|\.text\|^$" > $1.dis
2>&1
scripts/gcc-stack-usage.sh:cat <-c -o $TMP >/dev/null 2>&1 \
scripts/get_maintainer.pl: my $output = `git ls-remote --exit-code -h
"$url" $branch > /dev/null 2>&1`;
scripts/get_maintainer.pl:$cmd .= " 2>&1";
scripts/kernel-doc: open IN, "$cmd --version 2>&1 |";
So we're probably fine?
Cheers,
Quentin
Re: [PATCH] scripts: dtc-version: Don't show error messages
Hello Quentin,
On 2024-02-06 11:25, Quentin Schulz wrote:
On 2/6/24 04:56, Dragan Simic wrote:
Prevent the error messages produced by which(1), such as the one
quoted
below, from being visible in the build outputs.
which: no dtc in (./scripts/dtc)
This makes the build outputs look a tiny bit cleaner.
Signed-off-by: Dragan Simic
---
scripts/dtc-version.sh | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/scripts/dtc-version.sh b/scripts/dtc-version.sh
index 53ff868bcdce..6d3d7b68fdfa 100755
--- a/scripts/dtc-version.sh
+++ b/scripts/dtc-version.sh
@@ -15,7 +15,7 @@ if [ ${#dtc} -eq 0 ]; then
exit 1
fi
-if ! which $dtc >/dev/null ; then
+if ! which $dtc >/dev/null 2>/dev/null ; then
What about
which $dtc > /dev/null 2>&1
instead?
That's exactly what I intended to use, but IIRC some shells
or some older versions of some shells may not recognize that,
so I went with a more verbose, but slightly safer option.
Reviewed-by: Quentin Schulz
Thanks for your review.
Re: [PATCH v2 1/4] imx8mp-phyboard-pollux-rdk: sync with kernel devicetree from v6.8-rc2
Hello Benjamin,
Am Mittwoch, dem 31.01.2024 um 09:45 +0100 schrieb Benjamin Hahn:
> Signed-off-by: Benjamin Hahn
please add a proper patch description. Adding only a subject line
ist not enough.
Thanks,
Teresa
> ---
> arch/arm/dts/imx8mp-phyboard-pollux-rdk.dts | 162
> +++-
> 1 file changed, 159 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm/dts/imx8mp-phyboard-pollux-rdk.dts
> b/arch/arm/dts/imx8mp-phyboard-pollux-rdk.dts
> index 6aa720bafe..c8640cac3e 100644
> --- a/arch/arm/dts/imx8mp-phyboard-pollux-rdk.dts
> +++ b/arch/arm/dts/imx8mp-phyboard-pollux-rdk.dts
> @@ -19,6 +19,36 @@
> stdout-path =
> };
>
> + reg_can1_stby: regulator-can1-stby {
> + compatible = "regulator-fixed";
> + pinctrl-names = "default";
> + pinctrl-0 = <_flexcan1_reg>;
> + gpio = < 20 GPIO_ACTIVE_LOW>;
> + regulator-max-microvolt = <330>;
> + regulator-min-microvolt = <330>;
> + regulator-name = "can1-stby";
> + };
> +
> + reg_can2_stby: regulator-can2-stby {
> + compatible = "regulator-fixed";
> + pinctrl-names = "default";
> + pinctrl-0 = <_flexcan2_reg>;
> + gpio = < 21 GPIO_ACTIVE_LOW>;
> + regulator-max-microvolt = <330>;
> + regulator-min-microvolt = <330>;
> + regulator-name = "can2-stby";
> + };
> +
> + reg_usb1_vbus: regulator-usb1-vbus {
> + compatible = "regulator-fixed";
> + pinctrl-names = "default";
> + pinctrl-0 = <_usb1_vbus>;
> + gpio = < 12 GPIO_ACTIVE_LOW>;
> + regulator-max-microvolt = <500>;
> + regulator-min-microvolt = <500>;
> + regulator-name = "usb1_host_vbus";
> + };
> +
> reg_usdhc2_vmmc: regulator-usdhc2 {
> compatible = "regulator-fixed";
> pinctrl-names = "default";
> @@ -57,6 +87,21 @@
> };
> };
>
> +/* CAN FD */
> + {
> + pinctrl-names = "default";
> + pinctrl-0 = <_flexcan1>;
> + xceiver-supply = <_can1_stby>;
> + status = "okay";
> +};
> +
> + {
> + pinctrl-names = "default";
> + pinctrl-0 = <_flexcan2>;
> + xceiver-supply = <_can2_stby>;
> + status = "okay";
> +};
> +
> {
> clock-frequency = <40>;
> pinctrl-names = "default", "gpio";
> @@ -76,15 +121,15 @@
> compatible = "nxp,pca9533";
> reg = <0x62>;
>
> - led1 {
> + led-1 {
> type = ;
> };
>
> - led2 {
> + led-2 {
> type = ;
> };
>
> - led3 {
> + led-3 {
> type = ;
> };
> };
> @@ -101,8 +146,51 @@
> status = "okay";
> };
>
> +/* USB1 Host mode Type-A */
> +_phy0 {
> + vbus-supply = <_usb1_vbus>;
> + status = "okay";
> +};
> +
> +_0 {
> + status = "okay";
> +};
> +
> +_dwc3_0 {
> + dr_mode = "host";
> + status = "okay";
> +};
> +
> +/* USB2 4-port USB3.0 HUB */
> +_phy1 {
> + status = "okay";
> +};
> +
> +_1 {
> + fsl,permanently-attached;
> + fsl,disable-port-power-control;
> + status = "okay";
> +};
> +
> +_dwc3_1 {
> + dr_mode = "host";
> + status = "okay";
> +};
> +
> +/* RS232/RS485 */
> + {
> + assigned-clocks = < IMX8MP_CLK_UART2>;
> + assigned-clock-parents = < IMX8MP_SYS_PLL1_80M>;
> + pinctrl-names = "default";
> + pinctrl-0 = <_uart2>;
> + uart-has-rtscts;
> + status = "okay";
> +};
> +
> /* SD-Card */
> {
> + assigned-clocks = < IMX8MP_CLK_USDHC2>;
> + assigned-clock-rates = <2>;
> pinctrl-names = "default", "state_100mhz", "state_200mhz";
> pinctrl-0 = <_usdhc2>, <_usdhc2_pins>;
> pinctrl-1 = <_usdhc2_100mhz>, <_usdhc2_pins>;
> @@ -113,6 +201,33 @@
> status = "okay";
> };
>
> + {
> + gpio-line-names = "", "", "X_PMIC_WDOG_B", "",
> + "PMIC_SD_VSEL", "", "", "", "", "",
> + "", "", "USB1_OTG_PWR", "", "", "X_nETHPHY_INT";
> +};
> +
> + {
> + gpio-line-names = "", "", "", "",
> + "", "", "", "", "", "",
> + "", "", "X_SD2_CD_B", "", "", "",
> + "", "", "", "SD2_RESET_B";
> +};
> +
> + {
> + gpio-line-names = "", "", "", "",
> + "", "", "", "", "", "",
> + "", "", "", "", "", "",
> + "", "", "", "", "nCAN1_EN", "nCAN2_EN";
> +};
> +
> + {
> + gpio-line-names = "", "", "", "",
> + "", "", "", "", "", "",
> + "", "", "", "", "", "",
> + "", "", "X_PMIC_IRQ_B", "", "nENET0_INT_PWDN";
> +};
> +
> {
>
Re: [PATCH] scripts: dtc-version: Don't show error messages
Hi Dragan,
On 2/6/24 04:56, Dragan Simic wrote:
[You don't often get email from dsi...@manjaro.org. Learn why this is important
at https://aka.ms/LearnAboutSenderIdentification ]
Prevent the error messages produced by which(1), such as the one quoted
below, from being visible in the build outputs.
which: no dtc in (./scripts/dtc)
This makes the build outputs look a tiny bit cleaner.
Signed-off-by: Dragan Simic
---
scripts/dtc-version.sh | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/scripts/dtc-version.sh b/scripts/dtc-version.sh
index 53ff868bcdce..6d3d7b68fdfa 100755
--- a/scripts/dtc-version.sh
+++ b/scripts/dtc-version.sh
@@ -15,7 +15,7 @@ if [ ${#dtc} -eq 0 ]; then
exit 1
fi
-if ! which $dtc >/dev/null ; then
+if ! which $dtc >/dev/null 2>/dev/null ; then
What about
which $dtc > /dev/null 2>&1
instead?
In any case,
Reviewed-by: Quentin Schulz
Thanks,
Quentin
[PATCH] arm: mach-k3: Refactor QoS settings
Refactor common QoS code into a new common header file, and the soc
specific setup_qos functions into a common API.
Rename $(soc)_qos_count and $(soc)_qos_data variables to qos_count and
qos_data. When QoS settings of more SoCs are added, only one pair will
be defined at a time, based on the config SOC_K3_$(soc).
This refactoring has been done for 2 major purposes.
- The auto-generated $(soc)_qos_data.c and $(soc)_qos.h files cannot
have any code that is specific to any bootloader. Those files have to
remain agnostic of different bootloader implementations and their
header files.
- The existing implementation was less than ideal and would have enabled
multiple $(soc)_qos_count and $(soc)_qos_data variables for all SoC
variants.
Signed-off-by: Aradhya Bhatia
---
arch/arm/mach-k3/Kconfig | 8 +++
arch/arm/mach-k3/am62a7_init.c| 14
arch/arm/mach-k3/common.c | 12 ++
arch/arm/mach-k3/common.h | 8 +++
arch/arm/mach-k3/include/mach/hardware.h | 9
arch/arm/mach-k3/include/mach/k3-qos.h| 22 +++
arch/arm/mach-k3/r5/am62ax/Makefile | 2 +-
.../{include/mach => r5/am62ax}/am62a_qos.h | 0
.../{am62a_qos_data.c => am62a_qos_uboot.c} | 9
9 files changed, 56 insertions(+), 28 deletions(-)
create mode 100644 arch/arm/mach-k3/include/mach/k3-qos.h
rename arch/arm/mach-k3/{include/mach => r5/am62ax}/am62a_qos.h (100%)
rename arch/arm/mach-k3/r5/am62ax/{am62a_qos_data.c => am62a_qos_uboot.c} (85%)
diff --git a/arch/arm/mach-k3/Kconfig b/arch/arm/mach-k3/Kconfig
index 03898424c954..ffc4a9c29029 100644
--- a/arch/arm/mach-k3/Kconfig
+++ b/arch/arm/mach-k3/Kconfig
@@ -139,6 +139,14 @@ config K3_DM_FW
bootloader, it makes RM and PM services not being available
during R5 SPL execution time.
+config K3_QOS
+ bool "Enable Quality of Service (QoS) Settings for TI K3 SoCs"
+ default y if CPU_V7R && SOC_K3_AM62A7
+ help
+ This option enables the R5 SPL to apply QoS settings for various
+ HW controllers inside the TI K3 SoCs. The files for QoS settings are
+ generated from Sysconfig and k3-resource-partitioning tools.
+
config K3_X509_SWRV
int "SWRV for X509 certificate used for boot images"
default 1
diff --git a/arch/arm/mach-k3/am62a7_init.c b/arch/arm/mach-k3/am62a7_init.c
index d72e19936b9b..080274e3af58 100644
--- a/arch/arm/mach-k3/am62a7_init.c
+++ b/arch/arm/mach-k3/am62a7_init.c
@@ -69,20 +69,6 @@ static void ctrl_mmr_unlock(void)
mmr_unlock(PADCFG_MMR1_BASE, 1);
}
-#if (IS_ENABLED(CONFIG_CPU_V7R))
-static void setup_qos(void)
-{
- u32 i;
-
- for (i = 0; i < am62a_qos_count; i++)
- writel(am62a_qos_data[i].val, (uintptr_t)am62a_qos_data[i].reg);
-}
-#else
-static void setup_qos(void)
-{
-}
-#endif
-
void board_init_f(ulong dummy)
{
struct udevice *dev;
diff --git a/arch/arm/mach-k3/common.c b/arch/arm/mach-k3/common.c
index f411366778f0..b54f2ddc4729 100644
--- a/arch/arm/mach-k3/common.c
+++ b/arch/arm/mach-k3/common.c
@@ -28,6 +28,8 @@
#include
#include
+#include
+
#if IS_ENABLED(CONFIG_SYS_K3_SPL_ATF)
enum {
IMAGE_ID_ATF,
@@ -595,3 +597,13 @@ int misc_init_r(void)
void __weak do_board_detect(void)
{
}
+
+#if (IS_ENABLED(CONFIG_K3_QOS))
+void setup_qos(void)
+{
+ u32 i;
+
+ for (i = 0; i < qos_count; i++)
+ writel(qos_data[i].val, (uintptr_t)qos_data[i].reg);
+}
+#endif
diff --git a/arch/arm/mach-k3/common.h b/arch/arm/mach-k3/common.h
index e9db9fbfb63d..53aa186b31a4 100644
--- a/arch/arm/mach-k3/common.h
+++ b/arch/arm/mach-k3/common.h
@@ -45,3 +45,11 @@ void ti_secure_image_post_process(void **p_image, size_t
*p_size);
struct ti_sci_handle *get_ti_sci_handle(void);
void do_board_detect(void);
void ti_secure_image_check_binary(void **p_image, size_t *p_size);
+
+#if (IS_ENABLED(CONFIG_K3_QOS))
+void setup_qos(void);
+#else
+static inline void setup_qos(void)
+{
+}
+#endif
diff --git a/arch/arm/mach-k3/include/mach/hardware.h
b/arch/arm/mach-k3/include/mach/hardware.h
index a1a9dfbde66c..52ef82e70b07 100644
--- a/arch/arm/mach-k3/include/mach/hardware.h
+++ b/arch/arm/mach-k3/include/mach/hardware.h
@@ -30,7 +30,6 @@
#ifdef CONFIG_SOC_K3_AM62A7
#include "am62a_hardware.h"
-#include "am62a_qos.h"
#endif
/* Assuming these addresses and definitions stay common across K3 devices */
@@ -97,12 +96,4 @@ struct rom_extended_boot_data {
u32 num_components;
};
-struct k3_qos_data {
- u32 reg;
- u32 val;
-};
-
-extern struct k3_qos_data am62a_qos_data[];
-extern u32 am62a_qos_count;
-
#endif /* _ASM_ARCH_HARDWARE_H_ */
diff --git a/arch/arm/mach-k3/include/mach/k3-qos.h
b/arch/arm/mach-k3/include/mach/k3-qos.h
new file mode 100644
index ..e00e1de5b9cb
--- /dev/null
+++ b/arch/arm/mach-k3/include/mach/k3-qos.h
@@ -0,0
Re: [PATCH v3 3/3] cmd: rng: Add rng list command
Hi Tom, On Tue, Feb 6, 2024 at 2:14 AM Tom Rini wrote: > > On Wed, Jan 31, 2024 at 02:14:26PM +, Weizhao Ouyang wrote: > > > The 'rng list' command probes all RNG devices and list those devices > > that are successfully probed. Also update the help info. > > > > Reviewed-by: Heinrich Schuchardt > > Signed-off-by: Weizhao Ouyang > > Reviewed-by: Matthias Brugger > > Reviewed-by: Igor Opaniuk > > --- > > cmd/rng.c | 23 ++- > > 1 file changed, 18 insertions(+), 5 deletions(-) > > Please update doc/usage/cmd/rng.rst as well, thanks. Ok, I will update it. BR, Weizhao > > -- > Tom
