Re: [PATCH v1] riscv: cpu: improve multi-letter extension detection in supports_extension()

[Conor Dooley]

On Tue, Mar 05, 2024 at 08:34:20AM +0100, Heinrich Schuchardt wrote:
> On 3/5/24 00:28, Conor Dooley wrote:
> > From: Conor Dooley 
> According to
> https://github.com/riscv/riscv-isa-manual/blob/main/src/naming.adoc the
> ISA string is case insensitive. Why can we assume here that it is lower
> case?

The binding does not allow upper-case.


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[PATCH v3 3/3] cli: compile history code if and only if history config is selected

[Hanyuan Zhao]

This commit allows user to determine whether to have history recording
in command-line. Previously to this commit, the CMD_HISTORY only sets
the compiling of cmd/history.c, and the history code in cli_readline.c
is always compiled and will take a lot of space to store history even if
we say N to CMD_HISTORY.


Signed-off-by: Hanyuan Zhao 
---
This is v3 of patch series cli: allow users to disable history
if unused at all. Please ignore the v2 version.
---
Changes v1 -> v3:
  - Move the #ifdef CONFIG_CMD_HISTORY directives to this patch. These 
directives
are still necessary when users are not using the history.
---
 common/cli_readline.c | 37 +
 1 file changed, 25 insertions(+), 12 deletions(-)

diff --git a/common/cli_readline.c b/common/cli_readline.c
index cf4339d0e5..9f71b33a01 100644
--- a/common/cli_readline.c
+++ b/common/cli_readline.c
@@ -67,12 +67,14 @@ static char *delete_char (char *buffer, char *p, int *colp, 
int *np, int plen)
 #define CTL_BACKSPACE  ('\b')
 #define DEL((char)255)
 #define DEL7   ((char)127)
-#define CREAD_HIST_CHAR('!')
 
 #define getcmd_putch(ch)   putc(ch)
 #define getcmd_getch() getchar()
 #define getcmd_cbeep() getcmd_putch('\a')
 
+#ifdef CONFIG_CMD_HISTORY
+
+#define CREAD_HIST_CHAR('!')
 #ifdef CONFIG_SPL_BUILD
 #define HIST_MAX   3
 #define HIST_SIZE  32
@@ -93,14 +95,6 @@ static char *hist_list[HIST_MAX];
 
 #define add_idx_minus_one() ((hist_add_idx == 0) ? hist_max : hist_add_idx-1)
 
-static void getcmd_putchars(int count, int ch)
-{
-   int i;
-
-   for (i = 0; i < count; i++)
-   getcmd_putch(ch);
-}
-
 static int hist_init(void)
 {
int i;
@@ -201,6 +195,15 @@ void cread_print_hist_list(void)
i++;
}
 }
+#endif /* CONFIG_CMD_HISTORY */
+
+static void getcmd_putchars(int count, int ch)
+{
+   int i;
+
+   for (i = 0; i < count; i++)
+   getcmd_putch(ch);
+}
 
 #define BEGINNING_OF_LINE() {  \
while (cls->num) {  \
@@ -374,6 +377,7 @@ int cread_line_process_ch(struct cli_line_state *cls, char 
ichar)
cls->eol_num--;
}
break;
+#ifdef CONFIG_CMD_HISTORY
case CTL_CH('p'):
case CTL_CH('n'):
if (cls->history) {
@@ -403,6 +407,7 @@ int cread_line_process_ch(struct cli_line_state *cls, char 
ichar)
break;
}
break;
+#endif
case '\t':
if (IS_ENABLED(CONFIG_AUTO_COMPLETE) && cls->cmd_complete) {
int num2, col;
@@ -499,19 +504,23 @@ static int cread_line(const char *const prompt, char 
*buf, unsigned int *len,
}
*len = cls->eol_num;
 
+#ifdef CONFIG_CMD_HISTORY
if (buf[0] && buf[0] != CREAD_HIST_CHAR)
cread_add_to_hist(buf);
hist_cur = hist_add_idx;
+#endif
 
return 0;
 }
 
 #else /* !CONFIG_CMDLINE_EDITING */
 
+#ifdef CONFIG_CMD_HISTORY
 static inline int hist_init(void)
 {
return 0;
 }
+#endif
 
 static int cread_line(const char *const prompt, char *buf, unsigned int *len,
  int timeout)
@@ -649,7 +658,9 @@ int cli_readline_into_buffer(const char *const prompt, char 
*buffer,
char *p = buffer;
uint len = CONFIG_SYS_CBSIZE;
int rc;
-   static int initted;
+#ifdef CONFIG_CMD_HISTORY
+   static int hist_initted;
+#endif
 
/*
 * Say N to CMD_HISTORY_USE_CALLOC will skip runtime
@@ -663,11 +674,13 @@ int cli_readline_into_buffer(const char *const prompt, 
char *buffer,
 * or disable CMD_HISTORY.
 */
if (IS_ENABLED(CONFIG_CMDLINE_EDITING) && (gd->flags & GD_FLG_RELOC)) {
-   if (!initted) {
+#ifdef CONFIG_CMD_HISTORY
+   if (!hist_initted) {
rc = hist_init();
if (rc == 0)
-   initted = 1;
+   hist_initted = 1;
}
+#endif
 
if (prompt)
puts(prompt);
-- 
2.34.1

[PATCH v3 2/3] cli: allow users to determine history buffer allocation method

[Hanyuan Zhao]

This commit allows users to choose the appropriate memory
allocation method between static allocated and dynamically
calloc. The previous static-array way will not obviously
contribute to the final binary size since it is uninitialized,
and might have better performance than the dynamical one.
Now we provide the users with both the two options.

Signed-off-by: Hanyuan Zhao 
---
This is v3 of patch series cli: allow users to disable history
if unused at all. Please ignore the v2 version.
---
Changes v1 -> v3:
  - Add more detailed information about the CMD_HISTORY_USE_CALLOC
option both in the Kconfig and the code.
  - Update the comments on global history array and flash running
problems.
---
 cmd/Kconfig   | 11 +++
 common/cli_readline.c | 36 +---
 2 files changed, 36 insertions(+), 11 deletions(-)

diff --git a/cmd/Kconfig b/cmd/Kconfig
index a86b570517..7d2c050e08 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -189,6 +189,17 @@ config CMD_HISTORY
  Show the command-line history, i.e. a list of commands that are in
  the history buffer.
 
+config CMD_HISTORY_USE_CALLOC
+   bool "dynamically allocate memory"
+   default y
+   depends on CMD_HISTORY
+   help
+ Saying Y to this will use calloc to get the space for history
+ storing. Otherwise the history buffer will be an uninitialized
+ static array directly, without the memory allocation, and it is
+ writable after relocation to RAM. If u-boot is running from ROM
+ all the time or unsure, say Y to this.
+
 config CMD_LICENSE
bool "license"
select BUILD_BIN2C
diff --git a/common/cli_readline.c b/common/cli_readline.c
index 99e7efdfe5..cf4339d0e5 100644
--- a/common/cli_readline.c
+++ b/common/cli_readline.c
@@ -86,6 +86,9 @@ static int hist_add_idx;
 static int hist_cur = -1;
 static unsigned hist_num;
 
+#ifndef CONFIG_CMD_HISTORY_USE_CALLOC
+static char hist_data[HIST_MAX][HIST_SIZE + 1];
+#endif
 static char *hist_list[HIST_MAX];
 
 #define add_idx_minus_one() ((hist_add_idx == 0) ? hist_max : hist_add_idx-1)
@@ -100,20 +103,26 @@ static void getcmd_putchars(int count, int ch)
 
 static int hist_init(void)
 {
-   unsigned char *hist;
int i;
 
-   hist_max = 0;
-   hist_add_idx = 0;
-   hist_cur = -1;
-   hist_num = 0;
-
-   hist = calloc(HIST_MAX, HIST_SIZE + 1);
+#ifndef CONFIG_CMD_HISTORY_USE_CALLOC
+   for (i = 0; i < HIST_MAX; i++) {
+   hist_list[i] = hist_data[i];
+   hist_list[i][0] = '\0';
+   }
+#else
+   unsigned char *hist = calloc(HIST_MAX, HIST_SIZE + 1);
if (!hist)
panic("%s: calloc: out of memory!\n", __func__);
 
for (i = 0; i < HIST_MAX; i++)
hist_list[i] = hist + (i * (HIST_SIZE + 1));
+#endif
+
+   hist_max = 0;
+   hist_add_idx = 0;
+   hist_cur = -1;
+   hist_num = 0;
 
return 0;
 }
@@ -643,10 +652,15 @@ int cli_readline_into_buffer(const char *const prompt, 
char *buffer,
static int initted;
 
/*
-* History uses a global array which is not
-* writable until after relocation to RAM.
-* Revert to non-history version if still
-* running from flash.
+* Say N to CMD_HISTORY_USE_CALLOC will skip runtime
+* allocation for the history buffer and directly
+* use an uninitialized static array as the buffer.
+* Doing this might have better performance and not
+* increase the binary file's size, as it only marks
+* the size. However, the array is only writable after
+* relocation to RAM. If u-boot is running from ROM
+* all the time, consider say Y to CMD_HISTORY_USE_CALLOC
+* or disable CMD_HISTORY.
 */
if (IS_ENABLED(CONFIG_CMDLINE_EDITING) && (gd->flags & GD_FLG_RELOC)) {
if (!initted) {
-- 
2.34.1

[PATCH v3 1/3] cli: panic when failed to allocate memory for the history buffer

[Hanyuan Zhao]

This commit simply modifies the history initialize function,
replacing the return value by panic with reasons. The calling
chains of hist_init don't have steps explicitly throwing or
dealing with the ENOMEM error, and once the init fails, the
whole system is died. Using panic here to provide error
information instead.

Signed-off-by: Hanyuan Zhao 
---
This is v3 of patch series cli: allow users to disable history
if unused at all. Please ignore the v2 version.
---
Changes v1 -> v3:
  - Separate the first patch and let this patch be the panic one.
---
 common/cli_readline.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/common/cli_readline.c b/common/cli_readline.c
index 2507be2295..99e7efdfe5 100644
--- a/common/cli_readline.c
+++ b/common/cli_readline.c
@@ -110,7 +110,7 @@ static int hist_init(void)
 
hist = calloc(HIST_MAX, HIST_SIZE + 1);
if (!hist)
-   return -ENOMEM;
+   panic("%s: calloc: out of memory!\n", __func__);
 
for (i = 0; i < HIST_MAX; i++)
hist_list[i] = hist + (i * (HIST_SIZE + 1));
-- 
2.34.1

Re: [PATCH v1] riscv: cpu: improve multi-letter extension detection in supports_extension()

[Heinrich Schuchardt]

On 3/5/24 00:28, Conor Dooley wrote:

From: Conor Dooley 

The first multi-letter extension after the single-letter extensions does
not have to be preceded by an underscore, which could cause the parser
to mistakenly find a single-letter extension after the start of the
multi-letter portion of the string.
Three letters precede multi-letter extensions (s, x & z), none of which
are valid single-letter extensions. The dt-binding also allows
multi-letter extensions starting with h, but no such extension have been
frozen or ratified, and the unprivileged spec no longer uses "h" as a
prefix for multi-letter hypervisor extensions, having moved to "sh"
instead. For that reason, modify the parser to stop at s, x & z to prevent
this overrun, ignoring h.

Signed-off-by: Conor Dooley 
---
The parser in U-Boot only supports single-letter extensions & the
single-letter h has to be at the end of the single-letter section, so it
would not be difficult to terminate parsing once a h is seen (you'd need
to support the hypervisor extension to support additional hypervisor
extensions after all) if in the future a multi-letter extension starting
with h did come about. I've got no problem adding a special case for h,
but I'm tempted to just remove the multi-letter h extensions from the
binding, given there's actually not going to be any extensions ratified
using that naming scheme.

CC: Rick Chen 
CC: Leo 
CC: Tom Rini 
CC: Simon Glass 
CC: Chanho Park 
CC: Heinrich Schuchardt 
CC: Bin Meng 
CC: Conor Dooley 
CC: pal...@dabbelt.com
CC: u-boot@lists.denx.de
---
  arch/riscv/cpu/cpu.c | 22 --
  1 file changed, 16 insertions(+), 6 deletions(-)

diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c
index 8445c5823e..ecfefa1a02 100644
--- a/arch/riscv/cpu/cpu.c
+++ b/arch/riscv/cpu/cpu.c
@@ -49,14 +49,24 @@ static inline bool supports_extension(char ext)
}
if (!cpu_get_desc(dev, desc, sizeof(desc))) {
/*
-* skip the first 4 characters (rv32|rv64) and
-* check until underscore
+* skip the first 4 characters (rv32|rv64)
 */
for (i = 4; i < sizeof(desc); i++) {
-   if (desc[i] == '_' || desc[i] == '\0')
-   break;
-   if (desc[i] == ext)
-   return true;
+   switch (desc[i]) {
+   case 's':
+   case 'x':
+   case 'z':
+   case '_':
+   case '\0':
+   /*
+* Any of these characters mean the single
+* letter extensions have all been consumed.
+*/
+   return false;
+   default:
+   if (desc[i] == ext)
+   return true;
+   }
}
}



According to
https://github.com/riscv/riscv-isa-manual/blob/main/src/naming.adoc the
ISA string is case insensitive. Why can we assume here that it is lower
case?

Best regards

Heinrich

Re: [PATCH 3/8] net: dw_eth_qos: add support for Qualcomm SM8150 SoC

[Sumit Garg]

On Thu, 29 Feb 2024 at 19:53, Volodymyr Babchuk
 wrote:
>
> Add support for Qualcomm SM8150 SoC to the EQOS driver. SM8150 has two
> main differences from already supported QCS404: it has another RGMII
> configuration registers set and it does require RGMII loopback to
> be disabled.
>
> To support different variants of QCOM SoC we had to add two new fields
> to the eqos_priv struct: eqos_qcom_rgmii_regs and
> qcom_enable_loopback.
>
> Signed-off-by: Volodymyr Babchuk 
> ---
>
>  drivers/net/dwc_eth_qos.c  |  4 +++
>  drivers/net/dwc_eth_qos.h  |  2 ++
>  drivers/net/dwc_eth_qos_qcom.c | 47 +++---
>  3 files changed, 44 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
> index 9b3bce1dc8..882b854697 100644
> --- a/drivers/net/dwc_eth_qos.c
> +++ b/drivers/net/dwc_eth_qos.c
> @@ -1700,6 +1700,10 @@ static const struct udevice_id eqos_ids[] = {
> .compatible = "qcom,qcs404-ethqos",
> .data = (ulong)_qcom_config
> },
> +   {
> +   .compatible = "qcom,sm8150-ethqos",
> +   .data = (ulong)_qcom_config
> +   },
>  #endif
>  #if IS_ENABLED(CONFIG_DWC_ETH_QOS_STARFIVE)
> {
> diff --git a/drivers/net/dwc_eth_qos.h b/drivers/net/dwc_eth_qos.h
> index e3222e1e17..216e1afe53 100644
> --- a/drivers/net/dwc_eth_qos.h
> +++ b/drivers/net/dwc_eth_qos.h
> @@ -255,6 +255,7 @@ struct eqos_priv {
> struct eqos_dma_regs *dma_regs;
> struct eqos_tegra186_regs *tegra186_regs;
> void *eqos_qcom_rgmii_regs;
> +   struct dwmac_rgmii_regs *eqos_qcom_por;
> struct reset_ctl reset_ctl;
> struct gpio_desc phy_reset_gpio;
> struct clk clk_master_bus;
> @@ -277,6 +278,7 @@ struct eqos_priv {
> bool started;
> bool reg_access_ok;
> bool clk_ck_enabled;
> +   bool qcom_enable_loopback;
> unsigned int tx_fifo_sz, rx_fifo_sz;
> u32 reset_delays[3];
>  };
> diff --git a/drivers/net/dwc_eth_qos_qcom.c b/drivers/net/dwc_eth_qos_qcom.c
> index 8178138fc6..e9592ff686 100644
> --- a/drivers/net/dwc_eth_qos_qcom.c
> +++ b/drivers/net/dwc_eth_qos_qcom.c
> @@ -95,6 +95,15 @@ static struct dwmac_rgmii_regs emac_v2_3_0_por = {
> .io_macro_config2 = 0x2060
>  };
>
> +static struct dwmac_rgmii_regs emac_v2_1_0_por = {
> +   .io_macro_config = 0x40C01343,
> +   .sdcc_hc_dll_config = 0x2004642C,
> +   .sdcc_hc_ddr_config = 0x,
> +   .sdcc_hc_dll_config2 = 0x0020,
> +   .sdcc_usr_ctl = 0x00010800,
> +   .io_macro_config2 = 0x2060
> +};
> +
>  static void ethqos_set_func_clk_en(struct dwmac_rgmii_regs *regs)
>  {
> setbits_le32(>io_macro_config, RGMII_CONFIG_FUNC_CLK_EN);
> @@ -172,6 +181,8 @@ static int ethqos_rgmii_macro_init(struct udevice *dev,
>struct dwmac_rgmii_regs *regs,
>unsigned long speed)
>  {
> +   struct eqos_priv *eqos = dev_get_priv(dev);
> +
> /* Disable loopback mode */
> clrbits_le32(>io_macro_config2,
>  RGMII_CONFIG2_TX_TO_RX_LOOPBACK_EN);
> @@ -202,7 +213,9 @@ static int ethqos_rgmii_macro_init(struct udevice *dev,
> SDCC_DDR_CONFIG_PRG_RCLK_DLY, 57);
> setbits_le32(>sdcc_hc_ddr_config, 
> SDCC_DDR_CONFIG_PRG_DLY_EN);
>
> -   setbits_le32(>io_macro_config, 
> RGMII_CONFIG_LOOPBACK_EN);
> +   if (eqos->qcom_enable_loopback)
> +   setbits_le32(>io_macro_config,
> +RGMII_CONFIG_LOOPBACK_EN);

We should explicitly clear the loopback bit for the else part too. I
suppose it can be written cleanly as below here and other places too:

loopback = eqos->qcom_enable_loopback ? RGMII_CONFIG_LOOPBACK_EN : 0;

clrsetbits_le32(>io_macro_config,
RGMII_CONFIG_LOOPBACK_EN,
loopback);

-Sumit

> break;
>
> case SPEED_100:
> @@ -233,7 +246,9 @@ static int ethqos_rgmii_macro_init(struct udevice *dev,
> setbits_le32(>sdcc_hc_ddr_config,
>  SDCC_DDR_CONFIG_EXT_PRG_RCLK_DLY_EN);
>
> -   setbits_le32(>io_macro_config, 
> RGMII_CONFIG_LOOPBACK_EN);
> +   if (eqos->qcom_enable_loopback)
> +   setbits_le32(>io_macro_config,
> +RGMII_CONFIG_LOOPBACK_EN);
> break;
>
> case SPEED_10:
> @@ -265,7 +280,9 @@ static int ethqos_rgmii_macro_init(struct udevice *dev,
> setbits_le32(>sdcc_hc_ddr_config,
>  SDCC_DDR_CONFIG_EXT_PRG_RCLK_DLY_EN);
>
> -   setbits_le32(>io_macro_config, 
> RGMII_CONFIG_LOOPBACK_EN);
> +   if (eqos->qcom_enable_loopback)
> +   setbits_le32(>io_macro_config,
> 

Re: [v2,1/2] cli: panic when failed to allocate memory for the history buffer

[hanyuan]

Hi Tom,

Sorry for disturbing again and again. I have sent three v2 patches in
total to the patchwork, they are:

[v2,1/2] cli: panic when failed to allocate memory for the history buffer
[v2,2/2] cli: allow users to determine history buffer allocation method
[v2,1/1] cli: compile history code if and only if history config is selected

I made their change logs very complex and their relations are hard to
understand. Please ignore all v2 patches and allow me to resend v3
version series, thanks!

Regards,
Hanyuan

Re: [PATCH] configs: rockchip: rock5a: enable environment

[Eugen Hristev]

On 3/5/24 04:10, Trevor Woerner wrote:
> Following the pattern of other Rockchip devices, enable the U-Boot
> environment to be stored in MMC. This patch specifically assumes the
> environment will be stored on the SDcard.
> 
> Signed-off-by: Trevor Woerner 
> ---
>  configs/rock5a-rk3588s_defconfig | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/configs/rock5a-rk3588s_defconfig 
> b/configs/rock5a-rk3588s_defconfig
> index a6471a519514..ac6411667d9a 100644
> --- a/configs/rock5a-rk3588s_defconfig
> +++ b/configs/rock5a-rk3588s_defconfig
> @@ -8,6 +8,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
>  CONFIG_NR_DRAM_BANKS=2
>  CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
>  CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0
> +CONFIG_ENV_SIZE=0x8000
>  CONFIG_DEFAULT_DEVICE_TREE="rk3588s-rock-5a"
>  CONFIG_ROCKCHIP_RK3588=y
>  CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y
> @@ -48,6 +49,8 @@ CONFIG_CMD_REGULATOR=y
>  CONFIG_SPL_OF_CONTROL=y
>  CONFIG_OF_LIVE=y
>  CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks 
> assigned-clock-rates assigned-clock-parents"
> +CONFIG_ENV_IS_IN_MMC=y
> +CONFIG_SYS_MMC_ENV_DEV=1
>  CONFIG_SPL_DM_SEQ_ALIAS=y
>  CONFIG_SPL_REGMAP=y
>  CONFIG_SPL_SYSCON=y


Hi Trevor,

What will happen if there is no Sd-Card, and we boot from eMMC or SPI flash ?

The rockchip pattern is usually to have a standard config for all boards and it 
is
not stored anywhere.

Kever, Jonas, please correct me if I am wrong.

Eugen

Re: [PATCH 1/2] arm: mach-k3: am625: copy bootindex to OCRAM for main domain SPL

[Vignesh Raghavendra]

On 05/03/24 01:57, Bryan Brattlof wrote:
> Hey Vignesh!
> 
> On March  4, 2024 thus sayeth Vignesh Raghavendra:
>> Hi Wadim,
>>
>> On 26/02/24 19:00, Wadim Egorov wrote:
>>> Texas Instruments has begun enabling security settings on the SoCs it
>>> produces to instruct ROM and TIFS to begin protecting the Security
>>> Management Subsystem (SMS) from other binaries we load into the chip by
>>> default.
>>>
>>> One way ROM and TIFS do this is by enabling firewalls to protect the
>>> OCSRAM and HSM RAM regions they're using during bootup.
>>>
>>> The HSM RAM the wakeup SPL is in is firewalled by TIFS to protect
>>> itself from the main domain applications. This means the 'bootindex'
>>> value in HSM RAM, left by ROM to indicate if we're using the primary
>>> or secondary boot-method, must be moved to OCSRAM (that TIFS has open
>>> for us) before we make the jump to the main domain so the main domain's
>>> bootloaders can keep access to this information.
>>>
>>> Based on commit
>>>   b672e8581070 ("arm: mach-k3: copy bootindex to OCRAM for main domain SPL")
>>>
>>
>> FYI, this is mostly a problem in non SPL flow (TI prosperity SBL for
>> example) where HSM RAM would be used by HSM firmware. This should be a
>> issue in R5 SPL flow.  Do you see any issues today? If so, whats the
>> TIFS firmware being used?
>>
>>> Signed-off-by: Wadim Egorov 
>>> ---
>>>  arch/arm/mach-k3/Kconfig  |  3 ++-
>>>  arch/arm/mach-k3/am625_init.c | 15 +--
>>>  arch/arm/mach-k3/include/mach/am62_hardware.h | 15 +++
>>>  3 files changed, 30 insertions(+), 3 deletions(-)
>>>
>>> diff --git a/arch/arm/mach-k3/Kconfig b/arch/arm/mach-k3/Kconfig
>>> index 03898424c9..f5d06593f7 100644
>>> --- a/arch/arm/mach-k3/Kconfig
>>> +++ b/arch/arm/mach-k3/Kconfig
>>> @@ -75,7 +75,8 @@ config SYS_K3_BOOT_PARAM_TABLE_INDEX
>>> default 0x41cffbfc if SOC_K3_J721E
>>> default 0x41cfdbfc if SOC_K3_J721S2
>>> default 0x701bebfc if SOC_K3_AM642
>>> -   default 0x43c3f290 if SOC_K3_AM625
>>> +   default 0x43c3f290 if SOC_K3_AM625 && CPU_V7R
>>> +   default 0x7000f290 if SOC_K3_AM625 && ARM64
>>> default 0x43c3f290 if SOC_K3_AM62A7 && CPU_V7R
>>> default 0x7000f290 if SOC_K3_AM62A7 && ARM64
>>> help
>>> diff --git a/arch/arm/mach-k3/am625_init.c b/arch/arm/mach-k3/am625_init.c
>>> index 6c96e88114..67cf63b103 100644
>>> --- a/arch/arm/mach-k3/am625_init.c
>>> +++ b/arch/arm/mach-k3/am625_init.c
>>> @@ -35,8 +35,10 @@ static struct rom_extended_boot_data bootdata 
>>> __section(".data");
>>>  static void store_boot_info_from_rom(void)
>>>  {
>>> bootindex = *(u32 *)(CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX);
>>> -   memcpy(, (uintptr_t *)ROM_EXTENDED_BOOT_DATA_INFO,
>>> -  sizeof(struct rom_extended_boot_data));
>>> +   if (IS_ENABLED(CONFIG_CPU_V7R)) {
>>> +   memcpy(, (uintptr_t *)ROM_EXTENDED_BOOT_DATA_INFO,
>>> +  sizeof(struct rom_extended_boot_data));
>>> +   }
>>>  }
>>>  
>>>  static void ctrl_mmr_unlock(void)
>>> @@ -175,6 +177,15 @@ void board_init_f(ulong dummy)
>>> k3_sysfw_loader(true, NULL, NULL);
>>> }
>>>  
>>> +#if defined(CONFIG_CPU_V7R)
>>> +   /*
>>> +* Relocate boot information to OCRAM (after TIFS has opend this
>>> +* region for us) so the next bootloader stages can keep access to
>>> +* primary vs backup bootmodes.
>>> +*/
>>> +   writel(bootindex, K3_BOOT_PARAM_TABLE_INDEX_OCRAM);
>>> +#endif
>>> +
>>> /*
>>>  * Force probe of clk_k3 driver here to ensure basic default clock
>>>  * configuration is always done.
>>> diff --git a/arch/arm/mach-k3/include/mach/am62_hardware.h 
>>> b/arch/arm/mach-k3/include/mach/am62_hardware.h
>>> index 54380f36e1..9f504f4642 100644
>>> --- a/arch/arm/mach-k3/include/mach/am62_hardware.h
>>> +++ b/arch/arm/mach-k3/include/mach/am62_hardware.h
>>> @@ -76,8 +76,23 @@
>>>  #define CTRLMMR_MCU_RST_CTRL   (MCU_CTRL_MMR0_BASE + 
>>> 0x18170)
>>>  
>>>  #define ROM_EXTENDED_BOOT_DATA_INFO0x43c3f1e0
>>> +#define K3_BOOT_PARAM_TABLE_INDEX_OCRAM 0x7000F290
>>>  
>>> +/*
>>> + * During the boot process ROM will kill anything that writes to OCSRAM.
>>
>> R5 ROM is long gone when R5 SPL starts, how would it kill anything?
> 
> Looks like this was based on my patch long ago for the AM62Ax family. 
> From what little I remember about this was ROM is leaving behind a 
> firewall that we need TIFS's help to bring down for us. So I just
> blamed ROM ;)

Thats true. ROM does bare minimum and so wont open up firewall around
main SRAM. but TIFS does, so you should be able to access this region
post k3_sysfw_loader().

> 
> IDK if this is an issue for the AM62x family though.
> 

It might be if one tries to "select" DT using EEPROM detect before SYSFW
is up. But that's not the case any more right?

>>
>>> + * This means the wakeup SPL cannot use this region during boot. To
>>> + * complicate things, TIFS will set a 

[PATCH] configs: rockchip: rock5b: enable environment

[Trevor Woerner]

Following the pattern of other Rockchip devices, enable the U-Boot
environment to be stored in MMC. This patch specifically assumes the
environment will be stored on the SDcard.

Signed-off-by: Trevor Woerner 
---
 configs/rock5b-rk3588_defconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/configs/rock5b-rk3588_defconfig b/configs/rock5b-rk3588_defconfig
index 0595325e8107..64a242003aa1 100644
--- a/configs/rock5b-rk3588_defconfig
+++ b/configs/rock5b-rk3588_defconfig
@@ -60,6 +60,8 @@ CONFIG_CMD_REGULATOR=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_LIVE=y
 CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks 
assigned-clock-rates assigned-clock-parents"
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SYS_MMC_ENV_DEV=1
 CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_SPL_REGMAP=y
 CONFIG_SPL_SYSCON=y
-- 
2.43.0.76.g1a87c842ece3

[PATCH] configs: rockchip: rock5a: enable environment

[Trevor Woerner]

Following the pattern of other Rockchip devices, enable the U-Boot
environment to be stored in MMC. This patch specifically assumes the
environment will be stored on the SDcard.

Signed-off-by: Trevor Woerner 
---
 configs/rock5a-rk3588s_defconfig | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/configs/rock5a-rk3588s_defconfig b/configs/rock5a-rk3588s_defconfig
index a6471a519514..ac6411667d9a 100644
--- a/configs/rock5a-rk3588s_defconfig
+++ b/configs/rock5a-rk3588s_defconfig
@@ -8,6 +8,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
 CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0
+CONFIG_ENV_SIZE=0x8000
 CONFIG_DEFAULT_DEVICE_TREE="rk3588s-rock-5a"
 CONFIG_ROCKCHIP_RK3588=y
 CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y
@@ -48,6 +49,8 @@ CONFIG_CMD_REGULATOR=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_LIVE=y
 CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks 
assigned-clock-rates assigned-clock-parents"
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SYS_MMC_ENV_DEV=1
 CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_SPL_REGMAP=y
 CONFIG_SPL_SYSCON=y
-- 
2.43.0.76.g1a87c842ece3

[PATCH] configs: rockchip: rock3a: enable environment

[Trevor Woerner]

Following the pattern of other Rockchip devices, enable the U-Boot
environment to be stored in MMC. This patch specifically assumes the
environment will be stored on the SDcard.

Signed-off-by: Trevor Woerner 
---
 configs/rock-3a-rk3568_defconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/configs/rock-3a-rk3568_defconfig b/configs/rock-3a-rk3568_defconfig
index 28d157dbd7a7..44158a4d34f1 100644
--- a/configs/rock-3a-rk3568_defconfig
+++ b/configs/rock-3a-rk3568_defconfig
@@ -58,6 +58,8 @@ CONFIG_CMD_REGULATOR=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_LIVE=y
 CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks 
assigned-clock-rates assigned-clock-parents"
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SYS_MMC_ENV_DEV=1
 CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_SPL_REGMAP=y
 CONFIG_SPL_SYSCON=y
-- 
2.43.0.76.g1a87c842ece3

[PATCH] configs: rockchip: rock-pi-s: enable environment

[Trevor Woerner]

Following the pattern of other Rockchip devices, enable the U-Boot environment
to be stored in MMC. This patch specifically assumes the environment will be
stored on the SDcard.

Signed-off-by: Trevor Woerner 
---
 configs/rock-pi-s-rk3308_defconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/configs/rock-pi-s-rk3308_defconfig 
b/configs/rock-pi-s-rk3308_defconfig
index 9908a4b4f457..af2cddcc2553 100644
--- a/configs/rock-pi-s-rk3308_defconfig
+++ b/configs/rock-pi-s-rk3308_defconfig
@@ -54,7 +54,9 @@ CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_LIVE=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names 
interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_ENV_IS_IN_MMC=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_SYS_MMC_ENV_DEV=1
 CONFIG_REGMAP=y
 CONFIG_SYSCON=y
 CONFIG_CLK=y
-- 
2.43.0.76.g1a87c842ece3

[PATCH v2 1/1] cli: compile history code if and only if history config is selected

[Hanyuan Zhao]

This commit allows user to determine whether to have history recording
in command-line. Previously to this commit, the CMD_HISTORY only sets
the compiling of cmd/history.c, and the history code in cli_readline.c
is always compiled and will take a lot of space to store history even if
we say N to CMD_HISTORY.


Signed-off-by: Hanyuan Zhao 
---
This is v2 of patch series cli: allow users to disable history if unused at all
---
Changes v1 -> v2:
  - Please ignore the inaccurate description about the history code compilations
in the previous v2 patch: cli: panic when failed.
  - This patch is seperated from the v1 version patch 0001 cli: allow users to
disable history if unused at all, and now be the third of the v2 patches.
  - Move the #ifdef CONFIG_CMD_HISTORY directives to this patch. These 
directives
are still necessary when users are not using the history.
---
 common/cli_readline.c | 37 +
 1 file changed, 25 insertions(+), 12 deletions(-)

diff --git a/common/cli_readline.c b/common/cli_readline.c
index cf4339d0e5..9f71b33a01 100644
--- a/common/cli_readline.c
+++ b/common/cli_readline.c
@@ -67,12 +67,14 @@ static char *delete_char (char *buffer, char *p, int *colp, 
int *np, int plen)
 #define CTL_BACKSPACE  ('\b')
 #define DEL((char)255)
 #define DEL7   ((char)127)
-#define CREAD_HIST_CHAR('!')
 
 #define getcmd_putch(ch)   putc(ch)
 #define getcmd_getch() getchar()
 #define getcmd_cbeep() getcmd_putch('\a')
 
+#ifdef CONFIG_CMD_HISTORY
+
+#define CREAD_HIST_CHAR('!')
 #ifdef CONFIG_SPL_BUILD
 #define HIST_MAX   3
 #define HIST_SIZE  32
@@ -93,14 +95,6 @@ static char *hist_list[HIST_MAX];
 
 #define add_idx_minus_one() ((hist_add_idx == 0) ? hist_max : hist_add_idx-1)
 
-static void getcmd_putchars(int count, int ch)
-{
-   int i;
-
-   for (i = 0; i < count; i++)
-   getcmd_putch(ch);
-}
-
 static int hist_init(void)
 {
int i;
@@ -201,6 +195,15 @@ void cread_print_hist_list(void)
i++;
}
 }
+#endif /* CONFIG_CMD_HISTORY */
+
+static void getcmd_putchars(int count, int ch)
+{
+   int i;
+
+   for (i = 0; i < count; i++)
+   getcmd_putch(ch);
+}
 
 #define BEGINNING_OF_LINE() {  \
while (cls->num) {  \
@@ -374,6 +377,7 @@ int cread_line_process_ch(struct cli_line_state *cls, char 
ichar)
cls->eol_num--;
}
break;
+#ifdef CONFIG_CMD_HISTORY
case CTL_CH('p'):
case CTL_CH('n'):
if (cls->history) {
@@ -403,6 +407,7 @@ int cread_line_process_ch(struct cli_line_state *cls, char 
ichar)
break;
}
break;
+#endif
case '\t':
if (IS_ENABLED(CONFIG_AUTO_COMPLETE) && cls->cmd_complete) {
int num2, col;
@@ -499,19 +504,23 @@ static int cread_line(const char *const prompt, char 
*buf, unsigned int *len,
}
*len = cls->eol_num;
 
+#ifdef CONFIG_CMD_HISTORY
if (buf[0] && buf[0] != CREAD_HIST_CHAR)
cread_add_to_hist(buf);
hist_cur = hist_add_idx;
+#endif
 
return 0;
 }
 
 #else /* !CONFIG_CMDLINE_EDITING */
 
+#ifdef CONFIG_CMD_HISTORY
 static inline int hist_init(void)
 {
return 0;
 }
+#endif
 
 static int cread_line(const char *const prompt, char *buf, unsigned int *len,
  int timeout)
@@ -649,7 +658,9 @@ int cli_readline_into_buffer(const char *const prompt, char 
*buffer,
char *p = buffer;
uint len = CONFIG_SYS_CBSIZE;
int rc;
-   static int initted;
+#ifdef CONFIG_CMD_HISTORY
+   static int hist_initted;
+#endif
 
/*
 * Say N to CMD_HISTORY_USE_CALLOC will skip runtime
@@ -663,11 +674,13 @@ int cli_readline_into_buffer(const char *const prompt, 
char *buffer,
 * or disable CMD_HISTORY.
 */
if (IS_ENABLED(CONFIG_CMDLINE_EDITING) && (gd->flags & GD_FLG_RELOC)) {
-   if (!initted) {
+#ifdef CONFIG_CMD_HISTORY
+   if (!hist_initted) {
rc = hist_init();
if (rc == 0)
-   initted = 1;
+   hist_initted = 1;
}
+#endif
 
if (prompt)
puts(prompt);
-- 
2.34.1

[PATCH v3] board: rockchip: add Rockchip Toybrick TB-RK3588X board

[zhangzj]

From: Elon Zhang 

TB-RK3588X board is a Rockchip Toybrick RK3588 based development board.

Specification:
Rockchip Rk3588 SoC
4x ARM Cortex-A76, 4x ARM Cortex-A55
8/16GB Memory LPDDR4x
Mali G610MC4 GPU
2× MIPI-CSI0 Connector
1x 2Lanes PCIe3.0 Connector
1x SATA3.0 Connector
32GB eMMC Module
2x USB 2.0, 2x USB 3.0
1x HDMI Output, 1x HDMI Input
2x Ethernet Port

Functions work normally:
[1] USB2.0 Host
[2] Ethernet0 with PHY RTL8211F

More information can be obtained from the following websites:
[1] https://t.rock-chips.com/en/wiki/EN/tb-rk3588x_en/index.html
[2] http://t.rock-chips.com/

Kernel commits:
8ffe365f8dc7 ("arm64: dts: rockchip: Add devicetree support for 
TB-RK3588X board")
7140387ff49d ("dt-bindings: arm: rockchip: Add Toybrick TB-RK3588X")

Reviewed-by: Weizhao Ouyang 
Signed-off-by: Elon Zhang 
---
Changes since v2:
  - Sync dts file from upstream linux kernel

Changes since v1:
  - Remove BOARD_SPECIFIC_OPTIONS in board Kconfig
---
 arch/arm/dts/rk3588-toybrick-x0-u-boot.dtsi   |  12 +
 arch/arm/dts/rk3588-toybrick-x0.dts   | 688 ++
 arch/arm/mach-rockchip/rk3588/Kconfig |  25 +
 board/rockchip/toybrick_rk3588/Kconfig|  12 +
 board/rockchip/toybrick_rk3588/MAINTAINERS|   8 +
 board/rockchip/toybrick_rk3588/Makefile   |   6 +
 .../toybrick_rk3588/toybrick-rk3588.c |  39 +
 configs/toybrick-rk3588_defconfig |  82 +++
 doc/board/rockchip/rockchip.rst   |   1 +
 include/configs/toybrick_rk3588.h |  15 +
 10 files changed, 888 insertions(+)
 create mode 100644 arch/arm/dts/rk3588-toybrick-x0-u-boot.dtsi
 create mode 100644 arch/arm/dts/rk3588-toybrick-x0.dts
 create mode 100644 board/rockchip/toybrick_rk3588/Kconfig
 create mode 100644 board/rockchip/toybrick_rk3588/MAINTAINERS
 create mode 100644 board/rockchip/toybrick_rk3588/Makefile
 create mode 100644 board/rockchip/toybrick_rk3588/toybrick-rk3588.c
 create mode 100644 configs/toybrick-rk3588_defconfig
 create mode 100644 include/configs/toybrick_rk3588.h

diff --git a/arch/arm/dts/rk3588-toybrick-x0-u-boot.dtsi 
b/arch/arm/dts/rk3588-toybrick-x0-u-boot.dtsi
new file mode 100644
index 00..1aeb5410e4
--- /dev/null
+++ b/arch/arm/dts/rk3588-toybrick-x0-u-boot.dtsi
@@ -0,0 +1,12 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2024 Rockchip Electronics Co., Ltd.
+ */
+
+#include "rk3588-u-boot.dtsi"
+
+/ {
+   chosen {
+   u-boot,spl-boot-order = "same-as-spl", 
+   };
+};
diff --git a/arch/arm/dts/rk3588-toybrick-x0.dts 
b/arch/arm/dts/rk3588-toybrick-x0.dts
new file mode 100644
index 00..9090c5c99f
--- /dev/null
+++ b/arch/arm/dts/rk3588-toybrick-x0.dts
@@ -0,0 +1,688 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2024 Rockchip Electronics Co., Ltd.
+ *
+ */
+
+/dts-v1/;
+
+#include 
+#include 
+#include 
+#include "rk3588.dtsi"
+
+/ {
+   model = "Rockchip Toybrick TB-RK3588X Board";
+   compatible = "rockchip,rk3588-toybrick-x0", "rockchip,rk3588";
+
+   aliases {
+   mmc0 = 
+   };
+
+   chosen {
+   stdout-path = "serial2:150n8";
+   };
+
+   adc-keys {
+   compatible = "adc-keys";
+   io-channels = < 1>;
+   io-channel-names = "buttons";
+   keyup-threshold-microvolt = <180>;
+   poll-interval = <100>;
+
+   button-vol-up {
+   label = "Volume Up";
+   linux,code = ;
+   press-threshold-microvolt = <17000>;
+   };
+
+   button-vol-down {
+   label = "Volume Down";
+   linux,code = ;
+   press-threshold-microvolt = <417000>;
+   };
+
+   button-menu {
+   label = "Menu";
+   linux,code = ;
+   press-threshold-microvolt = <89>;
+   };
+
+   button-escape {
+   label = "Escape";
+   linux,code = ;
+   press-threshold-microvolt = <1235000>;
+   };
+   };
+
+   backlight: backlight {
+   compatible = "pwm-backlight";
+   power-supply = <_dcin>;
+   pwms = < 0 25000 0>;
+   };
+
+   pcie20_avdd0v85: pcie20-avdd0v85-regulator {
+   compatible = "regulator-fixed";
+   regulator-name = "pcie20_avdd0v85";
+   regulator-always-on;
+   regulator-boot-on;
+   regulator-min-microvolt = <85>;
+   regulator-max-microvolt = <85>;
+   vin-supply = <_0v85_s0>;
+   };
+
+   pcie20_avdd1v8: pcie20-avdd1v8-regulator {
+   compatible = 

Re: [PATCH v3 2/2] sunxi: restore modified memory

[Andre Przywara]

On Thu, 28 Dec 2023 00:28:43 +0300
Andrey Skvortsov  wrote:

> Current sunxi DRAM initialisation code does several test accesses to the
> DRAM array to detect aliasing effects and so determine the correct
> row/column configuration. This changes the DRAM content, which breaks
> use cases like soft reset and Linux's ramoops mechanism.
> 
> Fix this problem by saving and restoring the content of the DRAM cells
> that is used for the test writes.
> 
> Signed-off-by: Andrey Skvortsov 

Reviewed-by: Andre Przywara 

Merged to sunxi/master.

Cheers,
Andre

> ---
>  arch/arm/mach-sunxi/dram_helpers.c | 16 ++--
>  1 file changed, 14 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm/mach-sunxi/dram_helpers.c 
> b/arch/arm/mach-sunxi/dram_helpers.c
> index 661186b648..e487f87bf3 100644
> --- a/arch/arm/mach-sunxi/dram_helpers.c
> +++ b/arch/arm/mach-sunxi/dram_helpers.c
> @@ -32,13 +32,25 @@ void mctl_await_completion(u32 *reg, u32 mask, u32 val)
>  #ifndef CONFIG_MACH_SUNIV
>  bool mctl_mem_matches_base(u32 offset, ulong base)
>  {
> + u32 val_base;
> + u32 val_offset;
> + bool ret;
> +
> + /* Save original values */
> + val_base = readl(base);
> + val_offset = readl(base + offset);
> +
>   /* Try to write different values to RAM at two addresses */
>   writel(0, base);
>   writel(0xaa55aa55, base + offset);
>   dsb();
>   /* Check if the same value is actually observed when reading back */
> - return readl(base) ==
> -readl(base + offset);
> + ret = readl(base) == readl(base + offset);
> +
> + /* Restore original values */
> + writel(val_base, base);
> + writel(val_offset, base + offset);
> + return ret;
>  }
>  
>  /*

Re: [PATCH v3 1/2] sunxi: reorganize mctl_mem_matches_* functions

[Andre Przywara]

On Thu, 28 Dec 2023 00:28:42 +0300
Andrey Skvortsov  wrote:

Hi,

> mctl_mem_matches and mctl_mem_matches_base identical functions. To
> avoid code duplication move them to dram_helpers and make
> mctl_mem_matches use generic mctl_mem_matches_base.
> 
> Signed-off-by: Andrey Skvortsov 

thanks for the changes, that looks good now!

Reviewed-by: Andre Przywara 

Merged to sunxi/master.

Cheers,
Andre

> ---
>  arch/arm/include/asm/arch-sunxi/dram.h |  1 +
>  arch/arm/mach-sunxi/dram_helpers.c | 20 ++--
>  arch/arm/mach-sunxi/dram_sunxi_dw.c| 13 -
>  3 files changed, 15 insertions(+), 19 deletions(-)
> 
> diff --git a/arch/arm/include/asm/arch-sunxi/dram.h 
> b/arch/arm/include/asm/arch-sunxi/dram.h
> index 682daae6b1..9d21b49241 100644
> --- a/arch/arm/include/asm/arch-sunxi/dram.h
> +++ b/arch/arm/include/asm/arch-sunxi/dram.h
> @@ -40,5 +40,6 @@
>  unsigned long sunxi_dram_init(void);
>  void mctl_await_completion(u32 *reg, u32 mask, u32 val);
>  bool mctl_mem_matches(u32 offset);
> +bool mctl_mem_matches_base(u32 offset, ulong base);
>  
>  #endif /* _SUNXI_DRAM_H */
> diff --git a/arch/arm/mach-sunxi/dram_helpers.c 
> b/arch/arm/mach-sunxi/dram_helpers.c
> index cdf2750f1c..661186b648 100644
> --- a/arch/arm/mach-sunxi/dram_helpers.c
> +++ b/arch/arm/mach-sunxi/dram_helpers.c
> @@ -25,19 +25,27 @@ void mctl_await_completion(u32 *reg, u32 mask, u32 val)
>  }
>  
>  /*
> - * Test if memory at offset offset matches memory at begin of DRAM
> + * Test if memory at offset matches memory at a certain base
>   *
>   * Note: dsb() is not available on ARMv5 in Thumb mode
>   */
>  #ifndef CONFIG_MACH_SUNIV
> -bool mctl_mem_matches(u32 offset)
> +bool mctl_mem_matches_base(u32 offset, ulong base)
>  {
>   /* Try to write different values to RAM at two addresses */
> - writel(0, CFG_SYS_SDRAM_BASE);
> - writel(0xaa55aa55, (ulong)CFG_SYS_SDRAM_BASE + offset);
> + writel(0, base);
> + writel(0xaa55aa55, base + offset);
>   dsb();
>   /* Check if the same value is actually observed when reading back */
> - return readl(CFG_SYS_SDRAM_BASE) ==
> -readl((ulong)CFG_SYS_SDRAM_BASE + offset);
> + return readl(base) ==
> +readl(base + offset);
> +}
> +
> +/*
> + * Test if memory at offset matches memory at begin of DRAM
> + */
> +bool mctl_mem_matches(u32 offset)
> +{
> + return mctl_mem_matches_base(offset, CFG_SYS_SDRAM_BASE);
>  }
>  #endif
> diff --git a/arch/arm/mach-sunxi/dram_sunxi_dw.c 
> b/arch/arm/mach-sunxi/dram_sunxi_dw.c
> index 9382d3d0be..2e8dd40b97 100644
> --- a/arch/arm/mach-sunxi/dram_sunxi_dw.c
> +++ b/arch/arm/mach-sunxi/dram_sunxi_dw.c
> @@ -652,19 +652,6 @@ static int mctl_channel_init(uint16_t socid, struct 
> dram_para *para)
>   return 0;
>  }
>  
> -/*
> - * Test if memory at offset offset matches memory at a certain base
> - */
> -static bool mctl_mem_matches_base(u32 offset, ulong base)
> -{
> - /* Try to write different values to RAM at two addresses */
> - writel(0, base);
> - writel(0xaa55aa55, base + offset);
> - dsb();
> - /* Check if the same value is actually observed when reading back */
> - return readl(base) ==
> -readl(base + offset);
> -}
>  
>  static void mctl_auto_detect_dram_size_rank(uint16_t socid, struct dram_para 
> *para, ulong base, struct rank_para *rank)
>  {

Re: [PATCH v10 00/15] Introduce initial TI's J784S4 and AM69 support

[Tom Rini]

On Sat, Feb 24, 2024 at 01:51:38AM +0530, Apurva Nandan wrote:

> Hello Everyone!
> 
> This series will introduce basic support (SD and UART) support for Texas
> Instruments J784S4 EVM.
> 
> The J784S4 SoC device tree patches are taken from kernel patch submissions
> and will be updated as they are accepted and merged to the kernel tree.
> All other patches are specific to SPL and u-boot and do not have
> dependency on other trees. Appreciate a review for acceptance to u-boot
> tree.
> 
> Here are some of the salient features of the J784S4 automotive grade
> application processor:
> 
> The J784S4 SoC belongs to the K3 Multicore SoC architecture
> platform, providing advanced system integration in automotive,
> ADAS and industrial applications requiring AI at the network edge.
> This SoC extends the K3 Jacinto 7 family of SoCs with focus on
> raising performance and integration while providing interfaces,
> memory architecture and compute performance for multi-sensor, high
> concurrency applications.
> 
> Some highlights of this SoC are:
> * Up to 8 Cortex-A72s, four clusters of lockstep capable dual Cortex-R5F MCUs,
>   4 C7x floating point vector DSPs with Matrix Multiply Accelerator(MMA) for
>   deep learning and CNN.
> * 3D GPU: Automotive grade IMG BXS-4-64 MC1
> * Vision Processing Accelerator (VPAC) with image signal processor and Depth
>   and Motion Processing Accelerator (DMPAC)
> * Three CSI2.0 4L RX plus two CSI2.0 4L TX, two DSI Tx, one eDP/DP and one
>   DPI interface.
> * Integrated gigabit ethernet switch, up to 8 ports (TDA4VH), two ports
>   support 10Gb USXGMII; Two 4 lane PCIe-GEN3 controllers, USB3.0 Dual-role
>   device subsystems, Up to 20 MCANs, among other peripherals.
> 
> See J784S4 Technical Reference Manual (SPRUJ52 - JUNE 2022)
> for further details: http://www.ti.com/lit/zip/spruj52
> 
> In addtion, the J784S4 EVM board is designed for TI J784S4 SoC. It
> supports the following interfaces:
> * 32 GB DDR4 RAM
> * x2 Gigabit Ethernet interfaces capable of working in Switch and MAC mode
> * x1 Input Audio Jack, x1 Output Audio Jack
> * x1 USB2.0 Hub with two Type A host and x1 USB 3.1 Type-C Port
> * x2 4L PCIe connector
> * x1 UHS-1 capable micro-SD card slot
> * 512 Mbit OSPI flash, 1 Gbit Octal NAND flash, 512 Mbit QSPI flash,
>   UFS flash.
> * x6 UART through UART-USB bridge
> * XDS110 for onboard JTAG debug using USB
> * Temperature sensors, user push buttons and LEDs
> * 40-pin User Expansion Connector
> * x2 ENET Expansion Connector, x1 GESI expander, x2 Display connector
> * x1 15-pin CSI header
> * x6 MCAN instances
> 
> Schematics: https://www.ti.com/lit/zip/sprr458
> 
> AM69 SD mode bootlog: 
> https://gist.githubusercontent.com/apurvanandan1997/1b2c55d0204ff0f5a47ebbc196a97e99/raw/
> J784S4 SD mode bootlog: 
> https://gist.githubusercontent.com/apurvanandan1997/5e2ef85ee4322798d22b57a60dc917db/raw/
> eMMC UDA moode bootlog: 
> https://gist.githubusercontent.com/apurvanandan1997/3cffada252d50a8aa0c00a91f1f2f856/raw/
> 
> Note: This series is dependent on the following series for OF_UPSTREAM support
> https://lore.kernel.org/all/20240222093607.3085545-1-sumit.g...@linaro.org/
> 
> And, '[PATCH 01/15] Makefile: remove hardcoded device tree source directory' 
> has been
> cherry-picked from PATCH 11 of 
> https://lore.kernel.org/all/20240201030634.1120963-16...@ti.com/ by Bryan 
> Brattlof
> 
> Changes in v10:
> 1) Fixed build failure due to missing OF_UPSTREAM in a72 defconfigs
> 2) Updated paths of board dtbs in binman.dtsi, CONFIG_OF_LIST and 
> CONFIG_DEFAULT_DEVICE_TREE

For the series, applied to u-boot/next, thanks!

-- 
Tom


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Re: [GIT PULL] Please pull u-boot-imx-master-20240304

[Tom Rini]

On Mon, Mar 04, 2024 at 02:52:51PM -0300, Fabio Estevam wrote:

> Hi Tom,
> 
> Please pull from u-boot-imx, thanks.
> 
> The following changes since commit eac52e4be4e234d563d6911737ee7ccdc0ada1f1:
> 
>   Merge patch series "ARM: renesas: Rename R-Mobile to Renesas" (2024-03-02 
> 14:30:25 -0500)
> 
> are available in the Git repository at:
> 
>   https://gitlab.denx.de/u-boot/custodians/u-boot-imx.git 
> tags/u-boot-imx-master-20240304
> 
> for you to fetch changes up to 9b9f022e7368cacafa368beaa7fadd931f2cfcdb:
> 
>   video: mxsfb: add back imx6ul/imx6ull support (2024-03-04 08:18:48 -0300)
> 
> u-boot-imx-master-20240304

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [PATCH 1/6] arm: mach-k3: Move SYS_K3_SPL_ATF definition into R5 Kconfig

[Tom Rini]

On Thu, Feb 01, 2024 at 06:24:43PM -0600, Andrew Davis wrote:

> Loading ATF is only supported from the R5, move the Kconfig symbol
> definition to match.
> 
> Signed-off-by: Andrew Davis 
> Reviewed-by: Igor Opaniuk 

For the series, applied to u-boot/next, thanks!

-- 
Tom


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Re: [PATCH v2] dma: ti: k3-udma: Fix ring_idx to pair k3 nav rings

[Tom Rini]

On Wed, Feb 21, 2024 at 07:53:44PM +0530, Udit Kumar wrote:

> ring_idx was not correctly assigned in case of tflow_id is zero.
> Which leads to wrong pairing of DMA for drivers like OSPI.
> 
> Fixes: 4312a1dfca26 ("dma: ti: k3-udma: Use ring_idx to pair k3 nav rings")
> Reviewed-by: Jai Luthra 
> Signed-off-by: Udit Kumar 

Applied to u-boot/next, thanks!

-- 
Tom


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Re: [PATCH] board: ti: rm-cfg: Update rm-cfg to reflect new resource reservation

[Tom Rini]

On Tue, Feb 20, 2024 at 02:39:44PM -0600, Vishal Mahaveer wrote:

> With the latest TIFS firmware, an additional virtual interrupt and
> event is reserved for TIFS usage on am62x and am62ax devices.
> 
> Update the rm-cfg to reflect this new reservation.
> 
> Signed-off-by: Vishal Mahaveer 

Applied to u-boot/next, thanks!

-- 
Tom


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Re: [PATCH v2] dma: ti: k3-udma: Fix error handling for setup_resources() in udma_probe()

[Tom Rini]

On Tue, Feb 20, 2024 at 03:34:51PM +0530, Siddharth Vadapalli wrote:

> In udma_probe() the return value of setup_resources() is stored in the
> u32 "ch_count" member of "struct udma_dev", due to which any negative
> return value which indicates an error is masked.
> 
> Fix this by storing the return value of setup_resources() in the already
> declared integer variable "ret", followed by assigning it to the "ch_count"
> member of "struct udma_dev" in case of no error.
> 
> While at it, change the "return ret" at the end of udma_probe() to a
> "return 0", to explicitly indicate that probe was successful.
> 
> Fixes: a8837cf43839 ("dma: ti: k3-udma: Query DMA channels allocated from 
> Resource Manager")
> Signed-off-by: Siddharth Vadapalli 
> Reviewed-by: Dan Carpenter 

Applied to u-boot/next, thanks!

-- 
Tom


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Re: [PATCH] configs: am64x_evm_r5_defconfig: enlarge simple malloc pool

[Tom Rini]

On Fri, Feb 09, 2024 at 09:06:53AM +0100, Thomas Weißschuh wrote:

> With the default size the stack grows into the malloc, pool leading to
> stack corruption and boot failure.
> 
> Signed-off-by: Thomas Weißschuh 

Applied to u-boot/next, thanks!

-- 
Tom


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Re: [PATCH v1 2/2] arm: mach-k3: am62: Fixup thermal zone critical points

[Tom Rini]

On Thu, Feb 08, 2024 at 10:29:51AM +0100, Francesco Dolcini wrote:

> From: Joao Paulo Goncalves 
> 
> Read the max temperature for the SoC temperature grade from the hardware
> and change the critical trip nodes on each thermal zone of FDT at
> runtime so they are correct with the hardware value for its grade.
> 
> Signed-off-by: Joao Paulo Goncalves 
> Signed-off-by: Francesco Dolcini 

Applied to u-boot/next, thanks!

-- 
Tom


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Re: [PATCH v1 1/2] arm: mach-k3: am62: Get soc max temperature by grade

[Tom Rini]

On Thu, Feb 08, 2024 at 10:29:50AM +0100, Francesco Dolcini wrote:

> From: Joao Paulo Goncalves 
> 
> AM62x SoC is available in multiple temperature grade:
> - Commercial: 0° to 95° C
> - Industrial: -40° to 105° C
> - Automotive: -40° to 125° C
> 
> Add a new function that returns the am62 max temperature value
> accordingly to its temperature grade in Celsius.
> 
> Signed-off-by: Joao Paulo Goncalves 
> Signed-off-by: Francesco Dolcini 

Applied to u-boot/next, thanks!

-- 
Tom


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Re: [PATCH V2 0/5] board: beagle: Enable 32k and debounce configuration and fixups

[Tom Rini]

On Tue, 20 Feb 2024 12:39:47 -0600, Nishanth Menon wrote:

> Rev 2 of the series.
> 
> This is a follow up from [1] - Without the 32k crystal configuration,
> wlan doesn't work. Debounce is needed for HDMI Hot plug detect(hpd)
> gpio interrupt not storming.
> 
> At least the 32k configuration has been done for toradex and phytec
> boards, follow similar model of programming.
> 
> [...]

Applied to u-boot/master, thanks!

-- 
Tom

[PATCH v1] riscv: cpu: improve multi-letter extension detection in supports_extension()

[Conor Dooley]

From: Conor Dooley 

The first multi-letter extension after the single-letter extensions does
not have to be preceded by an underscore, which could cause the parser
to mistakenly find a single-letter extension after the start of the
multi-letter portion of the string.
Three letters precede multi-letter extensions (s, x & z), none of which
are valid single-letter extensions. The dt-binding also allows
multi-letter extensions starting with h, but no such extension have been
frozen or ratified, and the unprivileged spec no longer uses "h" as a
prefix for multi-letter hypervisor extensions, having moved to "sh"
instead. For that reason, modify the parser to stop at s, x & z to prevent
this overrun, ignoring h.

Signed-off-by: Conor Dooley 
---
The parser in U-Boot only supports single-letter extensions & the
single-letter h has to be at the end of the single-letter section, so it
would not be difficult to terminate parsing once a h is seen (you'd need
to support the hypervisor extension to support additional hypervisor
extensions after all) if in the future a multi-letter extension starting
with h did come about. I've got no problem adding a special case for h,
but I'm tempted to just remove the multi-letter h extensions from the
binding, given there's actually not going to be any extensions ratified
using that naming scheme.

CC: Rick Chen 
CC: Leo 
CC: Tom Rini 
CC: Simon Glass 
CC: Chanho Park 
CC: Heinrich Schuchardt 
CC: Bin Meng 
CC: Conor Dooley 
CC: pal...@dabbelt.com
CC: u-boot@lists.denx.de
---
 arch/riscv/cpu/cpu.c | 22 --
 1 file changed, 16 insertions(+), 6 deletions(-)

diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c
index 8445c5823e..ecfefa1a02 100644
--- a/arch/riscv/cpu/cpu.c
+++ b/arch/riscv/cpu/cpu.c
@@ -49,14 +49,24 @@ static inline bool supports_extension(char ext)
}
if (!cpu_get_desc(dev, desc, sizeof(desc))) {
/*
-* skip the first 4 characters (rv32|rv64) and
-* check until underscore
+* skip the first 4 characters (rv32|rv64)
 */
for (i = 4; i < sizeof(desc); i++) {
-   if (desc[i] == '_' || desc[i] == '\0')
-   break;
-   if (desc[i] == ext)
-   return true;
+   switch (desc[i]) {
+   case 's':
+   case 'x':
+   case 'z':
+   case '_':
+   case '\0':
+   /*
+* Any of these characters mean the single
+* letter extensions have all been consumed.
+*/
+   return false;
+   default:
+   if (desc[i] == ext)
+   return true;
+   }
}
}
 
-- 
2.43.0

Re: [PATCH RFC 26/26] dts: support building all dtb files for a specific vendor

[Tony Dinh]

Hi Caleb,

On Mon, Mar 4, 2024 at 9:24 AM Caleb Connolly  wrote:
>
> This adjusts OF_UPSTREAM to behave more like the kernel by allowing for
> all the devicetree files for a given vendor to be compiled. This is
> useful for Qualcomm in particular as most boards are supported by a
> single U-Boot build just provided with a different DT.
>
> Signed-off-by: Caleb Connolly 
> ---
>  dts/Kconfig  | 24 
>  scripts/Makefile.dts | 17 -
>  2 files changed, 40 insertions(+), 1 deletion(-)
>
> diff --git a/dts/Kconfig b/dts/Kconfig
> index b9b6367154ef..67d9dc489856 100644
> --- a/dts/Kconfig
> +++ b/dts/Kconfig
> @@ -100,8 +100,32 @@ config OF_UPSTREAM
>   However, newer boards whose devicetree source files haven't landed 
> in
>   the dts/upstream subtree, they can override this option to have the
>   DT build from existing U-Boot tree location instead.
>
> +config OF_UPSTREAM_BUILD_VENDOR
> +   bool "Build all devicetree files for a particular vendor"
> +   depends on OF_UPSTREAM
> +   help
> + Enable building all devicetree files for a particular vendor. This
> + is useful for generic U-Boot configurations where many boards can
> + be supported with a single binary.
> +
> + This is only available for platforms using upstream devicetree.
> +
> +config OF_UPSTREAM_VENDOR
> +   string "Vendor to build all upstream devicetree files for"
> +   depends on OF_UPSTREAM_BUILD_VENDOR
> +   default "qcom" if ARCH_SNAPDRAGON
> +   default "rockchip" if ARCH_ROCKCHIP
> +   default "amlogic" if ARCH_MESON
> +   default "allwinner" if ARCH_SUNXI
> +   default "mediatek" if ARCH_MEDIATEK
> +   default "marvell" if ARCH_MVEBU

Perhaps here it should be:
default "marvell" if ARCH_MVEBU || ARCH_KIRKWOOD

All the best,
Tony

> +   default "xilinx" if ARCH_VERSAL || ARCH_ZYNQ
> +   default "nvidia" if ARCH_TEGRA
> +   help
> + Select the vendor to build all devicetree files for.
> +
>  choice
> prompt "Provider of DTB for DT control"
> depends on OF_CONTROL
>
> diff --git a/scripts/Makefile.dts b/scripts/Makefile.dts
> index 5e2429c6170c..8005527f3df7 100644
> --- a/scripts/Makefile.dts
> +++ b/scripts/Makefile.dts
> @@ -1,3 +1,18 @@
>  # SPDX-License-Identifier: GPL-2.0+
>
> -dtb-y += $(patsubst %,%.dtb,$(subst ",,$(CONFIG_DEFAULT_DEVICE_TREE) 
> $(CONFIG_OF_LIST) $(CONFIG_SPL_OF_LIST)))
> +dtb-y += $(patsubst %,%.dtb,\
> +   $(subst ",,$(CONFIG_DEFAULT_DEVICE_TREE) $(CONFIG_OF_LIST) 
> $(CONFIG_SPL_OF_LIST)))
> +
> +ifeq ($(CONFIG_OF_UPSTREAM_BUILD_VENDOR),y)
> +ifeq ($(CONFIG_ARM64),y)
> +dt_dir := $(srctree)/dts/upstream/src/arm64
> +else
> +dt_dir := $(srctree)/dts/upstream/src/$(ARCH)
> +endif
> +
> +dtb-vendor_dts := $(patsubst %.dts,%.dtb, \
> +   $(wildcard $(dt_dir)/$(subst ",,$(CONFIG_OF_UPSTREAM_VENDOR))/*.dts))
> +
> +dtb-y += $(subst $(dt_dir)/,,$(dtb-vendor_dts))
> +
> +endif
>
> --
> 2.44.0
>

[PATCH] doc: board: starfive: Fix paths in the bash block

[Ivan Orlov]

>From the current documentation it is not entirely obvious where to take
some of the u-boot build artifacts in order to flash them to the sd
card. Extend the "Program the SD card" block by providing relative paths
to the jh7110-starfive-visionfive-2.dtb and u-boot-spl.bin.normal.out
files.

Add "$(linux_image_dir)/" prefix to the Image.gz and initramfs.cpio.gz
files in order to provide some information about where they could be
taken from.

Signed-off-by: Ivan Orlov 
---
 doc/board/starfive/visionfive2.rst | 10 +-
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/doc/board/starfive/visionfive2.rst 
b/doc/board/starfive/visionfive2.rst
index abda8ac21b..031d66fbfb 100644
--- a/doc/board/starfive/visionfive2.rst
+++ b/doc/board/starfive/visionfive2.rst
@@ -103,15 +103,15 @@ Program the SD card
 
 .. code-block:: bash
 
-   sudo dd if=u-boot-spl.bin.normal.out of=/dev/sdb1
+   sudo dd if=spl/u-boot-spl.bin.normal.out of=/dev/sdb1
sudo dd if=u-boot.itb of=/dev/sdb2
 
sudo mount /dev/sdb3 /mnt/
-   sudo cp u-boot-spl.bin.normal.out /mnt/
+   sudo cp spl/u-boot-spl.bin.normal.out /mnt/
sudo cp u-boot.itb /mnt/
-   sudo cp Image.gz /mnt/
-   sudo cp initramfs.cpio.gz /mnt/
-   sudo cp jh7110-starfive-visionfive-2.dtb /mnt/
+   sudo cp $(linux_image_dir)/Image.gz /mnt/
+   sudo cp $(linux_image_dir)/initramfs.cpio.gz /mnt/
+   sudo cp arch/riscv/dts/jh7110-starfive-visionfive-2.dtb /mnt/
sudo umount /mnt
 
 Booting
-- 
2.34.1

Re: riscv: supports_extension() broken for long isa strings

[Conor Dooley]

Apologies for the delay replying here.

On Thu, Feb 22, 2024 at 01:36:41PM +0100, Heinrich Schuchardt wrote:
> On 21.02.24 18:59, Conor Dooley wrote:
> > I mentioned this last night to Heinrich on IRC, supports_extension() is
> > broken for ISA strings longer than 32 characters. M-Mode U-Boot doesn't
> > parse a devicetree, so this doesn't apply there, but for S-mode
> > supports_extension() looks like:
> > 
> > static inline bool supports_extension(char ext)
> > {
> > 
> > struct udevice *dev;
> > char desc[32];
> > int i;
> > 
> > uclass_find_first_device(UCLASS_CPU, );
> > if (!dev) {
> > debug("unable to find the RISC-V cpu device\n");
> > return false;
> > }
> > if (!cpu_get_desc(dev, desc, sizeof(desc))) {
> > /*
> >  * skip the first 4 characters (rv32|rv64) and
> >  * check until underscore
> >  */
> > for (i = 4; i < sizeof(desc); i++) {
> > if (desc[i] == '_' || desc[i] == '\0')
> > break;
> > if (desc[i] == ext)
> > return true;
> > }
> > }
> > 
> > return false;
> > }
> > 
> > cpu_get_desc is implemented by riscv_cpu_get_desc():
> > static int riscv_cpu_get_desc(const struct udevice *dev, char *buf, int 
> > size)
> 
> Thanks Conor for reporting the issue. We should change all cpu_get_desc
> implementations to:
> 
> int riscv_cpu_get_desc(const struct udevice *dev, char *buf, size_t *size)
> {
>   size_t old_size = *size;
> 
>   *size = snprintf(buf, *size, "%s", info) + 1;
>   if (*size > old_size)
>   return -ENOSPC;
>   return 0;
> }
> 
> With this change
> 
> size = 0;
> cpu_get_desc(dev, desc, );
> 
> can be used to get the size of the information before allocating a buffer.
> 
> desc = malloc(size);
> cpu_get_desc(dev, desc, size);

That seems overcomplicated to me, if we are just looking to fix this in
the short term. Could we just write to the provided buffer up to a max
of size and report ENOSPC if it does not fit?
That way the calling code in 90% of cases does not need to change and
the supports_extension() code, which does not care about anything other
than single-letter extensions that have to be in the first 32 characters
of the string, can opt to ignore the ENOSPC?

Cheers,
Conor.


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[PATCH] riscv: dts: jh7110: fix indentation

[Leon M. Busch-George]

From: "Leon M. Busch-George" 

Signed-off-by: Leon M. Busch-George 
---
 arch/riscv/dts/jh7110-starfive-visionfive-2-u-boot.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/riscv/dts/jh7110-starfive-visionfive-2-u-boot.dtsi 
b/arch/riscv/dts/jh7110-starfive-visionfive-2-u-boot.dtsi
index 55185314dd..3012466b30 100644
--- a/arch/riscv/dts/jh7110-starfive-visionfive-2-u-boot.dtsi
+++ b/arch/riscv/dts/jh7110-starfive-visionfive-2-u-boot.dtsi
@@ -112,6 +112,6 @@
 
u-boot-spl {
};
+   };
};
 };
-};
-- 
2.44.0

[PATCH v2] Makefile: use shell to calculate map_size

[Leon M. Busch-George]

From: "Leon M. Busch-George" 

The error message "bc: command not found" is easily missed since the
build continues.
bc is not a part of coreutils or base-devel. POSIX sh can also do the
calculation.

Signed-off-by: Leon M. Busch-George 
---
 Makefile | 13 +
 1 file changed, 9 insertions(+), 4 deletions(-)

diff --git a/Makefile b/Makefile
index a2bc9d5903..e8e794368e 100644
--- a/Makefile
+++ b/Makefile
@@ -1275,10 +1275,15 @@ OBJCOPYFLAGS_u-boot-nodtb.bin := -O binary \
 binary_size_check: u-boot-nodtb.bin FORCE
@file_size=$(shell wc -c u-boot-nodtb.bin | awk '{print $$1}') ; \
map_size=$(shell cat u-boot.map | \
-   awk '/_image_copy_start/ {start = $$1} /_image_binary_end/ {end 
= $$1} END {if (start != "" && end != "") print "ibase=16; " toupper(end) " - " 
toupper(start)}' \
-   | sed 's/0X//g' \
-   | bc); \
-   if [ "" != "$$map_size" ]; then \
+   awk ' \
+   /_image_copy_start/ { start = $$1 } \
+   /_image_binary_end/ { end = $$1 } \
+   END { \
+   if (start != "" && end != "") \
+   print end " " start; \
+   }' \
+   | sh -c 'read end start; [ -n "$$end" ] && echo $$((end - 
start))'); \
+   if [ -n "$$map_size" ]; then \
if test $$map_size -ne $$file_size; then \
echo "u-boot.map shows a binary size of $$map_size" >&2 
; \
echo "  but u-boot-nodtb.bin shows $$file_size" >&2 ; \
-- 
2.44.0

Re: [PATCH RFC 10/26] rockchip: drop remaining dt-binding headers

[Jonas Karlman]

Hi Caleb,

On 2024-03-04 17:51, Caleb Connolly wrote:
> Drop in favour of dts/upstream.
> 
> Small driver adjustment to fix compatibility.
> 
> Signed-off-by: Caleb Connolly 
> ---
>  drivers/pinctrl/rockchip/pinctrl-rk3568.c |  15 +
>  include/dt-bindings/pinctrl/rockchip.h|  60 --
>  include/dt-bindings/power/px30-power.h|  27 -
>  include/dt-bindings/power/rk3066-power.h  |  22 -
>  include/dt-bindings/power/rk3188-power.h  |  24 -
>  include/dt-bindings/power/rk3228-power.h  |  21 -
>  include/dt-bindings/power/rk3288-power.h  |  32 -
>  include/dt-bindings/power/rk3328-power.h  |  19 -
>  include/dt-bindings/power/rk3399-power.h  |  53 --
>  include/dt-bindings/power/rk3568-power.h  |  32 -
>  include/dt-bindings/power/rk3588-power.h  |  69 --
>  include/dt-bindings/power/rockchip,rv1126-power.h |  35 -
>  include/dt-bindings/reset/rockchip,rk3588-cru.h   | 754 
> --
>  include/dt-bindings/soc/rockchip,boot-mode.h  |  16 -
>  include/dt-bindings/soc/rockchip,vop2.h   |  18 -
>  15 files changed, 15 insertions(+), 1182 deletions(-)
> 
> diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3568.c 
> b/drivers/pinctrl/rockchip/pinctrl-rk3568.c
> index 1d4391982605..35a69c2a1a28 100644
> --- a/drivers/pinctrl/rockchip/pinctrl-rk3568.c
> +++ b/drivers/pinctrl/rockchip/pinctrl-rk3568.c
> @@ -11,8 +11,23 @@
>  #include 
>  
>  #include "pinctrl-rockchip.h"
>  
> +#define RK_GPIO0 0
> +#define RK_GPIO1 1
> +#define RK_GPIO2 2
> +#define RK_GPIO3 3
> +#define RK_GPIO4 4
> +#define RK_GPIO6 6
> +
> +#define RK_FUNC_GPIO 0
> +#define RK_FUNC_11
> +#define RK_FUNC_22
> +#define RK_FUNC_33
> +#define RK_FUNC_44
> +#define RK_FUNC_55
> +#define RK_FUNC_66

I would suggest to just drop the RK_GPIO and RK_FUNC_ prefix in the
table below instead of having to define these here.

Regards,
Jonas

> +
>  static struct rockchip_mux_route_data rk3568_mux_route_data[] = {
>   MR_PMUGRF(RK_GPIO0, RK_PB7, RK_FUNC_1, 0x0110, RK_GENMASK_VAL(1, 0, 
> 0)), /* PWM0 IO mux selection M0 */
>   MR_PMUGRF(RK_GPIO0, RK_PC7, RK_FUNC_2, 0x0110, RK_GENMASK_VAL(1, 0, 
> 1)), /* PWM0 IO mux selection M1 */
>   MR_PMUGRF(RK_GPIO0, RK_PC0, RK_FUNC_1, 0x0110, RK_GENMASK_VAL(3, 2, 
> 0)), /* PWM1 IO mux selection M0 */

[snip]

Re: [PATCH 1/2] arm: mach-k3: am625: copy bootindex to OCRAM for main domain SPL

[Bryan Brattlof]

Hey Vignesh!

On March  4, 2024 thus sayeth Vignesh Raghavendra:
> Hi Wadim,
> 
> On 26/02/24 19:00, Wadim Egorov wrote:
> > Texas Instruments has begun enabling security settings on the SoCs it
> > produces to instruct ROM and TIFS to begin protecting the Security
> > Management Subsystem (SMS) from other binaries we load into the chip by
> > default.
> > 
> > One way ROM and TIFS do this is by enabling firewalls to protect the
> > OCSRAM and HSM RAM regions they're using during bootup.
> > 
> > The HSM RAM the wakeup SPL is in is firewalled by TIFS to protect
> > itself from the main domain applications. This means the 'bootindex'
> > value in HSM RAM, left by ROM to indicate if we're using the primary
> > or secondary boot-method, must be moved to OCSRAM (that TIFS has open
> > for us) before we make the jump to the main domain so the main domain's
> > bootloaders can keep access to this information.
> > 
> > Based on commit
> >   b672e8581070 ("arm: mach-k3: copy bootindex to OCRAM for main domain SPL")
> > 
> 
> FYI, this is mostly a problem in non SPL flow (TI prosperity SBL for
> example) where HSM RAM would be used by HSM firmware. This should be a
> issue in R5 SPL flow.  Do you see any issues today? If so, whats the
> TIFS firmware being used?
> 
> > Signed-off-by: Wadim Egorov 
> > ---
> >  arch/arm/mach-k3/Kconfig  |  3 ++-
> >  arch/arm/mach-k3/am625_init.c | 15 +--
> >  arch/arm/mach-k3/include/mach/am62_hardware.h | 15 +++
> >  3 files changed, 30 insertions(+), 3 deletions(-)
> > 
> > diff --git a/arch/arm/mach-k3/Kconfig b/arch/arm/mach-k3/Kconfig
> > index 03898424c9..f5d06593f7 100644
> > --- a/arch/arm/mach-k3/Kconfig
> > +++ b/arch/arm/mach-k3/Kconfig
> > @@ -75,7 +75,8 @@ config SYS_K3_BOOT_PARAM_TABLE_INDEX
> > default 0x41cffbfc if SOC_K3_J721E
> > default 0x41cfdbfc if SOC_K3_J721S2
> > default 0x701bebfc if SOC_K3_AM642
> > -   default 0x43c3f290 if SOC_K3_AM625
> > +   default 0x43c3f290 if SOC_K3_AM625 && CPU_V7R
> > +   default 0x7000f290 if SOC_K3_AM625 && ARM64
> > default 0x43c3f290 if SOC_K3_AM62A7 && CPU_V7R
> > default 0x7000f290 if SOC_K3_AM62A7 && ARM64
> > help
> > diff --git a/arch/arm/mach-k3/am625_init.c b/arch/arm/mach-k3/am625_init.c
> > index 6c96e88114..67cf63b103 100644
> > --- a/arch/arm/mach-k3/am625_init.c
> > +++ b/arch/arm/mach-k3/am625_init.c
> > @@ -35,8 +35,10 @@ static struct rom_extended_boot_data bootdata 
> > __section(".data");
> >  static void store_boot_info_from_rom(void)
> >  {
> > bootindex = *(u32 *)(CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX);
> > -   memcpy(, (uintptr_t *)ROM_EXTENDED_BOOT_DATA_INFO,
> > -  sizeof(struct rom_extended_boot_data));
> > +   if (IS_ENABLED(CONFIG_CPU_V7R)) {
> > +   memcpy(, (uintptr_t *)ROM_EXTENDED_BOOT_DATA_INFO,
> > +  sizeof(struct rom_extended_boot_data));
> > +   }
> >  }
> >  
> >  static void ctrl_mmr_unlock(void)
> > @@ -175,6 +177,15 @@ void board_init_f(ulong dummy)
> > k3_sysfw_loader(true, NULL, NULL);
> > }
> >  
> > +#if defined(CONFIG_CPU_V7R)
> > +   /*
> > +* Relocate boot information to OCRAM (after TIFS has opend this
> > +* region for us) so the next bootloader stages can keep access to
> > +* primary vs backup bootmodes.
> > +*/
> > +   writel(bootindex, K3_BOOT_PARAM_TABLE_INDEX_OCRAM);
> > +#endif
> > +
> > /*
> >  * Force probe of clk_k3 driver here to ensure basic default clock
> >  * configuration is always done.
> > diff --git a/arch/arm/mach-k3/include/mach/am62_hardware.h 
> > b/arch/arm/mach-k3/include/mach/am62_hardware.h
> > index 54380f36e1..9f504f4642 100644
> > --- a/arch/arm/mach-k3/include/mach/am62_hardware.h
> > +++ b/arch/arm/mach-k3/include/mach/am62_hardware.h
> > @@ -76,8 +76,23 @@
> >  #define CTRLMMR_MCU_RST_CTRL   (MCU_CTRL_MMR0_BASE + 
> > 0x18170)
> >  
> >  #define ROM_EXTENDED_BOOT_DATA_INFO0x43c3f1e0
> > +#define K3_BOOT_PARAM_TABLE_INDEX_OCRAM 0x7000F290
> >  
> > +/*
> > + * During the boot process ROM will kill anything that writes to OCSRAM.
> 
> R5 ROM is long gone when R5 SPL starts, how would it kill anything?

Looks like this was based on my patch long ago for the AM62Ax family. 
>From what little I remember about this was ROM is leaving behind a 
firewall that we need TIFS's help to bring down for us. So I just
blamed ROM ;)

IDK if this is an issue for the AM62x family though.

> 
> > + * This means the wakeup SPL cannot use this region during boot. To
> > + * complicate things, TIFS will set a firewall between HSM RAM and the
> > + * main domain.
> > + *
> > + * So, during the wakeup SPL, we will need to store the EEPROM data
> > + * somewhere in HSM RAM, and the main domain's SPL will need to store it
> > + * somewhere in OCSRAM
> > + */
> > +#ifdef CONFIG_CPU_V7R
> >  #define TI_SRAM_SCRATCH_BOARD_EEPROM_START 0x43c3
> > +#else
> > + #define 

[PATCH] arm: dts: k3-am64: Move to OF_UPSTREAM

[Andrew Davis]

Enable OF_UPSTREAM for AM64-EVM and SK-AM64 boards. Remove DT files that
are now available in dts/upstream. Update the appended files based on
version of latest OF_UPSTREAM sync point (v6.7-rc7).

Signed-off-by: Andrew Davis 
---

As suggested here[0].

Based on Mar 4 -next.

[0] https://lore.kernel.org/all/20240304170814.GP1523872@bill-the-cat/

 arch/arm/dts/Makefile |4 +-
 arch/arm/dts/k3-am64-main.dtsi| 1546 -
 arch/arm/dts/k3-am64-mcu.dtsi |  161 ---
 arch/arm/dts/k3-am64-thermal.dtsi |   33 -
 arch/arm/dts/k3-am64.dtsi |  100 --
 arch/arm/dts/k3-am642-evm-u-boot.dtsi |  110 --
 arch/arm/dts/k3-am642-evm.dts |  690 ---
 arch/arm/dts/k3-am642-r5-evm.dts  |   24 -
 arch/arm/dts/k3-am642-r5-sk.dts   |   12 -
 arch/arm/dts/k3-am642-sk-u-boot.dtsi  |   94 --
 arch/arm/dts/k3-am642-sk.dts  |  642 --
 arch/arm/dts/k3-am642.dtsi|   66 --
 arch/arm/dts/k3-am64x-binman.dtsi |6 +-
 configs/am64x_evm_a53_defconfig   |5 +-
 14 files changed, 7 insertions(+), 3486 deletions(-)
 delete mode 100644 arch/arm/dts/k3-am64-main.dtsi
 delete mode 100644 arch/arm/dts/k3-am64-mcu.dtsi
 delete mode 100644 arch/arm/dts/k3-am64-thermal.dtsi
 delete mode 100644 arch/arm/dts/k3-am64.dtsi
 delete mode 100644 arch/arm/dts/k3-am642-evm.dts
 delete mode 100644 arch/arm/dts/k3-am642-sk.dts
 delete mode 100644 arch/arm/dts/k3-am642.dtsi

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index dc80b3bc6f0..3c9ab63b943 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1413,9 +1413,7 @@ dtb-$(CONFIG_SOC_K3_J721S2) += k3-am68-sk-base-board.dtb\
   k3-am68-sk-r5-base-board.dtb\
   k3-j721s2-common-proc-board.dtb\
   k3-j721s2-r5-common-proc-board.dtb
-dtb-$(CONFIG_SOC_K3_AM642) += k3-am642-evm.dtb \
- k3-am642-r5-evm.dtb \
- k3-am642-sk.dtb \
+dtb-$(CONFIG_SOC_K3_AM642) += k3-am642-r5-evm.dtb \
  k3-am642-r5-sk.dtb
 
 dtb-$(CONFIG_SOC_K3_AM625) += k3-am625-sk.dtb \
diff --git a/arch/arm/dts/k3-am64-main.dtsi b/arch/arm/dts/k3-am64-main.dtsi
deleted file mode 100644
index 0df54a74182..000
--- a/arch/arm/dts/k3-am64-main.dtsi
+++ /dev/null
@@ -1,1546 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Device Tree Source for AM642 SoC Family Main Domain peripherals
- *
- * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/
- */
-
-#include 
-#include 
-
-/ {
-   serdes_refclk: clock-cmnrefclk {
-   #clock-cells = <0>;
-   compatible = "fixed-clock";
-   clock-frequency = <0>;
-   };
-};
-
-_main {
-   oc_sram: sram@7000 {
-   compatible = "mmio-sram";
-   reg = <0x00 0x7000 0x00 0x20>;
-   #address-cells = <1>;
-   #size-cells = <1>;
-   ranges = <0x0 0x00 0x7000 0x20>;
-
-   tfa-sram@1c {
-   reg = <0x1c 0x2>;
-   };
-
-   dmsc-sram@1e {
-   reg = <0x1e 0x1c000>;
-   };
-
-   sproxy-sram@1fc000 {
-   reg = <0x1fc000 0x4000>;
-   };
-   };
-
-   main_conf: syscon@4300 {
-   compatible = "ti,j721e-system-controller", "syscon", 
"simple-mfd";
-   reg = <0x0 0x4300 0x0 0x2>;
-   #address-cells = <1>;
-   #size-cells = <1>;
-   ranges = <0x0 0x0 0x4300 0x2>;
-
-   chipid@14 {
-   compatible = "ti,am654-chipid";
-   reg = <0x0014 0x4>;
-   };
-
-   serdes_ln_ctrl: mux-controller {
-   compatible = "mmio-mux";
-   #mux-control-cells = <1>;
-   mux-reg-masks = <0x4080 0x3>; /* SERDES0 lane0 select */
-   };
-
-   phy_gmii_sel: phy@4044 {
-   compatible = "ti,am654-phy-gmii-sel";
-   reg = <0x4044 0x8>;
-   #phy-cells = <1>;
-   };
-
-   epwm_tbclk: clock-controller@4140 {
-   compatible = "ti,am64-epwm-tbclk";
-   reg = <0x4130 0x4>;
-   #clock-cells = <1>;
-   };
-   };
-
-   gic500: interrupt-controller@180 {
-   compatible = "arm,gic-v3";
-   #address-cells = <2>;
-   #size-cells = <2>;
-   ranges;
-   #interrupt-cells = <3>;
-   interrupt-controller;
-   reg = <0x00 0x0180 0x00 0x1>,   /* GICD */
- <0x00 0x0184 0x00 0xC>,   /* GICR */
- <0x01 0x 

Re: [PATCH] usb: xhci-dwc3: Fix support for dis_enblslpm_quirk

[Marek Vasut]

On 3/2/24 2:09 PM, Jonas Karlman wrote:

No device tree in U-Boot or linux use the wrong spelling used in code.

Use correct property name as defined in dwc3 bindings.

Fixes: 062790f46131 ("usb: xhci-dwc3: Add USB2 PHY configuration")
Signed-off-by: Jonas Karlman 


Reviewed-by: Marek Vasut 

[PATCH] arm: stm32: Enable OHCI HCD support on STM32MP15xx DHSOM

[Marek Vasut]

The OHCI HCD is mandatory for USB 1.1 FS/LS device support, enable it.
This used to be enabled implicitly before, now that implicit dependency
disappeared and this got disabled. Enable it manually.

Signed-off-by: Marek Vasut 
---
Cc: Patrice Chotard 
Cc: Patrick Delaunay 
Cc: u-b...@dh-electronics.com
Cc: uboot-st...@st-md-mailman.stormreply.com
---
 configs/stm32mp15_dhcom_basic_defconfig | 2 ++
 configs/stm32mp15_dhcor_basic_defconfig | 2 ++
 2 files changed, 4 insertions(+)

diff --git a/configs/stm32mp15_dhcom_basic_defconfig 
b/configs/stm32mp15_dhcom_basic_defconfig
index 1d241529be7..0bfd3b76d6a 100644
--- a/configs/stm32mp15_dhcom_basic_defconfig
+++ b/configs/stm32mp15_dhcom_basic_defconfig
@@ -164,6 +164,8 @@ CONFIG_DM_USB_GADGET=y
 CONFIG_SPL_DM_USB_GADGET=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
 CONFIG_USB_DWC2=y
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
diff --git a/configs/stm32mp15_dhcor_basic_defconfig 
b/configs/stm32mp15_dhcor_basic_defconfig
index 6e0c4a8cf9f..1c1fbc5c7db 100644
--- a/configs/stm32mp15_dhcor_basic_defconfig
+++ b/configs/stm32mp15_dhcor_basic_defconfig
@@ -164,6 +164,8 @@ CONFIG_DM_USB_GADGET=y
 CONFIG_SPL_DM_USB_GADGET=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
 CONFIG_USB_DWC2=y
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
-- 
2.43.0

Re: [PATCH 1/2] opos6uldev: make the LCD work again

[Fabio Estevam]

On Tue, Feb 27, 2024 at 12:40 PM Sébastien Szymanski
 wrote:
>
> Commit 5d7a95f4 ("imx6ul/imx6ull: synchronise device trees with
> linux") removed the display timings from the board device tree whereas
> they are still needed by the mxsfb driver.
> Add the timings back (the correct ones) in the
> imx6ul-opos6uldev-u-boot.dtsi file and remove them from the
> opos6uldev.env file.
>
> Update the opos6uldev_defconfig file so that the LCD turns on at boot.
>
> Fixes: 5d7a95f4 ("imx6ul/imx6ull: synchronise device trees with linux")
> Signed-off-by: Sébastien Szymanski 

Applied all, thanks.

Re: [PATCH] imx9: Update to mx93 A1 chip revision.

[Fabio Estevam]

On Mon, Feb 26, 2024 at 2:48 PM Mathieu Othacehe  wrote:
>
> Use the latest, mx93a1-ahab-container.img that is compatible with the
> i.MX93 A1 revision.
>
> Using mx93a1-ahab-container.img on an A0 chip and conversely causes a boot
> failure without any traces on the UART.
>
> Signed-off-by: Mathieu Othacehe 

Applied, thanks.

Re: [PATCH 0/2] Fix OP-TEE support

[Fabio Estevam]

On Mon, Feb 26, 2024 at 2:37 PM Mathieu Othacehe  wrote:
>
> Hello,
>
> This series fixes OP-TEE support on all imx9 boards by starting the ELE RNG
> and adding the optional tee.bin binary to the ATF container.
>
> Thanks,
>
> Mathieu
>
> Mathieu Othacehe (2):
>   imx9: Fix OP-TEE support
>   tools: imx9_image: Reword warning message.

Applied all, thanks.

[GIT PULL] Please pull u-boot-imx-master-20240304

[Fabio Estevam]

Hi Tom,

Please pull from u-boot-imx, thanks.

The following changes since commit eac52e4be4e234d563d6911737ee7ccdc0ada1f1:

  Merge patch series "ARM: renesas: Rename R-Mobile to Renesas" (2024-03-02 
14:30:25 -0500)

are available in the Git repository at:

  https://gitlab.denx.de/u-boot/custodians/u-boot-imx.git 
tags/u-boot-imx-master-20240304

for you to fetch changes up to 9b9f022e7368cacafa368beaa7fadd931f2cfcdb:

  video: mxsfb: add back imx6ul/imx6ull support (2024-03-04 08:18:48 -0300)

u-boot-imx-master-20240304
--

CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/19817

- Fix i.MX93 OP-TEE support.
- Use the container image for i.MX93 revision A1.
- Fix display regression on opos6uldev.

Mathieu Othacehe (3):
  imx9: Fix OP-TEE support
  tools: imx9_image: Reword warning message.
  imx9: Update to mx93 A1 chip revision.

Sébastien Szymanski (2):
  opos6uldev: make the LCD work again
  video: mxsfb: add back imx6ul/imx6ull support

 arch/arm/dts/imx6ul-opos6uldev-u-boot.dtsi | 28 ++--
 arch/arm/mach-imx/imx9/container.cfg   |  3 ++-
 arch/arm/mach-imx/imx9/imximage.cfg|  2 +-
 board/armadeus/opos6uldev/opos6uldev.env   |  1 -
 board/freescale/imx93_evk/spl.c|  7 +++
 board/phytec/phycore_imx93/spl.c   |  7 +++
 board/variscite/imx93_var_som/spl.c|  6 ++
 configs/opos6uldev_defconfig   |  3 ---
 doc/board/nxp/imx93_11x11_evk.rst  |  8 
 doc/board/phytec/imx93-phyboard-segin.rst  |  8 
 doc/board/variscite/imx93_var_som.rst  |  8 
 drivers/video/mxsfb.c  |  1 +
 tools/imx9_image.sh|  2 +-
 13 files changed, 59 insertions(+), 25 deletions(-)

Re: [PATCH v2 0/5] TEE: minor cleanup

[Igor Opaniuk]

Hi Ilias,

On Mon, Mar 4, 2024 at 12:16 PM Ilias Apalodimas <
ilias.apalodi...@linaro.org> wrote:

> Hi Igor,
>
> On Sun, 3 Mar 2024 at 00:01, Igor Opaniuk  wrote:
> >
> >
> > - Address some spelling errors and typos
> > - Support CMD_OPTEE_RPMB for SANDBOX configurations and add python tests
> > - Remove common.h inclusion for drivers/tee
> >
> > Changes in v2:
> > - Fixed chimp_optee.c:37:9: error: implicit declaration of function
> 'memset'
> > - Applied R-b and T-b tags
>
> https://source.denx.de/u-boot/custodians/u-boot-tpm/-/pipelines/19808
> this seems to have a few failures
>
> Cheers
> /Ilias
> >
> > Igor Opaniuk (5):
> >   tee: optee: fix description in Kconfig
> >   tee: sandbox: fix spelling errors
> >   cmd: optee_rpmb: build cmd for sandbox
> >   test: py: add optee_rpmb tests
> >   tee: remove common.h inclusion
> >
> >  cmd/Kconfig|  4 +++-
> >  drivers/tee/broadcom/chimp_optee.c |  3 ++-
> >  drivers/tee/optee/Kconfig  |  2 +-
> >  drivers/tee/optee/core.c   |  1 -
> >  drivers/tee/optee/i2c.c|  1 -
> >  drivers/tee/optee/rpmb.c   |  1 -
> >  drivers/tee/optee/supplicant.c |  2 +-
> >  drivers/tee/sandbox.c  | 10 +-
> >  drivers/tee/tee-uclass.c   |  1 -
> >  test/py/tests/test_optee_rpmb.py   | 20 
> >  10 files changed, 32 insertions(+), 13 deletions(-)
> >  create mode 100644 test/py/tests/test_optee_rpmb.py
> >
> > --
> > 2.34.1
> >
>

I've sent v3.

CI build with python tests passing successfully:
https://dev.azure.com/igoropaniuk/u-boot/_build/results?buildId=28=results

-- 
Best regards - Atentamente - Meilleures salutations

Igor Opaniuk

mailto: igor.opan...@gmail.com
skype: igor.opanyuk
http://ua.linkedin.com/in/iopaniuk

[PATCH v3 6/6] tee: remove common.h inclusion

[Igor Opaniuk]

The usage of the common.h include file is deprecated [1], and has already
been removed from several files.
Get rid of all inclusions in the "drivers/tee" directory, and replace it
with required include files directly where needed.

[1] doc/develop/codingstyle.rst

Signed-off-by: Igor Opaniuk 
---

Changes in v2:
- Fixed chimp_optee.c:37:9: error: implicit declaration of function 'memset'

 drivers/tee/broadcom/chimp_optee.c | 3 ++-
 drivers/tee/optee/core.c   | 1 -
 drivers/tee/optee/i2c.c| 1 -
 drivers/tee/optee/rpmb.c   | 1 -
 drivers/tee/optee/supplicant.c | 2 +-
 drivers/tee/sandbox.c  | 2 +-
 drivers/tee/tee-uclass.c   | 1 -
 7 files changed, 4 insertions(+), 7 deletions(-)

diff --git a/drivers/tee/broadcom/chimp_optee.c 
b/drivers/tee/broadcom/chimp_optee.c
index 37f9b094f76..bd146ef2899 100644
--- a/drivers/tee/broadcom/chimp_optee.c
+++ b/drivers/tee/broadcom/chimp_optee.c
@@ -3,9 +3,10 @@
  * Copyright 2020 Broadcom.
  */
 
-#include 
 #include 
 #include 
+#include 
+#include 
 
 #ifdef CONFIG_CHIMP_OPTEE
 
diff --git a/drivers/tee/optee/core.c b/drivers/tee/optee/core.c
index 47f845cffe3..5fc0505c788 100644
--- a/drivers/tee/optee/core.c
+++ b/drivers/tee/optee/core.c
@@ -3,7 +3,6 @@
  * Copyright (c) 2018-2020 Linaro Limited
  */
 
-#include 
 #include 
 #include 
 #include 
diff --git a/drivers/tee/optee/i2c.c b/drivers/tee/optee/i2c.c
index ef4e10f9912..e3fb99897c5 100644
--- a/drivers/tee/optee/i2c.c
+++ b/drivers/tee/optee/i2c.c
@@ -3,7 +3,6 @@
  * Copyright (c) 2020 Foundries.io Ltd
  */
 
-#include 
 #include 
 #include 
 #include 
diff --git a/drivers/tee/optee/rpmb.c b/drivers/tee/optee/rpmb.c
index 5bc13757ea8..bacced6af6c 100644
--- a/drivers/tee/optee/rpmb.c
+++ b/drivers/tee/optee/rpmb.c
@@ -3,7 +3,6 @@
  * Copyright (c) 2018 Linaro Limited
  */
 
-#include 
 #include 
 #include 
 #include 
diff --git a/drivers/tee/optee/supplicant.c b/drivers/tee/optee/supplicant.c
index f9dd874b594..8a426f53ba8 100644
--- a/drivers/tee/optee/supplicant.c
+++ b/drivers/tee/optee/supplicant.c
@@ -3,10 +3,10 @@
  * Copyright (c) 2018, Linaro Limited
  */
 
-#include 
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #include "optee_msg.h"
diff --git a/drivers/tee/sandbox.c b/drivers/tee/sandbox.c
index ec66401878c..8ad7c09efdd 100644
--- a/drivers/tee/sandbox.c
+++ b/drivers/tee/sandbox.c
@@ -2,7 +2,7 @@
 /*
  * Copyright (C) 2018 Linaro Limited
  */
-#include 
+
 #include 
 #include 
 #include 
diff --git a/drivers/tee/tee-uclass.c b/drivers/tee/tee-uclass.c
index 52412a4098e..0194d732193 100644
--- a/drivers/tee/tee-uclass.c
+++ b/drivers/tee/tee-uclass.c
@@ -5,7 +5,6 @@
 
 #define LOG_CATEGORY UCLASS_TEE
 
-#include 
 #include 
 #include 
 #include 
-- 
2.34.1

[PATCH v3 5/6] test: py: add optee_rpmb tests

[Igor Opaniuk]

Add read/write tests for optee_rpmb cmd.

Signed-off-by: Igor Opaniuk 
---

(no changes since v1)

 test/py/tests/test_optee_rpmb.py | 20 
 1 file changed, 20 insertions(+)
 create mode 100644 test/py/tests/test_optee_rpmb.py

diff --git a/test/py/tests/test_optee_rpmb.py b/test/py/tests/test_optee_rpmb.py
new file mode 100644
index 000..8a081b5c494
--- /dev/null
+++ b/test/py/tests/test_optee_rpmb.py
@@ -0,0 +1,20 @@
+# SPDX-License-Identifier:  GPL-2.0+
+#
+# Tests for OP-TEE RPMB read/write support
+
+"""
+This tests optee_rpmb cmd in U-Boot
+"""
+
+import pytest
+import u_boot_utils as util
+
+@pytest.mark.buildconfigspec('cmd_optee_rpmb')
+def test_optee_rpmb_read_write(u_boot_console):
+"""Test OP-TEE RPMB cmd read/write
+"""
+response = u_boot_console.run_command('optee_rpmb write_pvalue 
test_variable test_value')
+assert response == 'Wrote 11 bytes'
+
+response = u_boot_console.run_command('optee_rpmb read_pvalue 
test_variable 11')
+assert response == 'Read 11 bytes, value = test_value'
\ No newline at end of file
-- 
2.34.1

[PATCH v3 4/6] cmd: optee_rpmb: build cmd for sandbox

[Igor Opaniuk]

Support CMD_OPTEE_RPMB for SANDBOX configurations.
Test:

$ ./u-boot -d arch/sandbox/dts/test.dtb
...
=> optee_rpmb write_pvalue test_variable test_value
Wrote 11 bytes
=> optee_rpmb read_pvalue test_variable 11
Read 11 bytes, value = test_value

Reviewed-by: Mattijs Korpershoek 
Tested-by: Mattijs Korpershoek 
Signed-off-by: Igor Opaniuk 
---

(no changes since v2)

Changes in v2:
- Applied R-b and T-b tags

 cmd/Kconfig | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/cmd/Kconfig b/cmd/Kconfig
index a86b5705174..8ad8c0c542c 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -1370,7 +1370,9 @@ config CMD_CLONE
 
 config CMD_OPTEE_RPMB
bool "Enable read/write support on RPMB via OPTEE"
-   depends on SUPPORT_EMMC_RPMB && OPTEE
+   depends on (SUPPORT_EMMC_RPMB && OPTEE) || SANDBOX_TEE
+   default y if SANDBOX_TEE
+   select OPTEE_TA_AVB if SANDBOX_TEE
help
  Enable the commands for reading, writing persistent named values
  in the Replay Protection Memory Block partition in eMMC by
-- 
2.34.1

[PATCH v3 3/6] cmd: optee_rpmb: close tee session

[Igor Opaniuk]

Add calls for closing tee session after every read/write operation.

Signed-off-by: Igor Opaniuk 
---

(no changes since v1)

 cmd/optee_rpmb.c | 23 +--
 1 file changed, 17 insertions(+), 6 deletions(-)

diff --git a/cmd/optee_rpmb.c b/cmd/optee_rpmb.c
index e0e44bbed04..b3cafd92410 100644
--- a/cmd/optee_rpmb.c
+++ b/cmd/optee_rpmb.c
@@ -87,8 +87,10 @@ static int read_persistent_value(const char *name,
 
rc = tee_shm_alloc(tee, name_size,
   TEE_SHM_ALLOC, _name);
-   if (rc)
-   return -ENOMEM;
+   if (rc) {
+   rc = -ENOMEM;
+   goto close_session;
+   }
 
rc = tee_shm_alloc(tee, buffer_size,
   TEE_SHM_ALLOC, _buf);
@@ -125,6 +127,9 @@ out:
tee_shm_free(shm_buf);
 free_name:
tee_shm_free(shm_name);
+close_session:
+   tee_close_session(tee, session);
+   tee = NULL;
 
return rc;
 }
@@ -139,17 +144,20 @@ static int write_persistent_value(const char *name,
struct tee_param param[2];
size_t name_size = strlen(name) + 1;
 
+   if (!value_size)
+   return -EINVAL;
+
if (!tee) {
if (avb_ta_open_session())
return -ENODEV;
}
-   if (!value_size)
-   return -EINVAL;
 
rc = tee_shm_alloc(tee, name_size,
   TEE_SHM_ALLOC, _name);
-   if (rc)
-   return -ENOMEM;
+   if (rc) {
+   rc = -ENOMEM;
+   goto close_session;
+   }
 
rc = tee_shm_alloc(tee, value_size,
   TEE_SHM_ALLOC, _buf);
@@ -178,6 +186,9 @@ out:
tee_shm_free(shm_buf);
 free_name:
tee_shm_free(shm_name);
+close_session:
+   tee_close_session(tee, session);
+   tee = NULL;
 
return rc;
 }
-- 
2.34.1

[PATCH v3 2/6] tee: sandbox: fix spelling errors

[Igor Opaniuk]

Fix spelling errors in comments.

Reviewed-by: Heinrich Schuchardt 
Reviewed-by: Ilias Apalodimas 
Signed-off-by: Igor Opaniuk 
---

(no changes since v2)

Changes in v2:
- Applied R-b tags

 drivers/tee/sandbox.c | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/tee/sandbox.c b/drivers/tee/sandbox.c
index 86219a9bb1a..ec66401878c 100644
--- a/drivers/tee/sandbox.c
+++ b/drivers/tee/sandbox.c
@@ -14,7 +14,7 @@
 #include "optee/optee_private.h"
 
 /*
- * The sandbox tee driver tries to emulate a generic Trusted Exectution
+ * The sandbox tee driver tries to emulate a generic Trusted Execution
  * Environment (TEE) with the Trusted Applications (TA) OPTEE_TA_AVB and
  * OPTEE_TA_RPC_TEST available.
  */
@@ -23,7 +23,7 @@ static const u32 pstorage_max = 16;
 /**
  * struct ta_entry - TA entries
  * @uuid:  UUID of an emulated TA
- * @open_session   Called when a session is openened to the TA
+ * @open_session   Called when a session is opened to the TA
  * @invoke_funcCalled when a function in the TA is to be 
invoked
  *
  * This struct is used to register TAs in this sandbox emulation of a TEE.
@@ -140,8 +140,8 @@ static u32 pta_scp03_invoke_func(struct udevice *dev, u32 
func, uint num_params,
provisioned = true;
 
/*
-* Either way, we asume both operations succeeded and that
-* the communication channel has now been stablished
+* Either way, we assume both operations succeeded and that
+* the communication channel has now been established
 */
 
return TEE_SUCCESS;
-- 
2.34.1

[PATCH v3 1/6] tee: optee: fix description in Kconfig

[Igor Opaniuk]

Fix OPTEE_TA_AVB symbol description in Kconfig:
s/"write"rb"/"write_rb"/g

Reviewed-by: Heinrich Schuchardt 
Reviewed-by: Ilias Apalodimas 
Signed-off-by: Igor Opaniuk 
---

(no changes since v2)

Changes in v2:
- Applied R-b tags

 drivers/tee/optee/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/tee/optee/Kconfig b/drivers/tee/optee/Kconfig
index 9dc65b0501e..db0bcfa6f15 100644
--- a/drivers/tee/optee/Kconfig
+++ b/drivers/tee/optee/Kconfig
@@ -19,7 +19,7 @@ config OPTEE_TA_AVB
default y
help
  Enables support for the AVB Trusted Application (TA) in OP-TEE.
- The TA can support the "avb" subcommands "read_rb", "write"rb"
+ The TA can support the "avb" subcommands "read_rb", "write_rb"
  and "is_unlocked".
 
 config OPTEE_TA_RPC_TEST
-- 
2.34.1

[PATCH v3 0/6] TEE: minor cleanup

[Igor Opaniuk]

- Address some spelling errors and typos
- Support CMD_OPTEE_RPMB for SANDBOX configurations and add python tests
- Remove common.h inclusion for drivers/tee
- Add calls for closing tee session after every read/write operation.

CI build:
[1] 
https://dev.azure.com/igoropaniuk/u-boot/_build/results?buildId=28=results

Changes in v3:
- Added calls for closing tee session after every read/write operation

Changes in v2:
- Fixed chimp_optee.c:37:9: error: implicit declaration of function 'memset'
- Applied R-b and T-b tags

Igor Opaniuk (6):
  tee: optee: fix description in Kconfig
  tee: sandbox: fix spelling errors
  cmd: optee_rpmb: close tee session
  cmd: optee_rpmb: build cmd for sandbox
  test: py: add optee_rpmb tests
  tee: remove common.h inclusion

 cmd/Kconfig|  4 +++-
 cmd/optee_rpmb.c   | 23 +--
 drivers/tee/broadcom/chimp_optee.c |  3 ++-
 drivers/tee/optee/Kconfig  |  2 +-
 drivers/tee/optee/core.c   |  1 -
 drivers/tee/optee/i2c.c|  1 -
 drivers/tee/optee/rpmb.c   |  1 -
 drivers/tee/optee/supplicant.c |  2 +-
 drivers/tee/sandbox.c  | 10 +-
 drivers/tee/tee-uclass.c   |  1 -
 test/py/tests/test_optee_rpmb.py   | 20 
 11 files changed, 49 insertions(+), 19 deletions(-)
 create mode 100644 test/py/tests/test_optee_rpmb.py

-- 
2.34.1

Re: [PATCH 0/8] Add support for Qualcomm SA8155-ADP board

[Konrad Dybcio]

On 3/4/24 16:51, Volodymyr Babchuk wrote:


Hi Stephan,

Stephan Gerhold  writes:


On Fri, Mar 01, 2024 at 06:25:39PM +, Volodymyr Babchuk wrote:

Caleb Connolly  writes:

On 29/02/2024 14:21, Volodymyr Babchuk wrote:

This patch series adds support for Qualcomm SA8155-ADP development
board. Main motivation for this series is to allow running
virtualization software on this board and U-Boot is a good way to
break Qualcomm's boot chain at EL2 with more convenient ways for
uploading and running the code. With this patches applied it is
possible to upload and run Xen on this board. KVM probably should work
too.


This is really cool! I've experimented with this on SDM845 and SM8250
but never really did anything with it... I'd love to take a look at your
Xen branch?


Honestly, there is nothing to look at right now. I just implemented
early printk serial driver for the qcom, made hacks to the device tree
and trying to boot Dom0. I already expecting issues with the GPU,
because it has own SMMU without virtualization support and Xen already
complains about it. So I had to remove it from the DTS for a time being.



Did you enable all the clocks/power domains/etc for the GPU SMMU? If I
remember correctly it is off by default and all registers read as
zeroes. The SMMU driver could easily get confused about the capabilities
of the SMMU (e.g. the stage 2/virtualization support) if all the ID
registers read as zeroes.


Ah, this is a great idea, thanks. I tried a quick test by enabling only
clocks that are provided by GCC, but looks like I need to enable GPUCC
clocks as well. So I need to write a driver for GPUCC or at least
figure which registers to write with a debugger. I'll try this later.


You'll probably also need to enable the CX GDSC (not sure about the
order, probably GDSC and then clocks)

Konrad

[PATCH RFC 26/26] dts: support building all dtb files for a specific vendor

[Caleb Connolly]

This adjusts OF_UPSTREAM to behave more like the kernel by allowing for
all the devicetree files for a given vendor to be compiled. This is
useful for Qualcomm in particular as most boards are supported by a
single U-Boot build just provided with a different DT.

Signed-off-by: Caleb Connolly 
---
 dts/Kconfig  | 24 
 scripts/Makefile.dts | 17 -
 2 files changed, 40 insertions(+), 1 deletion(-)

diff --git a/dts/Kconfig b/dts/Kconfig
index b9b6367154ef..67d9dc489856 100644
--- a/dts/Kconfig
+++ b/dts/Kconfig
@@ -100,8 +100,32 @@ config OF_UPSTREAM
  However, newer boards whose devicetree source files haven't landed in
  the dts/upstream subtree, they can override this option to have the
  DT build from existing U-Boot tree location instead.
 
+config OF_UPSTREAM_BUILD_VENDOR
+   bool "Build all devicetree files for a particular vendor"
+   depends on OF_UPSTREAM
+   help
+ Enable building all devicetree files for a particular vendor. This
+ is useful for generic U-Boot configurations where many boards can
+ be supported with a single binary.
+
+ This is only available for platforms using upstream devicetree.
+
+config OF_UPSTREAM_VENDOR
+   string "Vendor to build all upstream devicetree files for"
+   depends on OF_UPSTREAM_BUILD_VENDOR
+   default "qcom" if ARCH_SNAPDRAGON
+   default "rockchip" if ARCH_ROCKCHIP
+   default "amlogic" if ARCH_MESON
+   default "allwinner" if ARCH_SUNXI
+   default "mediatek" if ARCH_MEDIATEK
+   default "marvell" if ARCH_MVEBU
+   default "xilinx" if ARCH_VERSAL || ARCH_ZYNQ
+   default "nvidia" if ARCH_TEGRA
+   help
+ Select the vendor to build all devicetree files for.
+
 choice
prompt "Provider of DTB for DT control"
depends on OF_CONTROL
 
diff --git a/scripts/Makefile.dts b/scripts/Makefile.dts
index 5e2429c6170c..8005527f3df7 100644
--- a/scripts/Makefile.dts
+++ b/scripts/Makefile.dts
@@ -1,3 +1,18 @@
 # SPDX-License-Identifier: GPL-2.0+
 
-dtb-y += $(patsubst %,%.dtb,$(subst ",,$(CONFIG_DEFAULT_DEVICE_TREE) 
$(CONFIG_OF_LIST) $(CONFIG_SPL_OF_LIST)))
+dtb-y += $(patsubst %,%.dtb,\
+   $(subst ",,$(CONFIG_DEFAULT_DEVICE_TREE) $(CONFIG_OF_LIST) 
$(CONFIG_SPL_OF_LIST)))
+
+ifeq ($(CONFIG_OF_UPSTREAM_BUILD_VENDOR),y)
+ifeq ($(CONFIG_ARM64),y)
+dt_dir := $(srctree)/dts/upstream/src/arm64
+else
+dt_dir := $(srctree)/dts/upstream/src/$(ARCH)
+endif
+
+dtb-vendor_dts := $(patsubst %.dts,%.dtb, \
+   $(wildcard $(dt_dir)/$(subst ",,$(CONFIG_OF_UPSTREAM_VENDOR))/*.dts))
+
+dtb-y += $(subst $(dt_dir)/,,$(dtb-vendor_dts))
+
+endif

-- 
2.44.0

[PATCH RFC 25/26] dt-bindings: drop generic headers

[Caleb Connolly]

Drop all the subsystem headers that are compatible with the headers in
dts/upstream.

Signed-off-by: Caleb Connolly 
---
 include/dt-bindings/ata/ahci.h |  20 -
 include/dt-bindings/gpio/gpio.h|  42 --
 include/dt-bindings/input/gpio-keys.h  |  13 -
 include/dt-bindings/input/input.h  |  17 -
 include/dt-bindings/input/linux-event-codes.h  | 806 -
 include/dt-bindings/interrupt-controller/irq.h |  19 -
 include/dt-bindings/leds/common.h  | 106 
 include/dt-bindings/mux/mux.h  |  17 -
 include/dt-bindings/phy/phy.h  |  26 -
 include/dt-bindings/pwm/pwm.h  |  14 -
 include/dt-bindings/spmi/spmi.h|  10 -
 include/dt-bindings/thermal/thermal.h  |  15 -
 include/dt-bindings/usb/pd.h   |  88 ---
 13 files changed, 1193 deletions(-)

diff --git a/include/dt-bindings/ata/ahci.h b/include/dt-bindings/ata/ahci.h
deleted file mode 100644
index b3f3b7cf9af8..
--- a/include/dt-bindings/ata/ahci.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
-/*
- * This header provides constants for most AHCI bindings.
- */
-
-#ifndef _DT_BINDINGS_ATA_AHCI_H
-#define _DT_BINDINGS_ATA_AHCI_H
-
-/* Host Bus Adapter generic platform capabilities */
-#define HBA_SSS(1 << 27)
-#define HBA_SMPS   (1 << 28)
-
-/* Host Bus Adapter port-specific platform capabilities */
-#define HBA_PORT_HPCP  (1 << 18)
-#define HBA_PORT_MPSP  (1 << 19)
-#define HBA_PORT_CPD   (1 << 20)
-#define HBA_PORT_ESP   (1 << 21)
-#define HBA_PORT_FBSCP (1 << 22)
-
-#endif
diff --git a/include/dt-bindings/gpio/gpio.h b/include/dt-bindings/gpio/gpio.h
deleted file mode 100644
index c029467e828b..
--- a/include/dt-bindings/gpio/gpio.h
+++ /dev/null
@@ -1,42 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * This header provides constants for most GPIO bindings.
- *
- * Most GPIO bindings include a flags cell as part of the GPIO specifier.
- * In most cases, the format of the flags cell uses the standard values
- * defined in this header.
- */
-
-#ifndef _DT_BINDINGS_GPIO_GPIO_H
-#define _DT_BINDINGS_GPIO_GPIO_H
-
-/* Bit 0 express polarity */
-#define GPIO_ACTIVE_HIGH 0
-#define GPIO_ACTIVE_LOW 1
-
-/* Bit 1 express single-endedness */
-#define GPIO_PUSH_PULL 0
-#define GPIO_SINGLE_ENDED 2
-
-/* Bit 2 express Open drain or open source */
-#define GPIO_LINE_OPEN_SOURCE 0
-#define GPIO_LINE_OPEN_DRAIN 4
-
-/*
- * Open Drain/Collector is the combination of single-ended open drain 
interface.
- * Open Source/Emitter is the combination of single-ended open source 
interface.
- */
-#define GPIO_OPEN_DRAIN (GPIO_SINGLE_ENDED | GPIO_LINE_OPEN_DRAIN)
-#define GPIO_OPEN_SOURCE (GPIO_SINGLE_ENDED | GPIO_LINE_OPEN_SOURCE)
-
-/* Bit 3 express GPIO suspend/resume and reset persistence */
-#define GPIO_PERSISTENT 0
-#define GPIO_TRANSITORY 8
-
-/* Bit 4 express pull up */
-#define GPIO_PULL_UP 16
-
-/* Bit 5 express pull down */
-#define GPIO_PULL_DOWN 32
-
-#endif
diff --git a/include/dt-bindings/input/gpio-keys.h 
b/include/dt-bindings/input/gpio-keys.h
deleted file mode 100644
index 8962df79e753..
--- a/include/dt-bindings/input/gpio-keys.h
+++ /dev/null
@@ -1,13 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * This header provides constants for gpio keys bindings.
- */
-
-#ifndef _DT_BINDINGS_GPIO_KEYS_H
-#define _DT_BINDINGS_GPIO_KEYS_H
-
-#define EV_ACT_ANY 0x00/* asserted or deasserted */
-#define EV_ACT_ASSERTED0x01/* asserted */
-#define EV_ACT_DEASSERTED  0x02/* deasserted */
-
-#endif /* _DT_BINDINGS_GPIO_KEYS_H */
diff --git a/include/dt-bindings/input/input.h 
b/include/dt-bindings/input/input.h
deleted file mode 100644
index a21413324a3f..
--- a/include/dt-bindings/input/input.h
+++ /dev/null
@@ -1,17 +0,0 @@
-/*
- * This header provides constants for most input bindings.
- *
- * Most input bindings include key code, matrix key code format.
- * In most cases, key code and matrix key code format uses
- * the standard values/macro defined in this header.
- */
-
-#ifndef _DT_BINDINGS_INPUT_INPUT_H
-#define _DT_BINDINGS_INPUT_INPUT_H
-
-#include "linux-event-codes.h"
-
-#define MATRIX_KEY(row, col, code) \
-   row) & 0xFF) << 24) | (((col) & 0xFF) << 16) | ((code) & 0x))
-
-#endif /* _DT_BINDINGS_INPUT_INPUT_H */
diff --git a/include/dt-bindings/input/linux-event-codes.h 
b/include/dt-bindings/input/linux-event-codes.h
deleted file mode 100644
index 331458c0e710..
--- a/include/dt-bindings/input/linux-event-codes.h
+++ /dev/null
@@ -1,806 +0,0 @@
-/*
- * Input event codes
- *
- **** IMPORTANT ***
- * This file is not only included from C-code but also from devicetree source
- * files. As such this file MUST only contain comments and defines.
- *
- * Copyright (c) 1999-2002 Vojtech Pavlik
- * Copyright 

[PATCH RFC 24/26] dt-bindings: drop remaining device headers

[Caleb Connolly]

Drop in favour of dts/upstream.

Remaining device headers for small vendors

Signed-off-by: Caleb Connolly 
---
 include/dt-bindings/arm/coresight-cti-dt.h |  37 -
 include/dt-bindings/arm/ux500_pm_domains.h |  15 --
 include/dt-bindings/bus/moxtet.h   |  16 --
 include/dt-bindings/display/tda998x.h  |   8 -
 include/dt-bindings/gpio/aspeed-gpio.h |  51 --
 include/dt-bindings/gpio/uniphier-gpio.h   |  18 --
 .../dt-bindings/interrupt-controller/apple-aic.h   |  15 --
 include/dt-bindings/interrupt-controller/arm-gic.h |  23 ---
 include/dt-bindings/interrupt-controller/irq-st.h  |  30 
 .../dt-bindings/interrupt-controller/irqc-rzg2l.h  |  25 ---
 .../dt-bindings/interrupt-controller/mips-gic.h|   9 -
 include/dt-bindings/leds/leds-netxbig.h|  18 --
 include/dt-bindings/leds/leds-ns2.h|   9 -
 include/dt-bindings/leds/leds-pca9532.h|  18 --
 include/dt-bindings/media/tda1997x.h   |  74 -
 include/dt-bindings/media/video-interfaces.h   |  16 --
 include/dt-bindings/mfd/atmel-flexcom.h|  15 --
 include/dt-bindings/mfd/dbx500-prcmu.h |  84 --
 include/dt-bindings/net/mscc-phy-vsc8531.h |  31 
 include/dt-bindings/net/qca-ar803x.h   |  13 --
 include/dt-bindings/phy/phy-am654-serdes.h |  13 --
 include/dt-bindings/phy/phy-cadence.h  |  24 ---
 include/dt-bindings/pinctrl/apple.h|  13 --
 include/dt-bindings/pinctrl/dra.h  |  79 -
 include/dt-bindings/power/owl-s700-powergate.h |  19 ---
 include/dt-bindings/power/raspberrypi-power.h  |  41 -
 .../dt-bindings/regulator/dlg,da9063-regulator.h   |  16 --
 include/dt-bindings/regulator/maxim,max77802.h |  18 --
 include/dt-bindings/reset/actions,s700-reset.h |  34 
 include/dt-bindings/reset/actions,s900-reset.h |  65 
 include/dt-bindings/reset/altr,rst-mgr-a10.h   | 110 -
 include/dt-bindings/reset/altr,rst-mgr-s10.h   |  96 ---
 include/dt-bindings/reset/altr,rst-mgr.h   |  82 -
 include/dt-bindings/reset/nuvoton,npcm7xx-reset.h  |  91 --
 .../dt-bindings/reset/raspberrypi,firmware-reset.h |  13 --
 include/dt-bindings/reset/sama7g5-reset.h  |  10 --
 include/dt-bindings/reset/snps,hsdk-reset.h|  17 --
 include/dt-bindings/reset/starfive,jh7110-crg.h| 183 -
 include/dt-bindings/sound/apq8016-lpass.h  |   9 -
 include/dt-bindings/sound/tlv320aic31xx.h  |  14 --
 40 files changed, 1472 deletions(-)

diff --git a/include/dt-bindings/arm/coresight-cti-dt.h 
b/include/dt-bindings/arm/coresight-cti-dt.h
deleted file mode 100644
index 61e7bdf8ea6e..
--- a/include/dt-bindings/arm/coresight-cti-dt.h
+++ /dev/null
@@ -1,37 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * This header provides constants for the defined trigger signal
- * types on CoreSight CTI.
- */
-
-#ifndef _DT_BINDINGS_ARM_CORESIGHT_CTI_DT_H
-#define _DT_BINDINGS_ARM_CORESIGHT_CTI_DT_H
-
-#define GEN_IO 0
-#define GEN_INTREQ 1
-#define GEN_INTACK 2
-#define GEN_HALTREQ3
-#define GEN_RESTARTREQ 4
-#define PE_EDBGREQ 5
-#define PE_DBGRESTART  6
-#define PE_CTIIRQ  7
-#define PE_PMUIRQ  8
-#define PE_DBGTRIGGER  9
-#define ETM_EXTOUT 10
-#define ETM_EXTIN  11
-#define SNK_FULL   12
-#define SNK_ACQCOMP13
-#define SNK_FLUSHCOMP  14
-#define SNK_FLUSHIN15
-#define SNK_TRIGIN 16
-#define STM_ASYNCOUT   17
-#define STM_TOUT_SPTE  18
-#define STM_TOUT_SW19
-#define STM_TOUT_HETE  20
-#define STM_HWEVENT21
-#define ELA_TSTART 22
-#define ELA_TSTOP  23
-#define ELA_DBGREQ 24
-#define CTI_TRIG_MAX   25
-
-#endif /*_DT_BINDINGS_ARM_CORESIGHT_CTI_DT_H */
diff --git a/include/dt-bindings/arm/ux500_pm_domains.h 
b/include/dt-bindings/arm/ux500_pm_domains.h
deleted file mode 100644
index 9bd764f0c9e6..
--- a/include/dt-bindings/arm/ux500_pm_domains.h
+++ /dev/null
@@ -1,15 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * Copyright (C) 2014 Linaro Ltd.
- *
- * Author: Ulf Hansson 
- */
-#ifndef _DT_BINDINGS_ARM_UX500_PM_DOMAINS_H
-#define _DT_BINDINGS_ARM_UX500_PM_DOMAINS_H
-
-#define DOMAIN_VAPE0
-
-/* Number of PM domains. */
-#define NR_DOMAINS (DOMAIN_VAPE + 1)
-
-#endif
diff --git a/include/dt-bindings/bus/moxtet.h b/include/dt-bindings/bus/moxtet.h
deleted file mode 100644
index 10528de7b3ef..
--- a/include/dt-bindings/bus/moxtet.h
+++ /dev/null
@@ -1,16 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * Constant for device tree bindings for Turris Mox module configuration bus
- *
- * Copyright (C) 2019 Marek Behún 
- */
-
-#ifndef _DT_BINDINGS_BUS_MOXTET_H
-#define _DT_BINDINGS_BUS_MOXTET_H
-
-#define MOXTET_IRQ_PCI 0
-#define MOXTET_IRQ_USB3

[PATCH RFC 23/26] dt-bindings: drop clock headers

[Caleb Connolly]

Drop in favour of dts/upstream.

Clock headers for remaining smaller vendors that are compatible with
dts/upstream.

Signed-off-by: Caleb Connolly 
---
 include/dt-bindings/clock/actions,s700-cmu.h  | 118 ---
 include/dt-bindings/clock/actions,s900-cmu.h  | 129 
 include/dt-bindings/clock/agilex-clock.h  |  71 -
 include/dt-bindings/clock/ast2600-clock.h |  62 
 include/dt-bindings/clock/boston-clock.h  |  12 -
 include/dt-bindings/clock/fsl,qoriq-clockgen.h|  15 -
 include/dt-bindings/clock/lpc32xx-clock.h |  58 
 include/dt-bindings/clock/maxim,max77802.h|  22 --
 include/dt-bindings/clock/nuvoton,npcm7xx-clock.h |  46 ---
 include/dt-bindings/clock/rv1108-cru.h| 356 --
 include/dt-bindings/clock/starfive,jh7110-crg.h   | 258 
 include/dt-bindings/clock/versaclock.h|  13 -
 include/dt-bindings/clock/vf610-clock.h   | 202 
 13 files changed, 1362 deletions(-)

diff --git a/include/dt-bindings/clock/actions,s700-cmu.h 
b/include/dt-bindings/clock/actions,s700-cmu.h
deleted file mode 100644
index 3e1942996724..
--- a/include/dt-bindings/clock/actions,s700-cmu.h
+++ /dev/null
@@ -1,118 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0
- *
- * Device Tree binding constants for Actions Semi S700 Clock Management Unit
- *
- * Copyright (c) 2014 Actions Semi Inc.
- * Author: David Liu 
- *
- * Author: Pathiban Nallathambi 
- * Author: Saravanan Sekar 
- */
-
-#ifndef __DT_BINDINGS_CLOCK_S700_H
-#define __DT_BINDINGS_CLOCK_S700_H
-
-#define CLK_NONE   0
-
-/* pll clocks */
-#define CLK_CORE_PLL   1
-#define CLK_DEV_PLL2
-#define CLK_DDR_PLL3
-#define CLK_NAND_PLL   4
-#define CLK_DISPLAY_PLL5
-#define CLK_TVOUT_PLL  6
-#define CLK_CVBS_PLL   7
-#define CLK_AUDIO_PLL  8
-#define CLK_ETHERNET_PLL   9
-
-/* system clock */
-#define CLK_CPU10
-#define CLK_DEV11
-#define CLK_AHB12
-#define CLK_APB13
-#define CLK_DMAC   14
-#define CLK_NOC0_CLK_MUX   15
-#define CLK_NOC1_CLK_MUX   16
-#define CLK_HP_CLK_MUX 17
-#define CLK_HP_CLK_DIV 18
-#define CLK_NOC1_CLK_DIV   19
-#define CLK_NOC0   20
-#define CLK_NOC1   21
-#define CLK_SENOR_SRC  22
-
-/* peripheral device clock */
-#define CLK_GPIO   23
-#define CLK_TIMER  24
-#define CLK_DSI25
-#define CLK_CSI26
-#define CLK_SI 27
-#define CLK_DE 28
-#define CLK_HDE29
-#define CLK_VDE30
-#define CLK_VCE31
-#define CLK_NAND   32
-#define CLK_SD033
-#define CLK_SD134
-#define CLK_SD235
-
-#define CLK_UART0  36
-#define CLK_UART1  37
-#define CLK_UART2  38
-#define CLK_UART3  39
-#define CLK_UART4  40
-#define CLK_UART5  41
-#define CLK_UART6  42
-
-#define CLK_PWM0   43
-#define CLK_PWM1   44
-#define CLK_PWM2   45
-#define CLK_PWM3   46
-#define CLK_PWM4   47
-#define CLK_PWM5   48
-#define CLK_GPU3D  49
-
-#define CLK_I2C0   50
-#define CLK_I2C1   51
-#define CLK_I2C2   52
-#define CLK_I2C3   53
-
-#define CLK_SPI0   54
-#define CLK_SPI1   55
-#define CLK_SPI2   56
-#define CLK_SPI3   57
-
-#define CLK_USB3_480MPLL0  58
-#define CLK_USB3_480MPHY0  59
-#define CLK_USB3_5GPHY 60
-#define CLK_USB3_CCE   61
-#define CLK_USB3_MAC   62
-
-#define CLK_LCD63
-#define CLK_HDMI_AUDIO 64
-#define CLK_I2SRX  65
-#define CLK_I2STX  66
-
-#define CLK_SENSOR067
-#define CLK_SENSOR168
-
-#define CLK_HDMI_DEV   69
-
-#define CLK_ETHERNET   70
-#define CLK_RMII_REF   71
-
-#define CLK_USB2H0_PLLEN   72
-#define CLK_USB2H0_PHY 73

[PATCH RFC 22/26] sifive: drop clock headers

[Caleb Connolly]

Drop in favour of dts/upstream.

Small driver/dts change to fix compatibility.

Signed-off-by: Caleb Connolly 
---
 arch/riscv/dts/fu540-c000-u-boot.dtsi | 26 +-
 drivers/clk/sifive/fu540-prci.c   |  8 
 include/dt-bindings/clock/sifive-fu540-prci.h | 18 --
 include/dt-bindings/clock/sifive-fu740-prci.h | 24 
 4 files changed, 17 insertions(+), 59 deletions(-)

diff --git a/arch/riscv/dts/fu540-c000-u-boot.dtsi 
b/arch/riscv/dts/fu540-c000-u-boot.dtsi
index 360679a1781a..0f8181436410 100644
--- a/arch/riscv/dts/fu540-c000-u-boot.dtsi
+++ b/arch/riscv/dts/fu540-c000-u-boot.dtsi
@@ -6,42 +6,42 @@
 #include 
 
 / {
cpus {
-   assigned-clocks = < PRCI_CLK_COREPLL>;
+   assigned-clocks = < FU540_PRCI_CLK_COREPLL>;
assigned-clock-rates = <10>;
bootph-pre-ram;
cpu0: cpu@0 {
-   clocks = < PRCI_CLK_COREPLL>;
+   clocks = < FU540_PRCI_CLK_COREPLL>;
bootph-pre-ram;
status = "okay";
cpu0_intc: interrupt-controller {
bootph-pre-ram;
};
};
cpu1: cpu@1 {
-   clocks = < PRCI_CLK_COREPLL>;
+   clocks = < FU540_PRCI_CLK_COREPLL>;
bootph-pre-ram;
cpu1_intc: interrupt-controller {
bootph-pre-ram;
};
};
cpu2: cpu@2 {
-   clocks = < PRCI_CLK_COREPLL>;
+   clocks = < FU540_PRCI_CLK_COREPLL>;
bootph-pre-ram;
cpu2_intc: interrupt-controller {
bootph-pre-ram;
};
};
cpu3: cpu@3 {
-   clocks = < PRCI_CLK_COREPLL>;
+   clocks = < FU540_PRCI_CLK_COREPLL>;
bootph-pre-ram;
cpu3_intc: interrupt-controller {
bootph-pre-ram;
};
};
cpu4: cpu@4 {
-   clocks = < PRCI_CLK_COREPLL>;
+   clocks = < FU540_PRCI_CLK_COREPLL>;
bootph-pre-ram;
cpu4_intc: interrupt-controller {
bootph-pre-ram;
};
@@ -66,22 +66,22 @@
bootph-pre-ram;
};
prci: clock-controller@1000 {
#reset-cells = <1>;
-   resets = < PRCI_RST_DDR_CTRL_N>,
-< PRCI_RST_DDR_AXI_N>,
-< PRCI_RST_DDR_AHB_N>,
-< PRCI_RST_DDR_PHY_N>,
-< PRCI_RST_GEMGXL_N>;
+   resets = < FU540_PRCI_RST_DDR_CTRL_N>,
+< FU540_PRCI_RST_DDR_AXI_N>,
+< FU540_PRCI_RST_DDR_AHB_N>,
+< FU540_PRCI_RST_DDR_PHY_N>,
+< FU540_PRCI_RST_GEMGXL_N>;
reset-names = "ddr_ctrl", "ddr_axi", "ddr_ahb",
"ddr_phy", "gemgxl_reset";
};
dmc: dmc@100b {
compatible = "sifive,fu540-c000-ddr";
reg = <0x0 0x100b 0x0 0x0800
   0x0 0x100b2000 0x0 0x2000
   0x0 0x100b8000 0x0 0x1000>;
-   clocks = < PRCI_CLK_DDRPLL>;
+   clocks = < FU540_PRCI_CLK_DDRPLL>;
clock-frequency = <93324>;
bootph-pre-ram;
};
};
@@ -99,9 +99,9 @@
bootph-pre-ram;
 };
 
  {
-   assigned-clocks = < PRCI_CLK_GEMGXLPLL>;
+   assigned-clocks = < FU540_PRCI_CLK_GEMGXLPLL>;
assigned-clock-rates = <12500>;
 };
 
  {
diff --git a/drivers/clk/sifive/fu540-prci.c b/drivers/clk/sifive/fu540-prci.c
index ceb2c6fab0da..b019f682ac49 100644
--- a/drivers/clk/sifive/fu540-prci.c
+++ b/drivers/clk/sifive/fu540-prci.c
@@ -58,27 +58,27 @@ static const struct __prci_clock_ops 
sifive_fu540_prci_tlclksel_clk_ops = {
 };
 
 /* List of clock controls provided by the PRCI */
 struct __prci_clock __prci_init_clocks_fu540[] = {
-   [PRCI_CLK_COREPLL] = {
+   [FU540_PRCI_CLK_COREPLL] = {
.name = "corepll",
.parent_name = "hfclk",
.ops = _fu540_prci_wrpll_clk_ops,
.pwd = &__prci_corepll_data,
},
-   [PRCI_CLK_DDRPLL] = {
+   [FU540_PRCI_CLK_DDRPLL] = {
  

[PATCH RFC 21/26] hisi: drop dt-binding headers

[Caleb Connolly]

Drop in favour of dts/upstream

Signed-off-by: Caleb Connolly 
---
 include/dt-bindings/clock/hi3660-clock.h | 214 ---
 include/dt-bindings/clock/hi6220-clock.h | 173 -
 include/dt-bindings/pinctrl/hisi.h   |  74 ---
 3 files changed, 461 deletions(-)

diff --git a/include/dt-bindings/clock/hi3660-clock.h 
b/include/dt-bindings/clock/hi3660-clock.h
deleted file mode 100644
index e1374e180943..
--- a/include/dt-bindings/clock/hi3660-clock.h
+++ /dev/null
@@ -1,214 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
-/*
- * Copyright (c) 2016-2017 Linaro Ltd.
- * Copyright (c) 2016-2017 HiSilicon Technologies Co., Ltd.
- */
-
-#ifndef __DTS_HI3660_CLOCK_H
-#define __DTS_HI3660_CLOCK_H
-
-/* fixed rate clocks */
-#define HI3660_CLKIN_SYS   0
-#define HI3660_CLKIN_REF   1
-#define HI3660_CLK_FLL_SRC 2
-#define HI3660_CLK_PPLL0   3
-#define HI3660_CLK_PPLL1   4
-#define HI3660_CLK_PPLL2   5
-#define HI3660_CLK_PPLL3   6
-#define HI3660_CLK_SCPLL   7
-#define HI3660_PCLK8
-#define HI3660_CLK_UART0_DBG   9
-#define HI3660_CLK_UART6   10
-#define HI3660_OSC32K  11
-#define HI3660_OSC19M  12
-#define HI3660_CLK_480M13
-#define HI3660_CLK_INV 14
-
-/* clk in crgctrl */
-#define HI3660_FACTOR_UART315
-#define HI3660_CLK_FACTOR_MMC  16
-#define HI3660_CLK_GATE_I2C0   17
-#define HI3660_CLK_GATE_I2C1   18
-#define HI3660_CLK_GATE_I2C2   19
-#define HI3660_CLK_GATE_I2C6   20
-#define HI3660_CLK_DIV_SYSBUS  21
-#define HI3660_CLK_DIV_320M22
-#define HI3660_CLK_DIV_A53 23
-#define HI3660_CLK_GATE_SPI0   24
-#define HI3660_CLK_GATE_SPI2   25
-#define HI3660_PCIEPHY_REF 26
-#define HI3660_CLK_ABB_USB 27
-#define HI3660_HCLK_GATE_SDIO0 28
-#define HI3660_HCLK_GATE_SD29
-#define HI3660_CLK_GATE_AOMM   30
-#define HI3660_PCLK_GPIO0  31
-#define HI3660_PCLK_GPIO1  32
-#define HI3660_PCLK_GPIO2  33
-#define HI3660_PCLK_GPIO3  34
-#define HI3660_PCLK_GPIO4  35
-#define HI3660_PCLK_GPIO5  36
-#define HI3660_PCLK_GPIO6  37
-#define HI3660_PCLK_GPIO7  38
-#define HI3660_PCLK_GPIO8  39
-#define HI3660_PCLK_GPIO9  40
-#define HI3660_PCLK_GPIO10 41
-#define HI3660_PCLK_GPIO11 42
-#define HI3660_PCLK_GPIO12 43
-#define HI3660_PCLK_GPIO13 44
-#define HI3660_PCLK_GPIO14 45
-#define HI3660_PCLK_GPIO15 46
-#define HI3660_PCLK_GPIO16 47
-#define HI3660_PCLK_GPIO17 48
-#define HI3660_PCLK_GPIO18 49
-#define HI3660_PCLK_GPIO19 50
-#define HI3660_PCLK_GPIO20 51
-#define HI3660_PCLK_GPIO21 52
-#define HI3660_CLK_GATE_SPI3   53
-#define HI3660_CLK_GATE_I2C7   54
-#define HI3660_CLK_GATE_I2C3   55
-#define HI3660_CLK_GATE_SPI1   56
-#define HI3660_CLK_GATE_UART1  57
-#define HI3660_CLK_GATE_UART2  58
-#define HI3660_CLK_GATE_UART4  59
-#define HI3660_CLK_GATE_UART5  60
-#define HI3660_CLK_GATE_I2C4   61
-#define HI3660_CLK_GATE_DMAC   62
-#define HI3660_PCLK_GATE_DSS   63
-#define HI3660_ACLK_GATE_DSS   64
-#define HI3660_CLK_GATE_LDI1   65
-#define HI3660_CLK_GATE_LDI0   66
-#define HI3660_CLK_GATE_VIVOBUS67
-#define HI3660_CLK_GATE_EDC0   68
-#define HI3660_CLK_GATE_TXDPHY0_CFG69
-#define HI3660_CLK_GATE_TXDPHY0_REF70
-#define HI3660_CLK_GATE_TXDPHY1_CFG71
-#define HI3660_CLK_GATE_TXDPHY1_REF72
-#define HI3660_ACLK_GATE_USB3OTG   73
-#define HI3660_CLK_GATE_SPI4   74
-#define HI3660_CLK_GATE_SD 75
-#define HI3660_CLK_GATE_SDIO0  76
-#define HI3660_CLK_GATE_UFS_SUBSYS 77
-#define HI3660_PCLK_GATE_DSI0  78
-#define HI3660_PCLK_GATE_DSI1  79
-#define HI3660_ACLK_GATE_PCIE  80
-#define HI3660_PCLK_GATE_PCIE_SYS   81
-#define HI3660_CLK_GATE_PCIEAUX82
-#define HI3660_PCLK_GATE_PCIE_PHY  83
-#define HI3660_CLK_ANDGT_LDI0  84
-#define HI3660_CLK_ANDGT_LDI1  85
-#define HI3660_CLK_ANDGT_EDC0  86
-#define HI3660_CLK_GATE_UFSPHY_GT  87
-#define HI3660_CLK_ANDGT_MMC   88
-#define HI3660_CLK_ANDGT_SD89
-#define HI3660_CLK_A53HPM_ANDGT90
-#define HI3660_CLK_ANDGT_SDIO  91
-#define HI3660_CLK_ANDGT_UART0 92
-#define HI3660_CLK_ANDGT_UART1 93
-#define HI3660_CLK_ANDGT_UARTH 94
-#define HI3660_CLK_ANDGT_SPI   95
-#define 

[PATCH RFC 19/26] mtk: drop dt-binding headers

[Caleb Connolly]

Drop in favour of dts/upstream

Signed-off-by: Caleb Connolly 
---
 include/dt-bindings/clock/mt7621-clk.h|  46 --
 include/dt-bindings/clock/mt7622-clk.h| 270 ---
 include/dt-bindings/clock/mt7629-clk.h| 206 --
 include/dt-bindings/clock/mt8183-clk.h| 329 -
 include/dt-bindings/pinctrl/mt65xx.h  |  41 --
 include/dt-bindings/pinctrl/mt8365-pinfunc.h  | 858 --
 include/dt-bindings/power/mediatek,mt8365-power.h |  19 -
 include/dt-bindings/reset/mt7621-reset.h  |  38 -
 8 files changed, 1807 deletions(-)

diff --git a/include/dt-bindings/clock/mt7621-clk.h 
b/include/dt-bindings/clock/mt7621-clk.h
deleted file mode 100644
index 978c67951ba4..
--- a/include/dt-bindings/clock/mt7621-clk.h
+++ /dev/null
@@ -1,46 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * Copyright (C) 2022 MediaTek Inc. All rights reserved.
- *
- * Author: Weijie Gao 
- */
-
-#ifndef _DT_BINDINGS_MT7621_CLK_H_
-#define _DT_BINDINGS_MT7621_CLK_H_
-
-#define MT7621_CLK_XTAL0
-#define MT7621_CLK_CPU 1
-#define MT7621_CLK_BUS 2
-#define MT7621_CLK_50M 3
-#define MT7621_CLK_125M4
-#define MT7621_CLK_150M5
-#define MT7621_CLK_250M6
-#define MT7621_CLK_270M7
-
-#define MT7621_CLK_HSDMA   8
-#define MT7621_CLK_FE  9
-#define MT7621_CLK_SP_DIVTX10
-#define MT7621_CLK_TIMER   11
-#define MT7621_CLK_PCM 12
-#define MT7621_CLK_PIO 13
-#define MT7621_CLK_GDMA14
-#define MT7621_CLK_NAND15
-#define MT7621_CLK_I2C 16
-#define MT7621_CLK_I2S 17
-#define MT7621_CLK_SPI 18
-#define MT7621_CLK_UART1   19
-#define MT7621_CLK_UART2   20
-#define MT7621_CLK_UART3   21
-#define MT7621_CLK_ETH 22
-#define MT7621_CLK_PCIE0   23
-#define MT7621_CLK_PCIE1   24
-#define MT7621_CLK_PCIE2   25
-#define MT7621_CLK_CRYPTO  26
-#define MT7621_CLK_SHXC27
-
-#define MT7621_CLK_MAX 28
-
-/* for u-boot only */
-#define MT7621_CLK_DDR 29
-
-#endif /* _DT_BINDINGS_MT7621_CLK_H_ */
diff --git a/include/dt-bindings/clock/mt7622-clk.h 
b/include/dt-bindings/clock/mt7622-clk.h
deleted file mode 100644
index 76fcaff0e42e..
--- a/include/dt-bindings/clock/mt7622-clk.h
+++ /dev/null
@@ -1,270 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * Copyright (c) 2019 MediaTek Inc.
- */
-#ifndef _DT_BINDINGS_CLK_MT7622_H
-#define _DT_BINDINGS_CLK_MT7622_H
-
-/* TOPCKGEN */
-
-/* FIXED_CLKS */
-#define CLK_TOP_TO_U2_PHY  0
-#define CLK_TOP_TO_U2_PHY_1P   1
-#define CLK_TOP_PCIE0_PIPE_EN  2
-#define CLK_TOP_PCIE1_PIPE_EN  3
-#define CLK_TOP_SSUSB_TX250M   4
-#define CLK_TOP_SSUSB_EQ_RX250M5
-#define CLK_TOP_SSUSB_CDR_REF  6
-#define CLK_TOP_SSUSB_CDR_FB   7
-#define CLK_TOP_SATA_ASIC  8
-#define CLK_TOP_SATA_RBC   9
-/* FIXED_DIVS */
-#define CLK_TOP_TO_USB3_SYS10
-#define CLK_TOP_P1_1MHZ11
-#define CLK_TOP_4MHZ   12
-#define CLK_TOP_P0_1MHZ13
-#define CLK_TOP_TXCLK_SRC_PRE  14
-#define CLK_TOP_RTC15
-#define CLK_TOP_MEMPLL 16
-#define CLK_TOP_DMPLL  17
-#define CLK_TOP_SYSPLL_D2  18
-#define CLK_TOP_SYSPLL1_D2 19
-#define CLK_TOP_SYSPLL1_D4 20
-#define CLK_TOP_SYSPLL1_D8 21
-#define CLK_TOP_SYSPLL2_D4 22
-#define CLK_TOP_SYSPLL2_D8 23
-#define CLK_TOP_SYSPLL_D5  24
-#define CLK_TOP_SYSPLL3_D2 25
-#define CLK_TOP_SYSPLL3_D4 26
-#define CLK_TOP_SYSPLL4_D2 27
-#define CLK_TOP_SYSPLL4_D4 28
-#define CLK_TOP_SYSPLL4_D1629
-#define CLK_TOP_UNIVPLL30
-#define CLK_TOP_UNIVPLL_D2 31
-#define CLK_TOP_UNIVPLL1_D232
-#define CLK_TOP_UNIVPLL1_D433
-#define CLK_TOP_UNIVPLL1_D834
-#define CLK_TOP_UNIVPLL1_D16   35
-#define CLK_TOP_UNIVPLL2_D236
-#define CLK_TOP_UNIVPLL2_D437
-#define CLK_TOP_UNIVPLL2_D838
-#define CLK_TOP_UNIVPLL2_D16   39
-#define CLK_TOP_UNIVPLL_D5 40
-#define CLK_TOP_UNIVPLL3_D241
-#define CLK_TOP_UNIVPLL3_D442
-#define CLK_TOP_UNIVPLL3_D16   43
-#define CLK_TOP_UNIVPLL_D7 44
-#define CLK_TOP_UNIVPLL_D80_D4 45
-#define CLK_TOP_UNIV48M46
-#define CLK_TOP_SGMIIPLL   47
-#define CLK_TOP_SGMIIPLL_D248
-#define CLK_TOP_AUD1PLL49
-#define CLK_TOP_AUD2PLL50
-#define CLK_TOP_AUD_I2S2_MCK   51
-#define CLK_TOP_TO_USB3_REF  

[PATCH RFC 20/26] microchip: drop dt-binding headers

[Caleb Connolly]

Drop in favour of dts/upstream

Signed-off-by: Caleb Connolly 
---
 include/dt-bindings/clock/at91.h | 23 
 include/dt-bindings/clock/microchip-mpfs-clock.h | 71 
 include/dt-bindings/dma/at91.h   | 52 -
 include/dt-bindings/mfd/at91-usart.h | 17 --
 include/dt-bindings/net/microchip-lan78xx.h  | 21 ---
 include/dt-bindings/pinctrl/at91.h   | 49 
 include/dt-bindings/sound/microchip,pdmc.h   | 13 -
 7 files changed, 246 deletions(-)

diff --git a/include/dt-bindings/clock/at91.h b/include/dt-bindings/clock/at91.h
deleted file mode 100644
index ab3ee241d10c..
--- a/include/dt-bindings/clock/at91.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * This header provides constants for AT91 pmc status.
- *
- * The constants defined in this header are being used in dts.
- *
- * Licensed under GPLv2 or later.
- */
-
-#ifndef _DT_BINDINGS_CLK_AT91_H
-#define _DT_BINDINGS_CLK_AT91_H
-
-#define AT91_PMC_MOSCS 0   /* MOSCS Flag */
-#define AT91_PMC_LOCKA 1   /* PLLA Lock */
-#define AT91_PMC_LOCKB 2   /* PLLB Lock */
-#define AT91_PMC_MCKRDY3   /* Master Clock */
-#define AT91_PMC_LOCKU 6   /* UPLL Lock */
-#define AT91_PMC_PCKRDY(id)(8 + (id))  /* Programmable Clock */
-#define AT91_PMC_MOSCSELS  16  /* Main Oscillator Selection */
-#define AT91_PMC_MOSCRCS   17  /* Main On-Chip RC */
-#define AT91_PMC_CFDEV 18  /* Clock Failure Detector Event 
*/
-#define AT91_PMC_GCKRDY24  /* Generated Clocks */
-
-#endif
diff --git a/include/dt-bindings/clock/microchip-mpfs-clock.h 
b/include/dt-bindings/clock/microchip-mpfs-clock.h
deleted file mode 100644
index 79775a5134ca..
--- a/include/dt-bindings/clock/microchip-mpfs-clock.h
+++ /dev/null
@@ -1,71 +0,0 @@
-/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
-/*
- * Daire McNamara,
- * Copyright (C) 2020-2022 Microchip Technology Inc.  All rights reserved.
- */
-
-#ifndef _DT_BINDINGS_CLK_MICROCHIP_MPFS_H_
-#define _DT_BINDINGS_CLK_MICROCHIP_MPFS_H_
-
-#define CLK_CPU0
-#define CLK_AXI1
-#define CLK_AHB2
-
-#define CLK_ENVM   3
-#define CLK_MAC0   4
-#define CLK_MAC1   5
-#define CLK_MMC6
-#define CLK_TIMER  7
-#define CLK_MMUART08
-#define CLK_MMUART19
-#define CLK_MMUART210
-#define CLK_MMUART311
-#define CLK_MMUART412
-#define CLK_SPI0   13
-#define CLK_SPI1   14
-#define CLK_I2C0   15
-#define CLK_I2C1   16
-#define CLK_CAN0   17
-#define CLK_CAN1   18
-#define CLK_USB19
-#define CLK_RESERVED   20
-#define CLK_RTC21
-#define CLK_QSPI   22
-#define CLK_GPIO0  23
-#define CLK_GPIO1  24
-#define CLK_GPIO2  25
-#define CLK_DDRC   26
-#define CLK_FIC0   27
-#define CLK_FIC1   28
-#define CLK_FIC2   29
-#define CLK_FIC3   30
-#define CLK_ATHENA 31
-#define CLK_CFM32
-
-#define CLK_RTCREF 33
-#define CLK_MSSPLL 34
-
-/* Clock Conditioning Circuitry Clock IDs */
-
-#define CLK_CCC_PLL0   0
-#define CLK_CCC_PLL1   1
-#define CLK_CCC_DLL0   2
-#define CLK_CCC_DLL1   3
-
-#define CLK_CCC_PLL0_OUT0  4
-#define CLK_CCC_PLL0_OUT1  5
-#define CLK_CCC_PLL0_OUT2  6
-#define CLK_CCC_PLL0_OUT3  7
-
-#define CLK_CCC_PLL1_OUT0  8
-#define CLK_CCC_PLL1_OUT1  9
-#define CLK_CCC_PLL1_OUT2  10
-#define CLK_CCC_PLL1_OUT3  11
-
-#define CLK_CCC_DLL0_OUT0  12
-#define CLK_CCC_DLL0_OUT1  13
-
-#define CLK_CCC_DLL1_OUT0  14
-#define CLK_CCC_DLL1_OUT1  15
-
-#endif /* _DT_BINDINGS_CLK_MICROCHIP_MPFS_H_ */
diff --git a/include/dt-bindings/dma/at91.h b/include/dt-bindings/dma/at91.h
deleted file mode 100644
index ab6cbba45401..
--- a/include/dt-bindings/dma/at91.h
+++ /dev/null
@@ -1,52 +0,0 @@
-/*
- * This header provides macros for at91 dma bindings.
- *
- * Copyright (C) 2013 Ludovic Desroches 
- *
- * GPLv2 only
- */
-
-#ifndef __DT_BINDINGS_AT91_DMA_H__
-#define __DT_BINDINGS_AT91_DMA_H__
-
-/* -- HDMAC -- */
-
-/*
- * Source and/or destination peripheral ID
- */
-#define AT91_DMA_CFG_PER_ID_MASK   (0xff)
-#define AT91_DMA_CFG_PER_ID(id)(id & AT91_DMA_CFG_PER_ID_MASK)
-
-/*
- * FIFO configuration: it defines when a request is serviced.
- */
-#define AT91_DMA_CFG_FIFOCFG_OFFSET(8)
-#define AT91_DMA_CFG_FIFOCFG_MASK  (0xf << AT91_DMA_CFG_FIFOCFG_OFFSET)
-#define AT91_DMA_CFG_FIFOCFG_HALF  (0x0 << AT91_DMA_CFG_FIFOCFG_OFFSET)
/* half FIFO (default behavior) */
-#define AT91_DMA_CFG_FIFOCFG_ALAP  (0x1 << AT91_DMA_CFG_FIFOCFG_OFFSET)
/* largest defined AHB burst */
-#define 

[PATCH RFC 17/26] renesas: drop clock dt-binding headers

[Caleb Connolly]

Drop in favour of dts/upstream.

Signed-off-by: Caleb Connolly 
---
 include/dt-bindings/clock/r7s72100-clock.h| 112 -
 include/dt-bindings/clock/r8a774a1-cpg-mssr.h |  59 ---
 include/dt-bindings/clock/r8a774b1-cpg-mssr.h |  57 ---
 include/dt-bindings/clock/r8a774c0-cpg-mssr.h |  61 ---
 include/dt-bindings/clock/r8a774e1-cpg-mssr.h |  59 ---
 include/dt-bindings/clock/r8a7790-clock.h | 158 --
 include/dt-bindings/clock/r8a7790-cpg-mssr.h  |  48 --
 include/dt-bindings/clock/r8a7791-clock.h | 161 ---
 include/dt-bindings/clock/r8a7791-cpg-mssr.h  |  44 --
 include/dt-bindings/clock/r8a7792-clock.h |  98 
 include/dt-bindings/clock/r8a7792-cpg-mssr.h  |  39 -
 include/dt-bindings/clock/r8a7793-clock.h | 159 ---
 include/dt-bindings/clock/r8a7793-cpg-mssr.h  |  44 --
 include/dt-bindings/clock/r8a7794-clock.h | 137 
 include/dt-bindings/clock/r8a7794-cpg-mssr.h  |  43 -
 include/dt-bindings/clock/r8a7795-cpg-mssr.h  |  66 
 include/dt-bindings/clock/r8a7796-cpg-mssr.h  |  65 
 include/dt-bindings/clock/r8a77961-cpg-mssr.h |  65 
 include/dt-bindings/clock/r8a77965-cpg-mssr.h |  62 
 include/dt-bindings/clock/r8a77970-cpg-mssr.h |  44 --
 include/dt-bindings/clock/r8a77980-cpg-mssr.h |  51 --
 include/dt-bindings/clock/r8a77990-cpg-mssr.h |  62 
 include/dt-bindings/clock/r8a77995-cpg-mssr.h |  54 ---
 include/dt-bindings/clock/r8a779a0-cpg-mssr.h |  55 ---
 include/dt-bindings/clock/r8a779f0-cpg-mssr.h |  64 
 include/dt-bindings/clock/r8a779g0-cpg-mssr.h |  90 ---
 include/dt-bindings/clock/r9a06g032-sysctrl.h | 149 -
 include/dt-bindings/clock/r9a07g044-cpg.h | 220 --
 include/dt-bindings/clock/renesas-cpg-mssr.h  |  15 --
 29 files changed, 2341 deletions(-)

diff --git a/include/dt-bindings/clock/r7s72100-clock.h 
b/include/dt-bindings/clock/r7s72100-clock.h
deleted file mode 100644
index a267ac250143..
--- a/include/dt-bindings/clock/r7s72100-clock.h
+++ /dev/null
@@ -1,112 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0
- *
- * Copyright (C) 2014 Renesas Solutions Corp.
- * Copyright (C) 2014 Wolfram Sang, Sang Engineering 

- */
-
-#ifndef __DT_BINDINGS_CLOCK_R7S72100_H__
-#define __DT_BINDINGS_CLOCK_R7S72100_H__
-
-#define R7S72100_CLK_PLL   0
-#define R7S72100_CLK_I 1
-#define R7S72100_CLK_G 2
-
-/* MSTP2 */
-#define R7S72100_CLK_CORESIGHT 0
-
-/* MSTP3 */
-#define R7S72100_CLK_IEBUS 7
-#define R7S72100_CLK_IRDA  6
-#define R7S72100_CLK_LIN0  5
-#define R7S72100_CLK_LIN1  4
-#define R7S72100_CLK_MTU2  3
-#define R7S72100_CLK_CAN   2
-#define R7S72100_CLK_ADCPWR1
-#define R7S72100_CLK_PWM   0
-
-/* MSTP4 */
-#define R7S72100_CLK_SCIF0 7
-#define R7S72100_CLK_SCIF1 6
-#define R7S72100_CLK_SCIF2 5
-#define R7S72100_CLK_SCIF3 4
-#define R7S72100_CLK_SCIF4 3
-#define R7S72100_CLK_SCIF5 2
-#define R7S72100_CLK_SCIF6 1
-#define R7S72100_CLK_SCIF7 0
-
-/* MSTP5 */
-#define R7S72100_CLK_SCI0  7
-#define R7S72100_CLK_SCI1  6
-#define R7S72100_CLK_SG0   5
-#define R7S72100_CLK_SG1   4
-#define R7S72100_CLK_SG2   3
-#define R7S72100_CLK_SG3   2
-#define R7S72100_CLK_OSTM0 1
-#define R7S72100_CLK_OSTM1 0
-
-/* MSTP6 */
-#define R7S72100_CLK_ADC   7
-#define R7S72100_CLK_CEU   6
-#define R7S72100_CLK_DOC0  5
-#define R7S72100_CLK_DOC1  4
-#define R7S72100_CLK_DRC0  3
-#define R7S72100_CLK_DRC1  2
-#define R7S72100_CLK_JCU   1
-#define R7S72100_CLK_RTC   0
-
-/* MSTP7 */
-#define R7S72100_CLK_VDEC0 7
-#define R7S72100_CLK_VDEC1 6
-#define R7S72100_CLK_ETHER 4
-#define R7S72100_CLK_NAND  3
-#define R7S72100_CLK_USB0  1
-#define R7S72100_CLK_USB1  0
-
-/* MSTP8 */
-#define R7S72100_CLK_IMR0  7
-#define R7S72100_CLK_IMR1  6
-#define R7S72100_CLK_IMRDISP   5
-#define R7S72100_CLK_MMCIF 4
-#define R7S72100_CLK_MLB   3
-#define R7S72100_CLK_ETHAVB2
-#define R7S72100_CLK_SCUX  1
-
-/* MSTP9 */
-#define R7S72100_CLK_I2C0  7
-#define R7S72100_CLK_I2C1  6
-#define R7S72100_CLK_I2C2  5
-#define R7S72100_CLK_I2C3  4
-#define R7S72100_CLK_SPIBSC0   3
-#define R7S72100_CLK_SPIBSC1   2
-#define R7S72100_CLK_VDC50 1   /* and LVDS */
-#define R7S72100_CLK_VDC51 0
-
-/* MSTP10 */
-#define R7S72100_CLK_SPI0  7
-#define R7S72100_CLK_SPI1  6
-#define R7S72100_CLK_SPI2  5
-#define R7S72100_CLK_SPI3  4
-#define R7S72100_CLK_SPI4  3
-#define R7S72100_CLK_CDROM 2
-#define R7S72100_CLK_SPDIF 1
-#define R7S72100_CLK_RGPVG20
-
-/* MSTP11 */
-#define R7S72100_CLK_SSI0  5
-#define R7S72100_CLK_SSI1  4
-#define R7S72100_CLK_SSI2  3
-#define R7S72100_CLK_SSI3  2
-#define R7S72100_CLK_SSI4  1
-#define 

[PATCH RFC 18/26] renesas: drop remaining dt-binding headers

[Caleb Connolly]

Drop in favour of dts/upstream.

Signed-off-by: Caleb Connolly 
---
 include/dt-bindings/pinctrl/r7s72100-pinctrl.h |  18 
 include/dt-bindings/pinctrl/rzg2l-pinctrl.h|  23 
 include/dt-bindings/pinctrl/rzn1-pinctrl.h | 141 -
 include/dt-bindings/power/r8a774a1-sysc.h  |  31 --
 include/dt-bindings/power/r8a774b1-sysc.h  |  26 -
 include/dt-bindings/power/r8a774c0-sysc.h  |  25 -
 include/dt-bindings/power/r8a774e1-sysc.h  |  36 ---
 include/dt-bindings/power/r8a7790-sysc.h   |  31 --
 include/dt-bindings/power/r8a7791-sysc.h   |  23 
 include/dt-bindings/power/r8a7792-sysc.h   |  23 
 include/dt-bindings/power/r8a7793-sysc.h   |  25 -
 include/dt-bindings/power/r8a7794-sysc.h   |  23 
 include/dt-bindings/power/r8a7795-sysc.h   |  38 ---
 include/dt-bindings/power/r8a7796-sysc.h   |  33 --
 include/dt-bindings/power/r8a77961-sysc.h  |  32 --
 include/dt-bindings/power/r8a77965-sysc.h  |  29 -
 include/dt-bindings/power/r8a77970-sysc.h  |  28 -
 include/dt-bindings/power/r8a77980-sysc.h  |  43 
 include/dt-bindings/power/r8a77990-sysc.h  |  26 -
 include/dt-bindings/power/r8a77995-sysc.h  |  20 
 include/dt-bindings/power/r8a779a0-sysc.h  |  59 ---
 include/dt-bindings/power/r8a779f0-sysc.h  |  30 --
 include/dt-bindings/power/r8a779g0-sysc.h  |  46 
 23 files changed, 809 deletions(-)

diff --git a/include/dt-bindings/pinctrl/r7s72100-pinctrl.h 
b/include/dt-bindings/pinctrl/r7s72100-pinctrl.h
deleted file mode 100644
index 31ee37610eb2..
--- a/include/dt-bindings/pinctrl/r7s72100-pinctrl.h
+++ /dev/null
@@ -1,18 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * Defines macros and constants for Renesas RZ/A1 pin controller pin
- * muxing functions.
- */
-#ifndef __DT_BINDINGS_PINCTRL_RENESAS_RZA1_H
-#define __DT_BINDINGS_PINCTRL_RENESAS_RZA1_H
-
-#define RZA1_PINS_PER_PORT 16
-
-/*
- * Create the pin index from its bank and position numbers and store in
- * the upper 16 bits the alternate function identifier
- */
-#define RZA1_PINMUX(b, p, f)   \
-   ((b) * RZA1_PINS_PER_PORT + (p) | ((f) << 16))
-
-#endif /* __DT_BINDINGS_PINCTRL_RENESAS_RZA1_H */
diff --git a/include/dt-bindings/pinctrl/rzg2l-pinctrl.h 
b/include/dt-bindings/pinctrl/rzg2l-pinctrl.h
deleted file mode 100644
index c78ed5e5efb7..
--- a/include/dt-bindings/pinctrl/rzg2l-pinctrl.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
-/*
- * This header provides constants for Renesas RZ/G2L family pinctrl bindings.
- *
- * Copyright (C) 2021 Renesas Electronics Corp.
- *
- */
-
-#ifndef __DT_BINDINGS_RZG2L_PINCTRL_H
-#define __DT_BINDINGS_RZG2L_PINCTRL_H
-
-#define RZG2L_PINS_PER_PORT8
-
-/*
- * Create the pin index from its bank and position numbers and store in
- * the upper 16 bits the alternate function identifier
- */
-#define RZG2L_PORT_PINMUX(b, p, f) ((b) * RZG2L_PINS_PER_PORT + (p) | ((f) 
<< 16))
-
-/* Convert a port and pin label to its global pin index */
-#define RZG2L_GPIO(port, pin)  ((port) * RZG2L_PINS_PER_PORT + (pin))
-
-#endif /* __DT_BINDINGS_RZG2L_PINCTRL_H */
diff --git a/include/dt-bindings/pinctrl/rzn1-pinctrl.h 
b/include/dt-bindings/pinctrl/rzn1-pinctrl.h
deleted file mode 100644
index 21d6cc4d59f5..
--- a/include/dt-bindings/pinctrl/rzn1-pinctrl.h
+++ /dev/null
@@ -1,141 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * Defines macros and constants for Renesas RZ/N1 pin controller pin
- * muxing functions.
- */
-#ifndef __DT_BINDINGS_RZN1_PINCTRL_H
-#define __DT_BINDINGS_RZN1_PINCTRL_H
-
-#define RZN1_PINMUX(_gpio, _func) \
-   (((_func) << 8) | (_gpio))
-
-/*
- * Given the different levels of muxing on the SoC, it was decided to
- * 'linearize' them into one numerical space. So mux level 1, 2 and the MDIO
- * muxes are all represented by one single value.
- *
- * You can derive the hardware value pretty easily too, as
- * 0...9   are Level 1
- * 10...71 are Level 2. The Level 2 mux will be set to this
- * value - RZN1_FUNC_L2_OFFSET, and the Level 1 mux will be
- * set accordingly.
- * 72...103 are for the 2 MDIO muxes.
- */
-#define RZN1_FUNC_HIGHZ0
-#define RZN1_FUNC_0L   1
-#define RZN1_FUNC_CLK_ETH_MII_RGMII_RMII   2
-#define RZN1_FUNC_CLK_ETH_NAND 3
-#define RZN1_FUNC_QSPI 4
-#define RZN1_FUNC_SDIO 5
-#define RZN1_FUNC_LCD  6
-#define RZN1_FUNC_LCD_E7
-#define RZN1_FUNC_MSEBIM   8
-#define RZN1_FUNC_MSEBIS   9
-#define RZN1_FUNC_L2_OFFSET10  /* I'm Special */
-
-#define RZN1_FUNC_HIGHZ1   (RZN1_FUNC_L2_OFFSET + 0)

[PATCH RFC 16/26] xlnx: drop dt-binding headers

[Caleb Connolly]

Drop in favour of dts/upstream

Signed-off-by: Caleb Connolly 
---
 include/dt-bindings/clock/xlnx-versal-clk.h| 123 ---
 include/dt-bindings/clock/xlnx-zynqmp-clk.h| 126 
 include/dt-bindings/dma/xlnx-zynqmp-dpdma.h|  16 ---
 include/dt-bindings/pinctrl/pinctrl-zynqmp.h   |  19 
 include/dt-bindings/power/xlnx-zynqmp-power.h  |  50 --
 include/dt-bindings/reset/xlnx-versal-resets.h | 105 
 include/dt-bindings/reset/xlnx-zynqmp-resets.h | 130 -
 7 files changed, 569 deletions(-)

diff --git a/include/dt-bindings/clock/xlnx-versal-clk.h 
b/include/dt-bindings/clock/xlnx-versal-clk.h
deleted file mode 100644
index 264d634d226e..
--- a/include/dt-bindings/clock/xlnx-versal-clk.h
+++ /dev/null
@@ -1,123 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- *  Copyright (C) 2019 Xilinx Inc.
- *
- */
-
-#ifndef _DT_BINDINGS_CLK_VERSAL_H
-#define _DT_BINDINGS_CLK_VERSAL_H
-
-#define PMC_PLL1
-#define APU_PLL2
-#define RPU_PLL3
-#define CPM_PLL4
-#define NOC_PLL5
-#define PLL_MAX6
-#define PMC_PRESRC 7
-#define PMC_POSTCLK8
-#define PMC_PLL_OUT9
-#define PPLL   10
-#define NOC_PRESRC 11
-#define NOC_POSTCLK12
-#define NOC_PLL_OUT13
-#define NPLL   14
-#define APU_PRESRC 15
-#define APU_POSTCLK16
-#define APU_PLL_OUT17
-#define APLL   18
-#define RPU_PRESRC 19
-#define RPU_POSTCLK20
-#define RPU_PLL_OUT21
-#define RPLL   22
-#define CPM_PRESRC 23
-#define CPM_POSTCLK24
-#define CPM_PLL_OUT25
-#define CPLL   26
-#define PPLL_TO_XPD27
-#define NPLL_TO_XPD28
-#define APLL_TO_XPD29
-#define RPLL_TO_XPD30
-#define EFUSE_REF  31
-#define SYSMON_REF 32
-#define IRO_SUSPEND_REF33
-#define USB_SUSPEND34
-#define SWITCH_TIMEOUT 35
-#define RCLK_PMC   36
-#define RCLK_LPD   37
-#define WDT38
-#define TTC0   39
-#define TTC1   40
-#define TTC2   41
-#define TTC3   42
-#define GEM_TSU43
-#define GEM_TSU_LB 44
-#define MUXED_IRO_DIV2 45
-#define MUXED_IRO_DIV4 46
-#define PSM_REF47
-#define GEM0_RX48
-#define GEM0_TX49
-#define GEM1_RX50
-#define GEM1_TX51
-#define CPM_CORE_REF   52
-#define CPM_LSBUS_REF  53
-#define CPM_DBG_REF54
-#define CPM_AUX0_REF   55
-#define CPM_AUX1_REF   56
-#define QSPI_REF   57
-#define OSPI_REF   58
-#define SDIO0_REF  59
-#define SDIO1_REF  60
-#define PMC_LSBUS_REF  61
-#define I2C_REF62
-#define TEST_PATTERN_REF   63
-#define DFT_OSC_REF64
-#define PMC_PL0_REF65
-#define PMC_PL1_REF66
-#define PMC_PL2_REF67
-#define PMC_PL3_REF68
-#define CFU_REF69
-#define SPARE_REF  70
-#define NPI_REF71
-#define HSM0_REF   72
-#define HSM1_REF   73
-#define SD_DLL_REF 74
-#define FPD_TOP_SWITCH 75
-#define FPD_LSBUS  76

[PATCH RFC 14/26] tegra: drop clock dt-binding headers

[Caleb Connolly]

Drop in favour of dts/upstream.

Signed-off-by: Caleb Connolly 
---
 include/dt-bindings/clock/tegra114-car.h| 343 -
 include/dt-bindings/clock/tegra124-car-common.h | 345 -
 include/dt-bindings/clock/tegra124-car.h|  19 -
 include/dt-bindings/clock/tegra186-clock.h  | 940 
 include/dt-bindings/clock/tegra20-car.h | 158 
 include/dt-bindings/clock/tegra210-car.h| 401 --
 include/dt-bindings/clock/tegra30-car.h | 273 ---
 7 files changed, 2479 deletions(-)

diff --git a/include/dt-bindings/clock/tegra114-car.h 
b/include/dt-bindings/clock/tegra114-car.h
deleted file mode 100644
index 534c03f8ad72..
--- a/include/dt-bindings/clock/tegra114-car.h
+++ /dev/null
@@ -1,343 +0,0 @@
-/*
- * This header provides constants for binding nvidia,tegra114-car.
- *
- * The first 160 clocks are numbered to match the bits in the CAR's CLK_OUT_ENB
- * registers. These IDs often match those in the CAR's RST_DEVICES registers,
- * but not in all cases. Some bits in CLK_OUT_ENB affect multiple clocks. In
- * this case, those clocks are assigned IDs above 160 in order to highlight
- * this issue. Implementations that interpret these clock IDs as bit values
- * within the CLK_OUT_ENB or RST_DEVICES registers should be careful to
- * explicitly handle these special cases.
- *
- * The balance of the clocks controlled by the CAR are assigned IDs of 160 and
- * above.
- */
-
-#ifndef _DT_BINDINGS_CLOCK_TEGRA114_CAR_H
-#define _DT_BINDINGS_CLOCK_TEGRA114_CAR_H
-
-/* 0 */
-/* 1 */
-/* 2 */
-/* 3 */
-#define TEGRA114_CLK_RTC 4
-#define TEGRA114_CLK_TIMER 5
-#define TEGRA114_CLK_UARTA 6
-/* 7 (register bit affects uartb and vfir) */
-/* 8 */
-#define TEGRA114_CLK_SDMMC2 9
-/* 10 (register bit affects spdif_in and spdif_out) */
-#define TEGRA114_CLK_I2S1 11
-#define TEGRA114_CLK_I2C1 12
-#define TEGRA114_CLK_NDFLASH 13
-#define TEGRA114_CLK_SDMMC1 14
-#define TEGRA114_CLK_SDMMC4 15
-/* 16 */
-#define TEGRA114_CLK_PWM 17
-#define TEGRA114_CLK_I2S2 18
-#define TEGRA114_CLK_EPP 19
-/* 20 (register bit affects vi and vi_sensor) */
-#define TEGRA114_CLK_GR2D 21
-#define TEGRA114_CLK_USBD 22
-#define TEGRA114_CLK_ISP 23
-#define TEGRA114_CLK_GR3D 24
-/* 25 */
-#define TEGRA114_CLK_DISP2 26
-#define TEGRA114_CLK_DISP1 27
-#define TEGRA114_CLK_HOST1X 28
-#define TEGRA114_CLK_VCP 29
-#define TEGRA114_CLK_I2S0 30
-/* 31 */
-
-#define TEGRA114_CLK_MC 32
-/* 33 */
-#define TEGRA114_CLK_APBDMA 34
-/* 35 */
-#define TEGRA114_CLK_KBC 36
-/* 37 */
-/* 38 */
-/* 39 (register bit affects fuse and fuse_burn) */
-#define TEGRA114_CLK_KFUSE 40
-#define TEGRA114_CLK_SBC1 41
-#define TEGRA114_CLK_NOR 42
-/* 43 */
-#define TEGRA114_CLK_SBC2 44
-/* 45 */
-#define TEGRA114_CLK_SBC3 46
-#define TEGRA114_CLK_I2C5 47
-#define TEGRA114_CLK_DSIA 48
-/* 49 */
-#define TEGRA114_CLK_MIPI 50
-#define TEGRA114_CLK_HDMI 51
-#define TEGRA114_CLK_CSI 52
-/* 53 */
-#define TEGRA114_CLK_I2C2 54
-#define TEGRA114_CLK_UARTC 55
-#define TEGRA114_CLK_MIPI_CAL 56
-#define TEGRA114_CLK_EMC 57
-#define TEGRA114_CLK_USB2 58
-#define TEGRA114_CLK_USB3 59
-/* 60 */
-#define TEGRA114_CLK_VDE 61
-#define TEGRA114_CLK_BSEA 62
-#define TEGRA114_CLK_BSEV 63
-
-/* 64 */
-#define TEGRA114_CLK_UARTD 65
-/* 66 */
-#define TEGRA114_CLK_I2C3 67
-#define TEGRA114_CLK_SBC4 68
-#define TEGRA114_CLK_SDMMC3 69
-/* 70 */
-#define TEGRA114_CLK_OWR 71
-/* 72 */
-#define TEGRA114_CLK_CSITE 73
-/* 74 */
-/* 75 */
-#define TEGRA114_CLK_LA 76
-#define TEGRA114_CLK_TRACE 77
-#define TEGRA114_CLK_SOC_THERM 78
-#define TEGRA114_CLK_DTV 79
-#define TEGRA114_CLK_NDSPEED 80
-#define TEGRA114_CLK_I2CSLOW 81
-#define TEGRA114_CLK_DSIB 82
-#define TEGRA114_CLK_TSEC 83
-/* 84 */
-/* 85 */
-/* 86 */
-/* 87 */
-/* 88 */
-#define TEGRA114_CLK_XUSB_HOST 89
-/* 90 */
-#define TEGRA114_CLK_MSENC 91
-#define TEGRA114_CLK_CSUS 92
-/* 93 */
-/* 94 */
-/* 95 (bit affects xusb_dev and xusb_dev_src) */
-
-/* 96 */
-/* 97 */
-/* 98 */
-#define TEGRA114_CLK_MSELECT 99
-#define TEGRA114_CLK_TSENSOR 100
-#define TEGRA114_CLK_I2S3 101
-#define TEGRA114_CLK_I2S4 102
-#define TEGRA114_CLK_I2C4 103
-#define TEGRA114_CLK_SBC5 104
-#define TEGRA114_CLK_SBC6 105
-#define TEGRA114_CLK_D_AUDIO 106
-#define TEGRA114_CLK_APBIF 107
-#define TEGRA114_CLK_DAM0 108
-#define TEGRA114_CLK_DAM1 109
-#define TEGRA114_CLK_DAM2 110
-#define TEGRA114_CLK_HDA2CODEC_2X 111
-/* 112 */
-#define TEGRA114_CLK_AUDIO0_2X 113
-#define TEGRA114_CLK_AUDIO1_2X 114
-#define TEGRA114_CLK_AUDIO2_2X 115
-#define TEGRA114_CLK_AUDIO3_2X 116
-#define TEGRA114_CLK_AUDIO4_2X 117
-#define TEGRA114_CLK_SPDIF_2X 118
-#define TEGRA114_CLK_ACTMON 119
-#define TEGRA114_CLK_EXTERN1 120
-#define TEGRA114_CLK_EXTERN2 121
-#define TEGRA114_CLK_EXTERN3 122
-/* 123 */
-/* 124 */
-#define TEGRA114_CLK_HDA 125
-/* 126 */
-#define TEGRA114_CLK_SE 127
-
-#define TEGRA114_CLK_HDA2HDMI 128
-/* 129 */
-/* 130 */
-/* 131 */
-/* 132 */
-/* 133 */
-/* 134 */
-/* 135 */
-/* 136 */
-/* 137 

[PATCH RFC 15/26] tegra: drop dt-binding headers

[Caleb Connolly]

Drop in favour of dts/upstream.

Small driver adjustment to fix compatibility.

Signed-off-by: Caleb Connolly 
---
 arch/arm/dts/tegra186.dtsi   |   2 +-
 drivers/mailbox/tegra-hsp.c  |   2 +-
 include/dt-bindings/gpio/tegra-gpio.h|  51 --
 include/dt-bindings/mailbox/tegra186-hsp.h   |  19 ---
 include/dt-bindings/memory/tegra114-mc.h |  25 ---
 include/dt-bindings/memory/tegra124-mc.h |  31 
 include/dt-bindings/memory/tegra210-mc.h |  36 
 include/dt-bindings/memory/tegra30-mc.h  |  24 ---
 include/dt-bindings/pinctrl/pinctrl-tegra-xusb.h |   7 -
 include/dt-bindings/pinctrl/pinctrl-tegra.h  |  37 
 include/dt-bindings/power/tegra186-powergate.h   |  28 
 include/dt-bindings/reset/tegra124-car.h |  12 --
 include/dt-bindings/reset/tegra186-reset.h   | 205 ---
 include/dt-bindings/thermal/tegra124-soctherm.h  |  14 --
 14 files changed, 2 insertions(+), 491 deletions(-)

diff --git a/arch/arm/dts/tegra186.dtsi b/arch/arm/dts/tegra186.dtsi
index edcb7aacb8ee..58dadc944888 100644
--- a/arch/arm/dts/tegra186.dtsi
+++ b/arch/arm/dts/tegra186.dtsi
@@ -313,9 +313,9 @@
};
 
bpmp: bpmp {
compatible = "nvidia,tegra186-bpmp";
-   mboxes = < HSP_MBOX_TYPE_DB HSP_DB_MASTER_BPMP>;
+   mboxes = < TEGRA_HSP_MBOX_TYPE_DB TEGRA_HSP_DB_MASTER_BPMP>;
/*
 * In theory, these references, and the configuration in the
 * node these reference point at, are board-specific, since
 * they depend on the BCT's memory carve-out setup, the
diff --git a/drivers/mailbox/tegra-hsp.c b/drivers/mailbox/tegra-hsp.c
index 08c51c40f141..e5a3d8243780 100644
--- a/drivers/mailbox/tegra-hsp.c
+++ b/drivers/mailbox/tegra-hsp.c
@@ -62,9 +62,9 @@ static void tegra_hsp_writel(struct tegra_hsp *thsp, uint32_t 
val,
 
 static int tegra_hsp_db_id(ulong chan_id)
 {
switch (chan_id) {
-   case (HSP_MBOX_TYPE_DB << 16) | HSP_DB_MASTER_BPMP:
+   case (TEGRA_HSP_MBOX_TYPE_DB << 16) | TEGRA_HSP_DB_MASTER_BPMP:
return TEGRA_HSP_DB_ID_BPMP;
default:
debug("Invalid channel ID\n");
return -EINVAL;
diff --git a/include/dt-bindings/gpio/tegra-gpio.h 
b/include/dt-bindings/gpio/tegra-gpio.h
deleted file mode 100644
index a1c09e88e80b..
--- a/include/dt-bindings/gpio/tegra-gpio.h
+++ /dev/null
@@ -1,51 +0,0 @@
-/*
- * This header provides constants for binding nvidia,tegra*-gpio.
- *
- * The first cell in Tegra's GPIO specifier is the GPIO ID. The macros below
- * provide names for this.
- *
- * The second cell contains standard flag values specified in gpio.h.
- */
-
-#ifndef _DT_BINDINGS_GPIO_TEGRA_GPIO_H
-#define _DT_BINDINGS_GPIO_TEGRA_GPIO_H
-
-#include 
-
-#define TEGRA_GPIO_PORT_A 0
-#define TEGRA_GPIO_PORT_B 1
-#define TEGRA_GPIO_PORT_C 2
-#define TEGRA_GPIO_PORT_D 3
-#define TEGRA_GPIO_PORT_E 4
-#define TEGRA_GPIO_PORT_F 5
-#define TEGRA_GPIO_PORT_G 6
-#define TEGRA_GPIO_PORT_H 7
-#define TEGRA_GPIO_PORT_I 8
-#define TEGRA_GPIO_PORT_J 9
-#define TEGRA_GPIO_PORT_K 10
-#define TEGRA_GPIO_PORT_L 11
-#define TEGRA_GPIO_PORT_M 12
-#define TEGRA_GPIO_PORT_N 13
-#define TEGRA_GPIO_PORT_O 14
-#define TEGRA_GPIO_PORT_P 15
-#define TEGRA_GPIO_PORT_Q 16
-#define TEGRA_GPIO_PORT_R 17
-#define TEGRA_GPIO_PORT_S 18
-#define TEGRA_GPIO_PORT_T 19
-#define TEGRA_GPIO_PORT_U 20
-#define TEGRA_GPIO_PORT_V 21
-#define TEGRA_GPIO_PORT_W 22
-#define TEGRA_GPIO_PORT_X 23
-#define TEGRA_GPIO_PORT_Y 24
-#define TEGRA_GPIO_PORT_Z 25
-#define TEGRA_GPIO_PORT_AA 26
-#define TEGRA_GPIO_PORT_BB 27
-#define TEGRA_GPIO_PORT_CC 28
-#define TEGRA_GPIO_PORT_DD 29
-#define TEGRA_GPIO_PORT_EE 30
-#define TEGRA_GPIO_PORT_FF 31
-
-#define TEGRA_GPIO(port, offset) \
-   ((TEGRA_GPIO_PORT_##port * 8) + offset)
-
-#endif
diff --git a/include/dt-bindings/mailbox/tegra186-hsp.h 
b/include/dt-bindings/mailbox/tegra186-hsp.h
deleted file mode 100644
index b4864325d74b..
--- a/include/dt-bindings/mailbox/tegra186-hsp.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- * This header provides constants for binding nvidia,tegra186-hsp.
- *
- * The number with HSP_DB_MASTER prefix indicates the bit that is
- * associated with a master ID in the doorbell registers.
- */
-
-#ifndef _DT_BINDINGS_MAILBOX_TEGRA186_HSP_H
-#define _DT_BINDINGS_MAILBOX_TEGRA186_HSP_H
-
-#define HSP_MBOX_TYPE_DB 0x0
-#define HSP_MBOX_TYPE_SM 0x1
-#define HSP_MBOX_TYPE_SS 0x2
-#define HSP_MBOX_TYPE_AS 0x3
-
-#define HSP_DB_MASTER_CCPLEX 17
-#define HSP_DB_MASTER_BPMP 19
-
-#endif
diff --git a/include/dt-bindings/memory/tegra114-mc.h 
b/include/dt-bindings/memory/tegra114-mc.h
deleted file mode 100644
index 8f48985a3139..
--- a/include/dt-bindings/memory/tegra114-mc.h
+++ /dev/null
@@ -1,25 +0,0 @@
-#ifndef DT_BINDINGS_MEMORY_TEGRA114_MC_H
-#define 

[PATCH RFC 13/26] ti: drop dt-binding headers

[Caleb Connolly]

Drop in favour of dts/upstream

Signed-off-by: Caleb Connolly 
---
 drivers/net/phy/dp83869.c  |   2 +
 include/dt-bindings/bus/ti-sysc.h  |  28 
 include/dt-bindings/clk/ti-dra7-atl.h  |  40 -
 include/dt-bindings/clock/am3.h| 227 -
 include/dt-bindings/clock/omap4.h  | 149 ---
 include/dt-bindings/clock/omap5.h  | 129 
 include/dt-bindings/media/omap3-isp.h  |  22 ---
 include/dt-bindings/mux/ti-serdes.h| 190 
 include/dt-bindings/net/ti-dp83867.h   |  53 ---
 include/dt-bindings/net/ti-dp83869.h   |  60 
 include/dt-bindings/phy/phy-ti.h   |  21 ---
 include/dt-bindings/pinctrl/am33xx.h   | 172 --
 include/dt-bindings/pinctrl/am43xx.h   |  39 -
 include/dt-bindings/pinctrl/omap.h |  91 
 include/dt-bindings/reset/ti-syscon.h  |  38 -
 include/dt-bindings/soc/ti,sci_pm_domain.h |   9 --
 16 files changed, 2 insertions(+), 1268 deletions(-)

diff --git a/drivers/net/phy/dp83869.c b/drivers/net/phy/dp83869.c
index f9d4782580e9..fa6be1f3ecde 100644
--- a/drivers/net/phy/dp83869.c
+++ b/drivers/net/phy/dp83869.c
@@ -105,8 +105,10 @@
 #define DP83869_IO_MUX_CFG_CLK_O_DISABLE   BIT(6)
 #define DP83869_IO_MUX_CFG_CLK_O_SEL_SHIFT 8
 #define DP83869_IO_MUX_CFG_CLK_O_SEL_MASK  \
GENMASK(0x1f, DP83869_IO_MUX_CFG_CLK_O_SEL_SHIFT)
+/* Special flag to indicate clock should be off */
+#define DP83869_CLK_O_SEL_OFF  0x
 
 /* CFG3 bits */
 #define DP83869_CFG3_PORT_MIRROR_ENBIT(0)
 
diff --git a/include/dt-bindings/bus/ti-sysc.h 
b/include/dt-bindings/bus/ti-sysc.h
deleted file mode 100644
index eae427454374..
--- a/include/dt-bindings/bus/ti-sysc.h
+++ /dev/null
@@ -1,28 +0,0 @@
-/* TI sysc interconnect target module defines */
-
-/* Generic sysc found on omap2 and later, also known as type1 */
-#define SYSC_OMAP2_CLOCKACTIVITY   (3 << 8)
-#define SYSC_OMAP2_EMUFREE (1 << 5)
-#define SYSC_OMAP2_ENAWAKEUP   (1 << 2)
-#define SYSC_OMAP2_SOFTRESET   (1 << 1)
-#define SYSC_OMAP2_AUTOIDLE(1 << 0)
-
-/* Generic sysc found on omap4 and later, also known as type2 */
-#define SYSC_OMAP4_DMADISABLE  (1 << 16)
-#define SYSC_OMAP4_FREEEMU (1 << 1)/* Also known as 
EMUFREE */
-#define SYSC_OMAP4_SOFTRESET   (1 << 0)
-
-/* SmartReflex sysc found on 36xx and later */
-#define SYSC_OMAP3_SR_ENAWAKEUP(1 << 26)
-
-#define SYSC_DRA7_MCAN_ENAWAKEUP   (1 << 4)
-
-/* PRUSS sysc found on AM33xx/AM43xx/AM57xx */
-#define SYSC_PRUSS_SUB_MWAIT   (1 << 5)
-#define SYSC_PRUSS_STANDBY_INIT(1 << 4)
-
-/* SYSCONFIG STANDBYMODE/MIDLEMODE/SIDLEMODE supported by hardware */
-#define SYSC_IDLE_FORCE0
-#define SYSC_IDLE_NO   1
-#define SYSC_IDLE_SMART2
-#define SYSC_IDLE_SMART_WKUP   3
diff --git a/include/dt-bindings/clk/ti-dra7-atl.h 
b/include/dt-bindings/clk/ti-dra7-atl.h
deleted file mode 100644
index 42dd4164f6f4..
--- a/include/dt-bindings/clk/ti-dra7-atl.h
+++ /dev/null
@@ -1,40 +0,0 @@
-/*
- * This header provides constants for DRA7 ATL (Audio Tracking Logic)
- *
- * The constants defined in this header are used in dts files
- *
- * Copyright (C) 2013 Texas Instruments, Inc.
- *
- * Peter Ujfalusi 
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed "as is" WITHOUT ANY WARRANTY of any
- * kind, whether express or implied; without even the implied warranty
- * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#ifndef _DT_BINDINGS_CLK_DRA7_ATL_H
-#define _DT_BINDINGS_CLK_DRA7_ATL_H
-
-#define DRA7_ATL_WS_MCASP1_FSR 0
-#define DRA7_ATL_WS_MCASP1_FSX 1
-#define DRA7_ATL_WS_MCASP2_FSR 2
-#define DRA7_ATL_WS_MCASP2_FSX 3
-#define DRA7_ATL_WS_MCASP3_FSX 4
-#define DRA7_ATL_WS_MCASP4_FSX 5
-#define DRA7_ATL_WS_MCASP5_FSX 6
-#define DRA7_ATL_WS_MCASP6_FSX 7
-#define DRA7_ATL_WS_MCASP7_FSX 8
-#define DRA7_ATL_WS_MCASP8_FSX 9
-#define DRA7_ATL_WS_MCASP8_AHCLKX  10
-#define DRA7_ATL_WS_XREF_CLK3  11
-#define DRA7_ATL_WS_XREF_CLK0  12
-#define DRA7_ATL_WS_XREF_CLK1  13
-#define DRA7_ATL_WS_XREF_CLK2  14
-#define DRA7_ATL_WS_OSC1_X115
-
-#endif
diff --git a/include/dt-bindings/clock/am3.h b/include/dt-bindings/clock/am3.h
deleted file mode 100644
index 86a8806e2140..
--- a/include/dt-bindings/clock/am3.h
+++ /dev/null
@@ -1,227 +0,0 @@
-/*
- * Copyright 

[PATCH RFC 12/26] bcm: drop dt-binding headers

[Caleb Connolly]

Drop in favour of dts/upstream

Signed-off-by: Caleb Connolly 
---
 include/dt-bindings/clock/bcm-nsp.h| 51 
 include/dt-bindings/clock/bcm2835-aux.h|  9 -
 include/dt-bindings/clock/bcm2835.h| 62 --
 include/dt-bindings/clock/bcm6318-clock.h  | 47 --
 include/dt-bindings/clock/bcm63268-clock.h | 51 
 include/dt-bindings/clock/bcm6328-clock.h  | 24 
 include/dt-bindings/clock/bcm6358-clock.h  | 23 ---
 include/dt-bindings/clock/bcm6362-clock.h  | 32 ---
 include/dt-bindings/clock/bcm6368-clock.h  | 30 ---
 include/dt-bindings/pinctrl/bcm2835.h  | 26 -
 include/dt-bindings/reset/bcm6318-reset.h  | 25 
 include/dt-bindings/reset/bcm63268-reset.h | 31 ---
 include/dt-bindings/reset/bcm6328-reset.h  | 23 ---
 include/dt-bindings/reset/bcm6358-reset.h  | 20 --
 include/dt-bindings/reset/bcm6362-reset.h  | 27 -
 include/dt-bindings/reset/bcm6368-reset.h  | 21 --
 include/dt-bindings/soc/bcm2835-pm.h   | 28 --
 17 files changed, 530 deletions(-)

diff --git a/include/dt-bindings/clock/bcm-nsp.h 
b/include/dt-bindings/clock/bcm-nsp.h
deleted file mode 100644
index ad5827cde782..
--- a/include/dt-bindings/clock/bcm-nsp.h
+++ /dev/null
@@ -1,51 +0,0 @@
-/*
- *  BSD LICENSE
- *
- *  Copyright(c) 2015 Broadcom Corporation.  All rights reserved.
- *
- *  Redistribution and use in source and binary forms, with or without
- *  modification, are permitted provided that the following conditions
- *  are met:
- *
- * * Redistributions of source code must retain the above copyright
- *   notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- *   notice, this list of conditions and the following disclaimer in
- *   the documentation and/or other materials provided with the
- *   distribution.
- * * Neither the name of Broadcom Corporation nor the names of its
- *   contributors may be used to endorse or promote products derived
- *   from this software without specific prior written permission.
- *
- *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#ifndef _CLOCK_BCM_NSP_H
-#define _CLOCK_BCM_NSP_H
-
-/* GENPLL clock channel ID */
-#define BCM_NSP_GENPLL 0
-#define BCM_NSP_GENPLL_PHY_CLK 1
-#define BCM_NSP_GENPLL_ENET_SW_CLK 2
-#define BCM_NSP_GENPLL_USB_PHY_REF_CLK 3
-#define BCM_NSP_GENPLL_IPROCFAST_CLK   4
-#define BCM_NSP_GENPLL_SATA1_CLK   5
-#define BCM_NSP_GENPLL_SATA2_CLK   6
-
-/* LCPLL0 clock channel ID */
-#define BCM_NSP_LCPLL0 0
-#define BCM_NSP_LCPLL0_PCIE_PHY_REF_CLK1
-#define BCM_NSP_LCPLL0_SDIO_CLK2
-#define BCM_NSP_LCPLL0_DDR_PHY_CLK 3
-
-#endif /* _CLOCK_BCM_NSP_H */
diff --git a/include/dt-bindings/clock/bcm2835-aux.h 
b/include/dt-bindings/clock/bcm2835-aux.h
deleted file mode 100644
index bb79de383a3b..
--- a/include/dt-bindings/clock/bcm2835-aux.h
+++ /dev/null
@@ -1,9 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * Copyright (C) 2015 Broadcom Corporation
- */
-
-#define BCM2835_AUX_CLOCK_UART 0
-#define BCM2835_AUX_CLOCK_SPI1 1
-#define BCM2835_AUX_CLOCK_SPI2 2
-#define BCM2835_AUX_CLOCK_COUNT3
diff --git a/include/dt-bindings/clock/bcm2835.h 
b/include/dt-bindings/clock/bcm2835.h
deleted file mode 100644
index b60c03430cf1..
--- a/include/dt-bindings/clock/bcm2835.h
+++ /dev/null
@@ -1,62 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * Copyright (C) 2015 Broadcom Corporation
- */
-
-#define BCM2835_PLLA   0
-#define BCM2835_PLLB   1
-#define BCM2835_PLLC   2
-#define BCM2835_PLLD   3
-#define BCM2835_PLLH   4
-
-#define BCM2835_PLLA_CORE  5
-#define BCM2835_PLLA_PER   6
-#define BCM2835_PLLB_ARM   7
-#define BCM2835_PLLC_CORE0 8
-#define BCM2835_PLLC_CORE1 9
-#define 

[PATCH RFC 10/26] rockchip: drop remaining dt-binding headers

[Caleb Connolly]

Drop in favour of dts/upstream.

Small driver adjustment to fix compatibility.

Signed-off-by: Caleb Connolly 
---
 drivers/pinctrl/rockchip/pinctrl-rk3568.c |  15 +
 include/dt-bindings/pinctrl/rockchip.h|  60 --
 include/dt-bindings/power/px30-power.h|  27 -
 include/dt-bindings/power/rk3066-power.h  |  22 -
 include/dt-bindings/power/rk3188-power.h  |  24 -
 include/dt-bindings/power/rk3228-power.h  |  21 -
 include/dt-bindings/power/rk3288-power.h  |  32 -
 include/dt-bindings/power/rk3328-power.h  |  19 -
 include/dt-bindings/power/rk3399-power.h  |  53 --
 include/dt-bindings/power/rk3568-power.h  |  32 -
 include/dt-bindings/power/rk3588-power.h  |  69 --
 include/dt-bindings/power/rockchip,rv1126-power.h |  35 -
 include/dt-bindings/reset/rockchip,rk3588-cru.h   | 754 --
 include/dt-bindings/soc/rockchip,boot-mode.h  |  16 -
 include/dt-bindings/soc/rockchip,vop2.h   |  18 -
 15 files changed, 15 insertions(+), 1182 deletions(-)

diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3568.c 
b/drivers/pinctrl/rockchip/pinctrl-rk3568.c
index 1d4391982605..35a69c2a1a28 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3568.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3568.c
@@ -11,8 +11,23 @@
 #include 
 
 #include "pinctrl-rockchip.h"
 
+#define RK_GPIO0   0
+#define RK_GPIO1   1
+#define RK_GPIO2   2
+#define RK_GPIO3   3
+#define RK_GPIO4   4
+#define RK_GPIO6   6
+
+#define RK_FUNC_GPIO   0
+#define RK_FUNC_1  1
+#define RK_FUNC_2  2
+#define RK_FUNC_3  3
+#define RK_FUNC_4  4
+#define RK_FUNC_5  5
+#define RK_FUNC_6  6
+
 static struct rockchip_mux_route_data rk3568_mux_route_data[] = {
MR_PMUGRF(RK_GPIO0, RK_PB7, RK_FUNC_1, 0x0110, RK_GENMASK_VAL(1, 0, 
0)), /* PWM0 IO mux selection M0 */
MR_PMUGRF(RK_GPIO0, RK_PC7, RK_FUNC_2, 0x0110, RK_GENMASK_VAL(1, 0, 
1)), /* PWM0 IO mux selection M1 */
MR_PMUGRF(RK_GPIO0, RK_PC0, RK_FUNC_1, 0x0110, RK_GENMASK_VAL(3, 2, 
0)), /* PWM1 IO mux selection M0 */
diff --git a/include/dt-bindings/pinctrl/rockchip.h 
b/include/dt-bindings/pinctrl/rockchip.h
deleted file mode 100644
index 1c28d6cb1fad..
--- a/include/dt-bindings/pinctrl/rockchip.h
+++ /dev/null
@@ -1,60 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Header providing constants for Rockchip pinctrl bindings.
- *
- * Copyright (c) 2013 MundoReader S.L.
- * Author: Heiko Stuebner 
- */
-
-#ifndef __DT_BINDINGS_ROCKCHIP_PINCTRL_H__
-#define __DT_BINDINGS_ROCKCHIP_PINCTRL_H__
-
-#define RK_GPIO0   0
-#define RK_GPIO1   1
-#define RK_GPIO2   2
-#define RK_GPIO3   3
-#define RK_GPIO4   4
-#define RK_GPIO6   6
-
-#define RK_PA0 0
-#define RK_PA1 1
-#define RK_PA2 2
-#define RK_PA3 3
-#define RK_PA4 4
-#define RK_PA5 5
-#define RK_PA6 6
-#define RK_PA7 7
-#define RK_PB0 8
-#define RK_PB1 9
-#define RK_PB2 10
-#define RK_PB3 11
-#define RK_PB4 12
-#define RK_PB5 13
-#define RK_PB6 14
-#define RK_PB7 15
-#define RK_PC0 16
-#define RK_PC1 17
-#define RK_PC2 18
-#define RK_PC3 19
-#define RK_PC4 20
-#define RK_PC5 21
-#define RK_PC6 22
-#define RK_PC7 23
-#define RK_PD0 24
-#define RK_PD1 25
-#define RK_PD2 26
-#define RK_PD3 27
-#define RK_PD4 28
-#define RK_PD5 29
-#define RK_PD6 30
-#define RK_PD7 31
-
-#define RK_FUNC_GPIO   0
-#define RK_FUNC_1  1
-#define RK_FUNC_2  2
-#define RK_FUNC_3  3
-#define RK_FUNC_4  4
-#define RK_FUNC_5  5
-#define RK_FUNC_6  6
-
-#endif
diff --git a/include/dt-bindings/power/px30-power.h 
b/include/dt-bindings/power/px30-power.h
deleted file mode 100644
index 30917a99ad20..
--- a/include/dt-bindings/power/px30-power.h
+++ /dev/null
@@ -1,27 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef __DT_BINDINGS_POWER_PX30_POWER_H__
-#define __DT_BINDINGS_POWER_PX30_POWER_H__
-
-/* VD_CORE */
-#define PX30_PD_A35_0  0
-#define PX30_PD_A35_1  1
-#define PX30_PD_A35_2  2
-#define PX30_PD_A35_3  3
-#define PX30_PD_SCU4
-
-/* VD_LOGIC */
-#define PX30_PD_USB5
-#define PX30_PD_DDR6
-#define PX30_PD_SDCARD 7
-#define PX30_PD_CRYPTO 8
-#define PX30_PD_GMAC   9
-#define PX30_PD_MMC_NAND   10
-#define PX30_PD_VPU11
-#define PX30_PD_VO 12
-#define PX30_PD_VI 13
-#define PX30_PD_GPU14
-
-/* VD_PMU */
-#define PX30_PD_PMU15
-
-#endif
diff --git a/include/dt-bindings/power/rk3066-power.h 
b/include/dt-bindings/power/rk3066-power.h
deleted file mode 100644
index acf9f310ac53..
--- 

[PATCH RFC 11/26] exynos: drop dt-binding headers

[Caleb Connolly]

Drop in favour of dts/upstream.

Small driver and DTS adjustments to use upstream headers.

Signed-off-by: Caleb Connolly 
---
 arch/arm/dts/exynos7420.dtsi |   2 +-
 drivers/clk/exynos/clk-exynos7420.c  |   2 +-
 include/dt-bindings/clock/exynos7420-clk.h   | 207 
 include/dt-bindings/clock/exynos850.h| 337 ---
 include/dt-bindings/soc/samsung,exynos-usi.h |  17 --
 5 files changed, 2 insertions(+), 563 deletions(-)

diff --git a/arch/arm/dts/exynos7420.dtsi b/arch/arm/dts/exynos7420.dtsi
index 373f48cf2eca..ba9666f3de01 100644
--- a/arch/arm/dts/exynos7420.dtsi
+++ b/arch/arm/dts/exynos7420.dtsi
@@ -7,9 +7,9 @@
  */
 
 /dts-v1/;
 #include "skeleton.dtsi"
-#include 
+#include 
 / {
compatible = "samsung,exynos7420";
 
fin_pll: xxti {
diff --git a/drivers/clk/exynos/clk-exynos7420.c 
b/drivers/clk/exynos/clk-exynos7420.c
index 9caa932e12fb..cd6d67a0752b 100644
--- a/drivers/clk/exynos/clk-exynos7420.c
+++ b/drivers/clk/exynos/clk-exynos7420.c
@@ -10,9 +10,9 @@
 #include 
 #include 
 #include 
 #include 
-#include 
+#include 
 
 #define PLL145X_MDIV_SHIFT 16
 #define PLL145X_MDIV_MASK  0x3ff
 #define PLL145X_PDIV_SHIFT 8
diff --git a/include/dt-bindings/clock/exynos7420-clk.h 
b/include/dt-bindings/clock/exynos7420-clk.h
deleted file mode 100644
index 10c558611085..
--- a/include/dt-bindings/clock/exynos7420-clk.h
+++ /dev/null
@@ -1,207 +0,0 @@
-/*
- * Copyright (c) 2014 Samsung Electronics Co., Ltd.
- * Author: Naveen Krishna Ch 
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#ifndef _DT_BINDINGS_CLOCK_EXYNOS7_H
-#define _DT_BINDINGS_CLOCK_EXYNOS7_H
-
-/* TOPC */
-#define DOUT_ACLK_PERIS1
-#define DOUT_SCLK_BUS0_PLL 2
-#define DOUT_SCLK_BUS1_PLL 3
-#define DOUT_SCLK_CC_PLL   4
-#define DOUT_SCLK_MFC_PLL  5
-#define DOUT_ACLK_CCORE_1336
-#define DOUT_ACLK_MSCL_532 7
-#define ACLK_MSCL_532  8
-#define DOUT_SCLK_AUD_PLL  9
-#define FOUT_AUD_PLL   10
-#define SCLK_AUD_PLL   11
-#define SCLK_MFC_PLL_B 12
-#define SCLK_MFC_PLL_A 13
-#define SCLK_BUS1_PLL_B14
-#define SCLK_BUS1_PLL_A15
-#define SCLK_BUS0_PLL_B16
-#define SCLK_BUS0_PLL_A17
-#define SCLK_CC_PLL_B  18
-#define SCLK_CC_PLL_A  19
-#define ACLK_CCORE_133 20
-#define ACLK_PERIS_66  21
-#define TOPC_NR_CLK22
-
-/* TOP0 */
-#define DOUT_ACLK_PERIC1   1
-#define DOUT_ACLK_PERIC0   2
-#define CLK_SCLK_UART0 3
-#define CLK_SCLK_UART1 4
-#define CLK_SCLK_UART2 5
-#define CLK_SCLK_UART3 6
-#define CLK_SCLK_SPI0  7
-#define CLK_SCLK_SPI1  8
-#define CLK_SCLK_SPI2  9
-#define CLK_SCLK_SPI3  10
-#define CLK_SCLK_SPI4  11
-#define CLK_SCLK_SPDIF 12
-#define CLK_SCLK_PCM1  13
-#define CLK_SCLK_I2S1  14
-#define CLK_ACLK_PERIC0_66 15
-#define CLK_ACLK_PERIC1_66 16
-#define TOP0_NR_CLK17
-
-/* TOP1 */
-#define DOUT_ACLK_FSYS1_2001
-#define DOUT_ACLK_FSYS0_2002
-#define DOUT_SCLK_MMC2 3
-#define DOUT_SCLK_MMC1 4
-#define DOUT_SCLK_MMC0 5
-#define CLK_SCLK_MMC2  6
-#define CLK_SCLK_MMC1  7
-#define CLK_SCLK_MMC0  8
-#define CLK_ACLK_FSYS0_200 9
-#define CLK_ACLK_FSYS1_200 10
-#define CLK_SCLK_PHY_FSYS1 11
-#define CLK_SCLK_PHY_FSYS1_26M 12
-#define MOUT_SCLK_UFSUNIPRO20  13
-#define DOUT_SCLK_UFSUNIPRO20  14
-#define CLK_SCLK_UFSUNIPRO20   15
-#define DOUT_SCLK_PHY_FSYS116
-#define DOUT_SCLK_PHY_FSYS1_26M17
-#define TOP1_NR_CLK18
-
-/* CCORE */
-#define PCLK_RTC   1
-#define CCORE_NR_CLK   2
-
-/* PERIC0 */
-#define PCLK_UART0 1
-#define SCLK_UART0 2
-#define PCLK_HSI2C03
-#define PCLK_HSI2C14
-#define PCLK_HSI2C45
-#define PCLK_HSI2C56
-#define PCLK_HSI2C97
-#define PCLK_HSI2C10   8
-#define PCLK_HSI2C11   9
-#define PCLK_PWM   10
-#define SCLK_PWM   11
-#define PCLK_ADCIF 12
-#define 

[PATCH RFC 07/26] amlogic: drop dt-binding headers

[Caleb Connolly]

Dropped in favour of dts/upstream

Signed-off-by: Caleb Connolly 
---
 .../clock/amlogic,a1-peripherals-clkc.h| 168 -
 include/dt-bindings/clock/amlogic,a1-pll-clkc.h|  25 ---
 include/dt-bindings/clock/axg-aoclkc.h |  31 
 include/dt-bindings/clock/axg-audio-clkc.h |  94 
 include/dt-bindings/clock/axg-clkc.h   | 100 
 include/dt-bindings/clock/g12a-aoclkc.h|  36 -
 include/dt-bindings/clock/g12a-clkc.h  | 153 ---
 include/dt-bindings/clock/gxbb-aoclkc.h|  74 -
 include/dt-bindings/clock/gxbb-clkc.h  | 151 --
 include/dt-bindings/gpio/meson-a1-gpio.h   |  73 -
 include/dt-bindings/gpio/meson-axg-gpio.h  | 116 --
 include/dt-bindings/gpio/meson-g12a-gpio.h | 114 --
 include/dt-bindings/gpio/meson-gxbb-gpio.h | 148 --
 include/dt-bindings/gpio/meson-gxl-gpio.h  | 125 ---
 include/dt-bindings/power/meson-a1-power.h |  32 
 include/dt-bindings/power/meson-axg-power.h|  14 --
 include/dt-bindings/power/meson-g12a-power.h   |  13 --
 include/dt-bindings/power/meson-gxbb-power.h   |  13 --
 include/dt-bindings/power/meson-sm1-power.h|  18 ---
 include/dt-bindings/reset/amlogic,meson-a1-reset.h |  76 --
 .../reset/amlogic,meson-axg-audio-arb.h|  19 ---
 .../dt-bindings/reset/amlogic,meson-axg-reset.h| 123 ---
 .../reset/amlogic,meson-g12a-audio-reset.h |  53 ---
 .../dt-bindings/reset/amlogic,meson-g12a-reset.h   | 137 -
 .../dt-bindings/reset/amlogic,meson-gxbb-reset.h   | 161 
 include/dt-bindings/reset/axg-aoclkc.h |  20 ---
 include/dt-bindings/reset/g12a-aoclkc.h|  18 ---
 include/dt-bindings/reset/gxbb-aoclkc.h|  66 
 include/dt-bindings/sound/meson-aiu.h  |  18 ---
 include/dt-bindings/sound/meson-g12a-toacodec.h|  10 --
 include/dt-bindings/sound/meson-g12a-tohdmitx.h|  13 --
 31 files changed, 2212 deletions(-)

diff --git a/include/dt-bindings/clock/amlogic,a1-peripherals-clkc.h 
b/include/dt-bindings/clock/amlogic,a1-peripherals-clkc.h
deleted file mode 100644
index 06f198ee7623..
--- a/include/dt-bindings/clock/amlogic,a1-peripherals-clkc.h
+++ /dev/null
@@ -1,168 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
-/*
- * Copyright (c) 2019 Amlogic, Inc. All rights reserved.
- * Author: Jian Hu 
- *
- * Copyright (c) 2023, SberDevices. All Rights Reserved.
- * Author: Dmitry Rokosov 
- */
-
-#ifndef __A1_PERIPHERALS_CLKC_H
-#define __A1_PERIPHERALS_CLKC_H
-
-#define CLKID_XTAL_IN  0
-#define CLKID_FIXPLL_IN1
-#define CLKID_USB_PHY_IN   2
-#define CLKID_USB_CTRL_IN  3
-#define CLKID_HIFIPLL_IN   4
-#define CLKID_SYSPLL_IN5
-#define CLKID_DDS_IN   6
-#define CLKID_SYS  7
-#define CLKID_CLKTREE  8
-#define CLKID_RESET_CTRL   9
-#define CLKID_ANALOG_CTRL  10
-#define CLKID_PWR_CTRL 11
-#define CLKID_PAD_CTRL 12
-#define CLKID_SYS_CTRL 13
-#define CLKID_TEMP_SENSOR  14
-#define CLKID_AM2AXI_DIV   15
-#define CLKID_SPICC_B  16
-#define CLKID_SPICC_A  17
-#define CLKID_MSR  18
-#define CLKID_AUDIO19
-#define CLKID_JTAG_CTRL20
-#define CLKID_SARADC_EN21
-#define CLKID_PWM_EF   22
-#define CLKID_PWM_CD   23
-#define CLKID_PWM_AB   24
-#define CLKID_CEC  25
-#define CLKID_I2C_S26
-#define CLKID_IR_CTRL  27
-#define CLKID_I2C_M_D  28
-#define CLKID_I2C_M_C  29
-#define CLKID_I2C_M_B  30
-#define CLKID_I2C_M_A  31
-#define CLKID_ACODEC   32
-#define CLKID_OTP  33
-#define CLKID_SD_EMMC_A34
-#define CLKID_USB_PHY  35
-#define CLKID_USB_CTRL 36
-#define CLKID_SYS_DSPB 37
-#define CLKID_SYS_DSPA 38
-#define CLKID_DMA  39
-#define CLKID_IRQ_CTRL 40
-#define CLKID_NIC  41
-#define CLKID_GIC  42
-#define CLKID_UART_C   43
-#define CLKID_UART_B   44
-#define CLKID_UART_A   45
-#define CLKID_SYS_PSRAM46
-#define CLKID_RSA  47
-#define CLKID_CORESIGHT48
-#define CLKID_AM2AXI_VAD   49
-#define CLKID_AUDIO_VAD50
-#define CLKID_AXI_DMC  51
-#define CLKID_AXI_PSRAM52
-#define CLKID_RAMB 53
-#define CLKID_RAMA 54
-#define CLKID_AXI_SPIFC55
-#define CLKID_AXI_NIC  56
-#define CLKID_AXI_DMA  57
-#define CLKID_CPU_CTRL 58
-#define CLKID_ROM  59
-#define CLKID_PROC_I2C 

[PATCH RFC 08/26] stm: drop dt-binding headers

[Caleb Connolly]

Dropped in favour of dts/upstream

Signed-off-by: Caleb Connolly 
---
 include/dt-bindings/clock/ste-ab8500.h |  12 -
 include/dt-bindings/clock/stih407-clks.h   |  90 ---
 include/dt-bindings/clock/stih410-clks.h   |  25 --
 include/dt-bindings/clock/stm32fx-clock.h  |  63 -
 include/dt-bindings/clock/stm32h7-clks.h   | 167 -
 include/dt-bindings/clock/stm32mp1-clks.h  | 274 -
 include/dt-bindings/clock/stm32mp13-clks.h | 229 -
 include/dt-bindings/mfd/st,stpmic1.h   |  50 
 include/dt-bindings/mfd/st-lpc.h   |  16 --
 include/dt-bindings/mfd/stm32f4-rcc.h  | 108 
 include/dt-bindings/mfd/stm32f7-rcc.h  | 116 -
 include/dt-bindings/mfd/stm32h7-rcc.h  | 138 ---
 include/dt-bindings/pinctrl/stm32-pinfunc.h|  45 
 .../dt-bindings/regulator/st,stm32mp13-regulator.h |  42 
 include/dt-bindings/reset/stih407-resets.h |  65 -
 include/dt-bindings/reset/stm32mp1-resets.h| 123 -
 include/dt-bindings/reset/stm32mp13-resets.h   | 100 
 17 files changed, 1663 deletions(-)

diff --git a/include/dt-bindings/clock/ste-ab8500.h 
b/include/dt-bindings/clock/ste-ab8500.h
deleted file mode 100644
index fb42dd0cab5f..
--- a/include/dt-bindings/clock/ste-ab8500.h
+++ /dev/null
@@ -1,12 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef __STE_CLK_AB8500_H__
-#define __STE_CLK_AB8500_H__
-
-#define AB8500_SYSCLK_BUF2 0
-#define AB8500_SYSCLK_BUF3 1
-#define AB8500_SYSCLK_BUF4 2
-#define AB8500_SYSCLK_ULP  3
-#define AB8500_SYSCLK_INT  4
-#define AB8500_SYSCLK_AUDIO5
-
-#endif
diff --git a/include/dt-bindings/clock/stih407-clks.h 
b/include/dt-bindings/clock/stih407-clks.h
deleted file mode 100644
index 082edd9badfa..
--- a/include/dt-bindings/clock/stih407-clks.h
+++ /dev/null
@@ -1,90 +0,0 @@
-/*
- * This header provides constants clk index STMicroelectronics
- * STiH407 SoC.
- */
-#ifndef _DT_BINDINGS_CLK_STIH407
-#define _DT_BINDINGS_CLK_STIH407
-
-/* CLOCKGEN A0 */
-#define CLK_IC_LMI00
-#define CLK_IC_LMI11
-
-/* CLOCKGEN C0 */
-#define CLK_ICN_GPU0
-#define CLK_FDMA   1
-#define CLK_NAND   2
-#define CLK_HVA3
-#define CLK_PROC_STFE  4
-#define CLK_PROC_TP5
-#define CLK_RX_ICN_DMU 6
-#define CLK_RX_ICN_DISP_0  6
-#define CLK_RX_ICN_DISP_1  6
-#define CLK_RX_ICN_HVA 7
-#define CLK_RX_ICN_TS  7
-#define CLK_ICN_CPU8
-#define CLK_TX_ICN_DMU 9
-#define CLK_TX_ICN_HVA 9
-#define CLK_TX_ICN_TS  9
-#define CLK_ICN_COMPO  9
-#define CLK_MMC_0  10
-#define CLK_MMC_1  11
-#define CLK_JPEGDEC12
-#define CLK_ICN_REG13
-#define CLK_TRACE_A9   13
-#define CLK_PTI_STM13
-#define CLK_EXT2F_A9   13
-#define CLK_IC_BDISP_0 14
-#define CLK_IC_BDISP_1 15
-#define CLK_PP_DMU 16
-#define CLK_VID_DMU17
-#define CLK_DSS_LPC18
-#define CLK_ST231_AUD_019
-#define CLK_ST231_GP_0 19
-#define CLK_ST231_GP_1 20
-#define CLK_ST231_DMU  21
-#define CLK_ICN_LMI22
-#define CLK_TX_ICN_DISP_0  23
-#define CLK_TX_ICN_DISP_1  23
-#define CLK_ICN_SBC24
-#define CLK_STFE_FRC2  25
-#define CLK_ETH_PHY26
-#define CLK_ETH_REF_PHYCLK 27
-#define CLK_FLASH_PROMIP   28
-#define CLK_MAIN_DISP  29
-#define CLK_AUX_DISP   30
-#define CLK_COMPO_DVP  31
-
-/* CLOCKGEN D0 */
-#define CLK_PCM_0  0
-#define CLK_PCM_1  1
-#define CLK_PCM_2  2
-#define CLK_SPDIFF 3
-
-/* CLOCKGEN D2 */
-#define CLK_PIX_MAIN_DISP  0
-#define CLK_PIX_PIP1
-#define CLK_PIX_GDP1   2
-#define CLK_PIX_GDP2   3
-#define CLK_PIX_GDP3   4
-#define CLK_PIX_GDP4   5
-#define CLK_PIX_AUX_DISP   6
-#define CLK_DENC   7
-#define CLK_PIX_HDDAC  8
-#define CLK_HDDAC  9
-#define CLK_SDDAC  10
-#define CLK_PIX_DVO11
-#define CLK_DVO12
-#define CLK_PIX_HDMI   13
-#define CLK_TMDS_HDMI  14
-#define CLK_REF_HDMIPHY15
-
-/* CLOCKGEN D3 */
-#define CLK_STFE_FRC1  0
-#define CLK_TSOUT_01
-#define CLK_TSOUT_12
-#define CLK_MCHI   3
-#define CLK_VSENS_COMPO4
-#define CLK_FRC1_REMOTE5
-#define CLK_LPC_0  6
-#define CLK_LPC_1  7
-#endif
diff --git a/include/dt-bindings/clock/stih410-clks.h 
b/include/dt-bindings/clock/stih410-clks.h
deleted file mode 100644
index 

[PATCH RFC 05/26] imx: drop clock dt-binding headers

[Caleb Connolly]

Drop in favour of dts/upstream.

Signed-off-by: Caleb Connolly 
---
 include/dt-bindings/clock/imx5-clock.h  | 219 -
 include/dt-bindings/clock/imx6qdl-clock.h   | 278 -
 include/dt-bindings/clock/imx6sl-clock.h| 178 ---
 include/dt-bindings/clock/imx6sll-clock.h   | 210 -
 include/dt-bindings/clock/imx6sx-clock.h| 281 -
 include/dt-bindings/clock/imx6ul-clock.h| 262 
 include/dt-bindings/clock/imx7d-clock.h | 456 
 include/dt-bindings/clock/imx7ulp-clock.h   | 119 
 include/dt-bindings/clock/imx8mm-clock.h| 286 -
 include/dt-bindings/clock/imx8mn-clock.h| 262 
 include/dt-bindings/clock/imx8mp-clock.h| 401 
 include/dt-bindings/clock/imx8mq-clock.h| 431 --
 include/dt-bindings/clock/imx8ulp-clock.h   | 258 
 include/dt-bindings/clock/imx93-clock.h | 208 -
 include/dt-bindings/clock/imxrt1050-clock.h |  72 -
 15 files changed, 3921 deletions(-)

diff --git a/include/dt-bindings/clock/imx5-clock.h 
b/include/dt-bindings/clock/imx5-clock.h
deleted file mode 100644
index d382fc71aa83..
--- a/include/dt-bindings/clock/imx5-clock.h
+++ /dev/null
@@ -1,219 +0,0 @@
-/*
- * Copyright 2013 Lucas Stach, Pengutronix 
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- */
-
-#ifndef __DT_BINDINGS_CLOCK_IMX5_H
-#define __DT_BINDINGS_CLOCK_IMX5_H
-
-#define IMX5_CLK_DUMMY 0
-#define IMX5_CLK_CKIL  1
-#define IMX5_CLK_OSC   2
-#define IMX5_CLK_CKIH1 3
-#define IMX5_CLK_CKIH2 4
-#define IMX5_CLK_AHB   5
-#define IMX5_CLK_IPG   6
-#define IMX5_CLK_AXI_A 7
-#define IMX5_CLK_AXI_B 8
-#define IMX5_CLK_UART_PRED 9
-#define IMX5_CLK_UART_ROOT 10
-#define IMX5_CLK_ESDHC_A_PRED  11
-#define IMX5_CLK_ESDHC_B_PRED  12
-#define IMX5_CLK_ESDHC_C_SEL   13
-#define IMX5_CLK_ESDHC_D_SEL   14
-#define IMX5_CLK_EMI_SEL   15
-#define IMX5_CLK_EMI_SLOW_PODF 16
-#define IMX5_CLK_NFC_PODF  17
-#define IMX5_CLK_ECSPI_PRED18
-#define IMX5_CLK_ECSPI_PODF19
-#define IMX5_CLK_USBOH3_PRED   20
-#define IMX5_CLK_USBOH3_PODF   21
-#define IMX5_CLK_USB_PHY_PRED  22
-#define IMX5_CLK_USB_PHY_PODF  23
-#define IMX5_CLK_CPU_PODF  24
-#define IMX5_CLK_DI_PRED   25
-#define IMX5_CLK_TVE_SEL   27
-#define IMX5_CLK_UART1_IPG_GATE28
-#define IMX5_CLK_UART1_PER_GATE29
-#define IMX5_CLK_UART2_IPG_GATE30
-#define IMX5_CLK_UART2_PER_GATE31
-#define IMX5_CLK_UART3_IPG_GATE32
-#define IMX5_CLK_UART3_PER_GATE33
-#define IMX5_CLK_I2C1_GATE 34
-#define IMX5_CLK_I2C2_GATE 35
-#define IMX5_CLK_GPT_IPG_GATE  36
-#define IMX5_CLK_PWM1_IPG_GATE 37
-#define IMX5_CLK_PWM1_HF_GATE  38
-#define IMX5_CLK_PWM2_IPG_GATE 39
-#define IMX5_CLK_PWM2_HF_GATE  40
-#define IMX5_CLK_GPT_HF_GATE   41
-#define IMX5_CLK_FEC_GATE  42
-#define IMX5_CLK_USBOH3_PER_GATE   43
-#define IMX5_CLK_ESDHC1_IPG_GATE   44
-#define IMX5_CLK_ESDHC2_IPG_GATE   45
-#define IMX5_CLK_ESDHC3_IPG_GATE   46
-#define IMX5_CLK_ESDHC4_IPG_GATE   47
-#define IMX5_CLK_SSI1_IPG_GATE 48
-#define IMX5_CLK_SSI2_IPG_GATE 49
-#define IMX5_CLK_SSI3_IPG_GATE 50
-#define IMX5_CLK_ECSPI1_IPG_GATE   51
-#define IMX5_CLK_ECSPI1_PER_GATE   52
-#define IMX5_CLK_ECSPI2_IPG_GATE   53
-#define IMX5_CLK_ECSPI2_PER_GATE   54
-#define IMX5_CLK_CSPI_IPG_GATE 55
-#define IMX5_CLK_SDMA_GATE 56
-#define IMX5_CLK_EMI_SLOW_GATE 57
-#define IMX5_CLK_IPU_SEL   58
-#define IMX5_CLK_IPU_GATE  59
-#define IMX5_CLK_NFC_GATE  60
-#define IMX5_CLK_IPU_DI1_GATE  61
-#define IMX5_CLK_VPU_SEL   62
-#define IMX5_CLK_VPU_GATE  63
-#define IMX5_CLK_VPU_REFERENCE_GATE64
-#define IMX5_CLK_UART4_IPG_GATE65
-#define IMX5_CLK_UART4_PER_GATE66
-#define IMX5_CLK_UART5_IPG_GATE67
-#define IMX5_CLK_UART5_PER_GATE68
-#define IMX5_CLK_TVE_GATE  69
-#define IMX5_CLK_TVE_PRED  70
-#define IMX5_CLK_ESDHC1_PER_GATE   71
-#define IMX5_CLK_ESDHC2_PER_GATE   72
-#define IMX5_CLK_ESDHC3_PER_GATE   73
-#define IMX5_CLK_ESDHC4_PER_GATE   74
-#define IMX5_CLK_USB_PHY_GATE  75
-#define 

[PATCH RFC 06/26] imx: drop dt-binding headers

[Caleb Connolly]

Drop in favour of dts/upstream.

Signed-off-by: Caleb Connolly 
---
 include/dt-bindings/interconnect/fsl,imx8mp.h | 59 ---
 include/dt-bindings/interconnect/imx8mm.h | 50 
 include/dt-bindings/interconnect/imx8mn.h | 41 
 include/dt-bindings/interconnect/imx8mq.h | 48 ---
 include/dt-bindings/phy/phy-imx8-pcie.h   | 14 --
 include/dt-bindings/power/fsl,imx93-power.h   | 15 --
 include/dt-bindings/power/imx7-power.h| 13 --
 include/dt-bindings/power/imx8mm-power.h  | 31 -
 include/dt-bindings/power/imx8mn-power.h  | 20 
 include/dt-bindings/power/imx8mp-power.h  | 59 ---
 include/dt-bindings/power/imx8mq-power.h  | 24 --
 include/dt-bindings/power/imx8ulp-power.h | 26 ---
 include/dt-bindings/reset/imx7-reset.h| 52 -
 include/dt-bindings/reset/imx8mp-reset.h  | 50 
 include/dt-bindings/reset/imx8mq-reset.h  | 67 ---
 include/dt-bindings/reset/imx8ulp-pcc-reset.h | 59 ---
 include/dt-bindings/sound/fsl-imx-audmux.h| 64 -
 17 files changed, 692 deletions(-)

diff --git a/include/dt-bindings/interconnect/fsl,imx8mp.h 
b/include/dt-bindings/interconnect/fsl,imx8mp.h
deleted file mode 100644
index 7357d417529a..
--- a/include/dt-bindings/interconnect/fsl,imx8mp.h
+++ /dev/null
@@ -1,59 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 OR MIT */
-/*
- * Interconnect framework driver for i.MX SoC
- *
- * Copyright 2022 NXP
- * Peng Fan 
- */
-
-#ifndef __DT_BINDINGS_INTERCONNECT_IMX8MP_H
-#define __DT_BINDINGS_INTERCONNECT_IMX8MP_H
-
-#define IMX8MP_ICN_NOC 0
-#define IMX8MP_ICN_MAIN1
-#define IMX8MP_ICS_DRAM2
-#define IMX8MP_ICS_OCRAM   3
-#define IMX8MP_ICM_A53 4
-#define IMX8MP_ICM_SUPERMIX5
-#define IMX8MP_ICM_GIC 6
-#define IMX8MP_ICM_MLMIX   7
-
-#define IMX8MP_ICN_AUDIO   8
-#define IMX8MP_ICM_DSP 9
-#define IMX8MP_ICM_SDMA2PER10
-#define IMX8MP_ICM_SDMA2BURST  11
-#define IMX8MP_ICM_SDMA3PER12
-#define IMX8MP_ICM_SDMA3BURST  13
-#define IMX8MP_ICM_EDMA14
-
-#define IMX8MP_ICN_GPU 15
-#define IMX8MP_ICM_GPU2D   16
-#define IMX8MP_ICM_GPU3D   17
-
-#define IMX8MP_ICN_HDMI18
-#define IMX8MP_ICM_HRV 19
-#define IMX8MP_ICM_LCDIF_HDMI  20
-#define IMX8MP_ICM_HDCP21
-
-#define IMX8MP_ICN_HSIO22
-#define IMX8MP_ICM_NOC_PCIE23
-#define IMX8MP_ICM_USB124
-#define IMX8MP_ICM_USB225
-#define IMX8MP_ICM_PCIE26
-
-#define IMX8MP_ICN_MEDIA   27
-#define IMX8MP_ICM_LCDIF_RD28
-#define IMX8MP_ICM_LCDIF_WR29
-#define IMX8MP_ICM_ISI030
-#define IMX8MP_ICM_ISI131
-#define IMX8MP_ICM_ISI232
-#define IMX8MP_ICM_ISP033
-#define IMX8MP_ICM_ISP134
-#define IMX8MP_ICM_DWE 35
-
-#define IMX8MP_ICN_VIDEO   36
-#define IMX8MP_ICM_VPU_G1  37
-#define IMX8MP_ICM_VPU_G2  38
-#define IMX8MP_ICM_VPU_H1  39
-
-#endif /* __DT_BINDINGS_INTERCONNECT_IMX8MP_H */
diff --git a/include/dt-bindings/interconnect/imx8mm.h 
b/include/dt-bindings/interconnect/imx8mm.h
deleted file mode 100644
index 8f10bb06cb59..
--- a/include/dt-bindings/interconnect/imx8mm.h
+++ /dev/null
@@ -1,50 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * Interconnect framework driver for i.MX SoC
- *
- * Copyright (c) 2019, BayLibre
- * Copyright (c) 2019-2020, NXP
- * Author: Alexandre Bailon 
- */
-
-#ifndef __DT_BINDINGS_INTERCONNECT_IMX8MM_H
-#define __DT_BINDINGS_INTERCONNECT_IMX8MM_H
-
-#define IMX8MM_ICN_NOC 1
-#define IMX8MM_ICS_DRAM2
-#define IMX8MM_ICS_OCRAM   3
-#define IMX8MM_ICM_A53 4
-
-#define IMX8MM_ICM_VPU_H1  5
-#define IMX8MM_ICM_VPU_G1  6
-#define IMX8MM_ICM_VPU_G2  7
-#define IMX8MM_ICN_VIDEO   8
-
-#define IMX8MM_ICM_GPU2D   9
-#define IMX8MM_ICM_GPU3D   10
-#define IMX8MM_ICN_GPU 11
-
-#define IMX8MM_ICM_CSI 12
-#define IMX8MM_ICM_LCDIF   13
-#define IMX8MM_ICN_MIPI14
-
-#define IMX8MM_ICM_USB115
-#define IMX8MM_ICM_USB216
-#define IMX8MM_ICM_PCIE17
-#define IMX8MM_ICN_HSIO18
-
-#define IMX8MM_ICM_SDMA2   19
-#define IMX8MM_ICM_SDMA3   20
-#define IMX8MM_ICN_AUDIO   21
-
-#define IMX8MM_ICN_ENET22
-#define IMX8MM_ICM_ENET23
-
-#define IMX8MM_ICN_MAIN24
-#define IMX8MM_ICM_NAND25
-#define IMX8MM_ICM_SDMA1   26
-#define IMX8MM_ICM_USDHC1  27
-#define IMX8MM_ICM_USDHC2  28
-#define IMX8MM_ICM_USDHC3  29
-
-#endif /* 

[PATCH RFC 04/26] sunxi: drop remaining dt-binding headers

[Caleb Connolly]

Drop in favour of dts/upstream.

Signed-off-by: Caleb Connolly 
---
 include/dt-bindings/dma/sun4i-a10.h   |  56 ---
 include/dt-bindings/pinctrl/sun4i-a10.h   |  62 
 include/dt-bindings/reset/sun20i-d1-ccu.h |  79 
 include/dt-bindings/reset/sun20i-d1-r-ccu.h   |  16 
 include/dt-bindings/reset/sun4i-a10-ccu.h |  69 --
 include/dt-bindings/reset/sun50i-a64-ccu.h|  98 ---
 include/dt-bindings/reset/sun50i-h6-ccu.h |  73 ---
 include/dt-bindings/reset/sun50i-h6-r-ccu.h   |  18 
 include/dt-bindings/reset/sun50i-h616-ccu.h   |  70 --
 include/dt-bindings/reset/sun5i-ccu.h |  23 -
 include/dt-bindings/reset/sun6i-a31-ccu.h | 106 -
 include/dt-bindings/reset/sun8i-a23-a33-ccu.h |  87 -
 include/dt-bindings/reset/sun8i-a83t-ccu.h|  98 ---
 include/dt-bindings/reset/sun8i-de2.h |  15 ---
 include/dt-bindings/reset/sun8i-h3-ccu.h  | 106 -
 include/dt-bindings/reset/sun8i-r-ccu.h   |  53 ---
 include/dt-bindings/reset/sun8i-r40-ccu.h | 130 --
 include/dt-bindings/reset/sun8i-v3s-ccu.h |  81 
 include/dt-bindings/reset/sun9i-a80-ccu.h | 102 
 include/dt-bindings/reset/sun9i-a80-de.h  |  58 
 include/dt-bindings/reset/sun9i-a80-usb.h |  56 ---
 include/dt-bindings/reset/suniv-ccu-f1c100s.h |  38 
 22 files changed, 1494 deletions(-)

diff --git a/include/dt-bindings/dma/sun4i-a10.h 
b/include/dt-bindings/dma/sun4i-a10.h
deleted file mode 100644
index 8caba9ef7e9d..
--- a/include/dt-bindings/dma/sun4i-a10.h
+++ /dev/null
@@ -1,56 +0,0 @@
-/*
- * Copyright 2014 Maxime Ripard
- *
- * Maxime Ripard 
- *
- * This file is dual-licensed: you can use it either under the terms
- * of the GPL or the X11 license, at your option. Note that this dual
- * licensing only applies to this file, and not this project as a
- * whole.
- *
- *  a) This file is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or (at your option) any later version.
- *
- * This file is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public
- * License along with this file; if not, write to the Free
- * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
- * MA 02110-1301 USA
- *
- * Or, alternatively,
- *
- *  b) Permission is hereby granted, free of charge, to any person
- * obtaining a copy of this software and associated documentation
- * files (the "Software"), to deal in the Software without
- * restriction, including without limitation the rights to use,
- * copy, modify, merge, publish, distribute, sublicense, and/or
- * sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following
- * conditions:
- *
- * The above copyright notice and this permission notice shall be
- * included in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
- * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- */
-
-#ifndef __DT_BINDINGS_DMA_SUN4I_A10_H_
-#define __DT_BINDINGS_DMA_SUN4I_A10_H_
-
-#define SUN4I_DMA_NORMAL   0
-#define SUN4I_DMA_DEDICATED1
-
-#endif /* __DT_BINDINGS_DMA_SUN4I_A10_H_ */
diff --git a/include/dt-bindings/pinctrl/sun4i-a10.h 
b/include/dt-bindings/pinctrl/sun4i-a10.h
deleted file mode 100644
index f7553c143b40..
--- a/include/dt-bindings/pinctrl/sun4i-a10.h
+++ /dev/null
@@ -1,62 +0,0 @@
-/*
- * Copyright 2014 Maxime Ripard
- *
- * Maxime Ripard 
- *
- * This file is dual-licensed: you can use it either under the terms
- * of the GPL or the X11 license, at your option. Note that this dual
- * licensing only applies to this file, and not this project as a
- * whole.
- *
- *  a) This file is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 

[PATCH RFC 03/26] sunxi: drop clock dt-binding headers

[Caleb Connolly]

Drop in favour of dts/upstream

Signed-off-by: Caleb Connolly 
---
 include/dt-bindings/clock/sun20i-d1-ccu.h | 158 
 include/dt-bindings/clock/sun20i-d1-r-ccu.h   |  19 ---
 include/dt-bindings/clock/sun4i-a10-ccu.h | 202 --
 include/dt-bindings/clock/sun4i-a10-pll2.h|  53 ---
 include/dt-bindings/clock/sun50i-a64-ccu.h| 138 --
 include/dt-bindings/clock/sun50i-h6-ccu.h | 125 
 include/dt-bindings/clock/sun50i-h6-r-ccu.h   |  27 
 include/dt-bindings/clock/sun50i-h616-ccu.h   | 116 ---
 include/dt-bindings/clock/sun5i-ccu.h |  97 -
 include/dt-bindings/clock/sun6i-a31-ccu.h | 193 
 include/dt-bindings/clock/sun6i-rtc.h |  10 --
 include/dt-bindings/clock/sun7i-a20-ccu.h |  53 ---
 include/dt-bindings/clock/sun8i-a23-a33-ccu.h | 129 
 include/dt-bindings/clock/sun8i-a83t-ccu.h| 140 --
 include/dt-bindings/clock/sun8i-de2.h |  21 ---
 include/dt-bindings/clock/sun8i-h3-ccu.h  | 152 ---
 include/dt-bindings/clock/sun8i-r-ccu.h   |  59 
 include/dt-bindings/clock/sun8i-r40-ccu.h | 191 
 include/dt-bindings/clock/sun8i-tcon-top.h|  11 --
 include/dt-bindings/clock/sun8i-v3s-ccu.h | 111 --
 include/dt-bindings/clock/sun9i-a80-ccu.h | 162 -
 include/dt-bindings/clock/sun9i-a80-de.h  |  80 --
 include/dt-bindings/clock/sun9i-a80-usb.h |  59 
 include/dt-bindings/clock/suniv-ccu-f1c100s.h |  72 -
 24 files changed, 2378 deletions(-)

diff --git a/include/dt-bindings/clock/sun20i-d1-ccu.h 
b/include/dt-bindings/clock/sun20i-d1-ccu.h
deleted file mode 100644
index fdbfb404f92a..
--- a/include/dt-bindings/clock/sun20i-d1-ccu.h
+++ /dev/null
@@ -1,158 +0,0 @@
-/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
-/*
- * Copyright (C) 2020 huangzhen...@allwinnertech.com
- * Copyright (C) 2021 Samuel Holland 
- */
-
-#ifndef _DT_BINDINGS_CLK_SUN20I_D1_CCU_H_
-#define _DT_BINDINGS_CLK_SUN20I_D1_CCU_H_
-
-#define CLK_PLL_CPUX   0
-#define CLK_PLL_DDR0   1
-#define CLK_PLL_PERIPH0_4X 2
-#define CLK_PLL_PERIPH0_2X 3
-#define CLK_PLL_PERIPH0_800M   4
-#define CLK_PLL_PERIPH05
-#define CLK_PLL_PERIPH0_DIV3   6
-#define CLK_PLL_VIDEO0_4X  7
-#define CLK_PLL_VIDEO0_2X  8
-#define CLK_PLL_VIDEO0 9
-#define CLK_PLL_VIDEO1_4X  10
-#define CLK_PLL_VIDEO1_2X  11
-#define CLK_PLL_VIDEO1 12
-#define CLK_PLL_VE 13
-#define CLK_PLL_AUDIO0_4X  14
-#define CLK_PLL_AUDIO0_2X  15
-#define CLK_PLL_AUDIO0 16
-#define CLK_PLL_AUDIO1 17
-#define CLK_PLL_AUDIO1_DIV218
-#define CLK_PLL_AUDIO1_DIV519
-#define CLK_CPUX   20
-#define CLK_CPUX_AXI   21
-#define CLK_CPUX_APB   22
-#define CLK_PSI_AHB23
-#define CLK_APB0   24
-#define CLK_APB1   25
-#define CLK_MBUS   26
-#define CLK_DE 27
-#define CLK_BUS_DE 28
-#define CLK_DI 29
-#define CLK_BUS_DI 30
-#define CLK_G2D31
-#define CLK_BUS_G2D32
-#define CLK_CE 33
-#define CLK_BUS_CE 34
-#define CLK_VE 35
-#define CLK_BUS_VE 36
-#define CLK_BUS_DMA37
-#define CLK_BUS_MSGBOX038
-#define CLK_BUS_MSGBOX139
-#define CLK_BUS_MSGBOX240
-#define CLK_BUS_SPINLOCK   41
-#define CLK_BUS_HSTIMER42
-#define CLK_AVS43
-#define CLK_BUS_DBG44
-#define CLK_BUS_PWM45
-#define CLK_BUS_IOMMU  46
-#define CLK_DRAM   47
-#define CLK_MBUS_DMA   48
-#define CLK_MBUS_VE49
-#define CLK_MBUS_CE50
-#define CLK_MBUS_TVIN  51
-#define CLK_MBUS_CSI   52
-#define CLK_MBUS_G2D   53
-#define CLK_MBUS_RISCV 54
-#define CLK_BUS_DRAM   55
-#define CLK_MMC0   56
-#define CLK_MMC1   57
-#define CLK_MMC2   58
-#define CLK_BUS_MMC0   59
-#define CLK_BUS_MMC1   60
-#define CLK_BUS_MMC2   61
-#define CLK_BUS_UART0  62
-#define CLK_BUS_UART1  63
-#define CLK_BUS_UART2  64
-#define CLK_BUS_UART3  65
-#define CLK_BUS_UART4  66
-#define CLK_BUS_UART5  67
-#define CLK_BUS_I2C0   68
-#define CLK_BUS_I2C1   69
-#define CLK_BUS_I2C2   70
-#define CLK_BUS_I2C3   71
-#define CLK_SPI0   72
-#define CLK_SPI1   73
-#define CLK_BUS_SPI0   74
-#define CLK_BUS_SPI1   75
-#define CLK_EMAC_25M   76
-#define CLK_BUS_EMAC   77
-#define CLK_IR_TX  78

[PATCH RFC 02/26] qcom: drop remaining dt-binding headers

[Caleb Connolly]

Drop in favour of dts/upstream

Signed-off-by: Caleb Connolly 
---
 include/dt-bindings/dma/qcom-gpi.h |  11 -
 include/dt-bindings/firmware/qcom,scm.h|  39 --
 include/dt-bindings/iio/qcom,spmi-vadc.h   | 300 ---
 include/dt-bindings/interconnect/qcom,msm8916.h| 100 -
 .../dt-bindings/interconnect/qcom,msm8996-cbf.h|  12 -
 include/dt-bindings/interconnect/qcom,msm8996.h| 163 
 include/dt-bindings/interconnect/qcom,osm-l3.h |  15 -
 include/dt-bindings/interconnect/qcom,sdm845.h | 150 
 include/dt-bindings/phy/phy-qcom-qmp.h |  20 -
 include/dt-bindings/phy/phy-qcom-qusb2.h   |  37 --
 include/dt-bindings/pinctrl/qcom,pmic-gpio.h   | 164 
 include/dt-bindings/pinctrl/qcom,pmic-mpp.h| 106 --
 include/dt-bindings/power/qcom-rpmpd.h | 412 -
 .../dt-bindings/regulator/qcom,rpmh-regulator.h|  36 --
 include/dt-bindings/reset/qcom,gcc-msm8916.h   | 100 -
 include/dt-bindings/reset/qcom,sdm845-aoss.h   |  17 -
 include/dt-bindings/reset/qcom,sdm845-pdc.h|  22 --
 include/dt-bindings/soc/qcom,apr.h |  28 --
 include/dt-bindings/soc/qcom,rpmh-rsc.h|  14 -
 include/dt-bindings/sound/qcom,lpass.h |  46 ---
 include/dt-bindings/sound/qcom,q6afe.h |   9 -
 include/dt-bindings/sound/qcom,q6asm.h |  26 --
 include/dt-bindings/sound/qcom,q6dsp-lpass-ports.h | 234 
 include/dt-bindings/sound/qcom,wcd9335.h   |  15 -
 24 files changed, 2076 deletions(-)

diff --git a/include/dt-bindings/dma/qcom-gpi.h 
b/include/dt-bindings/dma/qcom-gpi.h
deleted file mode 100644
index ebda2a37f52a..
--- a/include/dt-bindings/dma/qcom-gpi.h
+++ /dev/null
@@ -1,11 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */
-/* Copyright (c) 2020, Linaro Ltd.  */
-
-#ifndef __DT_BINDINGS_DMA_QCOM_GPI_H__
-#define __DT_BINDINGS_DMA_QCOM_GPI_H__
-
-#define QCOM_GPI_SPI   1
-#define QCOM_GPI_UART  2
-#define QCOM_GPI_I2C   3
-
-#endif /* __DT_BINDINGS_DMA_QCOM_GPI_H__ */
diff --git a/include/dt-bindings/firmware/qcom,scm.h 
b/include/dt-bindings/firmware/qcom,scm.h
deleted file mode 100644
index 6de8b08e1e79..
--- a/include/dt-bindings/firmware/qcom,scm.h
+++ /dev/null
@@ -1,39 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
-/*
- * Copyright (c) 2010-2015, 2018-2019 The Linux Foundation. All rights 
reserved.
- * Copyright (C) 2015 Linaro Ltd.
- * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
- */
-
-#ifndef _DT_BINDINGS_FIRMWARE_QCOM_SCM_H
-#define _DT_BINDINGS_FIRMWARE_QCOM_SCM_H
-
-#define QCOM_SCM_VMID_TZ   0x1
-#define QCOM_SCM_VMID_HLOS 0x3
-#define QCOM_SCM_VMID_SSC_Q6   0x5
-#define QCOM_SCM_VMID_ADSP_Q6  0x6
-#define QCOM_SCM_VMID_CP_TOUCH 0x8
-#define QCOM_SCM_VMID_CP_BITSTREAM 0x9
-#define QCOM_SCM_VMID_CP_PIXEL 0xA
-#define QCOM_SCM_VMID_CP_NON_PIXEL 0xB
-#define QCOM_SCM_VMID_CP_CAMERA0xD
-#define QCOM_SCM_VMID_HLOS_FREE0xE
-#define QCOM_SCM_VMID_MSS_MSA  0xF
-#define QCOM_SCM_VMID_MSS_NONMSA   0x10
-#define QCOM_SCM_VMID_CP_SEC_DISPLAY   0x11
-#define QCOM_SCM_VMID_CP_APP   0x12
-#define QCOM_SCM_VMID_LPASS0x16
-#define QCOM_SCM_VMID_WLAN 0x18
-#define QCOM_SCM_VMID_WLAN_CE  0x19
-#define QCOM_SCM_VMID_CP_SPSS_SP   0x1A
-#define QCOM_SCM_VMID_CP_CAMERA_PREVIEW 0x1D
-#define QCOM_SCM_VMID_CDSP 0x1E
-#define QCOM_SCM_VMID_CP_SPSS_SP_SHARED 0x22
-#define QCOM_SCM_VMID_CP_SPSS_HLOS_SHARED 0x24
-#define QCOM_SCM_VMID_ADSP_HEAP0x25
-#define QCOM_SCM_VMID_CP_CDSP  0x2A
-#define QCOM_SCM_VMID_NAV  0x2B
-#define QCOM_SCM_VMID_TVM  0x2D
-#define QCOM_SCM_VMID_OEMVM0x31
-
-#endif
diff --git a/include/dt-bindings/iio/qcom,spmi-vadc.h 
b/include/dt-bindings/iio/qcom,spmi-vadc.h
deleted file mode 100644
index 08adfe25964c..
--- a/include/dt-bindings/iio/qcom,spmi-vadc.h
+++ /dev/null
@@ -1,300 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * Copyright (c) 2012-2014,2018,2020 The Linux Foundation. All rights reserved.
- */
-
-#ifndef _DT_BINDINGS_QCOM_SPMI_VADC_H
-#define _DT_BINDINGS_QCOM_SPMI_VADC_H
-
-/* Voltage ADC channels */
-#define VADC_USBIN 0x00
-#define VADC_DCIN  0x01
-#define VADC_VCHG_SNS  0x02
-#define VADC_SPARE1_03 0x03
-#define VADC_USB_ID_MV 0x04
-#define VADC_VCOIN 0x05
-#define VADC_VBAT_SNS  0x06
-#define VADC_VSYS  0x07
-#define VADC_DIE_TEMP  0x08
-#define VADC_REF_625MV

[PATCH RFC 01/26] qcom: drop clock dt-binding headers

[Caleb Connolly]

Drop in favour of dts/upstream. This is just the clock headers.

Signed-off-by: Caleb Connolly 
---
 include/dt-bindings/clock/qcom,camcc-sdm845.h| 116 
 include/dt-bindings/clock/qcom,dispcc-sdm845.h   |  56 
 include/dt-bindings/clock/qcom,gcc-ipq4019.h | 169 ---
 include/dt-bindings/clock/qcom,gcc-msm8916.h | 179 ---
 include/dt-bindings/clock/qcom,gcc-msm8996.h | 362 ---
 include/dt-bindings/clock/qcom,gcc-qcs404.h  | 180 ---
 include/dt-bindings/clock/qcom,gcc-sdm845.h  | 246 ---
 include/dt-bindings/clock/qcom,gpucc-sdm845.h|  24 --
 include/dt-bindings/clock/qcom,lpass-sdm845.h|  15 -
 include/dt-bindings/clock/qcom,mmcc-msm8996.h| 295 --
 include/dt-bindings/clock/qcom,rpmcc.h   | 174 ---
 include/dt-bindings/clock/qcom,rpmh.h|  37 ---
 include/dt-bindings/clock/qcom,turingcc-qcs404.h |  15 -
 include/dt-bindings/clock/qcom,videocc-sdm845.h  |  35 ---
 14 files changed, 1903 deletions(-)

diff --git a/include/dt-bindings/clock/qcom,camcc-sdm845.h 
b/include/dt-bindings/clock/qcom,camcc-sdm845.h
deleted file mode 100644
index 4f7a2d2320bf..
--- a/include/dt-bindings/clock/qcom,camcc-sdm845.h
+++ /dev/null
@@ -1,116 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Copyright (c) 2018, The Linux Foundation. All rights reserved.
- */
-
-#ifndef _DT_BINDINGS_CLK_SDM_CAM_CC_SDM845_H
-#define _DT_BINDINGS_CLK_SDM_CAM_CC_SDM845_H
-
-/* CAM_CC clock registers */
-#define CAM_CC_BPS_AHB_CLK 0
-#define CAM_CC_BPS_AREG_CLK1
-#define CAM_CC_BPS_AXI_CLK 2
-#define CAM_CC_BPS_CLK 3
-#define CAM_CC_BPS_CLK_SRC 4
-#define CAM_CC_CAMNOC_ATB_CLK  5
-#define CAM_CC_CAMNOC_AXI_CLK  6
-#define CAM_CC_CCI_CLK 7
-#define CAM_CC_CCI_CLK_SRC 8
-#define CAM_CC_CPAS_AHB_CLK9
-#define CAM_CC_CPHY_RX_CLK_SRC 10
-#define CAM_CC_CSI0PHYTIMER_CLK11
-#define CAM_CC_CSI0PHYTIMER_CLK_SRC12
-#define CAM_CC_CSI1PHYTIMER_CLK13
-#define CAM_CC_CSI1PHYTIMER_CLK_SRC14
-#define CAM_CC_CSI2PHYTIMER_CLK15
-#define CAM_CC_CSI2PHYTIMER_CLK_SRC16
-#define CAM_CC_CSI3PHYTIMER_CLK17
-#define CAM_CC_CSI3PHYTIMER_CLK_SRC18
-#define CAM_CC_CSIPHY0_CLK 19
-#define CAM_CC_CSIPHY1_CLK 20
-#define CAM_CC_CSIPHY2_CLK 21
-#define CAM_CC_CSIPHY3_CLK 22
-#define CAM_CC_FAST_AHB_CLK_SRC23
-#define CAM_CC_FD_CORE_CLK 24
-#define CAM_CC_FD_CORE_CLK_SRC 25
-#define CAM_CC_FD_CORE_UAR_CLK 26
-#define CAM_CC_ICP_APB_CLK 27
-#define CAM_CC_ICP_ATB_CLK 28
-#define CAM_CC_ICP_CLK 29
-#define CAM_CC_ICP_CLK_SRC 30
-#define CAM_CC_ICP_CTI_CLK 31
-#define CAM_CC_ICP_TS_CLK  32
-#define CAM_CC_IFE_0_AXI_CLK   33
-#define CAM_CC_IFE_0_CLK   34
-#define CAM_CC_IFE_0_CLK_SRC   35
-#define CAM_CC_IFE_0_CPHY_RX_CLK   36
-#define CAM_CC_IFE_0_CSID_CLK  37
-#define CAM_CC_IFE_0_CSID_CLK_SRC  38
-#define CAM_CC_IFE_0_DSP_CLK   39
-#define CAM_CC_IFE_1_AXI_CLK   40
-#define CAM_CC_IFE_1_CLK   41
-#define CAM_CC_IFE_1_CLK_SRC   42
-#define CAM_CC_IFE_1_CPHY_RX_CLK   43
-#define CAM_CC_IFE_1_CSID_CLK  44
-#define CAM_CC_IFE_1_CSID_CLK_SRC  45
-#define CAM_CC_IFE_1_DSP_CLK   46
-#define CAM_CC_IFE_LITE_CLK47
-#define CAM_CC_IFE_LITE_CLK_SRC48
-#define CAM_CC_IFE_LITE_CPHY_RX_CLK49
-#define CAM_CC_IFE_LITE_CSID_CLK   50
-#define CAM_CC_IFE_LITE_CSID_CLK_SRC   51
-#define CAM_CC_IPE_0_AHB_CLK   52
-#define CAM_CC_IPE_0_AREG_CLK  53
-#define CAM_CC_IPE_0_AXI_CLK   54
-#define CAM_CC_IPE_0_CLK   55
-#define CAM_CC_IPE_0_CLK_SRC   56
-#define CAM_CC_IPE_1_AHB_CLK  

[PATCH RFC 00/26] Drop DT upstream compatible dt-binding headers

[Caleb Connolly]

Many of the dt-binding headers in U-Boot are based on the upstream ones
from Linux, occasionally with minor changes. Although some have
additional things defined or are totally different.

This series attempts to drop as many of these headers as is easily
possible. Those with differing APIs were left as-is.

Most of this work was done with a script, with some manual fixing at the
end.

All-in, we're dropping 393 of the 489 headers from include/dt-bindings.

Due to how the include paths are configured, U-Boot headers override
upstream ones by the same name, resulting in some upstream DTBs failing
to compile (e.g. those that use newer linux-event-codes.h). Swapping the
include order would conversely break a bunch of U-Boot DTS files and
drivers.

Hopefully this makes a good dent, and future efforts to align more
architectures with upstream DT will help drop the remaining headers.

In addition, the final patch in this series adds support for compiling
all upstream DTS files for a given vendor. This is useful in cases where
a single U-Boot binary can support many boards, and maintaining a list
of supported DTB files would quickly become arduous (as is the case with
Qualcomm).

To: Tom Rini 
To: Neil Armstrong 
To: Sumit Garg 
To: Patrice Chotard 
To: Patrick Delaunay 
To: Jagan Teki 
To: Simon Glass 
To: Philipp Tomsich 
To: Kever Yang 
To: Lukasz Majewski 
To: Sean Anderson 
To: Sam Protsenko 
To: Matthias Brugger 
To: Peter Robinson 
To: Joe Hershberger 
To: Ramon Fried 
To: Thierry Reding 
To: Svyatoslav Ryhel 
To: Michal Simek 
To: Paul Barker 
To: Weijie Gao 
To: GSS_MTK_Uboot_upstream 
To: Ryder Lee 
To: Chunfeng Yun 
To: Eugen Hristev 
To: Rick Chen 
To: Leo 
To: Ryan Chen 
To: Chia-Wei Wang 
To: Aspeed BMC SW team 
To: Joel Stanley 
To: Kunihiko Hayashi 
To: Dai Okamura 
To: Eugeniy Paltsev 
Cc: u-boot@lists.denx.de
Cc: u-boot-amlo...@groups.io
Cc: uboot-st...@st-md-mailman.stormreply.com
Cc: uboot-snps-...@synopsys.com

Signed-off-by: Caleb Connolly 
---
Caleb Connolly (26):
  qcom: drop clock dt-binding headers
  qcom: drop remaining dt-binding headers
  sunxi: drop clock dt-binding headers
  sunxi: drop remaining dt-binding headers
  imx: drop clock dt-binding headers
  imx: drop dt-binding headers
  amlogic: drop dt-binding headers
  stm: drop dt-binding headers
  rockchip: drop clock dt-binding headers
  rockchip: drop remaining dt-binding headers
  exynos: drop dt-binding headers
  bcm: drop dt-binding headers
  ti: drop dt-binding headers
  tegra: drop clock dt-binding headers
  tegra: drop dt-binding headers
  xlnx: drop dt-binding headers
  renesas: drop clock dt-binding headers
  renesas: drop remaining dt-binding headers
  mtk: drop dt-binding headers
  microchip: drop dt-binding headers
  hisi: drop dt-binding headers
  sifive: drop clock headers
  dt-bindings: drop clock headers
  dt-bindings: drop remaining device headers
  dt-bindings: drop generic headers
  dts: support building all dtb files for a specific vendor

 arch/arm/dts/exynos7420.dtsi   |   2 +-
 arch/arm/dts/rk3399-u-boot.dtsi|   2 +-
 arch/arm/dts/tegra186.dtsi |   2 +-
 arch/riscv/dts/fu540-c000-u-boot.dtsi  |  26 +-
 drivers/clk/exynos/clk-exynos7420.c|   2 +-
 drivers/clk/rockchip/clk_rk3399.c  |   2 +-
 drivers/clk/sifive/fu540-prci.c|   8 +-
 drivers/mailbox/tegra-hsp.c|   2 +-
 drivers/net/phy/dp83869.c  |   2 +
 drivers/pinctrl/rockchip/pinctrl-rk3568.c  |  15 +
 dts/Kconfig|  24 +
 include/dt-bindings/arm/coresight-cti-dt.h |  37 -
 include/dt-bindings/arm/ux500_pm_domains.h |  15 -
 include/dt-bindings/ata/ahci.h |  20 -
 include/dt-bindings/bus/moxtet.h   |  16 -
 include/dt-bindings/bus/ti-sysc.h  |  28 -
 include/dt-bindings/clk/ti-dra7-atl.h  |  40 -
 include/dt-bindings/clock/actions,s700-cmu.h   | 118 ---
 include/dt-bindings/clock/actions,s900-cmu.h   | 129 ---
 include/dt-bindings/clock/agilex-clock.h   |  71 --
 include/dt-bindings/clock/am3.h| 227 -
 .../clock/amlogic,a1-peripherals-clkc.h| 168 
 include/dt-bindings/clock/amlogic,a1-pll-clkc.h|  25 -
 include/dt-bindings/clock/ast2600-clock.h  |  62 --
 include/dt-bindings/clock/at91.h   |  23 -
 include/dt-bindings/clock/axg-aoclkc.h |  31 -
 include/dt-bindings/clock/axg-audio-clkc.h |  94 ---
 include/dt-bindings/clock/axg-clkc.h   | 100 ---
 include/dt-bindings/clock/bcm-nsp.h|  51 --
 include/dt-bindings/clock/bcm2835-aux.h|   9 -
 include/dt-bindings/clock/bcm2835.h|  62 --
 

Re: [PATCH 1/2] arm: dts: k3-am64: Sync with kernel v6.7-rc1

[Tom Rini]

On Thu, Feb 01, 2024 at 04:27:40PM -0600, Andrew Davis wrote:

> From: Nishanth Menon 
> 
> Sync with kernel v6.7-rc1 and sync up the u-boot dts files accordingly.
> 
> Signed-off-by: Nishanth Menon 
> Signed-off-by: Andrew Davis 

I'm deferring this series in favor of having these platforms moved to
OF_UPSTREAM in -next, thanks.

-- 
Tom


signature.asc
Description: PGP signature

Re: [PATCH 0/8] Add support for Qualcomm SA8155-ADP board

[Caleb Connolly]

On 04/03/2024 15:51, Volodymyr Babchuk wrote:
> 
> Hi Stephan,
> 
> Stephan Gerhold  writes:
> 
>> On Fri, Mar 01, 2024 at 06:25:39PM +, Volodymyr Babchuk wrote:
>>> Caleb Connolly  writes:
 On 29/02/2024 14:21, Volodymyr Babchuk wrote:
> This patch series adds support for Qualcomm SA8155-ADP development
> board. Main motivation for this series is to allow running
> virtualization software on this board and U-Boot is a good way to
> break Qualcomm's boot chain at EL2 with more convenient ways for
> uploading and running the code. With this patches applied it is
> possible to upload and run Xen on this board. KVM probably should work
> too.

 This is really cool! I've experimented with this on SDM845 and SM8250
 but never really did anything with it... I'd love to take a look at your
 Xen branch?
>>>
>>> Honestly, there is nothing to look at right now. I just implemented
>>> early printk serial driver for the qcom, made hacks to the device tree
>>> and trying to boot Dom0. I already expecting issues with the GPU,
>>> because it has own SMMU without virtualization support and Xen already
>>> complains about it. So I had to remove it from the DTS for a time being.
>>>
>>
>> Did you enable all the clocks/power domains/etc for the GPU SMMU? If I
>> remember correctly it is off by default and all registers read as
>> zeroes. The SMMU driver could easily get confused about the capabilities
>> of the SMMU (e.g. the stage 2/virtualization support) if all the ID
>> registers read as zeroes.
> 
> Ah, this is a great idea, thanks. I tried a quick test by enabling only
> clocks that are provided by GCC, but looks like I need to enable GPUCC
> clocks as well. So I need to write a driver for GPUCC or at least
> figure which registers to write with a debugger. I'll try this later.
> 
> By the way, do you have any suggestion about my second issue? When Linux
> in the Dom0 tries to access UFS, CPU gets a secure interrupt and hangs in
> TZ. I had the same exactly behavior when I tried to access EMAC without 
> enabling
> clocks and power domains in U-Boot. But Linux should enable all
> prerequisites for UFS... I suspect that there is an additional
> initialization needs to be done, but I didn't figured it yet.

Maybe it would be easiest to try enabling UFS in U-Boot first? I have it
working on SDM845 and SM8250, so it should be easy enough to add SM8150
as well...

You can find the UFS and PHY patches in the branch linked below (sorry
it's not very clean... Maybe easier to just add your drivers on top)

This way we can more easily dig in and see what the root cause is.

If you run into issues there let me know and I can maybe give it a try
on an SM8150 HDK.

https://git.codelinaro.org/linaro/qcomlt/u-boot/-/commits/caleb/rbx-integration/?ref_type=HEADS
> 

-- 
// Caleb (they/them)

Re: [PATCH] Makefile: use shell to calculate map_size

[Leon Busch-George]

Oops!
That should have went to the list as well...

On Mon, 4 Mar 2024 15:40:07 +0100
Leon Busch-George  wrote:

> Hi Dragan :-)
> 
> Thanks for your reply!
> 
> On Sat, 02 Mar 2024 22:13:08 +0100
> Dragan Simic  wrote:
> 
> > > + awk '/_image_copy_start/ {start = $$1}
> > > /_image_binary_end/ {end = $$1} END {if (start != "" && end != "")
> > > print "echo $$((0x" toupper(end) " - 0x" toupper(start) "))"}' \
> > >   | sed 's/0X//g' \
> > > - | bc); \
> > > + | sh); \
> > 
> > Maybe "sh -s" could be used instead, just for some additional
> > strictness.
> 
> -s is the default already but I see no reason against adding it.
> Allow me to offer another idea to improve strictness (I'll send a v2):
> 
> awk '.. print end " " start ..' | sh -c 'read end start; echo
> $((end - start))'
> 
> That gets rid off sed and the interface between awk and sh is much
> cleaner (only the two numbers on one line rather than shell code).
> Sadly, the sed 's/0X//g' was introduced without an explanation in
> 3ce7a4fefa and but, looking at it more, I'm farly confident it was
> only for bc.
> 
> kind regards,
> Leon

Re: [PATCH 8/8] board: add support for Qualcomm SA8155P-ADP board

[Volodymyr Babchuk]

Hi Stephan,

Stephan Gerhold  writes:

[...]
>> +This approach ensures that U-Boot is booted in EL2 and it is possible
>> +to run virtualization software (like Xen or KVM) on the board. You
>> +must understand that this approach breaks Qualcomm's boot chain. You
>> +will not be able to call all subsequent loaders, so you will not be
>> +able to use fastboot for example. Use this approach only if you want
>> +to experiment with virtualization on SA8155P-ADP.
>> +
>> +We need to create ELF file from the u-boot binary. We can't use
>> +existing U-Boot ELF, because it does not include appended DTB
>> +file. Easiest way to do this is to use ``create_elf.py`` from the
>> +following repository: `qtestsign(lorc)
>> +> [github[.]com]>`_: ::
>> +
>> +$ python ../qtestsign/create_elf.py u-boot.bin 0x8571 u-boot.mbn
>> +
>
> Have you tried using CONFIG_REMAKE_ELF in U-Boot? That should
> effectively do the same (build a new ELF based on u-boot.bin with the
> appended device tree). The Qualcomm DragonBoard 410c port is using that
> option to solve the same problem.

I didn't knew that there is a such option. Looks like this is exactly
what I need, thank you. I'll include this in the V2.

> But I'm glad to see that the ELF abstractions in qtestsign worked well
> for your purpose. :-)

Well, I was surprised that pyelf can parse ELF files but can't modify
them. So your tool come in handy. I was going to make a PR that adds
this create_elf.py script, but looks like we don't need it.

-- 
WBR, Volodymyr

Re: [PATCH 0/8] Add support for Qualcomm SA8155-ADP board

[Volodymyr Babchuk]

Hi Stephan,

Stephan Gerhold  writes:

> On Fri, Mar 01, 2024 at 06:25:39PM +, Volodymyr Babchuk wrote:
>> Caleb Connolly  writes:
>> > On 29/02/2024 14:21, Volodymyr Babchuk wrote:
>> >> This patch series adds support for Qualcomm SA8155-ADP development
>> >> board. Main motivation for this series is to allow running
>> >> virtualization software on this board and U-Boot is a good way to
>> >> break Qualcomm's boot chain at EL2 with more convenient ways for
>> >> uploading and running the code. With this patches applied it is
>> >> possible to upload and run Xen on this board. KVM probably should work
>> >> too.
>> >
>> > This is really cool! I've experimented with this on SDM845 and SM8250
>> > but never really did anything with it... I'd love to take a look at your
>> > Xen branch?
>> 
>> Honestly, there is nothing to look at right now. I just implemented
>> early printk serial driver for the qcom, made hacks to the device tree
>> and trying to boot Dom0. I already expecting issues with the GPU,
>> because it has own SMMU without virtualization support and Xen already
>> complains about it. So I had to remove it from the DTS for a time being.
>> 
>
> Did you enable all the clocks/power domains/etc for the GPU SMMU? If I
> remember correctly it is off by default and all registers read as
> zeroes. The SMMU driver could easily get confused about the capabilities
> of the SMMU (e.g. the stage 2/virtualization support) if all the ID
> registers read as zeroes.

Ah, this is a great idea, thanks. I tried a quick test by enabling only
clocks that are provided by GCC, but looks like I need to enable GPUCC
clocks as well. So I need to write a driver for GPUCC or at least
figure which registers to write with a debugger. I'll try this later.

By the way, do you have any suggestion about my second issue? When Linux
in the Dom0 tries to access UFS, CPU gets a secure interrupt and hangs in
TZ. I had the same exactly behavior when I tried to access EMAC without enabling
clocks and power domains in U-Boot. But Linux should enable all
prerequisites for UFS... I suspect that there is an additional
initialization needs to be done, but I didn't figured it yet.

-- 
WBR, Volodymyr

[PATCH] e1000: add support for i225-IT

[Marjolaine Amate]

This patch adds support for i225-IT in e1000 driver.
Add e1000_phy_igc.

Signed-off-by: Marjolaine Amate 
---
 drivers/net/e1000.c | 15 ++-
 drivers/net/e1000.h |  2 ++
 include/pci_ids.h   |  2 ++
 3 files changed, 18 insertions(+), 1 deletion(-)

diff --git a/drivers/net/e1000.c b/drivers/net/e1000.c
index 84a2a7cf90..4e7ba66677 100644
--- a/drivers/net/e1000.c
+++ b/drivers/net/e1000.c
@@ -116,6 +116,8 @@ static struct pci_device_id e1000_supported[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_I210_SERDES) },
{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, 
PCI_DEVICE_ID_INTEL_I210_SERDES_FLASHLESS) },
{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_I210_1000BASEKX) 
},
+   { PCI_DEVICE(PCI_VENDOR_ID_INTEL, 
PCI_DEVICE_ID_INTEL_I225_UNPROGRAMMED) },
+   { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_I225_IT) },
 
{}
 };
@@ -1575,6 +1577,8 @@ e1000_set_mac_type(struct e1000_hw *hw)
case PCI_DEVICE_ID_INTEL_I210_SERDES:
case PCI_DEVICE_ID_INTEL_I210_SERDES_FLASHLESS:
case PCI_DEVICE_ID_INTEL_I210_1000BASEKX:
+   case PCI_DEVICE_ID_INTEL_I225_UNPROGRAMMED:
+   case PCI_DEVICE_ID_INTEL_I225_IT:
hw->mac_type = e1000_igb;
break;
default:
@@ -3258,7 +3262,8 @@ e1000_setup_copper_link(struct e1000_hw *hw)
if (ret_val)
return ret_val;
} else if (hw->phy_type == e1000_phy_m88 ||
-   hw->phy_type == e1000_phy_igb) {
+   hw->phy_type == e1000_phy_igb ||
+   hw->phy_type == e1000_phy_igc) {
ret_val = e1000_copper_link_mgp_setup(hw);
if (ret_val)
return ret_val;
@@ -4531,6 +4536,8 @@ e1000_get_phy_cfg_done(struct e1000_hw *hw)
case e1000_igb:
while (timeout) {
if (hw->mac_type == e1000_igb) {
+   if (hw->phy_type == e1000_phy_igc)
+   break;
if (E1000_READ_REG(hw, I210_EEMNGCTL) & 
cfg_mask)
break;
} else {
@@ -4769,6 +4776,7 @@ e1000_phy_reset(struct e1000_hw *hw)
case e1000_phy_igp_3:
case e1000_phy_ife:
case e1000_phy_igb:
+   case e1000_phy_igc:
ret_val = e1000_phy_hw_reset(hw);
if (ret_val)
return ret_val;
@@ -4834,6 +4842,9 @@ static int e1000_set_phy_type (struct e1000_hw *hw)
case I210_I_PHY_ID:
hw->phy_type = e1000_phy_igb;
break;
+   case I225_I_PHY_ID:
+   hw->phy_type = e1000_phy_igc;
+   break;
/* Fall Through */
default:
/* Should never have loaded on this device */
@@ -4941,6 +4952,8 @@ e1000_detect_gig_phy(struct e1000_hw *hw)
case e1000_igb:
if (hw->phy_id == I210_I_PHY_ID)
match = true;
+   if (hw->phy_id == I225_I_PHY_ID)
+   match = true;
break;
default:
DEBUGOUT("Invalid MAC type %d\n", hw->mac_type);
diff --git a/drivers/net/e1000.h b/drivers/net/e1000.h
index f788394da8..e1311126a3 100644
--- a/drivers/net/e1000.h
+++ b/drivers/net/e1000.h
@@ -212,6 +212,7 @@ typedef enum {
e1000_phy_igp_3,
e1000_phy_ife,
e1000_phy_igb,
+   e1000_phy_igc,
e1000_phy_bm,
e1000_phy_undefined = 0xFF
 } e1000_phy_type;
@@ -2420,6 +2421,7 @@ struct e1000_hw {
 #define BME1000_E_PHY_ID 0x01410CB0
 
 #define I210_I_PHY_ID  0x01410C00
+#define I225_I_PHY_ID  0x67C9DCC0
 
 /* Miscellaneous PHY bit definitions. */
 #define PHY_PREAMBLE   0x
diff --git a/include/pci_ids.h b/include/pci_ids.h
index b63bf45168..f1886c3a75 100644
--- a/include/pci_ids.h
+++ b/include/pci_ids.h
@@ -2710,6 +2710,8 @@
 #define PCI_DEVICE_ID_INTEL_I211_COPPER0x1539
 #define PCI_DEVICE_ID_INTEL_I210_COPPER_FLASHLESS  0x157b
 #define PCI_DEVICE_ID_INTEL_I210_SERDES_FLASHLESS  0x157c
+#define PCI_DEVICE_ID_INTEL_I225_UNPROGRAMMED  0x15dF
+#define PCI_DEVICE_ID_INTEL_I225_IT0x0d9f
 #define PCI_DEVICE_ID_INTEL_80960_RP   0x1960
 #define PCI_DEVICE_ID_INTEL_82840_HB   0x1a21
 #define PCI_DEVICE_ID_INTEL_82845_HB   0x1a30
-- 
2.43.0

[PATCH] mtd: spi-nor: Clear Winbond SR3 WPS bit on boot

[Marek Vasut]

Some Winbond SPI NORs have special SR3 register which is
used among other things to control whether non-standard
"Individual Block/Sector Write Protection" (WPS bit)
locking scheme is activated. This non-standard locking
scheme is not supported by either U-Boot or Linux SPI
NOR stack so make sure it is disabled, otherwise the
SPI NOR may appear locked for no obvious reason.

This SR3 WPS appears e.g. on W25Q16FW which has the same ID as
W25Q16DW, but the W25Q16DW does not implement the SR3 WPS bit.

Signed-off-by: Marek Vasut 
---
Cc: Hai Pham 
Cc: Heinrich Schuchardt 
Cc: Jagan Teki 
Cc: Johann Neuhauser 
Cc: Simon Glass 
Cc: Takahiro Kuwano 
Cc: Venkatesh Yadav Abbarapu 
Cc: Vignesh R 
---
 drivers/mtd/spi/spi-nor-core.c | 47 ++
 include/linux/mtd/spi-nor.h|  5 
 2 files changed, 52 insertions(+)

diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
index 9a1801ba93d..68dee57258d 100644
--- a/drivers/mtd/spi/spi-nor-core.c
+++ b/drivers/mtd/spi/spi-nor-core.c
@@ -544,6 +544,24 @@ static int read_cr(struct spi_nor *nor)
 }
 #endif
 
+/**
+ * read_sr3() - Read status register 3 unique to newer Winbond flashes
+ * @nor:   pointer to a 'struct spi_nor'
+ */
+static int read_sr3(struct spi_nor *nor)
+{
+   int ret;
+   u8 val;
+
+   ret = nor->read_reg(nor, SPINOR_OP_RDSR3, , 1);
+   if (ret < 0) {
+   dev_dbg(nor->dev, "error %d reading SR3\n", ret);
+   return ret;
+   }
+
+   return val;
+}
+
 /*
  * Write status register 1 byte
  * Returns negative if error occurred.
@@ -554,6 +572,17 @@ static int write_sr(struct spi_nor *nor, u8 val)
return nor->write_reg(nor, SPINOR_OP_WRSR, nor->cmd_buf, 1);
 }
 
+/**
+ * write_sr3() - Write status register 3 unique to newer Winbond flashes
+ * @nor:   pointer to a 'struct spi_nor'
+ * @val:   value to be written into SR3
+ */
+static int write_sr3(struct spi_nor *nor, u8 val)
+{
+   nor->cmd_buf[0] = val;
+   return nor->write_reg(nor, SPINOR_OP_WRSR3, nor->cmd_buf, 1);
+}
+
 /*
  * Set write enable latch with Write Enable command.
  * Returns negative if error occurred.
@@ -3890,6 +3919,24 @@ static int spi_nor_init(struct spi_nor *nor)
write_enable(nor);
write_sr(nor, 0);
spi_nor_wait_till_ready(nor);
+
+   /*
+* Some Winbond SPI NORs have special SR3 register which is
+* used among other things to control whether non-standard
+* "Individual Block/Sector Write Protection" (WPS bit)
+* locking scheme is activated. This non-standard locking
+* scheme is not supported by either U-Boot or Linux SPI
+* NOR stack so make sure it is disabled, otherwise the
+* SPI NOR may appear locked for no obvious reason.
+*/
+   if (JEDEC_MFR(nor->info) == SNOR_MFR_WINBOND) {
+   err = read_sr3(nor);
+   if (err > 0 && err & SR3_WPS) {
+   write_enable(nor);
+   write_sr3(nor, err & ~SR3_WPS);
+   write_disable(nor);
+   }
+   }
}
 
if (nor->quad_enable) {
diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h
index 2861b73edbc..ceb32e3906f 100644
--- a/include/linux/mtd/spi-nor.h
+++ b/include/linux/mtd/spi-nor.h
@@ -45,6 +45,8 @@
 #define SPINOR_OP_WRSR 0x01/* Write status register 1 byte */
 #define SPINOR_OP_RDSR20x3f/* Read status register 2 */
 #define SPINOR_OP_WRSR20x3e/* Write status register 2 */
+#define SPINOR_OP_RDSR30x15/* Read status register 3 */
+#define SPINOR_OP_WRSR30x11/* Write status register 3 */
 #define SPINOR_OP_READ 0x03/* Read data bytes (low frequency) */
 #define SPINOR_OP_READ_FAST0x0b/* Read data bytes (high frequency) */
 #define SPINOR_OP_READ_1_1_2   0x3b/* Read data bytes (Dual Output SPI) */
@@ -185,6 +187,9 @@
 /* Status Register 2 bits. */
 #define SR2_QUAD_EN_BIT7   BIT(7)
 
+/* Status Register 3 bits. */
+#define SR3_WPSBIT(2)
+
 /* For Cypress flash. */
 #define SPINOR_OP_RD_ANY_REG   0x65/* Read any register */
 #define SPINOR_OP_WR_ANY_REG   0x71/* Write any register */
-- 
2.43.0

Re: [PATCH v2 0/5] TEE: minor cleanup

[Heinrich Schuchardt]

On 04.03.24 16:50, Igor Opaniuk wrote:

Hi Ilias,

On Mon, Mar 4, 2024 at 12:16 PM Ilias Apalodimas
mailto:ilias.apalodi...@linaro.org>> wrote:

Hi Igor,

On Sun, 3 Mar 2024 at 00:01, Igor Opaniuk mailto:igor.opan...@gmail.com>> wrote:
 >
 >
 > - Address some spelling errors and typos
 > - Support CMD_OPTEE_RPMB for SANDBOX configurations and add
python tests
 > - Remove common.h inclusion for drivers/tee
 >
 > Changes in v2:
 > - Fixed chimp_optee.c:37:9: error: implicit declaration of
function 'memset'
 > - Applied R-b and T-b tags

https://source.denx.de/u-boot/custodians/u-boot-tpm/-/pipelines/19808 

this seems to have a few failures

Cheers
/Ilias
 >
 > Igor Opaniuk (5):
 >   tee: optee: fix description in Kconfig
 >   tee: sandbox: fix spelling errors
 >   cmd: optee_rpmb: build cmd for sandbox
 >   test: py: add optee_rpmb tests
 >   tee: remove common.h inclusion
 >
 >  cmd/Kconfig                        |  4 +++-
 >  drivers/tee/broadcom/chimp_optee.c |  3 ++-
 >  drivers/tee/optee/Kconfig          |  2 +-
 >  drivers/tee/optee/core.c           |  1 -
 >  drivers/tee/optee/i2c.c            |  1 -
 >  drivers/tee/optee/rpmb.c           |  1 -
 >  drivers/tee/optee/supplicant.c     |  2 +-
 >  drivers/tee/sandbox.c              | 10 +-
 >  drivers/tee/tee-uclass.c           |  1 -
 >  test/py/tests/test_optee_rpmb.py   | 20 
 >  10 files changed, 32 insertions(+), 13 deletions(-)
 >  create mode 100644 test/py/tests/test_optee_rpmb.py
 >
 > --
 > 2.34.1
 >


It looks like it's a side effect, the test I added revealed a bug in
"cmd/optee_rpmb.c" implementation, which I didn't touch (looks
like it doesn't close the tee session automatically).

I'll address it and add a fix to the patch series.

Just a quick question, are Azure pipelines still used (so I can configure
my own account and run all these before sending patches, as explained
in [1])

[1] https://docs.u-boot.org/en/latest/develop/ci_testing.html



Yes, Azure CI is in use (see https://github.com/u-boot/u-boot).

Creating a pull request for https://github.com/u-boot/u-boot may be the
easier way for a single test run.

Regards

Heinrich

Re: [PATCH v2 0/5] TEE: minor cleanup

[Tom Rini]

On Mon, Mar 04, 2024 at 04:50:48PM +0100, Igor Opaniuk wrote:
> Hi Ilias,
> 
> On Mon, Mar 4, 2024 at 12:16 PM Ilias Apalodimas <
> ilias.apalodi...@linaro.org> wrote:
> 
> > Hi Igor,
> >
> > On Sun, 3 Mar 2024 at 00:01, Igor Opaniuk  wrote:
> > >
> > >
> > > - Address some spelling errors and typos
> > > - Support CMD_OPTEE_RPMB for SANDBOX configurations and add python tests
> > > - Remove common.h inclusion for drivers/tee
> > >
> > > Changes in v2:
> > > - Fixed chimp_optee.c:37:9: error: implicit declaration of function
> > 'memset'
> > > - Applied R-b and T-b tags
> >
> > https://source.denx.de/u-boot/custodians/u-boot-tpm/-/pipelines/19808
> > this seems to have a few failures
> >
> > Cheers
> > /Ilias
> > >
> > > Igor Opaniuk (5):
> > >   tee: optee: fix description in Kconfig
> > >   tee: sandbox: fix spelling errors
> > >   cmd: optee_rpmb: build cmd for sandbox
> > >   test: py: add optee_rpmb tests
> > >   tee: remove common.h inclusion
> > >
> > >  cmd/Kconfig|  4 +++-
> > >  drivers/tee/broadcom/chimp_optee.c |  3 ++-
> > >  drivers/tee/optee/Kconfig  |  2 +-
> > >  drivers/tee/optee/core.c   |  1 -
> > >  drivers/tee/optee/i2c.c|  1 -
> > >  drivers/tee/optee/rpmb.c   |  1 -
> > >  drivers/tee/optee/supplicant.c |  2 +-
> > >  drivers/tee/sandbox.c  | 10 +-
> > >  drivers/tee/tee-uclass.c   |  1 -
> > >  test/py/tests/test_optee_rpmb.py   | 20 
> > >  10 files changed, 32 insertions(+), 13 deletions(-)
> > >  create mode 100644 test/py/tests/test_optee_rpmb.py
> > >
> > > --
> > > 2.34.1
> > >
> >
> 
> It looks like it's a side effect, the test I added revealed a bug in
> "cmd/optee_rpmb.c" implementation, which I didn't touch (looks
> like it doesn't close the tee session automatically).
> 
> I'll address it and add a fix to the patch series.
> 
> Just a quick question, are Azure pipelines still used (so I can configure
> my own account and run all these before sending patches, as explained
> in [1])
> 
> [1] https://docs.u-boot.org/en/latest/develop/ci_testing.html

Yes _but_ sadly sometimes the tests fail and need to be re-run due to
being (I believe) on the free class of machines and so they're a little
too slow and we race condition fail perhaps.

-- 
Tom


signature.asc
Description: PGP signature

Re: [PATCH 1/2] board: phytec: common: phytec_som_detection: Add phytec_get_som_type

[Benjamin Hahn]

On 04.03.24 15:42, Fabio Estevam wrote:
> On Mon, Mar 4, 2024 at 9:31 AM Benjamin Hahn  wrote:
>> Add a function that gets the som_type from the EEPROM.
>> Add an enum for the som_type.
>>
>> Signed-off-by: Benjamin Hahn 
> Your series does not even build:
>
> board/phytec/common/phytec_som_detection.c: In function ‘phytec_get_som_type’:
> board/phytec/common/phytec_som_detection.c:210:18: error: ‘struct
> phytec_eeprom_data’ has no member named ‘valid’
>210 | if (!data->valid || data->data.api_rev < PHYTEC_API_REV2)
>|  ^~
> board/phytec/common/phytec_som_detection.c:210:39: error: ‘union
> ’ has no member named ‘api_rev’
>210 | if (!data->valid || data->data.api_rev < PHYTEC_API_REV2)
>|   ^
> board/phytec/common/phytec_som_detection.c:213:26: error: ‘union
> ’ has no member named ‘data’
>213 | return data->data.data.data_api2.som_type;
>|  ^
> board/phytec/common/phytec_som_detection.c:214:1: warning: control
> reaches end of non-void function [-Wreturn-type]
>214 | }
>| ^

Oh, I'm very sorry about that. Seems like I made some mistakes when 
porting the patches to upstream.

I sent a v2, where I fixed them.

Benjamin

[PATCH v2 2/2] board: phycore_imx8mp: Use 2GHz RAM timings for PCL-070 from pcb_rev 1

[Benjamin Hahn]

We need to differ between PCL-070 and PCM-070. PCL-070 supports 2GHz RAM
timings from pcb rev 1 or newer. PCM-070 supports 2GHz RAM timings from
pcb rev 3 or newer.

Signed-off-by: Benjamin Hahn 
---
 board/phytec/phycore_imx8mp/spl.c | 6 --
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/board/phytec/phycore_imx8mp/spl.c 
b/board/phytec/phycore_imx8mp/spl.c
index d38f6368fe36..15a8c75e9982 100644
--- a/board/phytec/phycore_imx8mp/spl.c
+++ b/board/phytec/phycore_imx8mp/spl.c
@@ -46,8 +46,10 @@ void spl_dram_init(void)
if (!ret)
phytec_print_som_info(NULL);
 
-   ret = phytec_get_rev(NULL);
-   if (ret >= 3 && ret != PHYTEC_EEPROM_INVAL) {
+   u8 rev = phytec_get_rev(NULL);
+   u8 somtyp = phytec_get_som_type(NULL);
+
+   if (rev != PHYTEC_EEPROM_INVAL && (rev >= 3 || (somtyp == PCL && rev >= 
1))) {
dram_timing.ddrc_cfg[3].val = 0x1323;
dram_timing.ddrc_cfg[4].val = 0x1e84800;
dram_timing.ddrc_cfg[5].val = 0x7a0118;

-- 
2.34.1

[PATCH v2 0/2] board: phytec_imx8mp: Use 2GHz RAM timings for PCL-070 from pcb_rev 1

[Benjamin Hahn]

PCL-070 supports 2GHz RAM-timings from pcb_rev 1 and newer. PCM-070
supports 2GHz RAM-timings only from pcb_rev 3 and newer.

Signed-off-by: Benjamin Hahn 
---
Changes in v2:
- Fix mistakes that prevented building
- Link to v1: 
https://lore.kernel.org/r/20240304-pcl-070-patches-v1-0-6aa6c89e3...@phytec.de

---
Benjamin Hahn (2):
  board: phytec: common: phytec_som_detection: Add phytec_get_som_type
  board: phycore_imx8mp: Use 2GHz RAM timings for PCL-070 from pcb_rev 1

 board/phytec/common/phytec_som_detection.c | 10 ++
 board/phytec/common/phytec_som_detection.h |  8 
 board/phytec/phycore_imx8mp/spl.c  |  6 --
 3 files changed, 22 insertions(+), 2 deletions(-)
---
base-commit: eac52e4be4e234d563d6911737ee7ccdc0ada1f1
change-id: 20240304-pcl-070-patches-d31b989cf5b3

Best regards,
-- 
Benjamin Hahn 

[PATCH v2 1/2] board: phytec: common: phytec_som_detection: Add phytec_get_som_type

[Benjamin Hahn]

Add a function that gets the som_type from the EEPROM.
Add an enum for the som_type.

Signed-off-by: Benjamin Hahn 
---
 board/phytec/common/phytec_som_detection.c | 10 ++
 board/phytec/common/phytec_som_detection.h |  8 
 2 files changed, 18 insertions(+)

diff --git a/board/phytec/common/phytec_som_detection.c 
b/board/phytec/common/phytec_som_detection.c
index c73bf9721b2f..f9607b018dea 100644
--- a/board/phytec/common/phytec_som_detection.c
+++ b/board/phytec/common/phytec_som_detection.c
@@ -203,6 +203,16 @@ u8 __maybe_unused phytec_get_rev(struct phytec_eeprom_data 
*data)
return api2->pcb_rev;
 }
 
+u8 __maybe_unused phytec_get_som_type(struct phytec_eeprom_data *data)
+{
+   if (!data)
+   data = _data;
+   if (data->api_rev < PHYTEC_API_REV2)
+   return PHYTEC_EEPROM_INVAL;
+
+   return data->data.data_api2.som_type;
+}
+
 #else
 
 inline int phytec_eeprom_data_setup(struct phytec_eeprom_data *data,
diff --git a/board/phytec/common/phytec_som_detection.h 
b/board/phytec/common/phytec_som_detection.h
index 11009240875c..c0f0c57a6123 100644
--- a/board/phytec/common/phytec_som_detection.h
+++ b/board/phytec/common/phytec_som_detection.h
@@ -19,6 +19,13 @@ enum {
PHYTEC_API_REV2,
 };
 
+enum phytec_som_type_str {
+   PCM = 0,
+   PCL,
+   KSM,
+   KSP,
+};
+
 static const char * const phytec_som_type_str[] = {
"PCM",
"PCL",
@@ -67,5 +74,6 @@ void __maybe_unused phytec_print_som_info(struct 
phytec_eeprom_data *data);
 
 char * __maybe_unused phytec_get_opt(struct phytec_eeprom_data *data);
 u8 __maybe_unused phytec_get_rev(struct phytec_eeprom_data *data);
+u8 __maybe_unused phytec_get_som_type(struct phytec_eeprom_data *data);
 
 #endif /* _PHYTEC_SOM_DETECTION_H */

-- 
2.34.1

Re: [PATCH v2 0/5] TEE: minor cleanup

[Igor Opaniuk]

Hi Ilias,

On Mon, Mar 4, 2024 at 12:16 PM Ilias Apalodimas <
ilias.apalodi...@linaro.org> wrote:

> Hi Igor,
>
> On Sun, 3 Mar 2024 at 00:01, Igor Opaniuk  wrote:
> >
> >
> > - Address some spelling errors and typos
> > - Support CMD_OPTEE_RPMB for SANDBOX configurations and add python tests
> > - Remove common.h inclusion for drivers/tee
> >
> > Changes in v2:
> > - Fixed chimp_optee.c:37:9: error: implicit declaration of function
> 'memset'
> > - Applied R-b and T-b tags
>
> https://source.denx.de/u-boot/custodians/u-boot-tpm/-/pipelines/19808
> this seems to have a few failures
>
> Cheers
> /Ilias
> >
> > Igor Opaniuk (5):
> >   tee: optee: fix description in Kconfig
> >   tee: sandbox: fix spelling errors
> >   cmd: optee_rpmb: build cmd for sandbox
> >   test: py: add optee_rpmb tests
> >   tee: remove common.h inclusion
> >
> >  cmd/Kconfig|  4 +++-
> >  drivers/tee/broadcom/chimp_optee.c |  3 ++-
> >  drivers/tee/optee/Kconfig  |  2 +-
> >  drivers/tee/optee/core.c   |  1 -
> >  drivers/tee/optee/i2c.c|  1 -
> >  drivers/tee/optee/rpmb.c   |  1 -
> >  drivers/tee/optee/supplicant.c |  2 +-
> >  drivers/tee/sandbox.c  | 10 +-
> >  drivers/tee/tee-uclass.c   |  1 -
> >  test/py/tests/test_optee_rpmb.py   | 20 
> >  10 files changed, 32 insertions(+), 13 deletions(-)
> >  create mode 100644 test/py/tests/test_optee_rpmb.py
> >
> > --
> > 2.34.1
> >
>

It looks like it's a side effect, the test I added revealed a bug in
"cmd/optee_rpmb.c" implementation, which I didn't touch (looks
like it doesn't close the tee session automatically).

I'll address it and add a fix to the patch series.

Just a quick question, are Azure pipelines still used (so I can configure
my own account and run all these before sending patches, as explained
in [1])

[1] https://docs.u-boot.org/en/latest/develop/ci_testing.html
-- 
Best regards - Atentamente - Meilleures salutations

Igor Opaniuk

mailto: igor.opan...@gmail.com
skype: igor.opanyuk
http://ua.linkedin.com/in/iopaniuk

Re: [PATCH] cmd: sf: Fix sf probe crash

[Michael Nazzareno Trimarchi]

Hi

On Mon, Mar 4, 2024 at 4:44 PM Heinrich Schuchardt  wrote:
>
> On 04.03.24 15:47, Weizhao Ouyang wrote:
> > Gentle ping. Not merged yet.
> >
> > BR,
> > Weizhao
>
> Hello Dario,
>
> that patch is in your patchwork review queue. Could you, please, have a
> look.

He is with me, I will ping about all the patches that we need to queue

Michael

>
> Best regards
>
> Heinrich
>
> >
> > On Thu, Jan 4, 2024 at 7:46 PM Weizhao Ouyang  wrote:
> >>
> >> Handle the return value of spi_flash_probe_bus_cs() to avoid sf probe
> >> crashes.
> >>
> >> Signed-off-by: Weizhao Ouyang 
> >> ---
> >>   cmd/sf.c | 5 +++--
> >>   1 file changed, 3 insertions(+), 2 deletions(-)
> >>
> >> diff --git a/cmd/sf.c b/cmd/sf.c
> >> index 730996c02b..e3866899f6 100644
> >> --- a/cmd/sf.c
> >> +++ b/cmd/sf.c
> >> @@ -135,8 +135,9 @@ static int do_spi_flash_probe(int argc, char *const 
> >> argv[])
> >>  }
> >>  flash = NULL;
> >>  if (use_dt) {
> >> -   spi_flash_probe_bus_cs(bus, cs, );
> >> -   flash = dev_get_uclass_priv(new);
> >> +   ret = spi_flash_probe_bus_cs(bus, cs, );
> >> +   if (!ret)
> >> +   flash = dev_get_uclass_priv(new);
> >>  } else {
> >>  flash = spi_flash_probe(bus, cs, speed, mode);
> >>  }
> >> --
> >> 2.39.2
> >>
>


-- 
Michael Nazzareno Trimarchi
Co-Founder & Chief Executive Officer
M. +39 347 913 2170
mich...@amarulasolutions.com
__

Amarula Solutions BV
Joop Geesinkweg 125, 1114 AB, Amsterdam, NL
T. +31 (0)85 111 9172
i...@amarulasolutions.com
www.amarulasolutions.com

Re: [PATCH] cmd: sf: Fix sf probe crash

[Heinrich Schuchardt]

On 04.03.24 15:47, Weizhao Ouyang wrote:

Gentle ping. Not merged yet.

BR,
Weizhao


Hello Dario,

that patch is in your patchwork review queue. Could you, please, have a
look.

Best regards

Heinrich



On Thu, Jan 4, 2024 at 7:46 PM Weizhao Ouyang  wrote:


Handle the return value of spi_flash_probe_bus_cs() to avoid sf probe
crashes.

Signed-off-by: Weizhao Ouyang 
---
  cmd/sf.c | 5 +++--
  1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/cmd/sf.c b/cmd/sf.c
index 730996c02b..e3866899f6 100644
--- a/cmd/sf.c
+++ b/cmd/sf.c
@@ -135,8 +135,9 @@ static int do_spi_flash_probe(int argc, char *const argv[])
 }
 flash = NULL;
 if (use_dt) {
-   spi_flash_probe_bus_cs(bus, cs, );
-   flash = dev_get_uclass_priv(new);
+   ret = spi_flash_probe_bus_cs(bus, cs, );
+   if (!ret)
+   flash = dev_get_uclass_priv(new);
 } else {
 flash = spi_flash_probe(bus, cs, speed, mode);
 }
--
2.39.2

Re: [PATCH] mmc: arm_pl180: Limit data transfer to U16_MAX

[Lean Sheng Tan]

Quick reminder:
Can anyone help to review this?
Thanks!

Best Regards,
*Lean Sheng Tan*



9elements GmbH, Kortumstraße 19-21, 44787 Bochum, Germany
Email: sheng@9elements.com
Phone: *+49 234 68 94 188 <+492346894188>*
Mobile: *+49 176 76 113842 <+4917676113842>*

Registered office: Bochum
Commercial register: Amtsgericht Bochum, HRB 17519
Management: Sebastian German, Eray Bazaar

Data protection information according to Art. 13 GDPR



On Tue, 27 Feb 2024 at 22:02,  wrote:

> From: max 
>
> Currently fetching files bigger that cause a data transfer greater than
> U16_MAX fails.
>
> The reason is that the specification defines the datalength register
> as a 16 bit wide register, but in u-boot it is used as if it is an
> 32 bit register. Therefore values greater than U16_MAX cause an
> infinite loop inside u-boot. U-boot expects to get more data from
> interface/hardware then it will ever get and therefore inifintely waits
> for more data that will never come.
>
> Signed-off-by: max 
> Cc: Peng Fan 
> Cc: Jaehoon Chung 
> ---
>  drivers/mmc/arm_pl180_mmci.c | 11 +++
>  1 file changed, 11 insertions(+)
>
> diff --git a/drivers/mmc/arm_pl180_mmci.c b/drivers/mmc/arm_pl180_mmci.c
> index 5cf5502ed5..af2f9a5a84 100644
> --- a/drivers/mmc/arm_pl180_mmci.c
> +++ b/drivers/mmc/arm_pl180_mmci.c
> @@ -231,6 +231,7 @@ static int do_data_transfer(struct mmc *dev,
> u32 blksz = 0;
> u32 data_ctrl = 0;
> u32 data_len = (u32) (data->blocks * data->blocksize);
> +   assert(data_len < U16_MAX); // should be ensured by
> arm_pl180_get_b_max
>
> if (!host->version2) {
> blksz = (ffs(data->blocksize) - 1);
> @@ -358,6 +359,14 @@ static int  host_set_ios(struct mmc *dev)
> return 0;
>  }
>
> +static int arm_pl180_get_b_max(struct udevice *dev, void *dst, lbaint_t
> blkcnt)
> +{
> +   struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
> +   struct mmc *mmc = upriv->mmc;
> +
> +   return U16_MAX / mmc->read_bl_len;
> +}
> +
>  #ifndef CONFIG_DM_MMC
>  /* MMC uses open drain drivers in the enumeration phase */
>  static int mmc_host_reset(struct mmc *dev)
> @@ -373,6 +382,7 @@ static const struct mmc_ops arm_pl180_mmci_ops = {
> .send_cmd = host_request,
> .set_ios = host_set_ios,
> .init = mmc_host_reset,
> +   .get_b_max = arm_pl180_get_b_max,
>  };
>
>  /*
> @@ -531,6 +541,7 @@ static const struct dm_mmc_ops arm_pl180_dm_mmc_ops = {
> .send_cmd = dm_host_request,
> .set_ios = dm_host_set_ios,
> .get_cd = dm_mmc_getcd,
> +   .get_b_max = arm_pl180_get_b_max,
>  };
>
>  static int arm_pl180_mmc_of_to_plat(struct udevice *dev)
> --
> 2.43.0
>
>

Re: [PATCH v2] scripts: dtc-version: Don't show error messages

[Dragan Simic]

On 2024-03-04 16:28, Tom Rini wrote:

On Tue, Feb 06, 2024 at 12:00:04PM +0100, Dragan Simic wrote:

Prevent the error messages produced by which(1), such as the one 
quoted

below, from being visible in the build outputs.

which: no dtc in (./scripts/dtc)

This makes the build outputs look a tiny bit cleaner.

Signed-off-by: Dragan Simic 
Reviewed-by: Quentin Schulz 


Applied to u-boot/next, thanks!


Great, thank you!

Re: [PATCH v2] board: synquacer: developerbox: add myself as maintainer

[Tom Rini]

On Fri, Mar 01, 2024 at 01:38:39PM +0900, Masahisa Kojima wrote:

> Add myself as maintainer for SynQuacer Developerbox,
> as I'm currently working on it.
> This commit also removes Jassi from maintainer since he
> no longer has a Developerbox.
> 
> Cc: Jassi Brar 
> Signed-off-by: Masahisa Kojima 
> Acked-by: Jassi Brar 

Applied to u-boot/next, thanks!

-- 
Tom


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Re: [PATCH v2] cmd: eeprom: Fix config dependency

[Tom Rini]

On Fri, Feb 23, 2024 at 05:14:20PM +, Ivan Orlov wrote:

> We should have CONFIG_DM_I2C or CONFIG_SYS_I2C_LEGACY enabled in
> order for `cmd/eeprom.c` to compile as it depends on the i2c functions
> which are not compiled otherwise. Update the Kconfig entry for the
> 'eeprom' command correspondingly.
> 
> Signed-off-by: Ivan Orlov 
> Reviewed-by: Tom Rini 

Applied to u-boot/next, thanks!

-- 
Tom


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Re: [PATCH v3 1/1] Makefile: pass -undef option to cmd_gen_envp

[Tom Rini]

On Fri, Feb 23, 2024 at 12:42:06PM +0100, Sébastien Szymanski wrote:

> Without the '-undef' option, the 'linux' string in .env files is
> replaced with the string '1 '.
> For example, in the board/armadeus/opos6uldev/opos6uldev.env file,
> 
> kernelimg=opos6ul-linux.bin
> 
> becomes
> 
> kernelimg=opos6ul-1 .bin
> 
> in the include/generated/env.in file.
> 
> That's because 'linux' is a System-specific Predefined Macros. [1]
> 
> Pass the '-undef' option to fix this issue.
> 
> [1] 
> https://gcc.gnu.org/onlinedocs/gcc-13.2.0/cpp/System-specific-Predefined-Macros.html
> 
> Signed-off-by: Sébastien Szymanski 
> Reviewed-by: Tom Rini 

Applied to u-boot/next, thanks!

-- 
Tom


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Re: [PATCH 1/1] ext4: detect directories in ext4fs_exists()

[Tom Rini]

On Tue, Feb 20, 2024 at 12:54:23PM +0100, Heinrich Schuchardt wrote:

> While fat_exists() reports directories and files as existing
> ext4fs_exists() only recognizes files. This lead to errors
> when using systemd-boot with an ext4 file-system.
> 
> Change ext4fs_exists() to find any type of inode:
> files, directories, symbolic links.
> 
> Fixes: a1596438a689 ("ext4fs ls load support")
> Signed-off-by: Heinrich Schuchardt 

Applied to u-boot/next, thanks!

-- 
Tom


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Re: [PATCH] remove Broadcom Northstar 2 Target entry

[Tom Rini]

On Sun, Feb 18, 2024 at 11:16:20AM +, Peter Robinson wrote:

> The Broadcom Northstar 2 support was removed when the
> bcm958712k board was removed but the target entry was
> missed so clean that up as well.
> 
> Fixes: d59bc09d829 ("arm: Remove bcm958712k board")
> Signed-off-by: Peter Robinson 
> Reviewed-by: Heinrich Schuchardt 

Applied to u-boot/next, thanks!

-- 
Tom


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