Re: [PATCH 0/4] Generate capsules from config files

[Sughosh Ganu]

hi Bence,

On Tue, 12 Mar 2024 at 20:28, Bence Balogh  wrote:
>
> Hello Sughosh,
>
> We are planning to use these changes in the Corstone-1000 platform.
> Do you have a timeline when these are going to get merged?

I will prioritize this task since you want to use these changes. I
need to send some changes which Simon has asked for. Once those
changes go through, these patches also should be merged. Will work on
this task. Thanks for letting me know.

-sughosh

>
> Thanks,
> Bence
>
> On Tue, Nov 21, 2023 at 12:30:24PM +0530, Sughosh Ganu wrote:
> >
> > Add support for generating capsules through a config file. Multiple
> > capsules can be generated through a single invocation of the
> > mkeficapsule tool, where the capsule parameters are fetched from the
> > config file.
> >
> > The format of the config file pretty similar to the one used by the
> > capsule generation tool in EDKII.
> >
> > The functionality is enabled on the sandbox variant and the EFI
> > capsule update test is now configured to generate the capsules through
> > a config file. The sandbox_flattree variant generates capsules through
> > binman, thus covering both the paths.
> >
> > Sughosh Ganu (4):
> >   tools: mkeficapsule: Add support for parsing capsule params from
> > config file
> >   doc: Document capsule generation through a config file
> >   sandbox: capsule: Add a config file for generating capsules
> >   test: capsule: Generate capsules through config file
> >
> >  configs/sandbox_defconfig |   2 +
> >  doc/develop/uefi/uefi.rst |  70 
> >  .../test_efi_capsule/capsule_gen_binman.dts   |   2 +
> >  test/py/tests/test_efi_capsule/conftest.py|   7 +
> >  .../test_efi_capsule/sandbox_capsule_cfg.txt  | 162 
> >  tools/Kconfig |  15 +
> >  tools/Makefile|   1 +
> >  tools/eficapsule.h| 114 ++
> >  tools/mkeficapsule.c  |  87 +++--
> >  tools/mkeficapsule_parse.c| 352 ++
> >  10 files changed, 781 insertions(+), 31 deletions(-)
> >  create mode 100644 test/py/tests/test_efi_capsule/sandbox_capsule_cfg.txt
> >  create mode 100644 tools/mkeficapsule_parse.c
> >
> > --
> > 2.34.1
> >
> >

[PATCH] mtd: nand: raw: mt7621-nand: allow writing ecc region in raw mode

[Weijie Gao]

Allow writing ecc parity region in raw mode. This makes sure the
nand write.raw command can write the flash data as-is.

Change-Id: Ibed3bdf13c9cf81e54041c5ac7a78192b97dcedc
Signed-off-by: Weijie Gao 
CR-Id: WCNCR00180092
---
 drivers/mtd/nand/raw/mt7621_nand.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/mtd/nand/raw/mt7621_nand.c 
b/drivers/mtd/nand/raw/mt7621_nand.c
index f6eddb84a9..341ef0bf2d 100644
--- a/drivers/mtd/nand/raw/mt7621_nand.c
+++ b/drivers/mtd/nand/raw/mt7621_nand.c
@@ -1003,9 +1003,9 @@ static int mt7621_nfc_write_page_raw(struct mtd_info *mtd,
mt7621_nfc_write_data(nfc, oob_fdm_ptr(nand, i),
  NFI_FDM_SIZE);
 
-   /* Write dummy ECC parity data */
-   mt7621_nfc_write_data_empty(nfc, nfc->spare_per_sector -
-   NFI_FDM_SIZE);
+   /* Write ECC parity data */
+   mt7621_nfc_write_data(nfc, oob_ecc_ptr(nfc, i),
+ nfc->spare_per_sector - NFI_FDM_SIZE);
}
 
mt7621_nfc_wait_write_completion(nfc, nand);
-- 
2.34.1

RE: [PATCH v4 1/1] arch: arm: Agilex5 enablement

[Chee, Tien Fong]

Hi,

> -Original Message-
> From: Lim, Jit Loon 
> Sent: Tuesday, March 12, 2024 10:01 PM
> To: u-boot@lists.denx.de
> Cc: Jagan Teki ; Marek ;
> Simon ; Chee, Tien Fong
> ; Hea, Kok Kiang ;
> Maniyam, Dinesh ; Ng, Boon Khai
> ; Yuslaimi, Alif Zakuan
> ; Chong, Teik Heng
> ; Zamri, Muhammad Hazim Izzat
> ; Lim, Jit Loon
> ; Tang, Sieu Mun ; Bin
> Meng 
> Subject: [PATCH v4 1/1] arch: arm: Agilex5 enablement
> 
> This patch is to enable Agilex5 platform for Intel
> product. Changes, modification and new files are
> created for board, dts, configs and makefile to
> create the base for Agilex5.
> 
> Signed-off-by: Jit Loon Lim 
> 
> ---
> Changes v3 -> v4:
> - Update defined to is_enabled
> Changes v2 -> v3:
> - Added FPGA 240G DDR region
> Changes v1 -> v2:
> - fixed git auto merge issue
> ---
>  arch/arm/Kconfig  |   4 +-
>  arch/arm/dts/Makefile |   1 +
>  arch/arm/dts/socfpga_agilex5-u-boot.dtsi  |  71 ++
>  arch/arm/dts/socfpga_agilex5.dtsi | 575 ++
>  .../arm/dts/socfpga_agilex5_socdk-u-boot.dtsi | 133 
>  arch/arm/dts/socfpga_agilex5_socdk.dts| 163 
>  arch/arm/dts/socfpga_soc64_fit-u-boot.dtsi|  38 +-
>  arch/arm/mach-socfpga/Kconfig |  19 +-
>  arch/arm/mach-socfpga/Makefile|  14 +-
>  arch/arm/mach-socfpga/board.c |  56 +-
>  arch/arm/mach-socfpga/clock_manager_agilex5.c |  89 +++
>  .../include/mach/base_addr_soc64.h|  38 +-
>  .../mach-socfpga/include/mach/clock_manager.h |   4 +-
>  .../include/mach/clock_manager_agilex5.h  |  12 +
>  .../mach-socfpga/include/mach/handoff_soc64.h |  31 +-
>  .../mach-socfpga/include/mach/mailbox_s10.h   |   1 +
>  arch/arm/mach-socfpga/mmu-arm64_s10.c |  59 +-
>  board/intel/agilex5-socdk/MAINTAINERS |   8 +
>  configs/socfpga_agilex5_defconfig | 116 +++
>  drivers/clk/altera/Makefile   |   1 +
>  drivers/clk/altera/clk-agilex5.c  | 743 ++
>  drivers/clk/altera/clk-agilex5.h  | 284 +++
>  include/configs/socfpga_agilex5_socdk.h   |  12 +
>  include/configs/socfpga_soc64_common.h| 143 +++-
>  include/dt-bindings/clock/agilex5-clock.h |  71 ++
>  include/dt-bindings/reset/altr,rst-mgr-agx5.h |  80 ++
>  26 files changed, 2730 insertions(+), 36 deletions(-)
>  create mode 100644 arch/arm/dts/socfpga_agilex5-u-boot.dtsi
>  create mode 100644 arch/arm/dts/socfpga_agilex5.dtsi
>  create mode 100644 arch/arm/dts/socfpga_agilex5_socdk-u-boot.dtsi
>  create mode 100644 arch/arm/dts/socfpga_agilex5_socdk.dts
>  create mode 100644 arch/arm/mach-socfpga/clock_manager_agilex5.c
>  create mode 100644 arch/arm/mach-
> socfpga/include/mach/clock_manager_agilex5.h
>  create mode 100644 board/intel/agilex5-socdk/MAINTAINERS
>  create mode 100644 configs/socfpga_agilex5_defconfig
>  create mode 100644 drivers/clk/altera/clk-agilex5.c
>  create mode 100644 drivers/clk/altera/clk-agilex5.h
>  create mode 100644 include/configs/socfpga_agilex5_socdk.h
>  create mode 100644 include/dt-bindings/clock/agilex5-clock.h
>  create mode 100644 include/dt-bindings/reset/altr,rst-mgr-agx5.h
> 
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index fde85dc0d5..6df805f44c 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -28,6 +28,7 @@ config COUNTER_FREQUENCY
>   ROCKCHIP_RK3288 || ROCKCHIP_RK322X ||
> ROCKCHIP_RK3036
>   default 2500 if ARCH_LX2160A || ARCH_LX2162A ||
> ARCH_LS1088A
>   default 1 if ARCH_ZYNQMP
> + default 2 if ARCH_SOCFPGA && ARM64 &&
> TARGET_SOCFPGA_AGILEX5
>   default 0
>   help
> For platforms with ARMv8-A and ARMv7-A which features a system
> @@ -1124,7 +1125,8 @@ config ARCH_SOCFPGA
>   select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 ||
> TARGET_SOCFPGA_ARRIA10
>   select SYSRESET
>   select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 ||
> TARGET_SOCFPGA_ARRIA10
> - select SYSRESET_SOCFPGA_SOC64 if TARGET_SOCFPGA_SOC64
> + select SYSRESET_SOCFPGA_SOC64 if !TARGET_SOCFPGA_AGILEX5
> && \
> +   TARGET_SOCFPGA_SOC64
>   imply CMD_DM
>   imply CMD_MTDPARTS
>   imply CRC32_VERIFY
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> index d9725030d5..2b4f896ad2 100644
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -548,6 +548,7 @@ dtb-$(CONFIG_TARGET_THUNDERX_88XX) +=
> thunderx-88xx.dtb
> 
>  dtb-$(CONFIG_ARCH_SOCFPGA) +=\
>   socfpga_agilex_socdk.dtb\
> + socfpga_agilex5_socdk.dtb   \
>   socfpga_arria5_secu1.dtb\
>   socfpga_arria5_socdk.dtb\
>   socfpga_arria10_chameleonv3_270_2.dtb   \
> diff --git a/arch/arm/dts/socfpga_agilex5-u-boot.dtsi
> b/arch/arm/dts/socfpga_agilex5-u-boot.dtsi
> new file mode 100644
> 

RE: [PATCH] apalis-imx8: Fix sc_misc_otp_fuse_read() error check

[Peng Fan]

> -Original Message-
> From: Fabio Estevam 
> Sent: Wednesday, March 13, 2024 9:00 AM
> To: feste...@gmail.com
> Cc: Marcel Ziswiler ;
> hiago.fra...@toradex.com; Francesco Dolcini
> ; u-boot@lists.denx.de; Peng Fan
> ; joao.goncal...@toradex.com
> Subject: [PATCH] apalis-imx8: Fix sc_misc_otp_fuse_read() error check
> 
> Commit bfb3409d676f ("imx: toradex/apalis-imx8: correct SCU API usage")
> made an incorrect logic change in the error code check of
> sc_misc_otp_fuse_read():
> 
> -   if (scierr == SC_ERR_NONE) {
> +   if (scierr) {
> /* QP has one A72 core disabled */
> is_quadplus = ((val >> 4) & 0x3) != 0x0;
> }
> 
> The other changes in this commit are correct.
> 
> sc_misc_otp_fuse_read() returns 0 on a successful fuse read.
> 
> This inversion causes board_mem_get_layout() to report incorrect RAM size.
> 
> Go back the original error check logic to fix the problem.
> 
> Fixes: bfb3409d676f ("imx: toradex/apalis-imx8: correct SCU API usage")
> Signed-off-by: Fabio Estevam 

Reviewed-by: Peng Fan 
> ---
>  board/toradex/apalis-imx8/apalis-imx8.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/board/toradex/apalis-imx8/apalis-imx8.c b/board/toradex/apalis-
> imx8/apalis-imx8.c
> index 2483a63c6733..49719f2f5533 100644
> --- a/board/toradex/apalis-imx8/apalis-imx8.c
> +++ b/board/toradex/apalis-imx8/apalis-imx8.c
> @@ -133,7 +133,7 @@ void board_mem_get_layout(u64
> *phys_sdram_1_start,
>   struct tdx_user_fuses tdxramfuses;
>   int scierr = sc_misc_otp_fuse_read(-1, 6, );
> 
> - if (scierr) {
> + if (!scierr) {
>   /* QP has one A72 core disabled */
>   is_quadplus = ((val >> 4) & 0x3) != 0x0;
>   }
> --
> 2.34.1

RE: [PATCH] colibri-imx8x: Fix sc_misc_otp_fuse_read() error check

[Peng Fan]

> Subject: [PATCH] colibri-imx8x: Fix sc_misc_otp_fuse_read() error check
> 
> Commit aa6e698a7acd ("imx: toradex/colibri-imx8x: correct SCU API usage")
> made an incorrect logic change in the error code check of
> sc_misc_otp_fuse_read():
> 
> -   if (sc_err == SC_ERR_NONE) {
> +   if (sc_err) {
> /* DX has two A35 cores disabled */
> return (val & 0xf) != 0x0;
> }
> 
> The other changes in this commit are correct.
> 
> sc_misc_otp_fuse_read() returns 0 on a successful fuse read.
> 
> This inversion causes board_mem_get_layout() to report incorrect RAM size.
> 
> Go back the original error check logic to fix the problem.
> 
> Fixes: aa6e698a7acd ("imx: toradex/colibri-imx8x: correct SCU API usage")
> Reported-by: Hiago De Franco 
> Signed-off-by: Fabio Estevam 

Reviewed-by: Peng Fan 
> ---
>  board/toradex/colibri-imx8x/colibri-imx8x.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/board/toradex/colibri-imx8x/colibri-imx8x.c
> b/board/toradex/colibri-imx8x/colibri-imx8x.c
> index 2c673a4a6b06..6fc8076163c6 100644
> --- a/board/toradex/colibri-imx8x/colibri-imx8x.c
> +++ b/board/toradex/colibri-imx8x/colibri-imx8x.c
> @@ -46,7 +46,7 @@ static int is_imx8dx(void)
>   u32 val = 0;
>   int sc_err = sc_misc_otp_fuse_read(-1, 6, );
> 
> - if (sc_err) {
> + if (!sc_err) {
>   /* DX has two A35 cores disabled */
>   return (val & 0xf) != 0x0;
>   }
> --
> 2.34.1

Re: [PATCH] imx8m*_venice: move venice to OF_UPSTREAM

[Fabio Estevam]

Hi Tim,

On Tue, Mar 12, 2024 at 4:05 PM Tim Harvey  wrote:
>
> Move to imx8m{m,n,p}-venice to OF_UPSTREAM:
>  - replace the non-upstream generic imx8m{m,n,p}-venice dt with one of the
>dt's from the OF_LIST
>  - handle the fact that dtbs now have a 'freescale/' prefix
>  - imply OF_UPSTREAM
>  - remove rudundant files from arch/arm/dts leaving only the
>*-u-boot.dtsi files
>
> Signed-off-by: Tim Harvey 
...
>  33 files changed, 13 insertions(+), 10658 deletions(-)

This diff looks great :-)

Reviewed-by: Fabio Estevam 

I will queue it to u-boot-imx/next soon.

[PATCH] apalis-imx8: Fix sc_misc_otp_fuse_read() error check

[Fabio Estevam]

Commit bfb3409d676f ("imx: toradex/apalis-imx8: correct SCU API usage")
made an incorrect logic change in the error code check of
sc_misc_otp_fuse_read():

-   if (scierr == SC_ERR_NONE) {
+   if (scierr) {
/* QP has one A72 core disabled */
is_quadplus = ((val >> 4) & 0x3) != 0x0;
}

The other changes in this commit are correct.

sc_misc_otp_fuse_read() returns 0 on a successful fuse read.

This inversion causes board_mem_get_layout() to report incorrect RAM size.

Go back the original error check logic to fix the problem.

Fixes: bfb3409d676f ("imx: toradex/apalis-imx8: correct SCU API usage")
Signed-off-by: Fabio Estevam 
---
 board/toradex/apalis-imx8/apalis-imx8.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/board/toradex/apalis-imx8/apalis-imx8.c 
b/board/toradex/apalis-imx8/apalis-imx8.c
index 2483a63c6733..49719f2f5533 100644
--- a/board/toradex/apalis-imx8/apalis-imx8.c
+++ b/board/toradex/apalis-imx8/apalis-imx8.c
@@ -133,7 +133,7 @@ void board_mem_get_layout(u64 *phys_sdram_1_start,
struct tdx_user_fuses tdxramfuses;
int scierr = sc_misc_otp_fuse_read(-1, 6, );
 
-   if (scierr) {
+   if (!scierr) {
/* QP has one A72 core disabled */
is_quadplus = ((val >> 4) & 0x3) != 0x0;
}
-- 
2.34.1

Re: [PATCH] ARM: imx: stm32: Test whether ethernet node is enabled before reading MAC EEPROM on DHSOM

[Fabio Estevam]

Hi Marek,

On Tue, Mar 12, 2024 at 6:16 PM Marek Vasut  wrote:

> NOTE: It is probably best if this goes in via either imx or stm32 tree,
>   I can break the patch up, but that would introduce dependency
>   between two PRs in different trees. Let me know what you prefer.

I can apply it to u-boot-imx next if Patrice and Patrick are OK.

[PATCH] colibri-imx8x: Fix sc_misc_otp_fuse_read() error check

[Fabio Estevam]

Commit aa6e698a7acd ("imx: toradex/colibri-imx8x: correct SCU API usage")
made an incorrect logic change in the error code check of
sc_misc_otp_fuse_read():

-   if (sc_err == SC_ERR_NONE) {
+   if (sc_err) {
/* DX has two A35 cores disabled */
return (val & 0xf) != 0x0;
}

The other changes in this commit are correct.

sc_misc_otp_fuse_read() returns 0 on a successful fuse read.

This inversion causes board_mem_get_layout() to report incorrect RAM size.

Go back the original error check logic to fix the problem.

Fixes: aa6e698a7acd ("imx: toradex/colibri-imx8x: correct SCU API usage")
Reported-by: Hiago De Franco 
Signed-off-by: Fabio Estevam 
---
 board/toradex/colibri-imx8x/colibri-imx8x.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/board/toradex/colibri-imx8x/colibri-imx8x.c 
b/board/toradex/colibri-imx8x/colibri-imx8x.c
index 2c673a4a6b06..6fc8076163c6 100644
--- a/board/toradex/colibri-imx8x/colibri-imx8x.c
+++ b/board/toradex/colibri-imx8x/colibri-imx8x.c
@@ -46,7 +46,7 @@ static int is_imx8dx(void)
u32 val = 0;
int sc_err = sc_misc_otp_fuse_read(-1, 6, );
 
-   if (sc_err) {
+   if (!sc_err) {
/* DX has two A35 cores disabled */
return (val & 0xf) != 0x0;
}
-- 
2.34.1

[PATCH v2 12/12] rockchip: board: Move gpt_capsule_update_setup() call

[Jonas Karlman]

Move the call to gpt_capsule_update_setup() from the weak function
rk_board_late_init() into the main board_late_init() function.

Also change to use IS_ENABLED() instead for defined().

Signed-off-by: Jonas Karlman 
---
v2:
- New patch, split from "board: rockchip: Add a common ROCK Pi 4 target"
---
 arch/arm/mach-rockchip/board.c | 10 +-
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 4f666aee706f..dea5805c4665 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -34,7 +34,7 @@
 #include 
 #include 
 
-#if defined(CONFIG_EFI_HAVE_CAPSULE_SUPPORT) && defined(CONFIG_EFI_PARTITION)
+#if IS_ENABLED(CONFIG_EFI_HAVE_CAPSULE_SUPPORT) && 
IS_ENABLED(CONFIG_EFI_PARTITION)
 
 #define DFU_ALT_BUF_LENSZ_1K
 
@@ -185,10 +185,6 @@ static void gpt_capsule_update_setup(void)
 
 __weak int rk_board_late_init(void)
 {
-#if defined(CONFIG_EFI_HAVE_CAPSULE_SUPPORT) && defined(CONFIG_EFI_PARTITION)
-   gpt_capsule_update_setup();
-#endif
-
return 0;
 }
 
@@ -196,6 +192,10 @@ int board_late_init(void)
 {
setup_boot_mode();
 
+#if IS_ENABLED(CONFIG_EFI_HAVE_CAPSULE_SUPPORT) && 
IS_ENABLED(CONFIG_EFI_PARTITION)
+   gpt_capsule_update_setup();
+#endif
+
return rk_board_late_init();
 }
 
-- 
2.43.2

[PATCH v2 10/12] rockchip: theobroma-systems: puma: Migrate to use IO-domain driver

[Jonas Karlman]

Switch to use the IO-domain driver to configure IO-domain based on
device tree instead of a setup_iodomain() function.

Signed-off-by: Jonas Karlman 
Reviewed-by: Kever Yang 
---
v2:
- Collect r-b tag
---
 .../puma_rk3399/puma-rk3399.c | 21 ---
 configs/puma-rk3399_defconfig |  1 +
 2 files changed, 1 insertion(+), 21 deletions(-)

diff --git a/board/theobroma-systems/puma_rk3399/puma-rk3399.c 
b/board/theobroma-systems/puma_rk3399/puma-rk3399.c
index 8b998ef45565..eeb8a99231e4 100644
--- a/board/theobroma-systems/puma_rk3399/puma-rk3399.c
+++ b/board/theobroma-systems/puma_rk3399/puma-rk3399.c
@@ -3,31 +3,10 @@
  * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
  */
 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
 #include "../common/common.h"
 
-static void setup_iodomain(void)
-{
-   const u32 GRF_IO_VSEL_GPIO4CD_SHIFT = 3;
-   struct rk3399_grf_regs *grf =
-   syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-
-   /*
-* Set bit 3 in GRF_IO_VSEL so PCIE_RST# works (pin GPIO4_C6).
-* Linux assumes that PCIE_RST# works out of the box as it probes
-* PCIe before loading the iodomain driver.
-*/
-   rk_setreg(>io_vsel, 1 << GRF_IO_VSEL_GPIO4CD_SHIFT);
-}
-
 int rockchip_early_misc_init_r(void)
 {
-   setup_iodomain();
setup_boottargets();
 
return 0;
diff --git a/configs/puma-rk3399_defconfig b/configs/puma-rk3399_defconfig
index 7e76ec5076f9..c2759e1a9520 100644
--- a/configs/puma-rk3399_defconfig
+++ b/configs/puma-rk3399_defconfig
@@ -66,6 +66,7 @@ CONFIG_GPIO_HOG=y
 CONFIG_SPL_GPIO_HOG=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_ROCKCHIP_IODOMAIN=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_MMC_SDHCI=y
-- 
2.43.2

[PATCH v2 11/12] rockchip: google: gru: Migrate to use IO-domain driver

[Jonas Karlman]

Switch to use the IO-domain driver to configure IO-domain based on
device tree instead of a setup_iodomain() function.

Signed-off-by: Jonas Karlman 
Reviewed-by: Kever Yang 
---
v2:
- Collect r-b tag
---
 board/google/gru/gru.c | 35 --
 configs/chromebook_bob_defconfig   |  1 +
 configs/chromebook_kevin_defconfig |  1 +
 3 files changed, 2 insertions(+), 35 deletions(-)

diff --git a/board/google/gru/gru.c b/board/google/gru/gru.c
index 9cb3a5252047..e08cb42c27ed 100644
--- a/board/google/gru/gru.c
+++ b/board/google/gru/gru.c
@@ -3,18 +3,9 @@
  * Copyright 2018 Google
  */
 
-#include 
 #include 
 #include 
-#include 
 #include 
-#include 
-#include 
-
-#define GRF_IO_VSEL_BT656_SHIFT 0
-#define GRF_IO_VSEL_AUDIO_SHIFT 1
-#define PMUGRF_CON0_VSEL_SHIFT 8
-#define PMUGRF_CON0_VOL_SHIFT 9
 
 #ifdef CONFIG_SPL_BUILD
 /* provided to defeat compiler optimisation in board_init_f() */
@@ -63,29 +54,3 @@ int board_early_init_r(void)
return 0;
 }
 #endif
-
-static void setup_iodomain(void)
-{
-   struct rk3399_grf_regs *grf =
-  syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-   struct rk3399_pmugrf_regs *pmugrf =
-  syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);
-
-   /* BT656 and audio is in 1.8v domain */
-   rk_setreg(>io_vsel, (1 << GRF_IO_VSEL_BT656_SHIFT |
- 1 << GRF_IO_VSEL_AUDIO_SHIFT));
-
-   /*
-* Set GPIO1 1.8v/3.0v source select to PMU1830_VOL
-* and explicitly configure that PMU1830_VOL to be 1.8V
-*/
-   rk_setreg(>soc_con0, (1 << PMUGRF_CON0_VSEL_SHIFT |
- 1 << PMUGRF_CON0_VOL_SHIFT));
-}
-
-int rockchip_early_misc_init_r(void)
-{
-   setup_iodomain();
-
-   return 0;
-}
diff --git a/configs/chromebook_bob_defconfig b/configs/chromebook_bob_defconfig
index 989a8211f64d..d0321948697b 100644
--- a/configs/chromebook_bob_defconfig
+++ b/configs/chromebook_bob_defconfig
@@ -66,6 +66,7 @@ CONFIG_I2C_CROS_EC_TUNNEL=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_I2C_MUX=y
 CONFIG_CROS_EC_KEYB=y
+CONFIG_ROCKCHIP_IODOMAIN=y
 CONFIG_CROS_EC=y
 CONFIG_CROS_EC_SPI=y
 CONFIG_PWRSEQ=y
diff --git a/configs/chromebook_kevin_defconfig 
b/configs/chromebook_kevin_defconfig
index 07a96aa18989..120c11c04972 100644
--- a/configs/chromebook_kevin_defconfig
+++ b/configs/chromebook_kevin_defconfig
@@ -67,6 +67,7 @@ CONFIG_I2C_CROS_EC_TUNNEL=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_I2C_MUX=y
 CONFIG_CROS_EC_KEYB=y
+CONFIG_ROCKCHIP_IODOMAIN=y
 CONFIG_CROS_EC=y
 CONFIG_CROS_EC_SPI=y
 CONFIG_PWRSEQ=y
-- 
2.43.2

[PATCH v2 09/12] rockchip: vamrs: rock960: Migrate to use IO-domain driver

[Jonas Karlman]

Switch to use the IO-domain driver to configure IO-domain based on
device tree instead of a setup_iodomain() function.

Signed-off-by: Jonas Karlman 
Reviewed-by: Kever Yang 
---
v2:
- Collect r-b tag
---
 board/vamrs/rock960_rk3399/Makefile |  6 -
 board/vamrs/rock960_rk3399/rock960-rk3399.c | 27 -
 configs/ficus-rk3399_defconfig  |  1 +
 configs/rock960-rk3399_defconfig|  1 +
 4 files changed, 2 insertions(+), 33 deletions(-)
 delete mode 100644 board/vamrs/rock960_rk3399/Makefile
 delete mode 100644 board/vamrs/rock960_rk3399/rock960-rk3399.c

diff --git a/board/vamrs/rock960_rk3399/Makefile 
b/board/vamrs/rock960_rk3399/Makefile
deleted file mode 100644
index 6c3e475b3a85..
--- a/board/vamrs/rock960_rk3399/Makefile
+++ /dev/null
@@ -1,6 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-#
-# Copyright (C) 2018 Manivannan Sadhasivam 
-#
-
-obj-y  += rock960-rk3399.o
diff --git a/board/vamrs/rock960_rk3399/rock960-rk3399.c 
b/board/vamrs/rock960_rk3399/rock960-rk3399.c
deleted file mode 100644
index 876be8ed9e10..
--- a/board/vamrs/rock960_rk3399/rock960-rk3399.c
+++ /dev/null
@@ -1,27 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2018 Manivannan Sadhasivam 
- */
-
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-
-#ifdef CONFIG_MISC_INIT_R
-int misc_init_r(void)
-{
-   struct rk3399_grf_regs *grf =
-   syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-
-   /**
-* Some SSD's to work on rock960 would require explicit
-* domain voltage change, so BT565 is in 1.8v domain
-*/
-   rk_setreg(>io_vsel, BIT(0));
-
-   return 0;
-}
-#endif
diff --git a/configs/ficus-rk3399_defconfig b/configs/ficus-rk3399_defconfig
index 90b07d847cc1..4859042d6b56 100644
--- a/configs/ficus-rk3399_defconfig
+++ b/configs/ficus-rk3399_defconfig
@@ -42,6 +42,7 @@ CONFIG_SYS_MMC_ENV_DEV=1
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_ROCKCHIP_IODOMAIN=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_MMC_SDHCI=y
diff --git a/configs/rock960-rk3399_defconfig b/configs/rock960-rk3399_defconfig
index 5c0b95f10bd1..13575c580054 100644
--- a/configs/rock960-rk3399_defconfig
+++ b/configs/rock960-rk3399_defconfig
@@ -39,6 +39,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_SYS_MMC_ENV_DEV=1
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_ROCKCHIP_IODOMAIN=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_MMC_SDHCI=y
-- 
2.43.2

[PATCH v2 08/12] rockchip: pine64: pinephone-pro: Migrate to use IO-domain driver

[Jonas Karlman]

Switch to use the IO-domain driver to configure IO-domain based on
device tree instead of a setup_iodomain() function.

Signed-off-by: Jonas Karlman 
Reviewed-by: Kever Yang 
---
v2:
- Collect r-b tag
---
 board/pine64/pinephone-pro-rk3399/Makefile|  1 -
 .../pinephone-pro-rk3399.c| 42 ---
 configs/pinephone-pro-rk3399_defconfig|  1 +
 3 files changed, 1 insertion(+), 43 deletions(-)
 delete mode 100644 board/pine64/pinephone-pro-rk3399/Makefile
 delete mode 100644 board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c

diff --git a/board/pine64/pinephone-pro-rk3399/Makefile 
b/board/pine64/pinephone-pro-rk3399/Makefile
deleted file mode 100644
index 8d9203053e57..
--- a/board/pine64/pinephone-pro-rk3399/Makefile
+++ /dev/null
@@ -1 +0,0 @@
-obj-y  += pinephone-pro-rk3399.o
diff --git a/board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c 
b/board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c
deleted file mode 100644
index 06dc512c57d8..
--- a/board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c
+++ /dev/null
@@ -1,42 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * (C) Copyright 2016 Rockchip Electronics Co., Ltd
- * (C) Copyright 2022 Peter Robinson 
- */
-
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-
-#define GRF_IO_VSEL_BT565_GPIO2AB 1
-#define GRF_IO_VSEL_AUDIO_GPIO3D4A 2
-#define PMUGRF_CON0_VSEL_SHIFT 8
-
-#ifdef CONFIG_MISC_INIT_R
-static void setup_iodomain(void)
-{
-   struct rk3399_grf_regs *grf =
-  syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-   struct rk3399_pmugrf_regs *pmugrf =
-  syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);
-
-   /* BT565 is in 1.8v domain */
-   rk_setreg(>io_vsel,
- GRF_IO_VSEL_BT565_GPIO2AB | GRF_IO_VSEL_AUDIO_GPIO3D4A);
-
-   /* Set GPIO1 1.8v/3.0v source select to PMU1830_VOL */
-   rk_setreg(>soc_con0, 1 << PMUGRF_CON0_VSEL_SHIFT);
-}
-
-int rockchip_early_misc_init_r(void)
-{
-   setup_iodomain();
-
-   return 0;
-
-}
-#endif
diff --git a/configs/pinephone-pro-rk3399_defconfig 
b/configs/pinephone-pro-rk3399_defconfig
index 49d3d0456b57..8c6323f6c516 100644
--- a/configs/pinephone-pro-rk3399_defconfig
+++ b/configs/pinephone-pro-rk3399_defconfig
@@ -48,6 +48,7 @@ CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_LED=y
 CONFIG_LED_GPIO=y
+CONFIG_ROCKCHIP_IODOMAIN=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_MMC_SDHCI=y
-- 
2.43.2

[PATCH v2 06/12] rockchip: pine64: rockpro64: Migrate to use IO-domain driver

[Jonas Karlman]

Switch to use the IO-domain driver to configure IO-domain based on
device tree instead of a setup_iodomain() function.

Signed-off-by: Jonas Karlman 
Reviewed-by: Kever Yang 
---
v2:
- Collect r-b tag
---
 board/pine64/rockpro64_rk3399/Makefile|  7 
 .../rockpro64_rk3399/rockpro64-rk3399.c   | 39 ---
 configs/rockpro64-rk3399_defconfig|  1 +
 3 files changed, 1 insertion(+), 46 deletions(-)
 delete mode 100644 board/pine64/rockpro64_rk3399/Makefile
 delete mode 100644 board/pine64/rockpro64_rk3399/rockpro64-rk3399.c

diff --git a/board/pine64/rockpro64_rk3399/Makefile 
b/board/pine64/rockpro64_rk3399/Makefile
deleted file mode 100644
index b015c47e6fa6..
--- a/board/pine64/rockpro64_rk3399/Makefile
+++ /dev/null
@@ -1,7 +0,0 @@
-#
-# (C) Copyright 2019 Vasily Khoruzhick
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-obj-y  += rockpro64-rk3399.o
diff --git a/board/pine64/rockpro64_rk3399/rockpro64-rk3399.c 
b/board/pine64/rockpro64_rk3399/rockpro64-rk3399.c
deleted file mode 100644
index fd78ad60d14b..
--- a/board/pine64/rockpro64_rk3399/rockpro64-rk3399.c
+++ /dev/null
@@ -1,39 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * (C) Copyright 2019 Vasily Khoruzhick 
- */
-
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-
-#define GRF_IO_VSEL_BT565_SHIFT 0
-#define PMUGRF_CON0_VSEL_SHIFT 8
-
-#ifdef CONFIG_MISC_INIT_R
-static void setup_iodomain(void)
-{
-   struct rk3399_grf_regs *grf =
-   syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-   struct rk3399_pmugrf_regs *pmugrf =
-   syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);
-
-   /* BT565 is in 1.8v domain */
-   rk_setreg(>io_vsel, 1 << GRF_IO_VSEL_BT565_SHIFT);
-
-   /* Set GPIO1 1.8v/3.0v source select to PMU1830_VOL */
-   rk_setreg(>soc_con0, 1 << PMUGRF_CON0_VSEL_SHIFT);
-}
-
-int rockchip_early_misc_init_r(void)
-{
-   setup_iodomain();
-
-   return 0;
-}
-
-#endif
diff --git a/configs/rockpro64-rk3399_defconfig 
b/configs/rockpro64-rk3399_defconfig
index 4de3d5b1c7f8..d66b4a9d8900 100644
--- a/configs/rockpro64-rk3399_defconfig
+++ b/configs/rockpro64-rk3399_defconfig
@@ -52,6 +52,7 @@ CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_LED=y
 CONFIG_LED_GPIO=y
+CONFIG_ROCKCHIP_IODOMAIN=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_MMC_SDHCI=y
-- 
2.43.2

[PATCH v2 07/12] rockchip: pine64: pinebook-pro: Migrate to use IO-domain driver

[Jonas Karlman]

Switch to use the IO-domain driver to configure IO-domain based on
device tree instead of a setup_iodomain() function.

Signed-off-by: Jonas Karlman 
Reviewed-by: Kever Yang 
---
v2:
- Collect r-b tag
---
 board/pine64/pinebook-pro-rk3399/Makefile |  1 -
 .../pinebook-pro-rk3399/pinebook-pro-rk3399.c | 39 ---
 configs/pinebook-pro-rk3399_defconfig |  1 +
 3 files changed, 1 insertion(+), 40 deletions(-)
 delete mode 100644 board/pine64/pinebook-pro-rk3399/Makefile
 delete mode 100644 board/pine64/pinebook-pro-rk3399/pinebook-pro-rk3399.c

diff --git a/board/pine64/pinebook-pro-rk3399/Makefile 
b/board/pine64/pinebook-pro-rk3399/Makefile
deleted file mode 100644
index 2f692a12a673..
--- a/board/pine64/pinebook-pro-rk3399/Makefile
+++ /dev/null
@@ -1 +0,0 @@
-obj-y  += pinebook-pro-rk3399.o
diff --git a/board/pine64/pinebook-pro-rk3399/pinebook-pro-rk3399.c 
b/board/pine64/pinebook-pro-rk3399/pinebook-pro-rk3399.c
deleted file mode 100644
index 0001022c62a6..
--- a/board/pine64/pinebook-pro-rk3399/pinebook-pro-rk3399.c
+++ /dev/null
@@ -1,39 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * (C) Copyright 2016 Rockchip Electronics Co., Ltd
- * (C) Copyright 2020 Peter Robinson 
- */
-
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-
-#define GRF_IO_VSEL_BT565_SHIFT 0
-#define PMUGRF_CON0_VSEL_SHIFT 8
-
-#ifdef CONFIG_MISC_INIT_R
-static void setup_iodomain(void)
-{
-   struct rk3399_grf_regs *grf =
-  syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
-   struct rk3399_pmugrf_regs *pmugrf =
-  syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);
-
-   /* BT565 is in 1.8v domain */
-   rk_setreg(>io_vsel, 1 << GRF_IO_VSEL_BT565_SHIFT);
-
-   /* Set GPIO1 1.8v/3.0v source select to PMU1830_VOL */
-   rk_setreg(>soc_con0, 1 << PMUGRF_CON0_VSEL_SHIFT);
-}
-
-int rockchip_early_misc_init_r(void)
-{
-   setup_iodomain();
-
-   return 0;
-}
-#endif
diff --git a/configs/pinebook-pro-rk3399_defconfig 
b/configs/pinebook-pro-rk3399_defconfig
index 57e614c314e9..23ac24a0bffe 100644
--- a/configs/pinebook-pro-rk3399_defconfig
+++ b/configs/pinebook-pro-rk3399_defconfig
@@ -49,6 +49,7 @@ CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_LED=y
 CONFIG_LED_GPIO=y
+CONFIG_ROCKCHIP_IODOMAIN=y
 CONFIG_MMC_IO_VOLTAGE=y
 CONFIG_SPL_MMC_IO_VOLTAGE=y
 CONFIG_MMC_UHS_SUPPORT=y
-- 
2.43.2

[PATCH v2 04/12] board: rockchip: Add a common ROCK Pi 4 target

[Jonas Karlman]

Move ROCK Pi 4 specific board code from the shared evb_rk3399 target
into its own board target and update related defconfigs to use the new
TARGET_ROCKPI4_RK3399 option.

Signed-off-by: Jonas Karlman 
Reviewed-by: Christopher Obbard 
Reviewed-by: Peter Robinson 
---
v2:
- Use glob pattern
- Collect r-b tags
---
 arch/arm/mach-rockchip/rk3399/Kconfig |  6 
 board/radxa/rockpi4-rk3399/Kconfig| 15 +
 board/radxa/rockpi4-rk3399/MAINTAINERS| 22 +
 .../rockpi4-rk3399}/Makefile  |  2 +-
 .../rockpi4-rk3399/rockpi4-rk3399.c}  | 13 ++--
 board/rockchip/evb_rk3399/MAINTAINERS | 22 -
 configs/rock-4c-plus-rk3399_defconfig |  2 +-
 configs/rock-4se-rk3399_defconfig |  2 +-
 configs/rock-pi-4-rk3399_defconfig|  2 +-
 configs/rock-pi-4c-rk3399_defconfig   |  2 +-
 include/configs/rk3399_common.h   | 16 --
 include/configs/rockpi4-rk3399.h  | 32 +++
 12 files changed, 83 insertions(+), 53 deletions(-)
 create mode 100644 board/radxa/rockpi4-rk3399/Kconfig
 create mode 100644 board/radxa/rockpi4-rk3399/MAINTAINERS
 rename board/{rockchip/evb_rk3399 => radxa/rockpi4-rk3399}/Makefile (79%)
 rename board/{rockchip/evb_rk3399/evb-rk3399.c => 
radxa/rockpi4-rk3399/rockpi4-rk3399.c} (79%)
 create mode 100644 include/configs/rockpi4-rk3399.h

diff --git a/arch/arm/mach-rockchip/rk3399/Kconfig 
b/arch/arm/mach-rockchip/rk3399/Kconfig
index 38904291dfa6..04a84e2f6a04 100644
--- a/arch/arm/mach-rockchip/rk3399/Kconfig
+++ b/arch/arm/mach-rockchip/rk3399/Kconfig
@@ -89,6 +89,11 @@ config TARGET_ROCK960_RK3399
   * 2x USB 3.0 type A, 2x USB 2.0 type A (host mode only),
 1x USB 3.0 type C OTG
 
+config TARGET_ROCKPI4_RK3399
+   bool "Radxa ROCK Pi 4 board"
+   help
+ Support for ROCK Pi 4 board family by Radxa.
+
 config TARGET_ROCKPRO64_RK3399
bool "Pine64 Rockpro64 board"
help
@@ -177,6 +182,7 @@ source "board/google/gru/Kconfig"
 source "board/pine64/pinebook-pro-rk3399/Kconfig"
 source "board/pine64/pinephone-pro-rk3399/Kconfig"
 source "board/pine64/rockpro64_rk3399/Kconfig"
+source "board/radxa/rockpi4-rk3399/Kconfig"
 source "board/rockchip/evb_rk3399/Kconfig"
 source "board/theobroma-systems/puma_rk3399/Kconfig"
 source "board/vamrs/rock960_rk3399/Kconfig"
diff --git a/board/radxa/rockpi4-rk3399/Kconfig 
b/board/radxa/rockpi4-rk3399/Kconfig
new file mode 100644
index ..d82663506b12
--- /dev/null
+++ b/board/radxa/rockpi4-rk3399/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_ROCKPI4_RK3399
+
+config SYS_BOARD
+   default "rockpi4-rk3399"
+
+config SYS_VENDOR
+   default "radxa"
+
+config SYS_CONFIG_NAME
+   default "rockpi4-rk3399"
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+   def_bool y
+
+endif
diff --git a/board/radxa/rockpi4-rk3399/MAINTAINERS 
b/board/radxa/rockpi4-rk3399/MAINTAINERS
new file mode 100644
index ..da5273fb9a39
--- /dev/null
+++ b/board/radxa/rockpi4-rk3399/MAINTAINERS
@@ -0,0 +1,22 @@
+ROCK-PI-4
+M: Jagan Teki 
+R: Jonas Karlman 
+S: Maintained
+F: board/radxa/rockpi4-rk3399/
+F: configs/rock-pi-4-rk3399_defconfig
+F: configs/rock-pi-4c-rk3399_defconfig
+F: arch/arm/dts/rk3399-rock-pi-4*
+
+ROCK-4C+
+M: FUKAUMI Naoki 
+R: Jonas Karlman 
+S: Maintained
+F: configs/rock-4c-plus-rk3399_defconfig
+F: arch/arm/dts/rk3399-rock-4c-plus*
+
+ROCK-4SE
+M: Christopher Obbard 
+R: Jonas Karlman 
+S: Maintained
+F: configs/rock-4se-rk3399_defconfig
+F: arch/arm/dts/rk3399-rock-4se*
diff --git a/board/rockchip/evb_rk3399/Makefile 
b/board/radxa/rockpi4-rk3399/Makefile
similarity index 79%
rename from board/rockchip/evb_rk3399/Makefile
rename to board/radxa/rockpi4-rk3399/Makefile
index aaa51c212e52..3d0225332275 100644
--- a/board/rockchip/evb_rk3399/Makefile
+++ b/board/radxa/rockpi4-rk3399/Makefile
@@ -4,4 +4,4 @@
 # SPDX-License-Identifier: GPL-2.0+
 #
 
-obj-y  += evb-rk3399.o
+obj-y  += rockpi4-rk3399.o
diff --git a/board/rockchip/evb_rk3399/evb-rk3399.c 
b/board/radxa/rockpi4-rk3399/rockpi4-rk3399.c
similarity index 79%
rename from board/rockchip/evb_rk3399/evb-rk3399.c
rename to board/radxa/rockpi4-rk3399/rockpi4-rk3399.c
index ebdd74a7b97f..a533128b92fc 100644
--- a/board/rockchip/evb_rk3399/evb-rk3399.c
+++ b/board/radxa/rockpi4-rk3399/rockpi4-rk3399.c
@@ -3,13 +3,8 @@
  * (C) Copyright 2016 Rockchip Electronics Co., Ltd
  */
 
-#include 
 #include 
 #include 
-#include 
-#include 
-#include 
-#include 
 
 #define ROCKPI4_UPDATABLE_IMAGES   2
 
@@ -24,17 +19,15 @@ struct efi_capsule_update_info update_info = {
 #endif
 
 #ifndef CONFIG_SPL_BUILD
-#if defined(CONFIG_EFI_HAVE_CAPSULE_SUPPORT) && defined(CONFIG_EFI_PARTITION)
+#if IS_ENABLED(CONFIG_EFI_HAVE_CAPSULE_SUPPORT) && 
IS_ENABLED(CONFIG_EFI_PARTITION)
 static bool board_is_rockpi_4b(void)
 {
-   return 

[PATCH v2 05/12] rockchip: io-domain: Add support for RK3399

[Jonas Karlman]

Port the RK3399 part of the Rockchip IO-domain driver from linux.

This differs from linux version in that pmu io iodomain bit is enabled
in the write ops instead of in an init ops as in linux, this way we can
avoid keeping a full state of all supply that have been configured.

Signed-off-by: Jonas Karlman 
Reviewed-by: Quentin Schulz 
Reviewed-by: Kever Yang 
---
v2:
- Collect r-b tags
---
 drivers/misc/rockchip-io-domain.c | 79 +--
 1 file changed, 75 insertions(+), 4 deletions(-)

diff --git a/drivers/misc/rockchip-io-domain.c 
b/drivers/misc/rockchip-io-domain.c
index 3f6227f993f9..0ffea32ef07f 100644
--- a/drivers/misc/rockchip-io-domain.c
+++ b/drivers/misc/rockchip-io-domain.c
@@ -5,7 +5,6 @@
  * Ported from linux drivers/soc/rockchip/io-domain.c
  */
 
-#include 
 #include 
 #include 
 #include 
@@ -28,6 +27,10 @@
 #define MAX_VOLTAGE_1_8198
 #define MAX_VOLTAGE_3_3360
 
+#define RK3399_PMUGRF_CON0 0x180
+#define RK3399_PMUGRF_CON0_VSELBIT(8)
+#define RK3399_PMUGRF_VSEL_SUPPLY_NUM  9
+
 #define RK3568_PMU_GRF_IO_VSEL00x0140
 #define RK3568_PMU_GRF_IO_VSEL10x0144
 #define RK3568_PMU_GRF_IO_VSEL20x0148
@@ -35,10 +38,10 @@
 struct rockchip_iodomain_soc_data {
int grf_offset;
const char *supply_names[MAX_SUPPLIES];
-   int (*write)(struct regmap *grf, int idx, int uV);
+   int (*write)(struct regmap *grf, uint offset, int idx, int uV);
 };
 
-static int rk3568_iodomain_write(struct regmap *grf, int idx, int uV)
+static int rk3568_iodomain_write(struct regmap *grf, uint offset, int idx, int 
uV)
 {
u32 is_3v3 = uV > MAX_VOLTAGE_1_8;
u32 val0, val1;
@@ -78,6 +81,64 @@ static int rk3568_iodomain_write(struct regmap *grf, int 
idx, int uV)
return 0;
 }
 
+static int rockchip_iodomain_write(struct regmap *grf, uint offset, int idx, 
int uV)
+{
+   u32 val;
+
+   /* set value bit */
+   val = (uV > MAX_VOLTAGE_1_8) ? 0 : 1;
+   val <<= idx;
+
+   /* apply hiword-mask */
+   val |= (BIT(idx) << 16);
+
+   return regmap_write(grf, offset, val);
+}
+
+static int rk3399_pmu_iodomain_write(struct regmap *grf, uint offset, int idx, 
int uV)
+{
+   int ret = rockchip_iodomain_write(grf, offset, idx, uV);
+
+   if (!ret && idx == RK3399_PMUGRF_VSEL_SUPPLY_NUM) {
+   /*
+* set pmu io iodomain to also use this framework
+* instead of a special gpio.
+*/
+   u32 val = RK3399_PMUGRF_CON0_VSEL | (RK3399_PMUGRF_CON0_VSEL << 
16);
+   ret = regmap_write(grf, RK3399_PMUGRF_CON0, val);
+   }
+
+   return ret;
+}
+
+static const struct rockchip_iodomain_soc_data soc_data_rk3399 = {
+   .grf_offset = 0xe640,
+   .supply_names = {
+   "bt656-supply", /* APIO2_VDD */
+   "audio-supply", /* APIO5_VDD */
+   "sdmmc-supply", /* SDMMC0_VDD */
+   "gpio1830-supply",  /* APIO4_VDD */
+   },
+   .write = rockchip_iodomain_write,
+};
+
+static const struct rockchip_iodomain_soc_data soc_data_rk3399_pmu = {
+   .grf_offset = 0x180,
+   .supply_names = {
+   NULL,
+   NULL,
+   NULL,
+   NULL,
+   NULL,
+   NULL,
+   NULL,
+   NULL,
+   NULL,
+   "pmu1830-supply",   /* PMUIO2_VDD */
+   },
+   .write = rk3399_pmu_iodomain_write,
+};
+
 static const struct rockchip_iodomain_soc_data soc_data_rk3568_pmu = {
.grf_offset = 0x140,
.supply_names = {
@@ -95,6 +156,14 @@ static const struct rockchip_iodomain_soc_data 
soc_data_rk3568_pmu = {
 };
 
 static const struct udevice_id rockchip_iodomain_ids[] = {
+   {
+   .compatible = "rockchip,rk3399-io-voltage-domain",
+   .data = (ulong)_data_rk3399,
+   },
+   {
+   .compatible = "rockchip,rk3399-pmu-io-voltage-domain",
+   .data = (ulong)_data_rk3399_pmu,
+   },
{
.compatible = "rockchip,rk3568-pmu-io-voltage-domain",
.data = (ulong)_data_rk3568_pmu,
@@ -152,7 +221,9 @@ static int rockchip_iodomain_probe(struct udevice *dev)
continue;
}
 
-   soc_data->write(grf, i, uV);
+   ret = soc_data->write(grf, soc_data->grf_offset, i, uV);
+   if (ret)
+   dev_err(dev, "%s: Couldn't write to GRF\n", 
supply_name);
}
 
return 0;
-- 
2.43.2

[PATCH v2 03/12] board: rockchip: rk3399: Remove unused board_early_init_f functions

[Jonas Karlman]

These functions is excluded from SPL build and BOARD_EARLY_INIT_F is not
enabled for any of the affected boards, so this legacy code is not used.

Rockchip common board code already enable all regulators flagged as
always-on or boot-on in device tree, and fixed/gpio regulators now have
basic reference counting support so the original intent of this code is
no longer valid.

Remove the unneeded and unused code that used to enable usb regulators.

Signed-off-by: Jonas Karlman 
Reviewed-by: Kever Yang 
---
v2:
- Collect r-b tag
---
 board/firefly/roc-pc-rk3399/roc-pc-rk3399.c   | 22 +--
 .../pinebook-pro-rk3399/pinebook-pro-rk3399.c | 22 ---
 .../pinephone-pro-rk3399.c| 22 ---
 board/rockchip/evb_rk3399/evb-rk3399.c| 20 -
 4 files changed, 1 insertion(+), 85 deletions(-)

diff --git a/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c 
b/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c
index 93e7d776fb2f..590519b32af2 100644
--- a/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c
+++ b/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c
@@ -9,32 +9,12 @@
 #include 
 #include 
 #include 
-#include 
 
 #include 
 #include 
 #include 
 
-#ifndef CONFIG_SPL_BUILD
-int board_early_init_f(void)
-{
-   struct udevice *regulator;
-   int ret;
-
-   ret = regulator_get_by_platname("vcc5v0_host", );
-   if (ret) {
-   debug("%s vcc5v0_host init fail! ret %d\n", __func__, ret);
-   goto out;
-   }
-
-   ret = regulator_set_enable(regulator, true);
-   if (ret)
-   debug("%s vcc5v0-host-en set fail! ret %d\n", __func__, ret);
-out:
-   return 0;
-}
-
-#else
+#ifdef CONFIG_SPL_BUILD
 
 #define PMUGRF_BASE0xff32
 #define GPIO0_BASE 0xff72
diff --git a/board/pine64/pinebook-pro-rk3399/pinebook-pro-rk3399.c 
b/board/pine64/pinebook-pro-rk3399/pinebook-pro-rk3399.c
index 5e758ea6cd92..0001022c62a6 100644
--- a/board/pine64/pinebook-pro-rk3399/pinebook-pro-rk3399.c
+++ b/board/pine64/pinebook-pro-rk3399/pinebook-pro-rk3399.c
@@ -11,32 +11,10 @@
 #include 
 #include 
 #include 
-#include 
 
 #define GRF_IO_VSEL_BT565_SHIFT 0
 #define PMUGRF_CON0_VSEL_SHIFT 8
 
-#ifndef CONFIG_SPL_BUILD
-int board_early_init_f(void)
-{
-   struct udevice *regulator;
-   int ret;
-
-   ret = regulator_get_by_platname("vcc5v0_usb", );
-   if (ret) {
-   pr_debug("%s vcc5v0_usb init fail! ret %d\n", __func__, ret);
-   goto out;
-   }
-
-   ret = regulator_set_enable(regulator, true);
-   if (ret)
-   pr_debug("%s vcc5v0-host-en-gpio set fail! ret %d\n", __func__, 
ret);
-
-out:
-   return 0;
-}
-#endif
-
 #ifdef CONFIG_MISC_INIT_R
 static void setup_iodomain(void)
 {
diff --git a/board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c 
b/board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c
index c9b0d5a061d6..06dc512c57d8 100644
--- a/board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c
+++ b/board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c
@@ -11,33 +11,11 @@
 #include 
 #include 
 #include 
-#include 
 
 #define GRF_IO_VSEL_BT565_GPIO2AB 1
 #define GRF_IO_VSEL_AUDIO_GPIO3D4A 2
 #define PMUGRF_CON0_VSEL_SHIFT 8
 
-#ifndef CONFIG_SPL_BUILD
-int board_early_init_f(void)
-{
-   struct udevice *regulator;
-   int ret;
-
-   ret = regulator_get_by_platname("vcc5v0_usb", );
-   if (ret) {
-   pr_debug("%s vcc5v0_usb init fail! ret %d\n", __func__, ret);
-   goto out;
-   }
-
-   ret = regulator_set_enable(regulator, true);
-   if (ret)
-   pr_debug("%s vcc5v0-host-en-gpio set fail! ret %d\n", __func__, 
ret);
-
-out:
-   return 0;
-}
-#endif
-
 #ifdef CONFIG_MISC_INIT_R
 static void setup_iodomain(void)
 {
diff --git a/board/rockchip/evb_rk3399/evb-rk3399.c 
b/board/rockchip/evb_rk3399/evb-rk3399.c
index 3c773d0930cc..ebdd74a7b97f 100644
--- a/board/rockchip/evb_rk3399/evb-rk3399.c
+++ b/board/rockchip/evb_rk3399/evb-rk3399.c
@@ -10,7 +10,6 @@
 #include 
 #include 
 #include 
-#include 
 
 #define ROCKPI4_UPDATABLE_IMAGES   2
 
@@ -25,25 +24,6 @@ struct efi_capsule_update_info update_info = {
 #endif
 
 #ifndef CONFIG_SPL_BUILD
-int board_early_init_f(void)
-{
-   struct udevice *regulator;
-   int ret;
-
-   ret = regulator_get_by_platname("vcc5v0_host", );
-   if (ret) {
-   debug("%s vcc5v0_host init fail! ret %d\n", __func__, ret);
-   goto out;
-   }
-
-   ret = regulator_set_enable(regulator, true);
-   if (ret)
-   debug("%s vcc5v0-host-en set fail! ret %d\n", __func__, ret);
-
-out:
-   return 0;
-}
-
 #if defined(CONFIG_EFI_HAVE_CAPSULE_SUPPORT) && defined(CONFIG_EFI_PARTITION)
 static bool board_is_rockpi_4b(void)
 {
-- 
2.43.2

[PATCH v2 02/12] board: rockchip: rk3399: Add myself as reviewer to MAINTAINERS

[Jonas Karlman]

Add myself as a reviewer for RK3399 boards that I have and can help with
review and testing of defconfig and device tree changes.

Signed-off-by: Jonas Karlman 
Reviewed-by: Kever Yang 
---
v2:
- Collect r-b tag
---
 board/pine64/pinebook-pro-rk3399/MAINTAINERS | 1 +
 board/pine64/rockpro64_rk3399/MAINTAINERS| 1 +
 board/rockchip/evb_rk3399/MAINTAINERS| 3 +++
 3 files changed, 5 insertions(+)

diff --git a/board/pine64/pinebook-pro-rk3399/MAINTAINERS 
b/board/pine64/pinebook-pro-rk3399/MAINTAINERS
index 287ed4346050..2cafd1a41e58 100644
--- a/board/pine64/pinebook-pro-rk3399/MAINTAINERS
+++ b/board/pine64/pinebook-pro-rk3399/MAINTAINERS
@@ -1,5 +1,6 @@
 PINEBOOK_PRO
 M: Peter Robinson 
+R: Jonas Karlman 
 S: Maintained
 F: board/pine64/pinebook-pro-rk3399/
 F: include/configs/pinebook-pro-rk3399.h
diff --git a/board/pine64/rockpro64_rk3399/MAINTAINERS 
b/board/pine64/rockpro64_rk3399/MAINTAINERS
index d9e11f4bab34..42084aef0ebd 100644
--- a/board/pine64/rockpro64_rk3399/MAINTAINERS
+++ b/board/pine64/rockpro64_rk3399/MAINTAINERS
@@ -1,5 +1,6 @@
 ROCKPRO64
 M: Jagan Teki 
+R: Jonas Karlman 
 S: Maintained
 F: board/pine64/rockpro64_rk3399
 F: include/configs/rockpro64_rk3399.h
diff --git a/board/rockchip/evb_rk3399/MAINTAINERS 
b/board/rockchip/evb_rk3399/MAINTAINERS
index f45f81623a3a..7815ea9ff07e 100644
--- a/board/rockchip/evb_rk3399/MAINTAINERS
+++ b/board/rockchip/evb_rk3399/MAINTAINERS
@@ -86,18 +86,21 @@ F:  arch/arm/dts/rk3399-orangepi*
 
 ROCK-4C+
 M: FUKAUMI Naoki 
+R: Jonas Karlman 
 S: Maintained
 F: configs/rock-4c-plus-rk3399_defconfig
 F: arch/arm/dts/rk3399-rock-4c-plus*
 
 ROCK-4SE
 M: Christopher Obbard 
+R: Jonas Karlman 
 S: Maintained
 F: configs/rock-4se-rk3399_defconfig
 F: arch/arm/dts/rk3399-rock-4se*
 
 ROCK-PI-4
 M: Jagan Teki 
+R: Jonas Karlman 
 S: Maintained
 F: configs/rock-pi-4-rk3399_defconfig
 F: configs/rock-pi-4c-rk3399_defconfig
-- 
2.43.2

[PATCH v2 01/12] board: rockchip: rk3399: Add device tree files to MAINTAINERS

[Jonas Karlman]

Update MAINTAINERS files for RK3399 boards to include related device
tree files. Also correct a few filenames.

Signed-off-by: Jonas Karlman 
---
v2:
- Use glob pattern where appropriate
---
 board/firefly/roc-pc-rk3399/MAINTAINERS   |  1 +
 board/pine64/pinebook-pro-rk3399/MAINTAINERS  |  5 ++-
 board/pine64/pinephone-pro-rk3399/MAINTAINERS |  5 ++-
 board/pine64/rockpro64_rk3399/MAINTAINERS |  2 +-
 board/rockchip/evb_rk3399/MAINTAINERS | 35 ++-
 board/vamrs/rock960_rk3399/MAINTAINERS|  2 ++
 6 files changed, 27 insertions(+), 23 deletions(-)

diff --git a/board/firefly/roc-pc-rk3399/MAINTAINERS 
b/board/firefly/roc-pc-rk3399/MAINTAINERS
index 68a5b757d1df..2c0de4432fa8 100644
--- a/board/firefly/roc-pc-rk3399/MAINTAINERS
+++ b/board/firefly/roc-pc-rk3399/MAINTAINERS
@@ -6,3 +6,4 @@ F:  board/firefly/roc-pc-rk3399
 F: include/configs/roc-pc-rk3399.h
 F: configs/roc-pc-rk3399_defconfig
 F: configs/roc-pc-mezzanine-rk3399_defconfig
+F: arch/arm/dts/rk3399-roc-pc*
diff --git a/board/pine64/pinebook-pro-rk3399/MAINTAINERS 
b/board/pine64/pinebook-pro-rk3399/MAINTAINERS
index 7300ca1b1b81..287ed4346050 100644
--- a/board/pine64/pinebook-pro-rk3399/MAINTAINERS
+++ b/board/pine64/pinebook-pro-rk3399/MAINTAINERS
@@ -2,7 +2,6 @@ PINEBOOK_PRO
 M: Peter Robinson 
 S: Maintained
 F: board/pine64/pinebook-pro-rk3399/
-F: include/configs/rk3399-pinebook-pro.h
-F: arch/arm/dts/rk3399-pinebook-pro.dts
-F: arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi
+F: include/configs/pinebook-pro-rk3399.h
+F: arch/arm/dts/rk3399-pinebook-pro*
 F: configs/pinebook-pro-rk3399_defconfig
diff --git a/board/pine64/pinephone-pro-rk3399/MAINTAINERS 
b/board/pine64/pinephone-pro-rk3399/MAINTAINERS
index bc2dcdd8d423..959566a877ec 100644
--- a/board/pine64/pinephone-pro-rk3399/MAINTAINERS
+++ b/board/pine64/pinephone-pro-rk3399/MAINTAINERS
@@ -2,7 +2,6 @@ PINEPHONE_PRO
 M: Peter Robinson 
 S: Maintained
 F: board/pine64/pinephone-pro-rk3399/
-F: include/configs/rk3399-pinephone-pro.h
-F: arch/arm/dts/rk3399-pinephone-pro.dts
-F: arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi
+F: include/configs/pinephone-pro-rk3399.h
+F: arch/arm/dts/rk3399-pinephone-pro*
 F: configs/pinephone-pro-rk3399_defconfig
diff --git a/board/pine64/rockpro64_rk3399/MAINTAINERS 
b/board/pine64/rockpro64_rk3399/MAINTAINERS
index 220ee21f230f..d9e11f4bab34 100644
--- a/board/pine64/rockpro64_rk3399/MAINTAINERS
+++ b/board/pine64/rockpro64_rk3399/MAINTAINERS
@@ -3,5 +3,5 @@ M:  Jagan Teki 
 S: Maintained
 F: board/pine64/rockpro64_rk3399
 F: include/configs/rockpro64_rk3399.h
-F: arch/arm/dts/rk3399-rockpro64-u-boot.dtsi
+F: arch/arm/dts/rk3399-rockpro64*
 F: configs/rockpro64-rk3399_defconfig
diff --git a/board/rockchip/evb_rk3399/MAINTAINERS 
b/board/rockchip/evb_rk3399/MAINTAINERS
index acdb840f2093..f45f81623a3a 100644
--- a/board/rockchip/evb_rk3399/MAINTAINERS
+++ b/board/rockchip/evb_rk3399/MAINTAINERS
@@ -4,48 +4,53 @@ S:  Maintained
 F:  board/rockchip/evb_rk3399
 F:  include/configs/evb_rk3399.h
 F:  configs/evb-rk3399_defconfig
+F:  arch/arm/dts/rk3399-evb*
 F:  configs/firefly-rk3399_defconfig
+F:  arch/arm/dts/rk3399-firefly*
 
 EAIDK-610
 M:  Andy Yan 
 S:  Maintained
 F: configs/eaidk-610-rk3399_defconfig
-F: arch/arm/dts/rk3399-eaidk-610-u-boot.dtsi
+F: arch/arm/dts/rk3399-eaidk-610*
 
 KHADAS-EDGE
 M: Nick Xie 
 S: Maintained
 F: configs/khadas-edge-rk3399_defconfig
+F: arch/arm/dts/rk3399-khadas-edge.dts
+F: arch/arm/dts/rk3399-khadas-edge.dtsi
 F: arch/arm/dts/rk3399-khadas-edge-u-boot.dtsi
 
 KHADAS-EDGE-CAPTAIN
 M: Nick Xie 
 S: Maintained
 F: configs/khadas-edge-captain-rk3399_defconfig
-F: arch/arm/dts/rk3399-khadas-edge-captain-u-boot.dtsi
+F: arch/arm/dts/rk3399-khadas-edge-captain*
 
 KHADAS-EDGE-V
 M: Nick Xie 
 S: Maintained
 F: configs/khadas-edge-v-rk3399_defconfig
-F: arch/arm/dts/rk3399-khadas-edge-v-u-boot.dtsi
+F: arch/arm/dts/rk3399-khadas-edge-v*
 
 LEEZ-P710
 M: Andy Yan 
 S:  Maintained
-F: arch/arm/dts/rk3399-leez-p710-u-boot.dtsi
+F: arch/arm/dts/rk3399-leez-p710*
 F: configs/leez-rk3399_defconfig
 
 NANOPC-T4
 M: Jagan Teki 
 S: Maintained
 F: configs/nanopc-t4-rk3399_defconfig
-F: arch/arm/dts/rk3399-nanopc-t4-u-boot.dtsi
+F: arch/arm/dts/rk3399-nanopc-t4*
 
 NANOPI-M4
 M: Jagan Teki 
 S: Maintained
 F: configs/nanopi-m4-rk3399_defconfig
+F: arch/arm/dts/rk3399-nanopi-m4.dts
 F: arch/arm/dts/rk3399-nanopi-m4-u-boot.dtsi
 
 NANOPI-M4-2GB
@@ -53,55 +58,53 @@ M:  Jagan Teki 
 M: Deepak Das 
 S: Maintained
 F: configs/nanopi-m4-2gb-rk3399_defconfig
-F: arch/arm/dts/rk3399-nanopi-m4-2gb-u-boot.dtsi
+F: arch/arm/dts/rk3399-nanopi-m4-2gb*
 
 NANOPI-M4B
 M: Alexandre Vicenzi 
 S: 

[PATCH v2 00/12] rockchip: rk3399: Migrate to use IO-domain driver

[Jonas Karlman]

This series remove old unused board_early_init_f() functions, adds
support for RK3399 to the IO-domain driver and migrates all boards that
used setup_iodomain() to now use the IO-domain driver instead.

Also add device tree files and myself as reviewer to MAINTAINERS.

Changes in v2:
- Use glob pattern where appropriate
- Split gpt_capsule_update_setup() change into own patch
- Collect r-b tags

This series depends on following series for a clean apply:
- rockchip: rk3328: Update defconfigs, DTs and enable boot from SPI [1]
- rockchip: Read cpuid and generate MAC address from efuse for RK3328
  and RK3399 [2]
- rockchip: Update stack and bss addresses on RK3308, RK3328, RK3399,
  RK356x and RK3588 [3]
- rockchip: add support for Theobroma JAGUAR SBC-RK3588-AMR [4]

A copy of this series and its depends can also be found at [5]

[1] https://patchwork.ozlabs.org/cover/1900345/
[2] https://patchwork.ozlabs.org/cover/1897743/
[3] https://patchwork.ozlabs.org/cover/1907155/
[4] https://patchwork.ozlabs.org/cover/1910408/
[5] https://github.com/Kwiboo/u-boot-rockchip/commits/rk3399-io-domain-v2

Jonas Karlman (12):
  board: rockchip: rk3399: Add device tree files to MAINTAINERS
  board: rockchip: rk3399: Add myself as reviewer to MAINTAINERS
  board: rockchip: rk3399: Remove unused board_early_init_f functions
  board: rockchip: Add a common ROCK Pi 4 target
  rockchip: io-domain: Add support for RK3399
  rockchip: pine64: rockpro64: Migrate to use IO-domain driver
  rockchip: pine64: pinebook-pro: Migrate to use IO-domain driver
  rockchip: pine64: pinephone-pro: Migrate to use IO-domain driver
  rockchip: vamrs: rock960: Migrate to use IO-domain driver
  rockchip: theobroma-systems: puma: Migrate to use IO-domain driver
  rockchip: google: gru: Migrate to use IO-domain driver
  rockchip: board: Move gpt_capsule_update_setup() call

 arch/arm/mach-rockchip/board.c| 10 +--
 arch/arm/mach-rockchip/rk3399/Kconfig |  6 ++
 board/firefly/roc-pc-rk3399/MAINTAINERS   |  1 +
 board/firefly/roc-pc-rk3399/roc-pc-rk3399.c   | 22 +-
 board/google/gru/gru.c| 35 
 board/pine64/pinebook-pro-rk3399/MAINTAINERS  |  6 +-
 board/pine64/pinebook-pro-rk3399/Makefile |  1 -
 .../pinebook-pro-rk3399/pinebook-pro-rk3399.c | 61 --
 board/pine64/pinephone-pro-rk3399/MAINTAINERS |  5 +-
 board/pine64/pinephone-pro-rk3399/Makefile|  1 -
 .../pinephone-pro-rk3399.c| 64 ---
 board/pine64/rockpro64_rk3399/MAINTAINERS |  3 +-
 board/pine64/rockpro64_rk3399/Makefile|  7 --
 .../rockpro64_rk3399/rockpro64-rk3399.c   | 39 -
 board/radxa/rockpi4-rk3399/Kconfig| 15 
 board/radxa/rockpi4-rk3399/MAINTAINERS| 22 ++
 .../rockpi4-rk3399}/Makefile  |  2 +-
 .../rockpi4-rk3399/rockpi4-rk3399.c}  | 33 +---
 board/rockchip/evb_rk3399/MAINTAINERS | 48 ---
 .../puma_rk3399/puma-rk3399.c | 21 -
 board/vamrs/rock960_rk3399/MAINTAINERS|  2 +
 board/vamrs/rock960_rk3399/Makefile   |  6 --
 board/vamrs/rock960_rk3399/rock960-rk3399.c   | 27 ---
 configs/chromebook_bob_defconfig  |  1 +
 configs/chromebook_kevin_defconfig|  1 +
 configs/ficus-rk3399_defconfig|  1 +
 configs/pinebook-pro-rk3399_defconfig |  1 +
 configs/pinephone-pro-rk3399_defconfig|  1 +
 configs/puma-rk3399_defconfig |  1 +
 configs/rock-4c-plus-rk3399_defconfig |  2 +-
 configs/rock-4se-rk3399_defconfig |  2 +-
 configs/rock-pi-4-rk3399_defconfig|  2 +-
 configs/rock-pi-4c-rk3399_defconfig   |  2 +-
 configs/rock960-rk3399_defconfig  |  1 +
 configs/rockpro64-rk3399_defconfig|  1 +
 drivers/misc/rockchip-io-domain.c | 79 ++-
 include/configs/rk3399_common.h   | 16 
 include/configs/rockpi4-rk3399.h  | 32 
 38 files changed, 198 insertions(+), 382 deletions(-)
 delete mode 100644 board/pine64/pinebook-pro-rk3399/Makefile
 delete mode 100644 board/pine64/pinebook-pro-rk3399/pinebook-pro-rk3399.c
 delete mode 100644 board/pine64/pinephone-pro-rk3399/Makefile
 delete mode 100644 board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c
 delete mode 100644 board/pine64/rockpro64_rk3399/Makefile
 delete mode 100644 board/pine64/rockpro64_rk3399/rockpro64-rk3399.c
 create mode 100644 board/radxa/rockpi4-rk3399/Kconfig
 create mode 100644 board/radxa/rockpi4-rk3399/MAINTAINERS
 rename board/{rockchip/evb_rk3399 => radxa/rockpi4-rk3399}/Makefile (79%)
 rename board/{rockchip/evb_rk3399/evb-rk3399.c => 
radxa/rockpi4-rk3399/rockpi4-rk3399.c} (65%)
 delete mode 100644 board/vamrs/rock960_rk3399/Makefile
 delete mode 100644 board/vamrs/rock960_rk3399/rock960-rk3399.c
 create mode 100644 include/configs/rockpi4-rk3399.h

-- 
2.43.2

Re: [PATCH v6 1/3] dt-bindings: mtd: partitions: Add binman compatible

[Simon Glass]

Hi Miquel,

On Fri, 8 Mar 2024 at 20:42, Miquel Raynal  wrote:
>
> Hi Simon,
>
> s...@chromium.org wrote on Fri, 8 Mar 2024 15:44:25 +1300:
>
> > Hi Miquel,
> >
> > On Tue, 6 Feb 2024 at 01:17, Miquel Raynal  
> > wrote:
> > >
> > > Hi Simon,
> > >
> > > > > > > > > > > > > > > +description: |
> > > > > > > > > > > > > > > +  The binman node provides a layout for 
> > > > > > > > > > > > > > > firmware, used when packaging firmware
> > > > > > > > > > > > > > > +  from multiple projects. It is based on 
> > > > > > > > > > > > > > > fixed-partitions, with some
> > > > > > > > > > > > > > > +  extensions, but uses 'compatible' to indicate 
> > > > > > > > > > > > > > > the contents of the node, to
> > > > > > > > > > > > > > > +  avoid perturbing or confusing existing 
> > > > > > > > > > > > > > > installations which use 'label' for a
> > > > > > > > > > > > > > > +  particular purpose.
> > > > > > > > > > > > > > > +
> > > > > > > > > > > > > > > +  Binman supports properties used as inputs to 
> > > > > > > > > > > > > > > the firmware-packaging process,
> > > > > > > > > > > > > > > +  such as those which control alignment of 
> > > > > > > > > > > > > > > partitions. This binding addresses
> > > > > > > > > > > > > > > +  these 'input' properties. For example, it is 
> > > > > > > > > > > > > > > common for the 'reg' property
> > > > > > > > > > > > > > > +  (an 'output' property) to be set by Binman, 
> > > > > > > > > > > > > > > based on the alignment requested
> > > > > > > > > > > > > > > +  in the input.
> > > > > > > > > > > > > > > +
> > > > > > > > > > > > > > > +  Once processing is complete, input properties 
> > > > > > > > > > > > > > > have mostly served their
> > > > > > > > > > > > > > > +  purpose, at least until the firmware is 
> > > > > > > > > > > > > > > repacked later, e.g. due to a
> > > > > > > > > > > > > > > +  firmware update. The 'fixed-partitions' 
> > > > > > > > > > > > > > > binding should provide enough
> > > > > > > > > > > > > > > +  information to read the firmware at runtime, 
> > > > > > > > > > > > > > > including decompression if
> > > > > > > > > > > > > > > +  needed.
> > > > > > > > > > > > > >
> > > > > > > > > > > > > > How is this going to work exactly? binman reads 
> > > > > > > > > > > > > > these nodes and then
> > > > > > > > > > > > > > writes out 'fixed-partitions' nodes. But then 
> > > > > > > > > > > > > > you've lost the binman
> > > > > > > > > > > > > > specifc parts needed for repacking.
> > > > > > > > > > > > >
> > > > > > > > > > > > > No, they are the same node. I do want the extra 
> > > > > > > > > > > > > information to stick
> > > > > > > > > > > > > around. So long as it is compatible with 
> > > > > > > > > > > > > fixed-partition as well, this
> > > > > > > > > > > > > should work OK.
> > > > > > > > > > > >
> > > > > > > > > > > > How can it be both? The partitions node compatible can 
> > > > > > > > > > > > be either
> > > > > > > > > > > > 'fixed-partitions' or 'binman'.
> > > > > > > > > > >
> > > > > > > > > > > Can we not allow it to be both? I have tried to adjust 
> > > > > > > > > > > things in
> > > > > > > > > > > response to feedback but perhaps the feedback was leading 
> > > > > > > > > > > me down the
> > > > > > > > > > > wrong path?
> > > > > > > > > >
> > > > > > > > > > Sure, but then the schema has to and that means extending
> > > > > > > > > > fixed-partitions.
> > > > > > > > >
> > > > > > > > > Can we cross that bridge later? There might be resistance to 
> > > > > > > > > it. I'm
> > > > > > > > > not sure. For now, perhaps just a binman compatible works 
> > > > > > > > > well enough
> > > > > > > > > to make progress.
> > > > > > > >
> > > > > > > > Is there any way to make progress on this? I would like to have
> > > > > > > > software which doesn't understand the binman compatible to at 
> > > > > > > > least be
> > > > > > > > able to understand the fixed-partition compatible. Is that 
> > > > > > > > acceptable?
> > > > > > >
> > > > > > > There's only 2 ways that it can work. Either binman writes out
> > > > > > > fixed-partition nodes dropping/replacing anything only defined for
> > > > > > > binman or fixed-partition is extended to include what binman 
> > > > > > > needs.
> > > > > >
> > > > > > OK, then I suppose the best way is to add a new binman compatible, 
> > > > > > as
> > > > > > is done with this v6 series. People then need to choose it instead 
> > > > > > of
> > > > > > fixed-partition.
> > > > >
> > > > > I'm sorry this is not at all what Rob suggested, or did I totally
> > > > > misunderstand his answer?
> > > > >
> > > > > In both cases the solution is to generate a "fixed-partition" node. 
> > > > > Now
> > > > > up to you to decide whether binman should adapt the output to the
> > > > > current schema, or if the current schema should be extended to
> > > > > understand all binman's output.
> > > > >
> > > > > At least that is my understanding and also what I kind of agree with.

Re: [PATCH 04/11] board: rockchip: Add a common ROCK Pi 4 target

[Jonas Karlman]

Hi Kever,

On 2024-03-11 10:29, Kever Yang wrote:
> Hi Jonas,
> 
> On 2024/2/19 17:13, Quentin Schulz wrote:
>> Hi Jonas,
>>
>> On 2/17/24 19:35, Jonas Karlman wrote:
>>> Move ROCK Pi 4 specific board code from the shared evb_rk3399 target
>>> into its own board target and update related defconfigs to use the new
>>> TARGET_ROCKPI4_RK3399 option.
>>>
>>> Also move the call to gpt_capsule_update_setup() from the weak function
>>> rk_board_late_init() into the main board_late_init() function.
>>>
>>> Signed-off-by: Jonas Karlman 
>>> ---
>>>   arch/arm/mach-rockchip/board.c    | 10 +++---
>>>   arch/arm/mach-rockchip/rk3399/Kconfig |  6 
>>>   board/radxa/rockpi4-rk3399/Kconfig    | 15 +
>>>   board/radxa/rockpi4-rk3399/MAINTAINERS    | 29 +
>>>   .../rockpi4-rk3399}/Makefile  |  2 +-
>>>   .../rockpi4-rk3399/rockpi4-rk3399.c}  | 13 ++--
>>>   board/rockchip/evb_rk3399/MAINTAINERS | 29 -
>>>   configs/rock-4c-plus-rk3399_defconfig |  2 +-
>>>   configs/rock-4se-rk3399_defconfig |  2 +-
>>>   configs/rock-pi-4-rk3399_defconfig    |  2 +-
>>>   configs/rock-pi-4c-rk3399_defconfig   |  2 +-
>>>   include/configs/rk3399_common.h   | 16 --
>>>   include/configs/rockpi4-rk3399.h  | 32 +++
>>>   13 files changed, 95 insertions(+), 65 deletions(-)
>>>   create mode 100644 board/radxa/rockpi4-rk3399/Kconfig
>>>   create mode 100644 board/radxa/rockpi4-rk3399/MAINTAINERS
>>>   rename board/{rockchip/evb_rk3399 => radxa/rockpi4-rk3399}/Makefile 
>>> (79%)
>>>   rename board/{rockchip/evb_rk3399/evb-rk3399.c => 
>>> radxa/rockpi4-rk3399/rockpi4-rk3399.c} (79%)
>>>   create mode 100644 include/configs/rockpi4-rk3399.h
>>>
>>> diff --git a/arch/arm/mach-rockchip/board.c 
>>> b/arch/arm/mach-rockchip/board.c
>>> index 4f666aee706f..dea5805c4665 100644
>>> --- a/arch/arm/mach-rockchip/board.c
>>> +++ b/arch/arm/mach-rockchip/board.c
>>> @@ -34,7 +34,7 @@
>>>   #include 
>>>   #include 
>>>   -#if defined(CONFIG_EFI_HAVE_CAPSULE_SUPPORT) && 
>>> defined(CONFIG_EFI_PARTITION)
>>> +#if IS_ENABLED(CONFIG_EFI_HAVE_CAPSULE_SUPPORT) && 
>>> IS_ENABLED(CONFIG_EFI_PARTITION)
>>>     #define DFU_ALT_BUF_LEN    SZ_1K
>>>   @@ -185,10 +185,6 @@ static void gpt_capsule_update_setup(void)
>>>     __weak int rk_board_late_init(void)
>>>   {
>>> -#if defined(CONFIG_EFI_HAVE_CAPSULE_SUPPORT) && 
>>> defined(CONFIG_EFI_PARTITION)
>>> -    gpt_capsule_update_setup();
>>> -#endif
>>> -
>>>   return 0;
>>>   }
>>>   @@ -196,6 +192,10 @@ int board_late_init(void)
>>>   {
>>>   setup_boot_mode();
>>>   +#if IS_ENABLED(CONFIG_EFI_HAVE_CAPSULE_SUPPORT) && 
>>> IS_ENABLED(CONFIG_EFI_PARTITION)
>>> +    gpt_capsule_update_setup();
>>> +#endif
>>> +
>>>   return rk_board_late_init();
>>>   }
>>>   diff --git a/arch/arm/mach-rockchip/rk3399/Kconfig 
>>> b/arch/arm/mach-rockchip/rk3399/Kconfig
>>> index d01063ac98b6..bf3600aee2ad 100644
>>> --- a/arch/arm/mach-rockchip/rk3399/Kconfig
>>> +++ b/arch/arm/mach-rockchip/rk3399/Kconfig
>>> @@ -89,6 +89,11 @@ config TARGET_ROCK960_RK3399
>>>  * 2x USB 3.0 type A, 2x USB 2.0 type A (host mode only),
>>>    1x USB 3.0 type C OTG
>>>   +config TARGET_ROCKPI4_RK3399
>>> +    bool "Radxa ROCK Pi 4 board"
>>> +    help
>>> +  Support for ROCK Pi 4 board family by Radxa.
>>> +
>>>   config TARGET_ROCKPRO64_RK3399
>>>   bool "Pine64 Rockpro64 board"
>>>   help
>>> @@ -174,6 +179,7 @@ source "board/google/gru/Kconfig"
>>>   source "board/pine64/pinebook-pro-rk3399/Kconfig"
>>>   source "board/pine64/pinephone-pro-rk3399/Kconfig"
>>>   source "board/pine64/rockpro64_rk3399/Kconfig"
>>> +source "board/radxa/rockpi4-rk3399/Kconfig"
>>>   source "board/rockchip/evb_rk3399/Kconfig"
>>>   source "board/theobroma-systems/puma_rk3399/Kconfig"
>>>   source "board/vamrs/rock960_rk3399/Kconfig"
>>> diff --git a/board/radxa/rockpi4-rk3399/Kconfig 
>>> b/board/radxa/rockpi4-rk3399/Kconfig
>>> new file mode 100644
>>> index ..d82663506b12
>>> --- /dev/null
>>> +++ b/board/radxa/rockpi4-rk3399/Kconfig
>>> @@ -0,0 +1,15 @@
>>> +if TARGET_ROCKPI4_RK3399
>>> +
>>> +config SYS_BOARD
>>> +    default "rockpi4-rk3399"
>>> +
>>> +config SYS_VENDOR
>>> +    default "radxa"
>>> +
>>> +config SYS_CONFIG_NAME
>>> +    default "rockpi4-rk3399"
>>> +
>>> +config BOARD_SPECIFIC_OPTIONS # dummy
>>> +    def_bool y
>>> +
>>> +endif
>>> diff --git a/board/radxa/rockpi4-rk3399/MAINTAINERS 
>>> b/board/radxa/rockpi4-rk3399/MAINTAINERS
>>> new file mode 100644
>>> index ..12d4f35af881
>>> --- /dev/null
>>> +++ b/board/radxa/rockpi4-rk3399/MAINTAINERS
>>> @@ -0,0 +1,29 @@
>>> +ROCK-PI-4
>>> +M:    Jagan Teki 
>>> +R:    Jonas Karlman 
>>> +S:    Maintained
>>> +F:    board/radxa/rockpi4-rk3399/
>>> +F:    configs/rock-pi-4-rk3399_defconfig
>>> +F:    arch/arm/dts/rk3399-rock-pi-4.dtsi
>>> 

Re: [PATCH 04/11] board: rockchip: Add a common ROCK Pi 4 target

[Jonas Karlman]

Hi Kever,

On 2024-03-11 10:29, Kever Yang wrote:
> Hi Jonas,
> 
> On 2024/2/18 02:35, Jonas Karlman wrote:
>> Move ROCK Pi 4 specific board code from the shared evb_rk3399 target
>> into its own board target and update related defconfigs to use the new
>> TARGET_ROCKPI4_RK3399 option.
>>
>> Also move the call to gpt_capsule_update_setup() from the weak function
>> rk_board_late_init() into the main board_late_init() function.
> 
> Please split this part as a separate patch, this is an common code 
> update instead of rockpi board patch.

Will split this into its own patch in v2.

> 
> 
>>
>> Signed-off-by: Jonas Karlman 
>> ---
>>   arch/arm/mach-rockchip/board.c| 10 +++---
>>   arch/arm/mach-rockchip/rk3399/Kconfig |  6 
>>   board/radxa/rockpi4-rk3399/Kconfig| 15 +
>>   board/radxa/rockpi4-rk3399/MAINTAINERS| 29 +
>>   .../rockpi4-rk3399}/Makefile  |  2 +-
>>   .../rockpi4-rk3399/rockpi4-rk3399.c}  | 13 ++--
>>   board/rockchip/evb_rk3399/MAINTAINERS | 29 -
>>   configs/rock-4c-plus-rk3399_defconfig |  2 +-
>>   configs/rock-4se-rk3399_defconfig |  2 +-
>>   configs/rock-pi-4-rk3399_defconfig|  2 +-
>>   configs/rock-pi-4c-rk3399_defconfig   |  2 +-
>>   include/configs/rk3399_common.h   | 16 --
>>   include/configs/rockpi4-rk3399.h  | 32 +++
>>   13 files changed, 95 insertions(+), 65 deletions(-)
>>   create mode 100644 board/radxa/rockpi4-rk3399/Kconfig
>>   create mode 100644 board/radxa/rockpi4-rk3399/MAINTAINERS
>>   rename board/{rockchip/evb_rk3399 => radxa/rockpi4-rk3399}/Makefile (79%)
>>   rename board/{rockchip/evb_rk3399/evb-rk3399.c => 
>> radxa/rockpi4-rk3399/rockpi4-rk3399.c} (79%)
> 
> Please add new rockpi4 board files instead of rename, so that evb-rk3399 
> can still available.

This only looks like a rename because the only code that was left in
evb-rk3399.c was the rock-pi-4 specific capsule update code moved to
the new rockpi4-rk3399.c file.

board/rockchip/evb_rk3399 still exists and contain the Kconfig, README
and MAINTAINERS files after this patch, just no board specific code.

So will keep this change as-is for v2.

Regards,
Jonas

> 
> 
> Thanks,
> - Kever
>>   create mode 100644 include/configs/rockpi4-rk3399.h
>>

[snip]

Re: [PATCH 1/4] rockchip: Update the default USB Product ID value

[Jonas Karlman]

Hi Kever,

On 2024-03-11 04:20, Kever Yang wrote:
> Hi Jonas,
> 
> On 2024/3/8 18:42, Jonas Karlman wrote:
>> Hi Kever,
>>
>> On 2024-03-08 10:22, Kever Yang wrote:
>>> Hi Jonas,
>>>
>>>       Thanks for your patch.
>>>
>>> On 2024/2/27 07:08, Jonas Karlman wrote:
 RK3036 is using the USB product id normally used by RK3066B, and RK3328
 is using the product id normally used by RK3368.

 Fix this and update the default USB_GADGET_PRODUCT_NUM Kconfig option
 for remaining supported Rockchip SoCs to match the product id used in
 Mask ROM mode. Also remove a reference to the unknown ROCKCHIP_RK3229
 symbol.
>>> RK3229 belongs to RK322X which is reuse with RK3228.
>>>
>>> Note that this ID is used for rockusb gadget, if work as mass storage,
>>> it should use other
>>>
>>> ID, or else it will confuse the driver in host side, eg. the Windows
>>> driver may not able to
>>>
>>> recognize the device if using two different gadget type with the same ID.
>> Patch 3 in this series will change to use 0x0010 product id when ums
>> mode is enabled and fall back to use the USB_GADGET_PRODUCT_NUM for any
>> other gadget mode.
> Yes, I see that a few seconds after I send that mail.
>>
>> The ROCKCHIP_RK3229 symbol is not defined or used anywhere U-Boot so the
>> change in this patch to remove it from the condition should have no
>> impact. If RK3229 need a special product id separate from 0x320b used by
>> ROCKCHIP_RK322X, it can be defined in the defconfig for such board.
> 
> ROCKCHIP_RK3229 does not need any more, because it's included in Rk322X.
> 
> So please update the commit message with " remove ROCKCHIP_RK3229 because
> it's included in ROCKCHIP_RK322X" instead of "unknown ROCKCHIP_RK3229".

I have recently sent a v2 using the following message, let me know if
you want me to send a v3 with your suggested message instead.

"Also remove a reference to an undefined ROCKCHIP_RK3229 Kconfig symbol."

> 
>>
>> I tested this on Windows with rockusb and ums on RK3308, RK3328, RK3399
>> RK356x and RK3588 boards, switching between ums and rockusb should work
>> as intended, rockusb driver was used in rockusb mode and in ums mode the
>> device would show up as a disk.
>>
>>=> rockusb 0 mmc 1
>>=> ums 0 mmc 1
>>
>> I think all product id below is correct,
> 
> Yes, I have check these IDs, they are correct.

Great!

Regards,
Jonas

> 
> 
> Thanks,
> - Kever
>> but I have not been able to
>> runtime validate for other SoCs then the ones listed above.
>>
>> Regards,
>> Jonas
>>
>>>
>>> Thanks,
>>> - Kever
 Signed-off-by: Jonas Karlman 
 ---
drivers/usb/gadget/Kconfig | 15 ---
1 file changed, 12 insertions(+), 3 deletions(-)

 diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig
 index c72a8047635c..4621a6fd5e64 100644
 --- a/drivers/usb/gadget/Kconfig
 +++ b/drivers/usb/gadget/Kconfig
 @@ -70,12 +70,21 @@ config USB_GADGET_PRODUCT_NUM
hex "Product ID of the USB device"
default 0x701a if ARCH_TEGRA
default 0x1010 if ARCH_SUNXI
 -  default 0x310a if ROCKCHIP_RK3036
 +  default 0x110a if ROCKCHIP_RV1108
 +  default 0x110b if ROCKCHIP_RV1126
default 0x300a if ROCKCHIP_RK3066
 +  default 0x301a if ROCKCHIP_RK3036
 +  default 0x310b if ROCKCHIP_RK3188
default 0x310c if ROCKCHIP_RK3128
 -  default 0x320a if ROCKCHIP_RK3229 || ROCKCHIP_RK3288
 -  default 0x330a if ROCKCHIP_RK3328
 +  default 0x320a if ROCKCHIP_RK3288
 +  default 0x320b if ROCKCHIP_RK322X
 +  default 0x320c if ROCKCHIP_RK3328
 +  default 0x330a if ROCKCHIP_RK3368
default 0x330c if ROCKCHIP_RK3399
 +  default 0x330d if ROCKCHIP_PX30
 +  default 0x330e if ROCKCHIP_RK3308
 +  default 0x350a if ROCKCHIP_RK3568
 +  default 0x350b if ROCKCHIP_RK3588
default 0x0
help
  Product ID of the USB device emulated, reported to the host 
 device.

[PATCH] ARM: imx: stm32: Test whether ethernet node is enabled before reading MAC EEPROM on DHSOM

[Marek Vasut]

Check whether the ethernet interface is enabled at all before reading
MAC EEPROM. As a cost saving measure, it can happen that the MAC EEPROM
is not populated on SoMs which do not use ethernet.

Signed-off-by: Marek Vasut 
---
Cc: "NXP i.MX U-Boot Team" 
Cc: Andreas Geisreiter 
Cc: Christoph Niedermaier 
Cc: Fabio Estevam 
Cc: Patrice Chotard 
Cc: Patrick Delaunay 
Cc: Stefano Babic 
Cc: u-b...@dh-electronics.com
Cc: u-boot@lists.denx.de
Cc: uboot-st...@st-md-mailman.stormreply.com
---
NOTE: It is probably best if this goes in via either imx or stm32 tree,
  I can break the patch up, but that would introduce dependency
  between two PRs in different trees. Let me know what you prefer.
---
 board/dhelectronics/common/dh_common.c   | 16 
 board/dhelectronics/common/dh_common.h   |  8 
 board/dhelectronics/dh_imx6/dh_imx6.c|  3 +++
 .../dhelectronics/dh_imx8mp/imx8mp_dhcom_pdk2.c  |  6 ++
 board/dhelectronics/dh_stm32mp1/board.c  |  6 ++
 5 files changed, 39 insertions(+)

diff --git a/board/dhelectronics/common/dh_common.c 
b/board/dhelectronics/common/dh_common.c
index 67e3d59b1f3..34094a020b0 100644
--- a/board/dhelectronics/common/dh_common.c
+++ b/board/dhelectronics/common/dh_common.c
@@ -18,6 +18,19 @@ bool dh_mac_is_in_env(const char *env)
return eth_env_get_enetaddr(env, enetaddr);
 }
 
+int dh_get_mac_is_enabled(const char *alias)
+{
+   ofnode node = ofnode_path(alias);
+
+   if (!ofnode_valid(node))
+   return -EINVAL;
+
+   if (!ofnode_is_enabled(node))
+   return -ENODEV;
+
+   return 0;
+}
+
 int dh_get_mac_from_eeprom(unsigned char *enetaddr, const char *alias)
 {
struct udevice *dev;
@@ -57,6 +70,9 @@ __weak int dh_setup_mac_address(void)
if (dh_mac_is_in_env("ethaddr"))
return 0;
 
+   if (dh_get_mac_is_enabled("ethernet0"))
+   return 0;
+
if (!dh_get_mac_from_eeprom(enetaddr, "eeprom0"))
return eth_env_set_enetaddr("ethaddr", enetaddr);
 
diff --git a/board/dhelectronics/common/dh_common.h 
b/board/dhelectronics/common/dh_common.h
index 2b24637d96d..a2de5b1553e 100644
--- a/board/dhelectronics/common/dh_common.h
+++ b/board/dhelectronics/common/dh_common.h
@@ -11,6 +11,14 @@
  */
 bool dh_mac_is_in_env(const char *env);
 
+/*
+ * dh_get_mac_is_enabled - Test if ethernet MAC is enabled in DT
+ *
+ * @alias: alias for ethernet MAC device tree node
+ * Return: 0 if OK, other value on error
+ */
+int dh_get_mac_is_enabled(const char *alias);
+
 /*
  * dh_get_mac_from_eeprom - Get MAC address from eeprom and write it to 
enetaddr
  *
diff --git a/board/dhelectronics/dh_imx6/dh_imx6.c 
b/board/dhelectronics/dh_imx6/dh_imx6.c
index 07fc9b1fe6d..0676587c38a 100644
--- a/board/dhelectronics/dh_imx6/dh_imx6.c
+++ b/board/dhelectronics/dh_imx6/dh_imx6.c
@@ -92,6 +92,9 @@ int dh_setup_mac_address(void)
if (dh_mac_is_in_env("ethaddr"))
return 0;
 
+   if (dh_get_mac_is_enabled("ethernet0"))
+   return 0;
+
if (!dh_imx_get_mac_from_fuse(enetaddr))
goto out;
 
diff --git a/board/dhelectronics/dh_imx8mp/imx8mp_dhcom_pdk2.c 
b/board/dhelectronics/dh_imx8mp/imx8mp_dhcom_pdk2.c
index 5f12d787d38..ff2c0e87215 100644
--- a/board/dhelectronics/dh_imx8mp/imx8mp_dhcom_pdk2.c
+++ b/board/dhelectronics/dh_imx8mp/imx8mp_dhcom_pdk2.c
@@ -47,6 +47,9 @@ static int dh_imx8_setup_ethaddr(void)
if (dh_mac_is_in_env("ethaddr"))
return 0;
 
+   if (dh_get_mac_is_enabled("ethernet0"))
+   return 0;
+
if (!dh_imx_get_mac_from_fuse(enetaddr))
goto out;
 
@@ -66,6 +69,9 @@ static int dh_imx8_setup_eth1addr(void)
if (dh_mac_is_in_env("eth1addr"))
return 0;
 
+   if (dh_get_mac_is_enabled("ethernet1"))
+   return 0;
+
if (!dh_imx_get_mac_from_fuse(enetaddr))
goto increment_out;
 
diff --git a/board/dhelectronics/dh_stm32mp1/board.c 
b/board/dhelectronics/dh_stm32mp1/board.c
index 88eb7d1b8d4..b3309c9d330 100644
--- a/board/dhelectronics/dh_stm32mp1/board.c
+++ b/board/dhelectronics/dh_stm32mp1/board.c
@@ -129,6 +129,9 @@ static int dh_stm32_setup_ethaddr(void)
if (dh_mac_is_in_env("ethaddr"))
return 0;
 
+   if (dh_get_mac_is_enabled("ethernet0"))
+   return 0;
+
if (!dh_get_mac_from_eeprom(enetaddr, "eeprom0"))
return eth_env_set_enetaddr("ethaddr", enetaddr);
 
@@ -142,6 +145,9 @@ static int dh_stm32_setup_eth1addr(void)
if (dh_mac_is_in_env("eth1addr"))
return 0;
 
+   if (dh_get_mac_is_enabled("ethernet1"))
+   return 0;
+
if (dh_stm32_mac_is_in_ks8851())
return 0;
 
-- 
2.43.0

[PATCH v4 10/13] arm: dts: introduce am62p5 U-Boot dts files

[Bryan Brattlof]

Include the U-Boot device tree files needed to boot the board.

Signed-off-by: Bryan Brattlof 
---
 arch/arm/dts/Makefile  |2 +
 arch/arm/dts/k3-am62p-ddr-lp4-50-1600.dtsi | 2800 
 arch/arm/dts/k3-am62p-sk-binman.dtsi   |  173 ++
 arch/arm/dts/k3-am62p5-r5-sk.dts   |  101 +
 arch/arm/dts/k3-am62p5-sk-u-boot.dtsi  |   23 +
 5 files changed, 3099 insertions(+)

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 784192125d352..a965a70f37cc6 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1437,6 +1437,8 @@ dtb-$(CONFIG_SOC_K3_AM625) += k3-am625-sk.dtb \
 dtb-$(CONFIG_SOC_K3_AM62A7) += k3-am62a7-sk.dtb \
  k3-am62a7-r5-sk.dtb
 
+dtb-$(CONFIG_SOC_K3_AM62P5) += k3-am62p5-r5-sk.dtb
+
 dtb-$(CONFIG_ARCH_MEDIATEK) += \
mt7622-rfb.dtb \
mt7623a-unielec-u7623-02-emmc.dtb \
diff --git a/arch/arm/dts/k3-am62p-ddr-lp4-50-1600.dtsi 
b/arch/arm/dts/k3-am62p-ddr-lp4-50-1600.dtsi
new file mode 100644
index 0..f66435201530f
--- /dev/null
+++ b/arch/arm/dts/k3-am62p-ddr-lp4-50-1600.dtsi
@@ -0,0 +1,2800 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * This file was generated with the
+ * AM62Px SysConfig DDR Subsystem Register Configuration Tool v0.10.02
+ * Thu Jan 25 2024 10:43:46 GMT-0600 (Central Standard Time)
+ * DDR Type: LPDDR4
+ * F0 = 50MHzF1 = NA F2 = 1600MHz
+ * Density (per channel): 16Gb
+ * Number of Ranks: 2
+ */
+
+#define DDRSS_PLL_FHS_CNT 5
+#define DDRSS_PLL_FREQUENCY_1 8
+#define DDRSS_PLL_FREQUENCY_2 8
+#define DDRSS_SDRAM_IDX 17
+#define DDRSS_REGION_IDX 17
+
+#define DDRSS_CTL_0_DATA 0x0B00
+#define DDRSS_CTL_1_DATA 0x
+#define DDRSS_CTL_2_DATA 0x
+#define DDRSS_CTL_3_DATA 0x
+#define DDRSS_CTL_4_DATA 0x
+#define DDRSS_CTL_5_DATA 0x
+#define DDRSS_CTL_6_DATA 0x
+#define DDRSS_CTL_7_DATA 0x2710
+#define DDRSS_CTL_8_DATA 0x000186A0
+#define DDRSS_CTL_9_DATA 0x0005
+#define DDRSS_CTL_10_DATA 0x0064
+#define DDRSS_CTL_11_DATA 0x0004E200
+#define DDRSS_CTL_12_DATA 0x0030D400
+#define DDRSS_CTL_13_DATA 0x0005
+#define DDRSS_CTL_14_DATA 0x0C80
+#define DDRSS_CTL_15_DATA 0x0004E200
+#define DDRSS_CTL_16_DATA 0x0030D400
+#define DDRSS_CTL_17_DATA 0x0005
+#define DDRSS_CTL_18_DATA 0x0C80
+#define DDRSS_CTL_19_DATA 0x01010100
+#define DDRSS_CTL_20_DATA 0x01010100
+#define DDRSS_CTL_21_DATA 0x01000110
+#define DDRSS_CTL_22_DATA 0x02010002
+#define DDRSS_CTL_23_DATA 0x000A
+#define DDRSS_CTL_24_DATA 0x000186A0
+#define DDRSS_CTL_25_DATA 0x
+#define DDRSS_CTL_26_DATA 0x
+#define DDRSS_CTL_27_DATA 0x
+#define DDRSS_CTL_28_DATA 0x
+#define DDRSS_CTL_29_DATA 0x00020200
+#define DDRSS_CTL_30_DATA 0x
+#define DDRSS_CTL_31_DATA 0x
+#define DDRSS_CTL_32_DATA 0x
+#define DDRSS_CTL_33_DATA 0x
+#define DDRSS_CTL_34_DATA 0x0810
+#define DDRSS_CTL_35_DATA 0x4040
+#define DDRSS_CTL_36_DATA 0x
+#define DDRSS_CTL_37_DATA 0x
+#define DDRSS_CTL_38_DATA 0x
+#define DDRSS_CTL_39_DATA 0x
+#define DDRSS_CTL_40_DATA 0x040C
+#define DDRSS_CTL_41_DATA 0x
+#define DDRSS_CTL_42_DATA 0x0E38
+#define DDRSS_CTL_43_DATA 0x
+#define DDRSS_CTL_44_DATA 0x0E38
+#define DDRSS_CTL_45_DATA 0x
+#define DDRSS_CTL_46_DATA 0x05000804
+#define DDRSS_CTL_47_DATA 0x0700
+#define DDRSS_CTL_48_DATA 0x09090004
+#define DDRSS_CTL_49_DATA 0x0303
+#define DDRSS_CTL_50_DATA 0x00620011
+#define DDRSS_CTL_51_DATA 0x09110045
+#define DDRSS_CTL_52_DATA 0x421D
+#define DDRSS_CTL_53_DATA 0x00620011
+#define DDRSS_CTL_54_DATA 0x09110045
+#define DDRSS_CTL_55_DATA 0x0900421D
+#define DDRSS_CTL_56_DATA 0x000A0A09
+#define DDRSS_CTL_57_DATA 0x040006DB
+#define DDRSS_CTL_58_DATA 0x090D2005
+#define DDRSS_CTL_59_DATA 0x1710
+#define DDRSS_CTL_60_DATA 0x0C00DB60
+#define DDRSS_CTL_61_DATA 0x090D200D
+#define DDRSS_CTL_62_DATA 0x1710
+#define DDRSS_CTL_63_DATA 0x0C00DB60
+#define DDRSS_CTL_64_DATA 0x0304200D
+#define DDRSS_CTL_65_DATA 0x04050002
+#define DDRSS_CTL_66_DATA 0x1F1E1F1E
+#define DDRSS_CTL_67_DATA 0x01010008
+#define DDRSS_CTL_68_DATA 0x043C3C07
+#define DDRSS_CTL_69_DATA 0x0303
+#define DDRSS_CTL_70_DATA 0x
+#define DDRSS_CTL_71_DATA 0x0101
+#define DDRSS_CTL_72_DATA 0x
+#define DDRSS_CTL_73_DATA 0x0100
+#define DDRSS_CTL_74_DATA 0x00130803
+#define DDRSS_CTL_75_DATA 0x00BB
+#define DDRSS_CTL_76_DATA 0x0260
+#define DDRSS_CTL_77_DATA 0x1858
+#define DDRSS_CTL_78_DATA 0x0260
+#define DDRSS_CTL_79_DATA 0x1858
+#define DDRSS_CTL_80_DATA 0x0005
+#define DDRSS_CTL_81_DATA 0x000A
+#define DDRSS_CTL_82_DATA 0x0010
+#define DDRSS_CTL_83_DATA 0x0130
+#define DDRSS_CTL_84_DATA 0x0304
+#define DDRSS_CTL_85_DATA 0x0130
+#define DDRSS_CTL_86_DATA 0x0304
+#define DDRSS_CTL_87_DATA 

[PATCH v4 03/13] arm: mach-k3: am62px: introduce clock and device files for wkup spl

[Bryan Brattlof]

Include the clock and lpsc tree files needed for the wkup spl to
initialize the proper PLLs and power domains to boot the SoC.

Reviewed-by: Neha Malcom Francis 
Signed-off-by: Bryan Brattlof 
---
 arch/arm/mach-k3/r5/Makefile   |   1 +
 arch/arm/mach-k3/r5/am62px/Makefile|   6 +
 arch/arm/mach-k3/r5/am62px/clk-data.c  | 325 +
 arch/arm/mach-k3/r5/am62px/dev-data.c  |  71 +++
 drivers/clk/ti/clk-k3.c|   6 +
 drivers/power/domain/ti-power-domain.c |   8 +-
 include/k3-clk.h   |   1 +
 include/k3-dev.h   |   1 +
 8 files changed, 418 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-k3/r5/Makefile b/arch/arm/mach-k3/r5/Makefile
index ef0bf39d4503b..1cfc8e3ade966 100644
--- a/arch/arm/mach-k3/r5/Makefile
+++ b/arch/arm/mach-k3/r5/Makefile
@@ -9,6 +9,7 @@ obj-$(CONFIG_SOC_K3_J721S2) += j721s2/
 obj-$(CONFIG_SOC_K3_AM625) += am62x/
 obj-$(CONFIG_SOC_K3_AM62A7) += am62ax/
 obj-$(CONFIG_SOC_K3_J784S4) += j784s4/
+obj-$(CONFIG_SOC_K3_AM62P5) += am62px/
 
 obj-y += common.o
 obj-y += lowlevel_init.o
diff --git a/arch/arm/mach-k3/r5/am62px/Makefile 
b/arch/arm/mach-k3/r5/am62px/Makefile
new file mode 100644
index 0..50b0df20a3d1a
--- /dev/null
+++ b/arch/arm/mach-k3/r5/am62px/Makefile
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
+
+obj-y += clk-data.o
+obj-y += dev-data.o
diff --git a/arch/arm/mach-k3/r5/am62px/clk-data.c 
b/arch/arm/mach-k3/r5/am62px/clk-data.c
new file mode 100644
index 0..4b9892fe05167
--- /dev/null
+++ b/arch/arm/mach-k3/r5/am62px/clk-data.c
@@ -0,0 +1,325 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * AM62PX specific clock platform data
+ *
+ * This file is auto generated. Please do not hand edit and report any issues
+ * to Bryan Brattlof .
+ *
+ * Copyright (C) 2020-2023 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+#include 
+#include "k3-clk.h"
+
+static const char * const gluelogic_hfosc0_clkout_parents[] = {
+   NULL,
+   NULL,
+   "osc_24_mhz",
+   "osc_25_mhz",
+   "osc_26_mhz",
+   NULL,
+};
+
+static const char * const clk_32k_rc_sel_out0_parents[] = {
+   "gluelogic_rcosc_clk_1p0v_97p65k",
+   "gluelogic_hfosc0_clkout",
+   "gluelogic_rcosc_clk_1p0v_97p65k",
+   "gluelogic_lfosc0_clkout",
+};
+
+static const char * const main_emmcsd1_io_clklb_sel_out0_parents[] = {
+   "board_0_mmc1_clklb_out",
+   "board_0_mmc1_clk_out",
+};
+
+static const char * const main_ospi_loopback_clk_sel_out0_parents[] = {
+   "board_0_ospi0_dqs_out",
+   "board_0_ospi0_lbclko_out",
+};
+
+static const char * const main_usb0_refclk_sel_out0_parents[] = {
+   "gluelogic_hfosc0_clkout",
+   "postdiv4_16ff_main_0_hsdivout8_clk",
+};
+
+static const char * const main_usb1_refclk_sel_out0_parents[] = {
+   "gluelogic_hfosc0_clkout",
+   "postdiv4_16ff_main_0_hsdivout8_clk",
+};
+
+static const char * const sam62_pll_ctrl_wrap_main_0_sysclkout_clk_parents[] = 
{
+   "gluelogic_hfosc0_clkout",
+   "hsdiv4_16fft_main_0_hsdivout0_clk",
+};
+
+static const char * const sam62_pll_ctrl_wrap_mcu_0_sysclkout_clk_parents[] = {
+   "gluelogic_hfosc0_clkout",
+   "hsdiv4_16fft_mcu_0_hsdivout0_clk",
+};
+
+static const char * const clkout0_ctrl_out0_parents[] = {
+   "hsdiv4_16fft_main_2_hsdivout1_clk",
+   "hsdiv4_16fft_main_2_hsdivout1_clk",
+};
+
+static const char * const main_emmcsd0_refclk_sel_out0_parents[] = {
+   "postdiv4_16ff_main_0_hsdivout5_clk",
+   "hsdiv4_16fft_main_2_hsdivout2_clk",
+};
+
+static const char * const main_emmcsd1_refclk_sel_out0_parents[] = {
+   "postdiv4_16ff_main_0_hsdivout5_clk",
+   "hsdiv4_16fft_main_2_hsdivout2_clk",
+};
+
+static const char * const main_gtcclk_sel_out0_parents[] = {
+   "postdiv4_16ff_main_2_hsdivout5_clk",
+   "postdiv4_16ff_main_0_hsdivout6_clk",
+   "board_0_cp_gemac_cpts0_rft_clk_out",
+   NULL,
+   "board_0_mcu_ext_refclk0_out",
+   "board_0_ext_refclk1_out",
+   "sam62_pll_ctrl_wrap_mcu_0_chip_div1_clk_clk",
+   "sam62_pll_ctrl_wrap_main_0_chip_div1_clk_clk",
+};
+
+static const char * const main_ospi_ref_clk_sel_out0_parents[] = {
+   "hsdiv4_16fft_main_0_hsdivout1_clk",
+   "postdiv1_16fft_main_1_hsdivout5_clk",
+};
+
+static const char * const main_timerclkn_sel_out0_parents[] = {
+   "gluelogic_hfosc0_clkout",
+   "clk_32k_rc_sel_out0",
+   "postdiv4_16ff_main_0_hsdivout7_clk",
+   "gluelogic_rcosc_clkout",
+   "board_0_mcu_ext_refclk0_out",
+   "board_0_ext_refclk1_out",
+   NULL,
+   "board_0_cp_gemac_cpts0_rft_clk_out",
+   "hsdiv4_16fft_main_1_hsdivout3_clk",
+   "postdiv4_16ff_main_2_hsdivout6_clk",
+   NULL,
+   NULL,
+   NULL,
+   NULL,
+   NULL,
+   NULL,
+};
+
+static const char * const 

[PATCH v4 08/13] firmware: ti_sci_static_data: add static DMA channel data

[Bryan Brattlof]

From: Hari Nagalla 

Include the static DMA channel data for ti_sci

Signed-off-by: Hari Nagalla 
Signed-off-by: Bryan Brattlof 
---
 drivers/firmware/ti_sci_static_data.h | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/firmware/ti_sci_static_data.h 
b/drivers/firmware/ti_sci_static_data.h
index 789f0c6b2d903..9662bd95f2835 100644
--- a/drivers/firmware/ti_sci_static_data.h
+++ b/drivers/firmware/ti_sci_static_data.h
@@ -84,7 +84,8 @@ static struct ti_sci_resource_static_data rm_static_data[] = {
 };
 #endif /* CONFIG_SOC_K3_J721S2 */
 
-#if IS_ENABLED(CONFIG_SOC_K3_AM625) || IS_ENABLED(CONFIG_SOC_K3_AM62A7)
+#if IS_ENABLED(CONFIG_SOC_K3_AM625) || IS_ENABLED(CONFIG_SOC_K3_AM62A7) || \
+   IS_ENABLED(CONFIG_SOC_K3_AM62P5)
 static struct ti_sci_resource_static_data rm_static_data[] = {
/* BC channels */
{
@@ -95,7 +96,7 @@ static struct ti_sci_resource_static_data rm_static_data[] = {
},
{ },
 };
-#endif /* CONFIG_SOC_K3_AM625 || CONFIG_SOC_K3_AM62A7 */
+#endif /* CONFIG_SOC_K3_AM625 || CONFIG_SOC_K3_AM62A7 || CONFIG_SOC_K3_AM62P5 
*/
 
 #if IS_ENABLED(CONFIG_SOC_K3_J784S4)
 static struct ti_sci_resource_static_data rm_static_data[] = {

-- 
2.43.2

[PATCH v4 13/13] arm: mach-k3: fixup whitespace in SPDX License IDs

[Bryan Brattlof]

The SPDX ID format usese a single space used after the
'SPDX-License-Identifier:'. Fix all files that use any other white-space
character other than a single space.

Signed-off-by: Bryan Brattlof 
---
 arch/arm/mach-k3/r5/am62ax/Makefile | 2 +-
 arch/arm/mach-k3/r5/am62px/Makefile | 2 +-
 arch/arm/mach-k3/r5/am62x/Makefile  | 2 +-
 arch/arm/mach-k3/r5/j7200/Makefile  | 2 +-
 arch/arm/mach-k3/r5/j721e/Makefile  | 2 +-
 arch/arm/mach-k3/r5/j721s2/Makefile | 2 +-
 6 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/arch/arm/mach-k3/r5/am62ax/Makefile 
b/arch/arm/mach-k3/r5/am62ax/Makefile
index e4e55ce5c7dd2..313ce5a05fdc0 100644
--- a/arch/arm/mach-k3/r5/am62ax/Makefile
+++ b/arch/arm/mach-k3/r5/am62ax/Makefile
@@ -1,4 +1,4 @@
-# SPDX-License-Identifier: GPL-2.0+
+# SPDX-License-Identifier: GPL-2.0+
 #
 # Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
 
diff --git a/arch/arm/mach-k3/r5/am62px/Makefile 
b/arch/arm/mach-k3/r5/am62px/Makefile
index 50b0df20a3d1a..091d4fa5b4512 100644
--- a/arch/arm/mach-k3/r5/am62px/Makefile
+++ b/arch/arm/mach-k3/r5/am62px/Makefile
@@ -1,4 +1,4 @@
-# SPDX-License-Identifier: GPL-2.0+
+# SPDX-License-Identifier: GPL-2.0+
 #
 # Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
 
diff --git a/arch/arm/mach-k3/r5/am62x/Makefile 
b/arch/arm/mach-k3/r5/am62x/Makefile
index d6c876df66dde..9ab0100ee174a 100644
--- a/arch/arm/mach-k3/r5/am62x/Makefile
+++ b/arch/arm/mach-k3/r5/am62x/Makefile
@@ -1,4 +1,4 @@
-# SPDX-License-Identifier: GPL-2.0+
+# SPDX-License-Identifier: GPL-2.0+
 #
 # Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
 
diff --git a/arch/arm/mach-k3/r5/j7200/Makefile 
b/arch/arm/mach-k3/r5/j7200/Makefile
index 0f91cf4daea41..78325db402c56 100644
--- a/arch/arm/mach-k3/r5/j7200/Makefile
+++ b/arch/arm/mach-k3/r5/j7200/Makefile
@@ -1,4 +1,4 @@
-# SPDX-License-Identifier: GPL-2.0+
+# SPDX-License-Identifier: GPL-2.0+
 #
 # Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/
 obj-y += clk-data.o
diff --git a/arch/arm/mach-k3/r5/j721e/Makefile 
b/arch/arm/mach-k3/r5/j721e/Makefile
index 0f91cf4daea41..78325db402c56 100644
--- a/arch/arm/mach-k3/r5/j721e/Makefile
+++ b/arch/arm/mach-k3/r5/j721e/Makefile
@@ -1,4 +1,4 @@
-# SPDX-License-Identifier: GPL-2.0+
+# SPDX-License-Identifier: GPL-2.0+
 #
 # Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/
 obj-y += clk-data.o
diff --git a/arch/arm/mach-k3/r5/j721s2/Makefile 
b/arch/arm/mach-k3/r5/j721s2/Makefile
index e794bffb3afa9..8588c5e4c39c6 100644
--- a/arch/arm/mach-k3/r5/j721s2/Makefile
+++ b/arch/arm/mach-k3/r5/j721s2/Makefile
@@ -1,4 +1,4 @@
-# SPDX-License-Identifier: GPL-2.0+
+# SPDX-License-Identifier: GPL-2.0+
 #
 # Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
 obj-y += clk-data.o

-- 
2.43.2

[PATCH v4 04/13] ram: k3-ddrss: enable the am62ax's DDR controller for am62px

[Bryan Brattlof]

The am62px family of SoCs uses the same DDR controller as found on the
am62ax family. Enable this option when building for the am62px family

Reviewed-by: Neha Malcom Francis 
Signed-off-by: Bryan Brattlof 
---
 drivers/ram/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/ram/Kconfig b/drivers/ram/Kconfig
index 8e9e53cbb0e1f..9838a2798f922 100644
--- a/drivers/ram/Kconfig
+++ b/drivers/ram/Kconfig
@@ -65,7 +65,7 @@ choice
default K3_J721E_DDRSS if SOC_K3_J721E || SOC_K3_J721S2 || SOC_K3_J784S4
default K3_AM64_DDRSS if SOC_K3_AM642
default K3_AM64_DDRSS if SOC_K3_AM625
-   default K3_AM62A_DDRSS if SOC_K3_AM62A7
+   default K3_AM62A_DDRSS if SOC_K3_AM62A7 || SOC_K3_AM62P5
 
 config K3_J721E_DDRSS
bool "Enable J721E DDRSS support"

-- 
2.43.2

[PATCH v4 07/13] board: ti: introduce basic board files for the am62px family

[Bryan Brattlof]

Introduce the basic files needed to support the am62px family of SoCs

Co-developed-by: Hari Nagalla 
Signed-off-by: Hari Nagalla 
Reviewed-by: Tom Rini 
Signed-off-by: Bryan Brattlof 
---
 board/ti/am62px/Kconfig  |  26 ++
 board/ti/am62px/MAINTAINERS  |   9 +
 board/ti/am62px/Makefile |   7 +
 board/ti/am62px/am62px.env   |  15 +
 board/ti/am62px/board-cfg.yaml   |  37 ++
 board/ti/am62px/evm.c|  29 ++
 board/ti/am62px/pm-cfg.yaml  |  12 +
 board/ti/am62px/rm-cfg.yaml  | 987 +++
 board/ti/am62px/sec-cfg.yaml | 378 +++
 board/ti/am62px/tifs-rm-cfg.yaml | 879 ++
 10 files changed, 2379 insertions(+)

diff --git a/board/ti/am62px/Kconfig b/board/ti/am62px/Kconfig
new file mode 100644
index 0..9d95ffd9b2908
--- /dev/null
+++ b/board/ti/am62px/Kconfig
@@ -0,0 +1,26 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
+#
+
+if TARGET_AM62P5_R5_EVM || TARGET_AM62P5_A53_EVM
+
+config SYS_BOARD
+   default "am62px"
+
+config SYS_VENDOR
+   default "ti"
+
+config SYS_CONFIG_NAME
+   default "am62px_evm"
+
+source "board/ti/common/Kconfig"
+
+endif
+
+if TARGET_AM62P5_R5_EVM
+
+config SPL_LDSCRIPT
+   default "arch/arm/mach-omap2/u-boot-spl.lds"
+
+endif
diff --git a/board/ti/am62px/MAINTAINERS b/board/ti/am62px/MAINTAINERS
new file mode 100644
index 0..57c86ddbc4aef
--- /dev/null
+++ b/board/ti/am62px/MAINTAINERS
@@ -0,0 +1,9 @@
+AM62Px BOARD
+M: Vignesh Raghavendra 
+M: Bryan Brattlof 
+M: Tom Rini 
+S: Maintained
+F: board/ti/am62px/
+F: include/configs/am62p5_evm.h
+F: configs/am62px_evm_r5_defconfig
+F: configs/am62px_evm_a53_defconfig
diff --git a/board/ti/am62px/Makefile b/board/ti/am62px/Makefile
new file mode 100644
index 0..921afdff27a24
--- /dev/null
+++ b/board/ti/am62px/Makefile
@@ -0,0 +1,7 @@
+#
+# Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y  += evm.o
diff --git a/board/ti/am62px/am62px.env b/board/ti/am62px/am62px.env
new file mode 100644
index 0..f8b6aff2c2fdf
--- /dev/null
+++ b/board/ti/am62px/am62px.env
@@ -0,0 +1,15 @@
+#include 
+#include 
+
+name_kern=Image
+console=ttyS2,115200n8
+args_all=setenv optargs ${optargs} earlycon=ns16550a,mmio32,0x0280
+   ${mtdparts}
+run_kern=booti ${loadaddr} ${rd_spec} ${fdtaddr}
+
+boot_targets=mmc1 mmc0 pxe dhcp
+boot=mmc
+mmcdev=1
+bootpart=1:2
+bootdir=/boot
+rd_spec=-
diff --git a/board/ti/am62px/board-cfg.yaml b/board/ti/am62px/board-cfg.yaml
new file mode 100644
index 0..d539011aff9f3
--- /dev/null
+++ b/board/ti/am62px/board-cfg.yaml
@@ -0,0 +1,37 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Board configuration for AM62Px SoCs
+#
+
+---
+
+board-cfg:
+rev:
+boardcfg_abi_maj: 0x0
+boardcfg_abi_min: 0x1
+control:
+subhdr:
+magic: 0xC1D3
+size: 7
+main_isolation_enable: 0x5A
+main_isolation_hostid: 0x2
+secproxy:
+subhdr:
+magic: 0x1207
+size: 7
+scaling_factor: 0x1
+scaling_profile: 0x1
+disable_main_nav_secure_proxy: 0
+msmc:
+subhdr:
+magic: 0xA5C3
+size: 5
+msmc_cache_size: 0x10
+debug_cfg:
+subhdr:
+magic: 0x020C
+size: 8
+trace_dst_enables: 0x00
+trace_src_enables: 0x00
diff --git a/board/ti/am62px/evm.c b/board/ti/am62px/evm.c
new file mode 100644
index 0..97a95ce8cc2d5
--- /dev/null
+++ b/board/ti/am62px/evm.c
@@ -0,0 +1,29 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Board specific initialization for AM62Px platforms
+ *
+ * Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
+ *
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+int board_init(void)
+{
+   return 0;
+}
+
+int dram_init(void)
+{
+   return fdtdec_setup_mem_size_base();
+}
+
+int dram_init_banksize(void)
+{
+   return fdtdec_setup_memory_banksize();
+}
diff --git a/board/ti/am62px/pm-cfg.yaml b/board/ti/am62px/pm-cfg.yaml
new file mode 100644
index 0..3ff27ce702c26
--- /dev/null
+++ b/board/ti/am62px/pm-cfg.yaml
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
+#
+# Power management configuration for AM62Px
+#
+#
+---
+pm-cfg:
+rev:
+boardcfg_abi_maj: 0x0
+boardcfg_abi_min: 0x1
diff --git a/board/ti/am62px/rm-cfg.yaml b/board/ti/am62px/rm-cfg.yaml
new file mode 100644
index 0..caa2f7a5a83e1
--- /dev/null
+++ b/board/ti/am62px/rm-cfg.yaml
@@ -0,0 +1,987 @@
+# SPDX-License-Identifier: GPL-2.0+
+# 

[PATCH v4 00/13] Introduce basic support for TI's AM62Px SoC family

[Bryan Brattlof]

Hello Again Everyone!

The AM62Px is an extension of the existing Sitara AM62x low-cost family
of application processors built for Automotive and Linux Application
development. Scalable Arm Cortex-A53 performance and embedded features,
such as: multi high-definition display support, 3D-graphics
acceleration, 4K video acceleration, and extensive peripherals make the
AM62Px well-suited for a broad range of automation and industrial
application, including automotive digital instrumentation, automotive
displays, industrial HMI, and more.

Some highlights of AM62P SoC are:

* Quad-Cortex-A53s (running up to 1.4GHz) in a single cluster.
  Dual/Single core variants are provided in the same package to allow HW
  compatible designs.

* One Device manager Cortex-R5F for system power and resource
  management, and one Cortex-R5F for Functional Safety or
  general-purpose usage.

* One 3D GPU up to 50 GLFOPS

* H.264/H.265 Video Encode/Decode.

* Display support: 3x display support over OLDI/LVDS (1x OLDI-DL, 1x or
  2x OLDI-SL), DSI, or DPI. Up to 3840x1080 @ 60fps resolution

* Integrated Giga-bit Ethernet switch supporting up to a total of two
  external ports (TSN capable).

* 9xUARTs, 5xSPI, 6xI2C, 2xUSB2, 3xCAN-FD, 3xMMC and SD, GPMC for
  NAND/FPGA connection, OSPI memory controller, 3xMcASP for audio,
  1xCSI-RX-4L for Camera, eCAP/eQEP, ePWM, among other peripherals.

* Dedicated Centralized Hardware Security Module with support for secure
  boot, debug security and crypto acceleration and trusted execution
  environment.

* One 32-bit DDR Subsystem that supports LPDDR4, DDR4 memory types.

* Multiple low power modes support, ex: Deep sleep, Standby, MCU-only,
  enabling battery powered system design.

For those interested, more details about this SoC can be found in the
Technical Reference Manual here: https://www.ti.com/lit/pdf/spruj83

Proof-of-Life: 
https://paste.sr.ht/~bryanb/af2ac108a9362549aa326f182e87918d52bf2d71

Thanks for reviewing!
~Bryan

Changes from v3: [2]
 - rebased on current -next
 - moved remove_fwl_configs() inside the 'has rom loaded the sysfw' 
   check to avoid removing the firewalls when the A53 SPL is executed.
 - added the TFA address for the AM62Px to the ATF_LOAD_ADDR Kconfig
 - fixed formatting issues with clk and dev auto-generated files

 Changes from v2: [1]
 - dropped the extra ARCH_K3 not needed for the K3_DM_FW option
 - removed the extra _pktdma and _bcdma nodes already
   present in the kernel dtbs
 - corrected a few patch fixup errors
 - rebased ontop op OF_UPSTREAM v5 [0]
 - %s/uboot/U-Boot/g

Changes from v1: [0]
 - squashed all clk and lpsc tree updates into a single commit
 - corrected SOC_K3_AM642 typo with DM firmware Kconfig option
 - updated RM configs and dma nodes to enable IP that need DMA
 - added the dtb targets to the dts/Makefile
 - rebased the series on top of v2024.01-rc1
 - switched to bootstd rather than use distro boot scripts.
 - enabled OF_UPSTREAM instead of using the arch/arm/dts directory

[0] https://lore.kernel.org/all/20231012230616.2101992-13...@ti.com/
[1] https://lore.kernel.org/u-boot/20240201030634.1120963-17...@ti.com/
[2] 
https://lore.kernel.org/u-boot/20240205-am62px-wip-rebasing-v3-0-04cbb42ea...@ti.com/

---
Bryan Brattlof (11):
  soc: add info to identify the am62p SoC family
  power: domain: ti: use IS_ENABLED macro
  arm: mach-k3: am62px: introduce clock and device files for wkup spl
  ram: k3-ddrss: enable the am62ax's DDR controller for am62px
  arm: mach-k3: invert logic for split DM firmware config
  arch: mach-k3: introduce basic files to support the am62px SoC family
  board: ti: introduce basic board files for the am62px family
  arm: dts: introduce am62p5 U-Boot dts files
  configs: introduce configs needed for the am62px
  doc: board: ti: introduce am62px documentation
  arm: mach-k3: fixup whitespace in SPDX License IDs

Hari Nagalla (1):
  firmware: ti_sci_static_data: add static DMA channel data

Vignesh Raghavendra (1):
  dma: ti: k3-udma: Add DMA PSIL mappings for AM62P and J722S

 arch/arm/dts/Makefile  |2 +
 arch/arm/dts/k3-am62p-ddr-lp4-50-1600.dtsi | 2800 
 arch/arm/dts/k3-am62p-sk-binman.dtsi   |  173 ++
 arch/arm/dts/k3-am62p5-r5-sk.dts   |  101 +
 arch/arm/dts/k3-am62p5-sk-u-boot.dtsi  |   23 +
 arch/arm/mach-k3/Kconfig   |9 +-
 arch/arm/mach-k3/Makefile  |1 +
 arch/arm/mach-k3/am62p5_init.c |  281 +++
 arch/arm/mach-k3/am62px/Kconfig|   32 +
 arch/arm/mach-k3/include/mach/am62p_hardware.h |   83 +
 arch/arm/mach-k3/include/mach/am62p_spl.h  |   49 +
 arch/arm/mach-k3/include/mach/hardware.h   |6 +
 arch/arm/mach-k3/include/mach/spl.h|4 +
 arch/arm/mach-k3/r5/Makefile   |1 +
 arch/arm/mach-k3/r5/am62ax/Makefile|2 +-
 

[PATCH v4 12/13] doc: board: ti: introduce am62px documentation

[Bryan Brattlof]

Introduce basic documentation for the am62p family of SoCs.

Signed-off-by: Bryan Brattlof 
---
 doc/board/ti/am62px_sk.rst | 289 +
 doc/board/ti/k3.rst|   1 +
 2 files changed, 290 insertions(+)

diff --git a/doc/board/ti/am62px_sk.rst b/doc/board/ti/am62px_sk.rst
new file mode 100644
index 0..1f2982c36f9e4
--- /dev/null
+++ b/doc/board/ti/am62px_sk.rst
@@ -0,0 +1,289 @@
+.. SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
+.. sectionauthor:: Bryan Brattlof 
+
+AM62Px Platforms
+
+
+The AM62Px is an extension of the existing Sitara AM62x low-cost family
+of application processors built for Automotive and Linux Application
+development. Scalable Arm Cortex-A53 performance and embedded features,
+such as: multi high-definition display support, 3D-graphics
+acceleration, 4K video acceleration, and extensive peripherals make the
+AM62Px well-suited for a broad range of automation and industrial
+application, including automotive digital instrumentation, automotive
+displays, industrial HMI, and more.
+
+Some highlights of AM62P SoC are:
+
+* Quad-Cortex-A53s (running up to 1.4GHz) in a single cluster.
+  Dual/Single core variants are provided in the same package to allow HW
+  compatible designs.
+
+* One Device manager Cortex-R5F for system power and resource
+  management, and one Cortex-R5F for Functional Safety or
+  general-purpose usage.
+
+* One 3D GPU up to 50 GLFOPS
+
+* H.264/H.265 Video Encode/Decode.
+
+* Display support: 3x display support over OLDI/LVDS (1x OLDI-DL, 1x or
+  2x OLDI-SL), DSI, or DPI. Up to 3840x1080 @ 60fps resolution
+
+* Integrated Giga-bit Ethernet switch supporting up to a total of two
+  external ports (TSN capable).
+
+* 9xUARTs, 5xSPI, 6xI2C, 2xUSB2, 3xCAN-FD, 3xMMC and SD, GPMC for
+  NAND/FPGA connection, OSPI memory controller, 3xMcASP for audio,
+  1xCSI-RX-4L for Camera, eCAP/eQEP, ePWM, among other peripherals.
+
+* Dedicated Centralized Hardware Security Module with support for secure
+  boot, debug security and crypto acceleration and trusted execution
+  environment.
+
+* One 32-bit DDR Subsystem that supports LPDDR4, DDR4 memory types.
+
+* Multiple low power modes support, ex: Deep sleep, Standby, MCU-only,
+  enabling battery powered system design.
+
+For those interested, more details about this SoC can be found in the
+Technical Reference Manual here: https://www.ti.com/lit/pdf/spruj83
+
+Boot Flow:
+--
+
+The bootflow is exactly the same as all SoCs in the am62xxx extended SoC
+family. Below is the pictorial representation:
+
+.. image:: img/boot_diagram_k3_current.svg
+  :alt: Boot flow diagram
+
+- Here TIFS acts as master and provides all the critical services. R5/A53
+  requests TIFS to get these services done as shown in the above diagram.
+
+Sources:
+
+
+.. include::  ../ti/k3.rst
+:start-after: .. k3_rst_include_start_boot_sources
+:end-before: .. k3_rst_include_end_boot_sources
+
+Build procedure:
+
+
+0. Setup the environment variables:
+
+.. include::  ../ti/k3.rst
+:start-after: .. k3_rst_include_start_common_env_vars_desc
+:end-before: .. k3_rst_include_end_common_env_vars_desc
+
+.. include::  ../ti/k3.rst
+:start-after: .. k3_rst_include_start_board_env_vars_desc
+:end-before: .. k3_rst_include_end_board_env_vars_desc
+
+Set the variables corresponding to this platform:
+
+.. include::  ../ti/k3.rst
+:start-after: .. k3_rst_include_start_common_env_vars_defn
+:end-before: .. k3_rst_include_end_common_env_vars_defn
+
+.. code-block:: bash
+
+ $ export UBOOT_CFG_CORTEXR=am62px_evm_r5_defconfig
+ $ export UBOOT_CFG_CORTEXA=am62px_evm_a53_defconfig
+ $ export TFA_BOARD=lite
+ $ # we dont use any extra TFA parameters
+ $ unset TFA_EXTRA_ARGS
+ $ export OPTEE_PLATFORM=k3-am62x
+ $ export OPTEE_EXTRA_ARGS="CFG_WITH_SOFTWARE_PRNG=y"
+
+.. am62px_evm_rst_include_start_build_steps
+
+1. Trusted Firmware-A:
+
+.. include::  ../ti/k3.rst
+:start-after: .. k3_rst_include_start_build_steps_tfa
+:end-before: .. k3_rst_include_end_build_steps_tfa
+
+
+2. OP-TEE:
+
+.. include::  ../ti/k3.rst
+:start-after: .. k3_rst_include_start_build_steps_optee
+:end-before: .. k3_rst_include_end_build_steps_optee
+
+3. U-Boot:
+
+* 3.1 R5:
+
+.. include::  ../ti/k3.rst
+:start-after: .. k3_rst_include_start_build_steps_spl_r5
+:end-before: .. k3_rst_include_end_build_steps_spl_r5
+
+* 3.2 A53:
+
+.. include::  ../ti/k3.rst
+:start-after: .. k3_rst_include_start_build_steps_uboot
+:end-before: .. k3_rst_include_end_build_steps_uboot
+.. am62px_evm_rst_include_end_build_steps
+
+Target Images
+--
+
+In order to boot we need tiboot3.bin, tispl.bin and u-boot.img.  Each SoC
+variant (HS-FS, HS-SE) requires a different source for these files.
+
+ - HS-FS
+
+* tiboot3-am62px-hs-fs-evm.bin from step 3.1
+* tispl.bin, u-boot.img from step 3.2
+
+ - HS-SE
+
+* 

[PATCH v4 09/13] dma: ti: k3-udma: Add DMA PSIL mappings for AM62P and J722S

[Bryan Brattlof]

From: Vignesh Raghavendra 

Add PSIL data for the AM62P and the J722S SoC family. The PSIL mapping
for the J722S is the same except for the extra instances of the CSI-RX.
So let's reuse the same file for both the AM62P and J722S.

Signed-off-by: Vignesh Raghavendra 
Signed-off-by: Ravi Gunasekaran 
Signed-off-by: Vaishnav Achath 
Signed-off-by: Jayesh Choudhary 
[b...@ti.com: rebased to U-Boot v2024.01]
Signed-off-by: Bryan Brattlof 
---
 drivers/dma/ti/Makefile|   2 +
 drivers/dma/ti/k3-psil-am62p.c | 325 +
 drivers/dma/ti/k3-psil-priv.h  |   1 +
 drivers/dma/ti/k3-psil.c   |   4 +
 4 files changed, 332 insertions(+)

diff --git a/drivers/dma/ti/Makefile b/drivers/dma/ti/Makefile
index 9e0b13e8c0215..94ec13ba7ca44 100644
--- a/drivers/dma/ti/Makefile
+++ b/drivers/dma/ti/Makefile
@@ -10,3 +10,5 @@ k3-psil-data-$(CONFIG_SOC_K3_AM642) += k3-psil-am64.o
 k3-psil-data-$(CONFIG_SOC_K3_AM625) += k3-psil-am62.o
 k3-psil-data-$(CONFIG_SOC_K3_AM62A7) += k3-psil-am62a.o
 k3-psil-data-$(CONFIG_SOC_K3_J784S4) += k3-psil-j784s4.o
+k3-psil-data-$(CONFIG_SOC_K3_AM62P5) += k3-psil-am62p.o
+k3-psil-data-$(CONFIG_SOC_K3_J722S) += k3-psil-am62p.o
diff --git a/drivers/dma/ti/k3-psil-am62p.c b/drivers/dma/ti/k3-psil-am62p.c
new file mode 100644
index 0..8739bf41b5b7c
--- /dev/null
+++ b/drivers/dma/ti/k3-psil-am62p.c
@@ -0,0 +1,325 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ *  Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com
+ */
+
+#include 
+
+#include "k3-psil-priv.h"
+
+#define PSIL_PDMA_XY_TR(x) \
+   {   \
+   .thread_id = x, \
+   .ep_config = {  \
+   .ep_type = PSIL_EP_PDMA_XY, \
+   .mapped_channel_id = -1,\
+   .default_flow_id = -1,  \
+   },  \
+   }
+
+#define PSIL_PDMA_XY_PKT(x)\
+   {   \
+   .thread_id = x, \
+   .ep_config = {  \
+   .ep_type = PSIL_EP_PDMA_XY, \
+   .mapped_channel_id = -1,\
+   .default_flow_id = -1,  \
+   .pkt_mode = 1,  \
+   },  \
+   }
+
+#define PSIL_ETHERNET(x, ch, flow_base, flow_cnt)  \
+   {   \
+   .thread_id = x, \
+   .ep_config = {  \
+   .ep_type = PSIL_EP_NATIVE,  \
+   .pkt_mode = 1,  \
+   .needs_epib = 1,\
+   .psd_size = 16, \
+   .mapped_channel_id = ch,\
+   .flow_start = flow_base,\
+   .flow_num = flow_cnt,   \
+   .default_flow_id = flow_base,   \
+   },  \
+   }
+
+#define PSIL_SAUL(x, ch, flow_base, flow_cnt, default_flow, tx)\
+   {   \
+   .thread_id = x, \
+   .ep_config = {  \
+   .ep_type = PSIL_EP_NATIVE,  \
+   .pkt_mode = 1,  \
+   .needs_epib = 1,\
+   .psd_size = 64, \
+   .mapped_channel_id = ch,\
+   .flow_start = flow_base,\
+   .flow_num = flow_cnt,   \
+   .default_flow_id = default_flow,\
+   .notdpkt = tx,  \
+   },  \
+   }
+
+#define PSIL_PDMA_MCASP(x) \
+   {   \
+   .thread_id = x, \
+   .ep_config = {  \
+   .ep_type = PSIL_EP_PDMA_XY, \
+   .pdma_acc32 = 1,\
+   .pdma_burst = 1,\
+   },  \
+   

[PATCH v4 06/13] arch: mach-k3: introduce basic files to support the am62px SoC family

[Bryan Brattlof]

Introduce the basic functions and definitions needed to properly
initialize TI's am62p family of SoCs

Signed-off-by: Bryan Brattlof 
---
 arch/arm/mach-k3/Kconfig   |   7 +-
 arch/arm/mach-k3/Makefile  |   1 +
 arch/arm/mach-k3/am62p5_init.c | 281 +
 arch/arm/mach-k3/am62px/Kconfig|  32 +++
 arch/arm/mach-k3/include/mach/am62p_hardware.h |  83 
 arch/arm/mach-k3/include/mach/am62p_spl.h  |  49 +
 arch/arm/mach-k3/include/mach/hardware.h   |   4 +
 arch/arm/mach-k3/include/mach/spl.h|   4 +
 8 files changed, 460 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-k3/Kconfig b/arch/arm/mach-k3/Kconfig
index 6a937ff96d208..2bb970c2d4c9b 100644
--- a/arch/arm/mach-k3/Kconfig
+++ b/arch/arm/mach-k3/Kconfig
@@ -10,6 +10,9 @@ config SOC_K3_AM625
 config SOC_K3_AM62A7
bool "TI's K3 based AM62A7 SoC Family Support"
 
+config SOC_K3_AM62P5
+   bool "TI's K3 based AM62P5 SoC Family Support"
+
 config SOC_K3_AM642
bool "TI's K3 based AM642 SoC Family Support"
 
@@ -80,6 +83,7 @@ config SYS_K3_BOOT_PARAM_TABLE_INDEX
default 0x43c3f290 if SOC_K3_AM625
default 0x43c3f290 if SOC_K3_AM62A7 && CPU_V7R
default 0x7000f290 if SOC_K3_AM62A7 && ARM64
+   default 0x43c4f290 if SOC_K3_AM62P5
help
  Address at which ROM stores the value which determines if SPL
  is booted up by primary boot media or secondary boot media.
@@ -118,7 +122,7 @@ config K3_EARLY_CONS_IDX
 
 config K3_ATF_LOAD_ADDR
hex "Load address of ATF image"
-   default 0x8000 if (SOC_K3_AM625 || SOC_K3_AM62A7)
+   default 0x8000 if (SOC_K3_AM625 || SOC_K3_AM62A7 || SOC_K3_AM62P5)
default 0x7000
help
  The load address for the ATF image. This value is used to build the
@@ -156,6 +160,7 @@ source "arch/arm/mach-k3/am65x/Kconfig"
 source "arch/arm/mach-k3/am64x/Kconfig"
 source "arch/arm/mach-k3/am62x/Kconfig"
 source "arch/arm/mach-k3/am62ax/Kconfig"
+source "arch/arm/mach-k3/am62px/Kconfig"
 source "arch/arm/mach-k3/j721e/Kconfig"
 source "arch/arm/mach-k3/j721s2/Kconfig"
 source "arch/arm/mach-k3/j784s4/Kconfig"
diff --git a/arch/arm/mach-k3/Makefile b/arch/arm/mach-k3/Makefile
index 310a4c211404b..6ee9864c72cad 100644
--- a/arch/arm/mach-k3/Makefile
+++ b/arch/arm/mach-k3/Makefile
@@ -22,5 +22,6 @@ obj-$(CONFIG_SOC_K3_AM642) += am642_init.o
 obj-$(CONFIG_SOC_K3_AM625) += am625_init.o
 obj-$(CONFIG_SOC_K3_AM62A7) += am62a7_init.o
 obj-$(CONFIG_SOC_K3_J784S4) += j784s4_init.o
+obj-$(CONFIG_SOC_K3_AM62P5) += am62p5_init.o
 endif
 obj-y += common.o security.o
diff --git a/arch/arm/mach-k3/am62p5_init.c b/arch/arm/mach-k3/am62p5_init.c
new file mode 100644
index 0..aab99aa0c958f
--- /dev/null
+++ b/arch/arm/mach-k3/am62p5_init.c
@@ -0,0 +1,281 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * AM62P5: SoC specific initialization
+ *
+ * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+#include 
+#include 
+#include 
+#include "sysfw-loader.h"
+#include "common.h"
+#include 
+#include 
+#include 
+
+struct fwl_data cbass_main_fwls[] = {
+   { "FSS_DAT_REG3", 7, 8 },
+};
+
+/*
+ * This uninitialized global variable would normal end up in the .bss section,
+ * but the .bss is cleared between writing and reading this variable, so move
+ * it to the .data section.
+ */
+u32 bootindex __section(".data");
+static struct rom_extended_boot_data bootdata __section(".data");
+
+static void store_boot_info_from_rom(void)
+{
+   bootindex = *(u32 *)(CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX);
+   memcpy(, (uintptr_t *)ROM_EXTENDED_BOOT_DATA_INFO,
+  sizeof(struct rom_extended_boot_data));
+}
+
+static void ctrl_mmr_unlock(void)
+{
+   /* Unlock all WKUP_CTRL_MMR0 module registers */
+   mmr_unlock(WKUP_CTRL_MMR0_BASE, 0);
+   mmr_unlock(WKUP_CTRL_MMR0_BASE, 1);
+   mmr_unlock(WKUP_CTRL_MMR0_BASE, 2);
+   mmr_unlock(WKUP_CTRL_MMR0_BASE, 3);
+   mmr_unlock(WKUP_CTRL_MMR0_BASE, 4);
+   mmr_unlock(WKUP_CTRL_MMR0_BASE, 5);
+   mmr_unlock(WKUP_CTRL_MMR0_BASE, 6);
+   mmr_unlock(WKUP_CTRL_MMR0_BASE, 7);
+
+   /* Unlock all CTRL_MMR0 module registers */
+   mmr_unlock(CTRL_MMR0_BASE, 0);
+   mmr_unlock(CTRL_MMR0_BASE, 1);
+   mmr_unlock(CTRL_MMR0_BASE, 2);
+   mmr_unlock(CTRL_MMR0_BASE, 4);
+   mmr_unlock(CTRL_MMR0_BASE, 5);
+   mmr_unlock(CTRL_MMR0_BASE, 6);
+
+   /* Unlock all MCU_CTRL_MMR0 module registers */
+   mmr_unlock(MCU_CTRL_MMR0_BASE, 0);
+   mmr_unlock(MCU_CTRL_MMR0_BASE, 1);
+   mmr_unlock(MCU_CTRL_MMR0_BASE, 2);
+   mmr_unlock(MCU_CTRL_MMR0_BASE, 3);
+   mmr_unlock(MCU_CTRL_MMR0_BASE, 4);
+   mmr_unlock(MCU_CTRL_MMR0_BASE, 6);
+
+   /* Unlock PADCFG_CTRL_MMR padconf registers */
+   mmr_unlock(PADCFG_MMR0_BASE, 1);
+   mmr_unlock(PADCFG_MMR1_BASE, 1);
+}
+
+void 

[PATCH v4 01/13] soc: add info to identify the am62p SoC family

[Bryan Brattlof]

Include the part number for TI's am62px family of SoCs so we can
properly identify it during boot

Reviewed-by: Igor Opaniuk 
Reviewed-by: Neha Malcom Francis 
Signed-off-by: Bryan Brattlof 
---
 arch/arm/mach-k3/include/mach/hardware.h | 2 ++
 drivers/soc/soc_ti_k3.c  | 3 +++
 2 files changed, 5 insertions(+)

diff --git a/arch/arm/mach-k3/include/mach/hardware.h 
b/arch/arm/mach-k3/include/mach/hardware.h
index 055715f20d6f2..224367d9f1adc 100644
--- a/arch/arm/mach-k3/include/mach/hardware.h
+++ b/arch/arm/mach-k3/include/mach/hardware.h
@@ -43,6 +43,7 @@
 #define JTAG_ID_PARTNO_SHIFT   12
 #define JTAG_ID_PARTNO_MASK(0x << 12)
 #define JTAG_ID_PARTNO_AM62AX   0xbb8d
+#define JTAG_ID_PARTNO_AM62PX  0xbb9d
 #define JTAG_ID_PARTNO_AM62X   0xbb7e
 #define JTAG_ID_PARTNO_AM64X   0xbb38
 #define JTAG_ID_PARTNO_AM65X   0xbb5a
@@ -65,6 +66,7 @@ K3_SOC_ID(am64x, AM64X)
 K3_SOC_ID(j721s2, J721S2)
 K3_SOC_ID(am62x, AM62X)
 K3_SOC_ID(am62ax, AM62AX)
+K3_SOC_ID(am62px, AM62PX)
 
 #define K3_SEC_MGR_SYS_STATUS  0x44234100
 #define SYS_STATUS_DEV_TYPE_SHIFT  0
diff --git a/drivers/soc/soc_ti_k3.c b/drivers/soc/soc_ti_k3.c
index d176980915605..3a4e58bba6715 100644
--- a/drivers/soc/soc_ti_k3.c
+++ b/drivers/soc/soc_ti_k3.c
@@ -48,6 +48,9 @@ static const char *get_family_string(u32 idreg)
case JTAG_ID_PARTNO_J784S4:
family = "J784S4";
break;
+   case JTAG_ID_PARTNO_AM62PX:
+   family = "AM62PX";
+   break;
default:
family = "Unknown Silicon";
};

-- 
2.43.2

[PATCH v4 05/13] arm: mach-k3: invert logic for split DM firmware config

[Bryan Brattlof]

Currently, for the K3 generation of SoCs, there are more SoCs that
utilize the split firmware approach than the combined DMSC firmware.
Invert the logic to avoid adding more and more SoCs to this list.

Reviewed-by: Neha Malcom Francis 
Acked-by: Andrew Davis 
Signed-off-by: Bryan Brattlof 
---
 arch/arm/mach-k3/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/mach-k3/Kconfig b/arch/arm/mach-k3/Kconfig
index fc971d517ab16..6a937ff96d208 100644
--- a/arch/arm/mach-k3/Kconfig
+++ b/arch/arm/mach-k3/Kconfig
@@ -133,7 +133,7 @@ config K3_OPTEE_LOAD_ADDR
 
 config K3_DM_FW
bool "Separate DM firmware image"
-   depends on CPU_V7R && (SOC_K3_J721E || SOC_K3_J721S2 || SOC_K3_AM625 || 
SOC_K3_AM62A7 || SOC_K3_J784S4) && !CLK_TI_SCI && !TI_SCI_POWER_DOMAIN
+   depends on CPU_V7R && !SOC_K3_AM642 && !SOC_K3_AM654 && !CLK_TI_SCI && 
!TI_SCI_POWER_DOMAIN
default y
help
  Enabling this will indicate that the system has separate DM

-- 
2.43.2

[PATCH v4 11/13] configs: introduce configs needed for the am62px

[Bryan Brattlof]

Introduce the initial configs needed to support the am62px SoC family

Signed-off-by: Bryan Brattlof 
---
 configs/am62px_evm_a53_defconfig | 177 +++
 configs/am62px_evm_r5_defconfig  | 137 ++
 include/configs/am62px_evm.h |  14 
 3 files changed, 328 insertions(+)

diff --git a/configs/am62px_evm_a53_defconfig b/configs/am62px_evm_a53_defconfig
new file mode 100644
index 0..2621abb8ce18a
--- /dev/null
+++ b/configs/am62px_evm_a53_defconfig
@@ -0,0 +1,177 @@
+CONFIG_ARM=y
+CONFIG_ARCH_K3=y
+CONFIG_TI_SECURE_DEVICE=y
+CONFIG_SYS_MALLOC_F_LEN=0x8000
+CONFIG_SPL_GPIO=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_NR_DRAM_BANKS=2
+CONFIG_SOC_K3_AM62P5=y
+CONFIG_TARGET_AM62P5_A53_EVM=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x8048
+CONFIG_SF_DEFAULT_SPEED=2500
+CONFIG_ENV_SIZE=0x4
+CONFIG_DM_GPIO=y
+CONFIG_SPL_DM_SPI=y
+CONFIG_OF_UPSTREAM=y
+CONFIG_DEFAULT_DEVICE_TREE="ti/k3-am62p5-sk"
+CONFIG_SPL_TEXT_BASE=0x8008
+CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_DM_RESET=y
+CONFIG_SPL_MMC=y
+CONFIG_SPL_SERIAL=y
+CONFIG_SPL_STACK_R_ADDR=0x8200
+CONFIG_SPL_FS_FAT=y
+CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI=y
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_LOAD_FIT_ADDRESS=0x8100
+CONFIG_BOOTSTD_FULL=y
+CONFIG_BOOTSTD_DEFAULTS=y
+CONFIG_BOOTCOMMAND="run envboot; bootflow scan -lb"
+CONFIG_SPL_MAX_SIZE=0x58000
+CONFIG_SPL_PAD_TO=0x0
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x80a0
+CONFIG_SPL_BSS_MAX_SIZE=0x8
+CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1400
+CONFIG_SPL_DMA=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img"
+CONFIG_SPL_I2C=y
+CONFIG_SPL_DM_MAILBOX=y
+CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_DM_SPI_FLASH=y
+CONFIG_SPL_POWER_DOMAIN=y
+CONFIG_SPL_RAM_SUPPORT=y
+CONFIG_SPL_RAM_DEVICE=y
+# CONFIG_SPL_SPI_FLASH_TINY is not set
+CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y
+CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x28
+CONFIG_SPL_THERMAL=y
+CONFIG_SPL_YMODEM_SUPPORT=y
+CONFIG_SYS_MAXARGS=64
+CONFIG_CMD_CLK=y
+CONFIG_CMD_DFU=y
+CONFIG_CMD_DM=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_MTD=y
+CONFIG_CMD_REMOTEPROC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_MTDPARTS=y
+CONFIG_CMD_UBI=y
+CONFIG_OF_CONTROL=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_MULTI_DTB_FIT=y
+CONFIG_SPL_MULTI_DTB_FIT=y
+CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_SPL_DM=y
+CONFIG_SPL_DM_DEVICE_REMOVE=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SPL_SYSCON=y
+CONFIG_SPL_OF_TRANSLATE=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_CLK_TI_SCI=y
+CONFIG_DFU_MMC=y
+CONFIG_DFU_MTD=y
+CONFIG_DFU_RAM=y
+CONFIG_DFU_SF=y
+CONFIG_SYS_DFU_DATA_BUF_SIZE=0x4
+CONFIG_SYS_DFU_MAX_FILE_SIZE=0x80
+CONFIG_DMA_CHANNELS=y
+CONFIG_TI_K3_NAVSS_UDMA=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_FASTBOOT_BUF_ADDR=0xC000
+CONFIG_FASTBOOT_BUF_SIZE=0x2F00
+CONFIG_TI_SCI_PROTOCOL=y
+CONFIG_SPL_DM_GPIO_LOOKUP_LABEL=y
+CONFIG_DA8XX_GPIO=y
+CONFIG_DM_PCA953X=y
+CONFIG_SPL_DM_PCA953X=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_OMAP24XX=y
+CONFIG_DM_MAILBOX=y
+CONFIG_K3_SEC_PROXY=y
+CONFIG_I2C_EEPROM=y
+CONFIG_SPL_I2C_EEPROM=y
+CONFIG_FS_LOADER=y
+CONFIG_SUPPORT_EMMC_BOOT=y
+CONFIG_MMC_IO_VOLTAGE=y
+CONFIG_SPL_MMC_IO_VOLTAGE=y
+CONFIG_MMC_HS400_SUPPORT=y
+CONFIG_SPL_MMC_HS400_SUPPORT=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_ADMA=y
+CONFIG_SPL_MMC_SDHCI_ADMA=y
+CONFIG_MMC_SDHCI_AM654=y
+CONFIG_MTD=y
+CONFIG_DM_MTD=y
+CONFIG_MTD_SPI_NAND=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH_SFDP_SUPPORT=y
+CONFIG_SPI_FLASH_SOFT_RESET=y
+CONFIG_SPI_FLASH_SOFT_RESET_ON_BOOT=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_S28HX_T=y
+CONFIG_PHY_TI_DP83867=y
+CONFIG_TI_AM65_CPSW_NUSS=y
+CONFIG_PINCTRL=y
+CONFIG_SPL_PINCTRL=y
+CONFIG_PINCTRL_SINGLE=y
+CONFIG_POWER_DOMAIN=y
+CONFIG_TI_SCI_POWER_DOMAIN=y
+CONFIG_DM_REGULATOR=y
+CONFIG_SPL_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_SPL_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_SPL_DM_REGULATOR_GPIO=y
+CONFIG_K3_SYSTEM_CONTROLLER=y
+CONFIG_REMOTEPROC_TI_K3_ARM64=y
+CONFIG_REMOTEPROC_TI_K3_DSP=y
+CONFIG_REMOTEPROC_TI_K3_R5F=y
+CONFIG_RESET_TI_SCI=y
+CONFIG_DM_SERIAL=y
+CONFIG_SOC_DEVICE=y
+CONFIG_SOC_DEVICE_TI_K3=y
+CONFIG_SOC_TI=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_CADENCE_QSPI=y
+CONFIG_SYSRESET=y
+CONFIG_SPL_SYSRESET=y
+CONFIG_SYSRESET_TI_SCI=y
+CONFIG_DM_THERMAL=y
+CONFIG_USB=y
+CONFIG_DM_USB_GADGET=y
+CONFIG_SPL_DM_USB_GADGET=y
+CONFIG_SPL_USB_HOST=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
+CONFIG_SPL_USB_DWC3_GENERIC=y
+CONFIG_SPL_USB_STORAGE=y

[PATCH v4 02/13] power: domain: ti: use IS_ENABLED macro

[Bryan Brattlof]

Cleanup this list and standardize on using the IS_ENABLED macro for the
power domain data list.

Reviewed-by: Igor Opaniuk 
Signed-off-by: Bryan Brattlof 
---
 drivers/power/domain/ti-power-domain.c | 7 ---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/power/domain/ti-power-domain.c 
b/drivers/power/domain/ti-power-domain.c
index fb4ca2dd6b45f..8fa9892c02c7a 100644
--- a/drivers/power/domain/ti-power-domain.c
+++ b/drivers/power/domain/ti-power-domain.c
@@ -81,19 +81,20 @@ static const struct soc_attr ti_k3_soc_pd_data[] = {
.family = "J7200",
.data = _pd_platdata,
},
-#elif CONFIG_SOC_K3_J721S2
+#endif
+#if IS_ENABLED(CONFIG_SOC_K3_J721S2)
{
.family = "J721S2",
.data = _pd_platdata,
},
 #endif
-#ifdef CONFIG_SOC_K3_AM625
+#if IS_ENABLED(CONFIG_SOC_K3_AM625)
{
.family = "AM62X",
.data = _pd_platdata,
},
 #endif
-#ifdef CONFIG_SOC_K3_AM62A7
+#if IS_ENABLED(CONFIG_SOC_K3_AM62A7)
{
.family = "AM62AX",
.data = _pd_platdata,

-- 
2.43.2

Re: [PATCH v3 2/4] clk: qcom: clear div mask before assigning a new divider

[Volodymyr Babchuk]

Hi Sumit,

Thank you for the review.

Sumit Garg  writes:

> On Tue, 12 Mar 2024 at 03:03, Volodymyr Babchuk
>  wrote:
>>
>> The current behaviour does a bitwise OR of the previous and new
>> divider values, this is wrong as some bits maybe be set already. We
>
> nit: s/maybe be/maybe/
>

Oops, right. Can this be applied by the committer during the merge
process? I know that committers in other open source project do this
sometimes. Or should I post a new version?

[...]

-- 
WBR, Volodymyr

Re: About U-Boot License

[Tom Rini]

To be clear, having both U-Boot and RTEMS on a flash image together is
not considered linking. Having U-Boot start RTEMS by the mechanism that
exists upstream today is also not considered linking.

On Tue, Mar 12, 2024 at 09:37:32AM +0900, 강훈 wrote:
> Dear Tom
> 
> Thank you for your reply soon.
> You mean only changed U-boot need to comply with the license?
> The proprietary OS no need to disclose(don't care) at this time, even if they 
> are merged by one image. right?
> 
> waiting for your kindly reply.
> 
> Regards
> Lion
> 
> -Original Message-
> From: "Tom Rini"
> To: "Kang Lion";
> Cc: "u-boot@lists.denx.de"; "HOON 
> KANG"; "lionk...@wavetc.com";
> Sent: 2024-03-12 (화) 03:24:23 (GMT+09:00)
> Subject: Re: About U-Boot License
> 
> On Mon, Mar 11, 2024 at 05:40:19AM +, Kang Lion wrote:
> 
> > Dear DAS
> >
> >
> > This is lion. Nice to meet you.
> >
> >
> > I'm sending you an e-mail because I have a question about the U-Boot 
> > license.
> > I would like to know about the obligation to disclose the U-Boot code 
> > currently provided by Xilinx(zynqMP).
> >
> >
> > 1. When we use a commercial OS code called RTEMS, we use U-Boot as the 
> > bootloader.
> > At this time, even if RTEMS OS is commercial, if we merge an image such as 
> > an open source called U-Boot to make a final image and use it, should I 
> > release all the codes? I want to know the scope of disclosure.
> >
> > Do we even have to disclose commercial RTEMS OS + Application?
> >
> >
> > 2. Or do you see only U-Boot as a separate image, and since the OS is 
> > commercial, there is no need to interpret it separately and disclose it?
> >
> > At this time, should the U-Boot be disclosed according to the license or 
> > not? I wonder.
> >
> >
> > cf) We will just change small part for only definition, but I'm afraid that 
> > we have to disclosure our every code of RTEMS and Application.
> >
> > That's why I'm questing it now.
> >
> > I know you're busy, but please answer me.
> 
> This is a question for your company's lawyers. U-Boot can of course be
> used to launch a proprietary OS. Changes you make to U-Boot need to
> comply with the license.
> 
> --
> Tom
> 

-- 
Tom


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Description: PGP signature

Re: [PATCH] arm64: zynqmp: Do not describe u-boot.itb if SPL is disabled

[Ilias Apalodimas]

On Tue, 12 Mar 2024 at 17:55, Michal Simek  wrote:
>
>
>
> On 3/12/24 07:14, Ilias Apalodimas wrote:
> > Hi Michal
> >
> > Apologies for the late reply
> >
> > On Wed, 6 Mar 2024 at 09:48, Michal Simek  wrote:
> >>
> >>
> >>
> >> On 3/5/24 16:47, Ilias Apalodimas wrote:
> >>> On Fri, Feb 23, 2024 at 05:18:42PM +0100, Michal Simek wrote:
>  There is no reason to describe u-boot.itb on system without SPL. Pretty
>  much this is cover all systems which are using only boot.bin which 
>  contains
>  all images inside.
> 
>  Signed-off-by: Michal Simek 
>  ---
> 
> board/xilinx/common/board.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
> 
>  diff --git a/board/xilinx/common/board.c b/board/xilinx/common/board.c
>  index 9641ed307b75..4f38b7d27684 100644
>  --- a/board/xilinx/common/board.c
>  +++ b/board/xilinx/common/board.c
>  @@ -43,7 +43,7 @@ struct efi_fw_image fw_images[] = {
>    .image_index = 1,
>    },
> #endif
>  -#if defined(XILINX_UBOOT_IMAGE_GUID)
>  +#if defined(XILINX_UBOOT_IMAGE_GUID) && 
>  defined(CONFIG_SPL_FS_LOAD_PAYLOAD_NAME)
> >>>
> >>> What happens if this is defined with CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="" ?
> >>
> >> Your comment is valid but I am not aware about any CONFIG_IS, etc which 
> >> checks
> >> that string is not empty. If name is "" it will return yes and second 
> >> image is
> >> doing to be defined.
> >>
> >> But I found handling in the code like this.
> >>
> >>36 #ifdef CONFIG_DEFAULT_FDT_FILE
> >>37 if (strlen(CONFIG_DEFAULT_FDT_FILE)) {
> >>
> >> which can be used in my second patch not to describe second image in
> >> set_dfu_alt_info() if string is empty.
> >
> > Yes, I think that's ok. The problem is that if we merge this as-is, we
> > would have to disable CONFIG_SPL_FS_FAT to make this work, which is a
> > bit misleading
>
> As Heinrich said not just this if you want to do it like this.
> I think you will simply disable the whole SPL which will disable this symbol 
> too.
> But from my perspective SPL payload name is driving this option. Data can end 
> up
> on partition or in raw mode but for dfu you need to use the name.

Yes, but isn't SPL selected by the Kconfig automatically? I can't seem
to be able to disable it for the kria platforms

Thanks
/Ilias
>
> Thanks,
> Michal
>
>

Re: [PATCH 7/7 v2] arm: remove redundant section alignments

[Richard Henderson]

On 3/12/24 04:08, Ilias Apalodimas wrote:

index 33f4624b561d..ccdd1966cfbc 100644
--- a/arch/arm/cpu/armv8/u-boot.lds
+++ b/arch/arm/cpu/armv8/u-boot.lds
@@ -132,7 +132,7 @@ SECTIONS

_end = .;

-   .bss ALIGN(8): {
+   .bss : {
__bss_start = .;
*(.bss*)
__bss_end = .;


The code in arch/arm/lib/crt0_64.S assumes __bss_end - __bss_start is a multiple of 8. 
But that could probably be replaced by a proper call to memset fairly easily.



diff --git a/arch/arm/cpu/u-boot.lds b/arch/arm/cpu/u-boot.lds
index b6b19a4174fe..a9fcbbf22e96 100644
--- a/arch/arm/cpu/u-boot.lds
+++ b/arch/arm/cpu/u-boot.lds
@@ -155,7 +155,7 @@ SECTIONS

__image_copy_end = .;

-   .rel.dyn ALIGN(4) : {
+   .rel.dyn : {
__rel_dyn_start = .;
*(.rel*)
__rel_dyn_end = .;


Because of the overlay, this affects .bss too.

The code in arch/arm/lib/crt0.S may or may not be configured to use memset.  When it 
isn't, it requires __bss_end - __bss_start to be a multiple of 4.  Why does this not 
always use memset?



r~

Re: [PATCH 6/7 v2] arm: move image_copy_start/end to linker symbols

[Richard Henderson]

On 3/12/24 04:08, Ilias Apalodimas wrote:

image_copy_start/end are defined as c variables in order to force the compiler
emit relative references. However, defining those within a section definition
will do the same thing since [0].

So let's remove the special sections from the linker scripts, the
variable definitions from sections.c and define them as a symbols within
a section.

[0] binutils commit 6b3b0ab89663 ("Make linker assigned symbol dynamic only for 
shared object")

Suggested-by: Sam Edwards
Signed-off-by: Ilias Apalodimas
Tested-by: Sam Edwards  # Binary output identical
---
  arch/arm/cpu/armv8/u-boot-spl.lds   | 7 ++-
  arch/arm/cpu/armv8/u-boot.lds   | 9 ++---
  arch/arm/cpu/u-boot-spl.lds | 2 +-
  arch/arm/cpu/u-boot.lds | 9 ++---
  arch/arm/lib/sections.c | 2 --
  arch/arm/mach-aspeed/ast2600/u-boot-spl.lds | 2 +-
  arch/arm/mach-rockchip/u-boot-tpl-v8.lds| 7 ++-
  arch/arm/mach-zynq/u-boot-spl.lds   | 2 +-
  arch/arm/mach-zynq/u-boot.lds   | 8 ++--
  9 files changed, 13 insertions(+), 35 deletions(-)


Reviewed-by: Richard Henderson 

r~

Re: [PATCH 5/7 v2] arm: fix __efi_runtime_start/end definitions

[Richard Henderson]

On 3/12/24 04:08, Ilias Apalodimas wrote:

__efi_runtime_start/end are defined as c variables for arm7 only in
order to force the compiler emit relative references. However, defining
those within a section definition will do the same thing since [0].
On top of that the v8 linker scripts define it as a symbol.

So let's remove the special sections from the linker scripts, the
variable definitions from sections.c and define them as a symbols within
the correct section.

[0] binutils commit 6b3b0ab89663 ("Make linker assigned symbol dynamic only for 
shared object")

Suggested-by: Sam Edwards
Signed-off-by: Ilias Apalodimas
Reviewed-by: Sam Edwards
Tested-by: Sam Edwards  # Binary output identical
---
  arch/arm/cpu/u-boot.lds| 12 +++-
  arch/arm/lib/sections.c|  2 --
  arch/arm/mach-zynq/u-boot.lds  | 12 +++-
  include/asm-generic/sections.h |  1 +
  4 files changed, 7 insertions(+), 20 deletions(-)


Reviewed-by: Richard Henderson 


r~

Re: [PATCH 4/7 v2] arm: clean up v7 and v8 linker scripts for __rel_dyn_start/end

[Richard Henderson]

On 3/12/24 04:08, Ilias Apalodimas wrote:

commit 47bd65ef057f ("arm: make __rel_dyn_{start, end} compiler-generated")
were moving the __rel_dyn_start/end on c generated variables that were
injected in their own sections. The reason was that we needed relative
relocations for position independent code and linker bugs back then
prevented us from doing so [0].

However, the linker documentation pages states that symbols that are
defined within a section definition will create a relocatable
type with the value being a fixed offset from the base of a section [1].

[0] binutils commit 6b3b0ab89663 ("Make linker assigned symbol dynamic only for 
shared object")
[1]https://sourceware.org/binutils/docs/ld/Expression-Section.html

Suggested-by: Sam Edwards
Signed-off-by: Ilias Apalodimas
Reviewed-by: Sam Edwards
Tested-by: Sam Edwards  # Binary output identical
---
  arch/arm/cpu/armv8/u-boot.lds | 16 +++-
  arch/arm/cpu/u-boot.lds   | 14 +++---
  arch/arm/lib/sections.c   |  2 --
  arch/arm/mach-zynq/u-boot.lds | 14 +++---
  4 files changed, 9 insertions(+), 37 deletions(-)


Reviewed-by: Richard Henderson 

r~

Re: [PATCH 3/7 v2] arm: fix __efi_runtime_rel_start/end definitions

[Richard Henderson]

On 3/12/24 04:08, Ilias Apalodimas wrote:

__efi_runtime_rel_start/end are defined as c variables for arm7 only in
order to force the compiler emit relative references. However, defining
those within a section definition will do the same thing since [0].
On top of that the v8 linker scripts define it as a symbol.

So let's remove the special sections from the linker scripts, the
variable definitions from sections.c and define them as a symbols within
the correct section.

[0] binutils commit 6b3b0ab89663 ("Make linker assigned symbol dynamic only for 
shared object")

Suggested-by: Sam Edwards
Signed-off-by: Ilias Apalodimas
Reviewed-by: Sam Edwards
Tested-by: Sam Edwards  # Binary output identical
---
  arch/arm/cpu/armv8/u-boot.lds  |  4 +---
  arch/arm/cpu/u-boot.lds| 16 +++-
  arch/arm/lib/sections.c|  2 --
  arch/arm/mach-zynq/u-boot.lds  | 16 +++-
  include/asm-generic/sections.h |  2 ++
  lib/efi_loader/efi_runtime.c   |  1 +
  6 files changed, 10 insertions(+), 31 deletions(-)


Reviewed-by: Richard Henderson 

r~

Re: [PATCH 2/7 v2] arm: clean up v7 and v8 linker scripts for bss_start/end

[Richard Henderson]

On 3/12/24 04:08, Ilias Apalodimas wrote:

-   .bss_start (NOLOAD) : {
-   . = ALIGN(8);


This alignment got lost.


-   KEEP(*(.__bss_start));
-   } >.sdram
-
-   .bss (NOLOAD) : {
+   .bss : {


If it is required, the best replacement would be here on the output section 
definition.


-   . = ALIGN(8);
-
-   .bss_start : {
-   KEEP(*(.__bss_start));
-   }
-
-   .bss : {
+   .bss ALIGN(8): {


Like you did here.


r~

Re: [GIT PULL] u-boot-riscv/master

[Tom Rini]

On Tue, Mar 12, 2024 at 04:51:50PM +0800, Leo Liang wrote:

> Hi Tom,
> 
> The following changes since commit f3c979dd0053c082d2df170446923e7ce5edbc2d:
> 
>   Prepare v2024.04-rc4 (2024-03-11 13:11:46 -0400)
> 
> are available in the Git repository at:
> 
>   https://source.denx.de/u-boot/custodians/u-boot-riscv.git 
> 
> for you to fetch changes up to 544af8207c69829b1697f3aa5dd682a299a6dea4:
> 
>   board: starfive: maintainer: Add visionfive2 PCIe driver (2024-03-12 
> 14:36:13 +0800)
> 
> CI result shows no issue: 
> https://source.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/19910

Applied to u-boot/master, thanks!

-- 
Tom


signature.asc
Description: PGP signature

Re: [PATCH v3 1/4] qcom: board: validate fdt before trying to use it

[Caleb Connolly]

On 11/03/2024 21:33, Volodymyr Babchuk wrote:
> There are cases when previous bootloader stage leaves some seemingly
> valid value in r0, which in fact does not point to valid FDT
> blob. This behavior was encountered when trying to boot U-Boot as
> "hyp" loader on SA8155P-ADP.
> 
> To be sure that we really got the pointer to a device tree we need to
> validate it with fdt_check_header() function.
> 
> Note: This approach is not 100% fool-proof, as get_prev_bl_fdt_addr()
> theoretically can return a pointer to a region that is not physically
> mapped and we will get data abort exception when fdt_check_header()
> will try to access it. But at this early boot stage we don't know
> where RAM is anyways so there is little we can do.
> 
> Signed-off-by: Volodymyr Babchuk 
> Reviewed-by: Sumit Garg 
Reviewed-by: Caleb Connolly 
> 
> ---
> 
> Changes in v3:
>  - Replaced fdt_valid() with fdt_check_header()
>  - Added Sumit's R-B tag
> 
> Changes in v2:
>  - New patch in v2
> 
>  arch/arm/mach-snapdragon/board.c | 5 -
>  1 file changed, 4 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm/mach-snapdragon/board.c 
> b/arch/arm/mach-snapdragon/board.c
> index f12f5791a1..6f762fc948 100644
> --- a/arch/arm/mach-snapdragon/board.c
> +++ b/arch/arm/mach-snapdragon/board.c
> @@ -24,6 +24,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
>  #include 
>  
> @@ -93,7 +94,9 @@ void *board_fdt_blob_setup(int *err)
>* try and use the FDT built into U-Boot if there is one...
>* This avoids having a hard dependency on the previous stage bootloader
>*/
> - if (IS_ENABLED(CONFIG_OF_SEPARATE) && (!fdt || fdt != ALIGN(fdt, 
> SZ_4K))) {
> +
> + if (IS_ENABLED(CONFIG_OF_SEPARATE) && (!fdt || fdt != ALIGN(fdt, SZ_4K) 
> ||
> +fdt_check_header((void *)fdt))) {
>   debug("%s: Using built in FDT, bootloader gave us %#llx\n", 
> __func__, fdt);
>   return (void *)gd->fdt_blob;
>   }

-- 
// Caleb (they/them)

Re: [PATCH v3 3/4] clk: qcom: add support for power domains uclass

[Caleb Connolly]

On 11/03/2024 21:33, Volodymyr Babchuk wrote:
> Now sub-drivers for particular SoCs can register them as power domain
> drivers. This is needed for upcoming SM8150 support, because it needs
> to power up the Ethernet module.
> 
> Signed-off-by: Volodymyr Babchuk 

Reviewed-by: Caleb Connolly 
> 
> ---
> Caleb suggested to use "imply POWER_DOMAIN", not "depends
> POWER_DOMAIN" in the Kconfig, but this does not work:
> $ make CROSS_COMPILE=aarch64-linux-gnu- ARCH=arm
> scripts/kconfig/conf  --syncconfig Kconfig
> drivers/clk/Kconfig:3:error: recursive dependency detected!
> drivers/clk/Kconfig:3:  symbol CLK is selected by IMX8M_POWER_DOMAIN
> drivers/power/domain/Kconfig:35:symbol IMX8M_POWER_DOMAIN depends on 
> POWER_DOMAIN
> drivers/power/domain/Kconfig:3: symbol POWER_DOMAIN is implied by CLK_QCOM
> drivers/clk/qcom/Kconfig:3: symbol CLK_QCOM depends on CLK
> For a resolution refer to Documentation/kbuild/kconfig-language.txt
> subsection "Kconfig recursive dependency limitations"
> 
> 
> Changes in v3:
>  - Added "depends POWER_DOMAIN" to Kconfig (see note)
>  - Use readl_poll_timeout() instead of open coded wait loop
>  - Print warning if power domain can't be enabled/disabled
> 
> Changes in v2:
>  - Reworked qcom_cc_bind() function
>  - Added timeout to qcom_power_set()
>  - Minor fixes in register names and formatting
> 
>  drivers/clk/qcom/Kconfig  |   2 +-
>  drivers/clk/qcom/clock-qcom.c | 132 ++
>  drivers/clk/qcom/clock-qcom.h |   6 ++
>  3 files changed, 126 insertions(+), 14 deletions(-)
> 
> diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig
> index 0df0d1881a..8dae635ac2 100644
> --- a/drivers/clk/qcom/Kconfig
> +++ b/drivers/clk/qcom/Kconfig
> @@ -2,7 +2,7 @@ if ARCH_SNAPDRAGON || ARCH_IPQ40XX
>  
>  config CLK_QCOM
>   bool
> - depends on CLK && DM_RESET
> + depends on CLK && DM_RESET && POWER_DOMAIN
>   def_bool n
>  
>  menu "Qualcomm clock drivers"
> diff --git a/drivers/clk/qcom/clock-qcom.c b/drivers/clk/qcom/clock-qcom.c
> index 729d190c54..7a5938a06a 100644
> --- a/drivers/clk/qcom/clock-qcom.c
> +++ b/drivers/clk/qcom/clock-qcom.c
> @@ -22,7 +22,9 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
> +#include 
>  
>  #include "clock-qcom.h"
>  
> @@ -30,6 +32,13 @@
>  #define CBCR_BRANCH_ENABLE_BIT  BIT(0)
>  #define CBCR_BRANCH_OFF_BIT BIT(31)
>  
> +#define GDSC_SW_COLLAPSE_MASKBIT(0)
> +#define GDSC_POWER_DOWN_COMPLETE BIT(15)
> +#define GDSC_POWER_UP_COMPLETE   BIT(16)
> +#define GDSC_PWR_ON_MASK BIT(31)
> +#define CFG_GDSCR_OFFSET 0x4
> +#define GDSC_STATUS_POLL_TIMEOUT_US  1500
> +
>  /* Enable clock controlled by CBC soft macro */
>  void clk_enable_cbc(phys_addr_t cbcr)
>  {
> @@ -223,7 +232,7 @@ U_BOOT_DRIVER(qcom_clk) = {
>  int qcom_cc_bind(struct udevice *parent)
>  {
>   struct msm_clk_data *data = (struct msm_clk_data 
> *)dev_get_driver_data(parent);
> - struct udevice *clkdev, *rstdev;
> + struct udevice *clkdev = NULL, *rstdev = NULL, *pwrdev;
>   struct driver *drv;
>   int ret;
>  
> @@ -238,20 +247,41 @@ int qcom_cc_bind(struct udevice *parent)
>   if (ret)
>   return ret;
>  
> - /* Bail out early if resets are not specified for this platform */
> - if (!data->resets)
> - return ret;
> + if (data->resets) {
> + /* Get a handle to the common reset handler */
> + drv = lists_driver_lookup_name("qcom_reset");
> + if (!drv) {
> + ret = -ENOENT;
> + goto unbind_clkdev;
> + }
> +
> + /* Register the reset controller */
> + ret = device_bind_with_driver_data(parent, drv, "qcom_reset", 
> (ulong)data,
> +dev_ofnode(parent), );
> + if (ret)
> + goto unbind_clkdev;
> + }
>  
> - /* Get a handle to the common reset handler */
> - drv = lists_driver_lookup_name("qcom_reset");
> - if (!drv)
> - return -ENOENT;
> + if (data->power_domains) {
> + /* Get a handle to the common power domain handler */
> + drv = lists_driver_lookup_name("qcom_power");
> + if (!drv) {
> + ret = -ENOENT;
> + goto unbind_rstdev;
> + }
> + /* Register the power domain controller */
> + ret = device_bind_with_driver_data(parent, drv, "qcom_power", 
> (ulong)data,
> +dev_ofnode(parent), );
> + if (ret)
> + goto unbind_rstdev;
> + }
>  
> - /* Register the reset controller */
> - ret = device_bind_with_driver_data(parent, drv, "qcom_reset", 
> (ulong)data,
> -dev_ofnode(parent), );
> - if (ret)
> - 

Re: [PATCH 2/7 v2] arm: clean up v7 and v8 linker scripts for bss_start/end

[Ilias Apalodimas]

Hi Richard,

Thanks for taking a look

On Tue, 12 Mar 2024 at 17:51, Richard Henderson
 wrote:
>
> On 3/12/24 04:08, Ilias Apalodimas wrote:
> > - .bss_start (NOLOAD) : {
> > - . = ALIGN(8);
>
> This alignment got lost.
>
> > - KEEP(*(.__bss_start));
> > - } >.sdram
> > -
> > - .bss (NOLOAD) : {
> > + .bss : {
>
> If it is required, the best replacement would be here on the output section 
> definition.

As you mentioned in patch #7 we should preserve some alignments or fix
the underlying assembly. But in any case, I'll preserve the .bss
alignment here since it will be easy to bisect/read the commit logs &
patches in the future

>
> > - . = ALIGN(8);
> > -
> > - .bss_start : {
> > - KEEP(*(.__bss_start));
> > - }
> > -
> > - .bss : {
> > + .bss ALIGN(8): {
>
> Like you did here.

Thanks!
/Ilias
>
>
> r~

Re: [PATCH] arm64: zynqmp: Do not describe u-boot.itb if SPL is disabled

[Michal Simek]

On 3/12/24 07:14, Ilias Apalodimas wrote:

Hi Michal

Apologies for the late reply

On Wed, 6 Mar 2024 at 09:48, Michal Simek  wrote:




On 3/5/24 16:47, Ilias Apalodimas wrote:

On Fri, Feb 23, 2024 at 05:18:42PM +0100, Michal Simek wrote:

There is no reason to describe u-boot.itb on system without SPL. Pretty
much this is cover all systems which are using only boot.bin which contains
all images inside.

Signed-off-by: Michal Simek 
---

   board/xilinx/common/board.c | 2 +-
   1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/board/xilinx/common/board.c b/board/xilinx/common/board.c
index 9641ed307b75..4f38b7d27684 100644
--- a/board/xilinx/common/board.c
+++ b/board/xilinx/common/board.c
@@ -43,7 +43,7 @@ struct efi_fw_image fw_images[] = {
  .image_index = 1,
  },
   #endif
-#if defined(XILINX_UBOOT_IMAGE_GUID)
+#if defined(XILINX_UBOOT_IMAGE_GUID) && 
defined(CONFIG_SPL_FS_LOAD_PAYLOAD_NAME)


What happens if this is defined with CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="" ?


Your comment is valid but I am not aware about any CONFIG_IS, etc which checks
that string is not empty. If name is "" it will return yes and second image is
doing to be defined.

But I found handling in the code like this.

   36 #ifdef CONFIG_DEFAULT_FDT_FILE
   37 if (strlen(CONFIG_DEFAULT_FDT_FILE)) {

which can be used in my second patch not to describe second image in
set_dfu_alt_info() if string is empty.


Yes, I think that's ok. The problem is that if we merge this as-is, we
would have to disable CONFIG_SPL_FS_FAT to make this work, which is a
bit misleading


As Heinrich said not just this if you want to do it like this.
I think you will simply disable the whole SPL which will disable this symbol 
too.
But from my perspective SPL payload name is driving this option. Data can end up 
on partition or in raw mode but for dfu you need to use the name.


Thanks,
Michal

[PATCH] arm64: zynqmp: Do not setup default SPL options without SPL

[Michal Simek]

mach Kconfig file select some options independently of if SPL is actually
enabled. It ends up in situation that SPL is disabled but symbols are still
present in .config. That's why add SPL dependency for them but also group
them with other SPL options in ARCH_ZYNQMP fragment with using imply
option. This should ensure the same behavior as default y.

Also fixed SPL_ZYNQMP_PSU_INIT_ENABLED for the same.

Signed-off-by: Michal Simek 
---

 arch/arm/Kconfig |  8 
 arch/arm/mach-zynqmp/Kconfig | 27 ++-
 2 files changed, 10 insertions(+), 25 deletions(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index fde85dc0d537..0cf85edcb45d 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1325,6 +1325,14 @@ config ARCH_ZYNQMP
select SPL_DM_SPI_FLASH if SPL_DM_SPI
select SPL_DM_MAILBOX if SPL
imply SPL_FIRMWARE if SPL
+   imply SPL_FS_FAT if SPL
+   imply SPL_LIBCOMMON_SUPPORT if SPL
+   imply SPL_LIBDISK_SUPPORT if SPL
+   imply SPL_LIBGENERIC_SUPPORT if SPL
+   imply SPL_MMC if SPL && MMC_SDHCI_ZYNQ
+   imply SPL_SERIAL if SPL
+   imply SPL_SPI if SPL && ZYNQ_QSPI
+   imply SPL_SPI_FLASH_SUPPORT if SPL && ZYNQ_QSPI
select SPL_SEPARATE_BSS if SPL
select SUPPORT_SPL
imply ZYNQMP_IPI if DM_MAILBOX
diff --git a/arch/arm/mach-zynqmp/Kconfig b/arch/arm/mach-zynqmp/Kconfig
index 7e7c87d16fa9..eee34380f0a0 100644
--- a/arch/arm/mach-zynqmp/Kconfig
+++ b/arch/arm/mach-zynqmp/Kconfig
@@ -1,29 +1,5 @@
 if ARCH_ZYNQMP
 
-config SPL_FS_FAT
-   default y
-
-config SPL_LIBCOMMON_SUPPORT
-   default y
-
-config SPL_LIBDISK_SUPPORT
-   default y
-
-config SPL_LIBGENERIC_SUPPORT
-   default y
-
-config SPL_MMC
-   default y if MMC_SDHCI_ZYNQ
-
-config SPL_SERIAL
-   default y
-
-config SPL_SPI_FLASH_SUPPORT
-   default y if ZYNQ_QSPI
-
-config SPL_SPI
-   default y if ZYNQ_QSPI
-
 config SYS_BOARD
string "Board name"
default "zynqmp"
@@ -143,7 +119,8 @@ config ZYNQMP_PSU_INIT_ENABLED
 
 config SPL_ZYNQMP_PSU_INIT_ENABLED
bool "Include psu_init in SPL"
-   default y if SPL
+   depends on SPL
+   default y
select BOARD_EARLY_INIT_F
help
  Include psu_init by default in SPL.
-- 
2.36.1

Re: [PATCH] arm64: zynqmp: Do not describe u-boot.itb if SPL is disabled

[Michal Simek]

On 3/12/24 13:29, Heinrich Schuchardt wrote:

On 05.03.24 16:47, Ilias Apalodimas wrote:

On Fri, Feb 23, 2024 at 05:18:42PM +0100, Michal Simek wrote:

There is no reason to describe u-boot.itb on system without SPL. Pretty
much this is cover all systems which are using only boot.bin which contains
all images inside.

Signed-off-by: Michal Simek 
---

  board/xilinx/common/board.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/board/xilinx/common/board.c b/board/xilinx/common/board.c
index 9641ed307b75..4f38b7d27684 100644
--- a/board/xilinx/common/board.c
+++ b/board/xilinx/common/board.c
@@ -43,7 +43,7 @@ struct efi_fw_image fw_images[] = {
  .image_index = 1,
  },
  #endif
-#if defined(XILINX_UBOOT_IMAGE_GUID)
+#if defined(XILINX_UBOOT_IMAGE_GUID) && 
defined(CONFIG_SPL_FS_LOAD_PAYLOAD_NAME)


What happens if this is defined with CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="" ?


CONFIG_SPL_FS_LOAD_PAYLOAD_NAME depends on SPL_FS_EXT4 || SPL_FS_FAT ||
SPL_FS_SQUASHFS || SPL_SEMIHOSTING. So it is only defined if SPL could
load a file.

CONFIG_SPL_FS_LOAD_PAYLOAD_NAME defaults to a non-blank name. If a user
provides an invalid name, SPL will not be able to load the file.

What is wrong here is to assume that *.itb has to be load as a file. We
can configure U-Boot SPL to load the itb from a raw partition.

The check might be too restrictive.


I am not sure I fully follow what you are saying here.
All current dfu rules via set_dfu_alt_info() (board/xilinx/zynqmp/zynqmp.c) are 
using CONFIG_SPL_FS_LOAD_PAYLOAD_NAME for second location description.
Obviously in qspi boot mode it is description for RAW. In sd one it is 
description with using fat.
Description for two guids make only sense in connection to using U-Boot SPL 
only. Because if SPL is not used likely you are going to use standard Xilinx 
solution which is pretty much all in one inside boot.bin which is described 
already.
This patch is just trying to get rid of description for second firmware if non 
SPL bootflow is used because pointer is likely not correct.


Thanks,
Michal

Re: [PATCH v4 2/2] android_ab: Fix ANDROID_AB_BACKUP_OFFSET

[Mattijs Korpershoek]

Hi Colin,

Thank you for the patch.

On mar., mars 12, 2024 at 07:57, Colin McAllister  wrote:

Sam also gave his review here:
https://lore.kernel.org/all/CAPLW+4kHmPtfACyND4Vc2p0ZrsyGY=+bRU=fdub4k1ux5p3...@mail.gmail.com/

Please include his review tag in the next submission.

I will add it at the appropriate place below:


> From: Colin McAllister 
>
> Currently, setting CONFIG_AB_BACKUP_OFFSET in a target's defconfig will
> not actually enable the #if protected code in android_ab.c. This is
> because "CONFIG_" should have been prepended to the config macro, or the
> macros defined in kconfig.h could have been used.
>
> The code included by ANDROID_AB_BACKUP_OFFSET has been refactored to no
> longer be conditionally compiled by preprocessor conditionals and
> instead use C conditionals. This better aligns with the Linux kernel
> style guide.
>
> Fixes: 3430f24bc6 ("android_ab: Try backup booloader_message")
> Signed-off-by: Colin McAllister 
> Cc: Joshua Watt 
> Cc: Simon Glass 
> Signed-off-by: Colin McAllister 
Reviewed-by: Sam Protsenko 

> ---
> v2:
>   - Replaced #if conditionals with C if conditionals
>   - Opted to use CONFIG_ANDROID_AB_BACKUP_OFFSET directly instead of
> macros in kconfig.h as CONFIG_ANDROID_AB_BACKUP_OFFSET is not a
>   boolean or tristate value and doesn't have different values when
>   building SPL or TPL.
> v3:
>   - Added "Fixes:" tag
> v4:
>   - No changes
>
>  boot/android_ab.c | 97 ++-
>  1 file changed, 45 insertions(+), 52 deletions(-)
>
> diff --git a/boot/android_ab.c b/boot/android_ab.c
> index 9a3d15ec60..f547aa64e4 100644
> --- a/boot/android_ab.c
> +++ b/boot/android_ab.c
> @@ -187,13 +187,12 @@ int ab_select_slot(struct blk_desc *dev_desc, struct 
> disk_partition *part_info,
>  bool dec_tries)
>  {
>   struct bootloader_control *abc = NULL;
> + struct bootloader_control *backup_abc = NULL;
>   u32 crc32_le;
>   int slot, i, ret;
>   bool store_needed = false;
> + bool valid_backup = false;
>   char slot_suffix[4];
> -#if ANDROID_AB_BACKUP_OFFSET
> - struct bootloader_control *backup_abc = NULL;
> -#endif
>  
>   ret = ab_control_create_from_disk(dev_desc, part_info, , 0);
>   if (ret < 0) {
> @@ -205,53 +204,49 @@ int ab_select_slot(struct blk_desc *dev_desc, struct 
> disk_partition *part_info,
>   return ret;
>   }
>  
> -#if ANDROID_AB_BACKUP_OFFSET
> - ret = ab_control_create_from_disk(dev_desc, part_info, _abc,
> -   ANDROID_AB_BACKUP_OFFSET);
> - if (ret < 0) {
> - free(abc);
> - return ret;
> + if (CONFIG_ANDROID_AB_BACKUP_OFFSET) {
> + ret = ab_control_create_from_disk(dev_desc, part_info, 
> _abc,
> +   
> CONFIG_ANDROID_AB_BACKUP_OFFSET);
> + if (ret < 0) {
> + free(abc);
> + return ret;
> + }
>   }
> -#endif
>  
>   crc32_le = ab_control_compute_crc(abc);
>   if (abc->crc32_le != crc32_le) {
>   log_err("ANDROID: Invalid CRC-32 (expected %.8x, found %.8x),",
>   crc32_le, abc->crc32_le);
> -#if ANDROID_AB_BACKUP_OFFSET
> - crc32_le = ab_control_compute_crc(backup_abc);
> - if (backup_abc->crc32_le != crc32_le) {
> - log_err("ANDROID: Invalid backup CRC-32 ");
> - log_err("expected %.8x, found %.8x),",
> - crc32_le, backup_abc->crc32_le);
> -#endif
> -
> - log_err("re-initializing A/B metadata.\n");
> + if (CONFIG_ANDROID_AB_BACKUP_OFFSET) {
> + crc32_le = ab_control_compute_crc(backup_abc);
> + if (backup_abc->crc32_le != crc32_le) {
> + log_err(" ANDROID: Invalid backup CRC-32 ");
> + log_err("(expected %.8x, found %.8x),",
> + crc32_le, backup_abc->crc32_le);
> + } else {
> + valid_backup = true;
> + log_info(" copying A/B metadata from 
> backup.\n");
> + memcpy(abc, backup_abc, sizeof(*abc));
> + }
> + }
>  
> + if (!valid_backup) {
> + log_err(" re-initializing A/B metadata.\n");
>   ret = ab_control_default(abc);
>   if (ret < 0) {
> -#if ANDROID_AB_BACKUP_OFFSET
> - free(backup_abc);
> -#endif
> + if (CONFIG_ANDROID_AB_BACKUP_OFFSET)
> + free(backup_abc);
>   free(abc);
>   return -ENODATA;
>   }
> -#if ANDROID_AB_BACKUP_OFFSET
> - } else {
> -

Re: [PATCH] arm64: zynqmp: Describe USB wakeup interrupt

[Michal Simek]

On 3/8/24 09:41, Michal Simek wrote:

Describe usb wakeup interrupt.

Signed-off-by: Michal Simek 
---

  arch/arm/dts/zynqmp.dtsi | 10 ++
  1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
index daae23c12b79..c19d86e5a0c4 100644
--- a/arch/arm/dts/zynqmp.dtsi
+++ b/arch/arm/dts/zynqmp.dtsi
@@ -1001,10 +1001,11 @@
status = "disabled";
reg = <0x0 0xfe20 0x0 0x4>;
interrupt-parent = <>;
-   interrupt-names = "host", "peripheral", "otg";
+   interrupt-names = "host", "peripheral", "otg", 
"wakeup";
interrupts = ,
 ,
-;
+,
+;
/* iommus = < 0x860>; */
snps,quirk-frame-length-adjustment = <0x20>;
clock-names = "ref";
@@ -1032,10 +1033,11 @@
status = "disabled";
reg = <0x0 0xfe30 0x0 0x4>;
interrupt-parent = <>;
-   interrupt-names = "host", "peripheral", "otg";
+   interrupt-names = "host", "peripheral", "otg", 
"wakeup";
interrupts = ,
 ,
-;
+,
+;
/* iommus = < 0x861>; */
snps,quirk-frame-length-adjustment = <0x20>;
clock-names = "ref";


Applied.
M

Re: [PATCH] arm64: zynqmp: Remove additional compatible string for sc-revB

[Michal Simek]

On 3/8/24 09:41, Michal Simek wrote:

Based on dt schema there is no need to specify flash via additional
compatible string and generic are enough.

Signed-off-by: Michal Simek 
---

  arch/arm/dts/zynqmp-sc-revB.dts | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/dts/zynqmp-sc-revB.dts b/arch/arm/dts/zynqmp-sc-revB.dts
index de2d7842ae28..c1d713b5d890 100644
--- a/arch/arm/dts/zynqmp-sc-revB.dts
+++ b/arch/arm/dts/zynqmp-sc-revB.dts
@@ -192,7 +192,7 @@
status = "okay";
/* QSPI should also have PINCTRL setup */
flash@0 {
-   compatible = "mt25qu512a", "m25p80", "jedec,spi-nor"; /* 
mt25qu512abb8e12 512Mib */
+   compatible = "m25p80", "jedec,spi-nor"; /* mt25qu512abb8e12 
512Mib */
#address-cells = <1>;
#size-cells = <1>;
reg = <0>;


Applied.
M

Re: [PATCH v4 1/2] android_ab: Add missing semicolon

[Mattijs Korpershoek]

Hi Colin,

Thank you for the patch.

On mar., mars 12, 2024 at 07:57, Colin McAllister  wrote:

> From: Colin McAllister 
>
> Found a missing semicolon in code protected by a #if that will never
> evaluate to true due to a separate issue. Fixing this issue before
> addressing the #if.
>
> Fixes: 3430f24bc6 ("android_ab: Try backup booloader_message")
> Signed-off-by: Colin McAllister 
> Cc: Joshua Watt 
> Cc: Simon Glass 
> Signed-off-by: Colin McAllister 

Reviewed-by: Mattijs Korpershoek 

Since Sam gave his review in [1]:
https://lore.kernel.org/all/CAPLW+4kHmPtfACyND4Vc2p0ZrsyGY=+bRU=fdub4k1ux5p3...@mail.gmail.com/

I will also add:

Reviewed-by: Sam Protsenko 

When applying.

> ---
> v2: No changes
> v3: Added "Fixes:" tag
> v4: No changes
>
>  boot/android_ab.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/boot/android_ab.c b/boot/android_ab.c
> index c9df6d2b4b..9a3d15ec60 100644
> --- a/boot/android_ab.c
> +++ b/boot/android_ab.c
> @@ -221,7 +221,7 @@ int ab_select_slot(struct blk_desc *dev_desc, struct 
> disk_partition *part_info,
>  #if ANDROID_AB_BACKUP_OFFSET
>   crc32_le = ab_control_compute_crc(backup_abc);
>   if (backup_abc->crc32_le != crc32_le) {
> - log_err("ANDROID: Invalid backup CRC-32 ")
> + log_err("ANDROID: Invalid backup CRC-32 ");
>   log_err("expected %.8x, found %.8x),",
>   crc32_le, backup_abc->crc32_le);
>  #endif
> -- 
> 2.34.1

Re: [PATCH] arm64: zynqmp: Fix gpio-key DT description

[Michal Simek]

On 3/8/24 09:40, Michal Simek wrote:

All gpio-key descriptionos with dt-schema.

Signed-off-by: Michal Simek 
---

  arch/arm/dts/zynqmp-sc-revB.dts| 2 +-
  arch/arm/dts/zynqmp-vp-x-a2785-00-revA.dts | 2 +-
  arch/arm/dts/zynqmp-vpk120-revA.dts| 2 +-
  arch/arm/dts/zynqmp-zcu208-revA.dts| 2 +-
  arch/arm/dts/zynqmp-zcu216-revA.dts| 2 +-
  arch/arm/dts/zynqmp-zcu670-revA.dts| 2 +-
  arch/arm/dts/zynqmp-zcu670-revB.dts| 2 +-
  7 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/arch/arm/dts/zynqmp-sc-revB.dts b/arch/arm/dts/zynqmp-sc-revB.dts
index 8517bdad6f47..de2d7842ae28 100644
--- a/arch/arm/dts/zynqmp-sc-revB.dts
+++ b/arch/arm/dts/zynqmp-sc-revB.dts
@@ -49,7 +49,7 @@
gpio-keys {
compatible = "gpio-keys";
autorepeat;
-   fwuen {
+   key-fwuen {
label = "sw16";
gpios = < 12 GPIO_ACTIVE_LOW>;
linux,code = ;
diff --git a/arch/arm/dts/zynqmp-vp-x-a2785-00-revA.dts 
b/arch/arm/dts/zynqmp-vp-x-a2785-00-revA.dts
index 2a3bbe170472..b626d1aacf58 100644
--- a/arch/arm/dts/zynqmp-vp-x-a2785-00-revA.dts
+++ b/arch/arm/dts/zynqmp-vp-x-a2785-00-revA.dts
@@ -47,7 +47,7 @@
gpio-keys {
compatible = "gpio-keys";
autorepeat;
-   j383 {
+   key-j383 {
label = "j383";
gpios = < 10 GPIO_ACTIVE_HIGH>;
linux,code = ;
diff --git a/arch/arm/dts/zynqmp-vpk120-revA.dts 
b/arch/arm/dts/zynqmp-vpk120-revA.dts
index e0e4f1b13ada..e0632883e4ec 100644
--- a/arch/arm/dts/zynqmp-vpk120-revA.dts
+++ b/arch/arm/dts/zynqmp-vpk120-revA.dts
@@ -47,7 +47,7 @@
gpio-keys {
compatible = "gpio-keys";
autorepeat;
-   sw16 {
+   button-16 {
label = "sw16";
gpios = < 10 GPIO_ACTIVE_HIGH>;
linux,code = ;
diff --git a/arch/arm/dts/zynqmp-zcu208-revA.dts 
b/arch/arm/dts/zynqmp-zcu208-revA.dts
index b4e24745a9a6..a113e475082f 100644
--- a/arch/arm/dts/zynqmp-zcu208-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu208-revA.dts
@@ -46,7 +46,7 @@
gpio-keys {
compatible = "gpio-keys";
autorepeat;
-   sw19 {
+   switch-19 {
label = "sw19";
gpios = < 22 GPIO_ACTIVE_HIGH>;
linux,code = ;
diff --git a/arch/arm/dts/zynqmp-zcu216-revA.dts 
b/arch/arm/dts/zynqmp-zcu216-revA.dts
index 6f593e80841f..4d7d5d2e5eff 100644
--- a/arch/arm/dts/zynqmp-zcu216-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu216-revA.dts
@@ -46,7 +46,7 @@
gpio-keys {
compatible = "gpio-keys";
autorepeat;
-   sw19 {
+   switch-19 {
label = "sw19";
gpios = < 22 GPIO_ACTIVE_HIGH>;
linux,code = ;
diff --git a/arch/arm/dts/zynqmp-zcu670-revA.dts 
b/arch/arm/dts/zynqmp-zcu670-revA.dts
index 7f70904f44e7..def3b53cef7f 100644
--- a/arch/arm/dts/zynqmp-zcu670-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu670-revA.dts
@@ -49,7 +49,7 @@
gpio-keys {
compatible = "gpio-keys";
autorepeat;
-   sw1 {
+   switch-1 {
label = "sw1";
gpios = < 22 GPIO_ACTIVE_HIGH>;
linux,code = ;
diff --git a/arch/arm/dts/zynqmp-zcu670-revB.dts 
b/arch/arm/dts/zynqmp-zcu670-revB.dts
index 0adb2062aef1..41f9a23d06ad 100644
--- a/arch/arm/dts/zynqmp-zcu670-revB.dts
+++ b/arch/arm/dts/zynqmp-zcu670-revB.dts
@@ -49,7 +49,7 @@
gpio-keys {
compatible = "gpio-keys";
autorepeat;
-   sw1 {
+   switch-1 {
label = "sw1";
gpios = < 22 GPIO_ACTIVE_HIGH>;
linux,code = ;


Applied.
M

Re: [PATCH v2] arm64: zynqmp: Add label to pmu fwnode

[Michal Simek]

On 3/7/24 16:29, lukas.funke-...@weidmueller.com wrote:

From: Lukas Funke 

ZynqMP CG series devices only have two cpus. In this
case the interrupt-affinity property has to adapted, because
cpu3 and cpu4 are missing. By adding a label to the pmu fwnode the
interrupt-affinity can be adapted in a device specific DT.

Signed-off-by: Lukas Funke 
---
  arch/arm/dts/zynqmp.dtsi | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
index b50b83b772..457f8e394f 100644
--- a/arch/arm/dts/zynqmp.dtsi
+++ b/arch/arm/dts/zynqmp.dtsi
@@ -168,7 +168,7 @@
bootph-all;
};
  
-	pmu {

+   pmu: pmu {
compatible = "arm,armv8-pmuv3";
interrupt-parent = <>;
interrupts = ,


Applied.
M

Re: [PATCH v2] mtd: nand: arasan: Fix the crash caused by use after free

[Michal Simek]

On 3/6/24 04:34, Venkatesh Yadav Abbarapu wrote:

The below exception observed on QEMU, as it doesn't support
NAND controller.

"Synchronous Abort" handler, esr 0x9605, far 0x17acfc878
elr: 0803ad40 lr : 0805f438 (reloc)
elr: 7fcb4d40 lr : 7fcd9438
x0 : 7bbfc880 x1 : ff10
x2 : 7fcf059c x3 : 7bbfc870
x4 : 7fd9a388 x5 : 00017acfc870
x6 :  x7 : 7bbfd0e0
x8 : 3dd4 x9 : 7bbeec0c
x10: 0001 x11: 3f8c
x12: 7bbeecfc x13: 7bbeeeb0
x14: 7bbeeeb0 x15: 7bbee474
x16: 7fcef18c x17: 
x18: 7bbf9d70 x19: 7bbfc888
x20: 7bbfc870 x21: 7fd68ddb
x22: ffed x23: 7bbfc878
x24:  x25: 
x26:  x27: 
x28:  x29: 7bbeed10

Code: 927ff8c1 924000c6 8b010065 f9400887 (f94004a2)
Resetting CPU ...

The crash is caused by the use after free.
Updating the correct return codes rather than hardcoding.
Fixes: 3dd0f8cccd6d ("mtd: nand: Remove hardcoded base address of nand")

Signed-off-by: Venkatesh Yadav Abbarapu 
---
Changes in v2:
- Updated the commit description.
---
  drivers/mtd/nand/raw/arasan_nfc.c | 27 ++-
  1 file changed, 14 insertions(+), 13 deletions(-)

diff --git a/drivers/mtd/nand/raw/arasan_nfc.c 
b/drivers/mtd/nand/raw/arasan_nfc.c
index 0b1b91f771..ffcd963b3d 100644
--- a/drivers/mtd/nand/raw/arasan_nfc.c
+++ b/drivers/mtd/nand/raw/arasan_nfc.c
@@ -1232,7 +1232,7 @@ static int arasan_probe(struct udevice *dev)
struct nand_config *nand = >config;
struct mtd_info *mtd;
ofnode child;
-   int err = -1;
+   int ret;
const char *str;
  
  	info->reg = dev_read_addr_ptr(dev);

@@ -1259,9 +1259,10 @@ static int arasan_probe(struct udevice *dev)
writel(0x0, >reg->pgm_reg);
  
  	/* first scan to find the device and get the page size */

-   if (nand_scan_ident(mtd, CONFIG_SYS_NAND_MAX_CHIPS, NULL)) {
+   ret = nand_scan_ident(mtd, CONFIG_SYS_NAND_MAX_CHIPS, NULL);
+   if (ret) {
printf("%s: nand_scan_ident failed\n", __func__);
-   goto fail;
+   return ret;
}
  
  	str = ofnode_read_string(nand_chip->flash_node, "nand-ecc-mode");

@@ -1289,26 +1290,26 @@ static int arasan_probe(struct udevice *dev)
nand_chip->ecc.bytes = 0;
nand_chip->ecc.layout = _nand_oob_64;
} else {
-   if (arasan_nand_ecc_init(mtd)) {
+   ret = arasan_nand_ecc_init(mtd);
+   if (ret) {
printf("%s: nand_ecc_init failed\n", __func__);
-   goto fail;
+   return ret;
}
}
  
-	if (nand_scan_tail(mtd)) {

+   ret = nand_scan_tail(mtd);
+   if (ret) {
printf("%s: nand_scan_tail failed\n", __func__);
-   goto fail;
+   return ret;
}
  
-	if (nand_register(0, mtd)) {

+   ret = nand_register(0, mtd);
+   if (ret) {
printf("Nand Register Fail\n");
-   goto fail;
+   return ret;
}
  
-	return 0;

-fail:
-   free(nand);
-   return err;
+   return ret;
  }
  
  static const struct udevice_id arasan_nand_dt_ids[] = {


Applied.
M

Re: [PATCH v4] mtd: nand: arasan: Print warning for unsupported ecc modes

[Michal Simek]

On 3/6/24 04:27, Venkatesh Yadav Abbarapu wrote:

Currently only hw ecc is supported in U-Boot. If any other ecc mode is
given in DT, it simply through an error. So better print
what is being done.

Revert this patch once soft ecc support is fixed in future.

Signed-off-by: Ashok Reddy Soma 
Signed-off-by: Venkatesh Yadav Abbarapu 
---
Changes in v2:
- Added the ecc mode check in the arasan driver itself.
Changes in v3:
- Skip the driver probe when sw-ecc mode is present in the device tree.
Changes in v4:
- Updated the commit description to through an error if other
than hw ecc mentioned in the DT.
- Added the NULL check.
---
  drivers/mtd/nand/raw/arasan_nfc.c | 7 +++
  1 file changed, 7 insertions(+)

diff --git a/drivers/mtd/nand/raw/arasan_nfc.c 
b/drivers/mtd/nand/raw/arasan_nfc.c
index 14766401bf..0b1b91f771 100644
--- a/drivers/mtd/nand/raw/arasan_nfc.c
+++ b/drivers/mtd/nand/raw/arasan_nfc.c
@@ -1233,6 +1233,7 @@ static int arasan_probe(struct udevice *dev)
struct mtd_info *mtd;
ofnode child;
int err = -1;
+   const char *str;
  
  	info->reg = dev_read_addr_ptr(dev);

mtd = nand_to_mtd(nand_chip);
@@ -1263,6 +1264,12 @@ static int arasan_probe(struct udevice *dev)
goto fail;
}
  
+	str = ofnode_read_string(nand_chip->flash_node, "nand-ecc-mode");

+   if (!str || strcmp(str, "hw") != 0) {
+   printf("%s ecc mode is not supported\n", str);
+   return -EINVAL;
+   }
+
nand_chip->ecc.mode = NAND_ECC_HW;
nand_chip->ecc.hwctl = NULL;
nand_chip->ecc.read_page = arasan_nand_read_page_hwecc;


Applied.
M

RE: [PATCH v3 0/2] Fix Android A/B backup

[Mattijs Korpershoek]

Hi Colin,

On mar., mars 12, 2024 at 14:04, "McAllister, Colin" 
 wrote:

> Hi Mattijs,
>
> I’ve been using git send-email, but there might be issues with what the 
> Garmin smtp server is doing to the email, like adding the footer. I sent a v4 
> PS in a new thread using my personal email, but that email isn’t subscribed 
> to this ML so I think the patches are pending approval to be added to the ML.

Yep, seems they got approved. I will follow-up on the v4 series.

>
> Best,
> Colin
>
> From: Mattijs Korpershoek 
> Sent: Tuesday, March 12, 2024 4:47 AM
> To: Sam Protsenko ; McAllister, Colin 
> 
> Cc: u-boot@lists.denx.de; jpewhac...@gmail.com; s...@chromium.org; Igor 
> Opaniuk 
> Subject: Re: [PATCH v3 0/2] Fix Android A/B backup
>
> Hi Colin, On ven. , mars 08, 2024 at 15: 59, Sam Protsenko  linaro. org> wrote: > On Fri, Mar 8, 2024 at 1: 24 PM McAllister, Colin > 
>  wrote: >> >> > Ah, ok, I see you
>
>
> Hi Colin,
>
>
>
> On ven., mars 08, 2024 at 15:59, Sam Protsenko 
> mailto:semen.protse...@linaro.org>> wrote:
>
>
>
>> On Fri, Mar 8, 2024 at 1:24 PM McAllister, Colin
>
>> mailto:colin.mcallis...@garmin.com>> wrote:
>
>>>
>
>>> > Ah, ok, I see you replied to my comment here.
>
>>>
>
>>> Yes, sorry. Outlook is terrible to send inline responses too. I figured
>
>>> just adding responses in the patch contents would be better. Next time I'll 
>>> submit
>
>>> my patch with a different email :)
>
>>>
>
>>> > So when that config option is not defined at all, the build still
>
>>> > works, right?
>
>>>
>
>>> Yes, the default value for CONFIG_ANDROID_AB_BACKUP_OFFSET is 0x0, which
>
>>> would evaluate to a false bool value in the if conditions. I did do some
>
>>> testing with the config value not defined for my board and confirmed
>
>>> back-up data is not used.
>
>>>
>
>>
>
>> Looks good to me, thanks.
>
>>
>
>>> In your other emails you include your reviewed-by tag. For clarity, Am I
>
>>> supposed to append my patches and upload a new version? This is my
>
>>> first time contributing to u-boot, so I'm still learning the workflow. I
>
>>> didn't see anything glancing through the "Sending patches" page in the
>
>>> U-Boot documentation.
>
>>>
>
>>
>
>> Welcome to the community! And thanks for your patches :) U-Boot
>
>> workflow is quite similar to Linux kernel one. It's useful to collect
>
>> all tags when sending out your next version. When the maintainer takes
>
>> your patch, they usually also apply all R-b tags for the final patch
>
>> version, so you only have to worry about that when sending out a new
>
>> version. I know that U-Boot contributors are often using `patman' tool
>
>> [1] for submitting patches (and corresponding updated versions), and
>
>> I'm pretty sure it collects all pending tags automatically for you.
>
>> FWIW, I'm not experienced with `patman', as I'm trying to use somehow
>
>> unified submitting process for both U-Boot and Linux kernel, and I
>
>> know that using `patman' is sometimes discouraged in Linux kernel
>
>> community.
>
>
>
> Welcome to the U-Boot community! It takes quite some time to start
>
> contributing so thank you for the patches.
>
>
>
> The changes look fine and the detailed approach on how you tested is
>
> very much appreciated.
>
>
>
> I have a couple of suggestions on the whole series.
>
>
>
> 1. The patches don't apply:
>
>
>
> $ b4 shazam -s -l 
> 20240308165937.270499-1-colin.mcallis...@garmin.com
>
>
>
> error: patch failed: boot/android_ab.c:187
>
> error: boot/android_ab.c: patch does not apply
>
> error: Did you hand edit your patch?
>
> It does not apply to blobs recorded in its index.
>
> Patch failed at 0002 android_ab: Fix ANDROID_AB_BACKUP_OFFSET
>
> hint: Use 'git am --show-current-patch=diff' to see the failed patch
>
> When you have resolved this problem, run "git am --continue".
>
> If you prefer to skip this patch, run "git am --skip" instead.
>
> To restore the original branch and stop patching, run "git am --abort".
>
>
>
> I suspect your email provider swapped tabs to spaces. It's also possible
>
> that the Garmin confidentiality footer caused this.
>
>
>
> 2. Using the khadas-vim3_android_ab_defconfig, this does not build:
>
>
>
> boot/android_ab.c: In function 'ab_select_slot':
>
> boot/android_ab.c:350:48: error: 'ANDROID_AB_BACKUP_OFFSET' undeclared (first 
> use in this function); did you mean 'CONFIG_ANDROID_AB_BACKUP_OFFSET'?
>
>   350 |
> ANDROID_AB_BACKUP_OFFSET);
>
>   |
> ^~~~
>
>   |
> CONFIG_ANDROID_AB_BACKUP_OFFSET
>
>
>
> Both are minor problems.
>
> I re-applied the diffs manually to be able to build/boot test this.
>
>
>
> Since this is your first contribution, I can either:
>
> - fix both myself and merge this.
>
> - let you spin a v4 to fix the above.
>
>
>
> Please let me know what 

Re: [PATCH] arm64: zynqmp: Add usb4 to the boot targets

[Michal Simek]

On 3/5/24 12:02, Venkatesh Yadav Abbarapu wrote:

USB4 has been added to the boot targets and
also add support to enable JTAG.

Signed-off-by: Shubhangi Shrikrushna Mahalle 

Signed-off-by: Venkatesh Yadav Abbarapu 
---
  board/xilinx/zynqmp/zynqmp_kria.env | 3 ++-
  1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/board/xilinx/zynqmp/zynqmp_kria.env 
b/board/xilinx/zynqmp/zynqmp_kria.env
index 0f940bd68f..7d3ad31226 100644
--- a/board/xilinx/zynqmp/zynqmp_kria.env
+++ b/board/xilinx/zynqmp/zynqmp_kria.env
@@ -44,7 +44,8 @@ usb_boot=usb start; if usb dev ${devnum}; then devtype=usb; 
run scan_dev_for_boo
  preboot=setenv boot_targets; setenv modeboot; run board_setup
  
  # SOM specific boot methods

-som_cc_boot=if test ${card1_name} = SCK-KV-G; then setenv boot_targets mmc1 usb0 usb1 usb2 usb3 pxe dhcp 
&& run distro_bootcmd; elif test ${card1_name} = SCK-KR-G; then setenv boot_targets usb0 usb1 usb2 
usb3 pxe dhcp && run distro_bootcmd; else test ${card1_name} = SCK-KD-G; setenv boot_targets usb0 
usb1 usb2 usb3 pxe dhcp && run distro_bootcmd; fi;"
+usb_boot_devices='usb0 usb1 usb2 usb3 usb4'
+som_cc_boot=if test ${card1_name} = SCK-KV-G; then setenv boot_targets mmc1 ${usb_boot_devices} pxe dhcp 
jtag && run distro_bootcmd; elif test ${card1_name} = SCK-KR-G; then setenv boot_targets 
${usb_boot_devices} pxe dhcp jtag && run distro_bootcmd; else test ${card1_name} = SCK-KD-G; setenv 
boot_targets ${usb_boot_devices} pxe dhcp jtag && run distro_bootcmd; fi;"
  som_mmc_boot=setenv boot_targets mmc0 && run distro_bootcmd
  
  k26_starter=SMK-K26-XCL2G


Applied.
M

Re: [PATCH 0/4] Generate capsules from config files

[Bence Balogh]

Hello Sughosh,

We are planning to use these changes in the Corstone-1000 platform.
Do you have a timeline when these are going to get merged?

Thanks,
Bence

On Tue, Nov 21, 2023 at 12:30:24PM +0530, Sughosh Ganu wrote:
> 
> Add support for generating capsules through a config file. Multiple
> capsules can be generated through a single invocation of the
> mkeficapsule tool, where the capsule parameters are fetched from the
> config file.
> 
> The format of the config file pretty similar to the one used by the
> capsule generation tool in EDKII.
> 
> The functionality is enabled on the sandbox variant and the EFI
> capsule update test is now configured to generate the capsules through
> a config file. The sandbox_flattree variant generates capsules through
> binman, thus covering both the paths.
> 
> Sughosh Ganu (4):
>   tools: mkeficapsule: Add support for parsing capsule params from
> config file
>   doc: Document capsule generation through a config file
>   sandbox: capsule: Add a config file for generating capsules
>   test: capsule: Generate capsules through config file
> 
>  configs/sandbox_defconfig |   2 +
>  doc/develop/uefi/uefi.rst |  70 
>  .../test_efi_capsule/capsule_gen_binman.dts   |   2 +
>  test/py/tests/test_efi_capsule/conftest.py|   7 +
>  .../test_efi_capsule/sandbox_capsule_cfg.txt  | 162 
>  tools/Kconfig |  15 +
>  tools/Makefile|   1 +
>  tools/eficapsule.h| 114 ++
>  tools/mkeficapsule.c  |  87 +++--
>  tools/mkeficapsule_parse.c| 352 ++
>  10 files changed, 781 insertions(+), 31 deletions(-)
>  create mode 100644 test/py/tests/test_efi_capsule/sandbox_capsule_cfg.txt
>  create mode 100644 tools/mkeficapsule_parse.c
> 
> -- 
> 2.34.1
> 
> 

[PATCH v4 2/2] android_ab: Fix ANDROID_AB_BACKUP_OFFSET

[Colin McAllister]

From: Colin McAllister 

Currently, setting CONFIG_AB_BACKUP_OFFSET in a target's defconfig will
not actually enable the #if protected code in android_ab.c. This is
because "CONFIG_" should have been prepended to the config macro, or the
macros defined in kconfig.h could have been used.

The code included by ANDROID_AB_BACKUP_OFFSET has been refactored to no
longer be conditionally compiled by preprocessor conditionals and
instead use C conditionals. This better aligns with the Linux kernel
style guide.

Fixes: 3430f24bc6 ("android_ab: Try backup booloader_message")
Signed-off-by: Colin McAllister 
Cc: Joshua Watt 
Cc: Simon Glass 
Signed-off-by: Colin McAllister 
---
v2:
  - Replaced #if conditionals with C if conditionals
  - Opted to use CONFIG_ANDROID_AB_BACKUP_OFFSET directly instead of
macros in kconfig.h as CONFIG_ANDROID_AB_BACKUP_OFFSET is not a
boolean or tristate value and doesn't have different values when
building SPL or TPL.
v3:
  - Added "Fixes:" tag
v4:
  - No changes

 boot/android_ab.c | 97 ++-
 1 file changed, 45 insertions(+), 52 deletions(-)

diff --git a/boot/android_ab.c b/boot/android_ab.c
index 9a3d15ec60..f547aa64e4 100644
--- a/boot/android_ab.c
+++ b/boot/android_ab.c
@@ -187,13 +187,12 @@ int ab_select_slot(struct blk_desc *dev_desc, struct 
disk_partition *part_info,
   bool dec_tries)
 {
struct bootloader_control *abc = NULL;
+   struct bootloader_control *backup_abc = NULL;
u32 crc32_le;
int slot, i, ret;
bool store_needed = false;
+   bool valid_backup = false;
char slot_suffix[4];
-#if ANDROID_AB_BACKUP_OFFSET
-   struct bootloader_control *backup_abc = NULL;
-#endif
 
ret = ab_control_create_from_disk(dev_desc, part_info, , 0);
if (ret < 0) {
@@ -205,53 +204,49 @@ int ab_select_slot(struct blk_desc *dev_desc, struct 
disk_partition *part_info,
return ret;
}
 
-#if ANDROID_AB_BACKUP_OFFSET
-   ret = ab_control_create_from_disk(dev_desc, part_info, _abc,
- ANDROID_AB_BACKUP_OFFSET);
-   if (ret < 0) {
-   free(abc);
-   return ret;
+   if (CONFIG_ANDROID_AB_BACKUP_OFFSET) {
+   ret = ab_control_create_from_disk(dev_desc, part_info, 
_abc,
+ 
CONFIG_ANDROID_AB_BACKUP_OFFSET);
+   if (ret < 0) {
+   free(abc);
+   return ret;
+   }
}
-#endif
 
crc32_le = ab_control_compute_crc(abc);
if (abc->crc32_le != crc32_le) {
log_err("ANDROID: Invalid CRC-32 (expected %.8x, found %.8x),",
crc32_le, abc->crc32_le);
-#if ANDROID_AB_BACKUP_OFFSET
-   crc32_le = ab_control_compute_crc(backup_abc);
-   if (backup_abc->crc32_le != crc32_le) {
-   log_err("ANDROID: Invalid backup CRC-32 ");
-   log_err("expected %.8x, found %.8x),",
-   crc32_le, backup_abc->crc32_le);
-#endif
-
-   log_err("re-initializing A/B metadata.\n");
+   if (CONFIG_ANDROID_AB_BACKUP_OFFSET) {
+   crc32_le = ab_control_compute_crc(backup_abc);
+   if (backup_abc->crc32_le != crc32_le) {
+   log_err(" ANDROID: Invalid backup CRC-32 ");
+   log_err("(expected %.8x, found %.8x),",
+   crc32_le, backup_abc->crc32_le);
+   } else {
+   valid_backup = true;
+   log_info(" copying A/B metadata from 
backup.\n");
+   memcpy(abc, backup_abc, sizeof(*abc));
+   }
+   }
 
+   if (!valid_backup) {
+   log_err(" re-initializing A/B metadata.\n");
ret = ab_control_default(abc);
if (ret < 0) {
-#if ANDROID_AB_BACKUP_OFFSET
-   free(backup_abc);
-#endif
+   if (CONFIG_ANDROID_AB_BACKUP_OFFSET)
+   free(backup_abc);
free(abc);
return -ENODATA;
}
-#if ANDROID_AB_BACKUP_OFFSET
-   } else {
-   /*
-* Backup is valid. Copy it to the primary
-*/
-   memcpy(abc, backup_abc, sizeof(*abc));
}
-#endif
store_needed = true;
}
 
if (abc->magic != BOOT_CTRL_MAGIC) {
log_err("ANDROID: Unknown A/B metadata: %.8x\n", abc->magic);
-#if ANDROID_AB_BACKUP_OFFSET
-   free(backup_abc);
-#endif
+   if 

[PATCH v4 1/2] android_ab: Add missing semicolon

[Colin McAllister]

From: Colin McAllister 

Found a missing semicolon in code protected by a #if that will never
evaluate to true due to a separate issue. Fixing this issue before
addressing the #if.

Fixes: 3430f24bc6 ("android_ab: Try backup booloader_message")
Signed-off-by: Colin McAllister 
Cc: Joshua Watt 
Cc: Simon Glass 
Signed-off-by: Colin McAllister 
---
v2: No changes
v3: Added "Fixes:" tag
v4: No changes

 boot/android_ab.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/boot/android_ab.c b/boot/android_ab.c
index c9df6d2b4b..9a3d15ec60 100644
--- a/boot/android_ab.c
+++ b/boot/android_ab.c
@@ -221,7 +221,7 @@ int ab_select_slot(struct blk_desc *dev_desc, struct 
disk_partition *part_info,
 #if ANDROID_AB_BACKUP_OFFSET
crc32_le = ab_control_compute_crc(backup_abc);
if (backup_abc->crc32_le != crc32_le) {
-   log_err("ANDROID: Invalid backup CRC-32 ")
+   log_err("ANDROID: Invalid backup CRC-32 ");
log_err("expected %.8x, found %.8x),",
crc32_le, backup_abc->crc32_le);
 #endif
-- 
2.34.1

[PATCH v4 0/2] Fix Android A/B backup

[Colin McAllister]

- Addresses compiler error due to missing semicolon
- Removes use of preprocessor macros with ANDROID_AB_BACKUP_OFFSET

Bug was found by noticing a semicolon was missing and not causing a
compiler error when CONFIG_ANDROID_AB_BACKUP_OFFSET was set. I submitted
a patch to fix the semicolon before fixing the #if's. Testing the latter
patch without the former with ANDORID_AB_BACKUP_OFFSET set will cause a
compiler error.

What's changed in V2?
-

The second verison of changes removes the #if preprocessor macros to use
C conditionals instead. There was some minor refactoring required to get
this to work, so I did more thourough testing to ensure the backup data
works as expected.

I also realized that CONFIG_VAL is not needed because there's no reason
for the SPL or TPL to have different values for the backup address. I
opted to just use CONFIG_ANDROID_AB_BACKUP_OFFSET directly.

What's changed in V3?
-

Added "Fixes:" tag to patches. Performed additonal testing as described
in the second paragraph in the testing notes below.

I opted to not use CONFIG_IS_ENABLED because that macro appears to only
be intended for y/n configurations. See note at top of linux/kconfig.h:

"Note that these only work with boolean and tristate options."

What's changed in V4?
-

Nothing other than sending the patch in through a different email
address in order to see if the Garmin SMTP server is borking the
patches.

How was this patch series tested?
-

I built for my target with CONFIG_ANDROID_AB_BACKUP_OFFSET set to
0x1000. I first verified that the device can normally boot. I then ran
dd before rebooting to corrupt the primary data. I confirmed that the
backup was used to properly restore the primary. I then corrupted both
the primary and backup data and confirmed that the primary and backup
were both reinitialized to default values. Lastly, I corrupted the
backup data and not the primary data and confirmed that the backup was
restored the primary data.

Addtionally, I disabled CONFIG_ANDROID_AB_BACKUP_OFFSET for my device
and confirmed that after I corrupt the primary data, no backup is used.
When the primary data is not corrupt, the device boots normally. This is
what I would expect, because CONFIG_ANDROID_AB_BACKUP_OFFSET's default
value is 0x0, which would evaluate to false for all C if conditions.

Colin McAllister (2):
  android_ab: Add missing semicolon
  android_ab: Fix ANDROID_AB_BACKUP_OFFSET

 boot/android_ab.c | 97 ++-
 1 file changed, 45 insertions(+), 52 deletions(-)

-- 
2.34.1

[PATCH v3 4/5] include: env: Add phytec RAUC boot logic

[Leonard Anderweit]

Add logic for booting systems with the RAUC update mechanism. This can
be reused by other phytec boards.

Signed-off-by: Leonard Anderweit 
Tested-by: Teresa Remmet 
---
 include/env/phytec/rauc.env | 52 +
 1 file changed, 52 insertions(+)
 create mode 100644 include/env/phytec/rauc.env

diff --git a/include/env/phytec/rauc.env b/include/env/phytec/rauc.env
new file mode 100644
index ..89e17ff70ec6
--- /dev/null
+++ b/include/env/phytec/rauc.env
@@ -0,0 +1,52 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+
+/* Logic to select a boot partition based on environment variables and switch
+ * to the other if the boot fails. */
+
+doraucboot=0
+
+raucbootpart0=1
+raucrootpart0=5
+raucbootpart1=2
+raucrootpart1=6
+
+raucinit=
+   echo Booting RAUC A/B system;
+   test -n "${BOOT_ORDER}" || env set BOOT_ORDER "system0 system1";
+   test -n "${BOOT_system0_LEFT}" || env set BOOT_system0_LEFT 3;
+   test -n "${BOOT_system1_LEFT}" || env set BOOT_system1_LEFT 3;
+   env set raucstatus;
+   for BOOT_SLOT in "${BOOT_ORDER}"; do
+   if test "x${raucstatus}" != "x"; then
+   echo Skipping remaing slots!;
+   elif test "x${BOOT_SLOT}" = "xsystem0"; then
+   if test ${BOOT_system0_LEFT} -gt 0; then
+   echo Found valid slot A, ${BOOT_system0_LEFT} 
attempts remaining;
+   setexpr BOOT_system0_LEFT ${BOOT_system0_LEFT} 
- 1;
+   env set mmcpart ${raucbootpart0};
+   env set mmcroot ${raucrootpart0};
+   env set raucargs rauc.slot=system0;
+   env set raucstatus success;
+   fi;
+   elif test "x${BOOT_SLOT}" = "xsystem1"; then
+   if test ${BOOT_system1_LEFT} -gt 0; then
+   echo Found valid slot B, ${BOOT_system1_LEFT} 
attempts remaining;
+   setexpr BOOT_system1_LEFT ${BOOT_system1_LEFT} 
- 1;
+   env set mmcpart ${raucbootpart1};
+   env set mmcroot ${raucrootpart1};
+   env set raucargs rauc.slot=system1;
+   env set raucstatus success;
+   fi;
+   fi;
+   done;
+   if test -n "${raucstatus}"; then
+   env delete raucstatus;
+   env save;
+   else
+   echo WARN: No valid slot found;
+   env set BOOT_system0_LEFT 3;
+   env set BOOT_system1_LEFT 3;
+   env delete raucstatus;
+   env save;
+   reset;
+   fi;
-- 
2.25.1

[PATCH v3 5/5] board: phytec: phycore_imx8mp: Add RAUC boot logic to environment

[Leonard Anderweit]

Add RAUC boot logic to the environment. This is the first board to
utilize this environment.

Signed-off-by: Leonard Anderweit 
Tested-by: Teresa Remmet 
---
 board/phytec/phycore_imx8mp/phycore_imx8mp.env | 7 ++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/board/phytec/phycore_imx8mp/phycore_imx8mp.env 
b/board/phytec/phycore_imx8mp/phycore_imx8mp.env
index dc9ad0fe9d15..fae3e992654f 100644
--- a/board/phytec/phycore_imx8mp/phycore_imx8mp.env
+++ b/board/phytec/phycore_imx8mp/phycore_imx8mp.env
@@ -1,9 +1,14 @@
+#include 
+
 bootcmd=
if test ${dofastboot} = 1; then
fastboot 0;
fi;
mmc dev ${mmcdev};
if mmc rescan; then
+   if test ${doraucboot} = 1; then
+   run raucinit;
+   fi;
if run loadimage; then
run mmcboot;
else
@@ -23,7 +28,7 @@ loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} 
${fdt_file}
 loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}
 mmcargs=
setenv bootargs console=${console}
-   root=/dev/mmcblk${mmcdev}p${mmcroot} rootwait rw
+   root=/dev/mmcblk${mmcdev}p${mmcroot} ${raucargs} rootwait rw
 mmcautodetect=yes
 mmcboot=
echo Booting from mmc ...;
-- 
2.25.1

[PATCH v3 3/5] configs: phycore-imx8mp_defconfig: Use redundant environment

[Leonard Anderweit]

Add support for the redundant environment.

Signed-off-by: Leonard Anderweit 
Tested-by: Teresa Remmet 
---
 configs/phycore-imx8mp_defconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/configs/phycore-imx8mp_defconfig b/configs/phycore-imx8mp_defconfig
index fd492eba3c10..6c67f14b5559 100644
--- a/configs/phycore-imx8mp_defconfig
+++ b/configs/phycore-imx8mp_defconfig
@@ -19,6 +19,7 @@ CONFIG_SPL_SERIAL=y
 CONFIG_SPL_DRIVERS_MISC=y
 CONFIG_SPL_STACK=0x96
 CONFIG_SPL=y
+CONFIG_ENV_OFFSET_REDUND=0x3e
 CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x4800
 CONFIG_SYS_LOAD_ADDR=0x4048
 CONFIG_FIT=y
@@ -77,6 +78,7 @@ CONFIG_OF_CONTROL=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_ENV_OVERWRITE=y
 CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_SYS_MMC_ENV_DEV=2
 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
-- 
2.25.1

[PATCH v3 2/5] phycore_imx8mp: Move default bootcmd to board env

[Leonard Anderweit]

Move the default bootcmd from the defconfig to the board environment.
No change in functionality.

Signed-off-by: Leonard Anderweit 
Tested-by: Teresa Remmet 
---
 board/phytec/phycore_imx8mp/phycore_imx8mp.env | 12 
 configs/phycore-imx8mp_defconfig   |  2 --
 2 files changed, 12 insertions(+), 2 deletions(-)

diff --git a/board/phytec/phycore_imx8mp/phycore_imx8mp.env 
b/board/phytec/phycore_imx8mp/phycore_imx8mp.env
index 32513e70fec2..dc9ad0fe9d15 100644
--- a/board/phytec/phycore_imx8mp/phycore_imx8mp.env
+++ b/board/phytec/phycore_imx8mp/phycore_imx8mp.env
@@ -1,3 +1,15 @@
+bootcmd=
+   if test ${dofastboot} = 1; then
+   fastboot 0;
+   fi;
+   mmc dev ${mmcdev};
+   if mmc rescan; then
+   if run loadimage; then
+   run mmcboot;
+   else
+   run netboot;
+   fi;
+   fi;
 console=ttymxc0,115200
 dofastboot=0
 emmc_dev=2
diff --git a/configs/phycore-imx8mp_defconfig b/configs/phycore-imx8mp_defconfig
index b3a7bbd79bb6..fd492eba3c10 100644
--- a/configs/phycore-imx8mp_defconfig
+++ b/configs/phycore-imx8mp_defconfig
@@ -25,8 +25,6 @@ CONFIG_FIT=y
 CONFIG_FIT_EXTERNAL_OFFSET=0x3000
 CONFIG_SPL_LOAD_FIT=y
 CONFIG_OF_SYSTEM_SETUP=y
-CONFIG_USE_BOOTCOMMAND=y
-CONFIG_BOOTCOMMAND="if test ${dofastboot} = 1; then fastboot 0; fi; mmc dev 
${mmcdev}; if mmc rescan; then if run loadimage; then run mmcboot; else run 
netboot; fi; fi;"
 CONFIG_DEFAULT_FDT_FILE="oftree"
 CONFIG_SYS_CBSIZE=2048
 CONFIG_SYS_PBSIZE=2074
-- 
2.25.1

[PATCH v3 1/5] phycore_imx8mp: Move environment from include/config to board

[Leonard Anderweit]

Move the environment into the board directory and convert it from a C
header to a text file. Sort the variables alphabetically.
No functional changes.

Signed-off-by: Leonard Anderweit 
Reviewed-by: Teresa Remmet 
Tested-by: Teresa Remmet 
---
 .../phytec/phycore_imx8mp/phycore_imx8mp.env  | 45 +++
 include/configs/phycore_imx8mp.h  | 43 --
 2 files changed, 45 insertions(+), 43 deletions(-)
 create mode 100644 board/phytec/phycore_imx8mp/phycore_imx8mp.env

diff --git a/board/phytec/phycore_imx8mp/phycore_imx8mp.env 
b/board/phytec/phycore_imx8mp/phycore_imx8mp.env
new file mode 100644
index ..32513e70fec2
--- /dev/null
+++ b/board/phytec/phycore_imx8mp/phycore_imx8mp.env
@@ -0,0 +1,45 @@
+console=ttymxc0,115200
+dofastboot=0
+emmc_dev=2
+fastboot_raw_partition_all=0 4194304
+fastboot_raw_partition_bootloader=64 8128
+fdt_addr=0x4800
+fdt_file=CONFIG_DEFAULT_FDT_FILE
+image=Image
+ip_dyn=yes
+loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}
+loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}
+mmcargs=
+   setenv bootargs console=${console}
+   root=/dev/mmcblk${mmcdev}p${mmcroot} rootwait rw
+mmcautodetect=yes
+mmcboot=
+   echo Booting from mmc ...;
+   run mmcargs;
+   if run loadfdt; then
+   booti ${loadaddr} - ${fdt_addr};
+   else
+   echo WARN: Cannot load the DT;
+   fi;
+mmcdev=CONFIG_SYS_MMC_ENV_DEV
+mmcpart=1
+mmcroot=2
+netargs=
+   setenv bootargs console=${console} root=/dev/nfs ip=dhcp
+   nfsroot=${serverip}:${nfsroot},v3,tcp
+netboot=
+   echo Booting from net ...;
+   run netargs;
+   if test ${ip_dyn} = yes; then
+   setenv get_cmd dhcp;
+   else
+   setenv get_cmd tftp;
+   fi;
+   ${get_cmd} ${loadaddr} ${image};
+   if ${get_cmd} ${fdt_addr} ${fdt_file}; then
+   booti ${loadaddr} - ${fdt_addr};
+   else
+   echo WARN: Cannot load the DT;
+   fi;
+nfsroot=/nfs
+sd_dev=1
diff --git a/include/configs/phycore_imx8mp.h b/include/configs/phycore_imx8mp.h
index 11a17be7fe1d..206c4d50d276 100644
--- a/include/configs/phycore_imx8mp.h
+++ b/include/configs/phycore_imx8mp.h
@@ -13,49 +13,6 @@
 #define CFG_SYS_UBOOT_BASE \
(QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 
512)
 
-#define CFG_EXTRA_ENV_SETTINGS \
-   "image=Image\0" \
-   "console=ttymxc0,115200\0" \
-   "fdt_addr=0x4800\0" \
-   "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
-   "ip_dyn=yes\0" \
-   "dofastboot=0\0" \
-   "fastboot_raw_partition_bootloader=64 8128\0" \
-   "fastboot_raw_partition_all=0 4194304\0" \
-   "emmc_dev=2\0" \
-   "sd_dev=1\0" \
-   "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
-   "mmcpart=1\0" \
-   "mmcroot=2\0" \
-   "mmcautodetect=yes\0" \
-   "mmcargs=setenv bootargs console=${console} " \
-   "root=/dev/mmcblk${mmcdev}p${mmcroot} rootwait rw\0" \
-   "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
-   "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
-   "mmcboot=echo Booting from mmc ...; " \
-   "run mmcargs; " \
-   "if run loadfdt; then " \
-   "booti ${loadaddr} - ${fdt_addr}; " \
-   "else " \
-   "echo WARN: Cannot load the DT; " \
-   "fi;\0 " \
-   "nfsroot=/nfs\0" \
-   "netargs=setenv bootargs console=${console} root=/dev/nfs ip=dhcp " \
-   "nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
-   "netboot=echo Booting from net ...; " \
-   "run netargs; " \
-   "if test ${ip_dyn} = yes; then " \
-   "setenv get_cmd dhcp; " \
-   "else " \
-   "setenv get_cmd tftp; " \
-   "fi; " \
-   "${get_cmd} ${loadaddr} ${image}; " \
-   "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
-   "booti ${loadaddr} - ${fdt_addr}; " \
-   "else " \
-   "echo WARN: Cannot load the DT; " \
-   "fi;\0" \
-
 /* Link Definitions */
 
 #define CFG_SYS_INIT_RAM_ADDR  0x4000
-- 
2.25.1

[PATCH v3 0/5] Add RAUC boot logic for phycore_imx8mp

[Leonard Anderweit]

This series adds RAUC boot logic for the phycore_imx8mp.
The first patch converts the environment from a CFG_EXTRA_ENV_SETTINGS #define
to a text environment for better readability and maintainability.
The second patch moves the default bootcmd from the defconfig to the board
environment.
The third patch enables the redundant environment on phycore_imx8mp.
Patch 4 adds RAUC boot logic common to all phytec boards.
Patch 5 adds the RAUC boot logic to phycore_imx8mp.

v3:
 - swap loadimage and loadfdt in first patch
 - add Tested-by and Reviewed-by

v2:
 - rebase on next

Leonard Anderweit (5):
  phycore_imx8mp: Move environment from include/config to board
  phycore_imx8mp: Move default bootcmd to board env
  configs: phycore-imx8mp_defconfig: Use redundant environment
  include: env: Add phytec RAUC boot logic
  board: phytec: phycore_imx8mp: Add RAUC boot logic to environment

 .../phytec/phycore_imx8mp/phycore_imx8mp.env  | 62 +++
 configs/phycore-imx8mp_defconfig  |  4 +-
 include/configs/phycore_imx8mp.h  | 43 -
 include/env/phytec/rauc.env   | 52 
 4 files changed, 116 insertions(+), 45 deletions(-)
 create mode 100644 board/phytec/phycore_imx8mp/phycore_imx8mp.env
 create mode 100644 include/env/phytec/rauc.env

-- 
2.25.1

Re: [PATCH v2 5/5] board: phytec: phycore_imx8mp: Add RAUC boot logic to environment

[Teresa Remmet]

Am Dienstag, dem 12.03.2024 um 09:59 +0100 schrieb Leonard Anderweit:
> Add RAUC boot logic to the environment. This is the first board to
> utilize this environment.
> 
> Signed-off-by: Leonard Anderweit 

Tested-by: Teresa Remmet 

> ---
>  board/phytec/phycore_imx8mp/phycore_imx8mp.env | 7 ++-
>  1 file changed, 6 insertions(+), 1 deletion(-)
> 
> diff --git a/board/phytec/phycore_imx8mp/phycore_imx8mp.env
> b/board/phytec/phycore_imx8mp/phycore_imx8mp.env
> index 73202c3b129a..d58d25476f6b 100644
> --- a/board/phytec/phycore_imx8mp/phycore_imx8mp.env
> +++ b/board/phytec/phycore_imx8mp/phycore_imx8mp.env
> @@ -1,9 +1,14 @@
> +#include 
> +
>  bootcmd=
> if test ${dofastboot} = 1; then
> fastboot 0;
> fi;
> mmc dev ${mmcdev};
> if mmc rescan; then
> +   if test ${doraucboot} = 1; then
> +   run raucinit;
> +   fi;
> if run loadimage; then
> run mmcboot;
> else
> @@ -23,7 +28,7 @@ loadimage=fatload mmc ${mmcdev}:${mmcpart}
> ${loadaddr} ${image}
>  loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}
>  mmcargs=
> setenv bootargs console=${console}
> -   root=/dev/mmcblk${mmcdev}p${mmcroot} rootwait rw
> +   root=/dev/mmcblk${mmcdev}p${mmcroot} ${raucargs} rootwait rw
>  mmcautodetect=yes
>  mmcboot=
> echo Booting from mmc ...;

-- 
PHYTEC Messtechnik GmbH | Barcelona-Allee 1 | 55129 Mainz, Germany

Geschäftsführer: Dipl.-Ing. Michael Mitezki, Dipl.-Ing. Bodo Huber,
Dipl.-Ing. (FH) Markus Lickes | Handelsregister Mainz HRB 4656 |
Finanzamt Mainz | St.Nr. 266500608, DE 149059855

Re: [PATCH v2 4/5] include: env: Add phytec RAUC boot logic

[Teresa Remmet]

Am Dienstag, dem 12.03.2024 um 09:59 +0100 schrieb Leonard Anderweit:
> Add logic for booting systems with the RAUC update mechanism. This
> can
> be reused by other phytec boards.
> 
> Signed-off-by: Leonard Anderweit 

Tested-by: Teresa Remmet 

> ---
>  include/env/phytec/rauc.env | 52
> +
>  1 file changed, 52 insertions(+)
>  create mode 100644 include/env/phytec/rauc.env
> 
> diff --git a/include/env/phytec/rauc.env
> b/include/env/phytec/rauc.env
> new file mode 100644
> index ..89e17ff70ec6
> --- /dev/null
> +++ b/include/env/phytec/rauc.env
> @@ -0,0 +1,52 @@
> +/* SPDX-License-Identifier: GPL-2.0+ */
> +
> +/* Logic to select a boot partition based on environment variables
> and switch
> + * to the other if the boot fails. */
> +
> +doraucboot=0
> +
> +raucbootpart0=1
> +raucrootpart0=5
> +raucbootpart1=2
> +raucrootpart1=6
> +
> +raucinit=
> +   echo Booting RAUC A/B system;
> +   test -n "${BOOT_ORDER}" || env set BOOT_ORDER "system0
> system1";
> +   test -n "${BOOT_system0_LEFT}" || env set BOOT_system0_LEFT
> 3;
> +   test -n "${BOOT_system1_LEFT}" || env set BOOT_system1_LEFT
> 3;
> +   env set raucstatus;
> +   for BOOT_SLOT in "${BOOT_ORDER}"; do
> +   if test "x${raucstatus}" != "x"; then
> +   echo Skipping remaing slots!;
> +   elif test "x${BOOT_SLOT}" = "xsystem0"; then
> +   if test ${BOOT_system0_LEFT} -gt 0; then
> +   echo Found valid slot A,
> ${BOOT_system0_LEFT} attempts remaining;
> +   setexpr BOOT_system0_LEFT
> ${BOOT_system0_LEFT} - 1;
> +   env set mmcpart ${raucbootpart0};
> +   env set mmcroot ${raucrootpart0};
> +   env set raucargs rauc.slot=system0;
> +   env set raucstatus success;
> +   fi;
> +   elif test "x${BOOT_SLOT}" = "xsystem1"; then
> +   if test ${BOOT_system1_LEFT} -gt 0; then
> +   echo Found valid slot B,
> ${BOOT_system1_LEFT} attempts remaining;
> +   setexpr BOOT_system1_LEFT
> ${BOOT_system1_LEFT} - 1;
> +   env set mmcpart ${raucbootpart1};
> +   env set mmcroot ${raucrootpart1};
> +   env set raucargs rauc.slot=system1;
> +   env set raucstatus success;
> +   fi;
> +   fi;
> +   done;
> +   if test -n "${raucstatus}"; then
> +   env delete raucstatus;
> +   env save;
> +   else
> +   echo WARN: No valid slot found;
> +   env set BOOT_system0_LEFT 3;
> +   env set BOOT_system1_LEFT 3;
> +   env delete raucstatus;
> +   env save;
> +   reset;
> +   fi;

-- 
PHYTEC Messtechnik GmbH | Barcelona-Allee 1 | 55129 Mainz, Germany

Geschäftsführer: Dipl.-Ing. Michael Mitezki, Dipl.-Ing. Bodo Huber,
Dipl.-Ing. (FH) Markus Lickes | Handelsregister Mainz HRB 4656 |
Finanzamt Mainz | St.Nr. 266500608, DE 149059855

Re: [PATCH v2 3/5] configs: phycore-imx8mp_defconfig: Use redundant environment

[Teresa Remmet]

Am Dienstag, dem 12.03.2024 um 09:59 +0100 schrieb Leonard Anderweit:
> Add support for the redundant environment.
> 
> Signed-off-by: Leonard Anderweit 

Tested-by: Teresa Remmet 

> ---
>  configs/phycore-imx8mp_defconfig | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/configs/phycore-imx8mp_defconfig b/configs/phycore-
> imx8mp_defconfig
> index fd492eba3c10..6c67f14b5559 100644
> --- a/configs/phycore-imx8mp_defconfig
> +++ b/configs/phycore-imx8mp_defconfig
> @@ -19,6 +19,7 @@ CONFIG_SPL_SERIAL=y
>  CONFIG_SPL_DRIVERS_MISC=y
>  CONFIG_SPL_STACK=0x96
>  CONFIG_SPL=y
> +CONFIG_ENV_OFFSET_REDUND=0x3e
>  CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x4800
>  CONFIG_SYS_LOAD_ADDR=0x4048
>  CONFIG_FIT=y
> @@ -77,6 +78,7 @@ CONFIG_OF_CONTROL=y
>  CONFIG_SPL_OF_CONTROL=y
>  CONFIG_ENV_OVERWRITE=y
>  CONFIG_ENV_IS_IN_MMC=y
> +CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
>  CONFIG_SYS_RELOC_GD_ENV_ADDR=y
>  CONFIG_SYS_MMC_ENV_DEV=2
>  CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y

-- 
PHYTEC Messtechnik GmbH | Barcelona-Allee 1 | 55129 Mainz, Germany

Geschäftsführer: Dipl.-Ing. Michael Mitezki, Dipl.-Ing. Bodo Huber,
Dipl.-Ing. (FH) Markus Lickes | Handelsregister Mainz HRB 4656 |
Finanzamt Mainz | St.Nr. 266500608, DE 149059855

Re: [PATCH v2 2/5] phycore_imx8mp: Move default bootcmd to board env

[Teresa Remmet]

Am Dienstag, dem 12.03.2024 um 09:59 +0100 schrieb Leonard Anderweit:
> Move the default bootcmd from the defconfig to the board environment.
> No change in functionality.
> 
> Signed-off-by: Leonard Anderweit 

Tested-by: Teresa Remmet 

> ---
>  board/phytec/phycore_imx8mp/phycore_imx8mp.env | 12 
>  configs/phycore-imx8mp_defconfig   |  2 --
>  2 files changed, 12 insertions(+), 2 deletions(-)
> 
> diff --git a/board/phytec/phycore_imx8mp/phycore_imx8mp.env
> b/board/phytec/phycore_imx8mp/phycore_imx8mp.env
> index 6d15b7f3dc9f..73202c3b129a 100644
> --- a/board/phytec/phycore_imx8mp/phycore_imx8mp.env
> +++ b/board/phytec/phycore_imx8mp/phycore_imx8mp.env
> @@ -1,3 +1,15 @@
> +bootcmd=
> +   if test ${dofastboot} = 1; then
> +   fastboot 0;
> +   fi;
> +   mmc dev ${mmcdev};
> +   if mmc rescan; then
> +   if run loadimage; then
> +   run mmcboot;
> +   else
> +   run netboot;
> +   fi;
> +   fi;
>  console=ttymxc0,115200
>  dofastboot=0
>  emmc_dev=2
> diff --git a/configs/phycore-imx8mp_defconfig b/configs/phycore-
> imx8mp_defconfig
> index b3a7bbd79bb6..fd492eba3c10 100644
> --- a/configs/phycore-imx8mp_defconfig
> +++ b/configs/phycore-imx8mp_defconfig
> @@ -25,8 +25,6 @@ CONFIG_FIT=y
>  CONFIG_FIT_EXTERNAL_OFFSET=0x3000
>  CONFIG_SPL_LOAD_FIT=y
>  CONFIG_OF_SYSTEM_SETUP=y
> -CONFIG_USE_BOOTCOMMAND=y
> -CONFIG_BOOTCOMMAND="if test ${dofastboot} = 1; then fastboot 0; fi;
> mmc dev ${mmcdev}; if mmc rescan; then if run loadimage; then run
> mmcboot; else run netboot; fi; fi;"
>  CONFIG_DEFAULT_FDT_FILE="oftree"
>  CONFIG_SYS_CBSIZE=2048
>  CONFIG_SYS_PBSIZE=2074

-- 
PHYTEC Messtechnik GmbH | Barcelona-Allee 1 | 55129 Mainz, Germany

Geschäftsführer: Dipl.-Ing. Michael Mitezki, Dipl.-Ing. Bodo Huber,
Dipl.-Ing. (FH) Markus Lickes | Handelsregister Mainz HRB 4656 |
Finanzamt Mainz | St.Nr. 266500608, DE 149059855

Re: [PATCH v2 1/5] phycore_imx8mp: Move environment from include/config to board

[Teresa Remmet]

Hello Leonard,

Am Dienstag, dem 12.03.2024 um 09:59 +0100 schrieb Leonard Anderweit:
> Move the environment into the board directory and convert it from a C
> header to a text file. Sort the variables alphabetically.
> No functional changes.
> 
> Signed-off-by: Leonard Anderweit 
> ---
>  .../phytec/phycore_imx8mp/phycore_imx8mp.env  | 45
> +++
>  include/configs/phycore_imx8mp.h  | 43 -
> -
>  2 files changed, 45 insertions(+), 43 deletions(-)
>  create mode 100644 board/phytec/phycore_imx8mp/phycore_imx8mp.env
> 
> diff --git a/board/phytec/phycore_imx8mp/phycore_imx8mp.env
> b/board/phytec/phycore_imx8mp/phycore_imx8mp.env
> new file mode 100644
> index ..6d15b7f3dc9f
> --- /dev/null
> +++ b/board/phytec/phycore_imx8mp/phycore_imx8mp.env
> @@ -0,0 +1,45 @@
> +console=ttymxc0,115200
> +dofastboot=0
> +emmc_dev=2
> +fastboot_raw_partition_all=0 4194304
> +fastboot_raw_partition_bootloader=64 8128
> +fdt_addr=0x4800
> +fdt_file=CONFIG_DEFAULT_FDT_FILE
> +image=Image
> +ip_dyn=yes
> +loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}
> +loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}

a small nit here as you sort them alphabetically. "loadimage" and
"loadfdt" needs to be swapped. 

besides of this:

Reviewed-by: Teresa Remmet 
Tested-by: Teresa Remmet 


Thanks!
Teresa

> +mmcargs=
> +   setenv bootargs console=${console}
> +   root=/dev/mmcblk${mmcdev}p${mmcroot} rootwait rw
> +mmcautodetect=yes
> +mmcboot=
> +   echo Booting from mmc ...;
> +   run mmcargs;
> +   if run loadfdt; then
> +   booti ${loadaddr} - ${fdt_addr};
> +   else
> +   echo WARN: Cannot load the DT;
> +   fi;
> +mmcdev=CONFIG_SYS_MMC_ENV_DEV
> +mmcpart=1
> +mmcroot=2
> +netargs=
> +   setenv bootargs console=${console} root=/dev/nfs ip=dhcp
> +   nfsroot=${serverip}:${nfsroot},v3,tcp
> +netboot=
> +   echo Booting from net ...;
> +   run netargs;
> +   if test ${ip_dyn} = yes; then
> +   setenv get_cmd dhcp;
> +   else
> +   setenv get_cmd tftp;
> +   fi;
> +   ${get_cmd} ${loadaddr} ${image};
> +   if ${get_cmd} ${fdt_addr} ${fdt_file}; then
> +   booti ${loadaddr} - ${fdt_addr};
> +   else
> +   echo WARN: Cannot load the DT;
> +   fi;
> +nfsroot=/nfs
> +sd_dev=1
> diff --git a/include/configs/phycore_imx8mp.h
> b/include/configs/phycore_imx8mp.h
> index 11a17be7fe1d..206c4d50d276 100644
> --- a/include/configs/phycore_imx8mp.h
> +++ b/include/configs/phycore_imx8mp.h
> @@ -13,49 +13,6 @@
>  #define CFG_SYS_UBOOT_BASE \
> (QSPI0_AMBA_BASE +
> CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
>  
> -#define CFG_EXTRA_ENV_SETTINGS \
> -   "image=Image\0" \
> -   "console=ttymxc0,115200\0" \
> -   "fdt_addr=0x4800\0" \
> -   "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
> -   "ip_dyn=yes\0" \
> -   "dofastboot=0\0" \
> -   "fastboot_raw_partition_bootloader=64 8128\0" \
> -   "fastboot_raw_partition_all=0 4194304\0" \
> -   "emmc_dev=2\0" \
> -   "sd_dev=1\0" \
> -   "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
> -   "mmcpart=1\0" \
> -   "mmcroot=2\0" \
> -   "mmcautodetect=yes\0" \
> -   "mmcargs=setenv bootargs console=${console} " \
> -   "root=/dev/mmcblk${mmcdev}p${mmcroot} rootwait rw\0"
> \
> -   "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr}
> ${image}\0" \
> -   "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr}
> ${fdt_file}\0" \
> -   "mmcboot=echo Booting from mmc ...; " \
> -   "run mmcargs; " \
> -   "if run loadfdt; then " \
> -   "booti ${loadaddr} - ${fdt_addr}; " \
> -   "else " \
> -   "echo WARN: Cannot load the DT; " \
> -   "fi;\0 " \
> -   "nfsroot=/nfs\0" \
> -   "netargs=setenv bootargs console=${console} root=/dev/nfs
> ip=dhcp " \
> -   "nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
> -   "netboot=echo Booting from net ...; " \
> -   "run netargs; " \
> -   "if test ${ip_dyn} = yes; then " \
> -   "setenv get_cmd dhcp; " \
> -   "else " \
> -   "setenv get_cmd tftp; " \
> -   "fi; " \
> -   "${get_cmd} ${loadaddr} ${image}; " \
> -   "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
> -   "booti ${loadaddr} - ${fdt_addr}; " \
> -   "else " \
> -   "echo WARN: Cannot load the DT; " \
> -   "fi;\0" \
> -
>  /* Link Definitions */
>  
>  #define CFG_SYS_INIT_RAM_ADDR  0x4000

-- 
PHYTEC Messtechnik GmbH | Barcelona-Allee 1 | 55129 Mainz, Germany

Geschäftsführer: Dipl.-Ing. Michael Mitezki, Dipl.-Ing. Bodo Huber,
Dipl.-Ing. (FH) Markus Lickes | Handelsregister Mainz HRB 4656 |

[PATCH 7/7 v2] arm: remove redundant section alignments

[Ilias Apalodimas]

Previous patches cleaning up linker symbols, also merged any explicit
. = ALIGN(x); into section definitions -- e.g '.bss ALIGN(x) :' instead
of '. - ALIGN(x); bss : {...}'

However, if the output address is not specified then one will be chosen
for the section. This address will be adjusted to fit the alignment
requirement of the output section following the strictest alignment of
any input section contained within the output section. So let's get rid
of the redundant ALIGN directives.

It's worth noting that the only platform the alignment is preserved on
.rel.dyn is mach-zynq, which was explicitly  aligning that section on an 8b
boundary instead of the automatically chosen 4b alignment.

Signed-off-by: Ilias Apalodimas 
---
 arch/arm/cpu/armv8/u-boot.lds| 6 +++---
 arch/arm/cpu/u-boot.lds  | 6 +++---
 arch/arm/mach-rockchip/u-boot-tpl-v8.lds | 2 +-
 arch/arm/mach-zynq/u-boot.lds| 4 ++--
 4 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/arch/arm/cpu/armv8/u-boot.lds b/arch/arm/cpu/armv8/u-boot.lds
index 33f4624b561d..ccdd1966cfbc 100644
--- a/arch/arm/cpu/armv8/u-boot.lds
+++ b/arch/arm/cpu/armv8/u-boot.lds
@@ -115,7 +115,7 @@ SECTIONS
KEEP(*(SORT(__u_boot_list*)));
}

-   .efi_runtime_rel ALIGN(8) : {
+   .efi_runtime_rel : {
 __efi_runtime_rel_start = .;
*(.rel*.efi_runtime)
*(.rel*.efi_runtime.*)
@@ -124,7 +124,7 @@ SECTIONS

__image_copy_end = .;

-   .rela.dyn ALIGN(8) : {
+   .rela.dyn : {
__rel_dyn_start = .;
*(.rela*)
__rel_dyn_end = .;
@@ -132,7 +132,7 @@ SECTIONS

_end = .;

-   .bss ALIGN(8): {
+   .bss : {
__bss_start = .;
*(.bss*)
__bss_end = .;
diff --git a/arch/arm/cpu/u-boot.lds b/arch/arm/cpu/u-boot.lds
index b6b19a4174fe..a9fcbbf22e96 100644
--- a/arch/arm/cpu/u-boot.lds
+++ b/arch/arm/cpu/u-boot.lds
@@ -43,7 +43,7 @@ SECTIONS
}

/* This needs to come before *(.text*) */
-   .efi_runtime ALIGN(4) : {
+   .efi_runtime : {
__efi_runtime_start = .;
*(.text.efi_runtime*)
*(.rodata.efi_runtime*)
@@ -146,7 +146,7 @@ SECTIONS
KEEP(*(SORT(__u_boot_list*)));
}

-   .efi_runtime_rel ALIGN(4) : {
+   .efi_runtime_rel : {
__efi_runtime_rel_start = .;
*(.rel*.efi_runtime)
*(.rel*.efi_runtime.*)
@@ -155,7 +155,7 @@ SECTIONS

__image_copy_end = .;

-   .rel.dyn ALIGN(4) : {
+   .rel.dyn : {
__rel_dyn_start = .;
*(.rel*)
__rel_dyn_end = .;
diff --git a/arch/arm/mach-rockchip/u-boot-tpl-v8.lds 
b/arch/arm/mach-rockchip/u-boot-tpl-v8.lds
index 8ff35b5c17cf..e67416c09c1c 100644
--- a/arch/arm/mach-rockchip/u-boot-tpl-v8.lds
+++ b/arch/arm/mach-rockchip/u-boot-tpl-v8.lds
@@ -53,7 +53,7 @@ SECTIONS

_image_binary_end = .;

-   .bss ALIGN(8) : {
+   .bss : {
__bss_start = .;
*(.bss*)
__bss_end = .;
diff --git a/arch/arm/mach-zynq/u-boot.lds b/arch/arm/mach-zynq/u-boot.lds
index f739d1cfce85..111410215072 100644
--- a/arch/arm/mach-zynq/u-boot.lds
+++ b/arch/arm/mach-zynq/u-boot.lds
@@ -22,7 +22,7 @@ SECTIONS
}

/* This needs to come before *(.text*) */
-   .efi_runtime ALIGN(4) : {
+   .efi_runtime : {
__efi_runtime_start = .;
*(.text.efi_runtime*)
*(.rodata.efi_runtime*)
@@ -52,7 +52,7 @@ SECTIONS
KEEP(*(SORT(__u_boot_list*)));
}

-   .efi_runtime_rel ALIGN(4) : {
+   .efi_runtime_rel : {
__efi_runtime_rel_start = .;
*(.rel*.efi_runtime)
*(.rel*.efi_runtime.*)
--
2.37.2

[PATCH 6/7 v2] arm: move image_copy_start/end to linker symbols

[Ilias Apalodimas]

image_copy_start/end are defined as c variables in order to force the compiler
emit relative references. However, defining those within a section definition
will do the same thing since [0].

So let's remove the special sections from the linker scripts, the
variable definitions from sections.c and define them as a symbols within
a section.

[0] binutils commit 6b3b0ab89663 ("Make linker assigned symbol dynamic only for 
shared object")

Suggested-by: Sam Edwards 
Signed-off-by: Ilias Apalodimas 
Tested-by: Sam Edwards  # Binary output identical
---
 arch/arm/cpu/armv8/u-boot-spl.lds   | 7 ++-
 arch/arm/cpu/armv8/u-boot.lds   | 9 ++---
 arch/arm/cpu/u-boot-spl.lds | 2 +-
 arch/arm/cpu/u-boot.lds | 9 ++---
 arch/arm/lib/sections.c | 2 --
 arch/arm/mach-aspeed/ast2600/u-boot-spl.lds | 2 +-
 arch/arm/mach-rockchip/u-boot-tpl-v8.lds| 7 ++-
 arch/arm/mach-zynq/u-boot-spl.lds   | 2 +-
 arch/arm/mach-zynq/u-boot.lds   | 8 ++--
 9 files changed, 13 insertions(+), 35 deletions(-)

diff --git a/arch/arm/cpu/armv8/u-boot-spl.lds 
b/arch/arm/cpu/armv8/u-boot-spl.lds
index 16fddb46e9cb..6417cbd08e2c 100644
--- a/arch/arm/cpu/armv8/u-boot-spl.lds
+++ b/arch/arm/cpu/armv8/u-boot-spl.lds
@@ -21,9 +21,9 @@ OUTPUT_ARCH(aarch64)
 ENTRY(_start)
 SECTIONS
 {
+   __image_copy_start = ADDR(.text);
.text : {
. = ALIGN(8);
-   __image_copy_start = .;
CPUDIR/start.o (.text*)
*(.text*)
} >.sram
@@ -51,10 +51,7 @@ SECTIONS
KEEP(*(SORT(__u_boot_list*)));
} >.sram

-   .image_copy_end : {
-   . = ALIGN(8);
-   *(.__image_copy_end)
-   } >.sram
+   __image_copy_end = .;

.end : {
. = ALIGN(8);
diff --git a/arch/arm/cpu/armv8/u-boot.lds b/arch/arm/cpu/armv8/u-boot.lds
index e737de761a9d..33f4624b561d 100644
--- a/arch/arm/cpu/armv8/u-boot.lds
+++ b/arch/arm/cpu/armv8/u-boot.lds
@@ -21,9 +21,9 @@ SECTIONS
. = 0x;

. = ALIGN(8);
+   __image_copy_start = ADDR(.text);
.text :
{
-   *(.__image_copy_start)
CPUDIR/start.o (.text*)
}

@@ -122,12 +122,7 @@ SECTIONS
 __efi_runtime_rel_stop = .;
}

-   . = ALIGN(8);
-
-   .image_copy_end :
-   {
-   *(.__image_copy_end)
-   }
+   __image_copy_end = .;

.rela.dyn ALIGN(8) : {
__rel_dyn_start = .;
diff --git a/arch/arm/cpu/u-boot-spl.lds b/arch/arm/cpu/u-boot-spl.lds
index fb2189d50dea..9ed62395a9c5 100644
--- a/arch/arm/cpu/u-boot-spl.lds
+++ b/arch/arm/cpu/u-boot-spl.lds
@@ -14,9 +14,9 @@ SECTIONS
. = 0x;

. = ALIGN(4);
+   __image_copy_start = ADDR(.text);
.text :
{
-   __image_copy_start = .;
*(.vectors)
CPUDIR/start.o (.text*)
*(.text*)
diff --git a/arch/arm/cpu/u-boot.lds b/arch/arm/cpu/u-boot.lds
index df979986a5ef..b6b19a4174fe 100644
--- a/arch/arm/cpu/u-boot.lds
+++ b/arch/arm/cpu/u-boot.lds
@@ -35,9 +35,9 @@ SECTIONS
. = 0x;

. = ALIGN(4);
+   __image_copy_start = ADDR(.text);
.text :
{
-   *(.__image_copy_start)
*(.vectors)
CPUDIR/start.o (.text*)
}
@@ -153,12 +153,7 @@ SECTIONS
__efi_runtime_rel_stop = .;
}

-   . = ALIGN(4);
-
-   .image_copy_end :
-   {
-   *(.__image_copy_end)
-   }
+   __image_copy_end = .;

.rel.dyn ALIGN(4) : {
__rel_dyn_start = .;
diff --git a/arch/arm/lib/sections.c b/arch/arm/lib/sections.c
index a4d4202e99f5..db5463b2bbbc 100644
--- a/arch/arm/lib/sections.c
+++ b/arch/arm/lib/sections.c
@@ -19,8 +19,6 @@
  * aliasing warnings.
  */

-char __image_copy_start[0] __section(".__image_copy_start");
-char __image_copy_end[0] __section(".__image_copy_end");
 char __secure_start[0] __section(".__secure_start");
 char __secure_end[0] __section(".__secure_end");
 char __secure_stack_start[0] __section(".__secure_stack_start");
diff --git a/arch/arm/mach-aspeed/ast2600/u-boot-spl.lds 
b/arch/arm/mach-aspeed/ast2600/u-boot-spl.lds
index 37f0ccd92201..ada6570d9712 100644
--- a/arch/arm/mach-aspeed/ast2600/u-boot-spl.lds
+++ b/arch/arm/mach-aspeed/ast2600/u-boot-spl.lds
@@ -22,9 +22,9 @@ SECTIONS
. = 0x;

. = ALIGN(4);
+   __image_copy_start = ADDR(.text);
.text :
{
-   __image_copy_start = .;
*(.vectors)
CPUDIR/start.o (.text*)
*(.text*)
diff --git a/arch/arm/mach-rockchip/u-boot-tpl-v8.lds 
b/arch/arm/mach-rockchip/u-boot-tpl-v8.lds
index b7887194026e..8ff35b5c17cf 100644
--- a/arch/arm/mach-rockchip/u-boot-tpl-v8.lds
+++ 

[PATCH 5/7 v2] arm: fix __efi_runtime_start/end definitions

[Ilias Apalodimas]

__efi_runtime_start/end are defined as c variables for arm7 only in
order to force the compiler emit relative references. However, defining
those within a section definition will do the same thing since [0].
On top of that the v8 linker scripts define it as a symbol.

So let's remove the special sections from the linker scripts, the
variable definitions from sections.c and define them as a symbols within
the correct section.

[0] binutils commit 6b3b0ab89663 ("Make linker assigned symbol dynamic only for 
shared object")

Suggested-by: Sam Edwards 
Signed-off-by: Ilias Apalodimas 
Reviewed-by: Sam Edwards 
Tested-by: Sam Edwards  # Binary output identical
---
 arch/arm/cpu/u-boot.lds| 12 +++-
 arch/arm/lib/sections.c|  2 --
 arch/arm/mach-zynq/u-boot.lds  | 12 +++-
 include/asm-generic/sections.h |  1 +
 4 files changed, 7 insertions(+), 20 deletions(-)

diff --git a/arch/arm/cpu/u-boot.lds b/arch/arm/cpu/u-boot.lds
index b1065ec8063d..df979986a5ef 100644
--- a/arch/arm/cpu/u-boot.lds
+++ b/arch/arm/cpu/u-boot.lds
@@ -43,18 +43,12 @@ SECTIONS
}

/* This needs to come before *(.text*) */
-   .__efi_runtime_start : {
-   *(.__efi_runtime_start)
-   }
-
-   .efi_runtime : {
+   .efi_runtime ALIGN(4) : {
+   __efi_runtime_start = .;
*(.text.efi_runtime*)
*(.rodata.efi_runtime*)
*(.data.efi_runtime*)
-   }
-
-   .__efi_runtime_stop : {
-   *(.__efi_runtime_stop)
+   __efi_runtime_stop = .;
}

.text_rest :
diff --git a/arch/arm/lib/sections.c b/arch/arm/lib/sections.c
index 1ee3dd3667ba..a4d4202e99f5 100644
--- a/arch/arm/lib/sections.c
+++ b/arch/arm/lib/sections.c
@@ -25,6 +25,4 @@ char __secure_start[0] __section(".__secure_start");
 char __secure_end[0] __section(".__secure_end");
 char __secure_stack_start[0] __section(".__secure_stack_start");
 char __secure_stack_end[0] __section(".__secure_stack_end");
-char __efi_runtime_start[0] __section(".__efi_runtime_start");
-char __efi_runtime_stop[0] __section(".__efi_runtime_stop");
 char _end[0] __section(".__end");
diff --git a/arch/arm/mach-zynq/u-boot.lds b/arch/arm/mach-zynq/u-boot.lds
index 16245fd4ac2f..fc0ba0ed9a84 100644
--- a/arch/arm/mach-zynq/u-boot.lds
+++ b/arch/arm/mach-zynq/u-boot.lds
@@ -22,18 +22,12 @@ SECTIONS
}

/* This needs to come before *(.text*) */
-   .__efi_runtime_start : {
-   *(.__efi_runtime_start)
-   }
-
-   .efi_runtime : {
+   .efi_runtime ALIGN(4) : {
+   __efi_runtime_start = .;
*(.text.efi_runtime*)
*(.rodata.efi_runtime*)
*(.data.efi_runtime*)
-   }
-
-   .__efi_runtime_stop : {
-   *(.__efi_runtime_stop)
+   __efi_runtime_stop = .;
}

.text_rest :
diff --git a/include/asm-generic/sections.h b/include/asm-generic/sections.h
index 60949200dd93..b6bca53db10d 100644
--- a/include/asm-generic/sections.h
+++ b/include/asm-generic/sections.h
@@ -35,6 +35,7 @@ extern char __priv_data_start[], __priv_data_end[];
 extern char __ctors_start[], __ctors_end[];

 extern char __efi_runtime_rel_start[], __efi_runtime_rel_stop[];
+extern char __efi_runtime_start[], __efi_runtime_stop[];

 /* function descriptor handling (if any).  Override
  * in asm/sections.h */
--
2.37.2

[PATCH 4/7 v2] arm: clean up v7 and v8 linker scripts for __rel_dyn_start/end

[Ilias Apalodimas]

commit 47bd65ef057f ("arm: make __rel_dyn_{start, end} compiler-generated")
were moving the __rel_dyn_start/end on c generated variables that were
injected in their own sections. The reason was that we needed relative
relocations for position independent code and linker bugs back then
prevented us from doing so [0].

However, the linker documentation pages states that symbols that are
defined within a section definition will create a relocatable
type with the value being a fixed offset from the base of a section [1].

[0] binutils commit 6b3b0ab89663 ("Make linker assigned symbol dynamic only for 
shared object")
[1] https://sourceware.org/binutils/docs/ld/Expression-Section.html

Suggested-by: Sam Edwards 
Signed-off-by: Ilias Apalodimas 
Reviewed-by: Sam Edwards 
Tested-by: Sam Edwards  # Binary output identical
---
 arch/arm/cpu/armv8/u-boot.lds | 16 +++-
 arch/arm/cpu/u-boot.lds   | 14 +++---
 arch/arm/lib/sections.c   |  2 --
 arch/arm/mach-zynq/u-boot.lds | 14 +++---
 4 files changed, 9 insertions(+), 37 deletions(-)

diff --git a/arch/arm/cpu/armv8/u-boot.lds b/arch/arm/cpu/armv8/u-boot.lds
index eccb116d3cfa..e737de761a9d 100644
--- a/arch/arm/cpu/armv8/u-boot.lds
+++ b/arch/arm/cpu/armv8/u-boot.lds
@@ -129,20 +129,10 @@ SECTIONS
*(.__image_copy_end)
}

-   . = ALIGN(8);
-
-   .rel_dyn_start :
-   {
-   *(.__rel_dyn_start)
-   }
-
-   .rela.dyn : {
+   .rela.dyn ALIGN(8) : {
+   __rel_dyn_start = .;
*(.rela*)
-   }
-
-   .rel_dyn_end :
-   {
-   *(.__rel_dyn_end)
+   __rel_dyn_end = .;
}

_end = .;
diff --git a/arch/arm/cpu/u-boot.lds b/arch/arm/cpu/u-boot.lds
index 37f4cd27d79a..b1065ec8063d 100644
--- a/arch/arm/cpu/u-boot.lds
+++ b/arch/arm/cpu/u-boot.lds
@@ -166,18 +166,10 @@ SECTIONS
*(.__image_copy_end)
}

-   .rel_dyn_start :
-   {
-   *(.__rel_dyn_start)
-   }
-
-   .rel.dyn : {
+   .rel.dyn ALIGN(4) : {
+   __rel_dyn_start = .;
*(.rel*)
-   }
-
-   .rel_dyn_end :
-   {
-   *(.__rel_dyn_end)
+   __rel_dyn_end = .;
}

.end :
diff --git a/arch/arm/lib/sections.c b/arch/arm/lib/sections.c
index ddfde52163fc..1ee3dd3667ba 100644
--- a/arch/arm/lib/sections.c
+++ b/arch/arm/lib/sections.c
@@ -21,8 +21,6 @@

 char __image_copy_start[0] __section(".__image_copy_start");
 char __image_copy_end[0] __section(".__image_copy_end");
-char __rel_dyn_start[0] __section(".__rel_dyn_start");
-char __rel_dyn_end[0] __section(".__rel_dyn_end");
 char __secure_start[0] __section(".__secure_start");
 char __secure_end[0] __section(".__secure_end");
 char __secure_stack_start[0] __section(".__secure_stack_start");
diff --git a/arch/arm/mach-zynq/u-boot.lds b/arch/arm/mach-zynq/u-boot.lds
index 11b6e7278a9c..16245fd4ac2f 100644
--- a/arch/arm/mach-zynq/u-boot.lds
+++ b/arch/arm/mach-zynq/u-boot.lds
@@ -71,18 +71,10 @@ SECTIONS
*(.__image_copy_end)
}

-   .rel_dyn_start :
-   {
-   *(.__rel_dyn_start)
-   }
-
-   .rel.dyn : {
+   .rel.dyn ALIGN(8) : {
+   __rel_dyn_start = .;
*(.rel*)
-   }
-
-   .rel_dyn_end :
-   {
-   *(.__rel_dyn_end)
+   __rel_dyn_end = .;
}

.end :
--
2.37.2

[PATCH 3/7 v2] arm: fix __efi_runtime_rel_start/end definitions

[Ilias Apalodimas]

__efi_runtime_rel_start/end are defined as c variables for arm7 only in
order to force the compiler emit relative references. However, defining
those within a section definition will do the same thing since [0].
On top of that the v8 linker scripts define it as a symbol.

So let's remove the special sections from the linker scripts, the
variable definitions from sections.c and define them as a symbols within
the correct section.

[0] binutils commit 6b3b0ab89663 ("Make linker assigned symbol dynamic only for 
shared object")

Suggested-by: Sam Edwards 
Signed-off-by: Ilias Apalodimas 
Reviewed-by: Sam Edwards 
Tested-by: Sam Edwards  # Binary output identical
---
 arch/arm/cpu/armv8/u-boot.lds  |  4 +---
 arch/arm/cpu/u-boot.lds| 16 +++-
 arch/arm/lib/sections.c|  2 --
 arch/arm/mach-zynq/u-boot.lds  | 16 +++-
 include/asm-generic/sections.h |  2 ++
 lib/efi_loader/efi_runtime.c   |  1 +
 6 files changed, 10 insertions(+), 31 deletions(-)

diff --git a/arch/arm/cpu/armv8/u-boot.lds b/arch/arm/cpu/armv8/u-boot.lds
index c4ee10ebc3ff..eccb116d3cfa 100644
--- a/arch/arm/cpu/armv8/u-boot.lds
+++ b/arch/arm/cpu/armv8/u-boot.lds
@@ -115,9 +115,7 @@ SECTIONS
KEEP(*(SORT(__u_boot_list*)));
}

-   . = ALIGN(8);
-
-   .efi_runtime_rel : {
+   .efi_runtime_rel ALIGN(8) : {
 __efi_runtime_rel_start = .;
*(.rel*.efi_runtime)
*(.rel*.efi_runtime.*)
diff --git a/arch/arm/cpu/u-boot.lds b/arch/arm/cpu/u-boot.lds
index 01accb109fad..37f4cd27d79a 100644
--- a/arch/arm/cpu/u-boot.lds
+++ b/arch/arm/cpu/u-boot.lds
@@ -152,21 +152,11 @@ SECTIONS
KEEP(*(SORT(__u_boot_list*)));
}

-   . = ALIGN(4);
-
-   .efi_runtime_rel_start :
-   {
-   *(.__efi_runtime_rel_start)
-   }
-
-   .efi_runtime_rel : {
+   .efi_runtime_rel ALIGN(4) : {
+   __efi_runtime_rel_start = .;
*(.rel*.efi_runtime)
*(.rel*.efi_runtime.*)
-   }
-
-   .efi_runtime_rel_stop :
-   {
-   *(.__efi_runtime_rel_stop)
+   __efi_runtime_rel_stop = .;
}

. = ALIGN(4);
diff --git a/arch/arm/lib/sections.c b/arch/arm/lib/sections.c
index 8e8bd5797e16..ddfde52163fc 100644
--- a/arch/arm/lib/sections.c
+++ b/arch/arm/lib/sections.c
@@ -29,6 +29,4 @@ char __secure_stack_start[0] 
__section(".__secure_stack_start");
 char __secure_stack_end[0] __section(".__secure_stack_end");
 char __efi_runtime_start[0] __section(".__efi_runtime_start");
 char __efi_runtime_stop[0] __section(".__efi_runtime_stop");
-char __efi_runtime_rel_start[0] __section(".__efi_runtime_rel_start");
-char __efi_runtime_rel_stop[0] __section(".__efi_runtime_rel_stop");
 char _end[0] __section(".__end");
diff --git a/arch/arm/mach-zynq/u-boot.lds b/arch/arm/mach-zynq/u-boot.lds
index 25c81b21018b..11b6e7278a9c 100644
--- a/arch/arm/mach-zynq/u-boot.lds
+++ b/arch/arm/mach-zynq/u-boot.lds
@@ -58,21 +58,11 @@ SECTIONS
KEEP(*(SORT(__u_boot_list*)));
}

-   . = ALIGN(4);
-
-   .efi_runtime_rel_start :
-   {
-   *(.__efi_runtime_rel_start)
-   }
-
-   .efi_runtime_rel : {
+   .efi_runtime_rel ALIGN(4) : {
+   __efi_runtime_rel_start = .;
*(.rel*.efi_runtime)
*(.rel*.efi_runtime.*)
-   }
-
-   .efi_runtime_rel_stop :
-   {
-   *(.__efi_runtime_rel_stop)
+   __efi_runtime_rel_stop = .;
}

. = ALIGN(8);
diff --git a/include/asm-generic/sections.h b/include/asm-generic/sections.h
index 1e1657a01673..60949200dd93 100644
--- a/include/asm-generic/sections.h
+++ b/include/asm-generic/sections.h
@@ -34,6 +34,8 @@ extern char __priv_data_start[], __priv_data_end[];
 /* Start and end of .ctors section - used for constructor calls. */
 extern char __ctors_start[], __ctors_end[];

+extern char __efi_runtime_rel_start[], __efi_runtime_rel_stop[];
+
 /* function descriptor handling (if any).  Override
  * in asm/sections.h */
 #ifndef dereference_function_descriptor
diff --git a/lib/efi_loader/efi_runtime.c b/lib/efi_loader/efi_runtime.c
index 18da6892e796..9185f1894c47 100644
--- a/lib/efi_loader/efi_runtime.c
+++ b/lib/efi_loader/efi_runtime.c
@@ -15,6 +15,7 @@
 #include 
 #include 
 #include 
+#include 

 /* For manual relocation support */
 DECLARE_GLOBAL_DATA_PTR;
--
2.37.2

[PATCH 2/7 v2] arm: clean up v7 and v8 linker scripts for bss_start/end

[Ilias Apalodimas]

commit 3ebd1cbc49f0 ("arm: make __bss_start and __bss_end__ compiler-generated")
and
commit f84a7b8f54db ("ARM: Fix __bss_start and __bss_end in linker scripts")
were moving the bss_start/end on c generated variables that were
injected in their own sections. The reason was that we needed relative
relocations for position independent code and linker bugs back then
prevented us from doing so [0].

However, the linker documentation pages states that symbols that are
defined within a section definition will create a relocatable type with
the value being a fixed offset from the base of a section [1].
So let's start cleaning this up starting with the bss_start and bss_end
variables. Convert them into symbols within the .bss section definition.

[0] binutils commit 6b3b0ab89663 ("Make linker assigned symbol dynamic only for 
shared object")
[1] https://sourceware.org/binutils/docs/ld/Expression-Section.html

Signed-off-by: Ilias Apalodimas 
Tested-by: Caleb Connolly  # Qualcomm sdm845
---
 arch/arm/cpu/armv8/u-boot-spl.lds| 14 +++---
 arch/arm/cpu/armv8/u-boot.lds| 15 +++
 arch/arm/cpu/u-boot.lds  | 21 ++---
 arch/arm/lib/sections.c  |  2 --
 arch/arm/mach-rockchip/u-boot-tpl-v8.lds | 14 +++---
 arch/arm/mach-zynq/u-boot.lds| 21 ++---
 6 files changed, 21 insertions(+), 66 deletions(-)

diff --git a/arch/arm/cpu/armv8/u-boot-spl.lds 
b/arch/arm/cpu/armv8/u-boot-spl.lds
index 7cb9d731246d..16fddb46e9cb 100644
--- a/arch/arm/cpu/armv8/u-boot-spl.lds
+++ b/arch/arm/cpu/armv8/u-boot-spl.lds
@@ -63,18 +63,10 @@ SECTIONS

_image_binary_end = .;

-   .bss_start (NOLOAD) : {
-   . = ALIGN(8);
-   KEEP(*(.__bss_start));
-   } >.sdram
-
-   .bss (NOLOAD) : {
+   .bss : {
+   __bss_start = .;
*(.bss*)
-. = ALIGN(8);
-   } >.sdram
-
-   .bss_end (NOLOAD) : {
-   KEEP(*(.__bss_end));
+   __bss_end = .;
} >.sdram

/DISCARD/ : { *(.rela*) }
diff --git a/arch/arm/cpu/armv8/u-boot.lds b/arch/arm/cpu/armv8/u-boot.lds
index fb6a30c922f7..c4ee10ebc3ff 100644
--- a/arch/arm/cpu/armv8/u-boot.lds
+++ b/arch/arm/cpu/armv8/u-boot.lds
@@ -149,19 +149,10 @@ SECTIONS

_end = .;

-   . = ALIGN(8);
-
-   .bss_start : {
-   KEEP(*(.__bss_start));
-   }
-
-   .bss : {
+   .bss ALIGN(8): {
+   __bss_start = .;
*(.bss*)
-. = ALIGN(8);
-   }
-
-   .bss_end : {
-   KEEP(*(.__bss_end));
+   __bss_end = .;
}

/DISCARD/ : { *(.dynsym) }
diff --git a/arch/arm/cpu/u-boot.lds b/arch/arm/cpu/u-boot.lds
index 7724c9332c3b..01accb109fad 100644
--- a/arch/arm/cpu/u-boot.lds
+++ b/arch/arm/cpu/u-boot.lds
@@ -207,23 +207,14 @@ SECTIONS
}

 /*
- * Compiler-generated __bss_start and __bss_end, see arch/arm/lib/bss.c
- * __bss_base and __bss_limit are for linker only (overlay ordering)
+ * These sections occupy the same memory, but their lifetimes do
+ * not overlap: U-Boot initializes .bss only after applying dynamic
+ * relocations and therefore after it doesn't need .rel.dyn any more.
  */
-
-   .bss_start __rel_dyn_start (OVERLAY) : {
-   KEEP(*(.__bss_start));
-   __bss_base = .;
-   }
-
-   .bss __bss_base (OVERLAY) : {
+   .bss ADDR(.rel.dyn) (OVERLAY): {
+   __bss_start = .;
*(.bss*)
-. = ALIGN(4);
-__bss_limit = .;
-   }
-
-   .bss_end __bss_limit (OVERLAY) : {
-   KEEP(*(.__bss_end));
+   __bss_end = .;
}

.dynsym _image_binary_end : { *(.dynsym) }
diff --git a/arch/arm/lib/sections.c b/arch/arm/lib/sections.c
index 857879711c6a..8e8bd5797e16 100644
--- a/arch/arm/lib/sections.c
+++ b/arch/arm/lib/sections.c
@@ -19,8 +19,6 @@
  * aliasing warnings.
  */

-char __bss_start[0] __section(".__bss_start");
-char __bss_end[0] __section(".__bss_end");
 char __image_copy_start[0] __section(".__image_copy_start");
 char __image_copy_end[0] __section(".__image_copy_end");
 char __rel_dyn_start[0] __section(".__rel_dyn_start");
diff --git a/arch/arm/mach-rockchip/u-boot-tpl-v8.lds 
b/arch/arm/mach-rockchip/u-boot-tpl-v8.lds
index 74618eba591b..b7887194026e 100644
--- a/arch/arm/mach-rockchip/u-boot-tpl-v8.lds
+++ b/arch/arm/mach-rockchip/u-boot-tpl-v8.lds
@@ -56,18 +56,10 @@ SECTIONS

_image_binary_end = .;

-   .bss_start (NOLOAD) : {
-   . = ALIGN(8);
-   KEEP(*(.__bss_start));
-   }
-
-   .bss (NOLOAD) : {
+   .bss ALIGN(8) : {
+   __bss_start = .;
*(.bss*)
-. = ALIGN(8);
-   }
-
-   .bss_end (NOLOAD) : {
-   KEEP(*(.__bss_end));
+   __bss_end = .;
}

/DISCARD/ : { *(.dynsym) }

[PATCH 1/7 v2] arm: baltos: remove custom linker script

[Ilias Apalodimas]

commit 3d74a0977f514 ("ti: am335x: Remove unused linker script") removed
the linker script for the TI variant. This linker script doesn't seem to
do anything special and on top of that, has no definitions for the EFI
runtime sections.

So let's get rid of it and use the generic linker script which defines
those correctly

Signed-off-by: Ilias Apalodimas 
Reviewed-by: Tom Rini 
---
 board/vscom/baltos/u-boot.lds | 128 --
 1 file changed, 128 deletions(-)
 delete mode 100644 board/vscom/baltos/u-boot.lds

diff --git a/board/vscom/baltos/u-boot.lds b/board/vscom/baltos/u-boot.lds
deleted file mode 100644
index cb2ee6769753..
--- a/board/vscom/baltos/u-boot.lds
+++ /dev/null
@@ -1,128 +0,0 @@
-/*
- * Copyright (c) 2004-2008 Texas Instruments
- *
- * (C) Copyright 2002
- * Gary Jennejohn, DENX Software Engineering, 
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-ENTRY(_start)
-SECTIONS
-{
-   . = 0x;
-
-   . = ALIGN(4);
-   .text :
-   {
-   *(.__image_copy_start)
-   *(.vectors)
-   CPUDIR/start.o (.text*)
-   board/vscom/baltos/built-in.o (.text*)
-   *(.text*)
-   }
-
-   . = ALIGN(4);
-   .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
-
-   . = ALIGN(4);
-   .data : {
-   *(.data*)
-   }
-
-   . = ALIGN(4);
-
-   . = .;
-
-   . = ALIGN(4);
-   __u_boot_list : {
-   KEEP(*(SORT(__u_boot_list*)));
-   }
-
-   . = ALIGN(4);
-
-   .image_copy_end :
-   {
-   *(.__image_copy_end)
-   }
-
-   .rel_dyn_start :
-   {
-   *(.__rel_dyn_start)
-   }
-
-   .rel.dyn : {
-   *(.rel*)
-   }
-
-   .rel_dyn_end :
-   {
-   *(.__rel_dyn_end)
-   }
-
-   .hash : { *(.hash*) }
-
-   .end :
-   {
-   *(.__end)
-   }
-
-   _image_binary_end = .;
-
-   /*
-* Deprecated: this MMU section is used by pxa at present but
-* should not be used by new boards/CPUs.
-*/
-   . = ALIGN(4096);
-   .mmutable : {
-   *(.mmutable)
-   }
-
-/*
- * Compiler-generated __bss_start and __bss_end, see arch/arm/lib/bss.c
- * __bss_base and __bss_limit are for linker only (overlay ordering)
- */
-
-   .bss_start __rel_dyn_start (OVERLAY) : {
-   KEEP(*(.__bss_start));
-   __bss_base = .;
-   }
-
-   .bss __bss_base (OVERLAY) : {
-   *(.bss*)
-. = ALIGN(4);
-__bss_limit = .;
-   }
-
-   .bss_end __bss_limit (OVERLAY) : {
-   KEEP(*(.__bss_end));
-   }
-
-   .dynsym _image_binary_end : { *(.dynsym) }
-   .dynbss : { *(.dynbss) }
-   .dynstr : { *(.dynstr*) }
-   .dynamic : { *(.dynamic*) }
-   .gnu.hash : { *(.gnu.hash) }
-   .plt : { *(.plt*) }
-   .interp : { *(.interp*) }
-   .gnu : { *(.gnu*) }
-   .ARM.exidx : { *(.ARM.exidx*) }
-}
--
2.37.2

[PATCH 0/7 v2] Clean up arm linker scripts

[Ilias Apalodimas]

The arm linker scripts had a mix of symbols and C defined variables in an
effort to emit relative references instead of absolute ones e.g [0]. A
linker bug prevented us from doing so [1] -- fixed since 2016.
This has led to confusion over the years, ending up with mixed section
definitions. Some sections are defined with overlays and different
definitions between v7 and v8 architectures.
For example __efi_runtime_rel_start/end is defined as a linker symbol for
armv8 and a C variable in armv7.

Linker scripts nowadays can emit relative references, as long as the symbol
definition is contained within the section definition. So let's switch most
of the C defined variables and clean up the arm sections.c file.
There's still a few symbols remaining -- __secure_start/end,
__secure_stack_start/end and __end which can be cleaned up
in a followup series.



For both QEMU v7/v8 bloat-o-meter shows now size difference
$~ ./scripts/bloat-o-meter u-boot u-boot.new
add/remove: 0/0 grow/shrink: 0/0 up/down: 0/0 (0)
Function old new   delta
Total: Before=798861, After=798861, chg +0.00%

The symbols seem largely unchanged apart from a difference in .bss
as well as the emited sections and object types of the affected variables.

On the output below the first value is from -next and the second comes from
-next + this patchset. The .bss_start/end sections have disappeared from the
newer binaries.

# For example on QEMU v8:
efi_runtime_start
  7945: 0178 0 OBJECT  GLOBAL DEFAULT2 __efi_runtime_start
  7942: 0178 0 NOTYPE  GLOBAL DEFAULT2 __efi_runtime_start
efi_runtime_stop
  9050: 0d38 0 OBJECT  GLOBAL DEFAULT2 __efi_runtime_stop
  9047: 0d38 0 NOTYPE  GLOBAL DEFAULT2 __efi_runtime_stop
__efi_runtime_rel_start
  7172: 000dc2f0 0 OBJECT  GLOBAL DEFAULT   10 
__efi_runtime_rel_start
  7169: 000dc2f0 0 NOTYPE  GLOBAL DEFAULT   10 
__efi_runtime_rel_start
__efi_runtime_rel_stop
  7954: 000dc4a0 0 OBJECT  GLOBAL DEFAULT   10 
__efi_runtime_rel_stop
  7951: 000dc4a0 0 NOTYPE  GLOBAL DEFAULT   10 
__efi_runtime_rel_stop
__rel_dyn_start
  7030: 000dc4a0 0 OBJECT  GLOBAL DEFAULT   11 __rel_dyn_start
  7027: 000dc4a0 0 NOTYPE  GLOBAL DEFAULT   11 __rel_dyn_start
__rel_dyn_end
  8959: 00102b10 0 OBJECT  GLOBAL DEFAULT   12 __rel_dyn_end
  8956: 00102b10 0 NOTYPE  GLOBAL DEFAULT   11 __rel_dyn_end
image_copy_start
  9051:  0 OBJECT  GLOBAL DEFAULT1 __image_copy_start
  9048:  0 NOTYPE  GLOBAL DEFAULT1 __image_copy_start
image_copy_end
  7467: 000dc4a0 0 OBJECT  GLOBAL DEFAULT   11 __image_copy_end
  7464: 000dc4a0 0 NOTYPE  GLOBAL DEFAULT   10 __image_copy_end
bss_start
12: 00102b10 0 SECTION LOCAL  DEFAULT   12 .bss_start
  8087: 0018 0 NOTYPE  GLOBAL DEFAULT1 _bss_start_ofs
  8375: 00102b10 0 OBJECT  GLOBAL DEFAULT   12 __bss_start
  8084: 0018 0 NOTYPE  GLOBAL DEFAULT1 _bss_start_ofs
  8372: 00102b80 0 NOTYPE  GLOBAL DEFAULT   12 __bss_start
bss_end
14: 0010bc30 0 SECTION LOCAL  DEFAULT   14 .bss_end
  7683: 0010bc30 0 OBJECT  GLOBAL DEFAULT   14 __bss_end
  8479: 0020 0 NOTYPE  GLOBAL DEFAULT1 _bss_end_ofs
  7680: 0010bc30 0 NOTYPE  GLOBAL DEFAULT   12 __bss_end
  8476: 0020 0 NOTYPE  GLOBAL DEFAULT1 _bss_end_ofs

# For QEMU v7:
efi_runtime_start
 10703: 03bc 0 OBJECT  GLOBAL DEFAULT2 __efi_runtime_start
 10699: 03c0 0 NOTYPE  GLOBAL DEFAULT2 __efi_runtime_start
efi_runtime_stop
 11796: 12ec 0 OBJECT  GLOBAL DEFAULT2 __efi_runtime_stop
 11792: 12ec 0 NOTYPE  GLOBAL DEFAULT2 __efi_runtime_stop
__efi_runtime_rel_start
  9937: 000c40dc 0 OBJECT  GLOBAL DEFAULT8 __efi_runtime_rel_start
  9935: 000c40dc 0 NOTYPE  GLOBAL DEFAULT9 __efi_runtime_rel_start
__efi_runtime_rel_stop
 10712: 000c41dc 0 OBJECT  GLOBAL DEFAULT   10 __efi_runtime_rel_stop
 10708: 000c41dc 0 NOTYPE  GLOBAL DEFAULT9 __efi_runtime_rel_stop
__rel_dyn_start
  9791: 000c41dc 0 OBJECT  GLOBAL DEFAULT   10 __rel_dyn_start
  9789: 000c41dc 0 NOTYPE  GLOBAL DEFAULT   10 __rel_dyn_start
__rel_dyn_end
 11708: 000da5f4 0 OBJECT  GLOBAL DEFAULT   10 __rel_dyn_end
 11704: 000da5f4 0 NOTYPE  GLOBAL DEFAULT   10 __rel_dyn_end
image_copy_start
   448: 177c 0 NOTYPE  LOCAL  DEFAULT3 _image_copy_start_ofs
 11797:  0 OBJECT  GLOBAL DEFAULT1 __image_copy_start
   445: 177c 0 NOTYPE  LOCAL  DEFAULT3 _image_copy_start_ofs
 11793:  0 NOTYPE  GLOBAL DEFAULT1 __image_copy_start
image_copy_end
   450: 1780 0 NOTYPE  LOCAL  DEFAULT3 _image_copy_end_ofs
 10225: 000c41dc 0 OBJECT  GLOBAL DEFAULT 

RE: [PATCH v3 0/2] Fix Android A/B backup

[McAllister, Colin]

Hi Mattijs,

I’ve been using git send-email, but there might be issues with what the Garmin 
smtp server is doing to the email, like adding the footer. I sent a v4 PS in a 
new thread using my personal email, but that email isn’t subscribed to this ML 
so I think the patches are pending approval to be added to the ML.

Best,
Colin

From: Mattijs Korpershoek 
Sent: Tuesday, March 12, 2024 4:47 AM
To: Sam Protsenko ; McAllister, Colin 

Cc: u-boot@lists.denx.de; jpewhac...@gmail.com; s...@chromium.org; Igor Opaniuk 

Subject: Re: [PATCH v3 0/2] Fix Android A/B backup

Hi Colin, On ven. , mars 08, 2024 at 15: 59, Sam Protsenko  wrote: > On Fri, Mar 8, 2024 at 1: 24 PM McAllister, Colin > 
 wrote: >> >> > Ah, ok, I see you


Hi Colin,



On ven., mars 08, 2024 at 15:59, Sam Protsenko 
mailto:semen.protse...@linaro.org>> wrote:



> On Fri, Mar 8, 2024 at 1:24 PM McAllister, Colin

> mailto:colin.mcallis...@garmin.com>> wrote:

>>

>> > Ah, ok, I see you replied to my comment here.

>>

>> Yes, sorry. Outlook is terrible to send inline responses too. I figured

>> just adding responses in the patch contents would be better. Next time I'll 
>> submit

>> my patch with a different email :)

>>

>> > So when that config option is not defined at all, the build still

>> > works, right?

>>

>> Yes, the default value for CONFIG_ANDROID_AB_BACKUP_OFFSET is 0x0, which

>> would evaluate to a false bool value in the if conditions. I did do some

>> testing with the config value not defined for my board and confirmed

>> back-up data is not used.

>>

>

> Looks good to me, thanks.

>

>> In your other emails you include your reviewed-by tag. For clarity, Am I

>> supposed to append my patches and upload a new version? This is my

>> first time contributing to u-boot, so I'm still learning the workflow. I

>> didn't see anything glancing through the "Sending patches" page in the

>> U-Boot documentation.

>>

>

> Welcome to the community! And thanks for your patches :) U-Boot

> workflow is quite similar to Linux kernel one. It's useful to collect

> all tags when sending out your next version. When the maintainer takes

> your patch, they usually also apply all R-b tags for the final patch

> version, so you only have to worry about that when sending out a new

> version. I know that U-Boot contributors are often using `patman' tool

> [1] for submitting patches (and corresponding updated versions), and

> I'm pretty sure it collects all pending tags automatically for you.

> FWIW, I'm not experienced with `patman', as I'm trying to use somehow

> unified submitting process for both U-Boot and Linux kernel, and I

> know that using `patman' is sometimes discouraged in Linux kernel

> community.



Welcome to the U-Boot community! It takes quite some time to start

contributing so thank you for the patches.



The changes look fine and the detailed approach on how you tested is

very much appreciated.



I have a couple of suggestions on the whole series.



1. The patches don't apply:



$ b4 shazam -s -l 
20240308165937.270499-1-colin.mcallis...@garmin.com



error: patch failed: boot/android_ab.c:187

error: boot/android_ab.c: patch does not apply

error: Did you hand edit your patch?

It does not apply to blobs recorded in its index.

Patch failed at 0002 android_ab: Fix ANDROID_AB_BACKUP_OFFSET

hint: Use 'git am --show-current-patch=diff' to see the failed patch

When you have resolved this problem, run "git am --continue".

If you prefer to skip this patch, run "git am --skip" instead.

To restore the original branch and stop patching, run "git am --abort".



I suspect your email provider swapped tabs to spaces. It's also possible

that the Garmin confidentiality footer caused this.



2. Using the khadas-vim3_android_ab_defconfig, this does not build:



boot/android_ab.c: In function 'ab_select_slot':

boot/android_ab.c:350:48: error: 'ANDROID_AB_BACKUP_OFFSET' undeclared (first 
use in this function); did you mean 'CONFIG_ANDROID_AB_BACKUP_OFFSET'?

  350 |
ANDROID_AB_BACKUP_OFFSET);

  |^~~~

  |
CONFIG_ANDROID_AB_BACKUP_OFFSET



Both are minor problems.

I re-applied the diffs manually to be able to build/boot test this.



Since this is your first contribution, I can either:

- fix both myself and merge this.

- let you spin a v4 to fix the above.



Please let me know what you prefer.



If you do intend to send a v4, please:

- Do it in a new email thread

- Make sure you cc me, Igor and Sam

- Make sure the patches you send can be applied.

  

[PATCH v4 1/1] arch: arm: Agilex5 enablement

[Jit Loon Lim]

This patch is to enable Agilex5 platform for Intel
product. Changes, modification and new files are
created for board, dts, configs and makefile to
create the base for Agilex5.

Signed-off-by: Jit Loon Lim 

---
Changes v3 -> v4:
- Update defined to is_enabled
Changes v2 -> v3:
- Added FPGA 240G DDR region
Changes v1 -> v2:
- fixed git auto merge issue
---
 arch/arm/Kconfig  |   4 +-
 arch/arm/dts/Makefile |   1 +
 arch/arm/dts/socfpga_agilex5-u-boot.dtsi  |  71 ++
 arch/arm/dts/socfpga_agilex5.dtsi | 575 ++
 .../arm/dts/socfpga_agilex5_socdk-u-boot.dtsi | 133 
 arch/arm/dts/socfpga_agilex5_socdk.dts| 163 
 arch/arm/dts/socfpga_soc64_fit-u-boot.dtsi|  38 +-
 arch/arm/mach-socfpga/Kconfig |  19 +-
 arch/arm/mach-socfpga/Makefile|  14 +-
 arch/arm/mach-socfpga/board.c |  56 +-
 arch/arm/mach-socfpga/clock_manager_agilex5.c |  89 +++
 .../include/mach/base_addr_soc64.h|  38 +-
 .../mach-socfpga/include/mach/clock_manager.h |   4 +-
 .../include/mach/clock_manager_agilex5.h  |  12 +
 .../mach-socfpga/include/mach/handoff_soc64.h |  31 +-
 .../mach-socfpga/include/mach/mailbox_s10.h   |   1 +
 arch/arm/mach-socfpga/mmu-arm64_s10.c |  59 +-
 board/intel/agilex5-socdk/MAINTAINERS |   8 +
 configs/socfpga_agilex5_defconfig | 116 +++
 drivers/clk/altera/Makefile   |   1 +
 drivers/clk/altera/clk-agilex5.c  | 743 ++
 drivers/clk/altera/clk-agilex5.h  | 284 +++
 include/configs/socfpga_agilex5_socdk.h   |  12 +
 include/configs/socfpga_soc64_common.h| 143 +++-
 include/dt-bindings/clock/agilex5-clock.h |  71 ++
 include/dt-bindings/reset/altr,rst-mgr-agx5.h |  80 ++
 26 files changed, 2730 insertions(+), 36 deletions(-)
 create mode 100644 arch/arm/dts/socfpga_agilex5-u-boot.dtsi
 create mode 100644 arch/arm/dts/socfpga_agilex5.dtsi
 create mode 100644 arch/arm/dts/socfpga_agilex5_socdk-u-boot.dtsi
 create mode 100644 arch/arm/dts/socfpga_agilex5_socdk.dts
 create mode 100644 arch/arm/mach-socfpga/clock_manager_agilex5.c
 create mode 100644 arch/arm/mach-socfpga/include/mach/clock_manager_agilex5.h
 create mode 100644 board/intel/agilex5-socdk/MAINTAINERS
 create mode 100644 configs/socfpga_agilex5_defconfig
 create mode 100644 drivers/clk/altera/clk-agilex5.c
 create mode 100644 drivers/clk/altera/clk-agilex5.h
 create mode 100644 include/configs/socfpga_agilex5_socdk.h
 create mode 100644 include/dt-bindings/clock/agilex5-clock.h
 create mode 100644 include/dt-bindings/reset/altr,rst-mgr-agx5.h

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index fde85dc0d5..6df805f44c 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -28,6 +28,7 @@ config COUNTER_FREQUENCY
ROCKCHIP_RK3288 || ROCKCHIP_RK322X || ROCKCHIP_RK3036
default 2500 if ARCH_LX2160A || ARCH_LX2162A || ARCH_LS1088A
default 1 if ARCH_ZYNQMP
+   default 2 if ARCH_SOCFPGA && ARM64 && TARGET_SOCFPGA_AGILEX5
default 0
help
  For platforms with ARMv8-A and ARMv7-A which features a system
@@ -1124,7 +1125,8 @@ config ARCH_SOCFPGA
select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
select SYSRESET
select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
-   select SYSRESET_SOCFPGA_SOC64 if TARGET_SOCFPGA_SOC64
+   select SYSRESET_SOCFPGA_SOC64 if !TARGET_SOCFPGA_AGILEX5 && \
+ TARGET_SOCFPGA_SOC64
imply CMD_DM
imply CMD_MTDPARTS
imply CRC32_VERIFY
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index d9725030d5..2b4f896ad2 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -548,6 +548,7 @@ dtb-$(CONFIG_TARGET_THUNDERX_88XX) += thunderx-88xx.dtb
 
 dtb-$(CONFIG_ARCH_SOCFPGA) +=  \
socfpga_agilex_socdk.dtb\
+   socfpga_agilex5_socdk.dtb   \
socfpga_arria5_secu1.dtb\
socfpga_arria5_socdk.dtb\
socfpga_arria10_chameleonv3_270_2.dtb   \
diff --git a/arch/arm/dts/socfpga_agilex5-u-boot.dtsi 
b/arch/arm/dts/socfpga_agilex5-u-boot.dtsi
new file mode 100644
index 00..a8167e5c14
--- /dev/null
+++ b/arch/arm/dts/socfpga_agilex5-u-boot.dtsi
@@ -0,0 +1,71 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * U-Boot additions
+ *
+ * Copyright (C) 2024 Intel Corporation 
+ */
+
+#include "socfpga_soc64_fit-u-boot.dtsi"
+
+/{
+   memory {
+   #address-cells = <2>;
+   #size-cells = <2>;
+   bootph-all;
+   };
+};
+
+ {
+   bootph-all;
+};
+
+ {
+   reset-names = "i2c";
+};
+
+ {
+   reset-names = "i2c";
+};
+
+ {
+   reset-names = "i2c";
+};
+
+ {
+   reset-names = "i2c";
+};
+

[PATCH v4 0/1] Agilex5 enablement

[Jit Loon Lim]

V1: 
https://patchwork.ozlabs.org/project/uboot/patch/20240220143603.22091-1-jit.loon@intel.com/
V2: Fixed Git auto-merge causing misalignment of code and insert/delete
V3: Added 240G FPGA DDR region
V4: Update defined to is_enabled

Jit Loon Lim (1):
  arch: arm: Agilex5 enablement

 arch/arm/Kconfig  |   4 +-
 arch/arm/dts/Makefile |   1 +
 arch/arm/dts/socfpga_agilex5-u-boot.dtsi  |  71 ++
 arch/arm/dts/socfpga_agilex5.dtsi | 575 ++
 .../arm/dts/socfpga_agilex5_socdk-u-boot.dtsi | 133 
 arch/arm/dts/socfpga_agilex5_socdk.dts| 163 
 arch/arm/dts/socfpga_soc64_fit-u-boot.dtsi|  38 +-
 arch/arm/mach-socfpga/Kconfig |  19 +-
 arch/arm/mach-socfpga/Makefile|  14 +-
 arch/arm/mach-socfpga/board.c |  56 +-
 arch/arm/mach-socfpga/clock_manager_agilex5.c |  89 +++
 .../include/mach/base_addr_soc64.h|  38 +-
 .../mach-socfpga/include/mach/clock_manager.h |   4 +-
 .../include/mach/clock_manager_agilex5.h  |  12 +
 .../mach-socfpga/include/mach/handoff_soc64.h |  31 +-
 .../mach-socfpga/include/mach/mailbox_s10.h   |   1 +
 arch/arm/mach-socfpga/mmu-arm64_s10.c |  59 +-
 board/intel/agilex5-socdk/MAINTAINERS |   8 +
 configs/socfpga_agilex5_defconfig | 116 +++
 drivers/clk/altera/Makefile   |   1 +
 drivers/clk/altera/clk-agilex5.c  | 743 ++
 drivers/clk/altera/clk-agilex5.h  | 284 +++
 include/configs/socfpga_agilex5_socdk.h   |  12 +
 include/configs/socfpga_soc64_common.h| 143 +++-
 include/dt-bindings/clock/agilex5-clock.h |  71 ++
 include/dt-bindings/reset/altr,rst-mgr-agx5.h |  80 ++
 26 files changed, 2730 insertions(+), 36 deletions(-)
 create mode 100644 arch/arm/dts/socfpga_agilex5-u-boot.dtsi
 create mode 100644 arch/arm/dts/socfpga_agilex5.dtsi
 create mode 100644 arch/arm/dts/socfpga_agilex5_socdk-u-boot.dtsi
 create mode 100644 arch/arm/dts/socfpga_agilex5_socdk.dts
 create mode 100644 arch/arm/mach-socfpga/clock_manager_agilex5.c
 create mode 100644 arch/arm/mach-socfpga/include/mach/clock_manager_agilex5.h
 create mode 100644 board/intel/agilex5-socdk/MAINTAINERS
 create mode 100644 configs/socfpga_agilex5_defconfig
 create mode 100644 drivers/clk/altera/clk-agilex5.c
 create mode 100644 drivers/clk/altera/clk-agilex5.h
 create mode 100644 include/configs/socfpga_agilex5_socdk.h
 create mode 100644 include/dt-bindings/clock/agilex5-clock.h
 create mode 100644 include/dt-bindings/reset/altr,rst-mgr-agx5.h

-- 
2.26.2

Re: [PATCH 2/3] riscv: dts: sophgo: Add ethernet node

[Conor Dooley]

On Tue, Mar 12, 2024 at 05:59:44PM +0800, Leo Liang wrote:
> On Sun, Mar 10, 2024 at 01:56:45PM +0800, Kongyang Liu wrote:
> > Add ethernet node for cv1800b SoC
> > 
> > Signed-off-by: Kongyang Liu 
> > ---
> > 
> >  arch/riscv/dts/cv18xx.dtsi | 6 ++
> >  1 file changed, 6 insertions(+)
> 
> Hi KongYang,
> 
> Will there be a patch adding this ethernet node for kernel as well ?

It's highly like that the compatible of "cv1800b-ethernet" will be
requested to be changed to "cv1800b-dwmac" to match the designware IP
used in other SoCs.

The added node also looks suspiciously missing any clocks or interrupts.


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Description: PGP signature

Re: [PATCH 11/11] net: dwc_eth_qos: Add support of STM32MP13xx platform

[Patrice CHOTARD]

On 3/9/24 03:11, Marek Vasut wrote:
> From: Christophe Roullier 
> 
> Add compatible "st,stm32mp13-dwmac" to manage STM32MP13 boards.
> 
> Signed-off-by: Christophe Roullier 
> Signed-off-by: Marek Vasut  # Rebase, reshuffle, squash code
> ---
> Cc: Christophe Roullier 
> Cc: Joe Hershberger 
> Cc: Patrice Chotard 
> Cc: Patrick Delaunay 
> Cc: Ramon Fried 
> Cc: u-b...@dh-electronics.com
> Cc: uboot-st...@st-md-mailman.stormreply.com
> ---
>  drivers/net/dwc_eth_qos.c   |  4 
>  drivers/net/dwc_eth_qos.h   |  1 +
>  drivers/net/dwc_eth_qos_stm32.c | 11 +++
>  3 files changed, 16 insertions(+)
> 
> diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
> index 203bfc0848c..e02317905e5 100644
> --- a/drivers/net/dwc_eth_qos.c
> +++ b/drivers/net/dwc_eth_qos.c
> @@ -1505,6 +1505,10 @@ static const struct udevice_id eqos_ids[] = {
>   },
>  #endif
>  #if IS_ENABLED(CONFIG_DWC_ETH_QOS_STM32)
> + {
> + .compatible = "st,stm32mp13-dwmac",
> + .data = (ulong)_stm32mp13_config
> + },
>   {
>   .compatible = "st,stm32mp1-dwmac",
>   .data = (ulong)_stm32mp15_config
> diff --git a/drivers/net/dwc_eth_qos.h b/drivers/net/dwc_eth_qos.h
> index bafd0d339fb..8b3d0d464d3 100644
> --- a/drivers/net/dwc_eth_qos.h
> +++ b/drivers/net/dwc_eth_qos.h
> @@ -290,5 +290,6 @@ int eqos_null_ops(struct udevice *dev);
>  extern struct eqos_config eqos_imx_config;
>  extern struct eqos_config eqos_rockchip_config;
>  extern struct eqos_config eqos_qcom_config;
> +extern struct eqos_config eqos_stm32mp13_config;
>  extern struct eqos_config eqos_stm32mp15_config;
>  extern struct eqos_config eqos_jh7110_config;
> diff --git a/drivers/net/dwc_eth_qos_stm32.c b/drivers/net/dwc_eth_qos_stm32.c
> index 00bf6d45568..e167a7ba901 100644
> --- a/drivers/net/dwc_eth_qos_stm32.c
> +++ b/drivers/net/dwc_eth_qos_stm32.c
> @@ -314,6 +314,17 @@ static struct eqos_ops eqos_stm32_ops = {
>   .eqos_get_tick_clk_rate = eqos_get_tick_clk_rate_stm32
>  };
>  
> +struct eqos_config __maybe_unused eqos_stm32mp13_config = {
> + .reg_access_always_ok = false,
> + .mdio_wait = 1,
> + .swr_wait = 50,
> + .config_mac = EQOS_MAC_RXQ_CTRL0_RXQ0EN_ENABLED_DCB,
> + .config_mac_mdio = EQOS_MAC_MDIO_ADDRESS_CR_250_300,
> + .axi_bus_width = EQOS_AXI_WIDTH_32,
> + .interface = dev_read_phy_mode,
> + .ops = _stm32_ops
> +};
> +
>  struct eqos_config __maybe_unused eqos_stm32mp15_config = {
>   .reg_access_always_ok = false,
>   .mdio_wait = 1,
Reviewed-by: Patrice Chotard 

Thanks
Patrice

Re: [PATCH 10/11] net: dwc_eth_qos: Add DT parsing for STM32MP13xx platform

[Patrice CHOTARD]

On 3/9/24 03:11, Marek Vasut wrote:
> From: Christophe Roullier 
> 
> Manage 2 ethernet instances, select which instance to configure with mask
> If mask is not present in DT, it is stm32mp15 platform.
> 
> Signed-off-by: Christophe Roullier 
> Signed-off-by: Marek Vasut  # Rework the code
> ---
> Cc: Christophe Roullier 
> Cc: Joe Hershberger 
> Cc: Patrice Chotard 
> Cc: Patrick Delaunay 
> Cc: Ramon Fried 
> Cc: u-b...@dh-electronics.com
> Cc: uboot-st...@st-md-mailman.stormreply.com
> ---
>  drivers/net/dwc_eth_qos_stm32.c | 82 ++---
>  1 file changed, 66 insertions(+), 16 deletions(-)
> 
> diff --git a/drivers/net/dwc_eth_qos_stm32.c b/drivers/net/dwc_eth_qos_stm32.c
> index 4db18130765..00bf6d45568 100644
> --- a/drivers/net/dwc_eth_qos_stm32.c
> +++ b/drivers/net/dwc_eth_qos_stm32.c
> @@ -23,6 +23,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
>  #include 
>  #include 
> @@ -33,11 +34,16 @@
>  
>  /* SYSCFG registers */
>  #define SYSCFG_PMCSETR   0x04
> -#define SYSCFG_PMCCLRR   0x44
> +#define SYSCFG_PMCCLRR_MP13  0x08
> +#define SYSCFG_PMCCLRR_MP15  0x44
> +
> +#define SYSCFG_PMCSETR_ETH1_MASK GENMASK(23, 16)
> +#define SYSCFG_PMCSETR_ETH2_MASK GENMASK(31, 24)
>  
>  #define SYSCFG_PMCSETR_ETH_CLK_SEL   BIT(16)
>  #define SYSCFG_PMCSETR_ETH_REF_CLK_SEL   BIT(17)
>  
> +/* STM32MP15xx specific bit */
>  #define SYSCFG_PMCSETR_ETH_SELMIIBIT(20)
>  
>  #define SYSCFG_PMCSETR_ETH_SEL_MASK  GENMASK(23, 21)
> @@ -45,6 +51,11 @@
>  #define SYSCFG_PMCSETR_ETH_SEL_RGMII 0x1
>  #define SYSCFG_PMCSETR_ETH_SEL_RMII  0x4
>  
> +/* CLOCK feed to PHY */
> +#define ETH_CK_F_25M 2500
> +#define ETH_CK_F_50M 5000
> +#define ETH_CK_F_125M12500
> +
>  static ulong eqos_get_tick_clk_rate_stm32(struct udevice *dev)
>  {
>   struct eqos_priv __maybe_unused *eqos = dev_get_priv(dev);
> @@ -130,34 +141,65 @@ static int eqos_probe_syscfg_stm32(struct udevice *dev,
>  {
>   /* Ethernet 50MHz RMII clock selection */
>   const bool eth_ref_clk_sel = dev_read_bool(dev, "st,eth-ref-clk-sel");
> + /* SoC is STM32MP13xx with two ethernet MACs */
> + const bool is_mp13 = device_is_compatible(dev, "st,stm32mp13-dwmac");
>   /* Gigabit Ethernet 125MHz clock selection. */
>   const bool eth_clk_sel = dev_read_bool(dev, "st,eth-clk-sel");
> - u8 *syscfg;
> + /* Ethernet PHY have no crystal */
> + const bool ext_phyclk = dev_read_bool(dev, "st,ext-phyclk");
> + struct eqos_priv *eqos = dev_get_priv(dev);
> + struct regmap *regmap;
> + u32 regmap_mask;
> + ulong rate = 0;
>   u32 value;
>  
> - syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
> - if (!syscfg)
> - return -ENODEV;
> + regmap = syscon_regmap_lookup_by_phandle(dev, "st,syscon");
> + if (IS_ERR(regmap))
> + return PTR_ERR(regmap);
> +
> + regmap_mask = dev_read_u32_index_default(dev, "st,syscon", 2,
> +  SYSCFG_PMCSETR_ETH1_MASK);
> +
> + if (clk_valid(>clk_ck))
> + rate = clk_get_rate(>clk_ck);
>  
>   switch (interface_type) {
>   case PHY_INTERFACE_MODE_MII:
>   dev_dbg(dev, "PHY_INTERFACE_MODE_MII\n");
>   value = FIELD_PREP(SYSCFG_PMCSETR_ETH_SEL_MASK,
>  SYSCFG_PMCSETR_ETH_SEL_GMII_MII);
> - value |= SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
> + /*
> +  * STM32MP15xx supports both MII and GMII, STM32MP13xx MII only.
> +  * SYSCFG_PMCSETR ETH_SELMII is present only on STM32MP15xx and
> +  * acts as a selector between 0:GMII and 1:MII. As STM32MP13xx
> +  * supports only MII, ETH_SELMII is not present.
> +  */
> + if (!is_mp13)   /* Select MII mode on STM32MP15xx */
> + value |= SYSCFG_PMCSETR_ETH_SELMII;
>   break;
> - case PHY_INTERFACE_MODE_GMII:
> + case PHY_INTERFACE_MODE_GMII:   /* STM32MP15xx only */
>   dev_dbg(dev, "PHY_INTERFACE_MODE_GMII\n");
>   value = FIELD_PREP(SYSCFG_PMCSETR_ETH_SEL_MASK,
>  SYSCFG_PMCSETR_ETH_SEL_GMII_MII);
> - if (eth_clk_sel)
> + /*
> +  * If eth_clk_sel is set, use internal ETH_CLKx clock from RCC,
> +  * otherwise use external clock from IO pin (requires matching
> +  * GPIO block AF setting of that pin).
> +  */
> + if (rate == ETH_CK_F_25M && (eth_clk_sel || ext_phyclk))
>   value |= SYSCFG_PMCSETR_ETH_CLK_SEL;
>   break;
>   case PHY_INTERFACE_MODE_RMII:
>   dev_dbg(dev, "PHY_INTERFACE_MODE_RMII\n");
>   value = FIELD_PREP(SYSCFG_PMCSETR_ETH_SEL_MASK,
>  SYSCFG_PMCSETR_ETH_SEL_RMII);
> - if 

Re: [PATCH 09/11] net: dwc_eth_qos: Request clk-ck earlier in probe on STM32

[Patrice CHOTARD]

On 3/9/24 03:11, Marek Vasut wrote:
> From: Patrick Delaunay 
> 
> Request the clk-ck earlier in probe in preparation for obtaining
> the clock rate from these clk-ck in eqos_probe_syscfg_stm32() in
> the follow up patch.
> 
> Signed-off-by: Patrick Delaunay 
> ---
> Cc: Christophe Roullier 
> Cc: Joe Hershberger 
> Cc: Patrice Chotard 
> Cc: Patrick Delaunay 
> Cc: Ramon Fried 
> Cc: u-b...@dh-electronics.com
> Cc: uboot-st...@st-md-mailman.stormreply.com
> ---
>  drivers/net/dwc_eth_qos_stm32.c | 10 +-
>  1 file changed, 5 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/net/dwc_eth_qos_stm32.c b/drivers/net/dwc_eth_qos_stm32.c
> index 33477925ff1..4db18130765 100644
> --- a/drivers/net/dwc_eth_qos_stm32.c
> +++ b/drivers/net/dwc_eth_qos_stm32.c
> @@ -201,6 +201,11 @@ static int eqos_probe_resources_stm32(struct udevice 
> *dev)
>   return -EINVAL;
>   }
>  
> + /* Get ETH_CLK clocks (optional) */
> + ret = clk_get_by_name(dev, "eth-ck", >clk_ck);
> + if (ret)
> + dev_dbg(dev, "No phy clock provided %d", ret);
> +
>   ret = eqos_probe_syscfg_stm32(dev, interface);
>   if (ret)
>   return -EINVAL;
> @@ -223,11 +228,6 @@ static int eqos_probe_resources_stm32(struct udevice 
> *dev)
>   goto err_probe;
>   }
>  
> - /*  Get ETH_CLK clocks (optional) */
> - ret = clk_get_by_name(dev, "eth-ck", >clk_ck);
> - if (ret)
> - dev_warn(dev, "No phy clock provided %d\n", ret);
> -
>   dev_dbg(dev, "%s: OK\n", __func__);
>  
>   return 0;
Reviewed-by: Patrice Chotard 

Thanks
Patrice

Re: [PATCH 08/11] net: dwc_eth_qos: Constify st,eth-* values parsed out of DT

[Patrice CHOTARD]

On 3/9/24 03:11, Marek Vasut wrote:
> Use const bool for the values parsed out of DT. Drop the duplicate
> assignment of false into those bool variables, assign them directly
> with the content parsed out of DT. Abbreviate the variable name too.
> 
> Signed-off-by: Marek Vasut 
> ---
> Cc: Christophe Roullier 
> Cc: Joe Hershberger 
> Cc: Patrice Chotard 
> Cc: Patrick Delaunay 
> Cc: Ramon Fried 
> Cc: u-b...@dh-electronics.com
> Cc: uboot-st...@st-md-mailman.stormreply.com
> ---
>  drivers/net/dwc_eth_qos_stm32.c | 18 +++---
>  1 file changed, 7 insertions(+), 11 deletions(-)
> 
> diff --git a/drivers/net/dwc_eth_qos_stm32.c b/drivers/net/dwc_eth_qos_stm32.c
> index 72f65f80540..33477925ff1 100644
> --- a/drivers/net/dwc_eth_qos_stm32.c
> +++ b/drivers/net/dwc_eth_qos_stm32.c
> @@ -128,17 +128,13 @@ static int eqos_stop_clks_stm32(struct udevice *dev)
>  static int eqos_probe_syscfg_stm32(struct udevice *dev,
>  phy_interface_t interface_type)
>  {
> - bool eth_ref_clk_sel_reg = false;
> - bool eth_clk_sel_reg = false;
> + /* Ethernet 50MHz RMII clock selection */
> + const bool eth_ref_clk_sel = dev_read_bool(dev, "st,eth-ref-clk-sel");
> + /* Gigabit Ethernet 125MHz clock selection. */
> + const bool eth_clk_sel = dev_read_bool(dev, "st,eth-clk-sel");
>   u8 *syscfg;
>   u32 value;
>  
> - /* Gigabit Ethernet 125MHz clock selection. */
> - eth_clk_sel_reg = dev_read_bool(dev, "st,eth-clk-sel");
> -
> - /* Ethernet 50Mhz RMII clock selection */
> - eth_ref_clk_sel_reg = dev_read_bool(dev, "st,eth-ref-clk-sel");
> -
>   syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
>   if (!syscfg)
>   return -ENODEV;
> @@ -154,14 +150,14 @@ static int eqos_probe_syscfg_stm32(struct udevice *dev,
>   dev_dbg(dev, "PHY_INTERFACE_MODE_GMII\n");
>   value = FIELD_PREP(SYSCFG_PMCSETR_ETH_SEL_MASK,
>  SYSCFG_PMCSETR_ETH_SEL_GMII_MII);
> - if (eth_clk_sel_reg)
> + if (eth_clk_sel)
>   value |= SYSCFG_PMCSETR_ETH_CLK_SEL;
>   break;
>   case PHY_INTERFACE_MODE_RMII:
>   dev_dbg(dev, "PHY_INTERFACE_MODE_RMII\n");
>   value = FIELD_PREP(SYSCFG_PMCSETR_ETH_SEL_MASK,
>  SYSCFG_PMCSETR_ETH_SEL_RMII);
> - if (eth_ref_clk_sel_reg)
> + if (eth_ref_clk_sel)
>   value |= SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
>   break;
>   case PHY_INTERFACE_MODE_RGMII:
> @@ -171,7 +167,7 @@ static int eqos_probe_syscfg_stm32(struct udevice *dev,
>   dev_dbg(dev, "PHY_INTERFACE_MODE_RGMII\n");
>   value = FIELD_PREP(SYSCFG_PMCSETR_ETH_SEL_MASK,
>  SYSCFG_PMCSETR_ETH_SEL_RGMII);
> - if (eth_clk_sel_reg)
> + if (eth_clk_sel)
>   value |= SYSCFG_PMCSETR_ETH_CLK_SEL;
>   break;
>   default:
Reviewed-by: Patrice Chotard 

Thanks
Patrice

Re: [PATCH 07/11] net: dwc_eth_qos: Use consistent logging prints

[Patrice CHOTARD]

On 3/9/24 03:11, Marek Vasut wrote:
> Use dev_*() only to print all the logs from this glue code,
> instead of mixing dev_*(), log_*(), pr_*() all in one code.
> 
> Signed-off-by: Marek Vasut 
> ---
> Cc: Christophe Roullier 
> Cc: Joe Hershberger 
> Cc: Patrice Chotard 
> Cc: Patrick Delaunay 
> Cc: Ramon Fried 
> Cc: u-b...@dh-electronics.com
> Cc: uboot-st...@st-md-mailman.stormreply.com
> ---
>  drivers/net/dwc_eth_qos_stm32.c | 52 ++---
>  1 file changed, 28 insertions(+), 24 deletions(-)
> 
> diff --git a/drivers/net/dwc_eth_qos_stm32.c b/drivers/net/dwc_eth_qos_stm32.c
> index 38037c47954..72f65f80540 100644
> --- a/drivers/net/dwc_eth_qos_stm32.c
> +++ b/drivers/net/dwc_eth_qos_stm32.c
> @@ -63,36 +63,36 @@ static int eqos_start_clks_stm32(struct udevice *dev)
>   if (!CONFIG_IS_ENABLED(CLK))
>   return 0;
>  
> - debug("%s(dev=%p):\n", __func__, dev);
> + dev_dbg(dev, "%s:\n", __func__);
>  
>   ret = clk_enable(>clk_master_bus);
>   if (ret < 0) {
> - pr_err("clk_enable(clk_master_bus) failed: %d", ret);
> + dev_err(dev, "clk_enable(clk_master_bus) failed: %d\n", ret);
>   goto err;
>   }
>  
>   ret = clk_enable(>clk_rx);
>   if (ret < 0) {
> - pr_err("clk_enable(clk_rx) failed: %d", ret);
> + dev_err(dev, "clk_enable(clk_rx) failed: %d\n", ret);
>   goto err_disable_clk_master_bus;
>   }
>  
>   ret = clk_enable(>clk_tx);
>   if (ret < 0) {
> - pr_err("clk_enable(clk_tx) failed: %d", ret);
> + dev_err(dev, "clk_enable(clk_tx) failed: %d\n", ret);
>   goto err_disable_clk_rx;
>   }
>  
>   if (clk_valid(>clk_ck) && !eqos->clk_ck_enabled) {
>   ret = clk_enable(>clk_ck);
>   if (ret < 0) {
> - pr_err("clk_enable(clk_ck) failed: %d", ret);
> + dev_err(dev, "clk_enable(clk_ck) failed: %d\n", ret);
>   goto err_disable_clk_tx;
>   }
>   eqos->clk_ck_enabled = true;
>   }
>  
> - debug("%s: OK\n", __func__);
> + dev_dbg(dev, "%s: OK\n", __func__);
>   return 0;
>  
>  err_disable_clk_tx:
> @@ -102,7 +102,8 @@ err_disable_clk_rx:
>  err_disable_clk_master_bus:
>   clk_disable(>clk_master_bus);
>  err:
> - debug("%s: FAILED: %d\n", __func__, ret);
> + dev_dbg(dev, "%s: FAILED: %d\n", __func__, ret);
> +
>   return ret;
>  }
>  
> @@ -113,13 +114,14 @@ static int eqos_stop_clks_stm32(struct udevice *dev)
>   if (!CONFIG_IS_ENABLED(CLK))
>   return 0;
>  
> - debug("%s(dev=%p):\n", __func__, dev);
> + dev_dbg(dev, "%s:\n", __func__);
>  
>   clk_disable(>clk_tx);
>   clk_disable(>clk_rx);
>   clk_disable(>clk_master_bus);
>  
> - debug("%s: OK\n", __func__);
> + dev_dbg(dev, "%s: OK\n", __func__);
> +
>   return 0;
>  }
>  
> @@ -143,20 +145,20 @@ static int eqos_probe_syscfg_stm32(struct udevice *dev,
>  
>   switch (interface_type) {
>   case PHY_INTERFACE_MODE_MII:
> - log_debug("PHY_INTERFACE_MODE_MII\n");
> + dev_dbg(dev, "PHY_INTERFACE_MODE_MII\n");
>   value = FIELD_PREP(SYSCFG_PMCSETR_ETH_SEL_MASK,
>  SYSCFG_PMCSETR_ETH_SEL_GMII_MII);
>   value |= SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
>   break;
>   case PHY_INTERFACE_MODE_GMII:
> - log_debug("PHY_INTERFACE_MODE_GMII\n");
> + dev_dbg(dev, "PHY_INTERFACE_MODE_GMII\n");
>   value = FIELD_PREP(SYSCFG_PMCSETR_ETH_SEL_MASK,
>  SYSCFG_PMCSETR_ETH_SEL_GMII_MII);
>   if (eth_clk_sel_reg)
>   value |= SYSCFG_PMCSETR_ETH_CLK_SEL;
>   break;
>   case PHY_INTERFACE_MODE_RMII:
> - log_debug("PHY_INTERFACE_MODE_RMII\n");
> + dev_dbg(dev, "PHY_INTERFACE_MODE_RMII\n");
>   value = FIELD_PREP(SYSCFG_PMCSETR_ETH_SEL_MASK,
>  SYSCFG_PMCSETR_ETH_SEL_RMII);
>   if (eth_ref_clk_sel_reg)
> @@ -166,15 +168,15 @@ static int eqos_probe_syscfg_stm32(struct udevice *dev,
>   case PHY_INTERFACE_MODE_RGMII_ID:
>   case PHY_INTERFACE_MODE_RGMII_RXID:
>   case PHY_INTERFACE_MODE_RGMII_TXID:
> - log_debug("PHY_INTERFACE_MODE_RGMII\n");
> + dev_dbg(dev, "PHY_INTERFACE_MODE_RGMII\n");
>   value = FIELD_PREP(SYSCFG_PMCSETR_ETH_SEL_MASK,
>  SYSCFG_PMCSETR_ETH_SEL_RGMII);
>   if (eth_clk_sel_reg)
>   value |= SYSCFG_PMCSETR_ETH_CLK_SEL;
>   break;
>   default:
> - log_debug("Do not manage %d interface\n",
> -   interface_type);
> + dev_dbg(dev, "Do not manage %d interface\n",
> + interface_type);
>   /* Do not 

Re: [PATCH 06/11] net: dwc_eth_qos: Move log_debug statements on top of case block

[Patrice CHOTARD]

On 3/9/24 03:11, Marek Vasut wrote:
> Move the log_debug() calls on top of the bit manipulation code.
> No functional change.
> 
> Signed-off-by: Marek Vasut 
> ---
> Cc: Christophe Roullier 
> Cc: Joe Hershberger 
> Cc: Patrice Chotard 
> Cc: Patrick Delaunay 
> Cc: Ramon Fried 
> Cc: u-b...@dh-electronics.com
> Cc: uboot-st...@st-md-mailman.stormreply.com
> ---
>  drivers/net/dwc_eth_qos_stm32.c | 8 
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/net/dwc_eth_qos_stm32.c b/drivers/net/dwc_eth_qos_stm32.c
> index 7545026b158..38037c47954 100644
> --- a/drivers/net/dwc_eth_qos_stm32.c
> +++ b/drivers/net/dwc_eth_qos_stm32.c
> @@ -143,34 +143,34 @@ static int eqos_probe_syscfg_stm32(struct udevice *dev,
>  
>   switch (interface_type) {
>   case PHY_INTERFACE_MODE_MII:
> + log_debug("PHY_INTERFACE_MODE_MII\n");
>   value = FIELD_PREP(SYSCFG_PMCSETR_ETH_SEL_MASK,
>  SYSCFG_PMCSETR_ETH_SEL_GMII_MII);
>   value |= SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
> - log_debug("PHY_INTERFACE_MODE_MII\n");
>   break;
>   case PHY_INTERFACE_MODE_GMII:
> + log_debug("PHY_INTERFACE_MODE_GMII\n");
>   value = FIELD_PREP(SYSCFG_PMCSETR_ETH_SEL_MASK,
>  SYSCFG_PMCSETR_ETH_SEL_GMII_MII);
>   if (eth_clk_sel_reg)
>   value |= SYSCFG_PMCSETR_ETH_CLK_SEL;
> - log_debug("PHY_INTERFACE_MODE_GMII\n");
>   break;
>   case PHY_INTERFACE_MODE_RMII:
> + log_debug("PHY_INTERFACE_MODE_RMII\n");
>   value = FIELD_PREP(SYSCFG_PMCSETR_ETH_SEL_MASK,
>  SYSCFG_PMCSETR_ETH_SEL_RMII);
>   if (eth_ref_clk_sel_reg)
>   value |= SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
> - log_debug("PHY_INTERFACE_MODE_RMII\n");
>   break;
>   case PHY_INTERFACE_MODE_RGMII:
>   case PHY_INTERFACE_MODE_RGMII_ID:
>   case PHY_INTERFACE_MODE_RGMII_RXID:
>   case PHY_INTERFACE_MODE_RGMII_TXID:
> + log_debug("PHY_INTERFACE_MODE_RGMII\n");
>   value = FIELD_PREP(SYSCFG_PMCSETR_ETH_SEL_MASK,
>  SYSCFG_PMCSETR_ETH_SEL_RGMII);
>   if (eth_clk_sel_reg)
>   value |= SYSCFG_PMCSETR_ETH_CLK_SEL;
> - log_debug("PHY_INTERFACE_MODE_RGMII\n");
>   break;
>   default:
>   log_debug("Do not manage %d interface\n",

Reviewed-by: Patrice Chotard 

Thanks
Patrice