Re: [PATCH] Azure: Remove "spear" jobs

2021-07-08 Thread Bin Meng
On Thu, Jul 8, 2021 at 7:50 PM Tom Rini wrote: > > With the spear family of platforms gone, remove references to them from > the build jobs. > > Signed-off-by: Tom Rini > --- > .azure-pipelines.yml | 4 +--- > 1 file changed, 1 insertion(+), 3 deletions(-) > Reviewed-by: Bin Meng

Re: [PATCH] x86: Drop _X86EMU_env definition when CONFIG_BIOSEMU is used

2021-07-07 Thread Bin Meng
Hi Simon, On Thu, Jul 8, 2021 at 1:35 AM Simon Glass wrote: > > Hi Bin, > > On Wed, 7 Jul 2021 at 01:36, Bin Meng wrote: > > > > With x86 we can execute an option ROM either natively or using the > > x86 emulator (if enabled with CONFIG_BIOSEMU). Both of these shar

[PATCH] x86: Drop _X86EMU_env definition when CONFIG_BIOSEMU is used

2021-07-07 Thread Bin Meng
twice, once in common code and once in code only compiled with CONFIG_BIOSEMU. With GCC 11 this causes a 'multiple definitions' error on boards with CONFIG_BIOSEMU. Drop the emulator definition when CONFIG_BIOSEMU is used. Signed-off-by: Bin Meng --- arch/x86/lib/bios.c | 2 ++ 1 fi

Re: [PATCH v2 2/4] usb: xhci-pci: Move reset logic out of XHCI core

2021-07-05 Thread Bin Meng
Hi Andre, On Mon, Jul 5, 2021 at 5:07 PM Andre Przywara wrote: > > On Mon, 5 Jul 2021 16:38:29 +0800 > Bin Meng wrote: > > Hi, > > > On Mon, Jul 5, 2021 at 4:19 PM Marek Vasut wrote: > > > > > > On 7/5/21 10:04 AM, Bin Meng wrote: > > >

Re: [PATCH] smbios: Try CONFIG_SYS_ options before using "Unknow" as a value

2021-07-05 Thread Bin Meng
the .dts options are missing, try to use CONFIG_SYS_VENDOR > and CONFIG_SYS_BOARD respectively. If those are not found either warn the > user at runtime and use "Unknown" for both entries. > > Signed-off-by: Ilias Apalodimas > --- > lib/smbios.c | 14 -- &g

Re: [PATCH v2 2/4] usb: xhci-pci: Move reset logic out of XHCI core

2021-07-05 Thread Bin Meng
On Mon, Jul 5, 2021 at 4:19 PM Marek Vasut wrote: > > On 7/5/21 10:04 AM, Bin Meng wrote: > > On Sat, Apr 17, 2021 at 10:21 PM Samuel Holland wrote: > >> > >> Resetting an XHCI controller inside xhci_register undoes any register > >> setup performed by t

Re: [PATCH v2 2/4] usb: xhci-pci: Move reset logic out of XHCI core

2021-07-05 Thread Bin Meng
| 2 -- > 4 files changed, 47 insertions(+), 43 deletions(-) > Reviewed-by: Bin Meng

Re: [PATCH v2 0/4] Allwinner H6 USB3 support

2021-07-04 Thread Bin Meng
Hi Andre, On Mon, Jul 5, 2021 at 7:10 AM Andre Przywara wrote: > > On Wed, 21 Apr 2021 12:53:42 +0200 > Marek Vasut wrote: > > Hi, > > > On 4/21/21 12:43 PM, Andre Przywara wrote: > > > On Sat, 17 Apr 2021 09:20:55 -0500 > > > Samuel Holland wrote: > > > > > > Hi, > > > > > >> This series adds

Re: [PATCHv4] Azure/GitLab: Move to gcc-11.1.0 and LLVM-11

2021-07-02 Thread Bin Meng
.com/grub-devel@gnu.org/msg30736.html > - Update to grub-2.06 release to address other issues of building with > gcc-11.1. > - Update to newer Xtensa (gcc-9.2.0) and ARC (gcc-10.2) toolchains > > Cc: Heinrich Schuchardt > Cc: Bin Meng > Cc: Simon Glass > Cc: Rick Chen > Sign

Please pull u-boot-x86

2021-06-23 Thread Bin Meng
u to fetch changes up to f68d5a66cd53a238d64d79cdd330b4dce17c7197: MAINTAINERS: Add an entry for NVMe (2021-06-23 17:21:14 +0800) ---- Bin Meng (8): x86: Discard .note.gnu.property sections nvme: Move block dev creation

Re: [PATCH v2 1/7] nvme: Move block dev creation from uclass post_probe() to driver probe()

2021-06-23 Thread Bin Meng
On Tue, Jun 22, 2021 at 9:16 PM Bin Meng wrote: > > At present the block device creation happens in the NVMe uclass > driver post_probe() phase. In preparation to support multiple > namespaces, we should issue namespace identify before creating > block devices but that touches

Re: [PATCH] nvme: Remove the redundant aqa value setting

2021-06-23 Thread Bin Meng
On Wed, Jun 23, 2021 at 5:14 PM Bin Meng wrote: > > On Tue, Jun 22, 2021 at 11:35 AM Wesley Sheng wrote: > > > > From: Wesley Sheng > > > > AQA (Admin Queue Attributes) register is a dword size with > > lower word of ASQS, and higher word of ACQS. > &g

Re: [PATCH] nvme: Correct the prps per page calculation method

2021-06-23 Thread Bin Meng
On Wed, Jun 23, 2021 at 4:53 PM Bin Meng wrote: > > On Tue, Jun 22, 2021 at 11:34 AM Wesley Sheng wrote: > > > > From: Wesley Sheng > > > > Each prp is 8 bytes, calculate the number of prps > > per page should just divide page size by 8 > > there i

Re: [PATCH] nvme: Remove the redundant aqa value setting

2021-06-23 Thread Bin Meng
Signed-off-by: Wesley Sheng > --- > drivers/nvme/nvme.c | 1 - > 1 file changed, 1 deletion(-) > Reviewed-by: Bin Meng

Re: [PATCH] nvme: Correct the prps per page calculation method

2021-06-23 Thread Bin Meng
.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > Reviewed-by: Bin Meng

Re: [PATCH] nvme: fix for big endian systems

2021-06-23 Thread Bin Meng
On Sat, Jun 19, 2021 at 10:15 PM Bin Meng wrote: > > On Sat, May 8, 2021 at 12:49 AM David Lamparter wrote: > > > > writel() and co. already include the endian swap; doing the swap twice > > is, er, unhelpful. > > > > Tested on a P4080DS, which boo

Re: [PATCH] docs: uefi: Update stale U-Boot on EFI doc

2021-06-22 Thread Bin Meng
On Mon, Jun 21, 2021 at 10:17 AM Bin Meng wrote: > > The existing intructions in the U-Boot on EFI doc do not work with > the latest QEMU. Update the doc with the correct instructions, as > well as using the new OVMF URL link. > > Signed-off-by: Bin Meng > --- &g

[PATCH v2 7/7] MAINTAINERS: Add an entry for NVMe

2021-06-22 Thread Bin Meng
This was missed when NVMe support was initially brought to U-Boot back in 2017. Add an entry for it and list myself as the maintainer. Signed-off-by: Bin Meng --- Changes in v2: - new patch: Add an entry for NVMe MAINTAINERS | 8 1 file changed, 8 insertions(+) diff --git a

[PATCH v2 6/7] doc: develop: Convert README.nvme to reST

2021-06-22 Thread Bin Meng
This converts the existing README.nvme to reST, and puts it under the develop/driver-model/ directory. Signed-off-by: Bin Meng --- Changes in v2: - new patch: Convert README.nvme to reST doc/develop/driver-model/index.rst| 1 + .../driver-model/nvme.rst}| 25

[PATCH v2 4/7] nvme: Drop useless members of 'struct nvme_ns'

2021-06-22 Thread Bin Meng
mode_select_num_blocks and mode_select_block_len in 'struct nvme_ns' are not useful. Drop them. Signed-off-by: Bin Meng --- Changes in v2: - new patch: Drop useless members of 'struct nvme_ns' drivers/nvme/nvme.c | 4 +--- drivers/nvme/nvme.h | 2 -- 2 files change

[PATCH v2 5/7] nvme: Don't clear nvme blk device's priv space

2021-06-22 Thread Bin Meng
A udevice's priv space is cleared in alloc_priv() in the DM core. Don't do it again in its probe() routine. Signed-off-by: Bin Meng --- Changes in v2: - new patch: Don't clear nvme blk device's priv space drivers/nvme/nvme.c | 1 - 1 file changed, 1 deletion(-) diff

[PATCH v2 3/7] nvme: Eliminate the offset of one during block dev creation

2021-06-22 Thread Bin Meng
offset of one effectively. Suggested-by: Heinrich Schuchardt Signed-off-by: Bin Meng --- Changes in v2: - new patch: Eliminate the offset of one during block dev creation drivers/nvme/nvme.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/nvme/nvme.c b/drivers

[PATCH v2 2/7] nvme: Skip block device creation for inactive namespaces

2021-06-22 Thread Bin Meng
ero filled data structure. We can use field NSZE (namespace size) to decide whether a block device should be created for it. Reported-by: Heinrich Schuchardt Signed-off-by: Bin Meng --- (no changes since v1) drivers/nvme/nvme.c | 23 ++- 1 file changed, 22 insertions(+),

[PATCH v2 1/7] nvme: Move block dev creation from uclass post_probe() to driver probe()

2021-06-22 Thread Bin Meng
driver post_probe(). Let's move it to driver probe() phase instead. Signed-off-by: Bin Meng --- Changes in v2: - drop the nvme per-child platdata change drivers/nvme/nvme-uclass.c | 30 -- drivers/nvme/nvme.c| 18 ++ 2 files change

[PATCH 2/2] nvme: Skip block device creation for inactive namespaces

2021-06-21 Thread Bin Meng
a structure. We can use field NSZE (namespace size) to decide if a block device should be created. Reported-by: Heinrich Schuchardt Signed-off-by: Bin Meng --- drivers/nvme/nvme.c | 23 ++- 1 file changed, 22 insertions(+), 1 deletion(-) diff --git a/drivers/nvme/nvme.c

[PATCH 1/2] nvme: Move block dev creation from uclass post probe to driver probe

2021-06-21 Thread Bin Meng
block device name. Signed-off-by: Bin Meng --- drivers/nvme/nvme-uclass.c | 30 -- drivers/nvme/nvme.c| 30 +- drivers/nvme/nvme.h| 14 ++ 3 files changed, 39 insertions(+), 35 deletions(-) diff --git a/drivers

Re: [PATCH] nvme: don't create block device for inactive namespace

2021-06-21 Thread Bin Meng
Hi Heinrich, On Sat, Jun 19, 2021 at 4:39 AM Heinrich Schuchardt wrote: > > Am 18. Juni 2021 07:47:37 MESZ schrieb Bin Meng : > >+ML > > > >On Fri, Jun 18, 2021 at 1:47 PM Bin Meng wrote: > >> > >> Hi Heinrich, > >> > >> O

Re: [PATCH v2] x86: Discard .note.gnu.property sections

2021-06-20 Thread Bin Meng
On Fri, Jun 18, 2021 at 3:09 PM Bin Meng wrote: > > When switching to kernel.org x86_64 gcc 11.1.0 toolchain, u-boot.rom > built from qemu-x86_defconfig no longer boots anymore. Investigation > shows that U-Boot fails at a very early stage during the boot process, > in fdtdec_prep

[PATCH] docs: uefi: Update stale U-Boot on EFI doc

2021-06-20 Thread Bin Meng
The existing intructions in the U-Boot on EFI doc do not work with the latest QEMU. Update the doc with the correct instructions, as well as using the new OVMF URL link. Signed-off-by: Bin Meng --- doc/develop/uefi/u-boot_on_efi.rst | 12 +++- 1 file changed, 7 insertions(+), 5

Re: [PATCH] nvme: fix for big endian systems

2021-06-19 Thread Bin Meng
On Sat, Jun 19, 2021 at 10:10 PM David Lamparter wrote: > > On Tue, May 18, 2021 at 01:09:17PM +0200, David Lamparter wrote: > > On Thu, May 06, 2021 at 08:24:30PM +0200, David Lamparter wrote: > > > writel() and co. already include the endian swap; doing the swap twice > > > is, er, unhelpful. >

Re: [PATCH] nvme: fix for big endian systems

2021-06-19 Thread Bin Meng
t; drivers/nvme/nvme.c | 8 > 1 file changed, 4 insertions(+), 4 deletions(-) > Reviewed-by: Bin Meng

[PATCH v2] x86: Discard .note.gnu.property sections

2021-06-18 Thread Bin Meng
U-Boot. [1] https://sourceware.org/bugzilla/show_bug.cgi?id=27753 [2] commit 4caffe6a28d3 ("x86/vdso: Discard .note.gnu.property sections in vDSO") Signed-off-by: Bin Meng Reviewed-by: Tom Rini --- Changes in v2: - add the same change to u-boot-spl.lds and u-boot-64.lds arch/x86/cpu/u-boot-6

Re: [PATCH] nvme: Remove the redundant aqa value setting

2021-06-17 Thread Bin Meng
Signed-off-by: wesleywesley > --- > drivers/nvme/nvme.c | 1 - > 1 file changed, 1 deletion(-) > Reviewed-by: Bin Meng

Re: [PATCH] nvme: Correct the prps per page calculation method

2021-06-17 Thread Bin Meng
to minus 1 > > Signed-off-by: wesleywesley > --- > drivers/nvme/nvme.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > Reviewed-by: Bin Meng

Re: [PATCH] nvme: don't create block device for inactive namespace

2021-06-17 Thread Bin Meng
+ML On Fri, Jun 18, 2021 at 1:47 PM Bin Meng wrote: > > Hi Heinrich, > > On Thu, Jun 17, 2021 at 7:04 PM Heinrich Schuchardt > wrote: > > > > QEMU returns the highest supported namespace number NN as 255. This does > > not imply that there are 255 active name

[PATCH] x86: Discard .note.gnu.property sections

2021-06-17 Thread Bin Meng
U-Boot. [1] https://sourceware.org/bugzilla/show_bug.cgi?id=27753 [2] commit 4caffe6a28d3 ("x86/vdso: Discard .note.gnu.property sections in vDSO") Signed-off-by: Bin Meng --- arch/x86/cpu/u-boot.lds | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/x86/cpu/u-boot.lds b/arch/x86/cpu

Re: [RFCv3] Azure/GitLab: Move to gcc-11.1.0 and LLVM-11

2021-06-17 Thread Bin Meng
On Thu, Jun 17, 2021 at 10:45 PM Tom Rini wrote: > > On Thu, Jun 17, 2021 at 10:24:18PM +0800, Bin Meng wrote: > > On Thu, Jun 17, 2021 at 10:14 PM Tom Rini wrote: > > > > > > On Thu, Jun 17, 2021 at 10:09:20PM +0800, Bin Meng wrote: > > > > On Th

Re: [RFCv3] Azure/GitLab: Move to gcc-11.1.0 and LLVM-11

2021-06-17 Thread Bin Meng
On Thu, Jun 17, 2021 at 10:14 PM Tom Rini wrote: > > On Thu, Jun 17, 2021 at 10:09:20PM +0800, Bin Meng wrote: > > On Thu, Jun 17, 2021 at 8:31 PM Tom Rini wrote: > > > > > > On Thu, Jun 17, 2021 at 04:27:11PM +0800, Bin Meng wrote: > > > > Hi Tom, >

Re: [RFCv3] Azure/GitLab: Move to gcc-11.1.0 and LLVM-11

2021-06-17 Thread Bin Meng
On Thu, Jun 17, 2021 at 8:31 PM Tom Rini wrote: > > On Thu, Jun 17, 2021 at 04:27:11PM +0800, Bin Meng wrote: > > Hi Tom, > > > > On Thu, Jun 17, 2021 at 4:00 AM Tom Rini wrote: > > > > > > - Move to gcc-11.1.0 builds from kernel.org for supported pla

Re: [RFCv3] Azure/GitLab: Move to gcc-11.1.0 and LLVM-11

2021-06-17 Thread Bin Meng
g/msg30736.html > so drop it. > - Update to newer Xtensa (gcc-9.2.0) and ARC (gcc-10.2) toolchains > > Cc: Heinrich Schuchardt > Cc: Bin Meng > Cc: Simon Glass > Cc: Rick Chen > Signed-off-by: Tom Rini > --- > Changes in v3: > - Post the right patch this time.

Re: [PULL v2] u-boot-riscv/next

2021-06-16 Thread Bin Meng
Hi Leo, On Wed, Jun 16, 2021 at 10:59 PM Tom Rini wrote: > > On Wed, Jun 16, 2021 at 08:48:40PM +0800, Leo Liang wrote: > > > Hi Tom, > > > > Please pull u-boot-riscv/next into -next. > > > > The following changes on the "next" branch since commit > > c4737cd594b5c4c47aff789fc53f7dd36ed03c94: >

Re: [PATCH] riscv: sifive: Set default fdtfile names.

2021-06-16 Thread Bin Meng
l > cc: Green Wan > --- > configs/sifive_unleashed_defconfig | 1 + > configs/sifive_unmatched_defconfig | 1 + > include/configs/sifive-unleashed.h | 1 + > include/configs/sifive-unmatched.h | 1 + > 4 files changed, 4 insertions(+) > Otherwise, Reviewed-by: Bin Meng

Re: [PULL] u-boot-riscv/next

2021-06-16 Thread Bin Meng
38f73cd4af8128208: > > test: Add K210 PLL tests to sandbox defconfigs (2021-06-16 10:04:23 +0800) > > CI result shows no issue: > https://source.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/7856 > > > Bin

[PATCH v2] riscv: andes_plic: Fix riscv_get_ipi() mask

2021-06-14 Thread Bin Meng
I status") Signed-off-by: Bin Meng Reviewed-by: Rick Chen Tested-by: Rick Chen --- Changes in v2: - remove RFT tag - update commit message with "Fixes" tag along with the commit id arch/riscv/lib/andes_plic.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/arch

Re: [PATCH V2] MAINTAINER, git-mailrc: Update the mmc maintainer

2021-06-14 Thread Bin Meng
- > Changelog on V2 > - Keep original alias > --- > MAINTAINERS| 1 + > doc/git-mailrc | 2 +- > 2 files changed, 2 insertions(+), 1 deletion(-) > Otherwise, Reviewed-by: Bin Meng

Re: [RFT PATCH] riscv: andes_plic: Fix riscv_get_ipi() mask

2021-06-13 Thread Bin Meng
On Wed, Jun 9, 2021 at 3:55 PM Bin Meng wrote: > > Current logic in riscv_get_ipi() for Andes PLICSW does not look good > to me. The mask to test IPI pending bits for a hart should be left > shifted by (8 * gd->arch.boot_hart), just the same as what is done in > riscv_send_ipi

Re: [PATCH] MAINTAINER, git-mailrc: Update the mmc maintainer

2021-06-13 Thread Bin Meng
Hi Jaehoon, On Mon, Jun 14, 2021 at 8:22 AM Jaehoon Chung wrote: > > Hi Bin, > > On 6/14/21 8:57 AM, Bin Meng wrote: > > Hi Jaehoon, > > > > On Mon, Jun 14, 2021 at 7:33 AM Jaehoon Chung > > wrote: > >> > >> Update to me as co-maintai

Re: [PATCH] MAINTAINER, git-mailrc: Update the mmc maintainer

2021-06-13 Thread Bin Meng
Hi Jaehoon, On Mon, Jun 14, 2021 at 7:33 AM Jaehoon Chung wrote: > > Update to me as co-maintainer with Peng. > Additionally, fix the alias in git-mailrc. > > Signed-off-by: Jaehoon Chung > --- > MAINTAINERS| 1 + > doc/git-mailrc | 6 +++--- > 2 files changed, 4 insertions(+), 3 deletions(

Re: [PATCH 5/5] riscv: ae350: dts: Add missing "u-boot,dm-spl" for SPL config

2021-06-12 Thread Bin Meng
Hi Rick, On Sat, Jun 12, 2021 at 9:30 PM Rick Chen wrote: > > HI Bin > > > Hi Rick, > > > > On Wed, Jun 9, 2021 at 3:06 PM Rick Chen wrote: > > > > > > Hi Bin, > > > > > > > From: Bin Meng > > > > Sent: Friday, Ju

Re: [PATCH v2 1/1] lib: move rtc-lib.c to lib

2021-06-12 Thread Bin Meng
mated using 'git format-patch -M' > --- > drivers/rtc/Makefile | 1 - > lib/Makefile | 1 + > {drivers/rtc => lib}/rtc-lib.c | 0 > 3 files changed, 1 insertion(+), 1 deletion(-) > rename {drivers/rtc => lib}/rtc-lib.c (100%) > Reviewed-by: Bin Meng

Re: [PATCH 1/1] lib: move rtc-lib.c to lib

2021-06-12 Thread Bin Meng
Hi Heinrich, On Sat, Jun 12, 2021 at 2:22 PM Heinrich Schuchardt wrote: > > Function rtc_to_tm() is needed for FAT file system support even if we don't > have a real time clock. So move it from drivers/ to lib/. > > Signed-off-by: Heinrich Schuchardt > --- > drivers/rtc/Makefile | 1 - > driv

[RFT PATCH] riscv: andes_plic: Fix riscv_get_ipi() mask

2021-06-09 Thread Bin Meng
Current logic in riscv_get_ipi() for Andes PLICSW does not look good to me. The mask to test IPI pending bits for a hart should be left shifted by (8 * gd->arch.boot_hart), just the same as what is done in riscv_send_ipi(). Signed-off-by: Bin Meng --- It looks there is no datasheet relea

Re: [PATCH 5/5] riscv: ae350: dts: Add missing "u-boot,dm-spl" for SPL config

2021-06-09 Thread Bin Meng
Hi Rick, On Wed, Jun 9, 2021 at 3:06 PM Rick Chen wrote: > > Hi Bin, > > > From: Bin Meng > > Sent: Friday, June 04, 2021 1:51 PM > > To: Rick Jian-Zhi Chen(陳建志) ; Leo Yu-Chi Liang(梁育齊) > > ; U-Boot Mailing List > > Subject: [PATCH 5/5] riscv: ae350: d

Re: [PATCH 1/5] riscv: ae350: dts: Add SPDX license header

2021-06-08 Thread Bin Meng
On Fri, Jun 4, 2021 at 1:51 PM Bin Meng wrote: > > The SPDX license header is currently missing. Add one. > > Signed-off-by: Bin Meng > --- > > arch/riscv/dts/ae350_32.dts | 2 ++ > arch/riscv/dts/ae350_64.dts | 2 ++ > 2 files changed, 4 insertions(+) > Ping for this series?

Re: [PATCH] Prepare v2021.07-rc4

2021-06-07 Thread Bin Meng
On Tue, Jun 8, 2021 at 9:22 AM xiaobo wrote: > > From: Tom Rini > > Signed-off-by: Tom Rini > --- > Makefile | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > What is this? Regards, Bin

[PATCH] riscv: ae350: doc: Remove CONFIG_SKIP_LOWLEVEL_INIT

2021-06-04 Thread Bin Meng
The doc says CONFIG_SKIP_LOWLEVEL_INIT is in ax25-ae350.h, while actually it is not. Remove it. Signed-off-by: Bin Meng --- doc/board/AndesTech/ax25-ae350.rst | 19 --- 1 file changed, 4 insertions(+), 15 deletions(-) diff --git a/doc/board/AndesTech/ax25-ae350.rst b/doc

Re: [PATCH v2] net: tsec: add option to set device max-speed via dts

2021-06-04 Thread Bin Meng
if (max_speed == 1000) > + priv->flags = TSEC_GIGABIT; > if (priv->interface == PHY_INTERFACE_MODE_SGMII) > priv->flags |= TSEC_SGMII; > Reviewed-by: Bin Meng Could you please send the new version as a separate thread, instead of replying the old version thread? Regards, Bin

Re: [PATCH v2 1/2] of: addr: Translate 'dma-ranges' for parent nodes missing 'dma-ranges'

2021-06-03 Thread Bin Meng
On Mon, May 17, 2021 at 10:03 AM Bin Meng wrote: > > Hi Simon, > > On Fri, Apr 30, 2021 at 9:17 PM Bin Meng wrote: > > > > 'dma-ranges' frequently exists without parent nodes having 'dma-ranges'. > > While this is an error for 'ranges'

[PATCH 5/5] riscv: ae350: dts: Add missing "u-boot, dm-spl" for SPL config

2021-06-03 Thread Bin Meng
Let's add all the required "u-boot,dm-spl" for SPL config. Signed-off-by: Bin Meng --- arch/riscv/dts/ae350-u-boot.dtsi | 52 arch/riscv/dts/ae350_32.dts | 1 + arch/riscv/dts/ae350_64.dts | 1 + 3 files changed, 54 insertions(+) crea

[PATCH 4/5] riscv: ae350: dts: Fix #interrupt-cells for plic0 in 32-bit

2021-06-03 Thread Bin Meng
All the device nodes that refer to plic0 as their interrupt parent have 2 cells encoded in their interrupts property, but plic0 only provides 1 cell in #interrupt-cells which is incorrect. Signed-off-by: Bin Meng --- arch/riscv/dts/ae350_32.dts | 2 +- 1 file changed, 1 insertion(+), 1

[PATCH 3/5] riscv: ae350: dts: Remove the unnecessary #address-cells in plic nodes

2021-06-03 Thread Bin Meng
PLIC nodes don't have child nodes, so #address-cells is not needed. Signed-off-by: Bin Meng --- arch/riscv/dts/ae350_32.dts | 2 -- arch/riscv/dts/ae350_64.dts | 2 -- 2 files changed, 4 deletions(-) diff --git a/arch/riscv/dts/ae350_32.dts b/arch/riscv/dts/ae350_32.dts index b9035

[PATCH 2/5] riscv: ae350: dts: Remove the unnecessary space in bootargs

2021-06-03 Thread Bin Meng
There are two spaces before "debug' in bootargs. Drop one. Signed-off-by: Bin Meng --- arch/riscv/dts/ae350_32.dts | 2 +- arch/riscv/dts/ae350_64.dts | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/riscv/dts/ae350_32.dts b/arch/riscv/dts/ae350_32

[PATCH 1/5] riscv: ae350: dts: Add SPDX license header

2021-06-03 Thread Bin Meng
The SPDX license header is currently missing. Add one. Signed-off-by: Bin Meng --- arch/riscv/dts/ae350_32.dts | 2 ++ arch/riscv/dts/ae350_64.dts | 2 ++ 2 files changed, 4 insertions(+) diff --git a/arch/riscv/dts/ae350_32.dts b/arch/riscv/dts/ae350_32.dts index a0ab5e9be2..ef110c54ae

Re: mirroring u-boot mailing list on lore.kernel.org

2021-05-25 Thread Bin Meng
Hi Rasmus, On Tue, May 25, 2021 at 3:46 PM Rasmus Villemoes wrote: > > On 20/05/2021 15.53, Pratyush Yadav wrote: > > On 20/05/21 09:16PM, Bin Meng wrote: > >> On Thu, May 20, 2021 at 9:05 PM Rasmus Villemoes > >> wrote: > >>> > >>> I don&#

Re: [PATCH] configs: ls2088aqds: fix synchronous exception

2021-05-20 Thread Bin Meng
On Fri, May 21, 2021 at 12:16 PM Biwen Li wrote: > > From: Biwen Li > > IFC NOR flash base address of ls2088a is 0x85000, beyond 4GiB? > and env crc offset size is 0x50, so fix the macro > CONFIG_ENV_ADDR to fix synchronous exception(access illegal address) > > Fixes: 59071804c1 ("confi

Re: mirroring u-boot mailing list on lore.kernel.org

2021-05-20 Thread Bin Meng
On Thu, May 20, 2021 at 9:05 PM Rasmus Villemoes wrote: > > Hi, > > When doing linux kernel work, the public-inbox archives at > lore.kernel.org are really useful. > > - excellent search features > - stable links of the form lore.kernel.org// > - nice overview of threads > - ability to, with the b

Re: [PATCH v11 6/8] riscv: dts: add SiFive Unmatched board support

2021-05-20 Thread Bin Meng
cv/dts/hifive-unmatched-a00-u-boot.dtsi > create mode 100644 arch/riscv/dts/hifive-unmatched-a00.dts > Reviewed-by: Bin Meng

Re: [PATCH v10 9/9] riscv: sifive: unmatched: Switch to use binman to generate u-boot.itb

2021-05-19 Thread Bin Meng
Hi Green, On Thu, May 20, 2021 at 11:10 AM Green Wan wrote: > > Hi Bin, > > Thanks for the comment. Originally, I wanted to keep the binman change > tracked separately. I'll give it a try and create the new patch if it doesn't. > Yep, this situation is like previous FU740 PCIe driver. How we or

Re: [PATCH v10 9/9] riscv: sifive: unmatched: Switch to use binman to generate u-boot.itb

2021-05-19 Thread Bin Meng
Hi Green, On Wed, May 19, 2021 at 11:19 PM Green Wan wrote: > > Update to use binman instead. > > Signed-off-by: Green Wan > --- > arch/riscv/dts/hifive-unmatched-a00-u-boot.dtsi | 1 + > board/sifive/unmatched/Kconfig | 1 + > 2 files changed, 2 insertions(+) > > diff --git a/

Re: [PATCH] spl: use CONFIG_IS_ENABLED(LOAD_FIT_FULL)

2021-05-19 Thread Bin Meng
; depends on are not. > > Use CONFIG_IS_ENABLED() to ensure the correct TPL/SPL variant is > checked. > > Signed-off-by: John Keeping > --- > common/spl/spl.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > Reviewed-by: Bin Meng

Re: [PATCH] Revert "riscv: cpu: fu740: clear feature disable CSR"

2021-05-19 Thread Bin Meng
Hi Green, On Wed, May 19, 2021 at 3:52 PM Green Wan wrote: > > Hi Leo and Bin, > > I have the 'binman' patch for unmatched ready. So, we can pick up the > 'binman' series first. > > I plan to create a v10 patchset that includes the fu740 series on top of > 'binman' patch and 'split CLINT' patch

Re: [PATCH 1/1] sandbox: don't refer to symbol _init

2021-05-18 Thread Bin Meng
rence to _init. > > Signed-off-by: Heinrich Schuchardt > --- > common/board_f.c | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > Reviewed-by: Bin Meng

Re: [PATCH 1/1] sandbox: add symbol _init for RISC-V compilation

2021-05-18 Thread Bin Meng
Hi Jim, On Wed, May 19, 2021 at 5:36 AM Jim Wilson wrote: > > On Tue, May 18, 2021 at 2:32 PM Jim Wilson wrote: >> >> On Tue, May 18, 2021 at 1:58 PM Heinrich Schuchardt >> wrote: >>> >>> I am compiling the sandbox_defconfig target of upstream U-Boot with GCC >>> 11. Please, indicate what "leg

Re: [PATCH] Revert "riscv: cpu: fu740: clear feature disable CSR"

2021-05-18 Thread Bin Meng
Hi Green, On Tue, May 18, 2021 at 5:43 PM Green Wan wrote: > > > > On Tue, May 18, 2021 at 3:45 PM Bin Meng wrote: >> >> Hi Green, >> >> On Tue, May 18, 2021 at 3:38 PM Leo Liang wrote: >> > >> > On Fri, May 14, 2021 at 11:45:30AM +0800

Re: [PATCH] Revert "riscv: cpu: fu740: clear feature disable CSR"

2021-05-18 Thread Bin Meng
Hi Green, On Tue, May 18, 2021 at 3:38 PM Leo Liang wrote: > > On Fri, May 14, 2021 at 11:45:30AM +0800, Green Wan wrote: > > Hi Bin, > > > > Thanks, I'll include that revert. Just traced back the git log. My original > > patch is based on fu740. I guess it was merged to fu540 since fu740 series

Re: [PATCH] riscv: ae350: Increase malloc size for binman spl flow

2021-05-17 Thread Bin Meng
config | 1 + > configs/ae350_rv32_spl_xip_defconfig | 1 + > configs/ae350_rv64_spl_defconfig | 1 + > configs/ae350_rv64_spl_xip_defconfig | 1 + > 4 files changed, 4 insertions(+) > This patch seems not to apply on current u-boot/master. But anyways, Reviewed-by: Bin Meng

Re: FW: [PATCH v4 00/13] riscv: Switch to use binman to generate u-boot.itb

2021-05-16 Thread Bin Meng
> Hi Rick, > > > > > > > > > > On Mon, May 10, 2021 at 3:22 PM Rick Chen > > > > > wrote: > > > > > > > > > > > > Hi Bin > > > > > > > > > > > > > Hi Bin, > > > > > >

Re: [PATCH 1/2] riscv: Fix memmove and optimise memcpy when misalign

2021-05-16 Thread Bin Meng
On Thu, May 13, 2021 at 4:46 PM Bin Meng wrote: > > At present U-Boot SPL fails to boot on SiFive Unleashed board, due > to a load address misaligned exception happens when loading the FIT > image in spl_load_simple_fit(). The exception happens in memmove() > which is called

Re: [PATCH v2 1/2] of: addr: Translate 'dma-ranges' for parent nodes missing 'dma-ranges'

2021-05-16 Thread Bin Meng
Hi Simon, On Fri, Apr 30, 2021 at 9:17 PM Bin Meng wrote: > > 'dma-ranges' frequently exists without parent nodes having 'dma-ranges'. > While this is an error for 'ranges', this is fine because DMA capable > devices always have a translatable DMA ad

Re: [PULL] u-boot-riscv/master

2021-05-14 Thread Bin Meng
5e1f77213bf21: > > Revert "riscv: cpu: fu740: clear feature disable CSR" (2021-05-14 16:26:20 > +0800) > > > Bin Meng (1): > Revert "riscv: cpu: fu740: clear feature disable CSR&quo

Re: [PATCH] Revert "riscv: cpu: fu740: clear feature disable CSR"

2021-05-13 Thread Bin Meng
On Fri, May 14, 2021 at 11:45 AM Green Wan wrote: > > Hi Bin, > > Thanks, I'll include that revert. Just traced back the git log. My original > patch is based on fu740. I guess it was merged to fu540 since fu740 series > wasn't present yet. > > Hi Rick, > > Not sure whether you'll pick fu740 ser

Re: [PATCH 1/1] sandbox: add symbol _init for RISC-V compilation

2021-05-13 Thread Bin Meng
On Fri, May 14, 2021 at 7:56 AM Simon Glass wrote: > > Hi Heinrich, > > On Thu, 13 May 2021 at 08:46, Heinrich Schuchardt wrote: > > > > The sandbox does not build on RISC-V when _init is not defined. Errors like > > the following were observed. Which function was referred to depended on the > >

Re: [PATCH 1/1] sandbox: add symbol _init for RISC-V compilation

2021-05-13 Thread Bin Meng
On Thu, May 13, 2021 at 10:46 PM Heinrich Schuchardt wrote: > > The sandbox does not build on RISC-V when _init is not defined. Errors like > the following were observed. Which function was referred to depended on the > configuration. > > /usr/bin/ld: common/built-in.o: in function `parse_stre

Re: [PATCH] riscv: Fix arch_fixup_fdt always failing without /chosen

2021-05-13 Thread Bin Meng
Hi Sean, On Sun, May 9, 2021 at 12:24 AM Sean Anderson wrote: > > On 5/8/21 12:22 PM, Bin Meng wrote: > > On Sun, May 9, 2021 at 12:13 AM Sean Anderson wrote: > >> > >> If /chosen was missing, chosen_offset would never get updated with the new > >> /chosen

[PATCH 2/2] riscv: Group assembly optimized implementation of memory routines into a submenu

2021-05-13 Thread Bin Meng
Currently all assembly optimized implementation of memory routines show up at the top level of the RISC-V architecture Kconfig menu. Let's group them together into a submenu. Signed-off-by: Bin Meng --- arch/riscv/Kconfig | 4 1 file changed, 4 insertions(+) diff --git a/arch/

[PATCH 1/2] riscv: Fix memmove and optimise memcpy when misalign

2021-05-13 Thread Bin Meng
(e.g. prefer a0 to t6). With this patch, U-Boot boots again on SiFive Unleashed board. [1] https://patchwork.kernel.org/project/linux-riscv/patch/2021021622.4976-1-g...@garyguo.net/ Fixes: 8f0dc4cfd106 ("riscv: assembler versions of memcpy, memmove, memset") Signed-off-by

Re: [PATCH V4 2/2] riscv: board: Support OpenPiton SoC

2021-05-13 Thread Bin Meng
Hi Tianrui, On Thu, May 13, 2021 at 2:50 PM Tianrui Wei wrote: > > Hi Bin, > > On 5/13/2021 2:32 PM, Bin Meng wrote: > > Hi Tianrui, > > > > On Thu, May 13, 2021 at 1:07 PM Tianrui Wei wrote: > >> Hi Sean, > >> > >> On 5/13/2021 1:14

Re: [PATCH V4 2/2] riscv: board: Support OpenPiton SoC

2021-05-12 Thread Bin Meng
Hi Tianrui, On Thu, May 13, 2021 at 1:07 PM Tianrui Wei wrote: > > Hi Sean, > > On 5/13/2021 1:14 AM, Sean Anderson wrote: > > > > [snip] > > > >> On 5/8/2021 11:14 PM, Sean Anderson wrote: > >>> On 5/8/21 12:57 AM, Tianrui Wei wrote: > On 5/7/2021 9:03 PM, Sean Anderson wrote: > > On 5/

Re: [PATCH] Revert "riscv: cpu: fu740: clear feature disable CSR"

2021-05-12 Thread Bin Meng
Hi Green, On Wed, May 12, 2021 at 11:13 PM Green Wan wrote: > > Yes, noted. This patch should be applied based on the fu740 port. Thanks for > the reminder. > Just to clarify, the reverted patch *content* should be in your fu740 support series. @Rick, this revert patch itself should be applied

[PATCH] riscv: ax25-ae350: doc: Fix minor format issues

2021-05-12 Thread Bin Meng
This fixes two minor format issues of the ax25-ae350 reST file. Signed-off-by: Bin Meng --- doc/board/AndesTech/ax25-ae350.rst | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/doc/board/AndesTech/ax25-ae350.rst b/doc/board/AndesTech/ax25-ae350.rst index f795476d85

Re: [PATCH] Revert "riscv: cpu: fu740: clear feature disable CSR"

2021-05-12 Thread Bin Meng
Hi Green, On Mon, May 10, 2021 at 5:08 PM Bin Meng wrote: > > This reverts commit bc8bbb77f74f21582b3bfd790334397757f88575. > > This commit breaks U-Boot booting on SiFive Unleashed board, as > there is no such CSR on U54 core. > > Signed-off-by: Bin Meng > --- > &g

Re: FW: [PATCH v4 00/13] riscv: Switch to use binman to generate u-boot.itb

2021-05-11 Thread Bin Meng
> Hi Rick, > > > > > > > > > > On Mon, May 10, 2021 at 3:22 PM Rick Chen > > > > > wrote: > > > > > > > > > > > > Hi Bin > > > > > > > > > > > > > Hi Bin, > > > > > >

[PATCH] riscv: Split SiFive CLINT support between SPL and U-Boot proper

2021-05-11 Thread Bin Meng
. To solve this, we need to split current SiFive CLINT support between SPL and U-Boot proper, using 2 separate Kconfig options. Signed-off-by: Bin Meng --- arch/riscv/Kconfig | 9 - arch/riscv/cpu/fu540/Kconfig | 2 +- arch/riscv/cpu/generic/Kconfig | 3 ++-

Re: FW: [PATCH v4 00/13] riscv: Switch to use binman to generate u-boot.itb

2021-05-10 Thread Bin Meng
Hi Rick, On Tue, May 11, 2021 at 8:49 AM Rick Chen wrote: > > Hi Bin, > > > Hi Rick, > > > > On Mon, May 10, 2021 at 3:22 PM Rick Chen wrote: > > > > > > Hi Bin > > > > > > > Hi Bin, > > > > > > > > >

Re: [PATCH v5 08/13] lib: kconfig: Limit BINMAN_FDT for OF_SEPARATE or OF_EMBED

2021-05-10 Thread Bin Meng
Hi Simon, On Tue, May 11, 2021 at 12:28 AM Simon Glass wrote: > > Hi Bin, > > On Mon, 10 May 2021 at 06:24, Bin Meng wrote: > > > > Generally speaking BINMAN_FDT makes sense for OF_SEPARATE or OF_EMBED. > > For the other OF_CONTROL methods, it's quite possib

[PATCH v5 13/13] riscv: Drop USE_SPL_FIT_GENERATOR

2021-05-10 Thread Bin Meng
Now that we have switched to binman to generate u-boot.itb for all RISC-V boards, USE_SPL_FIT_GENERATOR is no longer needed and can be dropped. Signed-off-by: Bin Meng --- (no changes since v3) Changes in v3: - remove USE_SPL_FIT_GENERATOR in ae350_ defconfigs Changes in v2: - new patch

[PATCH v5 12/13] riscv: ae350: Switch to use binman to generate u-boot.itb

2021-05-10 Thread Bin Meng
Use the new BINMAN_STANDALONE_FDT option for AE350 based SPL defconfigs, so that binman is now used to generate u-boot.itb. Signed-off-by: Bin Meng --- (no changes since v3) Changes in v3: - new patch: "riscv: ae350: Switch to use binman to generate u-boot.itb" arch/riscv/dts/ae

[PATCH v5 08/13] lib: kconfig: Limit BINMAN_FDT for OF_SEPARATE or OF_EMBED

2021-05-10 Thread Bin Meng
ned-off-by: Bin Meng --- (no changes since v3) Changes in v3: - new patch: "lib: kconfig: Limit BINMAN_FDT for OF_SEPARATE or OF_EMBED" lib/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lib/Kconfig b/lib/Kconfig index 6d2d41de30..7d5990c940 100644 --- a/l

[PATCH v5 11/13] riscv: qemu: Switch to use binman to generate u-boot.itb

2021-05-10 Thread Bin Meng
By utilizing the newly introduced BINMAN_STANDALONE_FDT option, along with a new dedicated device tree source file for the QEMU virt target used for binman only, we can now use binman to generate u-boot.itb. Signed-off-by: Bin Meng Reviewed-by: Simon Glass --- (no changes since v2) Changes

[PATCH v5 10/13] riscv: dts: Sort build targets in alphabetical order

2021-05-10 Thread Bin Meng
Sort the RISC-V DTS build targets by their Kconfig target names in alphabetical order. Signed-off-by: Bin Meng --- (no changes since v2) Changes in v2: - new patch: "riscv: dts: Sort build targets in alphabetical order" arch/riscv/dts/Makefile | 2 +- 1 file changed, 1 inser

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