Add pmic and i2c configuration in board header file.
Signed-off-by: Peng Fan
---
include/configs/mx6slevk.h | 12
1 file changed, 12 insertions(+)
diff --git a/include/configs/mx6slevk.h b/include/configs/mx6slevk.h
index c567d9d..1221418 100644
--- a/include/configs/mx6slevk.h
Add I2C1 pad settings for i.MX6 Sololite.
Signed-off-by: Peng Fan
---
arch/arm/include/asm/arch-mx6/mx6sl_pins.h | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/include/asm/arch-mx6/mx6sl_pins.h
b/arch/arm/include/asm/arch-mx6/mx6sl_pins.h
index 9ded3d8..0475203 100644
--- a
ready
DRAM: 1 GiB
PMIC: PFUZE100 ID=0x10
MMC: FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2
"
Signed-off-by: Peng Fan
---
board/freescale/mx6slevk/mx6slevk.c | 47 +
1 file changed, 47 insertions(+)
diff --git a/board/freescale/mx6slevk/mx6slevk.c
b/board
ch 3/12 in previous "imx:mx6 add ldo bypass" patch,
with only one small change is return value. Changing "return -EIO" to
"return ret".
Peng Fan (3):
imx:mx6sl add I2C pad settings
imx:mx6slevk add pmic and i2c configuration
imx:mx6slevk implement power in
ch 3/12 in previous "imx:mx6 add ldo bypass" patch,
with only one small change is return value.
Changes v3:
Take Fabio's suggestion, for patch 3/3, remove ret variable, and directly
"return pfuze_mode_init(xxx)"
Changes v2:
Changing "return -EIO" to "r
Add pmic and i2c configuration in board header file.
Signed-off-by: Peng Fan
---
include/configs/mx6slevk.h | 12
1 file changed, 12 insertions(+)
diff --git a/include/configs/mx6slevk.h b/include/configs/mx6slevk.h
index c567d9d..1221418 100644
--- a/include/configs/mx6slevk.h
1 GiB
PMIC: PFUZE100 ID=0x10
MMC: FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2
"
Signed-off-by: Peng Fan
---
board/freescale/mx6slevk/mx6slevk.c | 42 +
1 file changed, 42 insertions(+)
diff --git a/board/freescale/mx6slevk/mx6slevk.c
b/board/freescal
A few pad settings are I2C1
Signed-off-by: Peng Fan
---
arch/arm/include/asm/arch-mx6/mx6sl_pins.h | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/include/asm/arch-mx6/mx6sl_pins.h
b/arch/arm/include/asm/arch-mx6/mx6sl_pins.h
index 9ded3d8..0475203 100644
--- a/arch/arm
Hi, Fabio
On 2/11/2015 10:13 PM, Fabio Estevam wrote:
On Wed, Feb 11, 2015 at 12:09 PM, Peng Fan wrote:
+int power_init_board(void)
+{
+ struct pmic *p;
+ unsigned int ret;
+
+ p = pfuze_common_init(I2C_PMIC);
+ if (!p)
+ return -ENODEV;
+
+ ret
Hi, Albert and Tom
On 2/4/2015 7:02 PM, Marc Zyngier wrote:
On 04/02/15 10:15, Peng Fan wrote:
If CONFIG_ARMV7_PSCI is not defined and CONFIG_ARMV7_SECURE_BASE is defined,
smp_kicl_all_cpus may enable secondary cores and runs into secure_ram_addr(
_smp_pen), before code is relocated to secure
Hi,
On 08/21/2014 06:44 PM, Stefano Babic wrote:
> Hi Alexandre,
>
> On 21/08/2014 11:08, Alexandre Delove wrote:
>> Hello
>>
>> I am trying to disable the memory management unit on my sabreLite board, but
>> i don't find what i should do. I also want to change the mapping of the MMU,
>> but i
Hi Haikun,
On 3/26/2015 10:39 AM, Wang Haikun-B53464 wrote:
On 3/25/2015 10:10 PM, Fan Peng-B51431 wrote:
Hi Haikun,
On 3/25/2015 8:35 PM, Haikun Wang wrote:
From: Haikun Wang
Atmel AT45DB series devices commands is different from common spi flash
commands. This patch add support for AT45DB
On 3/26/2015 6:50 PM, Wang Haikun-B53464 wrote:
On 3/26/2015 11:05 AM, Fan Peng-B51431 wrote:
Hi Haikun,
On 3/26/2015 10:39 AM, Wang Haikun-B53464 wrote:
On 3/25/2015 10:10 PM, Fan Peng-B51431 wrote:
Hi Haikun,
On 3/25/2015 8:35 PM, Haikun Wang wrote:
From: Haikun Wang
Atmel AT45DB seri
Hi Haikun,
On 4/1/2015 11:10 AM, Haikun Wang wrote:
Move the Freescale QSPI driver over to driver model.
Signed-off-by: Haikun Wang
Signed-off-by: Peng Fan
---
Changes in v2:
- Fix build fail on mx6sxsabresd_spl issue
- Add configure regmap endian in NO-DM model
Changes in v1: None
applying this patch, qspi flashes can be correctly probed.
CC: Simon Glass
CC: Jagannadha Sutradharudu Teki
CC: Haikun Wang
Signed-off-by: Peng Fan
---
Hi,
This patch is based on dm/next branch.
Regards,
Peng.
drivers/spi/fsl_qspi.c | 10 +++---
1 file changed, 3 insertions(+),
-- generic_50
i2c [ ]| |-- i2c@30a4
spi [ ]| `-- qspi@30bb
simple_bus [ ]`-- regulators
Signed-off-by: Peng Fan
---
arch/arm/imx-common/i2c-mxv7.c| 4 +
arch/arm/include/asm/imx-common/mxc_i2c.h | 5 +
dri
Add missed people.
On 4/14/2015 1:19 PM, Peng Fan wrote:
For fsl_qspi_claim_bus and fsl_qspi_release_bus, the input parameter
"struct udevice *dev" represents device: "qspi[x]: qspi@[address] {...}".
Since "dev" already represents the qspi controller, use its
int (*set_wordlen)(struct udevice *dev, unsigned int wordlen);
/**
* SPI transfer
After applying this patch, qspi flashes can be correctly probed and
read/write on i.MX platform. I original posted a patch
https://patchwork.ozlabs.org/patch/461034/ which se
with non-DM way.
On 4/19/2015 9:53 PM, Simon Glass wrote:
Hi Peng,
On 15 April 2015 at 03:35, Peng Fan wrote:
Add support when CONFIG_DM_I2C configured.
Test results:
=> i2c dev 0
Setting bus to 0
=> i2c probe
Valid chip addresses: 08 50
=> i2c md 8 38
0038: 08 08 08 08 08 08 08 08
use
struct mxc_i2c_regs.
7. Remove bus_i2c_read bus_i2c_write prototype in header file
8. The frist paramter of bus_i2c_init is modified to i2c index, since
bus_i2c_init is a must now, so it is also implemented for DM part.
Signed-off-by: Peng Fan
---
Changes v2:
This patch is a big change
Hi Simon,
On 4/23/2015 11:17 PM, Simon Glass wrote:
Hi Peng,
On 15 April 2015 at 03:50, Peng Fan wrote:
Add missed people.
On 4/14/2015 1:19 PM, Peng Fan wrote:
For fsl_qspi_claim_bus and fsl_qspi_release_bus, the input parameter
"struct udevice *dev" represents device: &quo
at 23:49, Peng Fan wrote:
Hi Simon,
Thanks for reviewing. I'll address most comments and try to merge DM and
non-DM part into one. will send out v2 for review.
The only unsure part is bus_i2c_init, I also reply you inline. I want to
pass force_idle_bus and pinmux setting to i2c driver
Please ignore this version, since bus_i2c_init is not good for DM, I'll
implement a weak function for this.
On 4/25/2015 9:04 PM, Peng Fan wrote:
1. Introduce a new structure `struct mxc_i2c_bus`, this structure will
used for non-DM and DM.
1. Remove `struct mxc_i2c_regs` structure
ds_info0);
else if (i2c_bus->index == 1)
force_idle_bus(i2c_pads_info1);
else
xx
}
"
Signed-off-by: Peng Fan
---
Changes v3:
1. remove bus_i2c_init for DM, introuduce a weak function i2c_idle_bus.
2. remove static
rn to the correct place.
Example:
Target |Host
=>kgdb |(gdb)b bootz
|(gdb)c
=>bootz |
|(gdb)Here stop because of breakpoint
|(gdb)q
Signed-off-by: Peng Fan
---
common/kgdb.c | 14 ++
1 file changed, 2 insertions(+),
From: Peng Fan
There are two different ways to read out the data from the flash:
the "IP Command Read" and the "AHB Command Read".
The IC guy suggests we use the "AHB Command Read" which is faster
then the "IP Command Read". (What's more is that t
From: Peng Fan
This patch set is to support QSPI for mx6sxsabresd board. And
register read/write is implmented. AHB read is also supported to
improve flash read performance.
All the three patches have been tested on mx6sxsabresd board.
Peng Fan (3):
ARM:MX6SX Add QuadSPI support for
From: Peng Fan
Add QuadSPI support for mx6sxsabresd board.
There are two 16MB S25FL128S flashes on board. They are connected to
QSPI2 interface. i.MX6SX supports two QuadSPI interfaces, QSPI1/2.
The two flash devices are connected to A1/B1 of QSPI2.
Signed-off-by: Peng Fan
---
arch/arm/cpu
From: Peng Fan
Add qspi_op_wrr to support status and configuration register write in
flash devices.
Signed-off-by: Peng Fan
---
drivers/spi/fsl_qspi.c | 77 --
1 file changed, 74 insertions(+), 3 deletions(-)
diff --git a/drivers/spi/fsl_qspi.c
On 09/10/2014 08:40 PM, Fabio Estevam wrote:
> On Wed, Sep 10, 2014 at 3:16 AM, Peng Fan wrote:
>> From: Peng Fan
>>
>> Add QuadSPI support for mx6sxsabresd board.
>>
>> There are two 16MB S25FL128S flashes on board. They are connected to
>> QSPI2
Add QSPI support for mx6solox.
Signed-off-by: Peng Fan
---
Changelog v2:
Take Fabio's suggestion, split soc code and board code into two patches.
arch/arm/cpu/armv7/mx6/clock.c| 50 +++
arch/arm/include/asm/arch-mx6/clock.h | 3 +++
driver
Configure the pad setting and enable qspi clock to support qspi
flashes access.
This patch has been tested on mx6sxsabresd board.
Signed-off-by: Peng Fan
---
Changelog v2:
Take Fabio's suggestion, split soc code and board code into two patches.
This patch needs 'ARM:MX6SX Add QS
,
fsl_esdhc_mmc_init will use wrong base address to initialize SDHCx.
Peng Fan (3):
imx:mx6sxsabresd: change CONFIG_SYS_FSL_ESDHC_ADDR
imx:mx6qarm2: change CONFIG_SYS_FSL_ESDHC_ADDR
imx:mx6slevk: change CONFIG_SYS_FSL_ESDHC_ADDR
include/configs/mx6qarm2.h | 2 +-
include/configs/mx6slevk.h | 2
Define CONFIG_SYS_FSL_ESDHC_ADDR using USDHC2_BASE_ADDR which is
used in board_mmc_init.
Signed-off-by: Peng Fan
---
include/configs/mx6slevk.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/configs/mx6slevk.h b/include/configs/mx6slevk.h
index 3d05a64..9a21605
Define CONFIG_SYS_FSL_ESDHC_ADDR using USDHC4_BASE_ADDR which is used
in board_mmc_init.
If board_mmc_init failed, cpu_mmc_init->fsl_esdhc_mmc_init will use
CONFIG_SYS_FSL_ESDHC_ADDR to initialize sdhc. So set this macro to
correct value.
Signed-off-by: Peng Fan
---
include/conf
invoked.
Signed-off-by: Peng Fan
---
include/configs/mx6qarm2.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/configs/mx6qarm2.h b/include/configs/mx6qarm2.h
index fd651cf..fc0e284 100644
--- a/include/configs/mx6qarm2.h
+++ b/include/configs/mx6qarm2.h
@@ -35,7 +35,7
boun...@lists.denx.de] On
> Behalf Of Peng Fan
> Sent: Thursday, September 11, 2014 9:56 AM
> To: Estevam Fabio-R49496; Li Ye-B37916
> Cc: u-boot@lists.denx.de
> Subject: [U-Boot] [PATCH v2 2/2] imx:mx6sxsabresd add qspi support
>
> Configure the pad setting and enable qs
Hi,
just ping, Any comments about this patch?
Regards,
Peng.
On 09/11/2014 09:54 AM, Peng Fan wrote:
> Add QSPI support for mx6solox.
>
> Signed-off-by: Peng Fan
> ---
>
> Changelog v2:
> Take Fabio's suggestion, split soc code and board code into two patches.
&g
Hi,
On 10/09/2014 06:37 PM, Jagan Teki wrote:
> Hi Peng Fan,
>
> Before reviewing these two patches, I'm requesting some sort work from
> your side like
> Can you update/fix the driver "drivers/spi/fsl_qspi.c" without using
> flash opcodes.
>
> Using flas
Use QSPI_CMD_xx instead of flash opcodes
Signed-off-by: Peng Fan
---
Changelog v3:
Use QSPI_CMD_XX instead of flash opcodes. To fsl qspi controller, the LUT
should be pre programmed with QSPI CMD.
Changelog v2:
none
drivers/spi/fsl_qspi.c | 64
According cs, use different amba_base to choose the corresponding
flash devices. If not, `sf probe 1:0` and `sf probe 1:1` will
choose the same flash device, but not different flash devices.
Signed-off-by: Peng Fan
---
Changelog v3:
none
Changelog v2:
none
drivers/spi/fsl_qspi.c | 30
Add QSPI support for mx6solox.
Signed-off-by: Peng Fan
---
Changelog v3:
none
Changelog v2:
Take Fabio's suggestion, split soc code and board code into two patches.
arch/arm/cpu/armv7/mx6/clock.c | 50
arch/arm/include/asm/arch-mx6/clock.h
Configure the pad setting and enable qspi clock to support qspi
flashes access.
Signed-off-by: Peng Fan
---
Changelog v3:
none
Changelog v2:
Take Fabio's suggestion, split soc code and board code into two patches.
board/freescale/mx6sxsabresd/mx6sxsabresd.c
ard_init.
Also PFUZ is connected to I2C bus 0, so change "1" -> "0".
Using this patch PFUZ can be correctly probed:
"PMIC: PFUZE100 ID=0x11"
Signed-off-by: Peng Fan
---
board/freescale/mx6sxsabresd/mx6sxsabresd.c | 5 -
1 file changed, 4 insertions
On 10/31/2014 08:01 PM, Fabio Estevam wrote:
> On Fri, Oct 31, 2014 at 1:08 AM, Peng Fan wrote:
>> The PFUZ probe failed with the following msg:
>> " wait_for_sr_state: failed sr=81 cr=a0 state=2020
>> i2c_init_transfer: failed for chip 0x8 retry=0
>> wait_
Add usb support for mx6sxsabresd board.
Signed-off-by: Peng Fan
Signed-off-by: Ye.Li
---
board/freescale/mx6sxsabresd/mx6sxsabresd.c | 29 +
include/configs/mx6sxsabresd.h | 14 ++
2 files changed, 43 insertions(+)
diff --git a/board
Add usb support for mx6qarm2 board.
Signed-off-by: Peng Fan
Signed-off-by: Ye.Li
---
board/freescale/mx6qarm2/mx6qarm2.c | 27 +++
include/configs/mx6qarm2.h | 14 ++
2 files changed, 41 insertions(+)
diff --git a/board/freescale/mx6qarm2/mx6qarm2
Add usb support for mx6slevk board.
Signed-off-by: Peng Fan
Signed-off-by: Ye.Li
---
board/freescale/mx6slevk/mx6slevk.c | 29 +
include/configs/mx6slevk.h | 14 ++
2 files changed, 43 insertions(+)
diff --git a/board/freescale/mx6slevk
Add usb support for mx6sabresd.
Signed-off-by: Peng Fan
Signed-off-by: Ye.Li
---
board/freescale/mx6sabresd/mx6sabresd.c | 53 +
include/configs/mx6sabresd.h| 14 +
2 files changed, 67 insertions(+)
diff --git a/board/freescale/mx6sabresd
function. ehci_hcd_init and otg power polarity in ehci-mx6.c are not touched.
Thus usb start can not work fine. As this is new feature support, post
this patch set for review first.
In future patch, related patch that maybe bugfix to make `usb start` fine
will be sent out.
Peng Fan (5
Add a new function mxc_iomux_set_gpr_register to
set the iomux gpr register.
32-bit general purpose registers according to SoC
requirements for any usage.
Signed-off-by: Peng Fan
Signed-off-by: Ye.Li
Signed-off-by: Nitin Garg
---
arch/arm/imx-common/iomux-v3.c | 25
This patch "arm:imx-common introduce a new function to set gpr"
missed to add the function prototype.
Signed-off-by: Peng Fan
---
arch/arm/include/asm/imx-common/iomux-v3.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/include/asm/imx-common/iomux-v3.h
b/arch/arm/i
Add pad settings for usb support.
This patch "imx:mx6slevk add usb support" missed to add pad
definition.
Signed-off-by: Peng Fan
---
arch/arm/include/asm/arch-mx6/mx6sl_pins.h | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/include/asm/arch-mx6/mx6sl_pins.h
board related kgdb serial code is not fine for patch review,
I just sent out the common code for review.
I am not sure whether this patch set will break other platform's kgdb support
or not, so request for comment.
Peng Fan (2):
kgdb: add breakpoint support
arm:kgdb add KGDB support fo
The register save/restore:
Use get_bad_stack and bad_save_user_regs to save regs.
Introduce und_restore_regs to restore the previous regs before
trigger a breakpoint.
Signed-off-by: Peng Fan
---
arch/arm/include/asm/proc-armv/ptrace.h | 2 +-
arch/arm/include/asm/signal.h | 1
Add Z/z protocal support for breakpoint set/remove.
Signed-off-by: Peng Fan
---
common/kgdb.c | 273 +
include/kgdb.h | 35
2 files changed, 308 insertions(+)
diff --git a/common/kgdb.c b/common/kgdb.c
index d357463..fd83ccd
On 11/01/2014 03:39 PM, Li Ye-B37916 wrote:
> Hi Peng,
>
>
>
> On 11/1/2014 10:19 AM, Peng Fan wrote:
>> Add a new function mxc_iomux_set_gpr_register to
>> set the iomux gpr register.
>>
>> 32-bit general purpose registers according to SoC
>> re
Hi,
在 11/3/2014 8:28 PM, Stefano Babic 写道:
Hi Peng,
On 01/11/2014 03:19, Peng Fan wrote:
Add usb support for mx6sxsabresd board.
Signed-off-by: Peng Fan
Signed-off-by: Ye.Li
---
board/freescale/mx6sxsabresd/mx6sxsabresd.c | 29 +
include/configs
Write a function named get_cpu_rev to make it support
runtime checking using "is_cpu_type(MXC_CPU_xx)".
Also introduce a macro MXC_CPU_MX27 with value 0x27.
Signed-off-by: Peng Fan
Cc: Stefano Babic
---
Note:
Based on https://patchwork.ozlabs.org/patch/505618/ to support runtime
c
Add enet support for mx6ul_14x14_evk board:
1. add pinmux settings
2. implement board_eth_init
3. implement board_phy_config
Signed-off-by: Peng Fan
Cc: Stefano Babic
Cc: Fabio Estevam
---
Changes v2:
Addressed Fabio's comments, using "fec_id == 0", but not "0 == fec_id
The MIB RAM and FIFO receive start register does not exist on
i.MX6UL. Accessing these register will cause enet not work well.
Signed-off-by: Peng Fan
Signed-off-by: Fugang Duan
Cc: Joe Hershberger
Cc: Stefano Babic
---
Changes v2:
Using runtime check, but not hardcoding "#ifdef&qu
To i.MX6SX/UL, two ethernet interfaces are supported.
Add ENET2 clock support:
1. Introduce a new input parameter "fec_id", only 0 and 1 are allowed.
To value 1, only i.MX6SX/UL can pass the check.
2. Modify board code who use this api to follow new api prototype.
Signed-off-by: Pe
Wrong patch version. Please ignore.
Sorry.
Peng.
On Wed, Aug 12, 2015 at 05:40:47PM +0800, Peng Fan wrote:
>Add enet support for mx6ul_14x14_evk board:
>1. add pinmux settings
>2. implement board_eth_init
>3. implement board_phy_config
>
>Signed-off-by: Peng Fan
>Cc: Stef
Add enet support for mx6ul_14x14_evk board:
1. add pinmux settings
2. implement board_eth_init
3. implement board_phy_config
Signed-off-by: Peng Fan
Cc: Stefano Babic
Cc: Fabio Estevam
---
Changes v2:
Addressed Fabio's comments, using "fec_id == 0", but not "0 == fec_id
The MIB RAM and FIFO receive start register does not exist on
i.MX6UL. Accessing these register will cause enet not work well.
Signed-off-by: Peng Fan
Signed-off-by: Fugang Duan
Cc: Joe Hershberger
Cc: Stefano Babic
---
Changes v2:
Using runtime check, but not hardcoding "#ifdef&qu
To i.MX6SX/UL, two ethernet interfaces are supported.
Add ENET2 clock support:
1. Introduce a new input parameter "fec_id", only 0 and 1 are allowed.
To value 1, only i.MX6SX/UL can pass the check.
2. Modify board code who use this api to follow new api prototype.
Signed-off-by: Pe
Hi Stefano,
On Wed, Aug 12, 2015 at 05:50:36PM +0200, Stefano Babic wrote:
>On 12/08/2015 11:40, Peng Fan wrote:
>> Write a function named get_cpu_rev to make it support
>> runtime checking using "is_cpu_type(MXC_CPU_xx)".
>>
>> Also introduce a macro MXC_CP
Hi Stefano,
On Wed, Aug 12, 2015 at 05:49:15PM +0200, Stefano Babic wrote:
>Hi Peng,
>
>On 10/08/2015 14:53, Peng Fan wrote:
>> Move most macro definitions and prototypes into
>> "arch/arm/include/asm/imx-common/sys_proto.h" to avoid duplicated
>> function
Implement get_cpu_rev to support runtime check using is_cpu_type.
Signed-off-by: Peng Fan
Cc: Stefano Babic
Reviewed-by: Stefano Babic
---
Changes v2:
New patch.
arch/arm/cpu/arm926ejs/mx27/generic.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/cpu/arm926ejs/mx27
Add cpu types for i.MX2/3.
Signed-off-by: Peng Fan
Cc: Stefano Babic
Reviewed-by: Stefano Babic
---
Changes v2:
Add mx27 cpu type.
arch/arm/include/asm/arch-imx/cpu.h | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/include/asm/arch-imx/cpu.h
b/arch/arm/include/asm/arch
Use new formula for get_cpu_rev, since we need to use this formula
to do runtime check for all i.MXes.
Signed-off-by: Peng Fan
Cc: Stefano Babic
Reviewed-by: Stefano Babic
---
Changes v2:
none
arch/arm/cpu/arm1136/mx31/generic.c| 2 +-
arch/arm/include/asm/arch-mx31/sys_proto.h | 2
Rewrite get_cpu_rev, from "static const char *get_cpu_rev(void)" to
"u32 get_cpu_rev(void)". To align with get_cpu_rev of other i.MXes.
Also write get_imx_type to replace get_cpu_type, since we have
macro named get_cpu_type.
Signed-off-by: Peng Fan
Cc: Stefano Babic
Review
r code and others. This patch
remove duplicated macros and prototypes and incude "sys_proto.h"
of imx-common for each sys_proto.h of different i.MX platforms.
Then later we should avoid add stuff in sys_proto.h of each platform,
and modify driver to include common sys_proto.h.
Signed-
i.MX 6SoloLite only supports MMDC0, so do not access MMDC1 for i.MX 6SL.
Signed-off-by: Peng Fan
Cc: Stefano Babic
Cc: Tim Harvey
---
arch/arm/cpu/armv7/mx6/ddr.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arm/cpu/armv7/mx6/ddr.c b/arch/arm/cpu/armv7/mx6
Add more register entry for MMDC structure.
Signed-off-by: Peng Fan
Cc: Stefano Babic
Cc: Tim Harvey
---
arch/arm/include/asm/arch-mx6/mx6-ddr.h | 65 -
1 file changed, 56 insertions(+), 9 deletions(-)
diff --git a/arch/arm/include/asm/arch-mx6/mx6-ddr.h
b
Define two structure mx6sl_iomux_ddr_regs and mx6sl_iomux_grp_regs.
Add a new function mx6sl_dram_iocfg to configure dram io.
Add header file to define macros for register address.
Signed-off-by: Peng Fan
Cc: Stefano Babic
---
arch/arm/cpu/armv7/mx6/ddr.c | 55
To Chip density 4Gb, tRFC should be 300ns, see
"Table 61 — Refresh parameters by device density" of JESD79-3E.
tXS(min) is max(5nCK, tRFC(min) + 10ns).
Signed-off-by: Peng Fan
Cc: Stefano Babic
Cc: Tim Harvey
---
arch/arm/cpu/armv7/mx6/ddr.c | 4 ++--
1 file changed, 2 insert
Add mpzqlp2ctl entry for mx6_mmdc_calibration.
MMDC_MPZQLP2CTL register is for init tZQINIT, tZQCL, tZQCS for LPDDR2 chips.
Signed-off-by: Peng Fan
Cc: Stefano Babic
Cc: Tim Harvey
---
arch/arm/include/asm/arch-mx6/mx6-ddr.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm
Add ddr_type entry for mx6_ddr_sysinfo. It will be used for
differenrate DDR3 and LPDDR2.
Signed-off-by: Peng Fan
Cc: Stefano Babic
Cc: Tim Harvey
---
arch/arm/include/asm/arch-mx6/mx6-ddr.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/include/asm/arch-mx6/mx6-ddr.h
b/arch
.
Initialize ddr_type for different boards which enable SPL.
Signed-off-by: Peng Fan
Cc: Stefano Babic
Cc: Tim Harvey
Cc: Stefan Roese
Cc: Fabio Estevam
---
arch/arm/cpu/armv7/mx6/ddr.c | 14 +-
arch/arm/include/asm/arch-mx6/mx6-ddr.h | 2 +-
board
init MMDC.
4. Update comments.
Signed-off-by: Peng Fan
Cc: Stefano Babic
Cc: Tim Harvey
---
arch/arm/cpu/armv7/mx6/ddr.c| 300 +++-
arch/arm/include/asm/arch-mx6/mx6-ddr.h | 15 ++
2 files changed, 311 insertions(+), 4 deletions(-)
diff --git a/arch/arm
referencing MX6SL LPDDR2 Script Aid V0.04.xlsx
and JESD209-2E. I am not DDR expert, can not guarantee that this can
achieve production quality. Please review.
Patchset tested boot on mx6sxsabresd revb and mx6slevk board.
Peng Fan (9):
imx: mx6: ddr add more register entry for mmdc_p_regs
imx
-off-by: Peng Fan
Cc: Stefano Babic
Cc: Fabio Estevam
---
arch/arm/cpu/armv7/mx6/Kconfig | 1 +
board/freescale/mx6slevk/mx6slevk.c | 164
configs/mx6slevk_spl_defconfig | 8 ++
include/configs/imx6_spl.h | 2 +-
include/configs
On Mon, Aug 17, 2015 at 08:54:25AM +0200, Stefan Roese wrote:
>On 17.08.2015 05:29, Peng Fan wrote:
>>To i.MX6, DDR3 and LPDDR2 is supported, so rename function mx6_dram_cfg
>>to mx6_ddr3_cfg and the original mx6_dram_cfg function only is a wrapper.
>>The new reimplemented
On Mon, Aug 17, 2015 at 09:20:15AM +0200, Stefan Roese wrote:
>On 17.08.2015 07:59, Peng Fan wrote:
>>On Mon, Aug 17, 2015 at 08:54:25AM +0200, Stefan Roese wrote:
>>>On 17.08.2015 05:29, Peng Fan wrote:
>>>>To i.MX6, DDR3 and LPDDR2 is supported, so renam
referencing MX6SL LPDDR2 Script Aid V0.04.xlsx
and JESD209-2E. I am not DDR expert, can not guarantee that this can
achieve production quality. Please review.
Patchset tested boot on mx6sxsabresd revb and mx6slevk board.
Peng Fan (9):
imx: mx6: ddr add more register entry for mmdc_p_regs
imx
Add more register entry for MMDC structure.
Signed-off-by: Peng Fan
Cc: Stefano Babic
Cc: Tim Harvey
---
arch/arm/include/asm/arch-mx6/mx6-ddr.h | 65 -
1 file changed, 56 insertions(+), 9 deletions(-)
diff --git a/arch/arm/include/asm/arch-mx6/mx6-ddr.h
b
Add mpzqlp2ctl entry for mx6_mmdc_calibration.
MMDC_MPZQLP2CTL register is for init tZQINIT, tZQCL, tZQCS for LPDDR2 chips.
Signed-off-by: Peng Fan
Cc: Stefano Babic
Cc: Tim Harvey
---
arch/arm/include/asm/arch-mx6/mx6-ddr.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm
Add ddr_type entry for mx6_ddr_sysinfo. It will be used for
differenrate DDR3 and LPDDR2.
Introduce an enum type for ddr_type.
Signed-off-by: Peng Fan
Cc: Stefano Babic
Cc: Tim Harvey
---
arch/arm/include/asm/arch-mx6/mx6-ddr.h | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch
Define two structure mx6sl_iomux_ddr_regs and mx6sl_iomux_grp_regs.
Add a new function mx6sl_dram_iocfg to configure dram io.
Add header file to define macros for register address.
Signed-off-by: Peng Fan
Cc: Stefano Babic
---
arch/arm/cpu/armv7/mx6/ddr.c | 55
To Chip density 4Gb, tRFC should be 300ns, see
"Table 61 — Refresh parameters by device density" of JESD79-3E.
tXS(min) is max(5nCK, tRFC(min) + 10ns).
Signed-off-by: Peng Fan
Cc: Stefano Babic
Cc: Tim Harvey
---
arch/arm/cpu/armv7/mx6/ddr.c | 4 ++--
1 file changed, 2 insert
i.MX 6SoloLite only supports MMDC0, so do not access MMDC1 for i.MX 6SL.
Signed-off-by: Peng Fan
Cc: Stefano Babic
Cc: Tim Harvey
---
arch/arm/cpu/armv7/mx6/ddr.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arm/cpu/armv7/mx6/ddr.c b/arch/arm/cpu/armv7/mx6
.
Initialize ddr_type for different boards which enable SPL.
Signed-off-by: Peng Fan
Cc: Stefano Babic
Cc: Tim Harvey
Cc: Stefan Roese
Cc: Fabio Estevam
Reviewed-by: Stefan Roese
---
arch/arm/cpu/armv7/mx6/ddr.c | 14 +-
arch/arm/include/asm/arch-mx6/mx6
init MMDC.
4. Update comments.
Signed-off-by: Peng Fan
Cc: Stefano Babic
Cc: Tim Harvey
---
arch/arm/cpu/armv7/mx6/ddr.c| 300 +++-
arch/arm/include/asm/arch-mx6/mx6-ddr.h | 15 ++
2 files changed, 311 insertions(+), 4 deletions(-)
diff --git a/arch/arm
Enable CONFIG_SPL_FAT_SUPPORT to load u-boot.img from FAT partition.
Signed-off-by: Peng Fan
---
include/configs/mx6sxsabresd.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/configs/mx6sxsabresd.h b/include/configs/mx6sxsabresd.h
index 848bdcd..74d04a0 100644
--- a/include/configs
-off-by: Peng Fan
Cc: Stefano Babic
Cc: Fabio Estevam
---
arch/arm/cpu/armv7/mx6/Kconfig | 1 +
board/freescale/mx6slevk/mx6slevk.c | 164
configs/mx6slevk_spl_defconfig | 8 ++
include/configs/imx6_spl.h | 2 +-
include/configs
Discard MX6UL from CONFIG_SYS_EXTRA_OPTIONS, since we default
select MX6UL for mx6ul_14x14_evk board.
Signed-off-by: Peng Fan
Cc: Stefano Babic
Cc: Fabio Estevam
---
configs/mx6ul_14x14_evk_defconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/configs
To i.MX6UL, SYS_L2CACHE_OFF is selected, but there is no Kconfig entry
for SYS_L2CACHE_OFF. Then "select SYS_L2CACHE_OFF" does not effect for
i.MX6UL, which is not expected.
Since SYS_L2CACHE_OFF is mainly used by ARM architecture, add it to
arch/arm/Kconfig.
Signed-off-by: Peng Fan
There is no need to expose SoC choice to user, we already got
the SoC according to the build target. So default "select MX6UL"
for MX6UL_14x14_EVK target.
Signed-off-by: Peng Fan
Cc: Stefano Babic
Cc: Fabio Estevam
---
Hi Stefano,
>From my side, I think we need to select M
Hi Stefano,
On Sun, Aug 23, 2015 at 05:45:45PM +0200, Stefano Babic wrote:
>On 12/08/2015 10:34, Peng Fan wrote:
>> Wrong patch version. Please ignore.
>>
>
>It is, discarded.
Can you please pick this one instead?
http://lists.denx.de/pipermail/u-boot/2015-August/223124
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