On 25.08.20 10:46, Pali Rohár wrote:
On Thursday 20 August 2020 10:00:52 Stefan Roese wrote:
I suggest to "depend" this driver on DM_GPIO and include the GPIO code
without any #ifdef's. And please run a world-build (buildman, Travis...)
to see, if nothing breaks.
I sent th
ivers failed to bind
alloc space exhausted
initcall sequence fff6a760 failed at call fff13b3d (err=-19)
This patch now increases CONFIG_SYS_MALLOC_F_LEN to 0x1000, which is
already used on qemu-x86_64_defconfig.
Signed-off-by: Stefan Roese
Cc: Tom Rini
Cc: Simon Glass
Cc: Bin Meng
---
configs/qe
arvell.git
for you to fetch changes up to 6944937f9c4d21f39dd257bce7b677a0f6849cea:
x86: qemu-x86_defconfig: Increase CONFIG_SYS_MALLOC_F_LEN (2020-08-25
11:37:57 +0200)
--------
Stefan Roese (5):
dm: core: Add API to read PCI bus-range pro
bi_memstart & bi_memsize from bd_info
(2020-08-26 09:20:05 +0200)
----
Stefan Roese (10):
CONFIG_NR_DRAM_BANKS: Remove unreferenced code as its always defined
image: Use gd->ram_base/_size in env_get_bootm_size()
Hi Jagan,
On 05.08.20 15:07, Stefan Roese wrote:
Octeon TX2 sets the TB100_EN bit in the config register. We need to use
a fixed 100MHz clock for this as well to work properly.
Signed-off-by: Stefan Roese
Cc: Aaron Williams
Cc: Suneel Garapati
Cc: Chandrakala Chavva
Cc: Jagan Teki
On 26.08.20 13:42, Tom Rini wrote:
On Wed, Aug 26, 2020 at 09:31:07AM +0200, Stefan Roese wrote:
Hi Tom,
I've prepared a branch for you to pull the "Remove CONFIG_NR_DRAM_BANKS
option and bi_memstart/memsize from bd_info" patchset, if you care to
pull from it. I've rebased
From: Suneel Garapati
Adds support for NAND controllers found on OcteonTX or
OcteonTX2 SoC platforms. Also includes driver to support
Hardware ECC using BCH HW engine found on these platforms.
Signed-off-by: Aaron Williams
Signed-off-by: Suneel Garapati
Signed-off-by: Stefan Roese
---
Series
From: Suneel Garapati
Adds support for Network Interface controllers found on
OcteonTX2 SoC platforms.
Signed-off-by: Suneel Garapati
Signed-off-by: Stefan Roese
Cc: Joe Hershberger
---
Series-changes: 3
- Add SoB from Stefan
- Remove spdx.org line from comment
- Remove inclusion of common.h
Hi Daniel,
On 21.08.20 13:25, Stefan Roese wrote:
Hi Daniel,
On 19.08.20 16:47, Daniel Schwierzeck wrote:
Am Montag, den 17.08.2020, 14:12 +0200 schrieb Stefan Roese:
From: Aaron Williams
This Octeon 3 DDR driver is ported from the 2013 Cavium / Marvell U-Boot
repository. It currently
Hi Rayagonda,
On 26.07.20 19:07, Rayagonda Kokatanur wrote:
Use device tree and UCLASS_IRQ driver to get following
Generic Interrupt Controller (GIC) details,
-GIC Distributor interface (GICD) base address and
-GIC Redistributors (GICR) base address.
Signed-off-by: Rayagonda Kokatanur
Reviewe
resses for envs.
[1] -
https://github.com/MarvellEmbeddedProcessors/u-boot-marvell/commit/0a5b159806baa0746b6449920e450498bc269ba7
Signed-off-by: Pali Rohár
Reviewed-by: Stefan Roese
Thanks,
Stefan
---
Changes in V2:
* Move also ramdisk_addr_r, so there is enough space for kernel
* Drop pat
[1] -
https://github.com/MarvellEmbeddedProcessors/u-boot-marvell/commit/0a5b159806baa0746b6449920e450498bc269ba7
Signed-off-by: Pali Rohár
Reviewed-by: Stefan Roese
Thanks,
Stefan
---
include/configs/mvebu_armada-37xx.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/configs/mvebu
On 27.08.20 15:01, Pali Rohár wrote:
Boot scripts for existing Espressobin Linux distributions, like OpenWRT,
expect that U-Boot set fdt_addr and kernel_addr envs. So add env aliases
from fdt_addr_r and kernel_addr_r values.
Signed-off-by: Pali Rohár
Reviewed-by: Stefan Roese
Thanks
On 27.08.20 15:01, Pali Rohár wrote:
Include information about permanent ethernet MAC address and add link how
to build ATF as U-Boot on Espressobin cannot be flashed without ATF.
Signed-off-by: Pali Rohár
Reviewed-by: Stefan Roese
Thanks,
Stefan
---
doc/README.marvell | 40
Hi Andre,
On 27.08.20 16:31, Andre Heider wrote:
On 27/08/2020 15:01, Pali Rohár wrote:
According to Marvell's U-Boot description [1] current env load addresses
overlaps with ATF RT services region and TEE. Because the ATF RT service
and TEE region is going to be marked as secure and can't be o
On 17.08.20 17:13, Pali Rohár wrote:
Espressobin uses mvneta ethernet driver.
Signed-off-by: Pali Rohár
Applied to u-boot-marvell/master
Thanks,
Stefan
---
configs/mvebu_espressobin-88f3720_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/mvebu_espressobin-88f3720_d
On 17.08.20 16:36, Pali Rohár wrote:
By default Topaz switch on Espressobin board forwards packets between all
ethernet ports, including CPU (port 0), wan (port 1) and lan (ports 2,3).
This default U-Boot setup is unsuitable for using Espressobin as router as
it opens security hole in forwarding
On 19.08.20 15:57, Pali Rohár wrote:
Change active-high to active-low and change DT property name from
reset-gpio to reset-gpios. This format of gpio reset is used by
pci-aardvark driver in Linux kernel.
Signed-off-by: Pali Rohár
Applied to u-boot-marvell/master
Thanks,
Stefan
---
arch/a
e of same DTS bindings as Linux', but till
this is done, we need this patch.
Signed-off-by: Marek Behún
Tested-by: Pali Rohár
Cc: Stefan Roese
Applied to u-boot-marvell/master
Thanks,
Stefan
---
arch/arm/dts/armada-3720-espressobin.dts | 8
1 file changed, 4 insertions(+)
On 19.08.20 15:57, Pali Rohár wrote:
This change ensures that PCIe card is put into reset state when U-Boot
stops using it.
DM_FLAG_OS_PREPARE ensures that U-Boot executes driver's remove callback
prior booting Linux kernel.
Linux kernel pci-aardvark driver needs to reset PCIe card via PERST# s
On 19.08.20 16:19, Pali Rohár wrote:
From: Evan Wang
- The SDIO signal voltage and max base clock frequency
setting are missing in driver, which causes SDIO
not working.
- The patch adds SDIO signal voltage switch support,
which is based on regulator-gpio of vqmmc-supply, and
sets t
On 19.08.20 16:19, Pali Rohár wrote:
From: Wilson Ding
Enabled SDIO slot 0 (south bridge) for SD card on
Espressobin board.
Change-Id: I51a2debf9fba276b9c4a2bc6da91328d47f443e3
Signed-off-by: Wilson Ding
Signed-off-by: Konstantin Porotchkin
Reviewed-on: http://vgitil04.il.marvell.com:8080/60
On 19.08.20 16:24, Pali Rohár wrote:
Espressobin board comes with Marvell's U-Boot version where U-Boot env is
stored in SPI at offset 0x3F. This patch changes env offset in
Espressobin defconfig file to match Marvell's U-Boot version.
Users who want to use previous or different env offset c
On 19.08.20 16:24, Pali Rohár wrote:
Due to different partition layouts in different U-Boot versions, DTS for
Espressobin in Linux does not contain any definition of MTD partitions.
See commit https://git.kernel.org/stable/c/00954566464a4 for more details.
This patch via ft_board_setup() hook fi
On 27.08.20 15:01, Pali Rohár wrote:
According to Marvell's U-Boot description [1] current env load addresses
overlaps with ATF RT services region and TEE. Because the ATF RT service
and TEE region is going to be marked as secure and can't be overwritten,
use different different addresses for env
On 25.08.20 10:45, Pali Rohár wrote:
For proper initialization of aardvark pci driver it is required to
de-assert reset GPIO. So depeneds on DM_GPIO option.
Signed-off-by: Pali Rohár
Applied to u-boot-marvell/master
Thanks,
Stefan
---
drivers/pci/Kconfig| 1 +
drivers/pci/pci-a
On 27.08.20 15:01, Pali Rohár wrote:
Boot scripts for existing Espressobin Linux distributions, like OpenWRT,
expect that U-Boot set fdt_addr and kernel_addr envs. So add env aliases
from fdt_addr_r and kernel_addr_r values.
Signed-off-by: Pali Rohár
Applied to u-boot-marvell/master
Thanks,
On 27.08.20 15:01, Pali Rohár wrote:
Include information about permanent ethernet MAC address and add link how
to build ATF as U-Boot on Espressobin cannot be flashed without ATF.
Signed-off-by: Pali Rohár
Applied to u-boot-marvell/master
Thanks,
Stefan
---
doc/README.marvell | 40 ++
On 27.08.20 15:01, Pali Rohár wrote:
Current loadaddr is not writable on Espressobin and 'loadb' command cause
rebooting board. Marvell's U-Boot already set default loadaddr to value
0x0600 [1] and after this change 'loadb' is working fine.
[1] -
https://github.com/MarvellEmbeddedProcessors
Hi Tom,
please pull the next batch of Marvell MVEBU updates. It consists
this time mostly of fixes and very local enhancements.
Here the summary log:
- MVEBU Espressobin fixes and enhancements (fix switch security
issue, enable
image. Only the last test resulted in a permanent hang.
The final version mtmips SPL series (which got merged) was also tested
by Stefan Roese so it should simply work on your VoCore2 board.
You could also switch to tag 2020.07 and test that. It could also be
possible that something else got broken
Hi Mauro,
On 01.09.20 15:09, Mauro Condarelli wrote:
Now problem is "Unable to allocate 209398 bytes for LZMA"
Full trace below.
I assume I should enlarge
#define CONFIG_SYS_MALLOC_LEN (1024 * 1024)
since GARDENA has:
#define CONFIG_SYS_MALLOC_LEN (16 * 1024 * 1024)
but I
This patch adds the initialization call for the Octeon RAM driver to
the Octeon platforms code. So if enabled via Kconfig, the DDR driver
will be called and the RAM will be configured and used. If the RAM
driver is not enabled, the L2 cache is still used as RAM.
Signed-off-by: Stefan Roese
From: Aaron Williams
This header is used by the upcoming DDR driver and potentially by other
drivers ported from the 2013 Cavium / Marvell U-Boot repository.
Signed-off-by: Aaron Williams
Signed-off-by: Stefan Roese
---
Changes in v3:
- Remove "https://spdx.org/licenses"; l
This patch adds the memory controller (LMC) DT node to the Octeon 3 dtsi
file. It also adds the L2C DT node, as this is referenced by the DDR
driver.
Signed-off-by: Stefan Roese
---
(no changes since v1)
arch/mips/dts/mrvl,cn73xx.dtsi | 17 +
1 file changed, 17 insertions
-model.h header
mips: octeon Add cvmx/cvmx-lmcx-defs.h header
mips: octeon: Add octeon_ddr.h header
ram: octeon: Add MIPS Octeon3 DDR4 support (part 1/3)
ram: octeon: Add MIPS Octeon3 DDR4 support (part 2/3)
ram: octeon: Add MIPS Octeon3 DDR4 support (part 3/3)
Stefa
; 16 GiB).
Signed-off-by: Stefan Roese
---
(no changes since v1)
board/Marvell/octeon_ebb7304/board.c | 25 +-
board/Marvell/octeon_ebb7304/board_ddr.h | 447 +++
configs/octeon_ebb7304_defconfig | 3 +
include/configs/octeon_common.h | 11 +-
4 f
based probing.
Signed-off-by: Aaron Williams
Signed-off-by: Stefan Roese
---
Changes in v3:
- Remove "https://spdx.org/licenses"; line
- Remove inclusion of "common.h"
Changes in v2:
- Don't re-init after relocation
- Some unsupported Octeon families removed (only Oc
integration.
Signed-off-by: Aaron Williams
Signed-off-by: Stefan Roese
---
Changes in v3:
- Remove "https://spdx.org/licenses"; line
- Remove inclusion of "common.h"
drivers/ram/Kconfig | 1 +
drivers/ram/Makefile | 2 +
drivers/ram/octeon/Kco
From: Aaron Williams
This header will be used by the DDR driver (lmc). Its ported from the
2013 Cavium / Marvell U-Boot repository.
Signed-off-by: Aaron Williams
Signed-off-by: Stefan Roese
---
Changes in v3:
- Remove "https://spdx.org/licenses"; line
- Remove inclusion of
From: Aaron Williams
This header will be used by the DDR driver (lmc). Its ported from the
2013 Cavium / Marvell U-Boot repository.
Signed-off-by: Aaron Williams
Signed-off-by: Stefan Roese
---
Changes in v3:
- Remove "https://spdx.org/licenses"; line
Changes in v2:
- Some u
_SUPPORT) \
+&& defined(CONFIG_SPL_LIBCOMMON_SUPPORT)\
+&& !defined(CONFIG_SILENT_CONSOLE)
Nitpicking:
I think its preferred to put the "&&" (or "||") at the end of the line.
Other than that:
Reviewed-by: Stefan Roese
Thanks,
Stefan
://vgitil04.il.marvell.com:8080/53601
Reviewed-by: Igal Liberman
Tested-by: Igal Liberman
[a.heider: adapt to mainline]
Signed-off-by: Andre Heider
Reviewed-by: Stefan Roese
Thanks,
Stefan
---
This is based on the downstream patch:
https://github.com/MarvellEmbeddedProcessors/u-boot-marvell
.il.marvell.com:8080/61236
Tested-by: iSoC Platform CI
Reviewed-by: Igal Liberman
Reviewed-by: Stefan Roese
Thanks,
Stefan
---
configs/mvebu_espressobin-88f3720_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/mvebu_espressobin-88f3720_defconfig
b/configs
Platform CI
Reviewed-by: Grzegorz Jaszczyk
Reviewed-by: Stefan Chulski
Reviewed-by: Stefan Roese
Thanks,
Stefan
---
configs/mvebu_espressobin-88f3720_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/mvebu_espressobin-88f3720_defconfig
b/configs/mvebu_espressobin
On 31.08.20 05:34, Andre Heider wrote:
This adds the disabled eMMC node.
Signed-off-by: Andre Heider
Reviewed-by: Stefan Roese
Thanks,
Stefan
---
arch/arm/dts/armada-3720-espressobin.dts | 63 +---
1 file changed, 23 insertions(+), 40 deletions(-)
diff --git a
: Id1a4f3ca01a6e52df57bf7279f33f0fe45f8ed18
Signed-off-by: Konstantin Porotchkin
Reviewed-on: http://vgitil04.il.marvell.com:8080/61290
Tested-by: iSoC Platform CI
[a.heider: adapt to mainline]
Signed-off-by: Andre Heider
Reviewed-by: Stefan Roese
Thanks,
Stefan
---
v2: base upon downstream
Hi Andre,
On 31.08.20 09:53, Pali Rohár wrote:
On Monday 31 August 2020 05:34:07 Andre Heider wrote:
This adds the disabled eMMC node.
Signed-off-by: Andre Heider
---
arch/arm/dts/armada-3720-espressobin.dts | 63 +---
1 file changed, 23 insertions(+), 40 deletions(-)
Hi Andre,
On 04.09.20 14:35, Andre Heider wrote:
First I though that you have been syncing the file with the Linux kernel
version. But now I see that its sync'ed with downstream U-Boot most
likely. As for the license of the file: The Linux kernel version has
this SPDX tag:
// SPDX-License-Id
On 04.09.20 11:00, Stefan Roese wrote:
On 31.08.20 08:48, Andre Heider wrote:
From: Konstantin Porotchkin
Include support for CONFIG_SPI_FLASH_GIGADEVICE for supporting
newly produces EspressoBin boards (v7)
Change-Id: I5d4b972cbe2ee5a9d52ce9908794ad4e1b59ee3b
Signed-off-by: Konstantin
On 04.09.20 11:00, Stefan Roese wrote:
On 31.08.20 08:48, Andre Heider wrote:
From: Konstantin Porotchkin
Enable support of ISSI SPI flashes found on EspressoBIN boards
Change-Id: I6de61c48f108fb4f410f321b9db45887d23212e5
Signed-off-by: Konstantin Porotchkin
Reviewed-on: http://vgitil04
On 04.09.20 10:57, Stefan Roese wrote:
On 28.08.20 16:56, Andre Heider wrote:
From: zachary
- This patch moves sata phy powerup from dedicate phy to compphy
and adds invert option for sata powerup routine.
Change-Id: I1b4e8753e2b2c14c6efa97bca2ffc7d2553d8a90
Signed-off-by: zachary
Signed
Hi Tom,
please pull the next batch of Marvell MVEBU updates. Here the summary
log:
- Fix SATA issue on Armada 3720
- Enable more SPI NOR chips in espressobin defconfig
---
27;ll pick this into next branch.
I've tested it on the LX2160A-RDB and it the speed improvement is
quite impressive. Thanks for working on this.
Tested-by: Stefan Roese
Thanks,
Stefan
Thanks,
Peng.
Thank you.
Best regards,
Yangbo Lu
-Original Message-
From: Yangbo Lu
On 09.09.20 10:14, Priyanka Jain wrote:
This is required to fix
"Error binding driver 'gic-v3': -96"
on lx2160a platforms.
Signed-off-by: Priyanka Jain
---
arch/arm/lib/gic-v3-its.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/lib/gic-v3-its.c b/arch/arm/lib/gic-v3-its.c
On 09.09.20 01:32, Chris Packham wrote:
On 7/09/20 3:05 pm, Pratyush Yadav wrote:
On 06/09/20 08:34PM, Chris Packham wrote:
On 5/09/20 3:39 am, Pratyush Yadav wrote:
Chris,
On 04/09/20 09:04PM, Pratyush Yadav wrote:
The SPI NOR core will get Octal DTR in following commits. This has
presente
nd - start + 1)
/ 2 /
+ sizeof(unsigned long),
+ (end - start + 1) / 2 /
sizeof(unsigned long));
Thanks for finding and fixing this:
Reviewed-by: Stefan Roese
Hi Ralph,
On 09.09.20 15:06, Ralph Siemsen wrote:
Hi Stefan,
On Wed, Sep 09, 2020 at 10:49:29AM +0200, Stefan Roese wrote:
Hi Ralph,
Thanks for finding and fixing this:
I've sent a v2 with the suggested changes.
Yes, thanks.
Have also noticed that mtest takes considerably longer
ts a count rather than an "ending" address. Thus it fails to test
the last word of the requested range. Fixed by using (end - start + 1).
Fixes: 8e434cb705d463bc8cff935160e4fb4c77cb99ab ("cmd: mem: Add bitflip
memory test to alternate mtest")
Signed-off-by: Ralph Siemsen
Revi
Hi Ralph,
On 09.09.20 15:49, Ralph Siemsen wrote:
Hi Stefan,
On Wed, Sep 09, 2020 at 03:34:35PM +0200, Stefan Roese wrote:
I agree that it's too time consuming (usually) for a manufacturing test.
Either you are okay with disabling CONFIG_SYS_ALT_MEMTEST on your board,
which will also di
Hi Ralph,
On 09.09.20 17:07, Ralph Siemsen wrote:
Hi Stefan,
On Wed, Sep 09, 2020 at 03:53:08PM +0200, Stefan Roese wrote:
Hi Ralph,
On 09.09.20 15:49, Ralph Siemsen wrote:
Very good, I will send a separate patch that adds a Kconfig option.
As it turns out, doing a separate patch for
On 09.09.20 17:21, Ralph Siemsen wrote:
The bitflip test uses two equal sized memory buffers. This is achieved
by splitting the range of memory into two pieces. The address of the
second buffer, as well as the length of each buffer, were not correctly
calculated. This caused bitflip test to acces
d463bc8cff935160e4fb4c77cb99ab ("cmd: mem: Add bitflip
memory test to alternate mtest")
Signed-off-by: Ralph Siemsen
Reviewed-by: Stefan Roese
Thanks,
Stefan
--
Changes in v5:
- Correct logic for updating error count
Changes in v4:
- Avoid #ifdef in the code
Change-Id: Ie641d04e73
Hi Rayagonda,
On 09.09.20 19:15, Rayagonda Kokatanur wrote:
Hi Stefan,
On Wed, Sep 9, 2020 at 1:57 PM Stefan Roese wrote:
On 09.09.20 10:14, Priyanka Jain wrote:
This is required to fix
"Error binding driver 'gic-v3': -96"
on lx2160a platforms.
Signed-off-by: Priyan
On 10.09.20 07:58, Rayagonda Kokatanur wrote:
Hi Stefan,
On Thu, Sep 10, 2020 at 10:53 AM Stefan Roese wrote:
Hi Rayagonda,
On 09.09.20 19:15, Rayagonda Kokatanur wrote:
Hi Stefan,
On Wed, Sep 9, 2020 at 1:57 PM Stefan Roese wrote:
On 09.09.20 10:14, Priyanka Jain wrote:
This is
Hi Pali, Andre and others,
On 10.09.20 21:04, Pali Rohár wrote:
On Thursday 10 September 2020 19:53:40 Andre Heider wrote:
Use mmc_of_parse() to set the common host properties. That includes
"bus-width", so parsing it can be removed from the driver.
But more importantly, "non-removable" is now
On 11.09.20 14:09, Marek Behún wrote:
On Fri, 11 Sep 2020 10:37:42 +0200
Andre Heider wrote:
On 11/09/2020 08:43, Stefan Roese wrote:
Hi Pali, Andre and others,
On 10.09.20 21:04, Pali Rohár wrote:
On Thursday 10 September 2020 19:53:40 Andre Heider wrote:
Use mmc_of_parse() to set the
Enable MMC support including the regulator support on Octeon EBB7304.
Signed-off-by: Stefan Roese
Cc: Aaron Williams
Cc: Chandrakala Chavva
Cc: Daniel Schwierzeck
---
configs/octeon_ebb7304_defconfig | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/configs
Add the MMC DT node to the Octeon CN73xx dtsi file.
Signed-off-by: Stefan Roese
Cc: Aaron Williams
Cc: Chandrakala Chavva
Cc: Daniel Schwierzeck
---
arch/mips/dts/mrvl,cn73xx.dtsi | 27 +++
1 file changed, 27 insertions(+)
diff --git a/arch/mips/dts/mrvl,cn73xx.dtsi
Add the MMC DT node to the Octeon EBB7304 DT file including the
regulator node for the MMC power supply.
Signed-off-by: Stefan Roese
Cc: Aaron Williams
Cc: Chandrakala Chavva
Cc: Daniel Schwierzeck
---
arch/mips/dts/mrvl,octeon-ebb7304.dts | 57 +++
1 file changed, 57
inclusion
- Switch to using the clk framework to get the input clock
- Remove some functions for MIPS Octeon, as some registers don't
exist here
Signed-off-by: Stefan Roese
Cc: Peng Fan
Cc: Aaron Williams
Cc: Chandrakala Chavva
Cc: Daniel Schwierzeck
---
.../include/mach/cvmx-mio-emm-d
On 26.02.21 11:56, Marek Behún wrote:
From: Sujeet Baranwal
commit 258be123226f8f5cd516b7813fe201fb7d7416e9 upstream.
At this moment, only page 0 of SPD is being read but to support
smbios, we need to read page 1 also which has more info. In order
to do that, we need to allocate more space.
S
On 02.03.21 11:17, Pali Rohár wrote:
This syncs drivers/ddr/marvell/a38x/ with the master branch of repository
https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git up to the
commit 7c351731d196 ("Merge pull request #29 from pali/sync-a38x-uboot").
This patch was created by following s
On 04.03.21 11:23, Marek Behún wrote:
In arch/arm/mach-mvebu/dram.c we always include axp's xor.h for common
XOR definitions, regardless whether we compile for axp or a38x.
But the declaration of this function has a different signature in axp's
xor.h from the one used in a38x' implementation - o
On 07.03.21 00:00, Marek Behún wrote:
The arrays `pbs_dq_mapping`, `div_ratio1to1` and `div_ratio2to1` have
different bounds declared in header files where these variables are also
defined from the ones declared in source files.
This causes the compiler to complain (when building with LTO):
d
On 09.03.21 14:54, Tom Rini wrote:
On Mon, Mar 08, 2021 at 07:50:59AM +0100, Stefan Roese wrote:
On 08.03.21 07:45, Marek Behun wrote:
Reviewed-by: Stefan Roese
Thanks, Stefan.
Do you want to merge this into your repo u-boot-marvell, or shall Tom
merge this once this series is mature
On 03.03.21 11:34, Pali Rohár wrote:
Enable support for NVMe disks which can be connected to mPCIe slot via M.2
reduction. Enable btrfs and squashfs filesystems which are used by more
Linux distributions. And enable fsuuid and setexpr commands which can be
useful in scripting.
Signed-off-by: Pal
On 03.03.21 14:37, Pali Rohár wrote:
Marvell Armada 3720 Functional Errata, Guidelines, and Restrictions
document describes in erratum 4.1 PCIe value of vendor ID (Ref #: 243):
The readback value of VEND_ID (RD007h [15:0]) is 1B4Bh, while it
should read 11ABh.
The firmware ca
On 05.03.21 15:52, Pali Rohár wrote:
Config option ARMADA_39X is never set so remove all dead code hidden under
ifdef CONFIG_ARMADA_39X blocks.
Also remove useless checks for CONFIG_ARMADA_38X define as this macro is
always defined for a38x code path.
Signed-off-by: Pali Rohár
Applied to u-b
Hi Tom,
please pull the next batch of Marvell MVEBU related patches. Here the
summary log:
- Some more updates/sync's to A38x DDR3 code (Marek & Pali)
- marvell/ddr/AXP: Some type fixes found in the LTO work (Marek)
- Espressobin:
On 22.03.21 06:13, Simon Glass wrote:
This converts the following to Kconfig:
CONFIG_MISC_INIT_F
Signed-off-by: Simon Glass
Reviewed-by: Stefan Roese
Thanks,
Stefan
---
common/Kconfig | 6 ++
configs/MPC8349ITXGP_defconfig | 1 +
configs
On 23.03.21 05:14, Simon Glass wrote:
At present some drivers use -ENOSUPP to indicate that an unknown or
unsupported clock is used. Most use -EINVAL, indicating an invalid value,
so convert everything to that.
Signed-off-by: Simon Glass
Reviewed-by: Stefan Roese
Thanks,
Stefan
Glass ; Stefan
Roese ; Stephen Warren
Subject: [PATCH] common: board_f: Restore 85xx watchdog support
In commit 75918afa649b ("powerpc: Drop old non-generic-board code") we lost
the call to init_85xx_watchdog() which had the effect of disabling support for
the
watchdog on 85xx and similar
On 24.03.21 08:10, Chris Packham wrote:
On Wed, Mar 24, 2021 at 7:06 PM Stefan Roese wrote:
Hi Chris,
On 23.03.21 13:35, Priyanka Jain wrote:
-Original Message-
From: U-Boot On Behalf Of Chris Packham
Sent: Wednesday, March 3, 2021 2:30 AM
To: u-boot@lists.denx.de
Cc: York Sun
This patchset adds the missing ethernet PHY patches from the Marvell
U-Boot SDK version to support and fix higher connection speeds. This is
done in preparation for the integration of the Octeon TX2 CN913x
support, which uses the updated version of this code.
Thanks,
Stefan
Igal Liberman (1):
From: Stefan Chulski
Lane swapped only if "enet-phy-lane-swap" set in device tree.
Signed-off-by: Stefan Chulski
Tested-by: sa_ip-sw-jenkins
Reviewed-by: Kostya Porotchkin
Reviewed-by: Yan Markman
Reviewed-by: Marcin Wojtas
Signed-off-by: Stefan Roese
---
drivers/net/phy/marv
link resolution loop.
Signed-off-by: Stefan Chulski
Tested-by: sa_ip-sw-jenkins
Reviewed-by: Kostya Porotchkin
Reviewed-by: Yan Markman
Reviewed-by: Marcin Wojtas
Signed-off-by: Stefan Roese
---
drivers/net/phy/marvell.c | 15 +++
1 file changed, 7 insertions(+), 8 deletions
From: Stefan Chulski
Add missed break in speed detection procedure and remove
nested switch.
Signed-off-by: Stefan Chulski
Tested-by: sa_ip-sw-jenkins
Reviewed-by: Kostya Porotchkin
Reviewed-by: Yan Markman
Signed-off-by: Stefan Roese
---
drivers/net/phy/marvell.c | 31
From: Igal Liberman
E2110 support 10M/100M/1G/2.5G/5G speed and use C45 register definition.
Need to use C45 or C22 r13/r14 indirect method to access
Signed-off-by: Kevin Shi
Signed-off-by: Igal Liberman
Signed-off-by: Stefan Roese
---
drivers/net/phy/marvell.c | 205
From: Marcin Wojtas
Allow 88E2110 to configure advertisements for both
SGMII @2.5Ghz and 2500BaseX modes.
Signed-off-by: Marcin Wojtas
Tested-by: sa_ip-sw-jenkins
Reviewed-by: Kostya Porotchkin
Reviewed-by: Stefan Chulski
Reviewed-by: Nadav Haklai
Signed-off-by: Stefan Roese
---
drivers
configuration structure will only
contain valid ports information obtained from the DT.
Signed-off-by: Omri Itach
Signed-off-by: Ken Ma
Signed-off-by: Stefan Roese
---
drivers/phy/marvell/comphy_cp110.c | 51 +++---
1 file changed, 26 insertions(+), 25 deletions(-)
diff --git a
-off-by: Ken Ma
Reviewed-by: Igal Liberman
Signed-off-by: Stefan Roese
---
drivers/phy/marvell/comphy_core.c| 2 +-
include/dt-bindings/comphy/comphy_data.h | 25
2 files changed, 14 insertions(+), 13 deletions(-)
diff --git a/drivers/phy/marvell/comphy_core.c
This patchset adds the missing SERDES patches from the Marvell U-Boot
SDK U-Boot version. This is done in preparation for the integration
of the Octeon TX2 CN913x support, which uses the updated version of
this code.
Thanks,
Stefan
Christine Gharzuzi (1):
phy: marvell: fix handling of unconn
From: Igal Liberman
This allows the lower level driver access to comphy map data
(required for RX training support, which is introduced
in the following patches).
Signed-off-by: Igal Liberman
Signed-off-by: Stefan Roese
---
drivers/phy/marvell/comphy_core.c | 20
: Stefan Roese
---
arch/arm/dts/armada-8040-mcbin.dts | 2 +-
drivers/phy/marvell/comphy_core.c| 14 +++
drivers/phy/marvell/comphy_cp110.c | 3 --
include/dt-bindings/comphy/comphy_data.h | 50 ++--
4 files changed, 27 insertions(+), 42 deletions
when speed > 5.0G.
Signed-off-by: Igal Liberman
Signed-off-by: Stefan Roese
---
drivers/phy/marvell/comphy_core.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/phy/marvell/comphy_core.c
b/drivers/phy/marvell/comphy_core.c
index f1f061d7c116..835fc2e907f2 100
From: Grzegorz Jaszczyk
Replace the comphy initialization for RXAUI with appropriate SMC call,
so the firmware will execute required serdes configuration.
Signed-off-by: Grzegorz Jaszczyk
Reviewed-by: Igal Liberman
Signed-off-by: Stefan Roese
---
drivers/phy/marvell/comphy_cp110.c | 184
an
Signed-off-by: Stefan Roese
---
drivers/phy/marvell/comphy_core.c | 29 +++--
1 file changed, 19 insertions(+), 10 deletions(-)
diff --git a/drivers/phy/marvell/comphy_core.c
b/drivers/phy/marvell/comphy_core.c
index 835fc2e907f2..d3c89c97747e 100644
--- a/drivers/p
From: Grzegorz Jaszczyk
Replace the comphy initialization for USB with appropriate SMC call,
so the firmware will execute required serdes configuration.
Signed-off-by: Grzegorz Jaszczyk
Signed-off-by: Stefan Roese
---
drivers/phy/marvell/comphy_cp110.c | 133 ++---
1
ty, no functional change.
Signed-off-by: Igal Liberman
Signed-off-by: Konstantin Porotchkin
Signed-off-by: Stefan Roese
---
arch/arm/dts/armada-3720-db.dts | 8 +-
arch/arm/dts/armada-3720-espressobin.dts| 12 +-
arch/arm/dts/armada-3720-turris-mox.dts | 12 +-
arch/arm/dts/
801 - 900 of 9173 matches
Mail list logo