(), which, however, would require many other drivers to
change.
In addition to implementing the hook, this patch also removes the call
to the board_mmc_getcd() function which is now called from the MMC
framework and is no longer required here.
Signed-off-by: Thierry Reding thierry.red...@avionic
thread that started it
- add an explanation to patch 3 why the call to board_mmc_getcd() is
removed from the fsl_esdhc driver
- add a cover letter which explains the series' goal
Thierry Reding (4):
mmc: Change board_mmc_getcd() function prototype.
mmc: Implement card detection.
mmc
-off-by: Thierry Reding thierry.red...@avionic-design.de
---
drivers/mmc/tegra2_mmc.c | 32 +---
1 files changed, 13 insertions(+), 19 deletions(-)
diff --git a/drivers/mmc/tegra2_mmc.c b/drivers/mmc/tegra2_mmc.c
index 035a868..5b4c9f6 100644
--- a/drivers/mmc
.
Signed-off-by: Thierry Reding thierry.red...@avionic-design.de
---
drivers/mmc/arm_pl180_mmci.c |1 +
drivers/mmc/bfin_sdh.c |1 +
drivers/mmc/davinci_mmc.c|1 +
drivers/mmc/ftsdc010_esdhc.c |1 +
drivers/mmc/gen_atmel_mci.c |1 +
drivers/mmc/mmc.c| 18
a struct mmc as the first parameter. Furthermore the
cd parameter was used to mean card absence in some implementations and
card presence in others.
Signed-off-by: Thierry Reding thierry.red...@avionic-design.de
---
board/efikamx/efikamx.c |9 +
board/emk/top9000/top9000.c
* Andy Fleming wrote:
Could you rebase these patches on the top of the mmc tree? They don't
apply cleanly anymore, and I don't want to mangle them in my attempts
at hand-application.
Hi Andy,
I just sent out v4, which is rebased on the latest MMC tree (branch master).
The conflict resolution
* Simon Glass wrote:
Use the new funcmux_select() feature to set up the MMC pin mux.
Signed-off-by: Simon Glass s...@chromium.org
Tested on Plutux and Medcom.
Acked-by: Thierry Reding thierry.red...@avionic-design.de
Tested-by: Thierry Reding thierry.red...@avionic-design.de
---
board
)
{
- *cd = at91_get_pio_value(CONFIG_SYS_MMC_CD_PIN) ? 1 : 0;
- return 0;
+ return !at91_get_pio_value(CONFIG_SYS_MMC_CD_PIN);
}
#endif
Reviewed-by: Thierry Reding thierry.red...@avionic-design.de
pgp3tHJNEKC0C.pgp
Description: PGP signature
= gpio_get_value(171);
- } else /* Don't have the CD GPIO pin on board */
- *cd = 0;
+ ret = !gpio_get_value(171);
+ }
- return 0;
+ return ret;
}
Reviewed-by: Thierry Reding thierry.red...@avionic-design.de
pgphLjhQOVPDw.pgp
Description: PGP signature
* Prabhakar Lad wrote:
Thierry,
On 2/6/12, Thierry Reding thierry.red...@avionic-design.de wrote:
* Prabhakar Lad wrote:
Fix build error for mx6qarm2 board due to prototype change
for function board_mmc_getcd().
mx6qarm2.c:123: error: conflicting types for 'board_mmc_getcd'
u-boot
* Prabhakar Lad wrote:
The patch is already accepted by the maintainer,
http://git.denx.de/?p=u-boot/u-boot-imx.git;a=commitdiff;h=e669db1c209eed02ca8c837914c161f5daa2d8fd
so ill drop this fix.
Okay, no problem.
Thierry
pgpcN2ELOFLXt.pgp
Description: PGP signature
On Fri, Jun 14, 2013 at 06:41:40PM +0800, Jim Lin wrote:
Add DT node for USB EHCI function.
Add support for T30-Cardhu, T30-Beaver, T114-Dalmore boards.
Signed-off-by: Jim Lin ji...@nvidia.com
Hi Jim,
none of the patches in this series have a changelog that list the
changes between v1 to
On Fri, Jun 14, 2013 at 06:41:40PM +0800, Jim Lin wrote:
[...]
diff --git a/board/nvidia/dts/tegra30-beaver.dts
b/board/nvidia/dts/tegra30-beaver.dts
[...]
@@ -68,4 +69,9 @@
status = okay;
bus-width = 8;
};
+
+ usb@7d008000 {
+
On Sat, Jun 15, 2013 at 11:28:25PM +0200, Marek Vasut wrote:
Dear Thierry Reding,
On Fri, Jun 14, 2013 at 06:41:40PM +0800, Jim Lin wrote:
[...]
diff --git a/board/nvidia/dts/tegra30-beaver.dts
b/board/nvidia/dts/tegra30-beaver.dts
[...]
@@ -68,4 +69,9
/enhance sdhci (mmc) nodes for all T20 DT files
Tegra: MMC: Add DT support to MMC driver for all T20 boards
I've tested on TEC only, but since Medcom-Wide and Plutux are also based
on Tamonten they should be good as well, so:
Tested-by: Thierry Reding thierry.red...@avionic-design.de
On Mon, Feb 11, 2013 at 10:56:33AM -0700, Tom Warren wrote:
Lucas,
On Mon, Feb 11, 2013 at 10:28 AM, Lucas Stach d...@lynxeye.de wrote:
Hi Tom,
Am Montag, den 11.02.2013, 10:17 -0700 schrieb Tom Warren:
Linux dts files were used for those boards that didn't already
have sdhci info
On Mon, Feb 11, 2013 at 12:21:59PM -0700, Tom Warren wrote:
Thierry/Lucas,
On Mon, Feb 11, 2013 at 12:11 PM, Thierry Reding
thierry.red...@avionic-design.de wrote:
On Mon, Feb 11, 2013 at 10:56:33AM -0700, Tom Warren wrote:
Lucas,
On Mon, Feb 11, 2013 at 10:28 AM, Lucas Stach d
On Tue, Feb 12, 2013 at 07:51:55AM +0100, Thierry Reding wrote:
On Mon, Feb 11, 2013 at 12:21:59PM -0700, Tom Warren wrote:
Thierry/Lucas,
On Mon, Feb 11, 2013 at 12:11 PM, Thierry Reding
thierry.red...@avionic-design.de wrote:
On Mon, Feb 11, 2013 at 10:56:33AM -0700, Tom Warren
On Tue, Feb 12, 2013 at 11:41:09AM +0100, Thierry Reding wrote:
On Tue, Feb 12, 2013 at 07:51:55AM +0100, Thierry Reding wrote:
On Mon, Feb 11, 2013 at 12:21:59PM -0700, Tom Warren wrote:
Thierry/Lucas,
On Mon, Feb 11, 2013 at 12:11 PM, Thierry Reding
thierry.red...@avionic
On Tue, Feb 12, 2013 at 01:19:18PM -0700, Stephen Warren wrote:
On 02/12/2013 03:41 AM, Thierry Reding wrote:
...
So it turned out that I need to touch U-Boot anyway, so I decided
to give this a spin. I noticed that overriding
CONFIG_ARCH_DEVICE_TREE from the board configuration file
On Wed, Feb 13, 2013 at 02:44:49PM -0700, Tom Warren wrote:
Tamonten boards (medcom-wide, plutux, and tec) use a different/new
dtsi file w/common settings.
Signed-off-by: Tom Warren twar...@nvidia.com
Acked-by: Thierry Reding thierry.red...@avionic-design.de
---
v3: new
board/avionic
+-
include/fdtdec.h |1 +
lib/fdtdec.c |1 +
26 files changed, 815 insertions(+), 261 deletions(-)
create mode 100644 board/avionic-design/dts/tegra20-tamonten.dtsi
The series,
Tested-by: Thierry Reding thierry.red
Boot script support brings Medcom-Wide in line with other Tegra boards.
In order to enable booting a Linux kernel with initial ramdisk, also add
support for the new FIT image type.
Signed-off-by: Thierry Reding thierry.red...@avionic-design.de
---
include/configs/medcom-wide.h | 34
Boot script support brings TEC in line with other Tegra boards. To
enable booting a Linux kernel with initial ramdisk, also include support
for the new FIT image type.
Signed-off-by: Thierry Reding thierry.red...@avionic-design.de
---
include/configs/tec.h | 23 +++
1 file
Boot script support brings Plutux in line with other Tegra boards. In
order to enable booting a Linux kernel with initial ramdisk, also add
support for the new FIT image type.
Signed-off-by: Thierry Reding thierry.red...@avionic-design.de
---
include/configs/plutux.h | 31
Move the nand-controller node to the tegra20-tamonten.dtsi so that it
can be shared between all derived boards.
Signed-off-by: Thierry Reding thierry.red...@avionic-design.de
---
This depends on Tom's Tegra: MMC: Add DT support for MMC to T20 boards
patches.
board/avionic-design/dts/tegra20
On Thu, Feb 14, 2013 at 10:19:28AM -0700, Stephen Warren wrote:
On 02/14/2013 12:54 AM, Thierry Reding wrote:
Boot script support brings Medcom-Wide in line with other Tegra boards.
In order to enable booting a Linux kernel with initial ramdisk, also add
support for the new FIT image type
On Thu, Feb 14, 2013 at 08:19:54AM +0100, Thierry Reding wrote:
On Wed, Feb 13, 2013 at 02:44:47PM -0700, Tom Warren wrote:
This patchset adds device-tree support to the Tegra MMC driver.
All device config is done via properties in the DT files instead
of hard-coded config options/function
On Wed, Feb 20, 2013 at 02:05:46PM -0700, Tom Warren wrote:
This patchset adds device-tree support to the Tegra MMC driver.
All device config is done via properties in the DT files instead
of hard-coded config options/function arguments.
I've tested this on my Seaboard and everything works
On Thu, Feb 21, 2013 at 10:00:20AM +0100, Thierry Reding wrote:
On Wed, Feb 20, 2013 at 02:05:46PM -0700, Tom Warren wrote:
This patchset adds device-tree support to the Tegra MMC driver.
All device config is done via properties in the DT files instead
of hard-coded config options/function
On Wed, Feb 27, 2013 at 02:03:37PM -0700, Stephen Warren wrote:
On 02/26/2013 04:00 PM, Stephen Warren wrote:
This is useful on all Tegras, so that boot.scr on all devices can use
the same commands. Hence, move it to tegra-common.h.
Unfortunately, this breaks Tegra114 builds because no
On Mon, Mar 04, 2013 at 01:46:48PM -0700, Tom Warren wrote:
[...]
I kinda lost track of this patchset. I'd like to move it into
u-boot-tegra/next if you think it's ready, but I'm not sure if it
conflicts with/works with Stephen's 4th patch of his v2 series (ARM:
tegra: enable a common set of
On Fri, Sep 14, 2012 at 08:53:32AM -0700, Simon Glass wrote:
Hi,
On Wed, Sep 12, 2012 at 4:42 PM, Marek Vasut ma...@denx.de wrote:
Dear Stephen Warren,
On 09/12/2012 04:38 PM, Marek Vasut wrote:
Dear Stephen Warren,
On 09/12/2012 10:19 AM, Tom Warren wrote:
Folks,
On Sat, Sep 15, 2012 at 10:01:47PM +0200, Thierry Reding wrote:
I think I traced this to the copying of CSD a while back. The problem is
that the transferred buffer is 8 bytes, so there's no way to make it
aligned properly. Unfortunately the entailing discussion did not yield a
solution
On Sat, Sep 15, 2012 at 10:11:54PM +0200, Marek Vasut wrote:
Dear Thierry Reding,
On Fri, Sep 14, 2012 at 08:53:32AM -0700, Simon Glass wrote:
Hi,
On Wed, Sep 12, 2012 at 4:42 PM, Marek Vasut ma...@denx.de wrote:
Dear Stephen Warren,
On 09/12/2012 04:38 PM, Marek Vasut
On Sat, Sep 15, 2012 at 07:45:30PM -0700, Simon Glass wrote:
Hi,
On Sat, Sep 15, 2012 at 1:41 PM, Thierry Reding
thierry.red...@avionic-design.de wrote:
On Sat, Sep 15, 2012 at 10:11:54PM +0200, Marek Vasut wrote:
Dear Thierry Reding,
On Fri, Sep 14, 2012 at 08:53:32AM -0700, Simon
On Mon, Sep 17, 2012 at 02:39:01PM -0700, Simon Glass wrote:
Hi Thierry,
On Sat, Sep 15, 2012 at 11:49 PM, Thierry Reding
thierry.red...@avionic-design.de wrote:
On Sat, Sep 15, 2012 at 07:45:30PM -0700, Simon Glass wrote:
Hi,
On Sat, Sep 15, 2012 at 1:41 PM, Thierry Reding
On Tue, Sep 18, 2012 at 08:37:44PM +0200, Marek Vasut wrote:
Dear Simon Glass,
Hi Thierry,
On Tue, Sep 18, 2012 at 7:54 AM, Thierry Reding
thierry.red...@avionic-design.de wrote:
On Mon, Sep 17, 2012 at 02:39:01PM -0700, Simon Glass wrote:
Hi Thierry,
On Sat, Sep 15
On Tue, Sep 18, 2012 at 09:21:14PM +0200, Marek Vasut wrote:
Dear Thierry Reding,
On Tue, Sep 18, 2012 at 08:37:44PM +0200, Marek Vasut wrote:
Dear Simon Glass,
Hi Thierry,
On Tue, Sep 18, 2012 at 7:54 AM, Thierry Reding
thierry.red...@avionic-design.de wrote
On Tue, Sep 18, 2012 at 09:36:18PM +0200, Marek Vasut wrote:
Dear Thierry Reding,
[...]
Sure, but after you apply the bounce buffer, you can safely invalidate
the whole cacheline, so align it up and be done with it.
That's what I proposed to do last time around but it was NAK'ed
On Sun, Jun 16, 2013 at 10:48:45PM +0200, Marek Vasut wrote:
Dear Thierry Reding,
On Sat, Jun 15, 2013 at 11:28:25PM +0200, Marek Vasut wrote:
Dear Thierry Reding,
On Fri, Jun 14, 2013 at 06:41:40PM +0800, Jim Lin wrote:
[...]
diff --git a/board/nvidia/dts/tegra30
On Sat, Jun 15, 2013 at 09:46:19PM +0200, Marek Vasut wrote:
Dear Jim Lin,
Add DT node for USB EHCI function.
Add support for T30-Cardhu, T30-Beaver, T114-Dalmore boards.
I'd like to get ACK from someone with the actual hardware.
btw. How usable is the cardhu with current U-Boot ?
the patch.
Besides the one issue I'm still seeing with the very old flash drive,
which might turn out not to be specific to Tegra, this series:
Tested-by: Thierry Reding thierry.red...@gmail.com
pgpEVEDZe7r2R.pgp
Description: PGP signature
___
U-Boot
On Mon, Jun 17, 2013 at 10:39:12PM +0200, Marek Vasut wrote:
Dear Thierry Reding,
On Sun, Jun 16, 2013 at 10:48:45PM +0200, Marek Vasut wrote:
Dear Thierry Reding,
On Sat, Jun 15, 2013 at 11:28:25PM +0200, Marek Vasut wrote:
Dear Thierry Reding,
On Fri, Jun 14
On Thu, Jun 20, 2013 at 04:13:38PM +0800, Jim Lin wrote:
Add DT node for USB EHCI function.
Add support for T30-Cardhu, T30-Beaver, T114-Dalmore boards.
Signed-off-by: Jim Lin ji...@nvidia.com
---
Changes in v2:
- Remove PLL parameters from dt file
Changes in v3:
- Change VBus GPIO
On Sat, Jun 22, 2013 at 06:22:48PM +0800, Axel Lin wrote:
Signed-off-by: Axel Lin axel@ingics.com
---
drivers/gpio/pca953x.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
Reviewed-by: Thierry Reding thierry.red...@gmail.com
pgpyYIwLVs86H.pgp
Description: PGP signature
From: Thierry Reding tred...@nvidia.com
The Linux kernel cannot unpack a ramdisk that's stored in high memory.
Unless the initrd_high environment variable is explicitly set, abide by
that restriction using the getenv_bootm_low() and getenv_bootm_mapsize()
helpers.
Signed-off-by: Thierry Reding
On Thu, Jul 11, 2013 at 08:39:28AM -0400, Tom Rini wrote:
On Thu, Jul 11, 2013 at 11:46:19AM +0200, Wolfgang Denk wrote:
Dear Thierry Reding,
In message 1373500071-6476-1-git-send-email-thierry.red...@gmail.com you
wrote:
The Linux kernel cannot unpack a ramdisk that's stored
On Thu, Jul 11, 2013 at 08:21:17PM +0200, Wolfgang Denk wrote:
Dear Thierry Reding,
In message 20130711150014.ga2...@dhcp-172-17-186-34.nvidia.com you wrote:
I'm pretty sure it's all architectures, and this is a problem for device
trees as well. The tricks done to deal with highmem
directions would be greatly
appreciated.
I don't believe anyone is actively working on this at present. It would
be great to have this support in place.
If you want to take a crack at it yourself, I suggest the following
resources:
Thierry Reding has recently created a new PCIe driver
From: Thierry Reding tred...@nvidia.com
Disabling the data cache is no longer required to boot Dalmore, so
enable it. This results in notably better performance when loading
and booting the Linux kernel.
Signed-off-by: Thierry Reding tred...@nvidia.com
---
include/configs/dalmore.h | 3 ---
1
From: Thierry Reding tred...@nvidia.com
Currently all Tegra SoCs are assumed to have 32 byte cache lines. This
isn't true for Tegra114, however, which uses 4 Cortex-A15 cores and
therefore uses a cache line size of 64 bytes. Move the cache line size
setting to the per-SoC common configuration
On Thu, Jul 18, 2013 at 03:19:18PM -0600, Stephen Warren wrote:
On 07/18/2013 01:13 PM, Thierry Reding wrote:
From: Thierry Reding tred...@nvidia.com
Currently all Tegra SoCs are assumed to have 32 byte cache lines. This
isn't true for Tegra114, however, which uses 4 Cortex-A15 cores
Signed-off-by: Thierry Reding tred...@nvidia.com
---
arch/arm/cpu/arm720t/tegra-common/cpu.c | 36 +++--
1 file changed, 30 insertions(+), 6 deletions(-)
diff --git a/arch/arm/cpu/arm720t/tegra-common/cpu.c
b/arch/arm/cpu/arm720t/tegra-common/cpu.c
index 9294611..2c50034
On Wed, Sep 04, 2013 at 11:59:44AM -0600, Stephen Warren wrote:
On 09/04/2013 07:00 AM, Alban Bedel wrote:
Add the Tegra30 SKU b1 and treat it like other Tegra30 chips.
CC'ing the Tegra maintainer would be helpful (Tom Warren; I CC'd him here)
diff --git a/arch/arm/cpu/tegra-common/ap.c
If a ramdisk has been loaded to low memory to begin with, there's no
need to relocate it.
Signed-off-by: Thierry Reding tred...@nvidia.com
---
common/image.c | 12
1 file changed, 12 insertions(+)
diff --git a/common/image.c b/common/image.c
index 47336f2..d19c0e6 100644
The Linux kernel cannot unpack a ramdisk that's stored in high memory.
Unless the initrd_high environment variable is explicitly set, abide by
that restriction using the getenv_bootm_low() and getenv_bootm_mapsize()
helpers.
Signed-off-by: Thierry Reding tred...@nvidia.com
---
Changes in v2
Forcibly set hose-pci_prefetch to NULL to make sure it will be setup.
This will help if for any reason callers didn't make sure themselves to
NULL the field.
Signed-off-by: Thierry Reding tred...@nvidia.com
---
drivers/pci/pci_auto.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff
instead of the
descriptor and a missing cache invalidation before reading the packet
data that the NIC just wrote to memory.
Signed-off-by: Thierry Reding tred...@nvidia.com
---
drivers/net/rtl8169.c | 61 ---
1 file changed, 53 insertions(+), 8
currticks() is defined as get_timer(0), which returns an unsigned long,
so use %lu instead of %d to print the result.
Signed-off-by: Thierry Reding tred...@nvidia.com
---
drivers/net/rtl8169.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/net/rtl8169.c b
This chip is compatible with other RTL8168 chips and can be found on the
NVIDIA Cardhu and Beaver boards.
Signed-off-by: Thierry Reding tred...@nvidia.com
---
drivers/net/rtl8169.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/net/rtl8169.c b/drivers/net/rtl8169.c
index c217e6f
This chip is compatible with the existing driver, except that it uses
BAR2 instead of BAR1 for the I/O memory region. Using this patch I can
use the PCIe ethernet interface on the CompuLab Trimslice to boot from
the network.
Signed-off-by: Thierry Reding tred...@nvidia.com
---
drivers/net
I no longer work for Avionic Design and don't have access to hardware,
so I'll pass on maintainership to Alban.
Acked-by: Alban Bedel alban.be...@avionic-design.de
Signed-off-by: Thierry Reding tred...@nvidia.com
---
Hi Tom,
I assume this is something you'd want to take through the Tegra tree
PLLX no longer has the CPCON field on Tegra114, so do not attempt to
program it.
Signed-off-by: Thierry Reding tred...@nvidia.com
---
Changes in v2:
- new patch
arch/arm/cpu/arm720t/tegra-common/cpu.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm/cpu/arm720t
Signed-off-by: Thierry Reding tred...@nvidia.com
---
Changes in v2:
- clean up table layout and comments
arch/arm/cpu/arm720t/tegra-common/cpu.c | 83 +++--
1 file changed, 59 insertions(+), 24 deletions(-)
diff --git a/arch/arm/cpu/arm720t/tegra-common/cpu.c
b/arch/arm
PLLX no longer has the CPCON field on Tegra114, so do not attempt to
program it.
Signed-off-by: Thierry Reding tred...@nvidia.com
---
Changes in v3:
- don't leak PLLX_BASE bits into PLLX_MISC
Changes in v2:
- new patch
arch/arm/cpu/arm720t/tegra-common/cpu.c | 6 +-
1 file changed, 5
On Mon, Sep 30, 2013 at 02:25:57PM -0700, Tom Warren wrote:
Thierry,
-Original Message-
From: Thierry Reding [mailto:thierry.red...@gmail.com]
Sent: Monday, September 23, 2013 1:08 PM
To: Tom Warren
Cc: u-boot@lists.denx.de
Subject: [PATCH v2 2/2] Tegra114: Do not program
Signed-off-by: Thierry Reding tred...@nvidia.com
---
Changes in v3:
- none
Changes in v2:
- clean up table layout and comments
arch/arm/cpu/arm720t/tegra-common/cpu.c | 83 +++--
1 file changed, 59 insertions(+), 24 deletions(-)
diff --git a/arch/arm/cpu/arm720t/tegra
Boot script support brings Plutux in line with other Tegra boards. In
order to enable booting a Linux kernel with initial ramdisk, also add
support for the new FIT image type.
Signed-off-by: Thierry Reding thierry.red...@avionic-design.de
---
include/configs/plutux.h | 18 +++---
1
Boot script support brings TEC in line with other Tegra boards. To
enable booting a Linux kernel with initial ramdisk, also include support
for the new FIT image type.
Signed-off-by: Thierry Reding thierry.red...@avionic-design.de
---
include/configs/tec.h | 10 +++---
1 file changed, 3
Boot script support brings Medcom-Wide in line with other Tegra boards.
In order to enable booting a Linux kernel with initial ramdisk, also add
support for the new FIT image type.
Signed-off-by: Thierry Reding thierry.red...@avionic-design.de
---
include/configs/medcom-wide.h | 21
Move the nand-controller node to the tegra20-tamonten.dtsi so that it
can be shared between all derived boards.
Signed-off-by: Thierry Reding thierry.red...@avionic-design.de
---
board/avionic-design/dts/tegra20-tamonten.dtsi | 11 +++
board/avionic-design/dts/tegra20-tec.dts | 11
in 436da3cd233e7166b5ce9293dbd28092cf37bcc9.
Signed-off-by: Andreas Bießmann andreas.de...@googlemail.com
cc: Jason Cooper u-b...@lakedaemon.net
cc: Eric Nelson eric.nel...@boundarydevices.com
cc: Thierry Reding thierry.red...@avionic-design.de
---
fs/ext2/ext2fs.c |2 +-
1 file changed
|2 +-
mkconfig | 24 ++--
spl/Makefile | 10 ++
106 files changed, 745 insertions(+), 506 deletions(-)
Successfully booted to login prompt on TEC.
Tested-by: Thierry Reding thierry.red...@avionic
makes it go away.
Cc: Eric Nelson eric.nel...@boundarydevices.com
Cc: Thierry Reding thierry.red...@avionic-design.de
Cc: Jason Cooper u-b...@lakedaemon.net
Cc: Andreas Bießmann andreas.de...@googlemail.com
Cc: Reinhard Arlt reinhard.a...@esd-electronics.com
Signed-off-by: Kim Phillips
On Mon, Jul 09, 2012 at 12:25:27AM +0200, Wolfgang Denk wrote:
Hi all,
after merging the latest ARM pull request, a large number of boards is
broken:
- SUMMARY
Boards compiled: 302
Boards with errors: 6 ( harmony seaboard ventana whistler
On Wed, Jul 11, 2012 at 06:44:10AM +0200, Simon Glass wrote:
Hi Stephen,
On Fri, Jun 15, 2012 at 1:32 AM, Stephen Warren swar...@wwwdotorg.orgwrote:
On 06/13/2012 10:19 AM, Simon Glass wrote:
Add LCD definitions and also a proposed binding for LCD displays.
The PWFM is in progress
On Thu, Jul 12, 2012 at 10:21:01AM +0200, Simon Glass wrote:
Hi Thierry,
On Wed, Jul 11, 2012 at 7:48 AM, Thierry Reding
thierry.red...@avionic-design.de wrote:
On Wed, Jul 11, 2012 at 06:44:10AM +0200, Simon Glass wrote:
Hi Stephen,
On Fri, Jun 15, 2012 at 1:32 AM, Stephen Warren
On Sat, Jul 14, 2012 at 10:03:31AM +0200, Simon Glass wrote:
Hi Christian,
On Thu, Apr 19, 2012 at 2:41 PM, Christian Kroehnert
christian.kroehn...@avionic-design.de wrote:
On 15.01.2012 01:47, Simon Glass wrote:
This series adds support for the Tegra2x's display peripheral. This
On Thu, Jul 12, 2012 at 08:25:08AM -0700, Simon Glass wrote:
From: Wei Ni w...@nvidia.com
Add support for the LCD peripheral at the Tegra2 SOC level. A separate
LCD driver will use this functionality to configure the display.
Mayuresh Kulkarni:
- changes to remove bitfields and clean up
On Thu, Jul 12, 2012 at 08:25:09AM -0700, Simon Glass wrote:
This driver supports driving a single LCD and providing a U-Boot console
on it.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v2:
- Update LCD driver to deal with new fdt bindings
Changes in v3:
- Adjust LCD
to
make backlight and panel GPIOs optional and adding the corresponding DTS
and configuration entries for Medcom, so:
Tested-by: Thierry Reding thierry.red...@avionic-design.de
The display corruption does no longer seem to happen. While I haven't
thoroughly reviewed, I think this is in pretty
On Thu, Jul 19, 2012 at 05:24:35PM +0900, Adam Jiang wrote:
On Thu, Jul 19, 2012 at 03:37:07PM +0800, Thierry Reding wrote:
* PGP Signed by an unknown key
On Thu, Jul 12, 2012 at 08:25:08AM -0700, Simon Glass wrote:
From: Wei Ni w...@nvidia.com
Add support for the LCD peripheral
speed:
ext2fs.c: In function 'ext2fs_read_file':
ext2fs.c:458:19: warning: 'blocknxt' may be used uninitialized in this
func=
tion [-Wuninitialized]
this change makes it go away.
Cc: Eric Nelson eric.nel...@boundarydevices.com
Cc: Thierry Reding thierry.red...@avionic
On Mon, Jul 30, 2012 at 11:37:52AM -0600, Stephen Warren wrote:
diff --git a/include/configs/harmony.h b/include/configs/harmony.h
[...]
/* Environment not stored */
-#define CONFIG_ENV_IS_NOWHERE
+#define CONFIG_ENV_IS_IN_NAND
+#define CONFIG_ENV_OFFSET(SZ_512M - SZ_128K) /* 128K sector
a patch along with support on TEC which I've tested this on
successfully:
Tested-by: Thierry Reding thierry.red...@avionic-design.de
pgpKEh86NubWG.pgp
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In order for cache invalidation and flushing to work properly, the data
and OOB buffers must be aligned to full cache lines.
Signed-off-by: Thierry Reding thierry.red...@avionic-design.de
---
common/cmd_nand.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/common
This commit enables NAND support on the Tamonten Evaluation Carrier and
adds the corresponding device tree nodes. Furthermore, the U-Boot
environment can now be stored in NAND.
Signed-off-by: Thierry Reding thierry.red...@avionic-design.de
---
board/avionic-design/dts/tegra20-tec.dts | 11
On Tue, Jul 31, 2012 at 10:27:23AM +0100, Simon Glass wrote:
+Thierry
Hi,
On Thu, Jul 12, 2012 at 4:25 PM, Simon Glass s...@chromium.org wrote:
Add LCD definitions and also a proposed binding for LCD displays.
The PWM is as per what will likely be committed to linux-next soon.
The
On Tue, Jul 31, 2012 at 09:40:54AM -0600, Stephen Warren wrote:
On 07/31/2012 12:21 AM, Thierry Reding wrote:
This commit enables NAND support on the Tamonten Evaluation Carrier and
adds the corresponding device tree nodes. Furthermore, the U-Boot
environment can now be stored in NAND
On Tue, Jul 31, 2012 at 08:52:34AM -0700, Tom Warren wrote:
Stephen/Thierry,
-Original Message-
From: Stephen Warren [mailto:swar...@wwwdotorg.org]
Sent: Tuesday, July 31, 2012 8:47 AM
To: Tom Warren
Cc: Thierry Reding; U-Boot Mailing List; Stephen Warren
Subject: [PATCH
* Simon Glass wrote:
On Tue, Apr 24, 2012 at 7:53 PM, Thierry Reding
thierry.red...@avionic-design.de wrote:
Some hardware requires the data buffers to be cacheline-aligned to make
sure DMA operations can be properly executed.
This patch uses the ALLOC_CACHE_ALIGN_BUFFER macro
The MMC core sometimes reads buffers that are smaller than a complete
cacheline, for example when reading the SCR. In order to avoid a warning
from the ARM v7 cache handling code, this patch makes sure that complete
cachelines are flushed.
Signed-off-by: Thierry Reding thierry.red...@avionic
* Wolfgang Denk wrote:
Hi,
are there any other urgent fixes that should make it into the imminent
v2012.04.1 maintenance release ?
I just sent two more patches that are required to boot the Plutux and Medcom
boards successfully. Sorry for being so late, but I only got around to test
the
: allocate cacheline aligned buffers.
Signed-off-by: Thierry Reding thierry.red...@avionic-design.de
---
This fixes boot failures on Avionic Design Plutux and Medcom boards.
disk/part_dos.c |6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/disk/part_dos.c b/disk/part_dos.c
* Mike Frysinger wrote:
On Tuesday 24 April 2012 03:53:44 Thierry Reding wrote:
The MMC core sometimes reads buffers that are smaller than a complete
cacheline, for example when reading the SCR. In order to avoid a warning
from the ARM v7 cache handling code, this patch makes sure
* Simon Glass wrote:
Hi Thierry,
On Thu, Apr 26, 2012 at 6:18 PM, Thierry Reding
thierry.red...@avionic-design.de wrote:
* Mike Frysinger wrote:
On Tuesday 24 April 2012 03:53:44 Thierry Reding wrote:
The MMC core sometimes reads buffers that are smaller than a complete
* Simon Glass wrote:
This series adds NAND flash support to Tegra and enables it on Seaboard.
Included here is a proposed device tree binding with most of the properties
private to nvidia,. The binding includes information about the NAND
controller as well as the connected NAND device. The
uImage to a prompt, so:
Tested-by: Thierry Reding thierry.red...@avionic-design.de
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* Stephen Warren wrote:
Yes, I'd recommend not putting information in DT that can be easily
extracted from the partition table on the device itself.
The problem is that neither the format of the BCT nor that of the PT is
documented anywhere. It seems like the BCT contains a reference to where
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