Re: [U-Boot] U-boot hangs on imx6 pci driver

2014-06-05 Thread David Müller (ELSOFT AG)
Tim Harvey wrote:

 When enabling PCI support in u-boot my 3.14 kernel hangs somewhere 
 during PCI init or enumeration (can't tell as uart is not up yet)

Enabling earlyprintk support may help.

 David, on your board(s) do you have a PCIe switch as well?

Not yet, but this (using a PEX8603) is planned for the near future.

Dave

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Re: [U-Boot] U-boot hangs on imx6 pci driver

2014-05-30 Thread David Müller (ELSOFT AG)
Fabio Estevam wrote:
 On Wed, May 28, 2014 at 4:40 AM, David Müller (ELSOFT AG)
 d.muel...@elsoft.ch wrote:
 I use an additional delay in imx6_add_pcie_port() as a workaround so far.
 
 How much of additional delay? Could you please share your patch?

diff --git a/drivers/pci/host/pci-imx6.c b/drivers/pci/host/pci-imx6.c
index ee08250..1accc0e 100644
--- a/drivers/pci/host/pci-imx6.c
+++ b/drivers/pci/host/pci-imx6.c
@@ -503,6 +532,9 @@ static int imx6_add_pcie_port(struct pcie_port *pp,
pp-root_bus_nr = -1;
pp-ops = imx6_pcie_host_ops;

+   /* FIXME  kernel hangs without this delay */
+   usleep_range(2, 25000);
+
spin_lock_init(pp-conf_lock);
ret = dw_pcie_host_init(pp);
if (ret) {


Dave
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Re: [U-Boot] U-boot hangs on imx6 pci driver

2014-05-28 Thread David Müller (ELSOFT AG)
Marek Vasut wrote:
 Observed Results: After some hundreds of the soft-reboot cycles, the
 i210 is not recognized. This is caused by the PCI express link
 failing to come up. We see link never came up message in the kernel
 log.

Just a guest but maybe this is errata #18 of the i210.

A little bit off-topic but i'm facing the problem that Linux (kernel
3.14 + some patches) hangs regularly during PCIe initialisation on our
custom iMX6 / i210 board.

I use an additional delay in imx6_add_pcie_port() as a workaround so far.


Dave
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Re: [U-Boot] U-boot hangs on imx6 pci driver

2014-05-27 Thread David Müller (ELSOFT AG)
Marek Vasut wrote:
 Take a look at SR# 1-1347946851 in the FSL internal bug tracker. It
 looks like the PCIe IP core implementation in the MX6 is bugged in my
 opinion.

Are there any publicly available info regarding this SR?

Dave
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Re: [U-Boot] iMX6 PCie inbound traffic not working

2014-04-25 Thread David Müller (ELSOFT AG)
Krunal Desai wrote:
 Can you get a dump of config space for the 82574? What are its BARs?

= pci display 1.0.0 0 40
: 10d38086 0016 0200 0010
0010: 0110  01010001 0112
0020:    8086
0030:  00c8  0100
0040:    
0050:    
0060:    
0070:    
0080:    
0090:    
00a0: 0011 0003 2003 
00b0:    
00c0:   c822d001 0f002000
00d0: 0080e005   
00e0: 0001a010 8cc1 00112810 04031c11
00f0: 1011   


Dave

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[U-Boot] iMX6 PCie inbound traffic not working

2014-04-24 Thread David Müller (ELSOFT AG)
Hello

I tried to use a Intel 82574 based miniPCIe NIC on a Freescale iMX6 eval
board as shown below. It seems that the NIC is unable to read and/or
write the descriptors in system memory. The settings of the PCIe core
registers seems to be OK (according to the iMX6 RM).

Any idea what i am missing?


U-Boot 2014.04-00078-gadcdeac-dirty (Apr 24 2014 - 15:40:02)

CPU:   Freescale i.MX6Q rev1.2 at 792 MHz
Reset cause: WDOG
Board: MX6-SabreSD
DRAM:  1 GiB
MMC:   FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2
*** Warning - bad CRC, using default environment

  00:01.0 - 16c3:abcd - Bridge device
   01:00.0- 8086:10d3 - Network controller
No panel detected: default to Hannstar-XGA
Display: Hannstar-XGA (1024x768)
In:serial
Out:   serial
Err:   serial
Net:   e1000: 00:03:1d:0c:57:86
   e1000#0
Warning: e1000#0 using MAC address from net device


Dave


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Re: [U-Boot] [PATCH] e1000: remove redundant assignment

2014-04-16 Thread David Müller (ELSOFT AG)
 Signed-off-by: David Mueller d.muel...@elsoft.ch
 Joe Hershberger joe.hershber...@gmail.com

Sorry, Cc missing.

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[U-Boot] How to convert iMX6 IOMux data to U-Boot format

2014-03-28 Thread David Müller (ELSOFT AG)
Hello

Is there a tool or script to convert the iMX6 IOmux data generated to
the Freescale IOMux tool into the format used by U-Boot?

Any hints are appreciated.

Dave

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Re: [U-Boot] [PATCH] VCMA9: Enable CONFIG_CMD_NAND_YAFFS

2013-03-06 Thread David Müller (ELSOFT AG)
Tom Rini wrote:
 As this board has NAND and supports YAFFS2, add CONFIG_MD_NAND_YAFFS
 
 Cc: David Müller d.muel...@elsoft.ch
 Signed-off-by: Tom Rini tr...@ti.com

Acked-by: David Müller d.muel...@elsoft.ch

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Re: [U-Boot] [PING] Re: [PATCH V3] ARM: fix s3c2410 timer code

2012-02-08 Thread David Müller (ELSOFT AG)
Hello

Any news?
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[U-Boot] [PATCH] add STM29F400BB to table of supported legacy flashs

2012-02-06 Thread David Müller (ELSOFT AG)
Signed-off-by: David Mueller d.muel...@elsoft.ch

diff --git a/drivers/mtd/jedec_flash.c b/drivers/mtd/jedec_flash.c
index 36d30c3..2350f36 100644
--- a/drivers/mtd/jedec_flash.c
+++ b/drivers/mtd/jedec_flash.c
@@ -69,6 +69,9 @@
 #define SST39SF010A0x00B5
 #define SST39SF020A0x00B6

+/* STM */
+#define STM29F400BB0x00D6
+
 /* MXIC */
 #define MX29LV040  0x004F

@@ -346,6 +349,23 @@ static const struct amd_flash_info jedec_table[] = {
ERASEINFO(0x1, 15),
}
},
+   {
+   .mfr_id = (u16)STM_MANUFACT,
+   .dev_id = STM29F400BB,
+   .name   = ST Micro M29F400BB,
+   .uaddr  = {
+   [1] = MTD_UADDR_0x0555_0x02AA /* x16 */
+   },
+   .DevSize= SIZE_512KiB,
+   .CmdSet = CFI_CMDSET_AMD_LEGACY,
+   .NumEraseRegions= 4,
+   .regions= {
+   ERASEINFO(0x04000, 1),
+   ERASEINFO(0x02000, 2),
+   ERASEINFO(0x08000, 1),
+   ERASEINFO(0x1, 7),
+   }
+   },
 #endif
 };

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[U-Boot] [PING] Re: [PATCH V3] ARM: fix s3c2410 timer code

2012-01-08 Thread David Müller (ELSOFT AG)
Hello

Any news?
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[U-Boot] [PING] Re: [PATCH] ARM: activate DISPLAY_CPUINFO for VCMA9 + SMDK2410 board

2012-01-08 Thread David Müller (ELSOFT AG)
Hello

Any news?
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[U-Boot] [PING] Re: [PATCH 0/4] use CFI driver for all MPL boards

2012-01-08 Thread David Müller (ELSOFT AG)
Hello

Any news?
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Re: [U-Boot] U-Boot maintainers: some boards are broken by recent mach-type update

2011-11-05 Thread David Müller (ELSOFT AG)
Hi Albert

Albert ARIBAUD wrote:
 U-Boot maintainers of such boards (in Cc: of this mail) should provide a 
 patch to re-introduce the MACH_TYPE_XX definition in their boards' 
 config header file in include/configs/.

Could you please apply the following patches:

- http://patchwork.ozlabs.org/patch/122787/
- http://patchwork.ozlabs.org/patch/122786/

Thank you

Dave
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Re: [U-Boot] [STATUS] v2011.06-rc1 released

2011-05-30 Thread David Müller (ELSOFT AG)
Hello

Albert ARIBAUD wrote:
 In message4dd760eb.2050...@elsoft.ch  you wrote:

 please also apply the following patch and friends

 http://patchwork.ozlabs.org/patch/93595/

 this will make VCMA9 board work with current U-Boot release.
 
 Applied to arm tree, will send a pull request later today.

Could you please also apply the second half of this patch serie:

- http://patchwork.ozlabs.org/patch/93598/
- http://patchwork.ozlabs.org/patch/93599/
- http://patchwork.ozlabs.org/patch/93601/


Thank you

Dave

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Re: [U-Boot] [STATUS] v2011.06-rc1 released

2011-05-21 Thread David Müller (ELSOFT AG)
Hello,

please also apply the following patch and friends

http://patchwork.ozlabs.org/patch/93595/

this will make VCMA9 board work with current U-Boot release.

Thank you

Dave
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Re: [U-Boot] [PATCH] mpc83xx fdt: do not adjust clock frequency of external UARTs

2011-04-18 Thread David Müller (ELSOFT AG)
Tabi Timur-B04825 wrote:
 May I see it?

Please see attached file.

Dave
/*
 *
 * Copyright 2005, 2006 Freescale Semiconductor Inc.
 *
 * This program is free software; you can redistribute  it and/or modify it
 * under  the terms of  the GNU General  Public License as published by the
 * Free Software Foundation;  either version 2 of the  License, or (at your
 * option) any later version.
 * 
 * Modified for MIP470
 *
 */

/dts-v1/;

/ {
model = MIP470-1;
compatible = MIP470;
#address-cells = 1;
#size-cells = 1;

aliases {
ethernet0 = enet0;
ethernet1 = enet1;
serial0 = serial0;
serial1 = serial1;
serial2 = serial2;
serial3 = serial3;
pci0 = pci0;
};
cpus {
#address-cells = 1;
#size-cells = 0;

PowerPC,8347@0 {
device_type = cpu;
reg = 0x0;
d-cache-line-size = 0x20; // 32 bytes
i-cache-line-size = 0x20; // 32 bytes
d-cache-size = 0x8000;// L1, 32K
i-cache-size = 0x8000;// L1, 32K
timebase-frequency = 0x0; // from bootloader
bus-frequency = 0x0;  // from bootloader
clock-frequency = 0x0;// from bootloader
};
};
memory {
device_type = memory;
reg = 0x 0x2000;  // 512MB at 0
};
soc8347@ff40 {
#address-cells = 1;
#size-cells = 1;
device_type = soc;
compatible = simple-bus;
ranges = 0x 0xff40 0x0010;
reg = 0xff40 0x0200;
bus-frequency = 0;

wdt@200 {
device_type = watchdog;
compatible = mpc83xx_wdt;
reg = 0x200 0x100;
};
i2c@3000 {
#address-cells = 1;
#size-cells = 0;
cell-index = 0;
compatible = fsl-i2c;
reg = 0x3000 0x100;
interrupts = 14 0x8;
interrupt-parent = ipic;
dfsrr;
};
i2c@3100 {
#address-cells = 1;
#size-cells = 0;
cell-index = 1;
compatible = fsl-i2c;
reg = 0x3100 0x100;
interrupts = 15 0x8;
interrupt-parent = ipic;
dfsrr;
};
dma@82a8 {
#address-cells = 1;
#size-cells = 1;
compatible = fsl,mpc8349-dma, fsl,elo-dma;
reg = 0x82a8 4;
ranges = 0 0x8100 0x1a8;
interrupt-parent = ipic;
interrupts = 71 8;
cell-index = 0;
dma-channel@0 {
compatible = fsl,mpc8349-dma-channel, 
fsl,elo-dma-channel;
reg = 0 0x80;
cell-index = 0;
interrupt-parent = ipic;
interrupts = 71 8;
};
dma-channel@80 {
compatible = fsl,mpc8349-dma-channel, 
fsl,elo-dma-channel;
reg = 0x80 0x80;
cell-index = 1;
interrupt-parent = ipic;
interrupts = 71 8;
};
dma-channel@100 {
compatible = fsl,mpc8349-dma-channel, 
fsl,elo-dma-channel;
reg = 0x100 0x80;
cell-index = 2;
interrupt-parent = ipic;
interrupts = 71 8;
};
dma-channel@180 {
compatible = fsl,mpc8349-dma-channel, 
fsl,elo-dma-channel;
reg = 0x180 0x28;
cell-index = 3;
interrupt-parent = ipic;
interrupts = 71 8;
};
};

usb@22000 {
compatible = fsl-usb2-mph;
reg = 0x22000 0x1000;
#address-cells = 1;

Re: [U-Boot] [PATCH] mpc83xx fdt: do not adjust clock frequency of external UARTs

2011-04-15 Thread David Müller (ELSOFT AG)
Hello

Timur Tabi wrote:
 Just out of curiosity -- do you have an example of a device tree with
 an external UART?

Yes.

Dave
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Re: [U-Boot] [PATCH V5 1/4] SMDK2410: activate ARM relocation feature

2011-03-22 Thread David Müller (ELSOFT AG)
Minkyu Kang wrote:
 +/* additions for new relocation code, must be added to all boards */
 +#undef CONFIG_SYS_ARM_WITHOUT_RELOC
 
 Please remove this define.
 
 +#define CONFIG_SYS_SDRAM_BASE  PHYS_SDRAM_1
 +#define CONFIG_SYS_INIT_SP_ADDR(CONFIG_SYS_SDRAM_BASE + 0x1000 - \
 +   GENERATED_GBL_DATA_SIZE)

You are talking about the #undef, right?

Dave
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Re: [U-Boot] [PATCH V5 2/4] SMDK2410: remove unneeded config.mk

2011-03-22 Thread David Müller (ELSOFT AG)
Minkyu Kang wrote:
 +#define CONFIG_SYS_TEXT_BASE   0x0
 
 Zero is right? Maybe 0x33F8?

IMHO Zero should be correct with activated ARM reloc.

Dave
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Re: [U-Boot] [PATCH V5 1/4] SMDK2410: activate ARM relocation feature

2011-03-22 Thread David Müller (ELSOFT AG)
Minkyu Kang wrote:
 You are talking about the #undef, right?
 
 Right. :)

Ok, will be done.

Dave
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Re: [U-Boot] [PATCH V5 2/4] SMDK2410: remove unneeded config.mk

2011-03-22 Thread David Müller (ELSOFT AG)
Minkyu Kang wrote:
 IMHO Zero should be correct with activated ARM reloc.
 
 Sorry but I can't understand.
 Why?
 Please let me know.

Excerpt from doc/README.arm-relocation:

maybe adapt CONFIG_SYS_TEXT_BASE (this must be checked from board
maintainers)
This *must* be done for boards, which boot from NOR flash


The SMDK2410 is booting from NOR flash (at least it is currently
configured that way) and flash is mapped at address 0.


Dave
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[U-Boot] [PING #2] Re: [PATCH] add print_cpuinfo to s3c24x0

2011-03-01 Thread David Müller (ELSOFT AG)
Hello

Anybody home?

http://lists.denx.de/pipermail/u-boot/2010-December/083032.html
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[U-Boot] [PING #2] Re: [PATCH V3] update SMDK2410 port

2011-03-01 Thread David Müller (ELSOFT AG)
Hello

Anybody home?

http://lists.denx.de/pipermail/u-boot/2011-January/085070.html

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[U-Boot] [PING #2] Re: [PATCH V3] update VCMA9 port

2011-03-01 Thread David Müller (ELSOFT AG)
Hello

Anybody home?

http://lists.denx.de/pipermail/u-boot/2011-January/085072.html
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[U-Boot] [PING] Re: [PATCH] add print_cpuinfo to s3c24x0

2011-02-01 Thread David Müller (ELSOFT AG)
Hello

Any news?

http://lists.denx.de/pipermail/u-boot/2010-December/083032.html
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[U-Boot] [PING] Re: [PATCH V3] update VCMA9 port

2011-02-01 Thread David Müller (ELSOFT AG)
Hello

Any news?

http://lists.denx.de/pipermail/u-boot/2011-January/085072.html
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Re: [U-Boot] [PATCH] update VCMA9 port

2011-01-10 Thread David Müller (ELSOFT AG)
Wolfgang Denk schrieb:
 Please move this line into your board config file, and drop the
 config.mk file.

Ok, will be done.

 - * Modified for the Samsung SMDK2410 by
 - * (C) Copyright 2002
 + * Modified for MPL VCMA9 by
   * David Mueller, ELSOFT AG, d.muel...@elsoft.ch
 
 I understand this file was created using copy  paste; why do you
 think it is legal to remove the original copyright notice?

The actual patch looks like this:

- * Modified for the Samsung SMDK2410 by
- * (C) Copyright 2002
+ * Modified for MPL VCMA9 by
  * David Mueller, ELSOFT AG, d.muel...@elsoft.ch
+ * (C) Copyright 2002, 2003, 2004, 2005

As you can see, i don't remove any copyright notice (just extending it)
and i fix an obviously bad reference to SMDK2410.

Dave
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[U-Boot] [PATCH] fix s3c2410_nand timing default values

2010-11-29 Thread David Müller (ELSOFT AG)
Hello

The attached patch fixes wrong timing default values and adds the
possibility to specify board specific timing value in the board config file.

Dave

Signed-off-by: David Mueller d.muel...@elsoft.ch

diff --git a/drivers/mtd/nand/s3c2410_nand.c b/drivers/mtd/nand/s3c2410_nand.c
index f70daef..27351fb 100644
--- a/drivers/mtd/nand/s3c2410_nand.c
+++ b/drivers/mtd/nand/s3c2410_nand.c
@@ -133,9 +133,15 @@ int board_nand_init(struct nand_chip *nand)
writel(readl(clk_power-clkcon) | (1  4), clk_power-clkcon);
 
/* initialize hardware */
-   twrph0 = 3;
-   twrph1 = 0;
-   tacls = 0;
+#if defined(CONFIG_S3C24XX_CUSTOM_NAND_TIMING)
+   tacls  = CONFIG_S3C24XX_TACLS;
+   twrph0 = CONFIG_S3C24XX_TWRPH0;
+   twrph1 =  CONFIG_S3C24XX_TWRPH1;
+#else
+   tacls = 4;
+   twrph0 = 8;
+   twrph1 = 8;
+#endif
 
cfg = S3C2410_NFCONF_EN;
cfg |= S3C2410_NFCONF_TACLS(tacls - 1);
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[U-Boot] [PATCH] fix s3c24x0 timer code

2010-11-29 Thread David Müller (ELSOFT AG)
Hello

The attached patch fixes the s3c24x0 timer code to work with the ARM
relocation feature.

Dave

Signed-off-by: David Mueller d.muel...@elsoft.ch

diff --git a/arch/arm/cpu/arm920t/s3c24x0/timer.c 
b/arch/arm/cpu/arm920t/s3c24x0/timer.c
index 8cf9ff6..2903ba7 100644
--- a/arch/arm/cpu/arm920t/s3c24x0/timer.c
+++ b/arch/arm/cpu/arm920t/s3c24x0/timer.c
@@ -35,8 +35,7 @@
 #include asm/io.h
 #include asm/arch/s3c24x0_cpu.h
 
-int timer_load_val = 0;
-static ulong timer_clk;
+DECLARE_GLOBAL_DATA_PTR;
 
 /* macro to read the 16 bit timer */
 static inline ulong READ_TIMER(void)
@@ -46,9 +45,6 @@ static inline ulong READ_TIMER(void)
return readl(timers-tcnto4)  0x;
 }
 
-static ulong timestamp;
-static ulong lastdec;
-
 int timer_init(void)
 {
struct s3c24x0_timers *timers = s3c24x0_get_base_timers();
@@ -57,27 +53,27 @@ int timer_init(void)
/* use PWM Timer 4 because it has no output */
/* prescaler for Timer 4 is 16 */
writel(0x0f00, timers-tcfg0);
-   if (timer_load_val == 0) {
+   if (gd-timer_load_val == 0) {
/*
 * for 10 ms clock period @ PCLK with 4 bit divider = 1/2
 * (default) and prescaler = 16. Should be 10390
 * @33.25MHz and 15625 @ 50 MHz
 */
-   timer_load_val = get_PCLK() / (2 * 16 * 100);
-   timer_clk = get_PCLK() / (2 * 16);
+   gd-timer_load_val = get_PCLK() / (2 * 16 * 100);
+   gd-timer_clk = get_PCLK() / (2 * 16);
}
/* load value for 10 ms timeout */
-   lastdec = timer_load_val;
-   writel(timer_load_val, timers-tcntb4);
+   gd-lastdec = gd-timer_load_val;
+   writel(gd-timer_load_val, timers-tcntb4);
/* auto load, manual update of timer 4 */
tmr = (readl(timers-tcon)  ~0x070) | 0x060;
writel(tmr, timers-tcon);
/* auto load, start timer 4 */
tmr = (tmr  ~0x070) | 0x050;
writel(tmr, timers-tcon);
-   timestamp = 0;
+   gd-timestamp = 0;
 
-   return (0);
+   return 0;
 }
 
 /*
@@ -96,7 +92,7 @@ ulong get_timer(ulong base)
 
 void set_timer(ulong t)
 {
-   timestamp = t;
+   gd-timestamp = t;
 }
 
 void __udelay (unsigned long usec)
@@ -105,7 +101,7 @@ void __udelay (unsigned long usec)
ulong start = get_ticks();
 
tmo = usec / 1000;
-   tmo *= (timer_load_val * 100);
+   tmo *= (gd-timer_load_val * 100);
tmo /= 1000;
 
while ((ulong) (get_ticks() - start)  tmo)
@@ -115,15 +111,15 @@ void __udelay (unsigned long usec)
 void reset_timer_masked(void)
 {
/* reset time */
-   lastdec = READ_TIMER();
-   timestamp = 0;
+   gd-lastdec = READ_TIMER();
+   gd-timestamp = 0;
 }
 
 ulong get_timer_masked(void)
 {
ulong tmr = get_ticks();
 
-   return tmr / (timer_clk / CONFIG_SYS_HZ);
+   return tmr / (gd-timer_clk / CONFIG_SYS_HZ);
 }
 
 void udelay_masked(unsigned long usec)
@@ -134,10 +130,10 @@ void udelay_masked(unsigned long usec)
 
if (usec = 1000) {
tmo = usec / 1000;
-   tmo *= (timer_load_val * 100);
+   tmo *= (gd-timer_load_val * 100);
tmo /= 1000;
} else {
-   tmo = usec * (timer_load_val * 100);
+   tmo = usec * (gd-timer_load_val * 100);
tmo /= (1000 * 1000);
}
 
@@ -157,16 +153,16 @@ unsigned long long get_ticks(void)
 {
ulong now = READ_TIMER();
 
-   if (lastdec = now) {
+   if (gd-lastdec = now) {
/* normal mode */
-   timestamp += lastdec - now;
+   gd-timestamp += gd-lastdec - now;
} else {
/* we have an overflow ... */
-   timestamp += lastdec + timer_load_val - now;
+   gd-timestamp += gd-lastdec + gd-timer_load_val - now;
}
-   lastdec = now;
+   gd-lastdec = now;
 
-   return timestamp;
+   return gd-timestamp;
 }
 
 /*
@@ -178,7 +174,7 @@ ulong get_tbclk(void)
ulong tbclk;
 
 #if defined(CONFIG_SMDK2400) || defined(CONFIG_TRAB)
-   tbclk = timer_load_val * 100;
+   tbclk = gd-timer_load_val * 100;
 #elif defined(CONFIG_SBC2410X) || \
   defined(CONFIG_SMDK2410) || \
defined(CONFIG_S3C2440) || \
diff --git a/arch/arm/include/asm/global_data.h 
b/arch/arm/include/asm/global_data.h
index ada3fbb..799943c 100644
--- a/arch/arm/include/asm/global_data.h
+++ b/arch/arm/include/asm/global_data.h
@@ -61,6 +61,13 @@ typedef  struct  global_data {
unsigned long   tbu;
unsigned long long  timer_reset_value;
 #endif
+#ifdef CONFIG_S3C24X0
+   /* static data needed by s3c24x0 timer.c */
+   unsigned long   timer_load_val;
+   unsigned long   timer_clk;
+   unsigned long   timestamp;
+   unsigned long   lastdec;
+#endif
unsigned long   relocaddr;  /* Start address of U-Boot in RAM */

[U-Boot] timer problem with new ARM relocation feature

2010-10-11 Thread David Müller (ELSOFT AG)
Hello

The timer implementation for s3c24xx based SoC
(arch/arm/cpu/arm920t/s3c24x0/timer.c) uses several global variables.
With the newly introduced ARM relocation feature, this timer code does
no longer work as expected.

What is the proposed fix/workaround for this?
Is moving these variables to the global data pointer area an
acceptable solution?

Dave
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Re: [U-Boot] [PATCH] board/mpl: Remove mpl-specific memory test command

2010-10-08 Thread David Müller (ELSOFT AG)
Peter Tyser schrieb:
 On Wed, 2010-10-06 at 22:27 +0200, Wolfgang Denk wrote:
 I think you are right.  If you have tiome, please submit patches to
 remove these, then we will see if anybody cares.
 
 Will do.

I'm currently trying to bring the VCMA9 port in sync with the recently
introduced ARM relocation support feature.


Dave



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Re: [U-Boot] VCMA9 build fails: ARM board references PPC4xx header

2010-10-06 Thread David Müller (ELSOFT AG)
Wolfgang Denk schrieb:
 The problem comes from board/mpl/common/memtst.c which contains an
 unconditional #include asm/ppc4xx-i2c.h which is obviously wrong
 when the file gets compiled for an ARM board as VCMA9.
 
 Can you please provide a fix?

The solution is to remove the include completely as it is not needed at all.

Dave
Signed-off-by: David Mueller d.muel...@elsoft.ch

diff --git a/board/mpl/common/memtst.c b/board/mpl/common/memtst.c
index 9c08065..8810302 100644
--- a/board/mpl/common/memtst.c
+++ b/board/mpl/common/memtst.c
@@ -48,7 +48,6 @@ int testdram (void)
 
 #include common.h
 #include asm/processor.h
-#include asm/ppc4xx-i2c.h
 
 DECLARE_GLOBAL_DATA_PTR;
 
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