Hi Bin
Bin Meng 於 2019年6月4日 週二 上午10:48寫道:
>
> Hi Rick,
>
> On Tue, May 28, 2019 at 5:44 PM Andes wrote:
> >
> > From: Rick Chen
> >
> > When L2 node exists inside cpus node, uclass_get_device
> > can not parse L2 node successfully. So move it outside
> > from cpus node.
> >
> > Also add
Hi Rick,
On Tue, May 28, 2019 at 5:44 PM Andes wrote:
>
> From: Rick Chen
>
> When L2 node exists inside cpus node, uclass_get_device
> can not parse L2 node successfully. So move it outside
> from cpus node.
>
> Also add tag-ram-ctl and data-ram-ctl attributes for
> v5l2 cache controller
From: Rick Chen
When L2 node exists inside cpus node, uclass_get_device
can not parse L2 node successfully. So move it outside
from cpus node.
Also add tag-ram-ctl and data-ram-ctl attributes for
v5l2 cache controller driver. This can adjust timing
by requirement from dtb to improve
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