On 3 August 2016 at 23:41, Stefan Agner wrote:
> From: Stefan Agner
>
> The page table is maintained by the CPU, hence it is safe to always
> align cache flush to a whole cache line size. This allows to use
> mmu_page_table_flush for a single page
Hi Stefan,
On Thu, Aug 4, 2016 at 2:41 AM, Stefan Agner wrote:
> - mmu_page_table_flush((u32)_table[start], (u32)_table[end]);
> +
> + /*
> +* Make sure range is cache line aligned
> +* Only CPU maintains page tables, hence it is save to always
From: Stefan Agner
The page table is maintained by the CPU, hence it is safe to always
align cache flush to a whole cache line size. This allows to use
mmu_page_table_flush for a single page table, e.g. when configure
only small regions through
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