From: Dirk Eibach eib...@gdsys.de
Signed-off-by: Dirk Eibach eib...@gdsys.cc
Signed-off-by: Dirk Eibach dirk.eib...@gdsys.cc
---
Changes in v2: None
arch/powerpc/lib/Makefile |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/lib/Makefile
From: Reinhard Pfau p...@gdsys.de
if alen is 0: no longer start a write cycle before reading data.
Signed-off-by: Dirk Eibach eib...@gdsys.cc
Signed-off-by: Reinhard Pfau p...@gdsys.cc
Signed-off-by: Dirk Eibach dirk.eib...@gdsys.cc
---
Changes in v2:
- whitespace fixes
drivers/i2c/fsl_i2c.c
Signed-off-by: Dirk Eibach dirk.eib...@gdsys.cc
---
Changes in v2: None
MAINTAINERS |2 +-
arch/powerpc/cpu/ppc4xx/cmd_chip_config.c |2 +-
arch/powerpc/include/asm/ppc4xx_config.h |2 +-
board/gdsys/405ep/405ep.c |2 +-
From: Dirk Eibach eib...@gdsys.de
Add support for Atmel TPM devices with two wire interface.
Signed-off-by: Dirk Eibach eib...@gdsys.cc
Signed-off-by: Reinhard Pfau p...@gdsys.cc
Signed-off-by: Dirk Eibach dirk.eib...@gdsys.cc
---
Changes in v2: None
README |6 ++
From: Reinhard Pfau p...@gdsys.de
Extend the tpm library with support for single authorized (AUTH1) commands
as specified in the TCG Main Specification 1.2. (The internally used helper
functions are implemented in a way that they could also be used for double
authorized commands if someone needs
Hi Simon,
On Fri, Apr 26, 2013 at 7:13 AM, Simon Glass s...@chromium.org wrote:
Hi,
On Thu, Apr 25, 2013 at 12:06 PM, Jagan Teki jagannadh.t...@gmail.com wrote:
Hi Simon,
On Fri, Apr 26, 2013 at 12:22 AM, Simon Glass s...@chromium.org wrote:
Hi Jagan,
On Thu, Apr 25, 2013 at 6:55 AM,
From: Dirk Eibach eib...@gdsys.de
If CONFIG_RELEASE_CORE0_ONLY is set, all cores except core0 are kept in
holdoff mode.
Signed-off-by: Dirk Eibach eib...@gdsys.cc
Signed-off-by: Dirk Eibach dirk.eib...@gdsys.cc
---
Changes in v2: None
arch/powerpc/cpu/mpc85xx/mp.c |8 ++--
1 files
Changes in v2:
- replace some numeric constants with named constants
- style fixes (as shown by checkpatch.pl) in common/cmd_tpm.c and lib/tpm.c
- whitespace fixes
- configuration for SPI builds was missing
- whitespace fixes
Dirk Eibach (5):
Update gdsys email account
mpc85xx: Add
From: Reinhard Pfau p...@gdsys.de
Extend the tpm library with support for single authorized (AUTH1) commands
as specified in the TCG Main Specification 1.2. (The internally used helper
functions are implemented in a way that they could also be used for double
authorized commands if someone needs
From: Reinhard Pfau p...@gdsys.de
if alen is 0: no longer start a write cycle before reading data.
Signed-off-by: Dirk Eibach dirk.eib...@gdsys.cc
Signed-off-by: Reinhard Pfau reinhard.p...@gdsys.cc
---
Changes in v3: None
Changes in v2:
- whitespace fixes
drivers/i2c/fsl_i2c.c |9
From: Dirk Eibach eib...@gdsys.de
Add support for Atmel TPM devices with two wire interface.
Signed-off-by: Dirk Eibach dirk.eib...@gdsys.cc
Signed-off-by: Reinhard Pfau reinhard.p...@gdsys.cc
---
Changes in v3: None
Changes in v2: None
README |6 ++
Signed-off-by: Dirk Eibach dirk.eib...@gdsys.cc
---
Changes in v3:
- fix email addresses
Changes in v2: None
MAINTAINERS |2 +-
arch/powerpc/cpu/ppc4xx/cmd_chip_config.c |2 +-
arch/powerpc/include/asm/ppc4xx_config.h |2 +-
board/gdsys/405ep/405ep.c
Changes in v3:
- fix email addresses
Changes in v2:
- replace some numeric constants with named constants
- style fixes (as shown by checkpatch.pl) in common/cmd_tpm.c and lib/tpm.c
- configuration for SPI builds was missing
- whitespace fixes
Dirk Eibach (5):
Update gdsys email account
From: Dirk Eibach eib...@gdsys.de
Signed-off-by: Dirk Eibach dirk.eib...@gdsys.cc
---
Changes in v3: None
Changes in v2: None
arch/powerpc/lib/Makefile |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/lib/Makefile b/arch/powerpc/lib/Makefile
index
From: Dirk Eibach eib...@gdsys.de
If CONFIG_RELEASE_CORE0_ONLY is set, all cores except core0 are kept in
holdoff mode.
Signed-off-by: Dirk Eibach dirk.eib...@gdsys.cc
---
Changes in v3: None
Changes in v2: None
arch/powerpc/cpu/mpc85xx/mp.c |8 ++--
1 files changed, 6 insertions(+), 2
On 25/04/2013 22:32, Benoît Thébaudeau wrote:
Checking in the manual, I see that values in iomux-mx51.h are correct,
and they simply differs from the ones of MX6. We can simply add a #ifdef
CONFIG_MX51 in arch/arm/include/asm/imx-common/iomux-v3.h to fix it, but
anyway I suppose that the
This patch add support for storing the environment redundant on
mmc devices. Substantially it re-uses the logic from the NAND implementation,
that means using an incremental counter for marking newer data.
Signed-off-by: Michael Heimpold m...@heimpold.de
---
board/freescale/common/sdhc_boot.c |
Hi,
I want to make High Assurance Boot (HAB) for the Freescale i.MX28 with
U-Boot 04/2012 work. To do that I have to link an Image Vector Table
(IVT, consists of some boot image addresses which I insert by using
linker symbols in the C-code) to the u-boot binary. My problem is, that
the
Dear zhenhuan,
Please follow the nteiquette: do not top post / full quote!!
If you need help, please see
http://www.netmeister.org/news/learn2quote.html
In message 517a05cc.60...@163.com you wrote:
Where should I define the macro to enable debug() function definition?
Is there a place in
Dear Dirk Eibach,
In message 1366958892-5911-7-git-send-email-dirk.eib...@gdsys.cc you wrote:
From: Dirk Eibach eib...@gdsys.de
Signed-off-by: Dirk Eibach dirk.eib...@gdsys.cc
---
Changes in v3: None
Changes in v2: None
arch/powerpc/lib/Makefile |2 +-
1 files changed, 1
On 25/04/2013 22:45, Marek Vasut wrote:
Dear Otavio Salvador,
The MX23 Boot ROM does blindly load from 2048 offset while the MX28
does parse the BCB header to known where to load the image from. We
move the BCB header to 4 sectors offset so same code can be used by
both SoCs avoiding code
Dear Marek Vasut,
On Friday, April 26, 2013 2:57:44 AM, Marek Vasut wrote:
@@ -52,6 +57,7 @@ enum imximage_cmd {
CMD_INVALID,
CMD_IMAGE_VERSION,
CMD_BOOT_FROM,
+ CMD_BOOT_OFFSET,
CMD_DATA
};
--
1.7.10.4
This looks good to me.
Yes,
On 24/04/2013 23:23, Otavio Salvador wrote:
The MX23 Boot ROM does blindly load from 2048 offset while the MX28
does parse the BCB header to known where to load the image from. We
move the BCB header to 4 sectors offset so same code can be used by
both SoCs avoiding code duplication.
This
On 24/04/2013 23:23, Otavio Salvador wrote:
This reworks the environment settings to be aligned with the other
i.MX boards. The loadaddr has been changed to allow the Freescale
kernel and mainline kernel to work without environment changes.
Signed-off-by: Otavio Salvador
On 23/04/2013 22:17, Benoît Thébaudeau wrote:
IIM:
- Homogenize prg_p naming (the reference manuals are not always
self-consistent
for that).
- Add missing SCSx and bank registers.
- Fix the number of banks on i.MX53.
OCOTP:
- Rename iim to ocotp in order to avoid confusion.
-
From: Kuo-Jung Su dant...@faraday-tech.com
With MMU/D-Cache enabled, data might be retained at cache
rather than at DRAM when we execute 'go' command, and some
of the bare-metal softwares would always invalidate the entire
data cache at start-up, and causes data lost issue.
This patch is
From: Kuo-Jung Su dant...@faraday-tech.com
Signed-off-by: Kuo-Jung Su dant...@faraday-tech.com
---
drivers/mtd/spi/winbond.c | 17 -
1 file changed, 16 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/spi/winbond.c b/drivers/mtd/spi/winbond.c
index 2716209..2a27837 100644
From: Kuo-Jung Su dant...@faraday-tech.com
To: u-boot@lists.denx.de
CC: Albert Aribaud albert.u.b...@aribaud.net
These patches introduce Faraday A36x SoC platform support.
Here are some public documents for your reference.
http://www.faraday-tech.com/html/documentation/index.html
There is
From: Kuo-Jung Su dant...@faraday-tech.com
Signed-off-by: Kuo-Jung Su dant...@faraday-tech.com
CC: Joe Hershberger joe.hershber...@gmail.com
---
drivers/net/ftgmac100.c | 70 +--
1 file changed, 49 insertions(+), 21 deletions(-)
diff --git
From: Kuo-Jung Su dant...@faraday-tech.com
This patch updates the map_physmem()/unmap_physmem(), and use
them to implement dma_alloc_coherent(), dma_free_coherent().
It uses 1MB section for each mapping, and thus waste lots of
address space, however this should still be good enough for
tiny
From: Kuo-Jung Su dant...@faraday-tech.com
Faraday FTMAC110 10/100Mbps supports half-word data transfer for Linux.
However it has a weird DMA alignment issue:
(1) Tx DMA Buffer Address:
1 bytes aligned: Invalid
2 bytes aligned: O.K
4 bytes aligned: O.K
(2) Rx DMA Buffer Address:
From: Kuo-Jung Su dant...@faraday-tech.com
Faraday FTI2C010 is a multi-function I2C controller
which supports both master and slave mode.
This patch simplily implements the master mode only.
Signed-off-by: Kuo-Jung Su dant...@faraday-tech.com
CC: Heiko Schocher h...@denx.de
---
From: Kuo-Jung Su dant...@faraday-tech.com
The Faraday FTSSP010 is a multi-function controller
which supports I2S/SPI/SSP/AC97/SPDIF.
This patch simpily implements the SPI mode only.
BTW the DMA and CS/Clock control logic has been
altered since revision 1.19.0. So this patch
would 1st detects the
From: Kuo-Jung Su dant...@faraday-tech.com
Faraday FTNANDC021 is a integrated NAND flash controller.
It use a build-in command table to abstract the underlying
NAND flash control logic.
For example:
Issuing a command 0x10 to FTNANDC021 would result in
a page write + a read status operation.
From: Kuo-Jung Su dant...@faraday-tech.com
Faraday FTSDC010 is a MMC/SD host controller.
Although there is already a driver in current u-boot release,
which is modified from eSHDC and contributed by Andes Tech.
Its performance is too terrible on Faraday A36x SoC platforms,
so I turn to implement
From: Kuo-Jung Su dant...@faraday-tech.com
This patch add supports to both Faraday FUSBH200 and FOTG210,
these controllers slightly differ from standard EHCI specification.
Signed-off-by: Kuo-Jung Su dant...@faraday-tech.com
CC: Marek Vasut ma...@denx.de
---
common/usb_hub.c|
From: Kuo-Jung Su dant...@faraday-tech.com
The Faraday FOTG210 is an OTG chip which could operate
as either an EHCI Host or a USB Device as a time.
Signed-off-by: Kuo-Jung Su dant...@faraday-tech.com
CC: Marek Vasut ma...@denx.de
---
drivers/usb/gadget/Makefile |1 +
From: Kuo-Jung Su dant...@faraday-tech.com
Faraday FTLCDC200 Color LCD controller performs translation of
pixel-coded data into the required formats and timings to
drive a variety of single/dual mono and color LCDs.
Depending on the LCD type and mode, the unpacked data can represent:
1. an
Hi Stefano,
On Friday, April 26, 2013 9:31:15 AM, Stefano Babic wrote:
On 23/04/2013 22:17, Benoît Thébaudeau wrote:
IIM:
- Homogenize prg_p naming (the reference manuals are not always
self-consistent
for that).
- Add missing SCSx and bank registers.
- Fix the number of banks
From: Reinhard Pfau p...@gdsys.de
if alen is 0: no longer start a write cycle before reading data.
Signed-off-by: Dirk Eibach dirk.eib...@gdsys.cc
Signed-off-by: Reinhard Pfau reinhard.p...@gdsys.cc
---
Changes in v4: None
Changes in v3: None
Changes in v2:
- whitespace fixes
From: Reinhard Pfau p...@gdsys.de
Extend the tpm library with support for single authorized (AUTH1) commands
as specified in the TCG Main Specification 1.2. (The internally used helper
functions are implemented in a way that they could also be used for double
authorized commands if someone needs
Signed-off-by: Dirk Eibach dirk.eib...@gdsys.cc
---
Changes in v4: None
Changes in v3:
- fix email addresses
Changes in v2: None
MAINTAINERS |2 +-
arch/powerpc/cpu/ppc4xx/cmd_chip_config.c |2 +-
arch/powerpc/include/asm/ppc4xx_config.h |2 +-
From: Dirk Eibach eib...@gdsys.de
Add support for Atmel TPM devices with two wire interface.
Signed-off-by: Dirk Eibach dirk.eib...@gdsys.cc
Signed-off-by: Reinhard Pfau reinhard.p...@gdsys.cc
---
Changes in v4: None
Changes in v3: None
Changes in v2: None
README |6 ++
Changes in v4:
- consider CONFIG_CMD_BOOTM for all architectures
Changes in v3:
- fix email addresses
Changes in v2:
- configuration for SPI builds was missing
- replace some numeric constants with named constants
- style fixes (as shown by checkpatch.pl) in common/cmd_tpm.c and lib/tpm.c
-
From: Dirk Eibach eib...@gdsys.de
If CONFIG_RELEASE_CORE0_ONLY is set, all cores except core0 are kept in
holdoff mode.
Signed-off-by: Dirk Eibach dirk.eib...@gdsys.cc
---
Changes in v4: None
Changes in v3: None
Changes in v2: None
arch/powerpc/cpu/mpc85xx/mp.c |8 ++--
1 files
From: Dirk Eibach eib...@gdsys.de
Signed-off-by: Dirk Eibach dirk.eib...@gdsys.cc
---
Changes in v4:
- consider CONFIG_CMD_BOOTM for all architectures
Changes in v3: None
Changes in v2: None
arch/arm/lib/Makefile|2 +-
arch/avr32/lib/Makefile |2 +-
On 26/04/2013 10:03, Benoît Thébaudeau wrote:
Hi Stefano,
Hi Benoît,
I would like to apply your patches and I see some warning from
clearpatch. Some of them are very annoying and I think to ignore them,
but before doing that I ask to ML about it. It seems to me that
checkpatch make
On 25/04/2013 22:16, Marek Vasut wrote:
Implement BOOT_OFFSET command for imximage. This command is parallel
to current BOOT_FROM command, but allows more flexibility in configuring
arbitrary image header offset. Also add an imximage.cfg with default
offset values into arm/arch/imx-common/ so
Thanks Bo and Tom.
I shall modify patch as suggested and will send it again.
On Fri, Apr 26, 2013 at 7:20 AM, Bo Shen voice.s...@atmel.com wrote:
Hi Julius,
On 4/25/2013 13:59, Julius Hemanth P wrote:
This code is small snippet from patch
On 25.04.2013 22:16, Marek Vasut wrote:
Implement BOOT_OFFSET command for imximage. This command is parallel
to current BOOT_FROM command, but allows more flexibility in configuring
arbitrary image header offset. Also add an imximage.cfg with default
offset values into arm/arch/imx-common/ so
The v2013.04 release has this patch set included:
5cb48582 Add architecture-specific global data
With this, the global_data struct is now common and new variables
have been added. Resulting in a bigger struct. Unfortunately the
currently allocated 128 bytes are just a bit too small for this
new
2013/4/25 Wolfgang Denk w...@denx.de
Dear Franck Jullien,
In message
cajfokbwjyrtqnhub5gotxcpob_xneirnoz+b97ksvsy0fcx...@mail.gmail.com you
wrote:
I'm building u-boot from the git master for a powerpc target. I'm using
the P2020RDB_SDCARD configuration.
During the final link I
The changes to a3m071/a4m2k in summary are:
- Enable CAN1 on I2C in GPS Port Configuration
- Enable SPI on PSC2
- Activate network console
- New flash partitioning
- Fix some typos
- Pass host name to Linux
- Change rootfs to squashfs,jffs2
- Enable UBI/UBIFS support
- Enable FIT support
Dies ist, was ich interessiert bin in.Welcome mich contace.
___
Diablo 3 Gold http://www.mmobf.com/ ; Aion Kinah
http://www.mmobf.com/aion-kinah-566/ ; Diablo 3 Gold Kaufen
http://www.mmobf.com/ ; GW2 Gold http://www.mmobf.com/Guild-Wars-2/
Dies ist, was ich interessiert bin in.Welcome mich contace.
___
Diablo 3 Gold http://www.mmobf.com/ ; Aion Kinah
http://www.mmobf.com/aion-kinah-566/ ; Diablo 3 Gold Kaufen
http://www.mmobf.com/ ; GW2 Gold http://www.mmobf.com/Guild-Wars-2/
Dies ist, was ich interessiert bin in.Welcome mich contace.
___
Diablo 3 Gold http://www.mmobf.com/ ; Aion Kinah
http://www.mmobf.com/aion-kinah-566/ ; Diablo 3 Gold Kaufen
http://www.mmobf.com/ ; GW2 Gold http://www.mmobf.com/Guild-Wars-2/
Dies ist, was ich interessiert bin in.Welcome mich contace.
___
Diablo 3 Gold http://www.mmobf.com/ ; Aion Kinah
http://www.mmobf.com/aion-kinah-566/ ; Diablo 3 Gold Kaufen
http://www.mmobf.com/ ; GW2 Gold http://www.mmobf.com/Guild-Wars-2/
No functional changes.
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
drivers/fpga/fpga.c | 214 +++-
1 file changed, 96 insertions(+), 118 deletions(-)
diff --git a/drivers/fpga/fpga.c b/drivers/fpga/fpga.c
index 26d2443..0d29894 100644
CONFIG_FPGA in past was bitfield where bits
were use for vendor identification.
This fix should be the part of this commit:
Improve configuration of FPGA subsystem
(sha1: 0133502e39ff89b67c26cb4015e0e7e8d9571184)
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
drivers/fpga/fpga.c | 2 +-
Using IP version for different setting
- Higher version supports 8bit mode
- Higher version bus width setting is different
Signed-off-by: Bo Shen voice.s...@atmel.com
---
drivers/mmc/gen_atmel_mci.c | 42 ++
include/atmel_mci.h |2 ++
2
add mmc card support with atmel mci driver
Signed-off-by: Bo Shen voice.s...@atmel.com
---
drivers/mmc/gen_atmel_mci.c |5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/mmc/gen_atmel_mci.c b/drivers/mmc/gen_atmel_mci.c
index fc0a181..77ebf17 100644
---
Dear Kuo-Jung Su,
In message 1366963312-2901-1-git-send-email-dant...@gmail.com you wrote:
From: Kuo-Jung Su dant...@faraday-tech.com
With MMU/D-Cache enabled, data might be retained at cache
rather than at DRAM when we execute 'go' command, and some
of the bare-metal softwares would always
Dear Dirk Eibach,
In message 1366963900-2784-7-git-send-email-dirk.eib...@gdsys.cc you wrote:
From: Dirk Eibach eib...@gdsys.de
Signed-off-by: Dirk Eibach dirk.eib...@gdsys.cc
---
Changes in v4:
- consider CONFIG_CMD_BOOTM for all architectures
On which boards has this been tested?
On 04/26/2013 12:25 PM, Michal Simek wrote:
No functional changes.
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
drivers/fpga/fpga.c | 214
+++-
1 file changed, 96 insertions(+), 118 deletions(-)
There are compilation failures
Commit dc88403 iomux-v3: Place pad control definitions into common file broke
mx51_efikamx because it made i.MX6's pad control definitions conflict with
i.MX51's.
i.MX51's pad control definitions are actually common to some other i.MX
(25/35/53), so move them to the common iomux-v3.h (just like
This macro will be useful for future changes.
Signed-off-by: Benoît Thébaudeau benoit.thebaud...@advansee.com
---
arch/arm/include/asm/imx-common/iomux-v3.h |3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/include/asm/imx-common/iomux-v3.h
Keep pad control definitions together, and organize definitions in a more
legible way.
Signed-off-by: Benoît Thébaudeau benoit.thebaud...@advansee.com
---
arch/arm/include/asm/imx-common/iomux-v3.h | 33
1 file changed, 19 insertions(+), 14 deletions(-)
diff --git
PUE requires PKE to mean something, as do pull values with PUE, so do not
compell users to explicitly use PKE and PUE everywhere. This is also what is
done on Linux and what has already been done for i.MX51.
By the way, remove some unused pad control definitions.
There is no change of behavior.
Bump
On 04/19/2013 10:21 AM, Dan Murphy wrote:
+ Sricharan
On 04/18/2013 11:29 AM, Dan Murphy wrote:
Fix the device tree loading for panda(4430) and panda-es(4460)
Modify the board name if a 4460 panda or panda-es is detected
at run time.
In the findfdt add a check for the panda-es board
Bump
On 04/19/2013 10:22 AM, Dan Murphy wrote:
+ Sricharan
On 04/18/2013 11:29 AM, Dan Murphy wrote:
Add the flag to allow runtime enviroment variable modifications.
This is being added so that the board-name can be modified at runtime
to indicate either a panda(4430) or a panda-es(4460)
Hello Wolfgang,
In message 1366963900-2784-7-git-send-email-dirk.eib...@gdsys.cc you
wrote:
From: Dirk Eibach eib...@gdsys.de
Signed-off-by: Dirk Eibach dirk.eib...@gdsys.cc
---
Changes in v4:
- consider CONFIG_CMD_BOOTM for all architectures
On which boards has this been tested?
Hi Jagan,
On Thu, Apr 25, 2013 at 11:16 PM, Jagan Teki jagannadh.t...@gmail.com wrote:
Hi Simon,
On Fri, Apr 26, 2013 at 7:13 AM, Simon Glass s...@chromium.org wrote:
Hi,
On Thu, Apr 25, 2013 at 12:06 PM, Jagan Teki jagannadh.t...@gmail.com
wrote:
Hi Simon,
On Fri, Apr 26, 2013 at
Dear Otavio Salvador,
On Fri, Apr 26, 2013 at 12:10 AM, Marek Vasut ma...@denx.de wrote:
Dear Otavio Salvador,
[...]
+/*
+ * This function will craft a jumptable at 0x0 which will redirect
interrupt + * vectoring to proper location of U-Boot in RAM.
+ *
+ * The structure
Dear Kuo-Jung Su,
From: Kuo-Jung Su dant...@faraday-tech.com
The Faraday FOTG210 is an OTG chip which could operate
as either an EHCI Host or a USB Device as a time.
Signed-off-by: Kuo-Jung Su dant...@faraday-tech.com
CC: Marek Vasut ma...@denx.de
Same rambling as for the other patch,
Dear Kuo-Jung Su,
From: Kuo-Jung Su dant...@faraday-tech.com
This patch add supports to both Faraday FUSBH200 and FOTG210,
these controllers slightly differ from standard EHCI specification.
How do they differ?
Signed-off-by: Kuo-Jung Su dant...@faraday-tech.com
CC: Marek Vasut
Add generic board support for sandbox. and remove the old board init code.
Select CONFIG_SYS_GENERIC_BOARD for sandbox now that this is supported.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v4:
- Squash three generic board commits into one
Changes in v3: None
Changes in v2:
Hi Tom,
On Mon, Apr 22, 2013 at 7:11 AM, Tom Rini tr...@ti.com wrote:
On Mon, Apr 22, 2013 at 10:03:10AM -0400, Tom Rini wrote:
On Sat, Apr 20, 2013 at 11:42:38AM -0700, Simon Glass wrote:
Add generic board support for sandbox.
[snip]
diff --git a/arch/sandbox/include/asm/u-boot.h
Hi Tom,
On Mon, Apr 22, 2013 at 9:08 AM, Simon Glass s...@chromium.org wrote:
Hi Tom,
On Mon, Apr 22, 2013 at 8:18 AM, Tom Rini tr...@ti.com wrote:
On Sat, Apr 20, 2013 at 11:42:35AM -0700, Simon Glass wrote:
This series adds generic board support to sandbox and switches to use this
ARM CPUs with the virtualization extension have a new mode called
HYP mode, which allows hypervisors to safely control and monitor
guests. The current hypervisor (KVM and Xen) implementations
require the kernel to be entered in that HYP mode.
This patch series introduces a new U-Boot command
A prerequisite for using virtualization is to be in HYP mode, which
requires the CPU to be in non-secure state.
According to the ARM ARM this should not be done in SVC mode, so we
have to setup a SMC handler for this. We reuse the current vector
table for this and make sure that we only access the
While actually switching to non-secure state is one thing, the
more important part of this process is to make sure that we still
have full access to the interrupt controller (GIC).
The GIC is fully aware of secure vs. non-secure state, some
registers are banked, others may be configured to be
In preparation for the actual HYP mode switch, we introduce a new
U-Boot command called hypmode. For now we only do the non-secure
switch here.
Some part of the work is done in the assembly routine in start.S,
introduced with the previous patch, but for the full glory we need
to setup the GIC
Currently the non-secure switch is only done for the boot processor.
To later allow full SMP support, we have to switch all secondary
cores into non-secure state also.
So we add an entry point for secondary CPUs coming out of low-power
state and make sure we put them into WFI again after having
Enable the hypmode command for the Versatile Express TC2 board
with the virtualization capable Cortex-A15 CPU to allow booting
Xen or a KVM-enabled Linux kernel in HYP mode.
Signed-off-by: Andre Przywara andre.przyw...@linaro.org
---
include/configs/vexpress_ca15_tc2.h | 2 ++
1 file changed, 2
For the KVM and XEN hypervisors to be usable, we need to enter the
kernel in HYP mode. Now that we already are in non-secure state,
HYP mode switching is within short reach.
While doing the non-secure switch, we have to enable the HVC
instruction and setup the HYP mode HVBAR (while still secure).
On 04/26/2013 03:18 PM, Peter Maydell wrote:
On 26 April 2013 14:14, Andre Przywara andre.przyw...@linaro.org wrote:
ARM CPUs with the virtualization extension have a new mode called
HYP mode, which allows hypervisors to safely control and monitor
guests. The current hypervisor (KVM and Xen)
Hi Peter,
On Wed, Apr 24, 2013 at 9:51 AM, Pavel Herrmann morpheus.i...@gmail.com wrote:
Hello
On Wednesday 24 of April 2013 08:53:09 Simon Glass wrote:
From: Pavel Herrmann morpheus.i...@gmail.com
** Please note that this is very early code. I am sending out an RFC to
get comments. This
Hi Graeme,
On Wed, Apr 17, 2013 at 8:03 PM, Graeme Russ graeme.r...@gmail.com wrote:
Hi Simon,
On Thu, Apr 18, 2013 at 12:13 PM, Simon Glass s...@chromium.org wrote:
This timer runs at a rate that can be calculated, well over 100MHz. It is
ideal for accurate timing and does not need
Hi Graeme,
On Wed, Apr 17, 2013 at 7:53 PM, Graeme Russ graeme.r...@gmail.com wrote:
Hi Simon,
On Thu, Apr 18, 2013 at 12:13 PM, Simon Glass s...@chromium.org wrote:
While we don't want PCAT timers for timing, we want timer 2 so that we can
still make a beep. Re-purpose the PCAT driver for
This timer runs at a rate that can be calculated, well over 100MHz. It is
ideal for accurate timing and does not need interrupt servicing.
Remove the old timer implementations at the same time.
To provide a consistent view of boot time, we use the same time
base as coreboot. Use the base
Hi,
Running U-boot 2013.04 on my mx23evk I get:
U-Boot 2013.04 (Apr 26 2013 - 10:44:46)
CPU: Freescale i.MX23 rev1.3 at 454 MHz
BOOT: SSP SD/MMC #0
DRAM: 128 MiB
MMC: MXS MMC: 0
In:serial
Out: serial
Err: serial
Hit any key to stop autoboot: 0
mmc0 is current device
reading
On 04/26/2013 03:42 PM, Peter Maydell wrote:
On 26 April 2013 14:24, Andre Przywara andre.przyw...@linaro.org wrote:
On 04/26/2013 03:18 PM, Peter Maydell wrote:
The obvious question here is why do we need a new command?.
The kernel booting specification says boot the kernel in
Hyp mode so we
Dear Fabio Estevam,
Hi,
Running U-boot 2013.04 on my mx23evk I get:
U-Boot 2013.04 (Apr 26 2013 - 10:44:46)
CPU: Freescale i.MX23 rev1.3 at 454 MHz
BOOT: SSP SD/MMC #0
DRAM: 128 MiB
MMC: MXS MMC: 0
In:serial
Out: serial
Err: serial
Hit any key to stop autoboot: 0
On Fri, Apr 26, 2013 at 11:15 AM, Marek Vasut ma...@denx.de wrote:
Did you apply that patch of mine ?
Yes, but does not help on this particular issue.
Regards,
Fabio Estevam
___
U-Boot mailing list
U-Boot@lists.denx.de
On Fri, Apr 26, 2013 at 11:20 AM, Fabio Estevam feste...@gmail.com wrote:
On Fri, Apr 26, 2013 at 11:15 AM, Marek Vasut ma...@denx.de wrote:
Did you apply that patch of mine ?
Yes, but does not help on this particular issue.
Well, actually it helped in some way. The reset pattern is
Dear Fabio Estevam,
On Fri, Apr 26, 2013 at 11:15 AM, Marek Vasut ma...@denx.de wrote:
Did you apply that patch of mine ?
Yes, but does not help on this particular issue.
It won't, I just expected a more verbose fault message.
Best regards,
Marek Vasut
Dear Fabio Estevam,
On Fri, Apr 26, 2013 at 11:20 AM, Fabio Estevam feste...@gmail.com wrote:
On Fri, Apr 26, 2013 at 11:15 AM, Marek Vasut ma...@denx.de wrote:
Did you apply that patch of mine ?
Yes, but does not help on this particular issue.
Well, actually it helped in some way.
On Fri, Apr 26, 2013 at 12:22 PM, Marek Vasut ma...@denx.de wrote:
This is a DRAM issue for sure. What compression algo do you use to compress
the
kernel btw ?
uImage kernel is generated from mxs_defconfig, which selects
CONFIG_LZO_COMPRESS=y
___
Hi
On Friday 26 of April 2013 06:30:17 Simon Glass wrote:
Hi Peter,
On Wed, Apr 24, 2013 at 9:51 AM, Pavel Herrmann morpheus.i...@gmail.com
wrote:
Hello
On Wednesday 24 of April 2013 08:53:09 Simon Glass wrote:
snip
Thanks for building on our design!
Thanks for the comments
On 26 April 2013 14:24, Andre Przywara andre.przyw...@linaro.org wrote:
On 04/26/2013 03:18 PM, Peter Maydell wrote:
The obvious question here is why do we need a new command?.
The kernel booting specification says boot the kernel in
Hyp mode so we should just always do that for booting Linux,
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