Hello Masahiro,
Am 13.10.2017 um 12:21 schrieb Masahiro Yamada:
Use dev_dbg() functions. It will be helpful to prefix log messages
with the corresponding device name when the core framework is ready.
While I am here, I renamed "dev", which was actually private data,
into "priv" because
Hello Masahiro,
Am 13.10.2017 um 12:29 schrieb Masahiro Yamada:
No global pointer is used in this file.
Signed-off-by: Masahiro Yamada
---
drivers/i2c/i2c-uclass.c | 2 --
1 file changed, 2 deletions(-)
Reviewed-by: Heiko Schocher
bye,
On Fri, Oct 13, 2017 at 02:29:20PM -0700, Benjamin Young wrote:
> Encountered an issue where fastboot can't write to NAND on a CHIP_pro,
> the symbol was neither present in the board's config header, nor the
> Kconfig, this patch puts it in the Kconfig and defaults on when
> SUNXI_NAND is
Hello Masahiro,
Am 13.10.2017 um 12:22 schrieb Masahiro Yamada:
Get clock rate from the clock driver instead of hard-coding it.
Signed-off-by: Masahiro Yamada
---
drivers/i2c/i2c-uniphier-f.c | 19 ---
1 file changed, 16 insertions(+), 3
Hello Masahiro,
Am 13.10.2017 um 12:21 schrieb Masahiro Yamada:
Use dev_dbg() functions. It will be helpful to prefix log messages
with the corresponding device name when the core framework is ready.
While I am here, I renamed "dev", which was actually private data,
into "priv" because
Hello Masahiro,
Am 13.10.2017 um 12:22 schrieb Masahiro Yamada:
Get clock rate from the clock driver instead of hard-coding it.
Signed-off-by: Masahiro Yamada
---
drivers/i2c/i2c-uniphier.c | 19 ---
1 file changed, 16 insertions(+), 3
As per data sheet, S25FS512S support uniform sector option
or erase size of 256 kbytes and Page Programming buffer of
256 or 512 Bytes. So, flag SECT_4K has no significance for
this flash.
Signed-off-by: Suresh Gupta
Signed-off-by: Rajat Srivastava
The S25FS-S family physical sectors may be configured as a hybrid
combination of eight 4-kB parameter sectors at the top or bottom
of the address space with all but one of the remaining sectors
being uniform size.
The default status of the flash is the hybrid architecture.
The parameter sectors
The S25FS-S family physical sectors may be configured as a hybrid
combination of eight 4-kB parameter sectors at the top or bottom
of the address space with all but one of the remaining sectors
being uniform size. The default status of the flash is the hybrid
architecture.
Since the parameter
On 15.10.2017 03:00, Florian Fainelli wrote:
Add a b53_reg read/write command which allows inspecting the switch
registers. Because the Broadcom BCM53xx registers have different sizes,
we need to split the accesses in 8, 16, 32, 48 or 64 bits to obtain
expected results.
Signed-off-by: Florian
On 15.10.2017 03:00, Florian Fainelli wrote:
Add a minimalistic Broadcom BCM53xx (roboswitch) switch driver similar
to the Marvell MV88E617x. This takes care of configuring the minimum
amount out of the switch hardware such that each user visible port
(configurable) and the CPU port can forward
On 15.10.2017 03:00, Florian Fainelli wrote:
Make sure that we pad small packets to a minimum length of 60 bytes
(without FCS). This is necessary to interface with Ethernet switches
that will reject RUNT frames unless padded correctly.
Signed-off-by: Florian Fainelli
On 15.10.2017 03:00, Florian Fainelli wrote:
Enable CONFIG_B53_SWITCH, define the CPU/management port number (8) and
enable all 5 ports of the switch to be usable.
Signed-off-by: Florian Fainelli
Reviewed-by: Stefan Roese
Thanks,
Stefan
Log:
"
MMC Device 1 not found
*** Warning - No MMC card found, using default environment
"
Add alias node for usdhc.
CONFIG_BLK and CONFIG_DM_USB are enabled.
Test:
=> usb tree
USB device tree:
1 Hub (480 Mb/s, 0mA)
| u-boot EHCI Host Controller
|
+-2 Mass Storage (480
On 10/16/2017 07:21 AM, Faiz Abbas wrote:
> A flush of the cache is required before any outbound DMA access can
> take place. The minimum size that can be flushed from the cache is
> one cache line size. Therefore, any buffer allocated for DMA should
> be in multiples of cache line size.
>
>
The HSDK can manage some pins via CREG registers block.
Signed-off-by: Eugeniy Paltsev
---
Changes v1->v2:
* Use linux debug function (debug -> pr_debug, errror -> pr_err)
as uboot "error" was removed.
MAINTAINERS | 6 +++
On Mon, Oct 16, 2017 at 7:29 AM, Peng Fan wrote:
> Log:
> "
> MMC Device 1 not found
> *** Warning - No MMC card found, using default environment
> "
> Add alias node for usdhc.
> CONFIG_BLK and CONFIG_DM_USB are enabled.
>
> Test:
> => usb tree
> USB device tree:
> 1
Hi Eugeniy,
On Fri, 2017-10-13 at 16:21 +0300, Eugeniy Paltsev wrote:
> The HSDK can manage some pins via CREG registers block.
>
> Signed-off-by: Eugeniy Paltsev
> ---
> MAINTAINERS | 6 +++
> drivers/gpio/Kconfig | 7 +++
>
Please run get_maintainer on this patch. I think you need to include a
few more people.
On 10/13/2017 03:08 AM, tien.fong.c...@intel.com wrote:
> From: Tien Fong Chee
>
> Add code necessary into the FPGA driver framework in U-Boot
> so it can be used via the 'fpga'
> -Original Message-
> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Otavio
> Salvador
> Sent: Monday, October 16, 2017 8:08 PM
> To: Peng Fan
> Cc: Fabio Estevam ; U-Boot Mailing List b...@lists.denx.de>
> Subject: Re:
With CONFIG_CMD_GPIO compilation reports error.
common/cmd_gpio.c:13:22: fatal error: asm/gpio.h: No such file or directory
#include
^
Signed-off-by: Eugeniy Paltsev
---
arch/arc/include/asm/gpio.h | 1 +
1 file changed, 1 insertion(+)
Log:
"
MMC Device 1 not found
*** Warning - No MMC card found, using default environment
"
Add alias node for usdhc.
Cleaned up board usb code.
Test:
=> usb tree
USB device tree:
1 Hub (480 Mb/s, 0mA)
| u-boot EHCI Host Controller
|
+-2 Mass Storage (480 Mb/s, 500mA)
On 10/13/2017 03:08 AM, tien.fong.c...@intel.com wrote:
> From: Tien Fong Chee
>
> Commit 2baa997240d ("arm: socfpga: Add FPGA driver support for Arria 10")
> Polling the wrong status bit. Fix with correct polling status bit.
This message doesn't reflect what the
the partition starting at 0x4400 is refused with overlap error:
$> gpt write mmc 0 "name=test,start=0x4400,size=0"
Writing GPT: Partition overlap
error!
even if the 0x4400 is the first available offset for LBA35 with default
value:
- MBR=LBA1
- GPT header=LBA2
- PTE= 32 LBAs (128 entry), 3
Signed-off-by: Patrick Delaunay
---
The write test failed on error
"Writing GPT: Partition overlap"
./test/py/test.py -k gpt --build
this regression is corrected in next commit of the patchset
Changes in v2: None
test/py/tests/test_gpt.py | 45
Hi,
Faiz Abbas writes:
Marek Vasut writes:
> On 10/16/2017 07:21 AM, Faiz Abbas wrote:
>> A flush of the cache is required before any outbound DMA access can
>> take place. The minimum size that can be flushed from the cache is
>> one
On 10/16/2017 04:08 PM, Dinh Nguyen wrote:
>
>
> On 10/13/2017 03:08 AM, tien.fong.c...@intel.com wrote:
>> From: Tien Fong Chee
>>
>> Generic firmware loader framework contains some common functionality
>> which is reusable by any specific file system firmware loader.
Hi Peng,
Subject should be changed as you are no longer fixing a MMC breakage.
On Mon, Oct 16, 2017 at 10:23 AM, Peng Fan wrote:
> Log:
> "
> MMC Device 1 not found
> *** Warning - No MMC card found, using default environment
This message should be removed as you are no
On 10/16/2017 10:17 AM, Patrick Delaunay wrote:
copy the persistent gpt binary file as it can be modified during the test
that avoid issue if the test fail: the test always restart with clean file
Acked-by: Stephen Warren
___
On 10/16/2017 04:20 PM, Felipe Balbi wrote:
>
> Hi,
>
> Faiz Abbas writes:
>> Hi Felipe,
>>
>> On Monday 16 October 2017 07:25 PM, Felipe Balbi wrote:
>>>
>>> Hi,
>>>
>>> Marek Vasut writes:
On 10/16/2017 07:21 AM, Faiz Abbas wrote:
> A flush of the
Hi Stephen
> From: Stephen Warren [mailto:swar...@wwwdotorg.org]
>
> On 10/10/2017 06:50 AM, Patrick DELAUNAY wrote:
> > Hi Stephen,
> >
> >> -Original Message-
> >> From: Stephen Warren [mailto:swar...@wwwdotorg.org]
> >>
> >> On 10/09/2017 01:47 AM, Patrick Delaunay wrote:
> >
> > But
Add test of first and last LBA in gpt for rename and swap.
Only the name is expected to change, so test 3 columns
for part command
1: first LBA (start)
2: last LBA (end)
3: partition name
Signed-off-by: Patrick Delaunay
---
WARNING: the last LBA are invalid after rename
in the last version v2017.09, I see some regression for the command
$> gpt write mmc 0 "name=test,start=0x4400,size=0"
$> gpt write mmc 0 "name=test,size=0"
I use sandbox python test to verify if this issue is also present in
v2017.11-rc1 and when I check the log tests, I detect a other issue
don't use prettyprint_part_size() in create_gpt_partitions_list()
that avoid to align offset and size to 1 MiB and increase precision for
start and size
This patch avoid the risk to change partition size
and lost data during swap
Signed-off-by: Patrick Delaunay
---
Hi,
Faiz Abbas writes:
> Hi Felipe,
>
> On Monday 16 October 2017 07:25 PM, Felipe Balbi wrote:
>>
>> Hi,
>>
>> Marek Vasut writes:
>>> On 10/16/2017 07:21 AM, Faiz Abbas wrote:
A flush of the cache is required before any outbound DMA access can
On 10/16/2017 04:51 PM, Felipe Balbi wrote:
>
> Hi,
>
> Faiz Abbas writes:
> Marek Vasut writes:
>> On 10/16/2017 07:21 AM, Faiz Abbas wrote:
>>> A flush of the cache is required before any outbound DMA access can
>>> take place. The minimum
On 10/13/2017 03:08 AM, tien.fong.c...@intel.com wrote:
> From: Tien Fong Chee
>
> These drivers handle FPGA program operation from flash loading
> RBF to memory and then to program FPGA.
>
> Signed-off-by: Tien Fong Chee
> ---
>
On 10/15/2017 10:04 PM, Udit Agarwal wrote:
> Adds config CONFIG_FSL_LS_PPA and CONFIG_FSL_CAAM in
> LS2080AQDS and LS2080ARDB secure boot defconfig.
>
> Removes CONFIG_FIT, as not required when CONFIG_FSL_LS_PPA
> is enabled.
Your reason is wrong. With CONFIG_FSL_LS_PPA enabled, CONFIG_FIT is
copy the persistent gpt binary file as it can be modified during the test
that avoid issue if the test fail: the test always restart with clean file
Signed-off-by: Patrick Delaunay
---
Changes in v2:
- Split test to functional change
test/py/tests/test_gpt.py | 23
Hi,
On Monday 16 October 2017 07:50 PM, Felipe Balbi wrote:
>
> Hi,
>
> Faiz Abbas writes:
>> Hi Felipe,
>>
>> On Monday 16 October 2017 07:25 PM, Felipe Balbi wrote:
>>>
>>> Hi,
>>>
>>> Marek Vasut writes:
On 10/16/2017 07:21 AM, Faiz Abbas wrote:
>
On Fri, Oct 13, 2017 at 8:48 PM, Eugeniy Paltsev
wrote:
> Add option to set spi controller clock frequency via device tree
> using standard clock bindings.
> Old way of setting spi controller clock frequency (via implementation
> of 'cm_get_spi_controller_clk_hz'
New options should be placed in defconfig according to the sequence
in .config.
Fixes: 4a59ada5e60d efi_selftest: enable CONFIG_CMD_BOOTEFI_SELFTEST
Suggested-by: Bin Meng
Signed-off-by: Heinrich Schuchardt
---
configs/qemu-x86_64_defconfig | 2 +-
On 10/16/2017 10:17 AM, Patrick Delaunay wrote:
Add test of first and last LBA in gpt for rename and swap.
Only the name is expected to change, so test 3 columns
for part command
1: first LBA (start)
2: last LBA (end)
3: partition name
Signed-off-by: Patrick Delaunay
On Fri, Oct 13, 2017 at 07:28:50PM +0900, Masahiro Yamada wrote:
> Both are unneeded in this file.
>
> Signed-off-by: Masahiro Yamada
> ---
>
> drivers/core/simple-bus.c | 3 ---
> 1 file changed, 3 deletions(-)
>
> diff --git a/drivers/core/simple-bus.c
On 10/16/2017 10:17 AM, Patrick Delaunay wrote:
Signed-off-by: Patrick Delaunay
There needs to be a patch description here, so anyone looking at git
history knows what this patch is intended to do.
---
The write test failed on error
"Writing GPT: Partition
On Fri, Oct 13, 2017 at 6:35 AM, Chris Packham wrote:
> Erratum NO. FE-9144572: The device SPI interface supports frequencies of
> up to 50 MHz. However, due to this erratum, when the device core clock
> is 250 MHz and the SPI interfaces is configured for 50MHz SPI clock
Up to now we depended on an exported variable to build u-boot.rom.
We should be able to specify it in the configuration file, too.
With this patch this becomes possible using the new Kconfig option
CONFIG_BUILD_ROM.
This option depends on CONFIG_X86 and is selected in
qemu-x86_defconfig and
On Tue, Oct 17, 2017 at 2:43 AM, Tom Rini wrote:
> On Tue, Oct 17, 2017 at 02:29:14AM +0530, Jagan Teki wrote:
>> On Mon, Oct 9, 2017 at 10:15 AM, Simon Glass wrote:
>> > Hi Andre,
>> >
>> > On 4 October 2017 at 17:24, Andre Przywara
Hi,
sorry Simon for dropping the ball earlier. I will try to answer both
Jagan's and your concern below.
On 16/10/17 21:59, Jagan Teki wrote:
> On Mon, Oct 9, 2017 at 10:15 AM, Simon Glass wrote:
>> Hi Andre,
>>
>> On 4 October 2017 at 17:24, Andre Przywara
This converts the following to Kconfig:
CONFIG_MTDIDS
CONFIG_MTDPARTS
For am3517_evm, omap3_logic, and da850evm variants.
Signed-off-by: Adam Ford
---
configs/am3517_evm_defconfig | 2 ++
configs/da850_am18xxevm_defconfig | 3 +++
configs/da850evm_defconfig
On Tue, Oct 17, 2017 at 3:07 AM, Chris Packham wrote:
> Erratum NO. FE-9144572: The device SPI interface supports frequencies of
> up to 50 MHz. However, due to this erratum, when the device core clock
> is 250 MHz and the SPI interfaces is configured for 50MHz SPI clock
On Mon, Oct 16, 2017 at 6:51 PM, Jagan Teki wrote:
> On Fri, Oct 13, 2017 at 7:03 PM, Fabio Estevam wrote:
>> Hi Lukasz,
>>
>> On Fri, Oct 13, 2017 at 5:16 AM, Lukasz Majewski wrote:
>>
>>> There is some ongoing work to provide such
Hi Felipe,
On Monday 16 October 2017 07:25 PM, Felipe Balbi wrote:
>
> Hi,
>
> Marek Vasut writes:
>> On 10/16/2017 07:21 AM, Faiz Abbas wrote:
>>> A flush of the cache is required before any outbound DMA access can
>>> take place. The minimum size that can be flushed from the
On Tue, Oct 10, 2017 at 10:48 PM, Antony Antony wrote:
> On Tue, Oct 10, 2017 at 07:21:57PM +0530, Jagan Teki wrote:
>> On Tue, Oct 10, 2017 at 7:18 PM, Peter Robinson wrote:
>> > Shouldn't we just be syncing changes to the DT from the kernel?
>>
>
> I
Erratum NO. FE-9144572: The device SPI interface supports frequencies of
up to 50 MHz. However, due to this erratum, when the device core clock
is 250 MHz and the SPI interfaces is configured for 50MHz SPI clock and
CPOL=CPHA=1 there might occur data corruption on reads from the SPI
device.
Hi,
I'm trying to use SPL_OF_CONTROL with u-boot,dm-spl So I've marked
u-boot,dm-spl with pinctrl since MMC used the pinconfig.
The issue observed here is SPL handover to U-Boot proper and before
relocation U-Boot probed imx_thermal dm-driver through device_probe.
But the same time device_probe
+ Tom
On 17-Oct-2017 12:44 AM, "Jagan Teki" wrote:
Hi,
I'm trying to use SPL_OF_CONTROL with u-boot,dm-spl So I've marked
u-boot,dm-spl with pinctrl since MMC used the pinconfig.
The issue observed here is SPL handover to U-Boot proper and before
relocation U-Boot
On Tue, Oct 17, 2017 at 10:46 AM, Jagan Teki wrote:
> On Tue, Oct 17, 2017 at 3:07 AM, Chris Packham
> wrote:
>> Erratum NO. FE-9144572: The device SPI interface supports frequencies of
>> up to 50 MHz. However, due to this erratum, when the
On Tue, Oct 17, 2017 at 02:29:14AM +0530, Jagan Teki wrote:
> On Mon, Oct 9, 2017 at 10:15 AM, Simon Glass wrote:
> > Hi Andre,
> >
> > On 4 October 2017 at 17:24, Andre Przywara wrote:
> >> Newer versions of the device tree compiler (rightfully)
On Wed, Oct 4, 2017 at 5:38 AM, Tom Rini wrote:
> On Tue, Oct 03, 2017 at 11:34:36PM +0100, Peter Robinson wrote:
>> Hi Tom,
>>
>> > So it's release day and I've put up v2017.11-rc1. The merge window is
>> > now closed and I've updated git and the tarballs are also up now.
>>
On Fri, Oct 13, 2017 at 7:03 PM, Fabio Estevam wrote:
> Hi Lukasz,
>
> On Fri, Oct 13, 2017 at 5:16 AM, Lukasz Majewski wrote:
>
>> There is some ongoing work to provide such facility. for imx6
>> boards. I will keep you informed.
>
> That's good news!
This converts the following to Kconfig:
CONFIG_SMC911X
CONFIG_SMC911X_BASE
CONFIG_SMC911X_32_BIT
There are a variety of boards that need some cleanup in their
respective include/configs file, but here is a foundation
for them to begin their transisiton.
Signed-off-by: Adam Ford
On Mon, Oct 9, 2017 at 10:15 AM, Simon Glass wrote:
> Hi Andre,
>
> On 4 October 2017 at 17:24, Andre Przywara wrote:
>> Newer versions of the device tree compiler (rightfully) complain about
>> mismatches between attributed node names (name@) and a
+Marek, Tom,
On Tue, Oct 17, 2017 at 11:14 AM, Suneel Garapati
wrote:
> Hi Bin/Simon,
>
> Request to know if this will be applied for v2017.11
>
Not sure which of you should pick this up for v2017.11.
> Regards,
> Suneel
>
Suneel, please avoid top-posting next time.
On 10/13/2017 03:08 AM, tien.fong.c...@intel.com wrote:
> From: Tien Fong Chee
>
> This patch enables DDR Kconfig support for Arria 10.
>
> Signed-off-by: Tien Fong Chee
> ---
> arch/arm/mach-socfpga/Kconfig | 1 +
>
Hello Chris,
Am 16.10.2017 um 23:08 schrieb Chris Packham:
Hi Heiko,
On Mon, Oct 16, 2017 at 5:24 PM, Heiko Schocher wrote:
Hello Chris,
Am 16.10.2017 um 02:38 schrieb Chris Packham:
This is probably something of a foot-gun but here we go...
I was wondering if it's worth
On 10/13/2017 03:08 AM, tien.fong.c...@intel.com wrote:
> From: Tien Fong Chee
>
> Enable memory allocation in SPL for preparation to enable FAT
> in SPL. Memory allocation is needed by FAT to work properly.
>
> Signed-off-by: Tien Fong Chee
Hello patrice,
Am 11.10.2017 um 15:30 schrieb patrice.chot...@st.com:
From: Christophe Kerello
As "v" is a local variable in stm32_i2c_choose_solution()
"v" has to be copied into "s" to avoid data abort in
stm32_i2c_compute_timing().
Signed-off-by: Christophe
2017-10-17 10:37 GMT+09:00 Tom Rini :
> On Tue, Oct 17, 2017 at 10:11:41AM +0900, Masahiro Yamada wrote:
>> I will move the pylibfdt build script under the scripts/dtc/ in the
>> next commit. We need two more files to build the pylibfdt.
>>
>> We have almost same copies in
The pylibfdt is used by dtoc (and, indirectly by binman), but there
is no reason why it must be generated in the tools/ directory.
Recently, U-Boot switched over to the bundled DTC, and the directory
structure under scripts/dtc/ now mirrors the upstream DTC project.
So, scripts/dtc/pylibfdt is
From: Rob Herring
libfdt has gained some new files. We need to include them in the
kernel's copy.
Reported-by: Kyle Yan
Signed-off-by: Rob Herring
Signed-off-by: Masahiro Yamada
[ Linux commit:
This adds the following commits from upstream:
b1a6003 tests: Add a test for overlays syntactic sugar
737b2df overlay: Add syntactic sugar version of overlays
497432f checks: Use proper format modifier for size_t
22a65c5 dtc: Bump version to v1.4.5
c575d80 Add fdtoverlay to .gitignore
b6a6f94
Currently, pylibfdt is always compiled if swig is installed on your
machine. It is really annoying because most of targets (excepts
x86, sunxi, rockchip) do not use dtoc or binman.
"checkbinman" and "checkdtoc" are wrong. It is odd that the final
build stage checks if we have built necessary
V2: resync scripts/dtc/ with linux-next-20171016
Masahiro Yamada (3):
scripts/dtc: Update to upstream version v1.4.5-3-gb1a60033c110
pylibfdt: move pylibfdt to scripts/dtc/pylibfdt and refactor makefile
pylibfdt: compile pylibfdt only when dtoc/binman is necessary
Rob Herring (1
On 10/13/2017 03:08 AM, tien.fong.c...@intel.com wrote:
> From: Tien Fong Chee
>
> Add DDR driver suppport for Arria 10.
s/suppport/support
>
> Signed-off-by: Tien Fong Chee
> ---
> arch/arm/mach-socfpga/include/mach/sdram.h |
Hi,
2017-10-15 22:02 GMT+09:00 Marek Vasut :
> Enable the XHCI support on all boards.
>
> Signed-off-by: Marek Vasut
> Cc: Nobuhiro Iwamatsu
Applied to rmobile branch.
Thanks,
Nobuhiro
> ---
>
Hi,
2017-10-15 21:53 GMT+09:00 Marek Vasut :
> To help out with the RCar/RMobile upstreaming, I'm adding myself
> as the RCar/RMobile maintainer.
Thanks for your help.
Acked-by: Nobuhiro Iwamatsu
>
> Signed-off-by: Marek Vasut
Hi Bin/Simon,
Request to know if this will be applied for v2017.11
Regards,
Suneel
On Sun, Sep 24, 2017 at 7:13 PM, Simon Glass wrote:
> On 20 September 2017 at 23:09, Suneel Garapati wrote:
>> add blk child devices to ignore list while displaying
This converts the following to Kconfig:
CONFIG_NAND_OMAP_GPMC
CONFIG_NAND_OMAP_GPMC_PREFETCH
CONFIG_NAND_OMAP_ELM
CONFIG_SPL_NAND_AM33XX_BCH
CONFIG_SPL_NAND_SIMPLE (ARCH_OMAP2PLUS only)
Signed-off-by: Adam Ford
---
V5: Rebase against master
V4: Fix missing data
On Tue, Oct 17, 2017 at 6:04 AM, Jagan Teki wrote:
> On Fri, Oct 13, 2017 at 6:35 AM, Chris Packham
> wrote:
>> Erratum NO. FE-9144572: The device SPI interface supports frequencies of
>> up to 50 MHz. However, due to this erratum, when the
Hi Heiko,
On Mon, Oct 16, 2017 at 5:24 PM, Heiko Schocher wrote:
> Hello Chris,
>
> Am 16.10.2017 um 02:38 schrieb Chris Packham:
>>
>> This is probably something of a foot-gun but here we go...
>>
>> I was wondering if it's worth providing the ability to silence the
>> output from
On Tue, Oct 03, 2017 at 09:38:44AM -0400, Tom Rini wrote:
> While this goes somewhat against normal coding style we should ensure
> that dev_desc is not NULL before we dereference it in allocation of
> legacy_mbr.
>
> Reported-by: Coverity (CID: 167292)
> Signed-off-by: Tom Rini
On Fri, Oct 06, 2017 at 03:04:57PM +0200, Marek Behún wrote:
> The variable res should be initialized to 0 in these functions,
> because if the searched key is not found, the variable is used
> uninitialized.
>
> Reported-by: Coverity (CID: 167335)
> Reported-by: Coverity (CID: 167336)
>
On Wed, Oct 04, 2017 at 08:28:03PM +0500, Mirza, Taimoor wrote:
> From: "Mirza, Taimoor"
>
> fit_handle_file function does not quote input and output files while preparing
> command to run DTC to convert .its to .itb. This results in a failure if input
> or output
On Sun, Oct 08, 2017 at 10:44:05PM +0300, Tuomas Tynkkynen wrote:
> This macro isn't used by anything, and in fact hasn't ever been used
> according to the Git logs.
>
> Signed-off-by: Tuomas Tynkkynen
Applied to u-boot/master, thanks!
--
Tom
signature.asc
On Wed, Oct 11, 2017 at 08:15:04PM -0700, Bin Meng wrote:
> Signed-off-by: Bin Meng
Applied to u-boot/master, thanks!
--
Tom
signature.asc
Description: PGP signature
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On Tue, Oct 10, 2017 at 09:59:43PM +0300, Tuomas Tynkkynen wrote:
> Removal of the legacy DataFlash code turned genimg_get_image() into a
> no-op. Drop all calls to it and the function itself.
>
> Signed-off-by: Tuomas Tynkkynen
Applied to u-boot/master, thanks!
--
On Mon, Oct 09, 2017 at 11:41:23AM +0200, patrice.chot...@st.com wrote:
> From: Patrice Chotard
>
> CLK() macro is a residue of a previously reworked patch,
> remove it.
>
> Signed-off-by: Patrice Chotard
> Reviewed-by: Vikas Manocha
On Tue, Oct 10, 2017 at 09:59:42PM +0300, Tuomas Tynkkynen wrote:
> Last user of this option went away in commit:
>
> fdc7718999 ("board: usb_a9263: Update to support DT and DM")
>
> Signed-off-by: Tuomas Tynkkynen
Applied to u-boot/master, thanks!
--
Tom
On Wed, Oct 11, 2017 at 11:56:10PM +0900, Masahiro Yamada wrote:
> I saw a DT build issue report some time before [1]. I was able to
> reproduce the bug, and figure out the root cause.
>
> Since commit 6d427c6b1fa0 ("binman: Automatically include a U-Boot
> .dtsi file"), invalid .*.cmd files
On Wed, Oct 11, 2017 at 03:34:33PM -0400, Tom Rini wrote:
> As the code currently stands, we first check that the length of the
> given command line, along with ip_str/mac_str along with an additional 1
> for the NULL termination will fit within the buffer we have, and if not,
> we return an
Hi Tom,
> -Original Message-
> > Fiexes: 6d427c6b1fa0 ("binman: Automatically include a U-Boot .dtsi
> file")
> > Signed-off-by: Masahiro Yamada
>
> Applied to u-boot/master, thanks!
>
Could you fix my typo?
Fiexes -> Fixes
If it is too late, it if
On Thu, Oct 12, 2017 at 09:32:41PM -0500, Matt Weber wrote:
> If building in a sandboxed environment where a
> alternate python interpreter is desired. Allow
> configuring of the PYTHON variable to specify
> the interpreter to invoke setup.py.
>
> Signed-off-by: Matthew Weber
On Thu, Oct 12, 2017 at 10:47:05PM -0500, Praneeth Bajjuri wrote:
> 'commit fa24eca1f20a ("omap: Add routine for setting fastboot variables")'
> adds initial support and usage of "fastboot getvar" command
> for DRA75x and DRA72x devices.
>
> and
> 'commit 0f9e6aee9dbc ("arm: dra76: Add support
On Thu, Oct 12, 2017 at 10:47:02PM -0500, Praneeth Bajjuri wrote:
> Add vendor partition to Android GPT table for eMMC.
>
> A Vendor image contains SoC-specific code and configuration.
>
> Prior to Android 8.0, the vendor partition was optional ;
> files belonging to these images were placed in
On Thu, Oct 12, 2017 at 11:37:37PM +0200, Heinrich Schuchardt wrote:
> Fix typos in USB tty driver.
>
> Signed-off-by: Heinrich Schuchardt
Applied to u-boot/master, thanks!
--
Tom
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I will move the pylibfdt build script under the scripts/dtc/ in the
next commit. We need two more files to build the pylibfdt.
We have almost same copies in lib/libfdt, but we are collecting all
DTC-derived files into scripts/dtc.
Import fdt_addresses.c and fdt_overlay.c from DTC v1.4.5.
Hey all,
It's release day and v2017.11-rc2 is out. I'm mostly happy with the
size of the changes here and I did remember to sync the defconfigs prior
to tagging.
At this point, any changes that come in need to be clear fixes to a
problem or Kconfig migrations that can be shown as correct.
I
On Mon, Oct 16, 2017 at 08:48:16PM -0400, Tom Rini wrote:
> On Thu, Oct 12, 2017 at 09:32:41PM -0500, Matt Weber wrote:
>
> > If building in a sandboxed environment where a
> > alternate python interpreter is desired. Allow
> > configuring of the PYTHON variable to specify
> > the interpreter to
On Mon, Oct 02, 2017 at 01:42:55PM +, ext-vasily.gurev...@vaisala.com wrote:
> Remove depends on TI_SECURE_DEVICE for other platforms.
>
> Signed-off-by: Vasily Gurevich
Applied to u-boot/master, thanks!
--
Tom
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