Hi Dan,
On 07/08/2013 11:59 PM, Dan Murphy wrote:
Add code to configure the USB EHCI host controller.
This enumerates an ethernet controller through USB3 using
the HSIC lines.
Signed-off-by: Dan Murphy dmur...@ti.com
---
arch/arm/cpu/armv7/omap5/hw_data.c | 15 +++
On 07/08/2013 11:59 PM, Dan Murphy wrote:
Need to check why gpio toggling in ehci-omap is not
working and works only from ehci-hcd.
do you mean HSIC detection is not working?
GPIO toggling has to work from anywhere.
Signed-off-by: Dan Murphy dmur...@ti.com
---
Dan,
On 07/10/2013 11:05 PM, Dan Murphy wrote:
Add an interface to the palmas driver to enable the
LDO9 power supply for the USB hub IC.
As per rev.C1 uEVM schematics, LDO9 is for SDIO card and not for USB hub.
USB hub seems to be powered by DC_5V directly.
Which version are you referring
On 07/11/2013 06:51 AM, Lokesh Vutla wrote:
On Thursday 11 July 2013 01:35 AM, Dan Murphy wrote:
* Enable the OMAP5 EHCI host clocks
* Add OMAP5 EHCI register definitions
* Add OMAP5 ES2 host revision
Signed-off-by: Dan Murphy dmur...@ti.com
---
arch/arm/cpu/armv7/omap5/hw_data.c |
On 07/11/2013 02:16 AM, Dan Murphy wrote:
On 07/10/2013 05:20 PM, Marek Vasut wrote:
Dear Dan Murphy,
Add a __weak function that can be overridden to reset devices
attached to an ehci devices after the FEAT_POWER has been submitted
Signed-off-by: Dan Murphy dmur...@ti.com
---
On 07/11/2013 11:35 AM, Sricharan R wrote:
On Thursday 11 July 2013 01:28 PM, Roger Quadros wrote:
On 07/11/2013 06:51 AM, Lokesh Vutla wrote:
On Thursday 11 July 2013 01:35 AM, Dan Murphy wrote:
* Enable the OMAP5 EHCI host clocks
* Add OMAP5 EHCI register definitions
* Add OMAP5 ES2 host
Hi Marek,
On 07/11/2013 03:35 PM, Marek Vasut wrote:
Dear Roger Quadros,
On 07/11/2013 02:16 AM, Dan Murphy wrote:
On 07/10/2013 05:20 PM, Marek Vasut wrote:
Dear Dan Murphy,
Add a __weak function that can be overridden to reset devices
attached to an ehci devices after the FEAT_POWER
Dan,
On 07/17/2013 11:16 PM, Dan Murphy wrote:
* Enable the OMAP5 EHCI host clocks
* Add OMAP5 EHCI register definitions
* Add OMAP5 ES2 host revision
Signed-off-by: Dan Murphy dmur...@ti.com
---
v3 - Updated per comments - http://patchwork.ozlabs.org/patch/258230/
On 07/18/2013 08:48 PM, Dan Murphy wrote:
Dear Roger
On 07/18/2013 02:10 AM, Roger Quadros wrote:
Dan,
On 07/17/2013 11:16 PM, Dan Murphy wrote:
* Enable the OMAP5 EHCI host clocks
* Add OMAP5 EHCI register definitions
* Add OMAP5 ES2 host revision
Signed-off-by: Dan Murphy dmur
is used.
e.g. NFS root failures with Linux kernel.
Signed-off-by: Roger Quadros rog...@ti.com
---
drivers/usb/host/ehci-omap.c | 27 +++
1 files changed, 15 insertions(+), 12 deletions(-)
diff --git a/drivers/usb/host/ehci-omap.c b/drivers/usb/host/ehci-omap.c
index 086c697
Hi Marek,
On 07/25/2013 08:32 AM, Marek Vasut wrote:
Dear Dan Murphy,
Marek
On 07/17/2013 11:30 PM, Marek Vasut wrote:
Dear Dan Murphy,
Add a __weak function that can be overridden to reset devices
attached to an ehci devices after the FEAT_POWER has been submitted
Signed-off-by: Dan
Hi,
On 08/20/2013 11:50 AM, Andreas Naumann wrote:
Hi,
Am 16.08.2013 17:30, schrieb Robert Nelson:
On Fri, Aug 16, 2013 at 10:07 AM, Robert Nelson robertcnel...@gmail.com
wrote:
On Fri, Aug 16, 2013 at 9:34 AM, Peter A. Bigot p...@pabigot.com wrote:
On 08/16/2013 08:38 AM, Tom Rini
on boards not using CONFIG_USB_EHCI_OMAP
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/cpu/armv7/omap-common/clocks-common.c |4
1 files changed, 0 insertions(+), 4 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap-common/clocks-common.c
b/arch/arm/cpu/armv7/omap-common/clocks
ON).
With this patch we unconditionally configure the USB DPLL so it functions
properly even on boards not using CONFIG_USB_EHCI_OMAP
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/cpu/armv7/omap-common/clocks-common.c |4
1 files changed, 0 insertions(+), 4 deletions(-)
diff --git a/arch
unconditionally configure the USB DPLL so it functions
properly even on boards not using CONFIG_USB_EHCI_OMAP
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/cpu/armv7/omap-common/clocks-common.c |4
1 files changed, 0 insertions(+), 4 deletions(-)
diff --git a/arch/arm/cpu/armv7
Hi Dan,
On 01/28/2014 10:01 PM, Dan Murphy wrote:
Add the SATA boot support for OMAP5 and dra7xx.
Renamed the omap_sata_init to the common init_sata(int dev)
for commonality in with sata stack.
Added the ROM boot device ID for SATA.
Signed-off-by: Dan Murphy dmur...@ti.com
---
Hi Dan,
On 01/28/2014 10:01 PM, Dan Murphy wrote:
Add spl_sata to read a fat partition from a bootable SATA
drive.
Signed-off-by: Dan Murphy dmur...@ti.com
---
common/Makefile |3 +++
common/cmd_scsi.c |2 ++
common/spl/Makefile |1 +
common/spl/spl.c |
On 01/29/2014 03:07 PM, Dan Murphy wrote:
Roger
On 01/29/2014 03:16 AM, Roger Quadros wrote:
Hi Dan,
On 01/28/2014 10:01 PM, Dan Murphy wrote:
Add spl_sata to read a fat partition from a bootable SATA
drive.
Signed-off-by: Dan Murphy dmur...@ti.com
---
common/Makefile |3
On 02/03/2014 02:59 PM, Dan Murphy wrote:
Add the SATA boot support for OMAP5 and dra7xx.
Renamed the omap_sata_init to the common init_sata(int dev)
for commonality in with sata stack.
Added the ROM boot device ID for SATA.
Signed-off-by: Dan Murphy dmur...@ti.com
Reviewed-by: Roger
Hi Dan,
On 02/03/2014 02:59 PM, Dan Murphy wrote:
Add spl_sata to read a fat partition from a bootable SATA
drive.
Signed-off-by: Dan Murphy dmur...@ti.com
---
I got some check-patch errors with this one.
Once that is fixed you can please add
Reviewed-by: Roger Quadros rog...@ti.com
Dan,
On 02/07/2014 04:11 PM, Dan Murphy wrote:
Roger
On 02/07/2014 03:48 AM, Roger Quadros wrote:
Hi Dan,
On 02/03/2014 02:59 PM, Dan Murphy wrote:
Add spl_sata to read a fat partition from a bootable SATA
drive.
Signed-off-by: Dan Murphy dmur...@ti.com
---
I got some check-patch
: Stefan Roese s...@denx.de
Reviewed-by: Stefan Roese s...@denx.de
Signed-off-by: Roger Quadros rog...@ti.com
---
drivers/usb/host/ehci-omap.c | 57
1 file changed, 42 insertions(+), 15 deletions(-)
diff --git a/drivers/usb/host/ehci-omap.c b/drivers
-off-by: Roger Quadros rog...@ti.com
---
include/configs/omap4_panda.h | 3 ---
1 file changed, 3 deletions(-)
diff --git a/include/configs/omap4_panda.h b/include/configs/omap4_panda.h
index 8294622..89b1c51 100644
--- a/include/configs/omap4_panda.h
+++ b/include/configs/omap4_panda.h
@@ -36,9
-off-by: Roger Quadros rog...@ti.com
---
include/configs/omap3_beagle.h | 3 ---
1 file changed, 3 deletions(-)
diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h
index 9fcd50b..88b67e7 100644
--- a/include/configs/omap3_beagle.h
+++ b/include/configs/omap3_beagle.h
Hi,
On 12/04/2013 11:58 AM, Tomi Valkeinen wrote:
On 2013-12-02 15:47, Roger Quadros wrote:
Hi,
This series
- Fixes OMAP4 Panda USB device detection issues
- Gets rid of ULPI reset errors on Beagle Panda
---
cheers,
-roger
Roger Quadros (3):
usb: ehci-omap: Reset the USB Host
; Krishnamoorthy, Balaji T;
rob.herr...@calxeda.com; V, Aneesh
Subject: Re: [U-Boot] [RFC][PATCH 0/5] SATA support for OMAP5 uevm
+Aneesh.
Hi Enric,
On 11/07/2013 10:52 AM, Enric Balletbo Serra wrote:
Hi Roger,
Thanks for the patches!
2013/11/6 Roger Quadros rog...@ti.com:
Hi
On OMAP platforms, SATA controller provides the SCSI subsystem
so implement scsi_init().
Get rid of the unnecessary sata_init() call from dra7xx-evm
and omap5-uevm board files.
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/cpu/armv7/omap-common/sata.c | 6 ++
board/ti/dra7xx/evm.c
l3_interrupt_handler+0x260/0x358()
4400.ocp:L3 Custom Error: MASTER SATA TARGET GPMC (Idle): Data Access in
User mode during Functional access
Signed-off-by: Roger Quadros rog...@ti.com
---
drivers/block/ahci.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/block/ahci.c b/drivers/block/ahci.c
At least on OMAP, init_sata() no longer performs scsi_scan()
so we must do it explicitly here.
Cc: Dan Murphy dmur...@ti.com
Signed-off-by: Roger Quadros rog...@ti.com
---
common/spl/spl_sata.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/common/spl/spl_sata.c b/common/spl/spl_sata.c
Hi,
Patch 1 fixes a bug in the AHCI code that was causing L3 errors
on OMAP platforms.
Patches 3, 4 and 5 clean up the SATA/SCSI implementation for OMAP
platorms.
cheers,
-roger
---
Roger Quadros (4):
ahci: Don't start command DMA engine before buffers are set
OMAP5+: sata/scsi: Implement
scsi_scan() must be called as part of scsi_init() and not
as part of sata_init().
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/cpu/armv7/omap-common/sata.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/cpu/armv7/omap-common/sata.c
b/arch/arm/cpu/armv7
Add platform glue logic for the SATA controller.
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/cpu/armv7/omap-common/Makefile | 3 ++
arch/arm/cpu/armv7/omap-common/sata.c | 78 +
arch/arm/include/asm/arch-omap5/sata.h | 48
3
Hi,
This series adds SATA support for OMAP5 uevm board.
This is an RFC patchset for review only. Patches are based
on v2013.10.
cheers,
-roger
---
Roger Quadros (5):
ahci: Error out with message on malloc() failure
ARM: OMAP5: Add Pipe3 PHY driver
ARM: OMAP5: Add PRCM and Control
Pipe3 PHY is used by SATA, USB3 and PCIe modules. This is
a driver for the Pipe3 PHY.
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/cpu/armv7/omap-common/Makefile| 4 +
arch/arm/cpu/armv7/omap-common/pipe3-phy.c | 233 +
arch/arm/cpu/armv7/omap-common
If malloc() fails, we don't want to continue in ahci_init() and
ahci_init_one(). Also print a more informative error message on
malloc() failures.
CC: Rob Herring rob.herr...@calxeda.com
Signed-off-by: Roger Quadros rog...@ti.com
---
drivers/block/ahci.c | 16 ++--
1 file changed, 14
Adds the necessary PRCM and Control register information for
SATA on OMAP5.
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/cpu/armv7/omap5/prcm-regs.c| 5 +
arch/arm/include/asm/arch-omap5/clock.h | 3 +++
arch/arm/include/asm/arch-omap5/omap.h | 3 +++
arch/arm/include/asm
The uevm has a SATA port. Inititialize the SATA controller.
Signed-off-by: Roger Quadros rog...@ti.com
---
board/ti/omap5_uevm/evm.c| 7 +++
include/configs/omap5_uevm.h | 10 ++
2 files changed, 17 insertions(+)
diff --git a/board/ti/omap5_uevm/evm.c b/board/ti/omap5_uevm
+Aneesh.
Hi Enric,
On 11/07/2013 10:52 AM, Enric Balletbo Serra wrote:
Hi Roger,
Thanks for the patches!
2013/11/6 Roger Quadros rog...@ti.com:
Hi,
This series adds SATA support for OMAP5 uevm board.
This is an RFC patchset for review only. Patches are based
on v2013.10.
cheers
On 11/06/2013 11:48 PM, Tom Rini wrote:
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 11/06/2013 09:47 AM, Roger Quadros wrote:
Pipe3 PHY is used by SATA, USB3 and PCIe modules. This is
a driver for the Pipe3 PHY.
Signed-off-by: Roger Quadros rog...@ti.com
[snip]
+#define perror(fmt
On 11/07/2013 12:11 AM, Tom Rini wrote:
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 11/06/2013 09:47 AM, Roger Quadros wrote:
Add platform glue logic for the SATA controller.
Signed-off-by: Roger Quadros rog...@ti.com
[snip]
diff --git a/arch/arm/cpu/armv7/omap-common/Makefile
b
-Boot] [RFC][PATCH 0/5] SATA support for OMAP5 uevm
+Aneesh.
Hi Enric,
On 11/07/2013 10:52 AM, Enric Balletbo Serra wrote:
Hi Roger,
Thanks for the patches!
2013/11/6 Roger Quadros rog...@ti.com:
Hi,
This series adds SATA support for OMAP5 uevm board.
This is an RFC patchset
If malloc() fails, we don't want to continue in ahci_init() and
ahci_init_one(). Also print a more informative error message on
malloc() failures.
CC: Rob Herring rob.herr...@calxeda.com
Signed-off-by: Roger Quadros rog...@ti.com
---
drivers/block/ahci.c | 16 ++--
1 file changed, 14
Hi,
This series adds SATA support for OMAP5 uevm and DRA7 evm.
Patches are also availabe at
g...@github.com:rogerq/u-boot.git sata
v2:
- Address review comments in the RFC series
- Fix cache align error in the ahci driver
- Added dra7 support
cheers,
-roger
Roger Quadros (8):
ahci
: Aneesh V ane...@ti.com
Signed-off-by: Roger Quadros rog...@ti.com
---
drivers/block/ahci.c | 8 +---
1 file changed, 1 insertion(+), 7 deletions(-)
diff --git a/drivers/block/ahci.c b/drivers/block/ahci.c
index e24d634..e64df4f 100644
--- a/drivers/block/ahci.c
+++ b/drivers/block/ahci.c
Pipe3 PHY is used by SATA, USB3 and PCIe modules. This is
a driver for the Pipe3 PHY.
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/cpu/armv7/omap-common/Makefile| 4 +
arch/arm/cpu/armv7/omap-common/pipe3-phy.c | 233 +
arch/arm/cpu/armv7/omap-common
Adds the necessary PRCM and Control register information for
SATA on OMAP5.
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/cpu/armv7/omap5/prcm-regs.c| 4
arch/arm/include/asm/arch-omap5/clock.h | 3 +++
arch/arm/include/asm/arch-omap5/omap.h | 3 +++
arch/arm/include/asm
Add platform glue logic for the SATA controller.
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/cpu/armv7/omap-common/Makefile | 1 +
arch/arm/cpu/armv7/omap-common/sata.c | 75 +
arch/arm/include/asm/arch-omap5/sata.h | 48 +
3
The evm has a SATA port. Enable SATA configuration and
inititialize the SATA controller.
Signed-off-by: Roger Quadros rog...@ti.com
---
board/ti/dra7xx/evm.c| 7 +++
include/configs/dra7xx_evm.h | 11 +++
2 files changed, 18 insertions(+)
diff --git a/board/ti/dra7xx/evm.c
The uevm has a SATA port. Inititialize the SATA controller.
Signed-off-by: Roger Quadros rog...@ti.com
---
board/ti/omap5_uevm/evm.c| 7 +++
include/configs/omap5_uevm.h | 10 ++
2 files changed, 17 insertions(+)
diff --git a/board/ti/omap5_uevm/evm.c b/board/ti/omap5_uevm
Adds the necessary PRCM and Control register information for
SATA on DRA7xx.
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/cpu/armv7/omap5/prcm-regs.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/cpu/armv7/omap5/prcm-regs.c
b/arch/arm/cpu/armv7/omap5/prcm-regs.c
On 11/11/2013 03:56 PM, Tom Rini wrote:
On Mon, Nov 11, 2013 at 03:31:16PM +0200, Roger Quadros wrote:
Align the ATA ID buffer to the cache-line boundary. This gets rid
of the below error mesages on ARM v7 platforms.
scanning bus for devices...
ERROR: v7_dcache_inval_range - start address
On 11/11/2013 03:52 PM, Tom Rini wrote:
On Thu, Nov 07, 2013 at 02:23:32PM +0200, Roger Quadros wrote:
On 11/06/2013 11:48 PM, Tom Rini wrote:
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 11/06/2013 09:47 AM, Roger Quadros wrote:
Pipe3 PHY is used by SATA, USB3 and PCIe modules
Pipe3 PHY is used by SATA, USB3 and PCIe modules. This is
a driver for the Pipe3 PHY.
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/cpu/armv7/omap-common/Makefile| 4 +
arch/arm/cpu/armv7/omap-common/pipe3-phy.c | 231 +
arch/arm/cpu/armv7/omap-common
in the ahci driver
- Added dra7 support
cheers,
-roger
Roger Quadros (8):
ahci: Error out with message on malloc() failure
ahci: Fix cache align error messages
ARM: OMAP5: Add Pipe3 PHY driver
ARM: OMAP5: Add PRCM and Control information for SATA
ARM: OMAP5: Add SATA platform glue
ARM
If malloc() fails, we don't want to continue in ahci_init() and
ahci_init_one(). Also print a more informative error message on
malloc() failures.
CC: Rob Herring rob.herr...@calxeda.com
Signed-off-by: Roger Quadros rog...@ti.com
---
drivers/block/ahci.c | 16 ++--
1 file changed, 14
: Aneesh V ane...@ti.com
Signed-off-by: Roger Quadros rog...@ti.com
---
drivers/block/ahci.c | 8 +---
1 file changed, 1 insertion(+), 7 deletions(-)
diff --git a/drivers/block/ahci.c b/drivers/block/ahci.c
index e24d634..e64df4f 100644
--- a/drivers/block/ahci.c
+++ b/drivers/block/ahci.c
The uevm has a SATA port. Inititialize the SATA controller.
Signed-off-by: Roger Quadros rog...@ti.com
---
board/ti/omap5_uevm/evm.c| 7 +++
include/configs/omap5_uevm.h | 10 ++
2 files changed, 17 insertions(+)
diff --git a/board/ti/omap5_uevm/evm.c b/board/ti/omap5_uevm
Adds the necessary PRCM and Control register information for
SATA on OMAP5.
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/cpu/armv7/omap5/prcm-regs.c| 4
arch/arm/include/asm/arch-omap5/clock.h | 3 +++
arch/arm/include/asm/arch-omap5/omap.h | 3 +++
arch/arm/include/asm
The evm has a SATA port. Enable SATA configuration and
inititialize the SATA controller.
Signed-off-by: Roger Quadros rog...@ti.com
---
board/ti/dra7xx/evm.c| 7 +++
include/configs/dra7xx_evm.h | 11 +++
2 files changed, 18 insertions(+)
diff --git a/board/ti/dra7xx/evm.c
Adds the necessary PRCM and Control register information for
SATA on DRA7xx.
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/cpu/armv7/omap5/prcm-regs.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/cpu/armv7/omap5/prcm-regs.c
b/arch/arm/cpu/armv7/omap5/prcm-regs.c
Add platform glue logic for the SATA controller.
Signed-off-by: Roger Quadros rog...@ti.com
---
arch/arm/cpu/armv7/omap-common/Makefile | 1 +
arch/arm/cpu/armv7/omap-common/sata.c | 75 +
arch/arm/include/asm/arch-omap5/sata.h | 48 +
3
Hi Eli,
On 04/01/2014 04:09 PM, Eli Nidam wrote:
Hi Roger,
In u-boot I tried to run twice the command “scsi init” and on the second time
it’s hung,,
after debug I found the patch ahci: Fix cache align error messages
replace the malloc with ALLOC_CACHE_ALIGN_BUFFER.
And remove the line
-by: Eli Nidam el...@marvell.com
Signed-off-by: Roger Quadros rog...@ti.com
---
drivers/block/ahci.c | 23 ---
1 file changed, 16 insertions(+), 7 deletions(-)
diff --git a/drivers/block/ahci.c b/drivers/block/ahci.c
index a409f63..c8f6573 100644
--- a/drivers/block/ahci.c
+++ b
-off-by: Roger Quadros rog...@ti.com
---
include/configs/omap3_beagle.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h
index f25a940..5ea048a 100644
--- a/include/configs/omap3_beagle.h
+++ b/include/configs
On 11/05/2014 04:18 PM, Tom Rini wrote:
On Wed, Nov 05, 2014 at 03:57:34PM +0200, Roger Quadros wrote:
Push the device tree blob load address (fdtaddr) further apart than
kernel load address (loadaddr) to accomodate a larger kernel image.
We set fdtaddr to the same value as set
On 20/03/15 13:24, Yegor Yefremov wrote:
On Thu, Mar 19, 2015 at 4:56 PM, Daniel Mack zon...@gmail.com wrote:
On 03/19/2015 04:13 PM, Yegor Yefremov wrote:
Strange. Have tried with nand read command, but still the same
result with and without CONFIG_NAND_OMAP_GPMC_PREFETCH :
[2.150655
+Tony and l-o
On 20/03/15 15:37, Yegor Yefremov wrote:
On Fri, Mar 20, 2015 at 1:37 PM, Roger Quadros rog...@ti.com wrote:
On 20/03/15 13:24, Yegor Yefremov wrote:
On Thu, Mar 19, 2015 at 4:56 PM, Daniel Mack zon...@gmail.com wrote:
On 03/19/2015 04:13 PM, Yegor Yefremov wrote:
Strange. Have
Tom,
On 06/03/15 18:28, Tom Rini wrote:
On Fri, Mar 06, 2015 at 05:34:24PM +0200, Roger Quadros wrote:
Don't redefine fdtaddr and other values that are already defined in
ti_armv7_common.h. The value of fdtaddr in ti_armv7_common.h is
more appropriate as it allows a larger kernel image
Don't redefine fdtaddr and other values that are already defined in
ti_armv7_common.h. The value of fdtaddr in ti_armv7_common.h is
more appropriate as it allows a larger kernel image to be loaded.
With this change, I'm able to boot linux-4.0-rc1 with device tree blob.
Signed-off-by: Roger
Hi,
These are some NAND boot cleanups and NAND boot support for am43xx_evm.
cheers,
-roger
Roger Quadros (2):
am335x_evm: am44xx_evm: dra7xx_evm: nand: Fix file-system partition
name
am335x_evm: nand: Fix boot from NAND
Tom Rini (1):
am43xx_evm: Enable NAND boot
include/configs
) also uses NAND.file-system to name the
last NAND partition. This patch makes the partition name consistent
between u-boot and the kernel.
Signed-off-by: Roger Quadros rog...@ti.com
---
include/configs/am335x_evm.h | 2 +-
include/configs/am43xx_evm.h | 2 +-
include/configs/dra7xx_evm.h | 2 +-
3
AM43xx EVMs have NAND so enable it.
Signed-off-by: Roger Quadros rog...@ti.com
---
configs/am43xx_evm_defconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/configs/am43xx_evm_defconfig b/configs/am43xx_evm_defconfig
index 4ad2667..29a3892 100644
--- a/configs
Use the correct partition names from with the Device Tree blob
and the kernel is picked up. Also use partition name instead of
number for the root filesystem in the kernel boot arguments.
Signed-off-by: Roger Quadros rog...@ti.com
---
include/configs/am335x_evm.h | 6 +++---
1 file changed, 3
From: Tom Rini tr...@ti.com
Enable booting from NAND on the am437xx-evm.
Signed-off-by: Tom Rini tr...@ti.com
Signed-off-by: Roger Quadros rog...@ti.com
---
include/configs/am43xx_evm.h | 24 ++--
1 file changed, 22 insertions(+), 2 deletions(-)
diff --git a/include/configs
it doesn't matter to it if these
pins are in safe mode. The kernel driver correctly configures
the right mode when DCAN1 is active.
Signed-off-by: Roger Quadros rog...@ti.com
---
board/ti/beagle_x15/mux_data.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/board/ti
it doesn't matter to it if these
pins are in safe mode. The kernel driver correctly configures
the right mode when DCAN1 is active.
Signed-off-by: Roger Quadros rog...@ti.com
---
board/ti/dra7xx/mux_data.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/board/ti/dra7xx
On 10/07/15 15:57, Tom Rini wrote:
On Thu, Jun 25, 2015 at 10:25:50AM +0300, Roger Quadros wrote:
If board is booted with transitions happening on DCAN1 pins then
the following warning is seen in the kernel at boot when the
hwmod layer initializes.
omap_hwmod: dcan1: _wait_target_disable
Some TI boards (e.g. IDK) have 4 to 6 ethernet ports and
this function is handy at board.c to configure the
MAC address of the ports.
Signed-off-by: Roger Quadros <rog...@ti.com>
---
include/net.h | 17 +
1 file changed, 17 insertions(+)
diff --git a/include/net.h b/i
In a dual speed configuration we need to check at runtime if
we want to enable the Full-Speed or High-Speed endpoint.
Signed-off-by: Roger Quadros <rog...@ti.com>
Acked-by: Lukasz Majewski <l.majew...@samsung.com>
Tested-by: Steve Rae <s...@broadcom.com>
[Test HW: bcm2
rx_remain=%d, maxpacket=%d,
> rem=%d\n", rx_remain, maxpacket, rem);
> +#if 0
> if (rx_remain < maxpacket) {
> rx_remain = maxpacket;
> } else if (rx_remain % maxpacket != 0) {
> rem = rx_remain % maxpacket;
>
Hi,
On 13/04/16 15:01, Semen Protsenko wrote:
> From: Sam Protsenko
>
> Some UDC controllers may require buffer size to be aligned to
> wMaxPacketSize. It's indicated by gadget->quirk_ep_out_aligned_size
> field being set to "true" (in UDC driver code). In that case
nsfer TypeBulk
Synch Type None
Usage Type Data
wMaxPacketSize 0x0200 1x 512 bytes
bInterval 0
cheers,
-roger
Roger Quadros (2):
fastboot: Fix wMaxPacketSize for High-Speed IN endpoint
fastboot: Enable the
to to fastboot_bind.
- check for dual speed configuration before setting the high speed descriptors.
Signed-off-by: Roger Quadros <rog...@ti.com>
---
drivers/usb/gadget/f_fastboot.c | 36 +++-
1 file changed, 27 insertions(+), 9 deletions(-)
diff --git a/d
In a dual speed configuration we need to check at runtime if
we want to enable the Full-Speed or High-Speed endpoint.
Signed-off-by: Roger Quadros <rog...@ti.com>
---
drivers/usb/gadget/f_fastboot.c | 19 +++
1 file changed, 15 insertions(+), 4 deletions(-)
diff --git a/d
Lukasz,
On 12/04/16 16:37, Lukasz Majewski wrote:
> Hi Roger,
>
>> Hi,
>>
>> On 12/04/16 14:19, Lukasz Majewski wrote:
>>> Hi Tom, Mugunthan
>>>
On Mon, Apr 11, 2016 at 05:04:56PM +0530, Mugunthan V N wrote:
> On Friday 08 April 2016 12:10 AM, Marek Vasut wrote:
>> On 04/07/2016
Hi,
On 12/04/16 14:19, Lukasz Majewski wrote:
> Hi Tom, Mugunthan
>
>> On Mon, Apr 11, 2016 at 05:04:56PM +0530, Mugunthan V N wrote:
>>> On Friday 08 April 2016 12:10 AM, Marek Vasut wrote:
On 04/07/2016 06:46 PM, Sam Protsenko wrote:
> On Thu, Apr 7, 2016 at 10:36 AM, Lukasz Majewski
The MAC addresses for the PRU Ethernet ports will be available in the
board EEPROM as an address range. Populate those MAC addresses (if valid)
into the u-boot environment so that they can be passed on to the
device tree during fdt_fixup_ethernet().
Signed-off-by: Roger Quadros <rog...@ti.
Hi,
The MAC addresses for the PRU Ethernet ports will be available in the
board EEPROM as an address range. Populate those MAC addresses (if valid)
into the u-boot environment so that they can be passed on to the
device tree during fdt_fixup_ethernet().
cheers,
-roger
Roger Quadros (2):
net
..@ti.com>
Signed-off-by: Roger Quadros <rog...@ti.com>
---
board/ti/am57xx/board.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/board/ti/am57xx/board.c b/board/ti/am57xx/board.c
index 042f9ab..34c5161 100644
--- a/board/ti/am57xx/board.c
+++ b/board/ti/am57xx/board.c
@@ -264,7 +264,6
Steve,
On 13/04/16 04:55, Steve Rae wrote:
> On Tue, Apr 12, 2016 at 6:50 AM, Roger Quadros <rog...@ti.com> wrote:
>> Lukasz,
>>
>> On 12/04/16 16:37, Lukasz Majewski wrote:
>>> Hi Roger,
>>>
>>>> Hi,
>>>>
>>>> On 1
handling to within CONFIG_USB_DWC3.
Fixes: 6f1af1e358b7 ("board: ti: invoke clock API to enable and disable clocks")
Signed-off-by: Roger Quadros <rog...@ti.com>
---
board/ti/am43xx/board.c | 58 -
board/ti/am5
CONFIG_USB_XHCI_OMAP is enabled for host mode independent of CONFIG_USB_DWC3
which is meant for gadget mode only. We need enable/disbale_usb_clocks() for
host mode as well so provide for it.
Fixes: 09cc14f4bcbf ("ARM: AM43xx: Add functions to enable and disable USB
clocks"
Signed-off
The index returned by get_sys_clk_index() is not exactly what we expect.
Let's not rely on that and use get_sys_clk_freq() instead.
This fixes missing USB3 devices in the Linux kernel when USB is started
in u-boot. It still doesn't fix missing USB3 devices in u-boot though.
Signed-off-by: Roger
-Speed working in u-boot.
Patch 4 does fix an issue with Kernel failing to detect Super-Speed devices.
cheers,
-roger
Roger Quadros (4):
ARM: OMAP5+: Provide enable/disable_usb_clocks() for
CONFIG_USB_XHCI_OMAP
ARM: AM57xx: AM43xx: Fix USB host
dra7xx: Enable USB_PHY3 32KHz clock
usb
DRA7xx has a 32KHz PHY clock for USB_PHY3 that must be enabled
for USB1 instance in Super-Speed.
Signed-off-by: Roger Quadros <rog...@ti.com>
---
arch/arm/cpu/armv7/omap5/hw_data.c | 14 --
arch/arm/cpu/armv7/omap5/prcm-regs.c | 1 +
arch/arm/include/asm/omap_common.h |
.
USB_DWC3_HOST and USB_DWC3_GADGET are only set if a particular mode
needs to be forced or if both host and gadget drivers are not available.
Build the dwc3 gadget drivers only if gadget mode can be used at runtime.
Signed-off-by: Roger Quadros <rog...@ti.com>
---
v2:
- don't depend on USB a
Hi Masahiro,
On 16/05/16 15:51, Masahiro Yamada wrote:
> Synopsys DWC3 IP generally works with an SoC-specific glue layer.
> DT binding for that is like this:
>
> usb3_glue {
> compatible = "foo,dwc3";
> ...
>
> usb3 {
> compatible =
On 17/05/16 11:57, Masahiro Yamada wrote:
> Hi Roger,
>
>
> 2016-05-17 17:20 GMT+09:00 Roger Quadros <rog...@ti.com>:
>> Hi Masahiro,
>>
>> On 16/05/16 15:51, Masahiro Yamada wrote:
>>> Synopsys DWC3 IP generally works with an SoC-specifi
On 16/05/16 14:10, Kishon Vijay Abraham I wrote:
> Hi Roger,
>
> On Monday 16 May 2016 04:01 PM, Roger Quadros wrote:
>> On 16/05/16 13:03, Kishon Vijay Abraham I wrote:
>>> Hi Roger,
>>>
>>> On Monday 16 May 2016 03:19 PM, Roger Quadros wrote:
&
On 13/05/16 15:47, Marek Vasut wrote:
> On 05/13/2016 02:29 PM, Roger Quadros wrote:
>> On 13/05/16 15:24, Marek Vasut wrote:
>>> On 05/13/2016 02:17 PM, Roger Quadros wrote:
>>>> udc-core is a generic framework and not specific to dwc3.
>>>> So build it
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