Simon Glass wrote at Monday, December 26, 2011 11:12 AM:
Add U-Boot's peripheral ID and pinmux selection to the Tegra20
device tree file.
diff --git a/arch/arm/dts/tegra20.dtsi b/arch/arm/dts/tegra20.dtsi
...
compatible = nvidia,tegra20-i2c;
reg = 0x7000C000
Simon Glass wrote at Monday, December 26, 2011 10:15 PM:
On Mon, Dec 26, 2011 at 8:35 PM, Stephen Warren swar...@nvidia.com wrote:
Simon Glass wrote at Monday, December 26, 2011 11:12 AM:
Add U-Boot's peripheral ID and pinmux selection to the Tegra20
device tree file.
diff --git a/arch
On 01/05/2012 08:50 AM, Wolfgang Denk wrote:
Dear Thierry Reding,
In message
1321524246-5187-2-git-send-email-thierry.red...@avionic-design.de you wrote:
The AVP on Tegra2 doesn't boot properly when U-Boot is linked against
the GCC provided libgcc. To work around this, always build and
On 01/05/2012 12:16 PM, Wolfgang Denk wrote:
In message 4f05d596.6030...@nvidia.com you wrote:
...
The libraries included in the toolchain are built for the ARMv7 CPUs,
SO this is not the right tool chain for the job. Ecactly what I said.
and hence fail to operate correctly when used by
On 01/05/2012 01:42 PM, Simon Glass wrote:
Hi,
On Thu, Jan 5, 2012 at 12:17 PM, Wolfgang Denk w...@denx.de wrote:
Dear Stephen Warren,
In message 4f05fcbd.2040...@nvidia.com you wrote:
No, this is NOT a solution, it is a workaround for an inappropriate
toolchain. If you want to build
=0e52d7fe25b11a656c376a37890be219470661fb
v2: New patch
Signed-off-by: Stephen Warren swar...@nvidia.com
---
arch/arm/cpu/armv7/tegra2/board.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/cpu/armv7/tegra2/board.c
b/arch/arm/cpu/armv7/tegra2/board.c
index ea06570
alternative function on
SDB to avoid the conflict. Also, tri-state the group to avoid
driving any signal onto it until we know what's connected.
Signed-off-by: Stephen Warren swar...@nvidia.com
---
arch/arm/cpu/armv7/tegra2/funcmux.c | 12
1 files changed, 12 insertions(+), 0 deletions
.
* Removed nvmem= from default Linux kernel command-line; no drivers use the
reserved memory yet, so there's no point reserving it.
Signed-off-by: Stephen Warren swar...@nvidia.com
---
MAINTAINERS |1 +
board/compal/paz00/Makefile | 41 ++
board/compal/paz00
of the 'console' setting.
Signed-off-by: Doug Anderson diand...@chromium.org
[swarren: Limited the change to Tegra platforms]
Signed-off-by: Stephen Warren swar...@nvidia.com
---
drivers/serial/ns16550.c |7 +++
1 files changed, 7 insertions(+), 0 deletions(-)
diff --git a/drivers/serial/ns16550
On 01/06/2012 05:25 PM, Simon Glass wrote:
Since Tegra executes early code on an ARMv4T (but the rest on ARMv7)
we must mark the new board init files for compilation with ARMv4t
architecture.
Signed-off-by: Simon Glass s...@chromium.org
This and patch 28 seem fine to me (but I didn't look
On 01/09/2012 12:55 PM, Simon Glass wrote:
On Fri, Jan 6, 2012 at 2:14 PM, Stephen Warren swar...@nvidia.com wrote:
The Toshiba AC100 (Compal code-name Paz00, aka Dynabook AZ) is a netbook
derived from the NVIDIA Tegra Harmony reference board. It ships with
Android, but is often repurposed
On 01/09/2012 12:55 PM, Simon Glass wrote:
...
+ debug(board_mmc_init: init eMMC\n);
+ /* init dev 0, eMMC chip, with 4-bit bus */
+ /* The board has an 8-bit bus, but 8-bit doesn't work yet */
+ tegra2_mmc_init(0, 4, -1, -1);
Yes - I will see if I can do a patch to
On 01/09/2012 01:04 PM, Simon Glass wrote:
Hi Stephen,
On Mon, Jan 9, 2012 at 12:00 PM, Stephen Warren swar...@nvidia.com wrote:
On 01/09/2012 12:55 PM, Simon Glass wrote:
On Fri, Jan 6, 2012 at 2:14 PM, Stephen Warren swar...@nvidia.com wrote:
The Toshiba AC100 (Compal code-name Paz00, aka
On 12/26/2011 11:11 AM, Simon Glass wrote:
Change this name to fit with the current convention in the Tegra
header file.
Signed-off-by: Simon Glass s...@chromium.org
Acked-by: Stephen Warren swar...@nvidia.com
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On 12/26/2011 11:11 AM, Simon Glass wrote:
Add support to funcmux for selecting I2C functions and programming
the pinmux appropriately.
Signed-off-by: Simon Glass s...@chromium.org
Conceptually the changes here look fine. I think that adding the new I2C
cases and the tests for valid config
On 12/26/2011 11:11 AM, Simon Glass wrote:
Select the port ordering for I2C on Seaboard.
Signed-off-by: Simon Glass s...@chromium.org
Acked-by: Stephen Warren swar...@nvidia.com
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On 12/26/2011 11:11 AM, Simon Glass wrote:
This enables I2C on Seaboard.
...
diff --git a/include/configs/seaboard.h b/include/configs/seaboard.h
...
+#define CONFIG_SYS_I2C_INIT_BOARD
I don't think that option is correct for Seaboard; the description in
the README indicates this causes a
On 12/26/2011 11:11 AM, Simon Glass wrote:
From: Yen Lin ye...@nvidia.com
Add basic i2c driver for Tegra2 with 8- and 16-bit address support.
The driver supports building both with and without CONFIG_OF_CONTROL.
Without CONFIG_OF_CONTROL a number of CONFIG options must be supplied
in the
On 01/09/2012 03:53 PM, Simon Glass wrote:
This series expands funcmux_select() to support configs other than 0, and
to support options associated with a config.
This permits introduction of I2C support using multiple config options.
The options parameter is used by MMC to select standard
On 12/26/2011 12:32 PM, Simon Glass wrote:
We want to know which type of chip we are running on - the Tegra
family has several SKUs. This can be determined by reading a
fuse register, so add this function to ap20.
...
diff --git a/arch/arm/cpu/armv7/tegra2/ap20.c
On 12/26/2011 12:32 PM, Simon Glass wrote:
From: Jimmy Zhang jimmzh...@nvidia.com
Add support for setting up the memory controller parameters. Boards
can call tegra_set_emc() with a table containing the required
parameters.
...
diff --git a/arch/arm/cpu/armv7/tegra2/emc.c
On 01/09/2012 04:36 PM, Simon Glass wrote:
Hi Stephen,
On Mon, Jan 9, 2012 at 3:11 PM, Stephen Warren swar...@nvidia.com wrote:
On 01/09/2012 03:53 PM, Simon Glass wrote:
This series expands funcmux_select() to support configs other than 0, and
to support options associated with a config
On 12/26/2011 12:33 PM, Simon Glass wrote:
From: Jimmy Zhang jimmzh...@nvidia.com
Power supplies must be adjusted in line with clock frequency. This code
provides a simple routine to set the voltage to allow operation at maximum
frequency.
Signed-off-by: Simon Glass s...@chromium.org
---
On 12/26/2011 12:33 PM, Simon Glass wrote:
Adjust PMU to permit maximum frequency operation.
...
diff --git a/board/nvidia/common/board.c b/board/nvidia/common/board.c
...
+#ifdef CONFIG_TEGRA2_I2C
+ i2c_init_board();
+
+#ifdef CONFIG_TEGRA_PMU
+ pmu_set_nominal();
+#endif
+#endif
On 12/26/2011 12:33 PM, Simon Glass wrote:
From: Yen Lin ye...@nvidia.com
Add code to set up the warm boot area in the Tegra CPU ready for a
resume after suspend.
Signed-off-by: Simon Glass s...@chromium.org
How come Yen's S-o-b line is missing here?
As a general comment on this patch,
On 12/26/2011 12:33 PM, Simon Glass wrote:
From: Jimmy Zhang jimmzh...@nvidia.com
At cold boot, the default voltage supplied by pmu is not high enough
to support emc to run at its highest clock frequency. The code added
here is to update the default vdd_core and vdd_cpu to higher values.
On 12/26/2011 12:33 PM, Simon Glass wrote:
From: Jimmy Zhang jimmzh...@nvidia.com
Set Seaboard and Harmony to optimal memory settings based on the SOC
in use (T20 or T25).
Signed-off-by: Simon Glass s...@chromium.org
diff --git a/board/nvidia/common/emc.c b/board/nvidia/common/emc.c
...
On 12/26/2011 03:31 PM, Simon Glass wrote:
Stephen Warren pointed out that we should use nodes whether or not they
have an alias in the /aliases section. The aliases section specifies the
order so far as it can, but is not essential. Operating without alisses
is useful when the enumerated
On 01/10/2012 02:22 PM, Simon Glass wrote:
Hi Stephen,
On Tue, Jan 10, 2012 at 12:27 PM, Stephen Warren swar...@nvidia.com wrote:
On 12/26/2011 03:31 PM, Simon Glass wrote:
Stephen Warren pointed out that we should use nodes whether or not they
have an alias in the /aliases section
.
Signed-off-by: Simon Glass s...@chromium.org
Seems reasonable to me.
Acked-by: Stephen Warren swar...@nvidia.com
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...@chromium.org
---
Changes in v2:
- Enable caches for all Tegra2 boards instead of just Nvidia ones
Changes in v3:
- Rebase against master
Acked-by: Stephen Warren swar...@nvidia.com
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On 01/11/2012 03:42 PM, Simon Glass wrote:
This series expands funcmux_select() to support configs other than 0, and
to name each config option.
This permits introduction of I2C and MMC support in the funcmux.
The series,
Acked-by: Stephen Warren swar...@nvidia.com
--
nvpublic
Simon Glass wrote ednesday, January 11, 2012 9:18 PM:
On Mon, Jan 9, 2012 at 2:07 PM, Stephen Warren swar...@nvidia.com wrote:
On 12/26/2011 11:11 AM, Simon Glass wrote:
From: Yen Lin ye...@nvidia.com
Add basic i2c driver for Tegra2 with 8- and 16-bit address support.
The driver
Simon Glass wrote at Thursday, January 12, 2012 12:10 PM:
On Thu, Jan 12, 2012 at 10:59 AM, Stephen Warren swar...@nvidia.com wrote:
Simon Glass wrote at Wednesday, January 11, 2012 8:00 PM:
...
Also U-Boot tends to call i2c_init() before every use of i2c, whereas
we just want to init once
Simon Glass wrote at Thursday, January 12, 2012 12:36 PM:
On Mon, Jan 9, 2012 at 3:24 PM, Stephen Warren swar...@nvidia.com wrote:
On 12/26/2011 12:32 PM, Simon Glass wrote:
...
I think this should read/validate/switch-on the SoC ID field too; I
assume the SKU IDs can only be interpreted
Simon Glass wrote at Thursday, January 12, 2012 4:05 PM:
On Tue, Jan 10, 2012 at 10:46 AM, Stephen Warren swar...@nvidia.com wrote:
On 12/26/2011 12:33 PM, Simon Glass wrote:
From: Jimmy Zhang jimmzh...@nvidia.com
Set Seaboard and Harmony to optimal memory settings based on the SOC
Simon Glass wrote at Thursday, January 12, 2012 4:17 PM:
On Tue, Jan 10, 2012 at 9:56 AM, Stephen Warren swar...@nvidia.com wrote:
On 12/26/2011 12:33 PM, Simon Glass wrote:
From: Jimmy Zhang jimmzh...@nvidia.com
Power supplies must be adjusted in line with clock frequency. This code
Simon Glass wrote at Thursday, January 12, 2012 4:55 PM:
On Thu, Jan 12, 2012 at 3:42 PM, Stephen Warren swar...@nvidia.com wrote:
Simon Glass wrote at Thursday, January 12, 2012 4:05 PM:
On Tue, Jan 10, 2012 at 10:46 AM, Stephen Warren swar...@nvidia.com
wrote:
On 12/26/2011 12:33 PM
Simon Glass wrote at Thursday, January 12, 2012 5:06 PM:
On Thu, Jan 12, 2012 at 4:01 PM, Stephen Warren swar...@nvidia.com wrote:
Simon Glass wrote at Thursday, January 12, 2012 4:55 PM:
On Thu, Jan 12, 2012 at 3:42 PM, Stephen Warren swar...@nvidia.com wrote:
Simon Glass wrote
On 01/11/2012 04:08 PM, Simon Glass wrote:
Stephen Warren pointed out that we should use nodes whether or not they
have an alias in the /aliases section. The aliases section specifies the
order so far as it can, but is not essential. Operating without alisses
is useful when the enumerated
run_test(const char *aliases, const char *nodes, const char
*expect)
...
+ va_list ptr;
...
+ va_end(ptr);
ptr doesn't seem to be used, and this isn't a varargs function.
Otherwise,
Acked-by: Stephen Warren swar...@nvidia.com
--
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___
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On 01/13/2012 04:05 PM, Simon Glass wrote:
On Fri, Jan 13, 2012 at 2:04 PM, Yen Lin ye...@nvidia.com wrote:
On Fri, 2012-01-13 at 11:34 -0800, Simon Glass wrote:
On Tue, Jan 10, 2012 at 10:30 AM, Stephen Warren swar...@nvidia.com wrote:
On 12/26/2011 12:33 PM, Simon Glass wrote
...@chromium.org
Acked-by: Stephen Warren swar...@nvidia.com
(only because I commented on this before; I'm not an FDT maintainer here)
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Acked-by: Stephen Warren swar...@nvidia.com
(only because I commented on this before; I'm not an FDT maintainer here)
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On 01/11/2012 09:32 PM, Simon Glass wrote:
This adds some support into fdtdec for reading GPIO definitions from
the fdt. We permit up to FDT_GPIO_MAX GPIOs in the system. Each GPIO
is of the form:
gpio-function-name = phandle gpio_num flags;
That's not true in general.
The binding
On 01/11/2012 09:32 PM, Simon Glass wrote:
This was taken from commit b48c54e2 at:
git://git.kernel.org/pub/scm/linux/kernel/git/olof/tegra.git
config.mk is updated to provide this file to boards through the
built-in mechanism:
/include/ ARCH_CPU_DTS
Signed-off-by: Simon Glass
On 01/11/2012 09:32 PM, Simon Glass wrote:
This was taken from commit b48c54e2 at:
git://git.kernel.org/pub/scm/linux/kernel/git/olof/tegra.git
Signed-off-by: Simon Glass s...@chromium.org
diff --git a/board/nvidia/dts/tegra2-seaboard.dts
b/board/nvidia/dts/tegra2-seaboard.dts
This is
On 01/11/2012 09:32 PM, Simon Glass wrote:
Add a directory to hold device tree binding files, to permit easy review
of this material in U-Boot patches.
Signed-off-by: Simon Glass s...@chromium.org
diff --git a/doc/device-tree-bindings/README b/doc/device-tree-bindings/README
+The intent
On 01/11/2012 09:33 PM, Simon Glass wrote:
This adds clock references to the USB part of the device tree for U-Boot.
The USB timing information may vary between boards sometimes, but for
now we hard-code it in C. This is because all current T2x boards use
the same values, we will deal with
On 01/11/2012 09:33 PM, Simon Glass wrote:
This adds basic USB support for port 0. The other port is not supported
yet.
diff --git a/board/nvidia/common/board.c b/board/nvidia/common/board.c
+#ifdef CONFIG_USB_EHCI_TEGRA
+ /* For USB GPIO PD0. for now, since we have no pinmux in fdt */
On 01/11/2012 09:33 PM, Simon Glass wrote:
This adds basic support for the Tegra2 USB controller. Board files should
call board_usb_init() to set things up.
diff --git a/arch/arm/cpu/armv7/tegra2/usb.c b/arch/arm/cpu/armv7/tegra2/usb.c
+/* Record which controller can switch from host to
Olof Johansson wrote at Wednesday, January 18, 2012 10:32 PM:
On Wed, Jan 18, 2012 at 05:16:52PM -0700, Stephen Warren wrote:
diff --git a/Documentation/devicetree/bindings/clock/nvidia,tegra20-car.txt
+* NVIDIA Tegra20 Clock And Reset Controller
+
+This binding uses the common clock
Olof Johansson wrote at Thursday, January 19, 2012 12:13 AM:
On Wed, Jan 18, 2012 at 10:59 PM, Simon Glass s...@chromium.org wrote:
Hi Olof,
On Wed, Jan 18, 2012 at 10:41 PM, Olof Johansson o...@lixom.net wrote:
Hi,
On Wed, Jan 18, 2012 at 9:55 PM, Simon Glass s...@chromium.org wrote:
On 01/12/2012 12:00 PM, Simon Glass wrote:
Some devices can deal with multiple compatible properties. The devices
need to know which nodes to bind to which features. For example an
I2C driver which supports two different controller types will want to
know which type it is dealing with in each
On 01/12/2012 12:00 PM, Simon Glass wrote:
Add U-Boot's peripheral clock information to the Tegra20 device tree file.
diff --git a/arch/arm/dts/tegra20.dtsi b/arch/arm/dts/tegra20.dtsi
index ca7b523..963cf27 100644
--- a/arch/arm/dts/tegra20.dtsi
+++ b/arch/arm/dts/tegra20.dtsi
@@ -45,6
On 01/12/2012 12:00 PM, Simon Glass wrote:
Select the port ordering for I2C on Seaboard.
Signed-off-by: Simon Glass s...@chromium.org
Acked-by: Stephen Warren swar...@nvidia.com
This isn't the patch that I ack'd.
diff --git a/board/nvidia/dts/tegra2-seaboard.dts
b/board/nvidia/dts/tegra2
On 01/12/2012 12:00 PM, Simon Glass wrote:
From: Yen Lin ye...@nvidia.com
Add basic i2c driver for Tegra2 with 8- and 16-bit address support.
The driver requires CONFIG_OF_CONTROL to obtain its configuration
from the device tree.
(Simon Glass: s...@chromium.org modified for upstream)
On 01/13/2012 02:35 PM, Simon Glass wrote:
We want to know which type of chip we are running on - the Tegra
family has several SKUs. This can be determined by reading a
fuse register, so add this function to ap20.
Signed-off-by: Simon Glass s...@chromium.org
Acked-by: Stephen Warren swar
On 01/13/2012 02:35 PM, Simon Glass wrote:
From: Jimmy Zhang jimmzh...@nvidia.com
Add support for setting up the memory controller parameters. Boards
can set up an appropriate table in the device tree.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v2:
- Add debug() output
On 01/13/2012 02:35 PM, Simon Glass wrote:
From: Yen Lin ye...@nvidia.com
Add code to set up the warm boot area in the Tegra CPU ready for a
resume after suspend.
Signed-off-by: Simon Glass s...@chromium.org
Acked-by: Stephen Warren swar...@nvidia.com
--
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On 01/13/2012 02:35 PM, Simon Glass wrote:
This enables LP0 to support suspend / resume on Seaboard.
Signed-off-by: Simon Glass s...@chromium.org
FYI, I've read through all the patches in this series and besides the
comments I've already made, I think they're OK. I didn't review some of
the
On 01/13/2012 04:10 PM, Simon Glass wrote:
Add selection of NAND flash pins to the funcmux.
Signed-off-by: Simon Glass s...@chromium.org
Acked-by: Stephen Warren swar...@nvidia.com
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On 01/19/2012 04:51 PM, Simon Glass wrote:
Hi Stephen,
On Wed, Jan 18, 2012 at 2:24 PM, Stephen Warren swar...@nvidia.com wrote:
On 01/11/2012 09:32 PM, Simon Glass wrote:
This was taken from commit b48c54e2 at:
git://git.kernel.org/pub/scm/linux/kernel/git/olof/tegra.git
config.mk
On 01/19/2012 04:59 PM, Simon Glass wrote:
Hi Stephen,
On Thu, Jan 19, 2012 at 1:58 PM, Stephen Warren swar...@nvidia.com wrote:
On 01/13/2012 02:35 PM, Simon Glass wrote:
From: Jimmy Zhang jimmzh...@nvidia.com
Add support for setting up the memory controller parameters. Boards
can set up
On 01/19/2012 04:45 PM, Simon Glass wrote:
Hi Stephen,
On Thu, Jan 19, 2012 at 12:49 PM, Stephen Warren swar...@nvidia.com wrote:
On 01/12/2012 12:00 PM, Simon Glass wrote:
Some devices can deal with multiple compatible properties. The devices
need to know which nodes to bind to which
On 01/13/2012 04:10 PM, Simon Glass wrote:
Add a NAND controller along with a bindings file for review.
A few questions to start with:
diff --git a/doc/device-tree-bindings/nand/nvidia-nand.txt
b/doc/device-tree-bindings/nand/nvidia-nand.txt
+NAND Flash
+--
+
+(there isn't yet a
On 01/13/2012 04:10 PM, Simon Glass wrote:
From: Jim Lin ji...@nvidia.com
A device tree is used to configure the NAND, including memory
timings and block/pages sizes.
If this node is not present or is disabled, then NAND will not
be initialized.
Signed-off-by: Simon Glass
On 01/16/2012 11:11 PM, Simon Glass wrote:
Add funcmux support for the default keyboard mapping.
Signed-off-by: Simon Glass s...@chromium.org
diff --git a/arch/arm/cpu/armv7/tegra2/funcmux.c
b/arch/arm/cpu/armv7/tegra2/funcmux.c
+ case PERIPH_ID_KBC:
+ if (config ==
On 01/16/2012 11:11 PM, Simon Glass wrote:
From: Anton Staff robot...@chromium.org
The Tegra keyboard controller provides a simple interface to a matrix
keyboard.
diff --git a/arch/arm/dts/tegra20.dtsi b/arch/arm/dts/tegra20.dtsi
+ kbc@7000e200 {
+ compatible =
On 01/16/2012 11:11 PM, Simon Glass wrote:
From: Rakesh Iyer ri...@nvidia.com
Add support for internal matrix keyboard controller for Nvidia Tegra
platforms.
This driver uses the fdt decode function to obtain its key codes.
...
+static uchar *create_keymap(u32 *data, int len, int
Olof Johansson wrote at Saturday, January 21, 2012 12:32 AM:
On Thu, Jan 19, 2012 at 9:17 AM, Stephen Warren swar...@nvidia.com wrote:
Olof Johansson wrote at Wednesday, January 18, 2012 10:32 PM:
On Wed, Jan 18, 2012 at 05:16:52PM -0700, Stephen Warren wrote:
diff --git
Simon Glass wrote at Sunday, January 22, 2012 11:03 AM:
On Wed, Jan 18, 2012 at 4:16 PM, Stephen Warren swar...@nvidia.com wrote:
Document a binding for the Tegra20 CAR (Clock And Reset) Controller,
add it to tegra20.dtsi, and configure it for the board in tegra-
seaboard.dts
On 01/21/2012 10:08 AM, Simon Glass wrote:
Hi Stephen,
On Wed, Jan 18, 2012 at 2:17 PM, Stephen Warren swar...@nvidia.com wrote:
On 01/11/2012 09:32 PM, Simon Glass wrote:
This adds some support into fdtdec for reading GPIO definitions from
the fdt. ...
...
diff --git a/include/fdtdec.h b
On 01/22/2012 10:41 AM, Simon Glass wrote:
Hi Stephen,
On Thu, Jan 19, 2012 at 12:51 PM, Stephen Warren swar...@nvidia.com wrote:
On 01/12/2012 12:00 PM, Simon Glass wrote:
Add U-Boot's peripheral clock information to the Tegra20 device tree file.
diff --git a/arch/arm/dts/tegra20.dtsi b
Peter De Schrijver wrote at Tuesday, January 24, 2012 2:53 AM:
What about the peripheral resets which are also handled by CAR? Peripheral
clock nodes also offer assert and deassert methods for the reset signal
associated with them. Those methods are used when powergating domains for
example.
Colin Cross wrote at Tuesday, January 24, 2012 3:33 PM:
On Tue, Jan 24, 2012 at 2:08 PM, Stephen Warren swar...@nvidia.com wrote:
Peter De Schrijver wrote at Tuesday, January 24, 2012 2:53 AM:
What about the peripheral resets which are also handled by CAR? Peripheral
clock nodes also offer
Simon Glass wrote at Tuesday, January 24, 2012 4:12 PM:
On Mon, Jan 23, 2012 at 10:18 AM, Stephen Warren swar...@nvidia.com wrote:
On 01/21/2012 10:08 AM, Simon Glass wrote:
Hi Stephen,
On Wed, Jan 18, 2012 at 2:17 PM, Stephen Warren swar...@nvidia.com wrote:
On 01/11/2012 09:32 PM
This provides an example of how to use the Tegra CAR clock binding in a
board .dts file.
Signed-off-by: Stephen Warren swar...@nvidia.com
---
I think it makes sense to check the previous patch into the Linux kernel,
since it's mainly just defining what the binding is. However, this patch
is just
Document a binding for the Tegra20 CAR (Clock And Reset) Controller,
add it to tegra20.dtsi, and configure it for the board in tegra-
seaboard.dts.
Signed-off-by: Stephen Warren swar...@nvidia.com
---
v2:
* Remove clock-names, clock-output-names properties; Tegra will solely
use integer IDs
Simon Glass wrote at Wednesday, January 25, 2012 1:14 PM:
On Wed, Jan 25, 2012 at 11:57 AM, Stephen Warren swar...@nvidia.com wrote:
Document a binding for the Tegra20 CAR (Clock And Reset) Controller,
add it to tegra20.dtsi, and configure it for the board in tegra-
seaboard.dts.
...
v2
On 01/24/2012 04:21 PM, Simon Glass wrote:
This adds a property to indicate a port which can switch between host and
device
mode.
...
diff --git a/doc/device-tree-bindings/usb/tegra-usb.txt
b/doc/device-tree-bindings/usb/tegra-usb.txt
...
+Optional properties:
...
+ -
On 01/24/2012 04:21 PM, Simon Glass wrote:
This adds clock references to the USB part of the device tree for U-Boot.
The USB timing information may vary between boards sometimes, but for
now we hard-code it in C. This is because all current T2x boards use
the same values, we will deal with
to update to the clock binding we discussed on the Linux mailing
lists, the whole series is:
Acked-by: Stephen Warren swar...@nvidia.com
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Simon Glass wrote at Friday, February 03, 2012 10:08 AM:
We set up two USB ports, one of which can be host or device.
For some reason the kernel version does enable both ports.
Signed-off-by: Simon Glass s...@chromium.org
Acked-by: Stephen Warren swar...@nvidia.com
--
nvpublic
Simon Glass wrote at Friday, February 03, 2012 10:08 AM:
This adds clock references to the USB part of the device tree for U-Boot,
and marks USB1 as supporting legacy mode (which we disable in the driver).
The USB timing information may vary between boards sometimes, but for
now we hard-code
On 02/03/2012 04:24 PM, Simon Glass wrote:
Hi Stephen,
On Thu, Jan 19, 2012 at 12:56 PM, Stephen Warren swar...@nvidia.com wrote:
On 01/12/2012 12:00 PM, Simon Glass wrote:
Select the port ordering for I2C on Seaboard.
Signed-off-by: Simon Glass s...@chromium.org
Acked-by: Stephen Warren
On 02/03/2012 05:19 PM, Simon Glass wrote:
Hi Stephen,
On Fri, Feb 3, 2012 at 4:14 PM, Stephen Warren swar...@nvidia.com wrote:
On 02/03/2012 04:24 PM, Simon Glass wrote:
Hi Stephen,
On Thu, Jan 19, 2012 at 12:56 PM, Stephen Warren swar...@nvidia.com wrote:
On 01/12/2012 12:00 PM, Simon
On 02/03/2012 05:36 PM, Simon Glass wrote:
Hi Stephen,
On Fri, Feb 3, 2012 at 4:25 PM, Stephen Warren swar...@nvidia.com wrote:
On 02/03/2012 05:19 PM, Simon Glass wrote:
Hi Stephen,
On Fri, Feb 3, 2012 at 4:14 PM, Stephen Warren swar...@nvidia.com wrote:
On 02/03/2012 04:24 PM, Simon
On 04/21/2013 11:29 AM, Nicolas Chauvet wrote:
Hi,
I'm experiencing a regression from v2013.04-rc3 that I found related to the
following commit:
64f4a6192f0670de2d9af98900b750a3e7bf8ce6
1741c64d642a95c4bb88a2b03e96c6dc7ed5fe62
With v2013.04 release, when trying to boot from sdcard, I
On 04/29/2013 03:21 AM, Jim Lin wrote:
Add DT node for USB function.
diff --git a/arch/arm/dts/tegra114.dtsi b/arch/arm/dts/tegra114.dtsi
+/* This table has USB timing parameters for each Oscillator frequency we
+ * support. There are four sets of values:
+ *
+ * 1. PLLU configuration
On 04/29/2013 03:21 AM, Jim Lin wrote:
Tegra30 and Tegra114 are compatible except
1. T30 takes 55 ms to finish Port Reset. T114 takes
50 ms.
Is that 55-vs-50 some aspect of the HW specification itself, or the
overall result of multiple separate delays? I ask because the statement
that one
On 04/29/2013 03:21 AM, Jim Lin wrote:
Add USB EHCI, storage and network support.
Tested on Tegra30 Cardhu, and Tegra114 Dalmore
platforms. All works well.
What about updating include/configs/beaver.h too?
___
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On 05/03/2013 05:07 AM, Jim Lin wrote:
On Fri, 2013-05-03 at 03:10 +0800, Stephen Warren wrote:
On 04/29/2013 03:21 AM, Jim Lin wrote:
Add DT node for USB function.
diff --git a/arch/arm/dts/tegra114.dtsi b/arch/arm/dts/tegra114.dtsi
+/* This table has USB timing parameters for each
On 05/03/2013 04:53 AM, Jim Lin wrote:
On Fri, 2013-05-03 at 03:29 +0800, Stephen Warren wrote:
On 04/29/2013 03:21 AM, Jim Lin wrote:
Tegra30 and Tegra114 are compatible except
1. T30 takes 55 ms to finish Port Reset. T114 takes
50 ms.
Is that 55-vs-50 some aspect of the HW
support for Tegra30/Tegra114
Tegra: Config: Enable Tegra30/Tegra114 USB function
The series,
Tested-by: Stephen Warren swar...@nvidia.com
On both Cardhu (Tegra30) and Dalmore (Tegra114). :-) :-) Now, I can
netboot with upstream U-Boot on all my boards
On 05/04/2013 06:01 AM, Heiko Schocher wrote:
From: Simon Glass s...@chromium.org
This enables CONFIG_SYS_I2C on Tegra, updating existing boards and the Tegra
i2c driver to support this.
include/configs/beaver.h| 5 ++-
include/configs/cardhu.h| 3 +-
include/configs/dalmore.h
On 05/07/2013 02:01 AM, Marc Dietrich wrote:
Hi,
Am Montag, 6. Mai 2013, 13:08:31 schrieb Stephen Warren:
On 05/04/2013 06:01 AM, Heiko Schocher wrote:
From: Simon Glass s...@chromium.org
This enables CONFIG_SYS_I2C on Tegra, updating existing boards and the
Tegra i2c driver to support
by the Linux kernel).
Signed-off-by: Stephen Warren swar...@wwwdotorg.org
---
common/lcd.c | 87 +
include/lcd.h |5
2 files changed, 92 insertions(+)
diff --git a/common/lcd.c b/common/lcd.c
index edae835..3a60484 100644
--- a/common/lcd.c
Add a DT simple-framebuffer node to DT when booting the Linux kernel.
This will allow the kernel to inherit the framebuffer configuration from
U-Boot, and display a graphical boot console, and even run a full SW-
rendered X server.
Signed-off-by: Stephen Warren swar...@wwwdotorg.org
---
board
On 05/03/2013 09:02 AM, Stephen Warren wrote:
On 04/29/2013 03:21 AM, Jim Lin wrote:
Tegra114 USB EHCI is compatible with Tegra30 USB EHCI
except:
1. Port Reset - Tegra30 takes 55ms, Tegra114 takes 50 ms to finish.
2. PLL parameters.
Jim Lin (3):
ARM: Tegra: FDT: Add USB support for T20
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