On 08/14/2017 05:58 AM, Chee, Tien Fong wrote:
> On Sab, 2017-08-12 at 18:49 +0200, Marek Vasut wrote:
>> On 08/12/2017 10:03 AM, Chee, Tien Fong wrote:
>> [...]
>>>
>
> 1: It having ability to the right memory(OCRAM or SDRAM) to
> achieve
> the
> best FPGA programing perfo
On Sab, 2017-08-12 at 18:49 +0200, Marek Vasut wrote:
> On 08/12/2017 10:03 AM, Chee, Tien Fong wrote:
> [...]
> >
> > >
> > > >
> > > > 1: It having ability to the right memory(OCRAM or SDRAM) to
> > > > achieve
> > > > the
> > > > best FPGA programing performance.
> > > Did you find significan
On 08/12/2017 10:03 AM, Chee, Tien Fong wrote:
[...]
>>> 1: It having ability to the right memory(OCRAM or SDRAM) to achieve
>>> the
>>> best FPGA programing performance.
>> Did you find significant throughput difference ?
>>
> 80% performance improvement with SDRAM.
This looks more like caches ar
On Jum, 2017-08-11 at 17:09 +0200, Marek Vasut wrote:
> On 08/10/2017 06:43 AM, Chee, Tien Fong wrote:
> >
> > On Rab, 2017-08-09 at 10:29 +0200, Marek Vasut wrote:
> > >
> > > On 08/09/2017 06:50 AM, Chee, Tien Fong wrote:
> > > [...]
> > >
> > > >
> > > >
> > > > >
> > > > >
> > > > > >
>
On 08/10/2017 06:43 AM, Chee, Tien Fong wrote:
> On Rab, 2017-08-09 at 10:29 +0200, Marek Vasut wrote:
>> On 08/09/2017 06:50 AM, Chee, Tien Fong wrote:
>> [...]
>>
>>>
>
>>
>> If this is for some FPGA loading, can this functionality be
>> scripted
>> instead?
>>
>
On Rab, 2017-08-09 at 10:29 +0200, Marek Vasut wrote:
> On 08/09/2017 06:50 AM, Chee, Tien Fong wrote:
> [...]
>
> >
> > >
> > > >
> > > > >
> > > > > If this is for some FPGA loading, can this functionality be
> > > > > scripted
> > > > > instead?
> > > > >
> > > > Sorry, i'm not getting you
On 08/09/2017 06:50 AM, Chee, Tien Fong wrote:
[...]
If this is for some FPGA loading, can this functionality be
scripted
instead?
>>> Sorry, i'm not getting you. How functionality be scripted? Could
>>> you
>>> provide some example or details explanation?
>> ie. "load" (from f
On Sel, 2017-08-08 at 12:11 +0200, Marek Vasut wrote:
> On 08/08/2017 12:06 PM, Chee, Tien Fong wrote:
> >
> > On Sel, 2017-08-08 at 11:32 +0200, Marek Vasut wrote:
> > >
> > > On 08/08/2017 11:12 AM, tien.fong.c...@intel.com wrote:
> > > >
> > > >
> > > > From: Tien Fong Chee
> > > >
> > > >
On 08/08/2017 12:06 PM, Chee, Tien Fong wrote:
> On Sel, 2017-08-08 at 11:32 +0200, Marek Vasut wrote:
>> On 08/08/2017 11:12 AM, tien.fong.c...@intel.com wrote:
>>>
>>> From: Tien Fong Chee
>>>
>>> Configuration flip-flop driver is mainly used for handling the FPGA
>>> program
>>> operation where
On Sel, 2017-08-08 at 11:32 +0200, Marek Vasut wrote:
> On 08/08/2017 11:12 AM, tien.fong.c...@intel.com wrote:
> >
> > From: Tien Fong Chee
> >
> > Configuration flip-flop driver is mainly used for handling the FPGA
> > program
> > operation where the FPGA image loading from the flash into FPGA
On 08/08/2017 11:12 AM, tien.fong.c...@intel.com wrote:
> From: Tien Fong Chee
>
> Configuration flip-flop driver is mainly used for handling the FPGA program
> operation where the FPGA image loading from the flash into FPGA manager.
I don't understand what this driver is for , sorry.
Coding st
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