Re: [U-Boot] armv7: ls102xa: Fix endianness of SCFG_SPARECR8

2019-09-25 Thread Biwen Li 
> >Subject: [U-Boot] armv7: ls102xa: Fix endianness of SCFG_SPARECR8
> Fix endianness means fixing endianness but here you are correcting it May be
> subject can be updated to something like
> "armv7: ls102xa: Update endianness of SCFG_SPARECR8 read"
> >
> >The patch fixes endianness of SCFG_SPARECR8 register
> Please update description to something like "Correct endianness of
> SCFG_SPARECR8 register read
> in_le32 -> in_be32"
You are right, I will correct it in v2.
> 
> --priyankajain
> >
> >Signed-off-by: Biwen Li 
> >---
> > arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> >diff --git a/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c
> >b/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c
> >index bb169aaaf4..00b6ad48ce 100644
> >--- a/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c
> >+++ b/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c
> >@@ -72,7 +72,7 @@ static void __secure ls1_deepsleep_irq_cfg(void)
> >  * returns zero, so its value is saved to a scrachpad register to be
> >  * read, that is why we don't read it from register ippdexpcr1 itself.
> >  */
> >-ippdexpcr1 = in_le32(>sparecr[7]);
> >+ippdexpcr1 = in_be32(>sparecr[7]);
> > out_be32(>ippdexpcr1, ippdexpcr1);
> >
> > if (ippdexpcr0 & RCPM_IPPDEXPCR0_ETSEC)
> >--
> >2.17.1
> >
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Re: [U-Boot] armv7: ls102xa: Fix endianness of SCFG_SPARECR8

2019-09-24 Thread Priyanka Jain 


>-Original Message-
>From: U-Boot  On Behalf Of Biwen Li
>Sent: Monday, September 16, 2019 1:31 PM
>To: albert.u.b...@aribaud.net; Ran Wang ; York Sun
>
>Cc: u-boot@lists.denx.de
>Subject: [U-Boot] armv7: ls102xa: Fix endianness of SCFG_SPARECR8
Fix endianness means fixing endianness but here you are correcting it
May be subject can be updated to something like
"armv7: ls102xa: Update endianness of SCFG_SPARECR8 read"
>
>The patch fixes endianness of SCFG_SPARECR8 register
Please update description to something like 
"Correct endianness of SCFG_SPARECR8 register read
in_le32 -> in_be32"

--priyankajain
>
>Signed-off-by: Biwen Li 
>---
> arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
>diff --git a/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c
>b/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c
>index bb169aaaf4..00b6ad48ce 100644
>--- a/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c
>+++ b/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c
>@@ -72,7 +72,7 @@ static void __secure ls1_deepsleep_irq_cfg(void)
>* returns zero, so its value is saved to a scrachpad register to be
>* read, that is why we don't read it from register ippdexpcr1 itself.
>*/
>-  ippdexpcr1 = in_le32(>sparecr[7]);
>+  ippdexpcr1 = in_be32(>sparecr[7]);
>   out_be32(>ippdexpcr1, ippdexpcr1);
>
>   if (ippdexpcr0 & RCPM_IPPDEXPCR0_ETSEC)
>--
>2.17.1
>
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Re: [U-Boot] armv7: ls102xa: Fix endianness of SCFG_SPARECR8

2019-09-16 Thread Biwen Li 
Add priyanka jain for the review.
> ---
>  arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c
> b/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c
> index bb169aaaf4..00b6ad48ce 100644
> --- a/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c
> +++ b/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c
> @@ -72,7 +72,7 @@ static void __secure ls1_deepsleep_irq_cfg(void)
>* returns zero, so its value is saved to a scrachpad register to be
>* read, that is why we don't read it from register ippdexpcr1 itself.
>*/
> - ippdexpcr1 = in_le32(>sparecr[7]);
> + ippdexpcr1 = in_be32(>sparecr[7]);
>   out_be32(>ippdexpcr1, ippdexpcr1);
> 
>   if (ippdexpcr0 & RCPM_IPPDEXPCR0_ETSEC)
> --
> 2.17.1

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