Re: [USRP-users] Libuhd issues - "uhd_find_devices: error while loading shared libraries"

2019-12-05 Thread Fabian Schwartau via USRP-users
You have an old version of libuhd already installed. Uninstall it using: $ sudo dpkg -P libuhd Then retry installing it. Sometimes libraries are not found and you have to run $ sudo ldconfig but that is usually done by dpkg. Am 06.12.2019 um 00:31 schrieb Saeid Hashemi via USRP-users: Hello

[USRP-users] Libuhd issues - "uhd_find_devices: error while loading shared libraries"

2019-12-05 Thread Saeid Hashemi via USRP-users
Hello everyone, I have an Intel NUC running Ubuntu 16.04 and a low latency kernel which I use for OAI LTE software on top of UHD. After updating my system repositories, UHD broke somehow with the following result: nuc8-3@nuc83-NUC8i7BEH:~$ uhd_find_devices uhd_find_devices: error while loading

Re: [USRP-users] DPDK

2019-12-05 Thread Marcus D. Leech via USRP-users
On 12/05/2019 06:06 PM, Keith k via USRP-users wrote: Just wondering if there are plans to add DPDK support for the N2xx devices? -- -Keith Kotyk That seems unlikely since 'new feature' support for N2xx has been somewhat "dead" for a few years now.

[USRP-users] DPDK

2019-12-05 Thread Keith k via USRP-users
Just wondering if there are plans to add DPDK support for the N2xx devices? -- -Keith Kotyk ___ USRP-users mailing list USRP-users@lists.ettus.com http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com

Re: [USRP-users] RFNoC time-allign 2-channel TwinRX -- timed commands?

2019-12-05 Thread d.des via USRP-users
Nothing beats the doctor's office effect. In case anyone else has been looking for this I just got it: in c++: : stream_cmd.stream_now = false; //true; //change this line stream_cmd.time_spec = radio_ctrl->get_time_now()+1.5; //or prob. less rx_stream->issue_stream_cmd(stream_cmd); //existing

Re: [USRP-users] USRP X3x0 FPGA source (LV)

2019-12-05 Thread Sam Reiter via USRP-users
Wheberth, The source code for any of the NI-USRP side of things is locked down. Even if I thought is was something that would be useful in this case (I'm still not convinced it would be), it's not something I'm at liberty to release. However, from your email, it sounds like the main hesitation

Re: [USRP-users] B200mini external clock: loop over VCTCXO

2019-12-05 Thread Marcus D. Leech via USRP-users
On 12/05/2019 03:17 AM, Emanuel via USRP-users wrote: Hi everybody, we are using an external 10MHz clock for the B200mini and have some concerns/questions about the clocking architecture: 1.Do I see it correctly from the schematics, that the external 10MHz reference is used in a

Re: [USRP-users] USRP X3x0 FPGA source (LV)

2019-12-05 Thread Wheberth Damascena Dias via USRP-users
HI Sam, Thank you for your answer. Let me explain our situation a little bit better. Here at Inatel we have been developing for the USRPs using the LabVIEW FPGA (USRP-RIO) flow for a while. So we have many blocks already implemented in this paradigm. We are now switching for the software flow

[USRP-users] RFNoC time-allign 2-channel TwinRX -- timed commands?

2019-12-05 Thread d.des via USRP-users
I'm trying to process multi-channel RFNoC streams in Gnuradio but would settle for using the c++ API if necessary. I'm using just one of the two TwinRX card in an X310. The simplest example of the alignment issue is seem by comparing 2-channel recordings made at a 1 MHz sample rate on an aperiodic

Re: [USRP-users] USRP X3x0 FPGA source (LV)

2019-12-05 Thread Sam Reiter via USRP-users
Wheberth, What you're trying to do sounds possible, but I think you're approaching it the wrong way. When you use the USRP with a default FPGA image (usrp_x310_fpga_HG.lvbitx), you just get the HG image that you can interface with using the NI-USRP driver in LabVIEW. In that case, everything you

[USRP-users] USRP X3x0 FPGA source (LV)

2019-12-05 Thread Wheberth Damascena Dias via USRP-users
Hi All, Looking at the bitfile "usrp_x310_fpga_HG.lvbitx", as the name suggests, it looks like it came from LabVIEW/LabVIEW Comms. It is possible even to see the top ..vi filename which is "USRP_X3x0_Top.vi". Although I wasn't able to find the LabVIEW source project for this bitfile. Is this

[USRP-users] GPIOs timed commands

2019-12-05 Thread Emanuel via USRP-users
Hi everybody, could the GPIOs, e.g., on a B200mini be set/unset precisely in time (limited to the sampling rate used)? Best regards, Emanuel ___ USRP-users mailing list USRP-users@lists.ettus.com

[USRP-users] B200mini external clock: loop over VCTCXO

2019-12-05 Thread Emanuel via USRP-users
Hi everybody, we are using an external 10MHz clock for the B200mini and have some concerns/questions about the clocking architecture: 1. Do I see it correctly from the schematics, that the external 10MHz reference is used in a control-loop within the FPGA to actually steer the 40MHz