Kevin,
I glanced through Captures 0,1,2 and could see the general gist of where it all
goes wrong, but it’s not really clear why. The dissector seems out of date, at
least it isn’t decoding correctly but I can still follow it.
Capture 0:
Packets 2551 through 2606 are the actual sample data
Christian,
CHDR packets are encapsulated in UDP/IP between Host and USRP. See the
attachment.
PHY+ MAC functionality live under the x300_sfpp_io_core. However these blocks
do not encapsulate/decapsulate the network packets.
All the ethernet/IP/UDP framing fields are added by chdr_eth_framer on
BTW. I found that this question has been already asked a long time ago:
https://lists.gnu.org/archive/html/discuss-gnuradio/2010-09/msg00056.html
but it didn't get any answers back then.
Thanks Ian for the full explanation.
2017-11-09 10:15 GMT+01:00 Ian Buckley :
>
>
There’s a bit of history there. PHY_CLK was indeed originally connected to the
FPGA.
It wasn’t needed and so the S1 switch was added to that pin instead.
That switch was never used and so the original signal name persists in the
Verilog even though it connects to nothing.
-Ian
> On Nov 5,
I have noticed that neon support for the converter is not enabling. The
CMakeError.log has this output. I am not certain as I am not really
familiar with ARM and NEON, but I checked my CPU and it does support it.
Also, the error message below is saying it is just a matter of passing
certain flags.
I want to contribute a fix to https://github.com/EttusResearch/fpga repository.
However, given my agreement with the company I work for, the process of
submitting the patch might be different depending on the license of the
project I want to contribute to. My assumption would be that the license
Hello. I'm trying to access RFNoC data from across the host boundary
within gnuradio but am having trouble figuring it out.
Specifically, I'm setting the .sob and .eob in RFNoC and trying to get that
data within a host-side C++ gnuradio block. I found a gnuradio struct
called
Hello Wahhab,
I do not know about using the MIMO cable between a USRP2 and a N2x0, the
USRP2 became end of life before I started at Ettus. I think it would work,
but cannot test it myself. Others at Ettus may know the answer.
You will need at least two 1 Gigabit connections to your host
Hi Manuel,
Is it possible to include "LICENSE.md" file in the repository? It seems
that GitHub even has a tool for that:
https://help.github.com/articles/adding-a-license-to-a-repository/
Thanks,
Michał
2017-11-09 15:36 GMT+01:00 Manuel Uhm :
> Hi Michal.
>
> UHD and
Dear All,
We would like to sense (i.e. sample) 100 MHz of 2.4GHz spectrum. My idea is
to connect 2 USRPs (USRPN200 and USRP2) via a MIMO cable (available at
ettus.com). Then, we configure each USRP separately to monitor 50MHz of
bandwidth (8bit per sample).
My question:
1- is it possible to
Thank you Derek for the comments.
I just want to clarify this point about connecting two USRP devices; first,
it seems to be fine to connect a USRPN200 with USRP2 (via a MIMO cable),
right?
Second, by connecting two devices via MIMO cable, I need to connect their
GigaBit Ethenet cables to a
Did this ever get resolved? Because I am having the same issues now too.
Hi Luis,
I will follow up with you on this issue off the list, within the thread that has been sent to support at ettus.com.
Hi,
Due to recent changes in design flow, our team recently moved from UHD 3.10
to UHD 3.9. I was just wondering how would one develop FPGA modules (or
integrate RFNoC modules) on UHD 3.9?
Thanks,
Manik Singhal
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Hello
I was trying to to use the rfnoc radio with two channels, which is connected to
a qt frequency sink via DMA fifo. But on doing so,it gives me the following
error. I have attached the grc file for your reference. I am using NI USRP
2954R with ubuntu 14.04. Please let me know where I am
Robin and Marcus,
Thank you for the suggestions. Marcus, I did try and follow your suggestion,
however, I cannot communicate with the N210 other than through the Jtag port
communication.
Robin, I did install the Xilinx ISE 14.7 Labtools and ran Impact, however, I
kept getting a windrv6
Hello,
I am trying to TX two streams of 200 Msps on the X310. There is no RX. It
does not work. I recall hearing that there is a fundamental limitation of the
FPGA crossbar that limits total TX (both channels to 200 Msps). Is that the
case? What can I do to work around it? Perhaps a
I was able to get the compiler flags passed in so that the check for the
header arm_neon.h passes. I added it to the CMakeList root file with
SET(CMAKE_CXX_FLAGS, "${CMAKE_CXX_FLAGS} -mfloat-abi=softfp -mfpu=neon").
Then, it would detect neon. However, I spent considerable time cleaning up
Hi Michal.
UHD and RFNoC and both covered under GPLv3. We look forward to seeing your fix!
Cheers,
Manuel
From: Michał Wróbel via USRP-users
Sent: Thursday, November 9, 2:29 AM
Subject: [USRP-users] FPGA source code license
To: USRP-users
I want to contribute a fix to
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